1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2013 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30 #include <linux/module.h>
31 #include <linux/types.h>
32 #include <linux/init.h>
33 #include <linux/bitops.h>
34 #include <linux/vmalloc.h>
35 #include <linux/pagemap.h>
36 #include <linux/netdevice.h>
37 #include <linux/ipv6.h>
38 #include <linux/slab.h>
39 #include <net/checksum.h>
40 #include <net/ip6_checksum.h>
41 #include <linux/net_tstamp.h>
42 #include <linux/mii.h>
43 #include <linux/ethtool.h>
45 #include <linux/if_vlan.h>
46 #include <linux/pci.h>
47 #include <linux/pci-aspm.h>
48 #include <linux/delay.h>
49 #include <linux/interrupt.h>
51 #include <linux/tcp.h>
52 #include <linux/sctp.h>
53 #include <linux/if_ether.h>
54 #include <linux/aer.h>
55 #include <linux/prefetch.h>
56 #include <linux/pm_runtime.h>
58 #include <linux/dca.h>
60 #include <linux/i2c.h>
66 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
67 __stringify(BUILD) "-k"
68 char igb_driver_name[] = "igb";
69 char igb_driver_version[] = DRV_VERSION;
70 static const char igb_driver_string[] =
71 "Intel(R) Gigabit Ethernet Network Driver";
72 static const char igb_copyright[] =
73 "Copyright (c) 2007-2013 Intel Corporation.";
75 static const struct e1000_info *igb_info_tbl[] = {
76 [board_82575] = &e1000_82575_info,
79 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
80 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
81 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
82 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
83 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
84 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
85 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
86 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
87 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
88 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
89 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
90 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
91 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
92 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
93 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
94 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
95 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
96 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
97 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
98 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
99 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
100 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
101 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
102 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
103 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
104 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
105 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
106 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
107 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
108 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
109 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
110 /* required last entry */
114 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
116 void igb_reset(struct igb_adapter *);
117 static int igb_setup_all_tx_resources(struct igb_adapter *);
118 static int igb_setup_all_rx_resources(struct igb_adapter *);
119 static void igb_free_all_tx_resources(struct igb_adapter *);
120 static void igb_free_all_rx_resources(struct igb_adapter *);
121 static void igb_setup_mrqc(struct igb_adapter *);
122 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
123 static void igb_remove(struct pci_dev *pdev);
124 static int igb_sw_init(struct igb_adapter *);
125 static int igb_open(struct net_device *);
126 static int igb_close(struct net_device *);
127 static void igb_configure(struct igb_adapter *);
128 static void igb_configure_tx(struct igb_adapter *);
129 static void igb_configure_rx(struct igb_adapter *);
130 static void igb_clean_all_tx_rings(struct igb_adapter *);
131 static void igb_clean_all_rx_rings(struct igb_adapter *);
132 static void igb_clean_tx_ring(struct igb_ring *);
133 static void igb_clean_rx_ring(struct igb_ring *);
134 static void igb_set_rx_mode(struct net_device *);
135 static void igb_update_phy_info(unsigned long);
136 static void igb_watchdog(unsigned long);
137 static void igb_watchdog_task(struct work_struct *);
138 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
139 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
140 struct rtnl_link_stats64 *stats);
141 static int igb_change_mtu(struct net_device *, int);
142 static int igb_set_mac(struct net_device *, void *);
143 static void igb_set_uta(struct igb_adapter *adapter);
144 static irqreturn_t igb_intr(int irq, void *);
145 static irqreturn_t igb_intr_msi(int irq, void *);
146 static irqreturn_t igb_msix_other(int irq, void *);
147 static irqreturn_t igb_msix_ring(int irq, void *);
148 #ifdef CONFIG_IGB_DCA
149 static void igb_update_dca(struct igb_q_vector *);
150 static void igb_setup_dca(struct igb_adapter *);
151 #endif /* CONFIG_IGB_DCA */
152 static int igb_poll(struct napi_struct *, int);
153 static bool igb_clean_tx_irq(struct igb_q_vector *);
154 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
155 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
156 static void igb_tx_timeout(struct net_device *);
157 static void igb_reset_task(struct work_struct *);
158 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features);
159 static int igb_vlan_rx_add_vid(struct net_device *, u16);
160 static int igb_vlan_rx_kill_vid(struct net_device *, u16);
161 static void igb_restore_vlan(struct igb_adapter *);
162 static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
163 static void igb_ping_all_vfs(struct igb_adapter *);
164 static void igb_msg_task(struct igb_adapter *);
165 static void igb_vmm_control(struct igb_adapter *);
166 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
167 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
168 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
169 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
170 int vf, u16 vlan, u8 qos);
171 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
172 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
174 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
175 struct ifla_vf_info *ivi);
176 static void igb_check_vf_rate_limit(struct igb_adapter *);
178 #ifdef CONFIG_PCI_IOV
179 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
180 static bool igb_vfs_are_assigned(struct igb_adapter *adapter);
184 #ifdef CONFIG_PM_SLEEP
185 static int igb_suspend(struct device *);
187 static int igb_resume(struct device *);
188 #ifdef CONFIG_PM_RUNTIME
189 static int igb_runtime_suspend(struct device *dev);
190 static int igb_runtime_resume(struct device *dev);
191 static int igb_runtime_idle(struct device *dev);
193 static const struct dev_pm_ops igb_pm_ops = {
194 SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
195 SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
199 static void igb_shutdown(struct pci_dev *);
200 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
201 #ifdef CONFIG_IGB_DCA
202 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
203 static struct notifier_block dca_notifier = {
204 .notifier_call = igb_notify_dca,
209 #ifdef CONFIG_NET_POLL_CONTROLLER
210 /* for netdump / net console */
211 static void igb_netpoll(struct net_device *);
213 #ifdef CONFIG_PCI_IOV
214 static unsigned int max_vfs = 0;
215 module_param(max_vfs, uint, 0);
216 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate "
217 "per physical function");
218 #endif /* CONFIG_PCI_IOV */
220 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
221 pci_channel_state_t);
222 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
223 static void igb_io_resume(struct pci_dev *);
225 static const struct pci_error_handlers igb_err_handler = {
226 .error_detected = igb_io_error_detected,
227 .slot_reset = igb_io_slot_reset,
228 .resume = igb_io_resume,
231 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
233 static struct pci_driver igb_driver = {
234 .name = igb_driver_name,
235 .id_table = igb_pci_tbl,
237 .remove = igb_remove,
239 .driver.pm = &igb_pm_ops,
241 .shutdown = igb_shutdown,
242 .sriov_configure = igb_pci_sriov_configure,
243 .err_handler = &igb_err_handler
246 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
247 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
248 MODULE_LICENSE("GPL");
249 MODULE_VERSION(DRV_VERSION);
251 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
252 static int debug = -1;
253 module_param(debug, int, 0);
254 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
256 struct igb_reg_info {
261 static const struct igb_reg_info igb_reg_info_tbl[] = {
263 /* General Registers */
264 {E1000_CTRL, "CTRL"},
265 {E1000_STATUS, "STATUS"},
266 {E1000_CTRL_EXT, "CTRL_EXT"},
268 /* Interrupt Registers */
272 {E1000_RCTL, "RCTL"},
273 {E1000_RDLEN(0), "RDLEN"},
274 {E1000_RDH(0), "RDH"},
275 {E1000_RDT(0), "RDT"},
276 {E1000_RXDCTL(0), "RXDCTL"},
277 {E1000_RDBAL(0), "RDBAL"},
278 {E1000_RDBAH(0), "RDBAH"},
281 {E1000_TCTL, "TCTL"},
282 {E1000_TDBAL(0), "TDBAL"},
283 {E1000_TDBAH(0), "TDBAH"},
284 {E1000_TDLEN(0), "TDLEN"},
285 {E1000_TDH(0), "TDH"},
286 {E1000_TDT(0), "TDT"},
287 {E1000_TXDCTL(0), "TXDCTL"},
288 {E1000_TDFH, "TDFH"},
289 {E1000_TDFT, "TDFT"},
290 {E1000_TDFHS, "TDFHS"},
291 {E1000_TDFPC, "TDFPC"},
293 /* List Terminator */
297 /* igb_regdump - register printout routine */
298 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
304 switch (reginfo->ofs) {
306 for (n = 0; n < 4; n++)
307 regs[n] = rd32(E1000_RDLEN(n));
310 for (n = 0; n < 4; n++)
311 regs[n] = rd32(E1000_RDH(n));
314 for (n = 0; n < 4; n++)
315 regs[n] = rd32(E1000_RDT(n));
317 case E1000_RXDCTL(0):
318 for (n = 0; n < 4; n++)
319 regs[n] = rd32(E1000_RXDCTL(n));
322 for (n = 0; n < 4; n++)
323 regs[n] = rd32(E1000_RDBAL(n));
326 for (n = 0; n < 4; n++)
327 regs[n] = rd32(E1000_RDBAH(n));
330 for (n = 0; n < 4; n++)
331 regs[n] = rd32(E1000_RDBAL(n));
334 for (n = 0; n < 4; n++)
335 regs[n] = rd32(E1000_TDBAH(n));
338 for (n = 0; n < 4; n++)
339 regs[n] = rd32(E1000_TDLEN(n));
342 for (n = 0; n < 4; n++)
343 regs[n] = rd32(E1000_TDH(n));
346 for (n = 0; n < 4; n++)
347 regs[n] = rd32(E1000_TDT(n));
349 case E1000_TXDCTL(0):
350 for (n = 0; n < 4; n++)
351 regs[n] = rd32(E1000_TXDCTL(n));
354 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
358 snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
359 pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
363 /* igb_dump - Print registers, Tx-rings and Rx-rings */
364 static void igb_dump(struct igb_adapter *adapter)
366 struct net_device *netdev = adapter->netdev;
367 struct e1000_hw *hw = &adapter->hw;
368 struct igb_reg_info *reginfo;
369 struct igb_ring *tx_ring;
370 union e1000_adv_tx_desc *tx_desc;
371 struct my_u0 { u64 a; u64 b; } *u0;
372 struct igb_ring *rx_ring;
373 union e1000_adv_rx_desc *rx_desc;
377 if (!netif_msg_hw(adapter))
380 /* Print netdevice Info */
382 dev_info(&adapter->pdev->dev, "Net device Info\n");
383 pr_info("Device Name state trans_start "
385 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
386 netdev->state, netdev->trans_start, netdev->last_rx);
389 /* Print Registers */
390 dev_info(&adapter->pdev->dev, "Register Dump\n");
391 pr_info(" Register Name Value\n");
392 for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
393 reginfo->name; reginfo++) {
394 igb_regdump(hw, reginfo);
397 /* Print TX Ring Summary */
398 if (!netdev || !netif_running(netdev))
401 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
402 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
403 for (n = 0; n < adapter->num_tx_queues; n++) {
404 struct igb_tx_buffer *buffer_info;
405 tx_ring = adapter->tx_ring[n];
406 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
407 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
408 n, tx_ring->next_to_use, tx_ring->next_to_clean,
409 (u64)dma_unmap_addr(buffer_info, dma),
410 dma_unmap_len(buffer_info, len),
411 buffer_info->next_to_watch,
412 (u64)buffer_info->time_stamp);
416 if (!netif_msg_tx_done(adapter))
417 goto rx_ring_summary;
419 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
421 /* Transmit Descriptor Formats
423 * Advanced Transmit Descriptor
424 * +--------------------------------------------------------------+
425 * 0 | Buffer Address [63:0] |
426 * +--------------------------------------------------------------+
427 * 8 | PAYLEN | PORTS |CC|IDX | STA | DCMD |DTYP|MAC|RSV| DTALEN |
428 * +--------------------------------------------------------------+
429 * 63 46 45 40 39 38 36 35 32 31 24 15 0
432 for (n = 0; n < adapter->num_tx_queues; n++) {
433 tx_ring = adapter->tx_ring[n];
434 pr_info("------------------------------------\n");
435 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
436 pr_info("------------------------------------\n");
437 pr_info("T [desc] [address 63:0 ] [PlPOCIStDDM Ln] "
438 "[bi->dma ] leng ntw timestamp "
441 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
442 const char *next_desc;
443 struct igb_tx_buffer *buffer_info;
444 tx_desc = IGB_TX_DESC(tx_ring, i);
445 buffer_info = &tx_ring->tx_buffer_info[i];
446 u0 = (struct my_u0 *)tx_desc;
447 if (i == tx_ring->next_to_use &&
448 i == tx_ring->next_to_clean)
449 next_desc = " NTC/U";
450 else if (i == tx_ring->next_to_use)
452 else if (i == tx_ring->next_to_clean)
457 pr_info("T [0x%03X] %016llX %016llX %016llX"
458 " %04X %p %016llX %p%s\n", i,
461 (u64)dma_unmap_addr(buffer_info, dma),
462 dma_unmap_len(buffer_info, len),
463 buffer_info->next_to_watch,
464 (u64)buffer_info->time_stamp,
465 buffer_info->skb, next_desc);
467 if (netif_msg_pktdata(adapter) && buffer_info->skb)
468 print_hex_dump(KERN_INFO, "",
470 16, 1, buffer_info->skb->data,
471 dma_unmap_len(buffer_info, len),
476 /* Print RX Rings Summary */
478 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
479 pr_info("Queue [NTU] [NTC]\n");
480 for (n = 0; n < adapter->num_rx_queues; n++) {
481 rx_ring = adapter->rx_ring[n];
482 pr_info(" %5d %5X %5X\n",
483 n, rx_ring->next_to_use, rx_ring->next_to_clean);
487 if (!netif_msg_rx_status(adapter))
490 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
492 /* Advanced Receive Descriptor (Read) Format
494 * +-----------------------------------------------------+
495 * 0 | Packet Buffer Address [63:1] |A0/NSE|
496 * +----------------------------------------------+------+
497 * 8 | Header Buffer Address [63:1] | DD |
498 * +-----------------------------------------------------+
501 * Advanced Receive Descriptor (Write-Back) Format
503 * 63 48 47 32 31 30 21 20 17 16 4 3 0
504 * +------------------------------------------------------+
505 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
506 * | Checksum Ident | | | | Type | Type |
507 * +------------------------------------------------------+
508 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
509 * +------------------------------------------------------+
510 * 63 48 47 32 31 20 19 0
513 for (n = 0; n < adapter->num_rx_queues; n++) {
514 rx_ring = adapter->rx_ring[n];
515 pr_info("------------------------------------\n");
516 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
517 pr_info("------------------------------------\n");
518 pr_info("R [desc] [ PktBuf A0] [ HeadBuf DD] "
519 "[bi->dma ] [bi->skb] <-- Adv Rx Read format\n");
520 pr_info("RWB[desc] [PcsmIpSHl PtRs] [vl er S cks ln] -----"
521 "----------- [bi->skb] <-- Adv Rx Write-Back format\n");
523 for (i = 0; i < rx_ring->count; i++) {
524 const char *next_desc;
525 struct igb_rx_buffer *buffer_info;
526 buffer_info = &rx_ring->rx_buffer_info[i];
527 rx_desc = IGB_RX_DESC(rx_ring, i);
528 u0 = (struct my_u0 *)rx_desc;
529 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
531 if (i == rx_ring->next_to_use)
533 else if (i == rx_ring->next_to_clean)
538 if (staterr & E1000_RXD_STAT_DD) {
539 /* Descriptor Done */
540 pr_info("%s[0x%03X] %016llX %016llX ---------------- %s\n",
546 pr_info("%s[0x%03X] %016llX %016llX %016llX %s\n",
550 (u64)buffer_info->dma,
553 if (netif_msg_pktdata(adapter) &&
554 buffer_info->dma && buffer_info->page) {
555 print_hex_dump(KERN_INFO, "",
558 page_address(buffer_info->page) +
559 buffer_info->page_offset,
571 * igb_get_i2c_data - Reads the I2C SDA data bit
572 * @hw: pointer to hardware structure
573 * @i2cctl: Current value of I2CCTL register
575 * Returns the I2C data bit value
577 static int igb_get_i2c_data(void *data)
579 struct igb_adapter *adapter = (struct igb_adapter *)data;
580 struct e1000_hw *hw = &adapter->hw;
581 s32 i2cctl = rd32(E1000_I2CPARAMS);
583 return ((i2cctl & E1000_I2C_DATA_IN) != 0);
587 * igb_set_i2c_data - Sets the I2C data bit
588 * @data: pointer to hardware structure
589 * @state: I2C data value (0 or 1) to set
591 * Sets the I2C data bit
593 static void igb_set_i2c_data(void *data, int state)
595 struct igb_adapter *adapter = (struct igb_adapter *)data;
596 struct e1000_hw *hw = &adapter->hw;
597 s32 i2cctl = rd32(E1000_I2CPARAMS);
600 i2cctl |= E1000_I2C_DATA_OUT;
602 i2cctl &= ~E1000_I2C_DATA_OUT;
604 i2cctl &= ~E1000_I2C_DATA_OE_N;
605 i2cctl |= E1000_I2C_CLK_OE_N;
606 wr32(E1000_I2CPARAMS, i2cctl);
612 * igb_set_i2c_clk - Sets the I2C SCL clock
613 * @data: pointer to hardware structure
614 * @state: state to set clock
616 * Sets the I2C clock line to state
618 static void igb_set_i2c_clk(void *data, int state)
620 struct igb_adapter *adapter = (struct igb_adapter *)data;
621 struct e1000_hw *hw = &adapter->hw;
622 s32 i2cctl = rd32(E1000_I2CPARAMS);
625 i2cctl |= E1000_I2C_CLK_OUT;
626 i2cctl &= ~E1000_I2C_CLK_OE_N;
628 i2cctl &= ~E1000_I2C_CLK_OUT;
629 i2cctl &= ~E1000_I2C_CLK_OE_N;
631 wr32(E1000_I2CPARAMS, i2cctl);
636 * igb_get_i2c_clk - Gets the I2C SCL clock state
637 * @data: pointer to hardware structure
639 * Gets the I2C clock state
641 static int igb_get_i2c_clk(void *data)
643 struct igb_adapter *adapter = (struct igb_adapter *)data;
644 struct e1000_hw *hw = &adapter->hw;
645 s32 i2cctl = rd32(E1000_I2CPARAMS);
647 return ((i2cctl & E1000_I2C_CLK_IN) != 0);
650 static const struct i2c_algo_bit_data igb_i2c_algo = {
651 .setsda = igb_set_i2c_data,
652 .setscl = igb_set_i2c_clk,
653 .getsda = igb_get_i2c_data,
654 .getscl = igb_get_i2c_clk,
660 * igb_get_hw_dev - return device
661 * @hw: pointer to hardware structure
663 * used by hardware layer to print debugging information
665 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
667 struct igb_adapter *adapter = hw->back;
668 return adapter->netdev;
672 * igb_init_module - Driver Registration Routine
674 * igb_init_module is the first routine called when the driver is
675 * loaded. All it does is register with the PCI subsystem.
677 static int __init igb_init_module(void)
680 pr_info("%s - version %s\n",
681 igb_driver_string, igb_driver_version);
683 pr_info("%s\n", igb_copyright);
685 #ifdef CONFIG_IGB_DCA
686 dca_register_notify(&dca_notifier);
688 ret = pci_register_driver(&igb_driver);
692 module_init(igb_init_module);
695 * igb_exit_module - Driver Exit Cleanup Routine
697 * igb_exit_module is called just before the driver is removed
700 static void __exit igb_exit_module(void)
702 #ifdef CONFIG_IGB_DCA
703 dca_unregister_notify(&dca_notifier);
705 pci_unregister_driver(&igb_driver);
708 module_exit(igb_exit_module);
710 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
712 * igb_cache_ring_register - Descriptor ring to register mapping
713 * @adapter: board private structure to initialize
715 * Once we know the feature-set enabled for the device, we'll cache
716 * the register offset the descriptor ring is assigned to.
718 static void igb_cache_ring_register(struct igb_adapter *adapter)
721 u32 rbase_offset = adapter->vfs_allocated_count;
723 switch (adapter->hw.mac.type) {
725 /* The queues are allocated for virtualization such that VF 0
726 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
727 * In order to avoid collision we start at the first free queue
728 * and continue consuming queues in the same sequence
730 if (adapter->vfs_allocated_count) {
731 for (; i < adapter->rss_queues; i++)
732 adapter->rx_ring[i]->reg_idx = rbase_offset +
741 for (; i < adapter->num_rx_queues; i++)
742 adapter->rx_ring[i]->reg_idx = rbase_offset + i;
743 for (; j < adapter->num_tx_queues; j++)
744 adapter->tx_ring[j]->reg_idx = rbase_offset + j;
750 * igb_write_ivar - configure ivar for given MSI-X vector
751 * @hw: pointer to the HW structure
752 * @msix_vector: vector number we are allocating to a given ring
753 * @index: row index of IVAR register to write within IVAR table
754 * @offset: column offset of in IVAR, should be multiple of 8
756 * This function is intended to handle the writing of the IVAR register
757 * for adapters 82576 and newer. The IVAR table consists of 2 columns,
758 * each containing an cause allocation for an Rx and Tx ring, and a
759 * variable number of rows depending on the number of queues supported.
761 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
762 int index, int offset)
764 u32 ivar = array_rd32(E1000_IVAR0, index);
766 /* clear any bits that are currently set */
767 ivar &= ~((u32)0xFF << offset);
769 /* write vector and valid bit */
770 ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
772 array_wr32(E1000_IVAR0, index, ivar);
775 #define IGB_N0_QUEUE -1
776 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
778 struct igb_adapter *adapter = q_vector->adapter;
779 struct e1000_hw *hw = &adapter->hw;
780 int rx_queue = IGB_N0_QUEUE;
781 int tx_queue = IGB_N0_QUEUE;
784 if (q_vector->rx.ring)
785 rx_queue = q_vector->rx.ring->reg_idx;
786 if (q_vector->tx.ring)
787 tx_queue = q_vector->tx.ring->reg_idx;
789 switch (hw->mac.type) {
791 /* The 82575 assigns vectors using a bitmask, which matches the
792 * bitmask for the EICR/EIMS/EIMC registers. To assign one
793 * or more queues to a vector, we write the appropriate bits
794 * into the MSIXBM register for that vector.
796 if (rx_queue > IGB_N0_QUEUE)
797 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
798 if (tx_queue > IGB_N0_QUEUE)
799 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
800 if (!adapter->msix_entries && msix_vector == 0)
801 msixbm |= E1000_EIMS_OTHER;
802 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
803 q_vector->eims_value = msixbm;
806 /* 82576 uses a table that essentially consists of 2 columns
807 * with 8 rows. The ordering is column-major so we use the
808 * lower 3 bits as the row index, and the 4th bit as the
811 if (rx_queue > IGB_N0_QUEUE)
812 igb_write_ivar(hw, msix_vector,
814 (rx_queue & 0x8) << 1);
815 if (tx_queue > IGB_N0_QUEUE)
816 igb_write_ivar(hw, msix_vector,
818 ((tx_queue & 0x8) << 1) + 8);
819 q_vector->eims_value = 1 << msix_vector;
825 /* On 82580 and newer adapters the scheme is similar to 82576
826 * however instead of ordering column-major we have things
827 * ordered row-major. So we traverse the table by using
828 * bit 0 as the column offset, and the remaining bits as the
831 if (rx_queue > IGB_N0_QUEUE)
832 igb_write_ivar(hw, msix_vector,
834 (rx_queue & 0x1) << 4);
835 if (tx_queue > IGB_N0_QUEUE)
836 igb_write_ivar(hw, msix_vector,
838 ((tx_queue & 0x1) << 4) + 8);
839 q_vector->eims_value = 1 << msix_vector;
846 /* add q_vector eims value to global eims_enable_mask */
847 adapter->eims_enable_mask |= q_vector->eims_value;
849 /* configure q_vector to set itr on first interrupt */
850 q_vector->set_itr = 1;
854 * igb_configure_msix - Configure MSI-X hardware
855 * @adapter: board private structure to initialize
857 * igb_configure_msix sets up the hardware to properly
858 * generate MSI-X interrupts.
860 static void igb_configure_msix(struct igb_adapter *adapter)
864 struct e1000_hw *hw = &adapter->hw;
866 adapter->eims_enable_mask = 0;
868 /* set vector for other causes, i.e. link changes */
869 switch (hw->mac.type) {
871 tmp = rd32(E1000_CTRL_EXT);
872 /* enable MSI-X PBA support*/
873 tmp |= E1000_CTRL_EXT_PBA_CLR;
875 /* Auto-Mask interrupts upon ICR read. */
876 tmp |= E1000_CTRL_EXT_EIAME;
877 tmp |= E1000_CTRL_EXT_IRCA;
879 wr32(E1000_CTRL_EXT, tmp);
881 /* enable msix_other interrupt */
882 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
883 adapter->eims_other = E1000_EIMS_OTHER;
892 /* Turn on MSI-X capability first, or our settings
893 * won't stick. And it will take days to debug.
895 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
896 E1000_GPIE_PBA | E1000_GPIE_EIAME |
899 /* enable msix_other interrupt */
900 adapter->eims_other = 1 << vector;
901 tmp = (vector++ | E1000_IVAR_VALID) << 8;
903 wr32(E1000_IVAR_MISC, tmp);
906 /* do nothing, since nothing else supports MSI-X */
908 } /* switch (hw->mac.type) */
910 adapter->eims_enable_mask |= adapter->eims_other;
912 for (i = 0; i < adapter->num_q_vectors; i++)
913 igb_assign_vector(adapter->q_vector[i], vector++);
919 * igb_request_msix - Initialize MSI-X interrupts
920 * @adapter: board private structure to initialize
922 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
925 static int igb_request_msix(struct igb_adapter *adapter)
927 struct net_device *netdev = adapter->netdev;
928 struct e1000_hw *hw = &adapter->hw;
929 int i, err = 0, vector = 0, free_vector = 0;
931 err = request_irq(adapter->msix_entries[vector].vector,
932 igb_msix_other, 0, netdev->name, adapter);
936 for (i = 0; i < adapter->num_q_vectors; i++) {
937 struct igb_q_vector *q_vector = adapter->q_vector[i];
941 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
943 if (q_vector->rx.ring && q_vector->tx.ring)
944 sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
945 q_vector->rx.ring->queue_index);
946 else if (q_vector->tx.ring)
947 sprintf(q_vector->name, "%s-tx-%u", netdev->name,
948 q_vector->tx.ring->queue_index);
949 else if (q_vector->rx.ring)
950 sprintf(q_vector->name, "%s-rx-%u", netdev->name,
951 q_vector->rx.ring->queue_index);
953 sprintf(q_vector->name, "%s-unused", netdev->name);
955 err = request_irq(adapter->msix_entries[vector].vector,
956 igb_msix_ring, 0, q_vector->name,
962 igb_configure_msix(adapter);
966 /* free already assigned IRQs */
967 free_irq(adapter->msix_entries[free_vector++].vector, adapter);
970 for (i = 0; i < vector; i++) {
971 free_irq(adapter->msix_entries[free_vector++].vector,
972 adapter->q_vector[i]);
978 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
980 if (adapter->msix_entries) {
981 pci_disable_msix(adapter->pdev);
982 kfree(adapter->msix_entries);
983 adapter->msix_entries = NULL;
984 } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
985 pci_disable_msi(adapter->pdev);
990 * igb_free_q_vector - Free memory allocated for specific interrupt vector
991 * @adapter: board private structure to initialize
992 * @v_idx: Index of vector to be freed
994 * This function frees the memory allocated to the q_vector. In addition if
995 * NAPI is enabled it will delete any references to the NAPI struct prior
996 * to freeing the q_vector.
998 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1000 struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1002 if (q_vector->tx.ring)
1003 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1005 if (q_vector->rx.ring)
1006 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
1008 adapter->q_vector[v_idx] = NULL;
1009 netif_napi_del(&q_vector->napi);
1011 /* ixgbe_get_stats64() might access the rings on this vector,
1012 * we must wait a grace period before freeing it.
1014 kfree_rcu(q_vector, rcu);
1018 * igb_free_q_vectors - Free memory allocated for interrupt vectors
1019 * @adapter: board private structure to initialize
1021 * This function frees the memory allocated to the q_vectors. In addition if
1022 * NAPI is enabled it will delete any references to the NAPI struct prior
1023 * to freeing the q_vector.
1025 static void igb_free_q_vectors(struct igb_adapter *adapter)
1027 int v_idx = adapter->num_q_vectors;
1029 adapter->num_tx_queues = 0;
1030 adapter->num_rx_queues = 0;
1031 adapter->num_q_vectors = 0;
1034 igb_free_q_vector(adapter, v_idx);
1038 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1039 * @adapter: board private structure to initialize
1041 * This function resets the device so that it has 0 Rx queues, Tx queues, and
1042 * MSI-X interrupts allocated.
1044 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1046 igb_free_q_vectors(adapter);
1047 igb_reset_interrupt_capability(adapter);
1051 * igb_set_interrupt_capability - set MSI or MSI-X if supported
1052 * @adapter: board private structure to initialize
1053 * @msix: boolean value of MSIX capability
1055 * Attempt to configure interrupts using the best available
1056 * capabilities of the hardware and kernel.
1058 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1066 /* Number of supported queues. */
1067 adapter->num_rx_queues = adapter->rss_queues;
1068 if (adapter->vfs_allocated_count)
1069 adapter->num_tx_queues = 1;
1071 adapter->num_tx_queues = adapter->rss_queues;
1073 /* start with one vector for every Rx queue */
1074 numvecs = adapter->num_rx_queues;
1076 /* if Tx handler is separate add 1 for every Tx queue */
1077 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1078 numvecs += adapter->num_tx_queues;
1080 /* store the number of vectors reserved for queues */
1081 adapter->num_q_vectors = numvecs;
1083 /* add 1 vector for link status interrupts */
1085 adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
1088 if (!adapter->msix_entries)
1091 for (i = 0; i < numvecs; i++)
1092 adapter->msix_entries[i].entry = i;
1094 err = pci_enable_msix(adapter->pdev,
1095 adapter->msix_entries,
1100 igb_reset_interrupt_capability(adapter);
1102 /* If we can't do MSI-X, try MSI */
1104 #ifdef CONFIG_PCI_IOV
1105 /* disable SR-IOV for non MSI-X configurations */
1106 if (adapter->vf_data) {
1107 struct e1000_hw *hw = &adapter->hw;
1108 /* disable iov and allow time for transactions to clear */
1109 pci_disable_sriov(adapter->pdev);
1112 kfree(adapter->vf_data);
1113 adapter->vf_data = NULL;
1114 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1117 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1120 adapter->vfs_allocated_count = 0;
1121 adapter->rss_queues = 1;
1122 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1123 adapter->num_rx_queues = 1;
1124 adapter->num_tx_queues = 1;
1125 adapter->num_q_vectors = 1;
1126 if (!pci_enable_msi(adapter->pdev))
1127 adapter->flags |= IGB_FLAG_HAS_MSI;
1130 static void igb_add_ring(struct igb_ring *ring,
1131 struct igb_ring_container *head)
1138 * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1139 * @adapter: board private structure to initialize
1140 * @v_count: q_vectors allocated on adapter, used for ring interleaving
1141 * @v_idx: index of vector in adapter struct
1142 * @txr_count: total number of Tx rings to allocate
1143 * @txr_idx: index of first Tx ring to allocate
1144 * @rxr_count: total number of Rx rings to allocate
1145 * @rxr_idx: index of first Rx ring to allocate
1147 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1149 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1150 int v_count, int v_idx,
1151 int txr_count, int txr_idx,
1152 int rxr_count, int rxr_idx)
1154 struct igb_q_vector *q_vector;
1155 struct igb_ring *ring;
1156 int ring_count, size;
1158 /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1159 if (txr_count > 1 || rxr_count > 1)
1162 ring_count = txr_count + rxr_count;
1163 size = sizeof(struct igb_q_vector) +
1164 (sizeof(struct igb_ring) * ring_count);
1166 /* allocate q_vector and rings */
1167 q_vector = kzalloc(size, GFP_KERNEL);
1171 /* initialize NAPI */
1172 netif_napi_add(adapter->netdev, &q_vector->napi,
1175 /* tie q_vector and adapter together */
1176 adapter->q_vector[v_idx] = q_vector;
1177 q_vector->adapter = adapter;
1179 /* initialize work limits */
1180 q_vector->tx.work_limit = adapter->tx_work_limit;
1182 /* initialize ITR configuration */
1183 q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1184 q_vector->itr_val = IGB_START_ITR;
1186 /* initialize pointer to rings */
1187 ring = q_vector->ring;
1191 /* rx or rx/tx vector */
1192 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1193 q_vector->itr_val = adapter->rx_itr_setting;
1195 /* tx only vector */
1196 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1197 q_vector->itr_val = adapter->tx_itr_setting;
1201 /* assign generic ring traits */
1202 ring->dev = &adapter->pdev->dev;
1203 ring->netdev = adapter->netdev;
1205 /* configure backlink on ring */
1206 ring->q_vector = q_vector;
1208 /* update q_vector Tx values */
1209 igb_add_ring(ring, &q_vector->tx);
1211 /* For 82575, context index must be unique per ring. */
1212 if (adapter->hw.mac.type == e1000_82575)
1213 set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1215 /* apply Tx specific ring traits */
1216 ring->count = adapter->tx_ring_count;
1217 ring->queue_index = txr_idx;
1219 /* assign ring to adapter */
1220 adapter->tx_ring[txr_idx] = ring;
1222 /* push pointer to next ring */
1227 /* assign generic ring traits */
1228 ring->dev = &adapter->pdev->dev;
1229 ring->netdev = adapter->netdev;
1231 /* configure backlink on ring */
1232 ring->q_vector = q_vector;
1234 /* update q_vector Rx values */
1235 igb_add_ring(ring, &q_vector->rx);
1237 /* set flag indicating ring supports SCTP checksum offload */
1238 if (adapter->hw.mac.type >= e1000_82576)
1239 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1241 /* On i350, i210, and i211, loopback VLAN packets
1242 * have the tag byte-swapped.
1244 if (adapter->hw.mac.type >= e1000_i350)
1245 set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1247 /* apply Rx specific ring traits */
1248 ring->count = adapter->rx_ring_count;
1249 ring->queue_index = rxr_idx;
1251 /* assign ring to adapter */
1252 adapter->rx_ring[rxr_idx] = ring;
1260 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1261 * @adapter: board private structure to initialize
1263 * We allocate one q_vector per queue interrupt. If allocation fails we
1266 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1268 int q_vectors = adapter->num_q_vectors;
1269 int rxr_remaining = adapter->num_rx_queues;
1270 int txr_remaining = adapter->num_tx_queues;
1271 int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1274 if (q_vectors >= (rxr_remaining + txr_remaining)) {
1275 for (; rxr_remaining; v_idx++) {
1276 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1282 /* update counts and index */
1288 for (; v_idx < q_vectors; v_idx++) {
1289 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1290 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1291 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1292 tqpv, txr_idx, rqpv, rxr_idx);
1297 /* update counts and index */
1298 rxr_remaining -= rqpv;
1299 txr_remaining -= tqpv;
1307 adapter->num_tx_queues = 0;
1308 adapter->num_rx_queues = 0;
1309 adapter->num_q_vectors = 0;
1312 igb_free_q_vector(adapter, v_idx);
1318 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1319 * @adapter: board private structure to initialize
1320 * @msix: boolean value of MSIX capability
1322 * This function initializes the interrupts and allocates all of the queues.
1324 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1326 struct pci_dev *pdev = adapter->pdev;
1329 igb_set_interrupt_capability(adapter, msix);
1331 err = igb_alloc_q_vectors(adapter);
1333 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1334 goto err_alloc_q_vectors;
1337 igb_cache_ring_register(adapter);
1341 err_alloc_q_vectors:
1342 igb_reset_interrupt_capability(adapter);
1347 * igb_request_irq - initialize interrupts
1348 * @adapter: board private structure to initialize
1350 * Attempts to configure interrupts using the best available
1351 * capabilities of the hardware and kernel.
1353 static int igb_request_irq(struct igb_adapter *adapter)
1355 struct net_device *netdev = adapter->netdev;
1356 struct pci_dev *pdev = adapter->pdev;
1359 if (adapter->msix_entries) {
1360 err = igb_request_msix(adapter);
1363 /* fall back to MSI */
1364 igb_free_all_tx_resources(adapter);
1365 igb_free_all_rx_resources(adapter);
1367 igb_clear_interrupt_scheme(adapter);
1368 err = igb_init_interrupt_scheme(adapter, false);
1372 igb_setup_all_tx_resources(adapter);
1373 igb_setup_all_rx_resources(adapter);
1374 igb_configure(adapter);
1377 igb_assign_vector(adapter->q_vector[0], 0);
1379 if (adapter->flags & IGB_FLAG_HAS_MSI) {
1380 err = request_irq(pdev->irq, igb_intr_msi, 0,
1381 netdev->name, adapter);
1385 /* fall back to legacy interrupts */
1386 igb_reset_interrupt_capability(adapter);
1387 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1390 err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1391 netdev->name, adapter);
1394 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1401 static void igb_free_irq(struct igb_adapter *adapter)
1403 if (adapter->msix_entries) {
1406 free_irq(adapter->msix_entries[vector++].vector, adapter);
1408 for (i = 0; i < adapter->num_q_vectors; i++)
1409 free_irq(adapter->msix_entries[vector++].vector,
1410 adapter->q_vector[i]);
1412 free_irq(adapter->pdev->irq, adapter);
1417 * igb_irq_disable - Mask off interrupt generation on the NIC
1418 * @adapter: board private structure
1420 static void igb_irq_disable(struct igb_adapter *adapter)
1422 struct e1000_hw *hw = &adapter->hw;
1424 /* we need to be careful when disabling interrupts. The VFs are also
1425 * mapped into these registers and so clearing the bits can cause
1426 * issues on the VF drivers so we only need to clear what we set
1428 if (adapter->msix_entries) {
1429 u32 regval = rd32(E1000_EIAM);
1430 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1431 wr32(E1000_EIMC, adapter->eims_enable_mask);
1432 regval = rd32(E1000_EIAC);
1433 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1437 wr32(E1000_IMC, ~0);
1439 if (adapter->msix_entries) {
1441 for (i = 0; i < adapter->num_q_vectors; i++)
1442 synchronize_irq(adapter->msix_entries[i].vector);
1444 synchronize_irq(adapter->pdev->irq);
1449 * igb_irq_enable - Enable default interrupt generation settings
1450 * @adapter: board private structure
1452 static void igb_irq_enable(struct igb_adapter *adapter)
1454 struct e1000_hw *hw = &adapter->hw;
1456 if (adapter->msix_entries) {
1457 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1458 u32 regval = rd32(E1000_EIAC);
1459 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1460 regval = rd32(E1000_EIAM);
1461 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1462 wr32(E1000_EIMS, adapter->eims_enable_mask);
1463 if (adapter->vfs_allocated_count) {
1464 wr32(E1000_MBVFIMR, 0xFF);
1465 ims |= E1000_IMS_VMMB;
1467 wr32(E1000_IMS, ims);
1469 wr32(E1000_IMS, IMS_ENABLE_MASK |
1471 wr32(E1000_IAM, IMS_ENABLE_MASK |
1476 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1478 struct e1000_hw *hw = &adapter->hw;
1479 u16 vid = adapter->hw.mng_cookie.vlan_id;
1480 u16 old_vid = adapter->mng_vlan_id;
1482 if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1483 /* add VID to filter table */
1484 igb_vfta_set(hw, vid, true);
1485 adapter->mng_vlan_id = vid;
1487 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1490 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1492 !test_bit(old_vid, adapter->active_vlans)) {
1493 /* remove VID from filter table */
1494 igb_vfta_set(hw, old_vid, false);
1499 * igb_release_hw_control - release control of the h/w to f/w
1500 * @adapter: address of board private structure
1502 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1503 * For ASF and Pass Through versions of f/w this means that the
1504 * driver is no longer loaded.
1506 static void igb_release_hw_control(struct igb_adapter *adapter)
1508 struct e1000_hw *hw = &adapter->hw;
1511 /* Let firmware take over control of h/w */
1512 ctrl_ext = rd32(E1000_CTRL_EXT);
1513 wr32(E1000_CTRL_EXT,
1514 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1518 * igb_get_hw_control - get control of the h/w from f/w
1519 * @adapter: address of board private structure
1521 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1522 * For ASF and Pass Through versions of f/w this means that
1523 * the driver is loaded.
1525 static void igb_get_hw_control(struct igb_adapter *adapter)
1527 struct e1000_hw *hw = &adapter->hw;
1530 /* Let firmware know the driver has taken over */
1531 ctrl_ext = rd32(E1000_CTRL_EXT);
1532 wr32(E1000_CTRL_EXT,
1533 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1537 * igb_configure - configure the hardware for RX and TX
1538 * @adapter: private board structure
1540 static void igb_configure(struct igb_adapter *adapter)
1542 struct net_device *netdev = adapter->netdev;
1545 igb_get_hw_control(adapter);
1546 igb_set_rx_mode(netdev);
1548 igb_restore_vlan(adapter);
1550 igb_setup_tctl(adapter);
1551 igb_setup_mrqc(adapter);
1552 igb_setup_rctl(adapter);
1554 igb_configure_tx(adapter);
1555 igb_configure_rx(adapter);
1557 igb_rx_fifo_flush_82575(&adapter->hw);
1559 /* call igb_desc_unused which always leaves
1560 * at least 1 descriptor unused to make sure
1561 * next_to_use != next_to_clean
1563 for (i = 0; i < adapter->num_rx_queues; i++) {
1564 struct igb_ring *ring = adapter->rx_ring[i];
1565 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1570 * igb_power_up_link - Power up the phy/serdes link
1571 * @adapter: address of board private structure
1573 void igb_power_up_link(struct igb_adapter *adapter)
1575 igb_reset_phy(&adapter->hw);
1577 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1578 igb_power_up_phy_copper(&adapter->hw);
1580 igb_power_up_serdes_link_82575(&adapter->hw);
1584 * igb_power_down_link - Power down the phy/serdes link
1585 * @adapter: address of board private structure
1587 static void igb_power_down_link(struct igb_adapter *adapter)
1589 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1590 igb_power_down_phy_copper_82575(&adapter->hw);
1592 igb_shutdown_serdes_link_82575(&adapter->hw);
1596 * igb_up - Open the interface and prepare it to handle traffic
1597 * @adapter: board private structure
1599 int igb_up(struct igb_adapter *adapter)
1601 struct e1000_hw *hw = &adapter->hw;
1604 /* hardware has been reset, we need to reload some things */
1605 igb_configure(adapter);
1607 clear_bit(__IGB_DOWN, &adapter->state);
1609 for (i = 0; i < adapter->num_q_vectors; i++)
1610 napi_enable(&(adapter->q_vector[i]->napi));
1612 if (adapter->msix_entries)
1613 igb_configure_msix(adapter);
1615 igb_assign_vector(adapter->q_vector[0], 0);
1617 /* Clear any pending interrupts. */
1619 igb_irq_enable(adapter);
1621 /* notify VFs that reset has been completed */
1622 if (adapter->vfs_allocated_count) {
1623 u32 reg_data = rd32(E1000_CTRL_EXT);
1624 reg_data |= E1000_CTRL_EXT_PFRSTD;
1625 wr32(E1000_CTRL_EXT, reg_data);
1628 netif_tx_start_all_queues(adapter->netdev);
1630 /* start the watchdog. */
1631 hw->mac.get_link_status = 1;
1632 schedule_work(&adapter->watchdog_task);
1637 void igb_down(struct igb_adapter *adapter)
1639 struct net_device *netdev = adapter->netdev;
1640 struct e1000_hw *hw = &adapter->hw;
1644 /* signal that we're down so the interrupt handler does not
1645 * reschedule our watchdog timer
1647 set_bit(__IGB_DOWN, &adapter->state);
1649 /* disable receives in the hardware */
1650 rctl = rd32(E1000_RCTL);
1651 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1652 /* flush and sleep below */
1654 netif_tx_stop_all_queues(netdev);
1656 /* disable transmits in the hardware */
1657 tctl = rd32(E1000_TCTL);
1658 tctl &= ~E1000_TCTL_EN;
1659 wr32(E1000_TCTL, tctl);
1660 /* flush both disables and wait for them to finish */
1664 for (i = 0; i < adapter->num_q_vectors; i++)
1665 napi_disable(&(adapter->q_vector[i]->napi));
1667 igb_irq_disable(adapter);
1669 del_timer_sync(&adapter->watchdog_timer);
1670 del_timer_sync(&adapter->phy_info_timer);
1672 netif_carrier_off(netdev);
1674 /* record the stats before reset*/
1675 spin_lock(&adapter->stats64_lock);
1676 igb_update_stats(adapter, &adapter->stats64);
1677 spin_unlock(&adapter->stats64_lock);
1679 adapter->link_speed = 0;
1680 adapter->link_duplex = 0;
1682 if (!pci_channel_offline(adapter->pdev))
1684 igb_clean_all_tx_rings(adapter);
1685 igb_clean_all_rx_rings(adapter);
1686 #ifdef CONFIG_IGB_DCA
1688 /* since we reset the hardware DCA settings were cleared */
1689 igb_setup_dca(adapter);
1693 void igb_reinit_locked(struct igb_adapter *adapter)
1695 WARN_ON(in_interrupt());
1696 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1700 clear_bit(__IGB_RESETTING, &adapter->state);
1703 void igb_reset(struct igb_adapter *adapter)
1705 struct pci_dev *pdev = adapter->pdev;
1706 struct e1000_hw *hw = &adapter->hw;
1707 struct e1000_mac_info *mac = &hw->mac;
1708 struct e1000_fc_info *fc = &hw->fc;
1709 u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1711 /* Repartition Pba for greater than 9k mtu
1712 * To take effect CTRL.RST is required.
1714 switch (mac->type) {
1717 pba = rd32(E1000_RXPBS);
1718 pba = igb_rxpbs_adjust_82580(pba);
1721 pba = rd32(E1000_RXPBS);
1722 pba &= E1000_RXPBS_SIZE_MASK_82576;
1728 pba = E1000_PBA_34K;
1732 if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1733 (mac->type < e1000_82576)) {
1734 /* adjust PBA for jumbo frames */
1735 wr32(E1000_PBA, pba);
1737 /* To maintain wire speed transmits, the Tx FIFO should be
1738 * large enough to accommodate two full transmit packets,
1739 * rounded up to the next 1KB and expressed in KB. Likewise,
1740 * the Rx FIFO should be large enough to accommodate at least
1741 * one full receive packet and is similarly rounded up and
1744 pba = rd32(E1000_PBA);
1745 /* upper 16 bits has Tx packet buffer allocation size in KB */
1746 tx_space = pba >> 16;
1747 /* lower 16 bits has Rx packet buffer allocation size in KB */
1749 /* the Tx fifo also stores 16 bytes of information about the Tx
1750 * but don't include ethernet FCS because hardware appends it
1752 min_tx_space = (adapter->max_frame_size +
1753 sizeof(union e1000_adv_tx_desc) -
1755 min_tx_space = ALIGN(min_tx_space, 1024);
1756 min_tx_space >>= 10;
1757 /* software strips receive CRC, so leave room for it */
1758 min_rx_space = adapter->max_frame_size;
1759 min_rx_space = ALIGN(min_rx_space, 1024);
1760 min_rx_space >>= 10;
1762 /* If current Tx allocation is less than the min Tx FIFO size,
1763 * and the min Tx FIFO size is less than the current Rx FIFO
1764 * allocation, take space away from current Rx allocation
1766 if (tx_space < min_tx_space &&
1767 ((min_tx_space - tx_space) < pba)) {
1768 pba = pba - (min_tx_space - tx_space);
1770 /* if short on Rx space, Rx wins and must trump Tx
1773 if (pba < min_rx_space)
1776 wr32(E1000_PBA, pba);
1779 /* flow control settings */
1780 /* The high water mark must be low enough to fit one full frame
1781 * (or the size used for early receive) above it in the Rx FIFO.
1782 * Set it to the lower of:
1783 * - 90% of the Rx FIFO size, or
1784 * - the full Rx FIFO size minus one full frame
1786 hwm = min(((pba << 10) * 9 / 10),
1787 ((pba << 10) - 2 * adapter->max_frame_size));
1789 fc->high_water = hwm & 0xFFFFFFF0; /* 16-byte granularity */
1790 fc->low_water = fc->high_water - 16;
1791 fc->pause_time = 0xFFFF;
1793 fc->current_mode = fc->requested_mode;
1795 /* disable receive for all VFs and wait one second */
1796 if (adapter->vfs_allocated_count) {
1798 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1799 adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1801 /* ping all the active vfs to let them know we are going down */
1802 igb_ping_all_vfs(adapter);
1804 /* disable transmits and receives */
1805 wr32(E1000_VFRE, 0);
1806 wr32(E1000_VFTE, 0);
1809 /* Allow time for pending master requests to run */
1810 hw->mac.ops.reset_hw(hw);
1813 if (hw->mac.ops.init_hw(hw))
1814 dev_err(&pdev->dev, "Hardware Error\n");
1816 /* Flow control settings reset on hardware reset, so guarantee flow
1817 * control is off when forcing speed.
1819 if (!hw->mac.autoneg)
1820 igb_force_mac_fc(hw);
1822 igb_init_dmac(adapter, pba);
1823 #ifdef CONFIG_IGB_HWMON
1824 /* Re-initialize the thermal sensor on i350 devices. */
1825 if (!test_bit(__IGB_DOWN, &adapter->state)) {
1826 if (mac->type == e1000_i350 && hw->bus.func == 0) {
1827 /* If present, re-initialize the external thermal sensor
1831 mac->ops.init_thermal_sensor_thresh(hw);
1835 if (!netif_running(adapter->netdev))
1836 igb_power_down_link(adapter);
1838 igb_update_mng_vlan(adapter);
1840 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1841 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
1843 /* Re-enable PTP, where applicable. */
1844 igb_ptp_reset(adapter);
1846 igb_get_phy_info(hw);
1849 static netdev_features_t igb_fix_features(struct net_device *netdev,
1850 netdev_features_t features)
1852 /* Since there is no support for separate Rx/Tx vlan accel
1853 * enable/disable make sure Tx flag is always in same state as Rx.
1855 if (features & NETIF_F_HW_VLAN_RX)
1856 features |= NETIF_F_HW_VLAN_TX;
1858 features &= ~NETIF_F_HW_VLAN_TX;
1863 static int igb_set_features(struct net_device *netdev,
1864 netdev_features_t features)
1866 netdev_features_t changed = netdev->features ^ features;
1867 struct igb_adapter *adapter = netdev_priv(netdev);
1869 if (changed & NETIF_F_HW_VLAN_RX)
1870 igb_vlan_mode(netdev, features);
1872 if (!(changed & NETIF_F_RXALL))
1875 netdev->features = features;
1877 if (netif_running(netdev))
1878 igb_reinit_locked(adapter);
1885 static const struct net_device_ops igb_netdev_ops = {
1886 .ndo_open = igb_open,
1887 .ndo_stop = igb_close,
1888 .ndo_start_xmit = igb_xmit_frame,
1889 .ndo_get_stats64 = igb_get_stats64,
1890 .ndo_set_rx_mode = igb_set_rx_mode,
1891 .ndo_set_mac_address = igb_set_mac,
1892 .ndo_change_mtu = igb_change_mtu,
1893 .ndo_do_ioctl = igb_ioctl,
1894 .ndo_tx_timeout = igb_tx_timeout,
1895 .ndo_validate_addr = eth_validate_addr,
1896 .ndo_vlan_rx_add_vid = igb_vlan_rx_add_vid,
1897 .ndo_vlan_rx_kill_vid = igb_vlan_rx_kill_vid,
1898 .ndo_set_vf_mac = igb_ndo_set_vf_mac,
1899 .ndo_set_vf_vlan = igb_ndo_set_vf_vlan,
1900 .ndo_set_vf_tx_rate = igb_ndo_set_vf_bw,
1901 .ndo_set_vf_spoofchk = igb_ndo_set_vf_spoofchk,
1902 .ndo_get_vf_config = igb_ndo_get_vf_config,
1903 #ifdef CONFIG_NET_POLL_CONTROLLER
1904 .ndo_poll_controller = igb_netpoll,
1906 .ndo_fix_features = igb_fix_features,
1907 .ndo_set_features = igb_set_features,
1911 * igb_set_fw_version - Configure version string for ethtool
1912 * @adapter: adapter struct
1914 void igb_set_fw_version(struct igb_adapter *adapter)
1916 struct e1000_hw *hw = &adapter->hw;
1917 struct e1000_fw_version fw;
1919 igb_get_fw_version(hw, &fw);
1921 switch (hw->mac.type) {
1923 snprintf(adapter->fw_version, sizeof(adapter->fw_version),
1925 fw.invm_major, fw.invm_minor, fw.invm_img_type);
1929 /* if option is rom valid, display its version too */
1931 snprintf(adapter->fw_version,
1932 sizeof(adapter->fw_version),
1933 "%d.%d, 0x%08x, %d.%d.%d",
1934 fw.eep_major, fw.eep_minor, fw.etrack_id,
1935 fw.or_major, fw.or_build, fw.or_patch);
1938 snprintf(adapter->fw_version,
1939 sizeof(adapter->fw_version),
1941 fw.eep_major, fw.eep_minor, fw.etrack_id);
1949 * igb_init_i2c - Init I2C interface
1950 * @adapter: pointer to adapter structure
1952 static s32 igb_init_i2c(struct igb_adapter *adapter)
1954 s32 status = E1000_SUCCESS;
1956 /* I2C interface supported on i350 devices */
1957 if (adapter->hw.mac.type != e1000_i350)
1958 return E1000_SUCCESS;
1960 /* Initialize the i2c bus which is controlled by the registers.
1961 * This bus will use the i2c_algo_bit structue that implements
1962 * the protocol through toggling of the 4 bits in the register.
1964 adapter->i2c_adap.owner = THIS_MODULE;
1965 adapter->i2c_algo = igb_i2c_algo;
1966 adapter->i2c_algo.data = adapter;
1967 adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1968 adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1969 strlcpy(adapter->i2c_adap.name, "igb BB",
1970 sizeof(adapter->i2c_adap.name));
1971 status = i2c_bit_add_bus(&adapter->i2c_adap);
1976 * igb_probe - Device Initialization Routine
1977 * @pdev: PCI device information struct
1978 * @ent: entry in igb_pci_tbl
1980 * Returns 0 on success, negative on failure
1982 * igb_probe initializes an adapter identified by a pci_dev structure.
1983 * The OS initialization, configuring of the adapter private structure,
1984 * and a hardware reset occur.
1986 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1988 struct net_device *netdev;
1989 struct igb_adapter *adapter;
1990 struct e1000_hw *hw;
1991 u16 eeprom_data = 0;
1993 static int global_quad_port_a; /* global quad port a indication */
1994 const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
1995 unsigned long mmio_start, mmio_len;
1996 int err, pci_using_dac;
1997 u8 part_str[E1000_PBANUM_LENGTH];
1999 /* Catch broken hardware that put the wrong VF device ID in
2000 * the PCIe SR-IOV capability.
2002 if (pdev->is_virtfn) {
2003 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2004 pci_name(pdev), pdev->vendor, pdev->device);
2008 err = pci_enable_device_mem(pdev);
2013 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
2015 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
2019 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
2021 err = dma_set_coherent_mask(&pdev->dev,
2025 "No usable DMA configuration, aborting\n");
2031 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
2037 pci_enable_pcie_error_reporting(pdev);
2039 pci_set_master(pdev);
2040 pci_save_state(pdev);
2043 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2046 goto err_alloc_etherdev;
2048 SET_NETDEV_DEV(netdev, &pdev->dev);
2050 pci_set_drvdata(pdev, netdev);
2051 adapter = netdev_priv(netdev);
2052 adapter->netdev = netdev;
2053 adapter->pdev = pdev;
2056 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2058 mmio_start = pci_resource_start(pdev, 0);
2059 mmio_len = pci_resource_len(pdev, 0);
2062 hw->hw_addr = ioremap(mmio_start, mmio_len);
2066 netdev->netdev_ops = &igb_netdev_ops;
2067 igb_set_ethtool_ops(netdev);
2068 netdev->watchdog_timeo = 5 * HZ;
2070 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2072 netdev->mem_start = mmio_start;
2073 netdev->mem_end = mmio_start + mmio_len;
2075 /* PCI config space info */
2076 hw->vendor_id = pdev->vendor;
2077 hw->device_id = pdev->device;
2078 hw->revision_id = pdev->revision;
2079 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2080 hw->subsystem_device_id = pdev->subsystem_device;
2082 /* Copy the default MAC, PHY and NVM function pointers */
2083 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2084 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2085 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2086 /* Initialize skew-specific constants */
2087 err = ei->get_invariants(hw);
2091 /* setup the private structure */
2092 err = igb_sw_init(adapter);
2096 igb_get_bus_info_pcie(hw);
2098 hw->phy.autoneg_wait_to_complete = false;
2100 /* Copper options */
2101 if (hw->phy.media_type == e1000_media_type_copper) {
2102 hw->phy.mdix = AUTO_ALL_MODES;
2103 hw->phy.disable_polarity_correction = false;
2104 hw->phy.ms_type = e1000_ms_hw_default;
2107 if (igb_check_reset_block(hw))
2108 dev_info(&pdev->dev,
2109 "PHY reset is blocked due to SOL/IDER session.\n");
2111 /* features is initialized to 0 in allocation, it might have bits
2112 * set by igb_sw_init so we should use an or instead of an
2115 netdev->features |= NETIF_F_SG |
2122 NETIF_F_HW_VLAN_RX |
2125 /* copy netdev features into list of user selectable features */
2126 netdev->hw_features |= netdev->features;
2127 netdev->hw_features |= NETIF_F_RXALL;
2129 /* set this bit last since it cannot be part of hw_features */
2130 netdev->features |= NETIF_F_HW_VLAN_FILTER;
2132 netdev->vlan_features |= NETIF_F_TSO |
2138 netdev->priv_flags |= IFF_SUPP_NOFCS;
2140 if (pci_using_dac) {
2141 netdev->features |= NETIF_F_HIGHDMA;
2142 netdev->vlan_features |= NETIF_F_HIGHDMA;
2145 if (hw->mac.type >= e1000_82576) {
2146 netdev->hw_features |= NETIF_F_SCTP_CSUM;
2147 netdev->features |= NETIF_F_SCTP_CSUM;
2150 netdev->priv_flags |= IFF_UNICAST_FLT;
2152 adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2154 /* before reading the NVM, reset the controller to put the device in a
2155 * known good starting state
2157 hw->mac.ops.reset_hw(hw);
2159 /* make sure the NVM is good , i211 parts have special NVM that
2160 * doesn't contain a checksum
2162 if (hw->mac.type != e1000_i211) {
2163 if (hw->nvm.ops.validate(hw) < 0) {
2164 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2170 /* copy the MAC address out of the NVM */
2171 if (hw->mac.ops.read_mac_addr(hw))
2172 dev_err(&pdev->dev, "NVM Read Error\n");
2174 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2176 if (!is_valid_ether_addr(netdev->dev_addr)) {
2177 dev_err(&pdev->dev, "Invalid MAC Address\n");
2182 /* get firmware version for ethtool -i */
2183 igb_set_fw_version(adapter);
2185 setup_timer(&adapter->watchdog_timer, igb_watchdog,
2186 (unsigned long) adapter);
2187 setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2188 (unsigned long) adapter);
2190 INIT_WORK(&adapter->reset_task, igb_reset_task);
2191 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2193 /* Initialize link properties that are user-changeable */
2194 adapter->fc_autoneg = true;
2195 hw->mac.autoneg = true;
2196 hw->phy.autoneg_advertised = 0x2f;
2198 hw->fc.requested_mode = e1000_fc_default;
2199 hw->fc.current_mode = e1000_fc_default;
2201 igb_validate_mdi_setting(hw);
2203 /* By default, support wake on port A */
2204 if (hw->bus.func == 0)
2205 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2207 /* Check the NVM for wake support on non-port A ports */
2208 if (hw->mac.type >= e1000_82580)
2209 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2210 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2212 else if (hw->bus.func == 1)
2213 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2215 if (eeprom_data & IGB_EEPROM_APME)
2216 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2218 /* now that we have the eeprom settings, apply the special cases where
2219 * the eeprom may be wrong or the board simply won't support wake on
2220 * lan on a particular port
2222 switch (pdev->device) {
2223 case E1000_DEV_ID_82575GB_QUAD_COPPER:
2224 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2226 case E1000_DEV_ID_82575EB_FIBER_SERDES:
2227 case E1000_DEV_ID_82576_FIBER:
2228 case E1000_DEV_ID_82576_SERDES:
2229 /* Wake events only supported on port A for dual fiber
2230 * regardless of eeprom setting
2232 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2233 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2235 case E1000_DEV_ID_82576_QUAD_COPPER:
2236 case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2237 /* if quad port adapter, disable WoL on all but port A */
2238 if (global_quad_port_a != 0)
2239 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2241 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2242 /* Reset for multiple quad port adapters */
2243 if (++global_quad_port_a == 4)
2244 global_quad_port_a = 0;
2247 /* If the device can't wake, don't set software support */
2248 if (!device_can_wakeup(&adapter->pdev->dev))
2249 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2252 /* initialize the wol settings based on the eeprom settings */
2253 if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2254 adapter->wol |= E1000_WUFC_MAG;
2256 /* Some vendors want WoL disabled by default, but still supported */
2257 if ((hw->mac.type == e1000_i350) &&
2258 (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2259 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2263 device_set_wakeup_enable(&adapter->pdev->dev,
2264 adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2266 /* reset the hardware with the new settings */
2269 /* Init the I2C interface */
2270 err = igb_init_i2c(adapter);
2272 dev_err(&pdev->dev, "failed to init i2c interface\n");
2276 /* let the f/w know that the h/w is now under the control of the
2278 igb_get_hw_control(adapter);
2280 strcpy(netdev->name, "eth%d");
2281 err = register_netdev(netdev);
2285 /* carrier off reporting is important to ethtool even BEFORE open */
2286 netif_carrier_off(netdev);
2288 #ifdef CONFIG_IGB_DCA
2289 if (dca_add_requester(&pdev->dev) == 0) {
2290 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2291 dev_info(&pdev->dev, "DCA enabled\n");
2292 igb_setup_dca(adapter);
2296 #ifdef CONFIG_IGB_HWMON
2297 /* Initialize the thermal sensor on i350 devices. */
2298 if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2301 /* Read the NVM to determine if this i350 device supports an
2302 * external thermal sensor.
2304 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2305 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2306 adapter->ets = true;
2308 adapter->ets = false;
2309 if (igb_sysfs_init(adapter))
2311 "failed to allocate sysfs resources\n");
2313 adapter->ets = false;
2316 /* do hw tstamp init after resetting */
2317 igb_ptp_init(adapter);
2319 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2320 /* print bus type/speed/width info */
2321 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2323 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2324 (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2326 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
2327 (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
2328 (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
2332 ret_val = igb_read_part_string(hw, part_str, E1000_PBANUM_LENGTH);
2334 strcpy(part_str, "Unknown");
2335 dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2336 dev_info(&pdev->dev,
2337 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2338 adapter->msix_entries ? "MSI-X" :
2339 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2340 adapter->num_rx_queues, adapter->num_tx_queues);
2341 switch (hw->mac.type) {
2345 igb_set_eee_i350(hw);
2351 pm_runtime_put_noidle(&pdev->dev);
2355 igb_release_hw_control(adapter);
2356 memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2358 if (!igb_check_reset_block(hw))
2361 if (hw->flash_address)
2362 iounmap(hw->flash_address);
2364 igb_clear_interrupt_scheme(adapter);
2365 iounmap(hw->hw_addr);
2367 free_netdev(netdev);
2369 pci_release_selected_regions(pdev,
2370 pci_select_bars(pdev, IORESOURCE_MEM));
2373 pci_disable_device(pdev);
2377 #ifdef CONFIG_PCI_IOV
2378 static int igb_disable_sriov(struct pci_dev *pdev)
2380 struct net_device *netdev = pci_get_drvdata(pdev);
2381 struct igb_adapter *adapter = netdev_priv(netdev);
2382 struct e1000_hw *hw = &adapter->hw;
2384 /* reclaim resources allocated to VFs */
2385 if (adapter->vf_data) {
2386 /* disable iov and allow time for transactions to clear */
2387 if (igb_vfs_are_assigned(adapter)) {
2388 dev_warn(&pdev->dev,
2389 "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2392 pci_disable_sriov(pdev);
2396 kfree(adapter->vf_data);
2397 adapter->vf_data = NULL;
2398 adapter->vfs_allocated_count = 0;
2399 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2402 dev_info(&pdev->dev, "IOV Disabled\n");
2404 /* Re-enable DMA Coalescing flag since IOV is turned off */
2405 adapter->flags |= IGB_FLAG_DMAC;
2411 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2413 struct net_device *netdev = pci_get_drvdata(pdev);
2414 struct igb_adapter *adapter = netdev_priv(netdev);
2415 int old_vfs = pci_num_vf(pdev);
2421 else if (old_vfs && old_vfs == num_vfs)
2423 else if (old_vfs && old_vfs != num_vfs)
2424 err = igb_disable_sriov(pdev);
2434 adapter->vfs_allocated_count = num_vfs;
2436 adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2437 sizeof(struct vf_data_storage), GFP_KERNEL);
2439 /* if allocation failed then we do not support SR-IOV */
2440 if (!adapter->vf_data) {
2441 adapter->vfs_allocated_count = 0;
2443 "Unable to allocate memory for VF Data Storage\n");
2448 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2452 dev_info(&pdev->dev, "%d VFs allocated\n",
2453 adapter->vfs_allocated_count);
2454 for (i = 0; i < adapter->vfs_allocated_count; i++)
2455 igb_vf_configure(adapter, i);
2457 /* DMA Coalescing is not supported in IOV mode. */
2458 adapter->flags &= ~IGB_FLAG_DMAC;
2462 kfree(adapter->vf_data);
2463 adapter->vf_data = NULL;
2464 adapter->vfs_allocated_count = 0;
2471 * igb_remove_i2c - Cleanup I2C interface
2472 * @adapter: pointer to adapter structure
2474 static void igb_remove_i2c(struct igb_adapter *adapter)
2476 /* free the adapter bus structure */
2477 i2c_del_adapter(&adapter->i2c_adap);
2481 * igb_remove - Device Removal Routine
2482 * @pdev: PCI device information struct
2484 * igb_remove is called by the PCI subsystem to alert the driver
2485 * that it should release a PCI device. The could be caused by a
2486 * Hot-Plug event, or because the driver is going to be removed from
2489 static void igb_remove(struct pci_dev *pdev)
2491 struct net_device *netdev = pci_get_drvdata(pdev);
2492 struct igb_adapter *adapter = netdev_priv(netdev);
2493 struct e1000_hw *hw = &adapter->hw;
2495 pm_runtime_get_noresume(&pdev->dev);
2496 #ifdef CONFIG_IGB_HWMON
2497 igb_sysfs_exit(adapter);
2499 igb_remove_i2c(adapter);
2500 igb_ptp_stop(adapter);
2501 /* The watchdog timer may be rescheduled, so explicitly
2502 * disable watchdog from being rescheduled.
2504 set_bit(__IGB_DOWN, &adapter->state);
2505 del_timer_sync(&adapter->watchdog_timer);
2506 del_timer_sync(&adapter->phy_info_timer);
2508 cancel_work_sync(&adapter->reset_task);
2509 cancel_work_sync(&adapter->watchdog_task);
2511 #ifdef CONFIG_IGB_DCA
2512 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2513 dev_info(&pdev->dev, "DCA disabled\n");
2514 dca_remove_requester(&pdev->dev);
2515 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2516 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2520 /* Release control of h/w to f/w. If f/w is AMT enabled, this
2521 * would have already happened in close and is redundant.
2523 igb_release_hw_control(adapter);
2525 unregister_netdev(netdev);
2527 igb_clear_interrupt_scheme(adapter);
2529 #ifdef CONFIG_PCI_IOV
2530 igb_disable_sriov(pdev);
2533 iounmap(hw->hw_addr);
2534 if (hw->flash_address)
2535 iounmap(hw->flash_address);
2536 pci_release_selected_regions(pdev,
2537 pci_select_bars(pdev, IORESOURCE_MEM));
2539 kfree(adapter->shadow_vfta);
2540 free_netdev(netdev);
2542 pci_disable_pcie_error_reporting(pdev);
2544 pci_disable_device(pdev);
2548 * igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2549 * @adapter: board private structure to initialize
2551 * This function initializes the vf specific data storage and then attempts to
2552 * allocate the VFs. The reason for ordering it this way is because it is much
2553 * mor expensive time wise to disable SR-IOV than it is to allocate and free
2554 * the memory for the VFs.
2556 static void igb_probe_vfs(struct igb_adapter *adapter)
2558 #ifdef CONFIG_PCI_IOV
2559 struct pci_dev *pdev = adapter->pdev;
2560 struct e1000_hw *hw = &adapter->hw;
2562 /* Virtualization features not supported on i210 family. */
2563 if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2566 pci_sriov_set_totalvfs(pdev, 7);
2567 igb_enable_sriov(pdev, max_vfs);
2569 #endif /* CONFIG_PCI_IOV */
2572 static void igb_init_queue_configuration(struct igb_adapter *adapter)
2574 struct e1000_hw *hw = &adapter->hw;
2577 /* Determine the maximum number of RSS queues supported. */
2578 switch (hw->mac.type) {
2580 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
2584 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
2587 /* I350 cannot do RSS and SR-IOV at the same time */
2588 if (!!adapter->vfs_allocated_count) {
2594 if (!!adapter->vfs_allocated_count) {
2601 max_rss_queues = IGB_MAX_RX_QUEUES;
2605 adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
2607 /* Determine if we need to pair queues. */
2608 switch (hw->mac.type) {
2611 /* Device supports enough interrupts without queue pairing. */
2614 /* If VFs are going to be allocated with RSS queues then we
2615 * should pair the queues in order to conserve interrupts due
2616 * to limited supply.
2618 if ((adapter->rss_queues > 1) &&
2619 (adapter->vfs_allocated_count > 6))
2620 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2626 /* If rss_queues > half of max_rss_queues, pair the queues in
2627 * order to conserve interrupts due to limited supply.
2629 if (adapter->rss_queues > (max_rss_queues / 2))
2630 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2636 * igb_sw_init - Initialize general software structures (struct igb_adapter)
2637 * @adapter: board private structure to initialize
2639 * igb_sw_init initializes the Adapter private data structure.
2640 * Fields are initialized based on PCI device information and
2641 * OS network device settings (MTU size).
2643 static int igb_sw_init(struct igb_adapter *adapter)
2645 struct e1000_hw *hw = &adapter->hw;
2646 struct net_device *netdev = adapter->netdev;
2647 struct pci_dev *pdev = adapter->pdev;
2649 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
2651 /* set default ring sizes */
2652 adapter->tx_ring_count = IGB_DEFAULT_TXD;
2653 adapter->rx_ring_count = IGB_DEFAULT_RXD;
2655 /* set default ITR values */
2656 adapter->rx_itr_setting = IGB_DEFAULT_ITR;
2657 adapter->tx_itr_setting = IGB_DEFAULT_ITR;
2659 /* set default work limits */
2660 adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
2662 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
2664 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2666 spin_lock_init(&adapter->stats64_lock);
2667 #ifdef CONFIG_PCI_IOV
2668 switch (hw->mac.type) {
2672 dev_warn(&pdev->dev,
2673 "Maximum of 7 VFs per PF, using max\n");
2674 max_vfs = adapter->vfs_allocated_count = 7;
2676 adapter->vfs_allocated_count = max_vfs;
2677 if (adapter->vfs_allocated_count)
2678 dev_warn(&pdev->dev,
2679 "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
2684 #endif /* CONFIG_PCI_IOV */
2686 igb_init_queue_configuration(adapter);
2688 /* Setup and initialize a copy of the hw vlan table array */
2689 adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
2692 /* This call may decrease the number of queues */
2693 if (igb_init_interrupt_scheme(adapter, true)) {
2694 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
2698 igb_probe_vfs(adapter);
2700 /* Explicitly disable IRQ since the NIC can be in any state. */
2701 igb_irq_disable(adapter);
2703 if (hw->mac.type >= e1000_i350)
2704 adapter->flags &= ~IGB_FLAG_DMAC;
2706 set_bit(__IGB_DOWN, &adapter->state);
2711 * igb_open - Called when a network interface is made active
2712 * @netdev: network interface device structure
2714 * Returns 0 on success, negative value on failure
2716 * The open entry point is called when a network interface is made
2717 * active by the system (IFF_UP). At this point all resources needed
2718 * for transmit and receive operations are allocated, the interrupt
2719 * handler is registered with the OS, the watchdog timer is started,
2720 * and the stack is notified that the interface is ready.
2722 static int __igb_open(struct net_device *netdev, bool resuming)
2724 struct igb_adapter *adapter = netdev_priv(netdev);
2725 struct e1000_hw *hw = &adapter->hw;
2726 struct pci_dev *pdev = adapter->pdev;
2730 /* disallow open during test */
2731 if (test_bit(__IGB_TESTING, &adapter->state)) {
2737 pm_runtime_get_sync(&pdev->dev);
2739 netif_carrier_off(netdev);
2741 /* allocate transmit descriptors */
2742 err = igb_setup_all_tx_resources(adapter);
2746 /* allocate receive descriptors */
2747 err = igb_setup_all_rx_resources(adapter);
2751 igb_power_up_link(adapter);
2753 /* before we allocate an interrupt, we must be ready to handle it.
2754 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
2755 * as soon as we call pci_request_irq, so we have to setup our
2756 * clean_rx handler before we do so.
2758 igb_configure(adapter);
2760 err = igb_request_irq(adapter);
2764 /* Notify the stack of the actual queue counts. */
2765 err = netif_set_real_num_tx_queues(adapter->netdev,
2766 adapter->num_tx_queues);
2768 goto err_set_queues;
2770 err = netif_set_real_num_rx_queues(adapter->netdev,
2771 adapter->num_rx_queues);
2773 goto err_set_queues;
2775 /* From here on the code is the same as igb_up() */
2776 clear_bit(__IGB_DOWN, &adapter->state);
2778 for (i = 0; i < adapter->num_q_vectors; i++)
2779 napi_enable(&(adapter->q_vector[i]->napi));
2781 /* Clear any pending interrupts. */
2784 igb_irq_enable(adapter);
2786 /* notify VFs that reset has been completed */
2787 if (adapter->vfs_allocated_count) {
2788 u32 reg_data = rd32(E1000_CTRL_EXT);
2789 reg_data |= E1000_CTRL_EXT_PFRSTD;
2790 wr32(E1000_CTRL_EXT, reg_data);
2793 netif_tx_start_all_queues(netdev);
2796 pm_runtime_put(&pdev->dev);
2798 /* start the watchdog. */
2799 hw->mac.get_link_status = 1;
2800 schedule_work(&adapter->watchdog_task);
2805 igb_free_irq(adapter);
2807 igb_release_hw_control(adapter);
2808 igb_power_down_link(adapter);
2809 igb_free_all_rx_resources(adapter);
2811 igb_free_all_tx_resources(adapter);
2815 pm_runtime_put(&pdev->dev);
2820 static int igb_open(struct net_device *netdev)
2822 return __igb_open(netdev, false);
2826 * igb_close - Disables a network interface
2827 * @netdev: network interface device structure
2829 * Returns 0, this is not allowed to fail
2831 * The close entry point is called when an interface is de-activated
2832 * by the OS. The hardware is still under the driver's control, but
2833 * needs to be disabled. A global MAC reset is issued to stop the
2834 * hardware, and all transmit and receive resources are freed.
2836 static int __igb_close(struct net_device *netdev, bool suspending)
2838 struct igb_adapter *adapter = netdev_priv(netdev);
2839 struct pci_dev *pdev = adapter->pdev;
2841 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
2844 pm_runtime_get_sync(&pdev->dev);
2847 igb_free_irq(adapter);
2849 igb_free_all_tx_resources(adapter);
2850 igb_free_all_rx_resources(adapter);
2853 pm_runtime_put_sync(&pdev->dev);
2857 static int igb_close(struct net_device *netdev)
2859 return __igb_close(netdev, false);
2863 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
2864 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2866 * Return 0 on success, negative on failure
2868 int igb_setup_tx_resources(struct igb_ring *tx_ring)
2870 struct device *dev = tx_ring->dev;
2873 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
2875 tx_ring->tx_buffer_info = vzalloc(size);
2876 if (!tx_ring->tx_buffer_info)
2879 /* round up to nearest 4K */
2880 tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
2881 tx_ring->size = ALIGN(tx_ring->size, 4096);
2883 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
2884 &tx_ring->dma, GFP_KERNEL);
2888 tx_ring->next_to_use = 0;
2889 tx_ring->next_to_clean = 0;
2894 vfree(tx_ring->tx_buffer_info);
2895 tx_ring->tx_buffer_info = NULL;
2896 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
2901 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
2902 * (Descriptors) for all queues
2903 * @adapter: board private structure
2905 * Return 0 on success, negative on failure
2907 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
2909 struct pci_dev *pdev = adapter->pdev;
2912 for (i = 0; i < adapter->num_tx_queues; i++) {
2913 err = igb_setup_tx_resources(adapter->tx_ring[i]);
2916 "Allocation for Tx Queue %u failed\n", i);
2917 for (i--; i >= 0; i--)
2918 igb_free_tx_resources(adapter->tx_ring[i]);
2927 * igb_setup_tctl - configure the transmit control registers
2928 * @adapter: Board private structure
2930 void igb_setup_tctl(struct igb_adapter *adapter)
2932 struct e1000_hw *hw = &adapter->hw;
2935 /* disable queue 0 which is enabled by default on 82575 and 82576 */
2936 wr32(E1000_TXDCTL(0), 0);
2938 /* Program the Transmit Control Register */
2939 tctl = rd32(E1000_TCTL);
2940 tctl &= ~E1000_TCTL_CT;
2941 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2942 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2944 igb_config_collision_dist(hw);
2946 /* Enable transmits */
2947 tctl |= E1000_TCTL_EN;
2949 wr32(E1000_TCTL, tctl);
2953 * igb_configure_tx_ring - Configure transmit ring after Reset
2954 * @adapter: board private structure
2955 * @ring: tx ring to configure
2957 * Configure a transmit ring after a reset.
2959 void igb_configure_tx_ring(struct igb_adapter *adapter,
2960 struct igb_ring *ring)
2962 struct e1000_hw *hw = &adapter->hw;
2964 u64 tdba = ring->dma;
2965 int reg_idx = ring->reg_idx;
2967 /* disable the queue */
2968 wr32(E1000_TXDCTL(reg_idx), 0);
2972 wr32(E1000_TDLEN(reg_idx),
2973 ring->count * sizeof(union e1000_adv_tx_desc));
2974 wr32(E1000_TDBAL(reg_idx),
2975 tdba & 0x00000000ffffffffULL);
2976 wr32(E1000_TDBAH(reg_idx), tdba >> 32);
2978 ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
2979 wr32(E1000_TDH(reg_idx), 0);
2980 writel(0, ring->tail);
2982 txdctl |= IGB_TX_PTHRESH;
2983 txdctl |= IGB_TX_HTHRESH << 8;
2984 txdctl |= IGB_TX_WTHRESH << 16;
2986 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
2987 wr32(E1000_TXDCTL(reg_idx), txdctl);
2991 * igb_configure_tx - Configure transmit Unit after Reset
2992 * @adapter: board private structure
2994 * Configure the Tx unit of the MAC after a reset.
2996 static void igb_configure_tx(struct igb_adapter *adapter)
3000 for (i = 0; i < adapter->num_tx_queues; i++)
3001 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3005 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3006 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
3008 * Returns 0 on success, negative on failure
3010 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3012 struct device *dev = rx_ring->dev;
3015 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3017 rx_ring->rx_buffer_info = vzalloc(size);
3018 if (!rx_ring->rx_buffer_info)
3021 /* Round up to nearest 4K */
3022 rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3023 rx_ring->size = ALIGN(rx_ring->size, 4096);
3025 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3026 &rx_ring->dma, GFP_KERNEL);
3030 rx_ring->next_to_alloc = 0;
3031 rx_ring->next_to_clean = 0;
3032 rx_ring->next_to_use = 0;
3037 vfree(rx_ring->rx_buffer_info);
3038 rx_ring->rx_buffer_info = NULL;
3039 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3044 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3045 * (Descriptors) for all queues
3046 * @adapter: board private structure
3048 * Return 0 on success, negative on failure
3050 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3052 struct pci_dev *pdev = adapter->pdev;
3055 for (i = 0; i < adapter->num_rx_queues; i++) {
3056 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3059 "Allocation for Rx Queue %u failed\n", i);
3060 for (i--; i >= 0; i--)
3061 igb_free_rx_resources(adapter->rx_ring[i]);
3070 * igb_setup_mrqc - configure the multiple receive queue control registers
3071 * @adapter: Board private structure
3073 static void igb_setup_mrqc(struct igb_adapter *adapter)
3075 struct e1000_hw *hw = &adapter->hw;
3077 u32 j, num_rx_queues, shift = 0;
3078 static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3079 0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3080 0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3083 /* Fill out hash function seeds */
3084 for (j = 0; j < 10; j++)
3085 wr32(E1000_RSSRK(j), rsskey[j]);
3087 num_rx_queues = adapter->rss_queues;
3089 switch (hw->mac.type) {
3094 /* 82576 supports 2 RSS queues for SR-IOV */
3095 if (adapter->vfs_allocated_count) {
3104 /* Populate the indirection table 4 entries at a time. To do this
3105 * we are generating the results for n and n+2 and then interleaving
3106 * those with the results with n+1 and n+3.
3108 for (j = 0; j < 32; j++) {
3109 /* first pass generates n and n+2 */
3110 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
3111 u32 reta = (base & 0x07800780) >> (7 - shift);
3113 /* second pass generates n+1 and n+3 */
3114 base += 0x00010001 * num_rx_queues;
3115 reta |= (base & 0x07800780) << (1 + shift);
3117 wr32(E1000_RETA(j), reta);
3120 /* Disable raw packet checksumming so that RSS hash is placed in
3121 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
3122 * offloads as they are enabled by default
3124 rxcsum = rd32(E1000_RXCSUM);
3125 rxcsum |= E1000_RXCSUM_PCSD;
3127 if (adapter->hw.mac.type >= e1000_82576)
3128 /* Enable Receive Checksum Offload for SCTP */
3129 rxcsum |= E1000_RXCSUM_CRCOFL;
3131 /* Don't need to set TUOFL or IPOFL, they default to 1 */
3132 wr32(E1000_RXCSUM, rxcsum);
3134 /* Generate RSS hash based on packet types, TCP/UDP
3135 * port numbers and/or IPv4/v6 src and dst addresses
3137 mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3138 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3139 E1000_MRQC_RSS_FIELD_IPV6 |
3140 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3141 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3143 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3144 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3145 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3146 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3148 /* If VMDq is enabled then we set the appropriate mode for that, else
3149 * we default to RSS so that an RSS hash is calculated per packet even
3150 * if we are only using one queue
3152 if (adapter->vfs_allocated_count) {
3153 if (hw->mac.type > e1000_82575) {
3154 /* Set the default pool for the PF's first queue */
3155 u32 vtctl = rd32(E1000_VT_CTL);
3156 vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3157 E1000_VT_CTL_DISABLE_DEF_POOL);
3158 vtctl |= adapter->vfs_allocated_count <<
3159 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3160 wr32(E1000_VT_CTL, vtctl);
3162 if (adapter->rss_queues > 1)
3163 mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3165 mrqc |= E1000_MRQC_ENABLE_VMDQ;
3167 if (hw->mac.type != e1000_i211)
3168 mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3170 igb_vmm_control(adapter);
3172 wr32(E1000_MRQC, mrqc);
3176 * igb_setup_rctl - configure the receive control registers
3177 * @adapter: Board private structure
3179 void igb_setup_rctl(struct igb_adapter *adapter)
3181 struct e1000_hw *hw = &adapter->hw;
3184 rctl = rd32(E1000_RCTL);
3186 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3187 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3189 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3190 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3192 /* enable stripping of CRC. It's unlikely this will break BMC
3193 * redirection as it did with e1000. Newer features require
3194 * that the HW strips the CRC.
3196 rctl |= E1000_RCTL_SECRC;
3198 /* disable store bad packets and clear size bits. */
3199 rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3201 /* enable LPE to prevent packets larger than max_frame_size */
3202 rctl |= E1000_RCTL_LPE;
3204 /* disable queue 0 to prevent tail write w/o re-config */
3205 wr32(E1000_RXDCTL(0), 0);
3207 /* Attention!!! For SR-IOV PF driver operations you must enable
3208 * queue drop for all VF and PF queues to prevent head of line blocking
3209 * if an un-trusted VF does not provide descriptors to hardware.
3211 if (adapter->vfs_allocated_count) {
3212 /* set all queue drop enable bits */
3213 wr32(E1000_QDE, ALL_QUEUES);
3216 /* This is useful for sniffing bad packets. */
3217 if (adapter->netdev->features & NETIF_F_RXALL) {
3218 /* UPE and MPE will be handled by normal PROMISC logic
3219 * in e1000e_set_rx_mode
3221 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3222 E1000_RCTL_BAM | /* RX All Bcast Pkts */
3223 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3225 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3226 E1000_RCTL_DPF | /* Allow filtered pause */
3227 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3228 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3229 * and that breaks VLANs.
3233 wr32(E1000_RCTL, rctl);
3236 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3239 struct e1000_hw *hw = &adapter->hw;
3242 /* if it isn't the PF check to see if VFs are enabled and
3243 * increase the size to support vlan tags
3245 if (vfn < adapter->vfs_allocated_count &&
3246 adapter->vf_data[vfn].vlans_enabled)
3247 size += VLAN_TAG_SIZE;
3249 vmolr = rd32(E1000_VMOLR(vfn));
3250 vmolr &= ~E1000_VMOLR_RLPML_MASK;
3251 vmolr |= size | E1000_VMOLR_LPE;
3252 wr32(E1000_VMOLR(vfn), vmolr);
3258 * igb_rlpml_set - set maximum receive packet size
3259 * @adapter: board private structure
3261 * Configure maximum receivable packet size.
3263 static void igb_rlpml_set(struct igb_adapter *adapter)
3265 u32 max_frame_size = adapter->max_frame_size;
3266 struct e1000_hw *hw = &adapter->hw;
3267 u16 pf_id = adapter->vfs_allocated_count;
3270 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3271 /* If we're in VMDQ or SR-IOV mode, then set global RLPML
3272 * to our max jumbo frame size, in case we need to enable
3273 * jumbo frames on one of the rings later.
3274 * This will not pass over-length frames into the default
3275 * queue because it's gated by the VMOLR.RLPML.
3277 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3280 wr32(E1000_RLPML, max_frame_size);
3283 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3286 struct e1000_hw *hw = &adapter->hw;
3289 /* This register exists only on 82576 and newer so if we are older then
3290 * we should exit and do nothing
3292 if (hw->mac.type < e1000_82576)
3295 vmolr = rd32(E1000_VMOLR(vfn));
3296 vmolr |= E1000_VMOLR_STRVLAN; /* Strip vlan tags */
3298 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3300 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3302 /* clear all bits that might not be set */
3303 vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3305 if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3306 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3307 /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3310 if (vfn <= adapter->vfs_allocated_count)
3311 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3313 wr32(E1000_VMOLR(vfn), vmolr);
3317 * igb_configure_rx_ring - Configure a receive ring after Reset
3318 * @adapter: board private structure
3319 * @ring: receive ring to be configured
3321 * Configure the Rx unit of the MAC after a reset.
3323 void igb_configure_rx_ring(struct igb_adapter *adapter,
3324 struct igb_ring *ring)
3326 struct e1000_hw *hw = &adapter->hw;
3327 u64 rdba = ring->dma;
3328 int reg_idx = ring->reg_idx;
3329 u32 srrctl = 0, rxdctl = 0;
3331 /* disable the queue */
3332 wr32(E1000_RXDCTL(reg_idx), 0);
3334 /* Set DMA base address registers */
3335 wr32(E1000_RDBAL(reg_idx),
3336 rdba & 0x00000000ffffffffULL);
3337 wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3338 wr32(E1000_RDLEN(reg_idx),
3339 ring->count * sizeof(union e1000_adv_rx_desc));
3341 /* initialize head and tail */
3342 ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3343 wr32(E1000_RDH(reg_idx), 0);
3344 writel(0, ring->tail);
3346 /* set descriptor configuration */
3347 srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3348 srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3349 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3350 if (hw->mac.type >= e1000_82580)
3351 srrctl |= E1000_SRRCTL_TIMESTAMP;
3352 /* Only set Drop Enable if we are supporting multiple queues */
3353 if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3354 srrctl |= E1000_SRRCTL_DROP_EN;
3356 wr32(E1000_SRRCTL(reg_idx), srrctl);
3358 /* set filtering for VMDQ pools */
3359 igb_set_vmolr(adapter, reg_idx & 0x7, true);
3361 rxdctl |= IGB_RX_PTHRESH;
3362 rxdctl |= IGB_RX_HTHRESH << 8;
3363 rxdctl |= IGB_RX_WTHRESH << 16;
3365 /* enable receive descriptor fetching */
3366 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3367 wr32(E1000_RXDCTL(reg_idx), rxdctl);
3370 static void igb_set_rx_buffer_len(struct igb_adapter *adapter,
3371 struct igb_ring *rx_ring)
3373 #define IGB_MAX_BUILD_SKB_SIZE \
3374 (SKB_WITH_OVERHEAD(IGB_RX_BUFSZ) - \
3375 (NET_SKB_PAD + NET_IP_ALIGN + IGB_TS_HDR_LEN))
3377 /* set build_skb flag */
3378 if (adapter->max_frame_size <= IGB_MAX_BUILD_SKB_SIZE)
3379 set_ring_build_skb_enabled(rx_ring);
3381 clear_ring_build_skb_enabled(rx_ring);
3385 * igb_configure_rx - Configure receive Unit after Reset
3386 * @adapter: board private structure
3388 * Configure the Rx unit of the MAC after a reset.
3390 static void igb_configure_rx(struct igb_adapter *adapter)
3394 /* set UTA to appropriate mode */
3395 igb_set_uta(adapter);
3397 /* set the correct pool for the PF default MAC address in entry 0 */
3398 igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3399 adapter->vfs_allocated_count);
3401 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3402 * the Base and Length of the Rx Descriptor Ring
3404 for (i = 0; i < adapter->num_rx_queues; i++) {
3405 struct igb_ring *rx_ring = adapter->rx_ring[i];
3406 igb_set_rx_buffer_len(adapter, rx_ring);
3407 igb_configure_rx_ring(adapter, rx_ring);
3412 * igb_free_tx_resources - Free Tx Resources per Queue
3413 * @tx_ring: Tx descriptor ring for a specific queue
3415 * Free all transmit software resources
3417 void igb_free_tx_resources(struct igb_ring *tx_ring)
3419 igb_clean_tx_ring(tx_ring);
3421 vfree(tx_ring->tx_buffer_info);
3422 tx_ring->tx_buffer_info = NULL;
3424 /* if not set, then don't free */
3428 dma_free_coherent(tx_ring->dev, tx_ring->size,
3429 tx_ring->desc, tx_ring->dma);
3431 tx_ring->desc = NULL;
3435 * igb_free_all_tx_resources - Free Tx Resources for All Queues
3436 * @adapter: board private structure
3438 * Free all transmit software resources
3440 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3444 for (i = 0; i < adapter->num_tx_queues; i++)
3445 igb_free_tx_resources(adapter->tx_ring[i]);
3448 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3449 struct igb_tx_buffer *tx_buffer)
3451 if (tx_buffer->skb) {
3452 dev_kfree_skb_any(tx_buffer->skb);
3453 if (dma_unmap_len(tx_buffer, len))
3454 dma_unmap_single(ring->dev,
3455 dma_unmap_addr(tx_buffer, dma),
3456 dma_unmap_len(tx_buffer, len),
3458 } else if (dma_unmap_len(tx_buffer, len)) {
3459 dma_unmap_page(ring->dev,
3460 dma_unmap_addr(tx_buffer, dma),
3461 dma_unmap_len(tx_buffer, len),
3464 tx_buffer->next_to_watch = NULL;
3465 tx_buffer->skb = NULL;
3466 dma_unmap_len_set(tx_buffer, len, 0);
3467 /* buffer_info must be completely set up in the transmit path */
3471 * igb_clean_tx_ring - Free Tx Buffers
3472 * @tx_ring: ring to be cleaned
3474 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3476 struct igb_tx_buffer *buffer_info;
3480 if (!tx_ring->tx_buffer_info)
3482 /* Free all the Tx ring sk_buffs */
3484 for (i = 0; i < tx_ring->count; i++) {
3485 buffer_info = &tx_ring->tx_buffer_info[i];
3486 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3489 netdev_tx_reset_queue(txring_txq(tx_ring));
3491 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3492 memset(tx_ring->tx_buffer_info, 0, size);
3494 /* Zero out the descriptor ring */
3495 memset(tx_ring->desc, 0, tx_ring->size);
3497 tx_ring->next_to_use = 0;
3498 tx_ring->next_to_clean = 0;
3502 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
3503 * @adapter: board private structure
3505 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3509 for (i = 0; i < adapter->num_tx_queues; i++)
3510 igb_clean_tx_ring(adapter->tx_ring[i]);
3514 * igb_free_rx_resources - Free Rx Resources
3515 * @rx_ring: ring to clean the resources from
3517 * Free all receive software resources
3519 void igb_free_rx_resources(struct igb_ring *rx_ring)
3521 igb_clean_rx_ring(rx_ring);
3523 vfree(rx_ring->rx_buffer_info);
3524 rx_ring->rx_buffer_info = NULL;
3526 /* if not set, then don't free */
3530 dma_free_coherent(rx_ring->dev, rx_ring->size,
3531 rx_ring->desc, rx_ring->dma);
3533 rx_ring->desc = NULL;
3537 * igb_free_all_rx_resources - Free Rx Resources for All Queues
3538 * @adapter: board private structure
3540 * Free all receive software resources
3542 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3546 for (i = 0; i < adapter->num_rx_queues; i++)
3547 igb_free_rx_resources(adapter->rx_ring[i]);
3551 * igb_clean_rx_ring - Free Rx Buffers per Queue
3552 * @rx_ring: ring to free buffers from
3554 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3560 dev_kfree_skb(rx_ring->skb);
3561 rx_ring->skb = NULL;
3563 if (!rx_ring->rx_buffer_info)
3566 /* Free all the Rx ring sk_buffs */
3567 for (i = 0; i < rx_ring->count; i++) {
3568 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
3570 if (!buffer_info->page)
3573 dma_unmap_page(rx_ring->dev,
3577 __free_page(buffer_info->page);
3579 buffer_info->page = NULL;
3582 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3583 memset(rx_ring->rx_buffer_info, 0, size);
3585 /* Zero out the descriptor ring */
3586 memset(rx_ring->desc, 0, rx_ring->size);
3588 rx_ring->next_to_alloc = 0;
3589 rx_ring->next_to_clean = 0;
3590 rx_ring->next_to_use = 0;
3594 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
3595 * @adapter: board private structure
3597 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3601 for (i = 0; i < adapter->num_rx_queues; i++)
3602 igb_clean_rx_ring(adapter->rx_ring[i]);
3606 * igb_set_mac - Change the Ethernet Address of the NIC
3607 * @netdev: network interface device structure
3608 * @p: pointer to an address structure
3610 * Returns 0 on success, negative on failure
3612 static int igb_set_mac(struct net_device *netdev, void *p)
3614 struct igb_adapter *adapter = netdev_priv(netdev);
3615 struct e1000_hw *hw = &adapter->hw;
3616 struct sockaddr *addr = p;
3618 if (!is_valid_ether_addr(addr->sa_data))
3619 return -EADDRNOTAVAIL;
3621 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3622 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3624 /* set the correct pool for the new PF MAC address in entry 0 */
3625 igb_rar_set_qsel(adapter, hw->mac.addr, 0,
3626 adapter->vfs_allocated_count);
3632 * igb_write_mc_addr_list - write multicast addresses to MTA
3633 * @netdev: network interface device structure
3635 * Writes multicast address list to the MTA hash table.
3636 * Returns: -ENOMEM on failure
3637 * 0 on no addresses written
3638 * X on writing X addresses to MTA
3640 static int igb_write_mc_addr_list(struct net_device *netdev)
3642 struct igb_adapter *adapter = netdev_priv(netdev);
3643 struct e1000_hw *hw = &adapter->hw;
3644 struct netdev_hw_addr *ha;
3648 if (netdev_mc_empty(netdev)) {
3649 /* nothing to program, so clear mc list */
3650 igb_update_mc_addr_list(hw, NULL, 0);
3651 igb_restore_vf_multicasts(adapter);
3655 mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
3659 /* The shared function expects a packed array of only addresses. */
3661 netdev_for_each_mc_addr(ha, netdev)
3662 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3664 igb_update_mc_addr_list(hw, mta_list, i);
3667 return netdev_mc_count(netdev);
3671 * igb_write_uc_addr_list - write unicast addresses to RAR table
3672 * @netdev: network interface device structure
3674 * Writes unicast address list to the RAR table.
3675 * Returns: -ENOMEM on failure/insufficient address space
3676 * 0 on no addresses written
3677 * X on writing X addresses to the RAR table
3679 static int igb_write_uc_addr_list(struct net_device *netdev)
3681 struct igb_adapter *adapter = netdev_priv(netdev);
3682 struct e1000_hw *hw = &adapter->hw;
3683 unsigned int vfn = adapter->vfs_allocated_count;
3684 unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
3687 /* return ENOMEM indicating insufficient memory for addresses */
3688 if (netdev_uc_count(netdev) > rar_entries)
3691 if (!netdev_uc_empty(netdev) && rar_entries) {
3692 struct netdev_hw_addr *ha;
3694 netdev_for_each_uc_addr(ha, netdev) {
3697 igb_rar_set_qsel(adapter, ha->addr,
3703 /* write the addresses in reverse order to avoid write combining */
3704 for (; rar_entries > 0 ; rar_entries--) {
3705 wr32(E1000_RAH(rar_entries), 0);
3706 wr32(E1000_RAL(rar_entries), 0);
3714 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
3715 * @netdev: network interface device structure
3717 * The set_rx_mode entry point is called whenever the unicast or multicast
3718 * address lists or the network interface flags are updated. This routine is
3719 * responsible for configuring the hardware for proper unicast, multicast,
3720 * promiscuous mode, and all-multi behavior.
3722 static void igb_set_rx_mode(struct net_device *netdev)
3724 struct igb_adapter *adapter = netdev_priv(netdev);
3725 struct e1000_hw *hw = &adapter->hw;
3726 unsigned int vfn = adapter->vfs_allocated_count;
3727 u32 rctl, vmolr = 0;
3730 /* Check for Promiscuous and All Multicast modes */
3731 rctl = rd32(E1000_RCTL);
3733 /* clear the effected bits */
3734 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
3736 if (netdev->flags & IFF_PROMISC) {
3737 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3738 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
3740 if (netdev->flags & IFF_ALLMULTI) {
3741 rctl |= E1000_RCTL_MPE;
3742 vmolr |= E1000_VMOLR_MPME;
3744 /* Write addresses to the MTA, if the attempt fails
3745 * then we should just turn on promiscuous mode so
3746 * that we can at least receive multicast traffic
3748 count = igb_write_mc_addr_list(netdev);
3750 rctl |= E1000_RCTL_MPE;
3751 vmolr |= E1000_VMOLR_MPME;
3753 vmolr |= E1000_VMOLR_ROMPE;
3756 /* Write addresses to available RAR registers, if there is not
3757 * sufficient space to store all the addresses then enable
3758 * unicast promiscuous mode
3760 count = igb_write_uc_addr_list(netdev);
3762 rctl |= E1000_RCTL_UPE;
3763 vmolr |= E1000_VMOLR_ROPE;
3765 rctl |= E1000_RCTL_VFE;
3767 wr32(E1000_RCTL, rctl);
3769 /* In order to support SR-IOV and eventually VMDq it is necessary to set
3770 * the VMOLR to enable the appropriate modes. Without this workaround
3771 * we will have issues with VLAN tag stripping not being done for frames
3772 * that are only arriving because we are the default pool
3774 if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
3777 vmolr |= rd32(E1000_VMOLR(vfn)) &
3778 ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
3779 wr32(E1000_VMOLR(vfn), vmolr);
3780 igb_restore_vf_multicasts(adapter);
3783 static void igb_check_wvbr(struct igb_adapter *adapter)
3785 struct e1000_hw *hw = &adapter->hw;
3788 switch (hw->mac.type) {
3791 if (!(wvbr = rd32(E1000_WVBR)))
3798 adapter->wvbr |= wvbr;
3801 #define IGB_STAGGERED_QUEUE_OFFSET 8
3803 static void igb_spoof_check(struct igb_adapter *adapter)
3810 for(j = 0; j < adapter->vfs_allocated_count; j++) {
3811 if (adapter->wvbr & (1 << j) ||
3812 adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
3813 dev_warn(&adapter->pdev->dev,
3814 "Spoof event(s) detected on VF %d\n", j);
3817 (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
3822 /* Need to wait a few seconds after link up to get diagnostic information from
3825 static void igb_update_phy_info(unsigned long data)
3827 struct igb_adapter *adapter = (struct igb_adapter *) data;
3828 igb_get_phy_info(&adapter->hw);
3832 * igb_has_link - check shared code for link and determine up/down
3833 * @adapter: pointer to driver private info
3835 bool igb_has_link(struct igb_adapter *adapter)
3837 struct e1000_hw *hw = &adapter->hw;
3838 bool link_active = false;
3841 /* get_link_status is set on LSC (link status) interrupt or
3842 * rx sequence error interrupt. get_link_status will stay
3843 * false until the e1000_check_for_link establishes link
3844 * for copper adapters ONLY
3846 switch (hw->phy.media_type) {
3847 case e1000_media_type_copper:
3848 if (hw->mac.get_link_status) {
3849 ret_val = hw->mac.ops.check_for_link(hw);
3850 link_active = !hw->mac.get_link_status;
3855 case e1000_media_type_internal_serdes:
3856 ret_val = hw->mac.ops.check_for_link(hw);
3857 link_active = hw->mac.serdes_has_link;
3860 case e1000_media_type_unknown:
3867 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
3870 u32 ctrl_ext, thstat;
3872 /* check for thermal sensor event on i350 copper only */
3873 if (hw->mac.type == e1000_i350) {
3874 thstat = rd32(E1000_THSTAT);
3875 ctrl_ext = rd32(E1000_CTRL_EXT);
3877 if ((hw->phy.media_type == e1000_media_type_copper) &&
3878 !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
3879 ret = !!(thstat & event);
3886 * igb_watchdog - Timer Call-back
3887 * @data: pointer to adapter cast into an unsigned long
3889 static void igb_watchdog(unsigned long data)
3891 struct igb_adapter *adapter = (struct igb_adapter *)data;
3892 /* Do the rest outside of interrupt context */
3893 schedule_work(&adapter->watchdog_task);
3896 static void igb_watchdog_task(struct work_struct *work)
3898 struct igb_adapter *adapter = container_of(work,
3901 struct e1000_hw *hw = &adapter->hw;
3902 struct net_device *netdev = adapter->netdev;
3906 link = igb_has_link(adapter);
3908 /* Cancel scheduled suspend requests. */
3909 pm_runtime_resume(netdev->dev.parent);
3911 if (!netif_carrier_ok(netdev)) {
3913 hw->mac.ops.get_speed_and_duplex(hw,
3914 &adapter->link_speed,
3915 &adapter->link_duplex);
3917 ctrl = rd32(E1000_CTRL);
3918 /* Links status message must follow this format */
3919 printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s "
3920 "Duplex, Flow Control: %s\n",
3922 adapter->link_speed,
3923 adapter->link_duplex == FULL_DUPLEX ?
3925 (ctrl & E1000_CTRL_TFCE) &&
3926 (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
3927 (ctrl & E1000_CTRL_RFCE) ? "RX" :
3928 (ctrl & E1000_CTRL_TFCE) ? "TX" : "None");
3930 /* check for thermal sensor event */
3931 if (igb_thermal_sensor_event(hw,
3932 E1000_THSTAT_LINK_THROTTLE)) {
3933 netdev_info(netdev, "The network adapter link "
3934 "speed was downshifted because it "
3938 /* adjust timeout factor according to speed/duplex */
3939 adapter->tx_timeout_factor = 1;
3940 switch (adapter->link_speed) {
3942 adapter->tx_timeout_factor = 14;
3945 /* maybe add some timeout factor ? */
3949 netif_carrier_on(netdev);
3951 igb_ping_all_vfs(adapter);
3952 igb_check_vf_rate_limit(adapter);
3954 /* link state has changed, schedule phy info update */
3955 if (!test_bit(__IGB_DOWN, &adapter->state))
3956 mod_timer(&adapter->phy_info_timer,
3957 round_jiffies(jiffies + 2 * HZ));
3960 if (netif_carrier_ok(netdev)) {
3961 adapter->link_speed = 0;
3962 adapter->link_duplex = 0;
3964 /* check for thermal sensor event */
3965 if (igb_thermal_sensor_event(hw,
3966 E1000_THSTAT_PWR_DOWN)) {
3967 netdev_err(netdev, "The network adapter was "
3968 "stopped because it overheated\n");
3971 /* Links status message must follow this format */
3972 printk(KERN_INFO "igb: %s NIC Link is Down\n",
3974 netif_carrier_off(netdev);
3976 igb_ping_all_vfs(adapter);
3978 /* link state has changed, schedule phy info update */
3979 if (!test_bit(__IGB_DOWN, &adapter->state))
3980 mod_timer(&adapter->phy_info_timer,
3981 round_jiffies(jiffies + 2 * HZ));
3983 pm_schedule_suspend(netdev->dev.parent,
3988 spin_lock(&adapter->stats64_lock);
3989 igb_update_stats(adapter, &adapter->stats64);
3990 spin_unlock(&adapter->stats64_lock);
3992 for (i = 0; i < adapter->num_tx_queues; i++) {
3993 struct igb_ring *tx_ring = adapter->tx_ring[i];
3994 if (!netif_carrier_ok(netdev)) {
3995 /* We've lost link, so the controller stops DMA,
3996 * but we've got queued Tx work that's never going
3997 * to get done, so reset controller to flush Tx.
3998 * (Do the reset outside of interrupt context).
4000 if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4001 adapter->tx_timeout_count++;
4002 schedule_work(&adapter->reset_task);
4003 /* return immediately since reset is imminent */
4008 /* Force detection of hung controller every watchdog period */
4009 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4012 /* Cause software interrupt to ensure Rx ring is cleaned */
4013 if (adapter->msix_entries) {
4015 for (i = 0; i < adapter->num_q_vectors; i++)
4016 eics |= adapter->q_vector[i]->eims_value;
4017 wr32(E1000_EICS, eics);
4019 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4022 igb_spoof_check(adapter);
4023 igb_ptp_rx_hang(adapter);
4025 /* Reset the timer */
4026 if (!test_bit(__IGB_DOWN, &adapter->state))
4027 mod_timer(&adapter->watchdog_timer,
4028 round_jiffies(jiffies + 2 * HZ));
4031 enum latency_range {
4035 latency_invalid = 255
4039 * igb_update_ring_itr - update the dynamic ITR value based on packet size
4040 * @q_vector: pointer to q_vector
4042 * Stores a new ITR value based on strictly on packet size. This
4043 * algorithm is less sophisticated than that used in igb_update_itr,
4044 * due to the difficulty of synchronizing statistics across multiple
4045 * receive rings. The divisors and thresholds used by this function
4046 * were determined based on theoretical maximum wire speed and testing
4047 * data, in order to minimize response time while increasing bulk
4049 * This functionality is controlled by the InterruptThrottleRate module
4050 * parameter (see igb_param.c)
4051 * NOTE: This function is called only when operating in a multiqueue
4052 * receive environment.
4054 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4056 int new_val = q_vector->itr_val;
4057 int avg_wire_size = 0;
4058 struct igb_adapter *adapter = q_vector->adapter;
4059 unsigned int packets;
4061 /* For non-gigabit speeds, just fix the interrupt rate at 4000
4062 * ints/sec - ITR timer value of 120 ticks.
4064 if (adapter->link_speed != SPEED_1000) {
4065 new_val = IGB_4K_ITR;
4069 packets = q_vector->rx.total_packets;
4071 avg_wire_size = q_vector->rx.total_bytes / packets;
4073 packets = q_vector->tx.total_packets;
4075 avg_wire_size = max_t(u32, avg_wire_size,
4076 q_vector->tx.total_bytes / packets);
4078 /* if avg_wire_size isn't set no work was done */
4082 /* Add 24 bytes to size to account for CRC, preamble, and gap */
4083 avg_wire_size += 24;
4085 /* Don't starve jumbo frames */
4086 avg_wire_size = min(avg_wire_size, 3000);
4088 /* Give a little boost to mid-size frames */
4089 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4090 new_val = avg_wire_size / 3;
4092 new_val = avg_wire_size / 2;
4094 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4095 if (new_val < IGB_20K_ITR &&
4096 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4097 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4098 new_val = IGB_20K_ITR;
4101 if (new_val != q_vector->itr_val) {
4102 q_vector->itr_val = new_val;
4103 q_vector->set_itr = 1;
4106 q_vector->rx.total_bytes = 0;
4107 q_vector->rx.total_packets = 0;
4108 q_vector->tx.total_bytes = 0;
4109 q_vector->tx.total_packets = 0;
4113 * igb_update_itr - update the dynamic ITR value based on statistics
4114 * @q_vector: pointer to q_vector
4115 * @ring_container: ring info to update the itr for
4117 * Stores a new ITR value based on packets and byte
4118 * counts during the last interrupt. The advantage of per interrupt
4119 * computation is faster updates and more accurate ITR for the current
4120 * traffic pattern. Constants in this function were computed
4121 * based on theoretical maximum wire speed and thresholds were set based
4122 * on testing data as well as attempting to minimize response time
4123 * while increasing bulk throughput.
4124 * this functionality is controlled by the InterruptThrottleRate module
4125 * parameter (see igb_param.c)
4126 * NOTE: These calculations are only valid when operating in a single-
4127 * queue environment.
4129 static void igb_update_itr(struct igb_q_vector *q_vector,
4130 struct igb_ring_container *ring_container)
4132 unsigned int packets = ring_container->total_packets;
4133 unsigned int bytes = ring_container->total_bytes;
4134 u8 itrval = ring_container->itr;
4136 /* no packets, exit with status unchanged */
4141 case lowest_latency:
4142 /* handle TSO and jumbo frames */
4143 if (bytes/packets > 8000)
4144 itrval = bulk_latency;
4145 else if ((packets < 5) && (bytes > 512))
4146 itrval = low_latency;
4148 case low_latency: /* 50 usec aka 20000 ints/s */
4149 if (bytes > 10000) {
4150 /* this if handles the TSO accounting */
4151 if (bytes/packets > 8000) {
4152 itrval = bulk_latency;
4153 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4154 itrval = bulk_latency;
4155 } else if ((packets > 35)) {
4156 itrval = lowest_latency;
4158 } else if (bytes/packets > 2000) {
4159 itrval = bulk_latency;
4160 } else if (packets <= 2 && bytes < 512) {
4161 itrval = lowest_latency;
4164 case bulk_latency: /* 250 usec aka 4000 ints/s */
4165 if (bytes > 25000) {
4167 itrval = low_latency;
4168 } else if (bytes < 1500) {
4169 itrval = low_latency;
4174 /* clear work counters since we have the values we need */
4175 ring_container->total_bytes = 0;
4176 ring_container->total_packets = 0;
4178 /* write updated itr to ring container */
4179 ring_container->itr = itrval;
4182 static void igb_set_itr(struct igb_q_vector *q_vector)
4184 struct igb_adapter *adapter = q_vector->adapter;
4185 u32 new_itr = q_vector->itr_val;
4188 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4189 if (adapter->link_speed != SPEED_1000) {
4191 new_itr = IGB_4K_ITR;
4195 igb_update_itr(q_vector, &q_vector->tx);
4196 igb_update_itr(q_vector, &q_vector->rx);
4198 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4200 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4201 if (current_itr == lowest_latency &&
4202 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4203 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4204 current_itr = low_latency;
4206 switch (current_itr) {
4207 /* counts and packets in update_itr are dependent on these numbers */
4208 case lowest_latency:
4209 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
4212 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
4215 new_itr = IGB_4K_ITR; /* 4,000 ints/sec */
4222 if (new_itr != q_vector->itr_val) {
4223 /* this attempts to bias the interrupt rate towards Bulk
4224 * by adding intermediate steps when interrupt rate is
4227 new_itr = new_itr > q_vector->itr_val ?
4228 max((new_itr * q_vector->itr_val) /
4229 (new_itr + (q_vector->itr_val >> 2)),
4231 /* Don't write the value here; it resets the adapter's
4232 * internal timer, and causes us to delay far longer than
4233 * we should between interrupts. Instead, we write the ITR
4234 * value at the beginning of the next interrupt so the timing
4235 * ends up being correct.
4237 q_vector->itr_val = new_itr;
4238 q_vector->set_itr = 1;
4242 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4243 u32 type_tucmd, u32 mss_l4len_idx)
4245 struct e1000_adv_tx_context_desc *context_desc;
4246 u16 i = tx_ring->next_to_use;
4248 context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4251 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4253 /* set bits to identify this as an advanced context descriptor */
4254 type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4256 /* For 82575, context index must be unique per ring. */
4257 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4258 mss_l4len_idx |= tx_ring->reg_idx << 4;
4260 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
4261 context_desc->seqnum_seed = 0;
4262 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
4263 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
4266 static int igb_tso(struct igb_ring *tx_ring,
4267 struct igb_tx_buffer *first,
4270 struct sk_buff *skb = first->skb;
4271 u32 vlan_macip_lens, type_tucmd;
4272 u32 mss_l4len_idx, l4len;
4274 if (skb->ip_summed != CHECKSUM_PARTIAL)
4277 if (!skb_is_gso(skb))
4280 if (skb_header_cloned(skb)) {
4281 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4286 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4287 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4289 if (first->protocol == __constant_htons(ETH_P_IP)) {
4290 struct iphdr *iph = ip_hdr(skb);
4293 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
4297 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4298 first->tx_flags |= IGB_TX_FLAGS_TSO |
4301 } else if (skb_is_gso_v6(skb)) {
4302 ipv6_hdr(skb)->payload_len = 0;
4303 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4304 &ipv6_hdr(skb)->daddr,
4306 first->tx_flags |= IGB_TX_FLAGS_TSO |
4310 /* compute header lengths */
4311 l4len = tcp_hdrlen(skb);
4312 *hdr_len = skb_transport_offset(skb) + l4len;
4314 /* update gso size and bytecount with header size */
4315 first->gso_segs = skb_shinfo(skb)->gso_segs;
4316 first->bytecount += (first->gso_segs - 1) * *hdr_len;
4319 mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
4320 mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
4322 /* VLAN MACLEN IPLEN */
4323 vlan_macip_lens = skb_network_header_len(skb);
4324 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4325 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4327 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4332 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
4334 struct sk_buff *skb = first->skb;
4335 u32 vlan_macip_lens = 0;
4336 u32 mss_l4len_idx = 0;
4339 if (skb->ip_summed != CHECKSUM_PARTIAL) {
4340 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
4344 switch (first->protocol) {
4345 case __constant_htons(ETH_P_IP):
4346 vlan_macip_lens |= skb_network_header_len(skb);
4347 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4348 l4_hdr = ip_hdr(skb)->protocol;
4350 case __constant_htons(ETH_P_IPV6):
4351 vlan_macip_lens |= skb_network_header_len(skb);
4352 l4_hdr = ipv6_hdr(skb)->nexthdr;
4355 if (unlikely(net_ratelimit())) {
4356 dev_warn(tx_ring->dev,
4357 "partial checksum but proto=%x!\n",
4365 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
4366 mss_l4len_idx = tcp_hdrlen(skb) <<
4367 E1000_ADVTXD_L4LEN_SHIFT;
4370 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
4371 mss_l4len_idx = sizeof(struct sctphdr) <<
4372 E1000_ADVTXD_L4LEN_SHIFT;
4375 mss_l4len_idx = sizeof(struct udphdr) <<
4376 E1000_ADVTXD_L4LEN_SHIFT;
4379 if (unlikely(net_ratelimit())) {
4380 dev_warn(tx_ring->dev,
4381 "partial checksum but l4 proto=%x!\n",
4387 /* update TX checksum flag */
4388 first->tx_flags |= IGB_TX_FLAGS_CSUM;
4391 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4392 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4394 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4397 #define IGB_SET_FLAG(_input, _flag, _result) \
4398 ((_flag <= _result) ? \
4399 ((u32)(_input & _flag) * (_result / _flag)) : \
4400 ((u32)(_input & _flag) / (_flag / _result)))
4402 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
4404 /* set type for advanced descriptor with frame checksum insertion */
4405 u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
4406 E1000_ADVTXD_DCMD_DEXT |
4407 E1000_ADVTXD_DCMD_IFCS;
4409 /* set HW vlan bit if vlan is present */
4410 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
4411 (E1000_ADVTXD_DCMD_VLE));
4413 /* set segmentation bits for TSO */
4414 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
4415 (E1000_ADVTXD_DCMD_TSE));
4417 /* set timestamp bit if present */
4418 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
4419 (E1000_ADVTXD_MAC_TSTAMP));
4421 /* insert frame checksum */
4422 cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
4427 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
4428 union e1000_adv_tx_desc *tx_desc,
4429 u32 tx_flags, unsigned int paylen)
4431 u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
4433 /* 82575 requires a unique index per ring */
4434 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4435 olinfo_status |= tx_ring->reg_idx << 4;
4437 /* insert L4 checksum */
4438 olinfo_status |= IGB_SET_FLAG(tx_flags,
4440 (E1000_TXD_POPTS_TXSM << 8));
4442 /* insert IPv4 checksum */
4443 olinfo_status |= IGB_SET_FLAG(tx_flags,
4445 (E1000_TXD_POPTS_IXSM << 8));
4447 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
4450 static void igb_tx_map(struct igb_ring *tx_ring,
4451 struct igb_tx_buffer *first,
4454 struct sk_buff *skb = first->skb;
4455 struct igb_tx_buffer *tx_buffer;
4456 union e1000_adv_tx_desc *tx_desc;
4457 struct skb_frag_struct *frag;
4459 unsigned int data_len, size;
4460 u32 tx_flags = first->tx_flags;
4461 u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
4462 u16 i = tx_ring->next_to_use;
4464 tx_desc = IGB_TX_DESC(tx_ring, i);
4466 igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
4468 size = skb_headlen(skb);
4469 data_len = skb->data_len;
4471 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
4475 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
4476 if (dma_mapping_error(tx_ring->dev, dma))
4479 /* record length, and DMA address */
4480 dma_unmap_len_set(tx_buffer, len, size);
4481 dma_unmap_addr_set(tx_buffer, dma, dma);
4483 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4485 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
4486 tx_desc->read.cmd_type_len =
4487 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
4491 if (i == tx_ring->count) {
4492 tx_desc = IGB_TX_DESC(tx_ring, 0);
4495 tx_desc->read.olinfo_status = 0;
4497 dma += IGB_MAX_DATA_PER_TXD;
4498 size -= IGB_MAX_DATA_PER_TXD;
4500 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4503 if (likely(!data_len))
4506 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
4510 if (i == tx_ring->count) {
4511 tx_desc = IGB_TX_DESC(tx_ring, 0);
4514 tx_desc->read.olinfo_status = 0;
4516 size = skb_frag_size(frag);
4519 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
4520 size, DMA_TO_DEVICE);
4522 tx_buffer = &tx_ring->tx_buffer_info[i];
4525 /* write last descriptor with RS and EOP bits */
4526 cmd_type |= size | IGB_TXD_DCMD;
4527 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
4529 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
4531 /* set the timestamp */
4532 first->time_stamp = jiffies;
4534 /* Force memory writes to complete before letting h/w know there
4535 * are new descriptors to fetch. (Only applicable for weak-ordered
4536 * memory model archs, such as IA-64).
4538 * We also need this memory barrier to make certain all of the
4539 * status bits have been updated before next_to_watch is written.
4543 /* set next_to_watch value indicating a packet is present */
4544 first->next_to_watch = tx_desc;
4547 if (i == tx_ring->count)
4550 tx_ring->next_to_use = i;
4552 writel(i, tx_ring->tail);
4554 /* we need this if more than one processor can write to our tail
4555 * at a time, it synchronizes IO on IA64/Altix systems
4562 dev_err(tx_ring->dev, "TX DMA map failed\n");
4564 /* clear dma mappings for failed tx_buffer_info map */
4566 tx_buffer = &tx_ring->tx_buffer_info[i];
4567 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
4568 if (tx_buffer == first)
4575 tx_ring->next_to_use = i;
4578 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4580 struct net_device *netdev = tx_ring->netdev;
4582 netif_stop_subqueue(netdev, tx_ring->queue_index);
4584 /* Herbert's original patch had:
4585 * smp_mb__after_netif_stop_queue();
4586 * but since that doesn't exist yet, just open code it.
4590 /* We need to check again in a case another CPU has just
4591 * made room available.
4593 if (igb_desc_unused(tx_ring) < size)
4597 netif_wake_subqueue(netdev, tx_ring->queue_index);
4599 u64_stats_update_begin(&tx_ring->tx_syncp2);
4600 tx_ring->tx_stats.restart_queue2++;
4601 u64_stats_update_end(&tx_ring->tx_syncp2);
4606 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4608 if (igb_desc_unused(tx_ring) >= size)
4610 return __igb_maybe_stop_tx(tx_ring, size);
4613 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
4614 struct igb_ring *tx_ring)
4616 struct igb_tx_buffer *first;
4619 u16 count = TXD_USE_COUNT(skb_headlen(skb));
4620 __be16 protocol = vlan_get_protocol(skb);
4623 /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
4624 * + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
4625 * + 2 desc gap to keep tail from touching head,
4626 * + 1 desc for context descriptor,
4627 * otherwise try next time
4629 if (NETDEV_FRAG_PAGE_MAX_SIZE > IGB_MAX_DATA_PER_TXD) {
4631 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
4632 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
4634 count += skb_shinfo(skb)->nr_frags;
4637 if (igb_maybe_stop_tx(tx_ring, count + 3)) {
4638 /* this is a hard error */
4639 return NETDEV_TX_BUSY;
4642 /* record the location of the first descriptor for this packet */
4643 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
4645 first->bytecount = skb->len;
4646 first->gso_segs = 1;
4648 skb_tx_timestamp(skb);
4650 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
4651 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
4653 if (!(adapter->ptp_tx_skb)) {
4654 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
4655 tx_flags |= IGB_TX_FLAGS_TSTAMP;
4657 adapter->ptp_tx_skb = skb_get(skb);
4658 adapter->ptp_tx_start = jiffies;
4659 if (adapter->hw.mac.type == e1000_82576)
4660 schedule_work(&adapter->ptp_tx_work);
4664 if (vlan_tx_tag_present(skb)) {
4665 tx_flags |= IGB_TX_FLAGS_VLAN;
4666 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
4669 /* record initial flags and protocol */
4670 first->tx_flags = tx_flags;
4671 first->protocol = protocol;
4673 tso = igb_tso(tx_ring, first, &hdr_len);
4677 igb_tx_csum(tx_ring, first);
4679 igb_tx_map(tx_ring, first, hdr_len);
4681 /* Make sure there is space in the ring for the next send. */
4682 igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
4684 return NETDEV_TX_OK;
4687 igb_unmap_and_free_tx_resource(tx_ring, first);
4689 return NETDEV_TX_OK;
4692 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
4693 struct sk_buff *skb)
4695 unsigned int r_idx = skb->queue_mapping;
4697 if (r_idx >= adapter->num_tx_queues)
4698 r_idx = r_idx % adapter->num_tx_queues;
4700 return adapter->tx_ring[r_idx];
4703 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
4704 struct net_device *netdev)
4706 struct igb_adapter *adapter = netdev_priv(netdev);
4708 if (test_bit(__IGB_DOWN, &adapter->state)) {
4709 dev_kfree_skb_any(skb);
4710 return NETDEV_TX_OK;
4713 if (skb->len <= 0) {
4714 dev_kfree_skb_any(skb);
4715 return NETDEV_TX_OK;
4718 /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
4719 * in order to meet this minimum size requirement.
4721 if (unlikely(skb->len < 17)) {
4722 if (skb_pad(skb, 17 - skb->len))
4723 return NETDEV_TX_OK;
4725 skb_set_tail_pointer(skb, 17);
4728 return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
4732 * igb_tx_timeout - Respond to a Tx Hang
4733 * @netdev: network interface device structure
4735 static void igb_tx_timeout(struct net_device *netdev)
4737 struct igb_adapter *adapter = netdev_priv(netdev);
4738 struct e1000_hw *hw = &adapter->hw;
4740 /* Do the reset outside of interrupt context */
4741 adapter->tx_timeout_count++;
4743 if (hw->mac.type >= e1000_82580)
4744 hw->dev_spec._82575.global_device_reset = true;
4746 schedule_work(&adapter->reset_task);
4748 (adapter->eims_enable_mask & ~adapter->eims_other));
4751 static void igb_reset_task(struct work_struct *work)
4753 struct igb_adapter *adapter;
4754 adapter = container_of(work, struct igb_adapter, reset_task);
4757 netdev_err(adapter->netdev, "Reset adapter\n");
4758 igb_reinit_locked(adapter);
4762 * igb_get_stats64 - Get System Network Statistics
4763 * @netdev: network interface device structure
4764 * @stats: rtnl_link_stats64 pointer
4766 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
4767 struct rtnl_link_stats64 *stats)
4769 struct igb_adapter *adapter = netdev_priv(netdev);
4771 spin_lock(&adapter->stats64_lock);
4772 igb_update_stats(adapter, &adapter->stats64);
4773 memcpy(stats, &adapter->stats64, sizeof(*stats));
4774 spin_unlock(&adapter->stats64_lock);
4780 * igb_change_mtu - Change the Maximum Transfer Unit
4781 * @netdev: network interface device structure
4782 * @new_mtu: new value for maximum frame size
4784 * Returns 0 on success, negative on failure
4786 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
4788 struct igb_adapter *adapter = netdev_priv(netdev);
4789 struct pci_dev *pdev = adapter->pdev;
4790 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
4792 if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
4793 dev_err(&pdev->dev, "Invalid MTU setting\n");
4797 #define MAX_STD_JUMBO_FRAME_SIZE 9238
4798 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
4799 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
4803 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
4806 /* igb_down has a dependency on max_frame_size */
4807 adapter->max_frame_size = max_frame;
4809 if (netif_running(netdev))
4812 dev_info(&pdev->dev, "changing MTU from %d to %d\n",
4813 netdev->mtu, new_mtu);
4814 netdev->mtu = new_mtu;
4816 if (netif_running(netdev))
4821 clear_bit(__IGB_RESETTING, &adapter->state);
4827 * igb_update_stats - Update the board statistics counters
4828 * @adapter: board private structure
4830 void igb_update_stats(struct igb_adapter *adapter,
4831 struct rtnl_link_stats64 *net_stats)
4833 struct e1000_hw *hw = &adapter->hw;
4834 struct pci_dev *pdev = adapter->pdev;
4840 u64 _bytes, _packets;
4842 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
4844 /* Prevent stats update while adapter is being reset, or if the pci
4845 * connection is down.
4847 if (adapter->link_speed == 0)
4849 if (pci_channel_offline(pdev))
4854 for (i = 0; i < adapter->num_rx_queues; i++) {
4855 u32 rqdpc = rd32(E1000_RQDPC(i));
4856 struct igb_ring *ring = adapter->rx_ring[i];
4859 ring->rx_stats.drops += rqdpc;
4860 net_stats->rx_fifo_errors += rqdpc;
4864 start = u64_stats_fetch_begin_bh(&ring->rx_syncp);
4865 _bytes = ring->rx_stats.bytes;
4866 _packets = ring->rx_stats.packets;
4867 } while (u64_stats_fetch_retry_bh(&ring->rx_syncp, start));
4869 packets += _packets;
4872 net_stats->rx_bytes = bytes;
4873 net_stats->rx_packets = packets;
4877 for (i = 0; i < adapter->num_tx_queues; i++) {
4878 struct igb_ring *ring = adapter->tx_ring[i];
4880 start = u64_stats_fetch_begin_bh(&ring->tx_syncp);
4881 _bytes = ring->tx_stats.bytes;
4882 _packets = ring->tx_stats.packets;
4883 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp, start));
4885 packets += _packets;
4887 net_stats->tx_bytes = bytes;
4888 net_stats->tx_packets = packets;
4890 /* read stats registers */
4891 adapter->stats.crcerrs += rd32(E1000_CRCERRS);
4892 adapter->stats.gprc += rd32(E1000_GPRC);
4893 adapter->stats.gorc += rd32(E1000_GORCL);
4894 rd32(E1000_GORCH); /* clear GORCL */
4895 adapter->stats.bprc += rd32(E1000_BPRC);
4896 adapter->stats.mprc += rd32(E1000_MPRC);
4897 adapter->stats.roc += rd32(E1000_ROC);
4899 adapter->stats.prc64 += rd32(E1000_PRC64);
4900 adapter->stats.prc127 += rd32(E1000_PRC127);
4901 adapter->stats.prc255 += rd32(E1000_PRC255);
4902 adapter->stats.prc511 += rd32(E1000_PRC511);
4903 adapter->stats.prc1023 += rd32(E1000_PRC1023);
4904 adapter->stats.prc1522 += rd32(E1000_PRC1522);
4905 adapter->stats.symerrs += rd32(E1000_SYMERRS);
4906 adapter->stats.sec += rd32(E1000_SEC);
4908 mpc = rd32(E1000_MPC);
4909 adapter->stats.mpc += mpc;
4910 net_stats->rx_fifo_errors += mpc;
4911 adapter->stats.scc += rd32(E1000_SCC);
4912 adapter->stats.ecol += rd32(E1000_ECOL);
4913 adapter->stats.mcc += rd32(E1000_MCC);
4914 adapter->stats.latecol += rd32(E1000_LATECOL);
4915 adapter->stats.dc += rd32(E1000_DC);
4916 adapter->stats.rlec += rd32(E1000_RLEC);
4917 adapter->stats.xonrxc += rd32(E1000_XONRXC);
4918 adapter->stats.xontxc += rd32(E1000_XONTXC);
4919 adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
4920 adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
4921 adapter->stats.fcruc += rd32(E1000_FCRUC);
4922 adapter->stats.gptc += rd32(E1000_GPTC);
4923 adapter->stats.gotc += rd32(E1000_GOTCL);
4924 rd32(E1000_GOTCH); /* clear GOTCL */
4925 adapter->stats.rnbc += rd32(E1000_RNBC);
4926 adapter->stats.ruc += rd32(E1000_RUC);
4927 adapter->stats.rfc += rd32(E1000_RFC);
4928 adapter->stats.rjc += rd32(E1000_RJC);
4929 adapter->stats.tor += rd32(E1000_TORH);
4930 adapter->stats.tot += rd32(E1000_TOTH);
4931 adapter->stats.tpr += rd32(E1000_TPR);
4933 adapter->stats.ptc64 += rd32(E1000_PTC64);
4934 adapter->stats.ptc127 += rd32(E1000_PTC127);
4935 adapter->stats.ptc255 += rd32(E1000_PTC255);
4936 adapter->stats.ptc511 += rd32(E1000_PTC511);
4937 adapter->stats.ptc1023 += rd32(E1000_PTC1023);
4938 adapter->stats.ptc1522 += rd32(E1000_PTC1522);
4940 adapter->stats.mptc += rd32(E1000_MPTC);
4941 adapter->stats.bptc += rd32(E1000_BPTC);
4943 adapter->stats.tpt += rd32(E1000_TPT);
4944 adapter->stats.colc += rd32(E1000_COLC);
4946 adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
4947 /* read internal phy specific stats */
4948 reg = rd32(E1000_CTRL_EXT);
4949 if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
4950 adapter->stats.rxerrc += rd32(E1000_RXERRC);
4952 /* this stat has invalid values on i210/i211 */
4953 if ((hw->mac.type != e1000_i210) &&
4954 (hw->mac.type != e1000_i211))
4955 adapter->stats.tncrs += rd32(E1000_TNCRS);
4958 adapter->stats.tsctc += rd32(E1000_TSCTC);
4959 adapter->stats.tsctfc += rd32(E1000_TSCTFC);
4961 adapter->stats.iac += rd32(E1000_IAC);
4962 adapter->stats.icrxoc += rd32(E1000_ICRXOC);
4963 adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
4964 adapter->stats.icrxatc += rd32(E1000_ICRXATC);
4965 adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
4966 adapter->stats.ictxatc += rd32(E1000_ICTXATC);
4967 adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
4968 adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
4969 adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
4971 /* Fill out the OS statistics structure */
4972 net_stats->multicast = adapter->stats.mprc;
4973 net_stats->collisions = adapter->stats.colc;
4977 /* RLEC on some newer hardware can be incorrect so build
4978 * our own version based on RUC and ROC
4980 net_stats->rx_errors = adapter->stats.rxerrc +
4981 adapter->stats.crcerrs + adapter->stats.algnerrc +
4982 adapter->stats.ruc + adapter->stats.roc +
4983 adapter->stats.cexterr;
4984 net_stats->rx_length_errors = adapter->stats.ruc +
4986 net_stats->rx_crc_errors = adapter->stats.crcerrs;
4987 net_stats->rx_frame_errors = adapter->stats.algnerrc;
4988 net_stats->rx_missed_errors = adapter->stats.mpc;
4991 net_stats->tx_errors = adapter->stats.ecol +
4992 adapter->stats.latecol;
4993 net_stats->tx_aborted_errors = adapter->stats.ecol;
4994 net_stats->tx_window_errors = adapter->stats.latecol;
4995 net_stats->tx_carrier_errors = adapter->stats.tncrs;
4997 /* Tx Dropped needs to be maintained elsewhere */
5000 if (hw->phy.media_type == e1000_media_type_copper) {
5001 if ((adapter->link_speed == SPEED_1000) &&
5002 (!igb_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5003 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5004 adapter->phy_stats.idle_errors += phy_tmp;
5008 /* Management Stats */
5009 adapter->stats.mgptc += rd32(E1000_MGTPTC);
5010 adapter->stats.mgprc += rd32(E1000_MGTPRC);
5011 adapter->stats.mgpdc += rd32(E1000_MGTPDC);
5014 reg = rd32(E1000_MANC);
5015 if (reg & E1000_MANC_EN_BMC2OS) {
5016 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
5017 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
5018 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
5019 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
5023 static irqreturn_t igb_msix_other(int irq, void *data)
5025 struct igb_adapter *adapter = data;
5026 struct e1000_hw *hw = &adapter->hw;
5027 u32 icr = rd32(E1000_ICR);
5028 /* reading ICR causes bit 31 of EICR to be cleared */
5030 if (icr & E1000_ICR_DRSTA)
5031 schedule_work(&adapter->reset_task);
5033 if (icr & E1000_ICR_DOUTSYNC) {
5034 /* HW is reporting DMA is out of sync */
5035 adapter->stats.doosync++;
5036 /* The DMA Out of Sync is also indication of a spoof event
5037 * in IOV mode. Check the Wrong VM Behavior register to
5038 * see if it is really a spoof event.
5040 igb_check_wvbr(adapter);
5043 /* Check for a mailbox event */
5044 if (icr & E1000_ICR_VMMB)
5045 igb_msg_task(adapter);
5047 if (icr & E1000_ICR_LSC) {
5048 hw->mac.get_link_status = 1;
5049 /* guard against interrupt when we're going down */
5050 if (!test_bit(__IGB_DOWN, &adapter->state))
5051 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5054 if (icr & E1000_ICR_TS) {
5055 u32 tsicr = rd32(E1000_TSICR);
5057 if (tsicr & E1000_TSICR_TXTS) {
5058 /* acknowledge the interrupt */
5059 wr32(E1000_TSICR, E1000_TSICR_TXTS);
5060 /* retrieve hardware timestamp */
5061 schedule_work(&adapter->ptp_tx_work);
5065 wr32(E1000_EIMS, adapter->eims_other);
5070 static void igb_write_itr(struct igb_q_vector *q_vector)
5072 struct igb_adapter *adapter = q_vector->adapter;
5073 u32 itr_val = q_vector->itr_val & 0x7FFC;
5075 if (!q_vector->set_itr)
5081 if (adapter->hw.mac.type == e1000_82575)
5082 itr_val |= itr_val << 16;
5084 itr_val |= E1000_EITR_CNT_IGNR;
5086 writel(itr_val, q_vector->itr_register);
5087 q_vector->set_itr = 0;
5090 static irqreturn_t igb_msix_ring(int irq, void *data)
5092 struct igb_q_vector *q_vector = data;
5094 /* Write the ITR value calculated from the previous interrupt. */
5095 igb_write_itr(q_vector);
5097 napi_schedule(&q_vector->napi);
5102 #ifdef CONFIG_IGB_DCA
5103 static void igb_update_tx_dca(struct igb_adapter *adapter,
5104 struct igb_ring *tx_ring,
5107 struct e1000_hw *hw = &adapter->hw;
5108 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5110 if (hw->mac.type != e1000_82575)
5111 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
5113 /* We can enable relaxed ordering for reads, but not writes when
5114 * DCA is enabled. This is due to a known issue in some chipsets
5115 * which will cause the DCA tag to be cleared.
5117 txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5118 E1000_DCA_TXCTRL_DATA_RRO_EN |
5119 E1000_DCA_TXCTRL_DESC_DCA_EN;
5121 wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5124 static void igb_update_rx_dca(struct igb_adapter *adapter,
5125 struct igb_ring *rx_ring,
5128 struct e1000_hw *hw = &adapter->hw;
5129 u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5131 if (hw->mac.type != e1000_82575)
5132 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
5134 /* We can enable relaxed ordering for reads, but not writes when
5135 * DCA is enabled. This is due to a known issue in some chipsets
5136 * which will cause the DCA tag to be cleared.
5138 rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5139 E1000_DCA_RXCTRL_DESC_DCA_EN;
5141 wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5144 static void igb_update_dca(struct igb_q_vector *q_vector)
5146 struct igb_adapter *adapter = q_vector->adapter;
5147 int cpu = get_cpu();
5149 if (q_vector->cpu == cpu)
5152 if (q_vector->tx.ring)
5153 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5155 if (q_vector->rx.ring)
5156 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
5158 q_vector->cpu = cpu;
5163 static void igb_setup_dca(struct igb_adapter *adapter)
5165 struct e1000_hw *hw = &adapter->hw;
5168 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
5171 /* Always use CB2 mode, difference is masked in the CB driver. */
5172 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
5174 for (i = 0; i < adapter->num_q_vectors; i++) {
5175 adapter->q_vector[i]->cpu = -1;
5176 igb_update_dca(adapter->q_vector[i]);
5180 static int __igb_notify_dca(struct device *dev, void *data)
5182 struct net_device *netdev = dev_get_drvdata(dev);
5183 struct igb_adapter *adapter = netdev_priv(netdev);
5184 struct pci_dev *pdev = adapter->pdev;
5185 struct e1000_hw *hw = &adapter->hw;
5186 unsigned long event = *(unsigned long *)data;
5189 case DCA_PROVIDER_ADD:
5190 /* if already enabled, don't do it again */
5191 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
5193 if (dca_add_requester(dev) == 0) {
5194 adapter->flags |= IGB_FLAG_DCA_ENABLED;
5195 dev_info(&pdev->dev, "DCA enabled\n");
5196 igb_setup_dca(adapter);
5199 /* Fall Through since DCA is disabled. */
5200 case DCA_PROVIDER_REMOVE:
5201 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
5202 /* without this a class_device is left
5203 * hanging around in the sysfs model
5205 dca_remove_requester(dev);
5206 dev_info(&pdev->dev, "DCA disabled\n");
5207 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
5208 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
5216 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
5221 ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
5224 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
5226 #endif /* CONFIG_IGB_DCA */
5228 #ifdef CONFIG_PCI_IOV
5229 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
5231 unsigned char mac_addr[ETH_ALEN];
5233 eth_zero_addr(mac_addr);
5234 igb_set_vf_mac(adapter, vf, mac_addr);
5236 /* By default spoof check is enabled for all VFs */
5237 adapter->vf_data[vf].spoofchk_enabled = true;
5242 static bool igb_vfs_are_assigned(struct igb_adapter *adapter)
5244 struct pci_dev *pdev = adapter->pdev;
5245 struct pci_dev *vfdev;
5248 switch (adapter->hw.mac.type) {
5250 dev_id = IGB_82576_VF_DEV_ID;
5253 dev_id = IGB_I350_VF_DEV_ID;
5259 /* loop through all the VFs to see if we own any that are assigned */
5260 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, dev_id, NULL);
5262 /* if we don't own it we don't care */
5263 if (vfdev->is_virtfn && vfdev->physfn == pdev) {
5264 /* if it is assigned we cannot release it */
5265 if (vfdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED)
5269 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, dev_id, vfdev);
5276 static void igb_ping_all_vfs(struct igb_adapter *adapter)
5278 struct e1000_hw *hw = &adapter->hw;
5282 for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
5283 ping = E1000_PF_CONTROL_MSG;
5284 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
5285 ping |= E1000_VT_MSGTYPE_CTS;
5286 igb_write_mbx(hw, &ping, 1, i);
5290 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5292 struct e1000_hw *hw = &adapter->hw;
5293 u32 vmolr = rd32(E1000_VMOLR(vf));
5294 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5296 vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
5297 IGB_VF_FLAG_MULTI_PROMISC);
5298 vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5300 if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
5301 vmolr |= E1000_VMOLR_MPME;
5302 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
5303 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
5305 /* if we have hashes and we are clearing a multicast promisc
5306 * flag we need to write the hashes to the MTA as this step
5307 * was previously skipped
5309 if (vf_data->num_vf_mc_hashes > 30) {
5310 vmolr |= E1000_VMOLR_MPME;
5311 } else if (vf_data->num_vf_mc_hashes) {
5313 vmolr |= E1000_VMOLR_ROMPE;
5314 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5315 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5319 wr32(E1000_VMOLR(vf), vmolr);
5321 /* there are flags left unprocessed, likely not supported */
5322 if (*msgbuf & E1000_VT_MSGINFO_MASK)
5328 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
5329 u32 *msgbuf, u32 vf)
5331 int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5332 u16 *hash_list = (u16 *)&msgbuf[1];
5333 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5336 /* salt away the number of multicast addresses assigned
5337 * to this VF for later use to restore when the PF multi cast
5340 vf_data->num_vf_mc_hashes = n;
5342 /* only up to 30 hash values supported */
5346 /* store the hashes for later use */
5347 for (i = 0; i < n; i++)
5348 vf_data->vf_mc_hashes[i] = hash_list[i];
5350 /* Flush and reset the mta with the new values */
5351 igb_set_rx_mode(adapter->netdev);
5356 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
5358 struct e1000_hw *hw = &adapter->hw;
5359 struct vf_data_storage *vf_data;
5362 for (i = 0; i < adapter->vfs_allocated_count; i++) {
5363 u32 vmolr = rd32(E1000_VMOLR(i));
5364 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5366 vf_data = &adapter->vf_data[i];
5368 if ((vf_data->num_vf_mc_hashes > 30) ||
5369 (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
5370 vmolr |= E1000_VMOLR_MPME;
5371 } else if (vf_data->num_vf_mc_hashes) {
5372 vmolr |= E1000_VMOLR_ROMPE;
5373 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5374 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5376 wr32(E1000_VMOLR(i), vmolr);
5380 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
5382 struct e1000_hw *hw = &adapter->hw;
5383 u32 pool_mask, reg, vid;
5386 pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5388 /* Find the vlan filter for this id */
5389 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5390 reg = rd32(E1000_VLVF(i));
5392 /* remove the vf from the pool */
5395 /* if pool is empty then remove entry from vfta */
5396 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
5397 (reg & E1000_VLVF_VLANID_ENABLE)) {
5399 vid = reg & E1000_VLVF_VLANID_MASK;
5400 igb_vfta_set(hw, vid, false);
5403 wr32(E1000_VLVF(i), reg);
5406 adapter->vf_data[vf].vlans_enabled = 0;
5409 static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
5411 struct e1000_hw *hw = &adapter->hw;
5414 /* The vlvf table only exists on 82576 hardware and newer */
5415 if (hw->mac.type < e1000_82576)
5418 /* we only need to do this if VMDq is enabled */
5419 if (!adapter->vfs_allocated_count)
5422 /* Find the vlan filter for this id */
5423 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5424 reg = rd32(E1000_VLVF(i));
5425 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5426 vid == (reg & E1000_VLVF_VLANID_MASK))
5431 if (i == E1000_VLVF_ARRAY_SIZE) {
5432 /* Did not find a matching VLAN ID entry that was
5433 * enabled. Search for a free filter entry, i.e.
5434 * one without the enable bit set
5436 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5437 reg = rd32(E1000_VLVF(i));
5438 if (!(reg & E1000_VLVF_VLANID_ENABLE))
5442 if (i < E1000_VLVF_ARRAY_SIZE) {
5443 /* Found an enabled/available entry */
5444 reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5446 /* if !enabled we need to set this up in vfta */
5447 if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
5448 /* add VID to filter table */
5449 igb_vfta_set(hw, vid, true);
5450 reg |= E1000_VLVF_VLANID_ENABLE;
5452 reg &= ~E1000_VLVF_VLANID_MASK;
5454 wr32(E1000_VLVF(i), reg);
5456 /* do not modify RLPML for PF devices */
5457 if (vf >= adapter->vfs_allocated_count)
5460 if (!adapter->vf_data[vf].vlans_enabled) {
5462 reg = rd32(E1000_VMOLR(vf));
5463 size = reg & E1000_VMOLR_RLPML_MASK;
5465 reg &= ~E1000_VMOLR_RLPML_MASK;
5467 wr32(E1000_VMOLR(vf), reg);
5470 adapter->vf_data[vf].vlans_enabled++;
5473 if (i < E1000_VLVF_ARRAY_SIZE) {
5474 /* remove vf from the pool */
5475 reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
5476 /* if pool is empty then remove entry from vfta */
5477 if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
5479 igb_vfta_set(hw, vid, false);
5481 wr32(E1000_VLVF(i), reg);
5483 /* do not modify RLPML for PF devices */
5484 if (vf >= adapter->vfs_allocated_count)
5487 adapter->vf_data[vf].vlans_enabled--;
5488 if (!adapter->vf_data[vf].vlans_enabled) {
5490 reg = rd32(E1000_VMOLR(vf));
5491 size = reg & E1000_VMOLR_RLPML_MASK;
5493 reg &= ~E1000_VMOLR_RLPML_MASK;
5495 wr32(E1000_VMOLR(vf), reg);
5502 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
5504 struct e1000_hw *hw = &adapter->hw;
5507 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
5509 wr32(E1000_VMVIR(vf), 0);
5512 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
5513 int vf, u16 vlan, u8 qos)
5516 struct igb_adapter *adapter = netdev_priv(netdev);
5518 if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
5521 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
5524 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
5525 igb_set_vmolr(adapter, vf, !vlan);
5526 adapter->vf_data[vf].pf_vlan = vlan;
5527 adapter->vf_data[vf].pf_qos = qos;
5528 dev_info(&adapter->pdev->dev,
5529 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
5530 if (test_bit(__IGB_DOWN, &adapter->state)) {
5531 dev_warn(&adapter->pdev->dev,
5532 "The VF VLAN has been set, but the PF device is not up.\n");
5533 dev_warn(&adapter->pdev->dev,
5534 "Bring the PF device up before attempting to use the VF device.\n");
5537 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
5539 igb_set_vmvir(adapter, vlan, vf);
5540 igb_set_vmolr(adapter, vf, true);
5541 adapter->vf_data[vf].pf_vlan = 0;
5542 adapter->vf_data[vf].pf_qos = 0;
5548 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5550 int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5551 int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
5553 return igb_vlvf_set(adapter, vid, add, vf);
5556 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
5558 /* clear flags - except flag that indicates PF has set the MAC */
5559 adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
5560 adapter->vf_data[vf].last_nack = jiffies;
5562 /* reset offloads to defaults */
5563 igb_set_vmolr(adapter, vf, true);
5565 /* reset vlans for device */
5566 igb_clear_vf_vfta(adapter, vf);
5567 if (adapter->vf_data[vf].pf_vlan)
5568 igb_ndo_set_vf_vlan(adapter->netdev, vf,
5569 adapter->vf_data[vf].pf_vlan,
5570 adapter->vf_data[vf].pf_qos);
5572 igb_clear_vf_vfta(adapter, vf);
5574 /* reset multicast table array for vf */
5575 adapter->vf_data[vf].num_vf_mc_hashes = 0;
5577 /* Flush and reset the mta with the new values */
5578 igb_set_rx_mode(adapter->netdev);
5581 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
5583 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5585 /* clear mac address as we were hotplug removed/added */
5586 if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
5587 eth_zero_addr(vf_mac);
5589 /* process remaining reset events */
5590 igb_vf_reset(adapter, vf);
5593 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
5595 struct e1000_hw *hw = &adapter->hw;
5596 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5597 int rar_entry = hw->mac.rar_entry_count - (vf + 1);
5599 u8 *addr = (u8 *)(&msgbuf[1]);
5601 /* process all the same items cleared in a function level reset */
5602 igb_vf_reset(adapter, vf);
5604 /* set vf mac address */
5605 igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
5607 /* enable transmit and receive for vf */
5608 reg = rd32(E1000_VFTE);
5609 wr32(E1000_VFTE, reg | (1 << vf));
5610 reg = rd32(E1000_VFRE);
5611 wr32(E1000_VFRE, reg | (1 << vf));
5613 adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
5615 /* reply to reset with ack and vf mac address */
5616 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
5617 memcpy(addr, vf_mac, 6);
5618 igb_write_mbx(hw, msgbuf, 3, vf);
5621 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
5623 /* The VF MAC Address is stored in a packed array of bytes
5624 * starting at the second 32 bit word of the msg array
5626 unsigned char *addr = (char *)&msg[1];
5629 if (is_valid_ether_addr(addr))
5630 err = igb_set_vf_mac(adapter, vf, addr);
5635 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
5637 struct e1000_hw *hw = &adapter->hw;
5638 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5639 u32 msg = E1000_VT_MSGTYPE_NACK;
5641 /* if device isn't clear to send it shouldn't be reading either */
5642 if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
5643 time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
5644 igb_write_mbx(hw, &msg, 1, vf);
5645 vf_data->last_nack = jiffies;
5649 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
5651 struct pci_dev *pdev = adapter->pdev;
5652 u32 msgbuf[E1000_VFMAILBOX_SIZE];
5653 struct e1000_hw *hw = &adapter->hw;
5654 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5657 retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
5660 /* if receive failed revoke VF CTS stats and restart init */
5661 dev_err(&pdev->dev, "Error receiving message from VF\n");
5662 vf_data->flags &= ~IGB_VF_FLAG_CTS;
5663 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5668 /* this is a message we already processed, do nothing */
5669 if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
5672 /* until the vf completes a reset it should not be
5673 * allowed to start any configuration.
5675 if (msgbuf[0] == E1000_VF_RESET) {
5676 igb_vf_reset_msg(adapter, vf);
5680 if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
5681 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5687 switch ((msgbuf[0] & 0xFFFF)) {
5688 case E1000_VF_SET_MAC_ADDR:
5690 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
5691 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
5693 dev_warn(&pdev->dev,
5694 "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
5697 case E1000_VF_SET_PROMISC:
5698 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
5700 case E1000_VF_SET_MULTICAST:
5701 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
5703 case E1000_VF_SET_LPE:
5704 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
5706 case E1000_VF_SET_VLAN:
5708 if (vf_data->pf_vlan)
5709 dev_warn(&pdev->dev,
5710 "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
5713 retval = igb_set_vf_vlan(adapter, msgbuf, vf);
5716 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
5721 msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
5723 /* notify the VF of the results of what it sent us */
5725 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
5727 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
5729 igb_write_mbx(hw, msgbuf, 1, vf);
5732 static void igb_msg_task(struct igb_adapter *adapter)
5734 struct e1000_hw *hw = &adapter->hw;
5737 for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
5738 /* process any reset requests */
5739 if (!igb_check_for_rst(hw, vf))
5740 igb_vf_reset_event(adapter, vf);
5742 /* process any messages pending */
5743 if (!igb_check_for_msg(hw, vf))
5744 igb_rcv_msg_from_vf(adapter, vf);
5746 /* process any acks */
5747 if (!igb_check_for_ack(hw, vf))
5748 igb_rcv_ack_from_vf(adapter, vf);
5753 * igb_set_uta - Set unicast filter table address
5754 * @adapter: board private structure
5756 * The unicast table address is a register array of 32-bit registers.
5757 * The table is meant to be used in a way similar to how the MTA is used
5758 * however due to certain limitations in the hardware it is necessary to
5759 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
5760 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
5762 static void igb_set_uta(struct igb_adapter *adapter)
5764 struct e1000_hw *hw = &adapter->hw;
5767 /* The UTA table only exists on 82576 hardware and newer */
5768 if (hw->mac.type < e1000_82576)
5771 /* we only need to do this if VMDq is enabled */
5772 if (!adapter->vfs_allocated_count)
5775 for (i = 0; i < hw->mac.uta_reg_count; i++)
5776 array_wr32(E1000_UTA, i, ~0);
5780 * igb_intr_msi - Interrupt Handler
5781 * @irq: interrupt number
5782 * @data: pointer to a network interface device structure
5784 static irqreturn_t igb_intr_msi(int irq, void *data)
5786 struct igb_adapter *adapter = data;
5787 struct igb_q_vector *q_vector = adapter->q_vector[0];
5788 struct e1000_hw *hw = &adapter->hw;
5789 /* read ICR disables interrupts using IAM */
5790 u32 icr = rd32(E1000_ICR);
5792 igb_write_itr(q_vector);
5794 if (icr & E1000_ICR_DRSTA)
5795 schedule_work(&adapter->reset_task);
5797 if (icr & E1000_ICR_DOUTSYNC) {
5798 /* HW is reporting DMA is out of sync */
5799 adapter->stats.doosync++;
5802 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
5803 hw->mac.get_link_status = 1;
5804 if (!test_bit(__IGB_DOWN, &adapter->state))
5805 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5808 if (icr & E1000_ICR_TS) {
5809 u32 tsicr = rd32(E1000_TSICR);
5811 if (tsicr & E1000_TSICR_TXTS) {
5812 /* acknowledge the interrupt */
5813 wr32(E1000_TSICR, E1000_TSICR_TXTS);
5814 /* retrieve hardware timestamp */
5815 schedule_work(&adapter->ptp_tx_work);
5819 napi_schedule(&q_vector->napi);
5825 * igb_intr - Legacy Interrupt Handler
5826 * @irq: interrupt number
5827 * @data: pointer to a network interface device structure
5829 static irqreturn_t igb_intr(int irq, void *data)
5831 struct igb_adapter *adapter = data;
5832 struct igb_q_vector *q_vector = adapter->q_vector[0];
5833 struct e1000_hw *hw = &adapter->hw;
5834 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
5835 * need for the IMC write
5837 u32 icr = rd32(E1000_ICR);
5839 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
5840 * not set, then the adapter didn't send an interrupt
5842 if (!(icr & E1000_ICR_INT_ASSERTED))
5845 igb_write_itr(q_vector);
5847 if (icr & E1000_ICR_DRSTA)
5848 schedule_work(&adapter->reset_task);
5850 if (icr & E1000_ICR_DOUTSYNC) {
5851 /* HW is reporting DMA is out of sync */
5852 adapter->stats.doosync++;
5855 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
5856 hw->mac.get_link_status = 1;
5857 /* guard against interrupt when we're going down */
5858 if (!test_bit(__IGB_DOWN, &adapter->state))
5859 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5862 if (icr & E1000_ICR_TS) {
5863 u32 tsicr = rd32(E1000_TSICR);
5865 if (tsicr & E1000_TSICR_TXTS) {
5866 /* acknowledge the interrupt */
5867 wr32(E1000_TSICR, E1000_TSICR_TXTS);
5868 /* retrieve hardware timestamp */
5869 schedule_work(&adapter->ptp_tx_work);
5873 napi_schedule(&q_vector->napi);
5878 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
5880 struct igb_adapter *adapter = q_vector->adapter;
5881 struct e1000_hw *hw = &adapter->hw;
5883 if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
5884 (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
5885 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
5886 igb_set_itr(q_vector);
5888 igb_update_ring_itr(q_vector);
5891 if (!test_bit(__IGB_DOWN, &adapter->state)) {
5892 if (adapter->msix_entries)
5893 wr32(E1000_EIMS, q_vector->eims_value);
5895 igb_irq_enable(adapter);
5900 * igb_poll - NAPI Rx polling callback
5901 * @napi: napi polling structure
5902 * @budget: count of how many packets we should handle
5904 static int igb_poll(struct napi_struct *napi, int budget)
5906 struct igb_q_vector *q_vector = container_of(napi,
5907 struct igb_q_vector,
5909 bool clean_complete = true;
5911 #ifdef CONFIG_IGB_DCA
5912 if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
5913 igb_update_dca(q_vector);
5915 if (q_vector->tx.ring)
5916 clean_complete = igb_clean_tx_irq(q_vector);
5918 if (q_vector->rx.ring)
5919 clean_complete &= igb_clean_rx_irq(q_vector, budget);
5921 /* If all work not completed, return budget and keep polling */
5922 if (!clean_complete)
5925 /* If not enough Rx work done, exit the polling mode */
5926 napi_complete(napi);
5927 igb_ring_irq_enable(q_vector);
5933 * igb_clean_tx_irq - Reclaim resources after transmit completes
5934 * @q_vector: pointer to q_vector containing needed info
5936 * returns true if ring is completely cleaned
5938 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
5940 struct igb_adapter *adapter = q_vector->adapter;
5941 struct igb_ring *tx_ring = q_vector->tx.ring;
5942 struct igb_tx_buffer *tx_buffer;
5943 union e1000_adv_tx_desc *tx_desc;
5944 unsigned int total_bytes = 0, total_packets = 0;
5945 unsigned int budget = q_vector->tx.work_limit;
5946 unsigned int i = tx_ring->next_to_clean;
5948 if (test_bit(__IGB_DOWN, &adapter->state))
5951 tx_buffer = &tx_ring->tx_buffer_info[i];
5952 tx_desc = IGB_TX_DESC(tx_ring, i);
5953 i -= tx_ring->count;
5956 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
5958 /* if next_to_watch is not set then there is no work pending */
5962 /* prevent any other reads prior to eop_desc */
5963 read_barrier_depends();
5965 /* if DD is not set pending work has not been completed */
5966 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
5969 /* clear next_to_watch to prevent false hangs */
5970 tx_buffer->next_to_watch = NULL;
5972 /* update the statistics for this packet */
5973 total_bytes += tx_buffer->bytecount;
5974 total_packets += tx_buffer->gso_segs;
5977 dev_kfree_skb_any(tx_buffer->skb);
5979 /* unmap skb header data */
5980 dma_unmap_single(tx_ring->dev,
5981 dma_unmap_addr(tx_buffer, dma),
5982 dma_unmap_len(tx_buffer, len),
5985 /* clear tx_buffer data */
5986 tx_buffer->skb = NULL;
5987 dma_unmap_len_set(tx_buffer, len, 0);
5989 /* clear last DMA location and unmap remaining buffers */
5990 while (tx_desc != eop_desc) {
5995 i -= tx_ring->count;
5996 tx_buffer = tx_ring->tx_buffer_info;
5997 tx_desc = IGB_TX_DESC(tx_ring, 0);
6000 /* unmap any remaining paged data */
6001 if (dma_unmap_len(tx_buffer, len)) {
6002 dma_unmap_page(tx_ring->dev,
6003 dma_unmap_addr(tx_buffer, dma),
6004 dma_unmap_len(tx_buffer, len),
6006 dma_unmap_len_set(tx_buffer, len, 0);
6010 /* move us one more past the eop_desc for start of next pkt */
6015 i -= tx_ring->count;
6016 tx_buffer = tx_ring->tx_buffer_info;
6017 tx_desc = IGB_TX_DESC(tx_ring, 0);
6020 /* issue prefetch for next Tx descriptor */
6023 /* update budget accounting */
6025 } while (likely(budget));
6027 netdev_tx_completed_queue(txring_txq(tx_ring),
6028 total_packets, total_bytes);
6029 i += tx_ring->count;
6030 tx_ring->next_to_clean = i;
6031 u64_stats_update_begin(&tx_ring->tx_syncp);
6032 tx_ring->tx_stats.bytes += total_bytes;
6033 tx_ring->tx_stats.packets += total_packets;
6034 u64_stats_update_end(&tx_ring->tx_syncp);
6035 q_vector->tx.total_bytes += total_bytes;
6036 q_vector->tx.total_packets += total_packets;
6038 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
6039 struct e1000_hw *hw = &adapter->hw;
6041 /* Detect a transmit hang in hardware, this serializes the
6042 * check with the clearing of time_stamp and movement of i
6044 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
6045 if (tx_buffer->next_to_watch &&
6046 time_after(jiffies, tx_buffer->time_stamp +
6047 (adapter->tx_timeout_factor * HZ)) &&
6048 !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
6050 /* detected Tx unit hang */
6051 dev_err(tx_ring->dev,
6052 "Detected Tx Unit Hang\n"
6056 " next_to_use <%x>\n"
6057 " next_to_clean <%x>\n"
6058 "buffer_info[next_to_clean]\n"
6059 " time_stamp <%lx>\n"
6060 " next_to_watch <%p>\n"
6062 " desc.status <%x>\n",
6063 tx_ring->queue_index,
6064 rd32(E1000_TDH(tx_ring->reg_idx)),
6065 readl(tx_ring->tail),
6066 tx_ring->next_to_use,
6067 tx_ring->next_to_clean,
6068 tx_buffer->time_stamp,
6069 tx_buffer->next_to_watch,
6071 tx_buffer->next_to_watch->wb.status);
6072 netif_stop_subqueue(tx_ring->netdev,
6073 tx_ring->queue_index);
6075 /* we are about to reset, no point in enabling stuff */
6080 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6081 if (unlikely(total_packets &&
6082 netif_carrier_ok(tx_ring->netdev) &&
6083 igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
6084 /* Make sure that anybody stopping the queue after this
6085 * sees the new next_to_clean.
6088 if (__netif_subqueue_stopped(tx_ring->netdev,
6089 tx_ring->queue_index) &&
6090 !(test_bit(__IGB_DOWN, &adapter->state))) {
6091 netif_wake_subqueue(tx_ring->netdev,
6092 tx_ring->queue_index);
6094 u64_stats_update_begin(&tx_ring->tx_syncp);
6095 tx_ring->tx_stats.restart_queue++;
6096 u64_stats_update_end(&tx_ring->tx_syncp);
6104 * igb_reuse_rx_page - page flip buffer and store it back on the ring
6105 * @rx_ring: rx descriptor ring to store buffers on
6106 * @old_buff: donor buffer to have page reused
6108 * Synchronizes page for reuse by the adapter
6110 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
6111 struct igb_rx_buffer *old_buff)
6113 struct igb_rx_buffer *new_buff;
6114 u16 nta = rx_ring->next_to_alloc;
6116 new_buff = &rx_ring->rx_buffer_info[nta];
6118 /* update, and store next to alloc */
6120 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
6122 /* transfer page from old buffer to new buffer */
6123 memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
6125 /* sync the buffer for use by the device */
6126 dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
6127 old_buff->page_offset,
6132 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
6134 unsigned int truesize)
6136 /* avoid re-using remote pages */
6137 if (unlikely(page_to_nid(page) != numa_node_id()))
6140 #if (PAGE_SIZE < 8192)
6141 /* if we are only owner of page we can reuse it */
6142 if (unlikely(page_count(page) != 1))
6145 /* flip page offset to other buffer */
6146 rx_buffer->page_offset ^= IGB_RX_BUFSZ;
6148 /* since we are the only owner of the page and we need to
6149 * increment it, just set the value to 2 in order to avoid
6150 * an unnecessary locked operation
6152 atomic_set(&page->_count, 2);
6154 /* move offset up to the next cache line */
6155 rx_buffer->page_offset += truesize;
6157 if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
6160 /* bump ref count on page before it is given to the stack */
6168 * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6169 * @rx_ring: rx descriptor ring to transact packets on
6170 * @rx_buffer: buffer containing page to add
6171 * @rx_desc: descriptor containing length of buffer written by hardware
6172 * @skb: sk_buff to place the data into
6174 * This function will add the data contained in rx_buffer->page to the skb.
6175 * This is done either through a direct copy if the data in the buffer is
6176 * less than the skb header size, otherwise it will just attach the page as
6177 * a frag to the skb.
6179 * The function will then update the page offset if necessary and return
6180 * true if the buffer can be reused by the adapter.
6182 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
6183 struct igb_rx_buffer *rx_buffer,
6184 union e1000_adv_rx_desc *rx_desc,
6185 struct sk_buff *skb)
6187 struct page *page = rx_buffer->page;
6188 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
6189 #if (PAGE_SIZE < 8192)
6190 unsigned int truesize = IGB_RX_BUFSZ;
6192 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
6195 if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
6196 unsigned char *va = page_address(page) + rx_buffer->page_offset;
6198 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6199 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6200 va += IGB_TS_HDR_LEN;
6201 size -= IGB_TS_HDR_LEN;
6204 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
6206 /* we can reuse buffer as-is, just make sure it is local */
6207 if (likely(page_to_nid(page) == numa_node_id()))
6210 /* this page cannot be reused so discard it */
6215 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
6216 rx_buffer->page_offset, size, truesize);
6218 return igb_can_reuse_rx_page(rx_buffer, page, truesize);
6221 static struct sk_buff *igb_build_rx_buffer(struct igb_ring *rx_ring,
6222 union e1000_adv_rx_desc *rx_desc)
6224 struct igb_rx_buffer *rx_buffer;
6225 struct sk_buff *skb;
6228 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
6229 #if (PAGE_SIZE < 8192)
6230 unsigned int truesize = IGB_RX_BUFSZ;
6232 unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
6233 SKB_DATA_ALIGN(NET_SKB_PAD +
6238 /* If we spanned a buffer we have a huge mess so test for it */
6239 BUG_ON(unlikely(!igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)));
6241 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
6242 page = rx_buffer->page;
6245 page_addr = page_address(page) + rx_buffer->page_offset;
6247 /* prefetch first cache line of first page */
6248 prefetch(page_addr + NET_SKB_PAD + NET_IP_ALIGN);
6249 #if L1_CACHE_BYTES < 128
6250 prefetch(page_addr + L1_CACHE_BYTES + NET_SKB_PAD + NET_IP_ALIGN);
6253 /* build an skb to around the page buffer */
6254 skb = build_skb(page_addr, truesize);
6255 if (unlikely(!skb)) {
6256 rx_ring->rx_stats.alloc_failed++;
6260 /* we are reusing so sync this buffer for CPU use */
6261 dma_sync_single_range_for_cpu(rx_ring->dev,
6263 rx_buffer->page_offset,
6267 /* update pointers within the skb to store the data */
6268 skb_reserve(skb, NET_IP_ALIGN + NET_SKB_PAD);
6269 __skb_put(skb, size);
6271 /* pull timestamp out of packet data */
6272 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6273 igb_ptp_rx_pktstamp(rx_ring->q_vector, skb->data, skb);
6274 __skb_pull(skb, IGB_TS_HDR_LEN);
6277 if (igb_can_reuse_rx_page(rx_buffer, page, truesize)) {
6278 /* hand second half of page back to the ring */
6279 igb_reuse_rx_page(rx_ring, rx_buffer);
6281 /* we are not reusing the buffer so unmap it */
6282 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
6283 PAGE_SIZE, DMA_FROM_DEVICE);
6286 /* clear contents of buffer_info */
6288 rx_buffer->page = NULL;
6293 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
6294 union e1000_adv_rx_desc *rx_desc,
6295 struct sk_buff *skb)
6297 struct igb_rx_buffer *rx_buffer;
6300 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
6302 page = rx_buffer->page;
6306 void *page_addr = page_address(page) +
6307 rx_buffer->page_offset;
6309 /* prefetch first cache line of first page */
6310 prefetch(page_addr);
6311 #if L1_CACHE_BYTES < 128
6312 prefetch(page_addr + L1_CACHE_BYTES);
6315 /* allocate a skb to store the frags */
6316 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
6318 if (unlikely(!skb)) {
6319 rx_ring->rx_stats.alloc_failed++;
6323 /* we will be copying header into skb->data in
6324 * pskb_may_pull so it is in our interest to prefetch
6325 * it now to avoid a possible cache miss
6327 prefetchw(skb->data);
6330 /* we are reusing so sync this buffer for CPU use */
6331 dma_sync_single_range_for_cpu(rx_ring->dev,
6333 rx_buffer->page_offset,
6337 /* pull page into skb */
6338 if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
6339 /* hand second half of page back to the ring */
6340 igb_reuse_rx_page(rx_ring, rx_buffer);
6342 /* we are not reusing the buffer so unmap it */
6343 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
6344 PAGE_SIZE, DMA_FROM_DEVICE);
6347 /* clear contents of rx_buffer */
6348 rx_buffer->page = NULL;
6353 static inline void igb_rx_checksum(struct igb_ring *ring,
6354 union e1000_adv_rx_desc *rx_desc,
6355 struct sk_buff *skb)
6357 skb_checksum_none_assert(skb);
6359 /* Ignore Checksum bit is set */
6360 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
6363 /* Rx checksum disabled via ethtool */
6364 if (!(ring->netdev->features & NETIF_F_RXCSUM))
6367 /* TCP/UDP checksum error bit is set */
6368 if (igb_test_staterr(rx_desc,
6369 E1000_RXDEXT_STATERR_TCPE |
6370 E1000_RXDEXT_STATERR_IPE)) {
6371 /* work around errata with sctp packets where the TCPE aka
6372 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6373 * packets, (aka let the stack check the crc32c)
6375 if (!((skb->len == 60) &&
6376 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
6377 u64_stats_update_begin(&ring->rx_syncp);
6378 ring->rx_stats.csum_err++;
6379 u64_stats_update_end(&ring->rx_syncp);
6381 /* let the stack verify checksum errors */
6384 /* It must be a TCP or UDP packet with a valid checksum */
6385 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
6386 E1000_RXD_STAT_UDPCS))
6387 skb->ip_summed = CHECKSUM_UNNECESSARY;
6389 dev_dbg(ring->dev, "cksum success: bits %08X\n",
6390 le32_to_cpu(rx_desc->wb.upper.status_error));
6393 static inline void igb_rx_hash(struct igb_ring *ring,
6394 union e1000_adv_rx_desc *rx_desc,
6395 struct sk_buff *skb)
6397 if (ring->netdev->features & NETIF_F_RXHASH)
6398 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
6402 * igb_is_non_eop - process handling of non-EOP buffers
6403 * @rx_ring: Rx ring being processed
6404 * @rx_desc: Rx descriptor for current buffer
6405 * @skb: current socket buffer containing buffer in progress
6407 * This function updates next to clean. If the buffer is an EOP buffer
6408 * this function exits returning false, otherwise it will place the
6409 * sk_buff in the next buffer to be chained and return true indicating
6410 * that this is in fact a non-EOP buffer.
6412 static bool igb_is_non_eop(struct igb_ring *rx_ring,
6413 union e1000_adv_rx_desc *rx_desc)
6415 u32 ntc = rx_ring->next_to_clean + 1;
6417 /* fetch, update, and store next to clean */
6418 ntc = (ntc < rx_ring->count) ? ntc : 0;
6419 rx_ring->next_to_clean = ntc;
6421 prefetch(IGB_RX_DESC(rx_ring, ntc));
6423 if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
6430 * igb_get_headlen - determine size of header for LRO/GRO
6431 * @data: pointer to the start of the headers
6432 * @max_len: total length of section to find headers in
6434 * This function is meant to determine the length of headers that will
6435 * be recognized by hardware for LRO, and GRO offloads. The main
6436 * motivation of doing this is to only perform one pull for IPv4 TCP
6437 * packets so that we can do basic things like calculating the gso_size
6438 * based on the average data per packet.
6440 static unsigned int igb_get_headlen(unsigned char *data,
6441 unsigned int max_len)
6444 unsigned char *network;
6447 struct vlan_hdr *vlan;
6450 struct ipv6hdr *ipv6;
6453 u8 nexthdr = 0; /* default to not TCP */
6456 /* this should never happen, but better safe than sorry */
6457 if (max_len < ETH_HLEN)
6460 /* initialize network frame pointer */
6463 /* set first protocol and move network header forward */
6464 protocol = hdr.eth->h_proto;
6465 hdr.network += ETH_HLEN;
6467 /* handle any vlan tag if present */
6468 if (protocol == __constant_htons(ETH_P_8021Q)) {
6469 if ((hdr.network - data) > (max_len - VLAN_HLEN))
6472 protocol = hdr.vlan->h_vlan_encapsulated_proto;
6473 hdr.network += VLAN_HLEN;
6476 /* handle L3 protocols */
6477 if (protocol == __constant_htons(ETH_P_IP)) {
6478 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
6481 /* access ihl as a u8 to avoid unaligned access on ia64 */
6482 hlen = (hdr.network[0] & 0x0F) << 2;
6484 /* verify hlen meets minimum size requirements */
6485 if (hlen < sizeof(struct iphdr))
6486 return hdr.network - data;
6488 /* record next protocol if header is present */
6489 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
6490 nexthdr = hdr.ipv4->protocol;
6491 } else if (protocol == __constant_htons(ETH_P_IPV6)) {
6492 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
6495 /* record next protocol */
6496 nexthdr = hdr.ipv6->nexthdr;
6497 hlen = sizeof(struct ipv6hdr);
6499 return hdr.network - data;
6502 /* relocate pointer to start of L4 header */
6503 hdr.network += hlen;
6505 /* finally sort out TCP */
6506 if (nexthdr == IPPROTO_TCP) {
6507 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
6510 /* access doff as a u8 to avoid unaligned access on ia64 */
6511 hlen = (hdr.network[12] & 0xF0) >> 2;
6513 /* verify hlen meets minimum size requirements */
6514 if (hlen < sizeof(struct tcphdr))
6515 return hdr.network - data;
6517 hdr.network += hlen;
6518 } else if (nexthdr == IPPROTO_UDP) {
6519 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
6522 hdr.network += sizeof(struct udphdr);
6525 /* If everything has gone correctly hdr.network should be the
6526 * data section of the packet and will be the end of the header.
6527 * If not then it probably represents the end of the last recognized
6530 if ((hdr.network - data) < max_len)
6531 return hdr.network - data;
6537 * igb_pull_tail - igb specific version of skb_pull_tail
6538 * @rx_ring: rx descriptor ring packet is being transacted on
6539 * @rx_desc: pointer to the EOP Rx descriptor
6540 * @skb: pointer to current skb being adjusted
6542 * This function is an igb specific version of __pskb_pull_tail. The
6543 * main difference between this version and the original function is that
6544 * this function can make several assumptions about the state of things
6545 * that allow for significant optimizations versus the standard function.
6546 * As a result we can do things like drop a frag and maintain an accurate
6547 * truesize for the skb.
6549 static void igb_pull_tail(struct igb_ring *rx_ring,
6550 union e1000_adv_rx_desc *rx_desc,
6551 struct sk_buff *skb)
6553 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
6555 unsigned int pull_len;
6557 /* it is valid to use page_address instead of kmap since we are
6558 * working with pages allocated out of the lomem pool per
6559 * alloc_page(GFP_ATOMIC)
6561 va = skb_frag_address(frag);
6563 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6564 /* retrieve timestamp from buffer */
6565 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6567 /* update pointers to remove timestamp header */
6568 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
6569 frag->page_offset += IGB_TS_HDR_LEN;
6570 skb->data_len -= IGB_TS_HDR_LEN;
6571 skb->len -= IGB_TS_HDR_LEN;
6573 /* move va to start of packet data */
6574 va += IGB_TS_HDR_LEN;
6577 /* we need the header to contain the greater of either ETH_HLEN or
6578 * 60 bytes if the skb->len is less than 60 for skb_pad.
6580 pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
6582 /* align pull length to size of long to optimize memcpy performance */
6583 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
6585 /* update all of the pointers */
6586 skb_frag_size_sub(frag, pull_len);
6587 frag->page_offset += pull_len;
6588 skb->data_len -= pull_len;
6589 skb->tail += pull_len;
6593 * igb_cleanup_headers - Correct corrupted or empty headers
6594 * @rx_ring: rx descriptor ring packet is being transacted on
6595 * @rx_desc: pointer to the EOP Rx descriptor
6596 * @skb: pointer to current skb being fixed
6598 * Address the case where we are pulling data in on pages only
6599 * and as such no data is present in the skb header.
6601 * In addition if skb is not at least 60 bytes we need to pad it so that
6602 * it is large enough to qualify as a valid Ethernet frame.
6604 * Returns true if an error was encountered and skb was freed.
6606 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
6607 union e1000_adv_rx_desc *rx_desc,
6608 struct sk_buff *skb)
6610 if (unlikely((igb_test_staterr(rx_desc,
6611 E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
6612 struct net_device *netdev = rx_ring->netdev;
6613 if (!(netdev->features & NETIF_F_RXALL)) {
6614 dev_kfree_skb_any(skb);
6619 /* place header in linear portion of buffer */
6620 if (skb_is_nonlinear(skb))
6621 igb_pull_tail(rx_ring, rx_desc, skb);
6623 /* if skb_pad returns an error the skb was freed */
6624 if (unlikely(skb->len < 60)) {
6625 int pad_len = 60 - skb->len;
6627 if (skb_pad(skb, pad_len))
6629 __skb_put(skb, pad_len);
6636 * igb_process_skb_fields - Populate skb header fields from Rx descriptor
6637 * @rx_ring: rx descriptor ring packet is being transacted on
6638 * @rx_desc: pointer to the EOP Rx descriptor
6639 * @skb: pointer to current skb being populated
6641 * This function checks the ring, descriptor, and packet information in
6642 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
6643 * other fields within the skb.
6645 static void igb_process_skb_fields(struct igb_ring *rx_ring,
6646 union e1000_adv_rx_desc *rx_desc,
6647 struct sk_buff *skb)
6649 struct net_device *dev = rx_ring->netdev;
6651 igb_rx_hash(rx_ring, rx_desc, skb);
6653 igb_rx_checksum(rx_ring, rx_desc, skb);
6655 igb_ptp_rx_hwtstamp(rx_ring->q_vector, rx_desc, skb);
6657 if ((dev->features & NETIF_F_HW_VLAN_RX) &&
6658 igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
6660 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
6661 test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
6662 vid = be16_to_cpu(rx_desc->wb.upper.vlan);
6664 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
6666 __vlan_hwaccel_put_tag(skb, vid);
6669 skb_record_rx_queue(skb, rx_ring->queue_index);
6671 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
6674 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
6676 struct igb_ring *rx_ring = q_vector->rx.ring;
6677 struct sk_buff *skb = rx_ring->skb;
6678 unsigned int total_bytes = 0, total_packets = 0;
6679 u16 cleaned_count = igb_desc_unused(rx_ring);
6682 union e1000_adv_rx_desc *rx_desc;
6684 /* return some buffers to hardware, one at a time is too slow */
6685 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
6686 igb_alloc_rx_buffers(rx_ring, cleaned_count);
6690 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
6692 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
6695 /* This memory barrier is needed to keep us from reading
6696 * any other fields out of the rx_desc until we know the
6697 * RXD_STAT_DD bit is set
6701 /* retrieve a buffer from the ring */
6702 if (ring_uses_build_skb(rx_ring))
6703 skb = igb_build_rx_buffer(rx_ring, rx_desc);
6705 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
6707 /* exit if we failed to retrieve a buffer */
6713 /* fetch next buffer in frame if non-eop */
6714 if (igb_is_non_eop(rx_ring, rx_desc))
6717 /* verify the packet layout is correct */
6718 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
6723 /* probably a little skewed due to removing CRC */
6724 total_bytes += skb->len;
6726 /* populate checksum, timestamp, VLAN, and protocol */
6727 igb_process_skb_fields(rx_ring, rx_desc, skb);
6729 napi_gro_receive(&q_vector->napi, skb);
6731 /* reset skb pointer */
6734 /* update budget accounting */
6736 } while (likely(total_packets < budget));
6738 /* place incomplete frames back on ring for completion */
6741 u64_stats_update_begin(&rx_ring->rx_syncp);
6742 rx_ring->rx_stats.packets += total_packets;
6743 rx_ring->rx_stats.bytes += total_bytes;
6744 u64_stats_update_end(&rx_ring->rx_syncp);
6745 q_vector->rx.total_packets += total_packets;
6746 q_vector->rx.total_bytes += total_bytes;
6749 igb_alloc_rx_buffers(rx_ring, cleaned_count);
6751 return (total_packets < budget);
6754 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
6755 struct igb_rx_buffer *bi)
6757 struct page *page = bi->page;
6760 /* since we are recycling buffers we should seldom need to alloc */
6764 /* alloc new page for storage */
6765 page = __skb_alloc_page(GFP_ATOMIC | __GFP_COLD, NULL);
6766 if (unlikely(!page)) {
6767 rx_ring->rx_stats.alloc_failed++;
6771 /* map page for use */
6772 dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
6774 /* if mapping failed free memory back to system since
6775 * there isn't much point in holding memory we can't use
6777 if (dma_mapping_error(rx_ring->dev, dma)) {
6780 rx_ring->rx_stats.alloc_failed++;
6786 bi->page_offset = 0;
6791 static inline unsigned int igb_rx_offset(struct igb_ring *rx_ring)
6793 if (ring_uses_build_skb(rx_ring))
6794 return NET_SKB_PAD + NET_IP_ALIGN;
6800 * igb_alloc_rx_buffers - Replace used receive buffers; packet split
6801 * @adapter: address of board private structure
6803 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
6805 union e1000_adv_rx_desc *rx_desc;
6806 struct igb_rx_buffer *bi;
6807 u16 i = rx_ring->next_to_use;
6813 rx_desc = IGB_RX_DESC(rx_ring, i);
6814 bi = &rx_ring->rx_buffer_info[i];
6815 i -= rx_ring->count;
6818 if (!igb_alloc_mapped_page(rx_ring, bi))
6821 /* Refresh the desc even if buffer_addrs didn't change
6822 * because each write-back erases this info.
6824 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma +
6826 igb_rx_offset(rx_ring));
6832 rx_desc = IGB_RX_DESC(rx_ring, 0);
6833 bi = rx_ring->rx_buffer_info;
6834 i -= rx_ring->count;
6837 /* clear the hdr_addr for the next_to_use descriptor */
6838 rx_desc->read.hdr_addr = 0;
6841 } while (cleaned_count);
6843 i += rx_ring->count;
6845 if (rx_ring->next_to_use != i) {
6846 /* record the next descriptor to use */
6847 rx_ring->next_to_use = i;
6849 /* update next to alloc since we have filled the ring */
6850 rx_ring->next_to_alloc = i;
6852 /* Force memory writes to complete before letting h/w
6853 * know there are new descriptors to fetch. (Only
6854 * applicable for weak-ordered memory model archs,
6858 writel(i, rx_ring->tail);
6868 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6870 struct igb_adapter *adapter = netdev_priv(netdev);
6871 struct mii_ioctl_data *data = if_mii(ifr);
6873 if (adapter->hw.phy.media_type != e1000_media_type_copper)
6878 data->phy_id = adapter->hw.phy.addr;
6881 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
6898 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6904 return igb_mii_ioctl(netdev, ifr, cmd);
6906 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
6912 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
6914 struct igb_adapter *adapter = hw->back;
6916 if (pcie_capability_read_word(adapter->pdev, reg, value))
6917 return -E1000_ERR_CONFIG;
6922 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
6924 struct igb_adapter *adapter = hw->back;
6926 if (pcie_capability_write_word(adapter->pdev, reg, *value))
6927 return -E1000_ERR_CONFIG;
6932 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
6934 struct igb_adapter *adapter = netdev_priv(netdev);
6935 struct e1000_hw *hw = &adapter->hw;
6937 bool enable = !!(features & NETIF_F_HW_VLAN_RX);
6940 /* enable VLAN tag insert/strip */
6941 ctrl = rd32(E1000_CTRL);
6942 ctrl |= E1000_CTRL_VME;
6943 wr32(E1000_CTRL, ctrl);
6945 /* Disable CFI check */
6946 rctl = rd32(E1000_RCTL);
6947 rctl &= ~E1000_RCTL_CFIEN;
6948 wr32(E1000_RCTL, rctl);
6950 /* disable VLAN tag insert/strip */
6951 ctrl = rd32(E1000_CTRL);
6952 ctrl &= ~E1000_CTRL_VME;
6953 wr32(E1000_CTRL, ctrl);
6956 igb_rlpml_set(adapter);
6959 static int igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
6961 struct igb_adapter *adapter = netdev_priv(netdev);
6962 struct e1000_hw *hw = &adapter->hw;
6963 int pf_id = adapter->vfs_allocated_count;
6965 /* attempt to add filter to vlvf array */
6966 igb_vlvf_set(adapter, vid, true, pf_id);
6968 /* add the filter since PF can receive vlans w/o entry in vlvf */
6969 igb_vfta_set(hw, vid, true);
6971 set_bit(vid, adapter->active_vlans);
6976 static int igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
6978 struct igb_adapter *adapter = netdev_priv(netdev);
6979 struct e1000_hw *hw = &adapter->hw;
6980 int pf_id = adapter->vfs_allocated_count;
6983 /* remove vlan from VLVF table array */
6984 err = igb_vlvf_set(adapter, vid, false, pf_id);
6986 /* if vid was not present in VLVF just remove it from table */
6988 igb_vfta_set(hw, vid, false);
6990 clear_bit(vid, adapter->active_vlans);
6995 static void igb_restore_vlan(struct igb_adapter *adapter)
6999 igb_vlan_mode(adapter->netdev, adapter->netdev->features);
7001 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
7002 igb_vlan_rx_add_vid(adapter->netdev, vid);
7005 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
7007 struct pci_dev *pdev = adapter->pdev;
7008 struct e1000_mac_info *mac = &adapter->hw.mac;
7012 /* Make sure dplx is at most 1 bit and lsb of speed is not set
7013 * for the switch() below to work
7015 if ((spd & 1) || (dplx & ~1))
7018 /* Fiber NIC's only allow 1000 gbps Full duplex
7019 * and 100Mbps Full duplex for 100baseFx sfp
7021 if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
7022 switch (spd + dplx) {
7023 case SPEED_10 + DUPLEX_HALF:
7024 case SPEED_10 + DUPLEX_FULL:
7025 case SPEED_100 + DUPLEX_HALF:
7032 switch (spd + dplx) {
7033 case SPEED_10 + DUPLEX_HALF:
7034 mac->forced_speed_duplex = ADVERTISE_10_HALF;
7036 case SPEED_10 + DUPLEX_FULL:
7037 mac->forced_speed_duplex = ADVERTISE_10_FULL;
7039 case SPEED_100 + DUPLEX_HALF:
7040 mac->forced_speed_duplex = ADVERTISE_100_HALF;
7042 case SPEED_100 + DUPLEX_FULL:
7043 mac->forced_speed_duplex = ADVERTISE_100_FULL;
7045 case SPEED_1000 + DUPLEX_FULL:
7047 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
7049 case SPEED_1000 + DUPLEX_HALF: /* not supported */
7054 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7055 adapter->hw.phy.mdix = AUTO_ALL_MODES;
7060 dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
7064 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
7067 struct net_device *netdev = pci_get_drvdata(pdev);
7068 struct igb_adapter *adapter = netdev_priv(netdev);
7069 struct e1000_hw *hw = &adapter->hw;
7070 u32 ctrl, rctl, status;
7071 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
7076 netif_device_detach(netdev);
7078 if (netif_running(netdev))
7079 __igb_close(netdev, true);
7081 igb_clear_interrupt_scheme(adapter);
7084 retval = pci_save_state(pdev);
7089 status = rd32(E1000_STATUS);
7090 if (status & E1000_STATUS_LU)
7091 wufc &= ~E1000_WUFC_LNKC;
7094 igb_setup_rctl(adapter);
7095 igb_set_rx_mode(netdev);
7097 /* turn on all-multi mode if wake on multicast is enabled */
7098 if (wufc & E1000_WUFC_MC) {
7099 rctl = rd32(E1000_RCTL);
7100 rctl |= E1000_RCTL_MPE;
7101 wr32(E1000_RCTL, rctl);
7104 ctrl = rd32(E1000_CTRL);
7105 /* advertise wake from D3Cold */
7106 #define E1000_CTRL_ADVD3WUC 0x00100000
7107 /* phy power management enable */
7108 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7109 ctrl |= E1000_CTRL_ADVD3WUC;
7110 wr32(E1000_CTRL, ctrl);
7112 /* Allow time for pending master requests to run */
7113 igb_disable_pcie_master(hw);
7115 wr32(E1000_WUC, E1000_WUC_PME_EN);
7116 wr32(E1000_WUFC, wufc);
7119 wr32(E1000_WUFC, 0);
7122 *enable_wake = wufc || adapter->en_mng_pt;
7124 igb_power_down_link(adapter);
7126 igb_power_up_link(adapter);
7128 /* Release control of h/w to f/w. If f/w is AMT enabled, this
7129 * would have already happened in close and is redundant.
7131 igb_release_hw_control(adapter);
7133 pci_disable_device(pdev);
7139 #ifdef CONFIG_PM_SLEEP
7140 static int igb_suspend(struct device *dev)
7144 struct pci_dev *pdev = to_pci_dev(dev);
7146 retval = __igb_shutdown(pdev, &wake, 0);
7151 pci_prepare_to_sleep(pdev);
7153 pci_wake_from_d3(pdev, false);
7154 pci_set_power_state(pdev, PCI_D3hot);
7159 #endif /* CONFIG_PM_SLEEP */
7161 static int igb_resume(struct device *dev)
7163 struct pci_dev *pdev = to_pci_dev(dev);
7164 struct net_device *netdev = pci_get_drvdata(pdev);
7165 struct igb_adapter *adapter = netdev_priv(netdev);
7166 struct e1000_hw *hw = &adapter->hw;
7169 pci_set_power_state(pdev, PCI_D0);
7170 pci_restore_state(pdev);
7171 pci_save_state(pdev);
7173 err = pci_enable_device_mem(pdev);
7176 "igb: Cannot enable PCI device from suspend\n");
7179 pci_set_master(pdev);
7181 pci_enable_wake(pdev, PCI_D3hot, 0);
7182 pci_enable_wake(pdev, PCI_D3cold, 0);
7184 if (igb_init_interrupt_scheme(adapter, true)) {
7185 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7191 /* let the f/w know that the h/w is now under the control of the
7194 igb_get_hw_control(adapter);
7196 wr32(E1000_WUS, ~0);
7198 if (netdev->flags & IFF_UP) {
7200 err = __igb_open(netdev, true);
7206 netif_device_attach(netdev);
7210 #ifdef CONFIG_PM_RUNTIME
7211 static int igb_runtime_idle(struct device *dev)
7213 struct pci_dev *pdev = to_pci_dev(dev);
7214 struct net_device *netdev = pci_get_drvdata(pdev);
7215 struct igb_adapter *adapter = netdev_priv(netdev);
7217 if (!igb_has_link(adapter))
7218 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
7223 static int igb_runtime_suspend(struct device *dev)
7225 struct pci_dev *pdev = to_pci_dev(dev);
7229 retval = __igb_shutdown(pdev, &wake, 1);
7234 pci_prepare_to_sleep(pdev);
7236 pci_wake_from_d3(pdev, false);
7237 pci_set_power_state(pdev, PCI_D3hot);
7243 static int igb_runtime_resume(struct device *dev)
7245 return igb_resume(dev);
7247 #endif /* CONFIG_PM_RUNTIME */
7250 static void igb_shutdown(struct pci_dev *pdev)
7254 __igb_shutdown(pdev, &wake, 0);
7256 if (system_state == SYSTEM_POWER_OFF) {
7257 pci_wake_from_d3(pdev, wake);
7258 pci_set_power_state(pdev, PCI_D3hot);
7262 #ifdef CONFIG_PCI_IOV
7263 static int igb_sriov_reinit(struct pci_dev *dev)
7265 struct net_device *netdev = pci_get_drvdata(dev);
7266 struct igb_adapter *adapter = netdev_priv(netdev);
7267 struct pci_dev *pdev = adapter->pdev;
7271 if (netif_running(netdev))
7274 igb_clear_interrupt_scheme(adapter);
7276 igb_init_queue_configuration(adapter);
7278 if (igb_init_interrupt_scheme(adapter, true)) {
7279 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7283 if (netif_running(netdev))
7291 static int igb_pci_disable_sriov(struct pci_dev *dev)
7293 int err = igb_disable_sriov(dev);
7296 err = igb_sriov_reinit(dev);
7301 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
7303 int err = igb_enable_sriov(dev, num_vfs);
7308 err = igb_sriov_reinit(dev);
7317 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
7319 #ifdef CONFIG_PCI_IOV
7321 return igb_pci_disable_sriov(dev);
7323 return igb_pci_enable_sriov(dev, num_vfs);
7328 #ifdef CONFIG_NET_POLL_CONTROLLER
7329 /* Polling 'interrupt' - used by things like netconsole to send skbs
7330 * without having to re-enable interrupts. It's not called while
7331 * the interrupt routine is executing.
7333 static void igb_netpoll(struct net_device *netdev)
7335 struct igb_adapter *adapter = netdev_priv(netdev);
7336 struct e1000_hw *hw = &adapter->hw;
7337 struct igb_q_vector *q_vector;
7340 for (i = 0; i < adapter->num_q_vectors; i++) {
7341 q_vector = adapter->q_vector[i];
7342 if (adapter->msix_entries)
7343 wr32(E1000_EIMC, q_vector->eims_value);
7345 igb_irq_disable(adapter);
7346 napi_schedule(&q_vector->napi);
7349 #endif /* CONFIG_NET_POLL_CONTROLLER */
7352 * igb_io_error_detected - called when PCI error is detected
7353 * @pdev: Pointer to PCI device
7354 * @state: The current pci connection state
7356 * This function is called after a PCI bus error affecting
7357 * this device has been detected.
7359 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
7360 pci_channel_state_t state)
7362 struct net_device *netdev = pci_get_drvdata(pdev);
7363 struct igb_adapter *adapter = netdev_priv(netdev);
7365 netif_device_detach(netdev);
7367 if (state == pci_channel_io_perm_failure)
7368 return PCI_ERS_RESULT_DISCONNECT;
7370 if (netif_running(netdev))
7372 pci_disable_device(pdev);
7374 /* Request a slot slot reset. */
7375 return PCI_ERS_RESULT_NEED_RESET;
7379 * igb_io_slot_reset - called after the pci bus has been reset.
7380 * @pdev: Pointer to PCI device
7382 * Restart the card from scratch, as if from a cold-boot. Implementation
7383 * resembles the first-half of the igb_resume routine.
7385 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
7387 struct net_device *netdev = pci_get_drvdata(pdev);
7388 struct igb_adapter *adapter = netdev_priv(netdev);
7389 struct e1000_hw *hw = &adapter->hw;
7390 pci_ers_result_t result;
7393 if (pci_enable_device_mem(pdev)) {
7395 "Cannot re-enable PCI device after reset.\n");
7396 result = PCI_ERS_RESULT_DISCONNECT;
7398 pci_set_master(pdev);
7399 pci_restore_state(pdev);
7400 pci_save_state(pdev);
7402 pci_enable_wake(pdev, PCI_D3hot, 0);
7403 pci_enable_wake(pdev, PCI_D3cold, 0);
7406 wr32(E1000_WUS, ~0);
7407 result = PCI_ERS_RESULT_RECOVERED;
7410 err = pci_cleanup_aer_uncorrect_error_status(pdev);
7413 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7415 /* non-fatal, continue */
7422 * igb_io_resume - called when traffic can start flowing again.
7423 * @pdev: Pointer to PCI device
7425 * This callback is called when the error recovery driver tells us that
7426 * its OK to resume normal operation. Implementation resembles the
7427 * second-half of the igb_resume routine.
7429 static void igb_io_resume(struct pci_dev *pdev)
7431 struct net_device *netdev = pci_get_drvdata(pdev);
7432 struct igb_adapter *adapter = netdev_priv(netdev);
7434 if (netif_running(netdev)) {
7435 if (igb_up(adapter)) {
7436 dev_err(&pdev->dev, "igb_up failed after reset\n");
7441 netif_device_attach(netdev);
7443 /* let the f/w know that the h/w is now under the control of the
7446 igb_get_hw_control(adapter);
7449 static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
7452 u32 rar_low, rar_high;
7453 struct e1000_hw *hw = &adapter->hw;
7455 /* HW expects these in little endian so we reverse the byte order
7456 * from network order (big endian) to little endian
7458 rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
7459 ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
7460 rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
7462 /* Indicate to hardware the Address is Valid. */
7463 rar_high |= E1000_RAH_AV;
7465 if (hw->mac.type == e1000_82575)
7466 rar_high |= E1000_RAH_POOL_1 * qsel;
7468 rar_high |= E1000_RAH_POOL_1 << qsel;
7470 wr32(E1000_RAL(index), rar_low);
7472 wr32(E1000_RAH(index), rar_high);
7476 static int igb_set_vf_mac(struct igb_adapter *adapter,
7477 int vf, unsigned char *mac_addr)
7479 struct e1000_hw *hw = &adapter->hw;
7480 /* VF MAC addresses start at end of receive addresses and moves
7481 * towards the first, as a result a collision should not be possible
7483 int rar_entry = hw->mac.rar_entry_count - (vf + 1);
7485 memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
7487 igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
7492 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
7494 struct igb_adapter *adapter = netdev_priv(netdev);
7495 if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
7497 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
7498 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
7499 dev_info(&adapter->pdev->dev,
7500 "Reload the VF driver to make this change effective.");
7501 if (test_bit(__IGB_DOWN, &adapter->state)) {
7502 dev_warn(&adapter->pdev->dev,
7503 "The VF MAC address has been set, but the PF device is not up.\n");
7504 dev_warn(&adapter->pdev->dev,
7505 "Bring the PF device up before attempting to use the VF device.\n");
7507 return igb_set_vf_mac(adapter, vf, mac);
7510 static int igb_link_mbps(int internal_link_speed)
7512 switch (internal_link_speed) {
7522 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
7529 /* Calculate the rate factor values to set */
7530 rf_int = link_speed / tx_rate;
7531 rf_dec = (link_speed - (rf_int * tx_rate));
7532 rf_dec = (rf_dec * (1 << E1000_RTTBCNRC_RF_INT_SHIFT)) /
7535 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
7536 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
7537 E1000_RTTBCNRC_RF_INT_MASK);
7538 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
7543 wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
7544 /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7545 * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7547 wr32(E1000_RTTBCNRM, 0x14);
7548 wr32(E1000_RTTBCNRC, bcnrc_val);
7551 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
7553 int actual_link_speed, i;
7554 bool reset_rate = false;
7556 /* VF TX rate limit was not set or not supported */
7557 if ((adapter->vf_rate_link_speed == 0) ||
7558 (adapter->hw.mac.type != e1000_82576))
7561 actual_link_speed = igb_link_mbps(adapter->link_speed);
7562 if (actual_link_speed != adapter->vf_rate_link_speed) {
7564 adapter->vf_rate_link_speed = 0;
7565 dev_info(&adapter->pdev->dev,
7566 "Link speed has been changed. VF Transmit rate is disabled\n");
7569 for (i = 0; i < adapter->vfs_allocated_count; i++) {
7571 adapter->vf_data[i].tx_rate = 0;
7573 igb_set_vf_rate_limit(&adapter->hw, i,
7574 adapter->vf_data[i].tx_rate,
7579 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
7581 struct igb_adapter *adapter = netdev_priv(netdev);
7582 struct e1000_hw *hw = &adapter->hw;
7583 int actual_link_speed;
7585 if (hw->mac.type != e1000_82576)
7588 actual_link_speed = igb_link_mbps(adapter->link_speed);
7589 if ((vf >= adapter->vfs_allocated_count) ||
7590 (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
7591 (tx_rate < 0) || (tx_rate > actual_link_speed))
7594 adapter->vf_rate_link_speed = actual_link_speed;
7595 adapter->vf_data[vf].tx_rate = (u16)tx_rate;
7596 igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
7601 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
7604 struct igb_adapter *adapter = netdev_priv(netdev);
7605 struct e1000_hw *hw = &adapter->hw;
7606 u32 reg_val, reg_offset;
7608 if (!adapter->vfs_allocated_count)
7611 if (vf >= adapter->vfs_allocated_count)
7614 reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
7615 reg_val = rd32(reg_offset);
7617 reg_val |= ((1 << vf) |
7618 (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7620 reg_val &= ~((1 << vf) |
7621 (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7622 wr32(reg_offset, reg_val);
7624 adapter->vf_data[vf].spoofchk_enabled = setting;
7625 return E1000_SUCCESS;
7628 static int igb_ndo_get_vf_config(struct net_device *netdev,
7629 int vf, struct ifla_vf_info *ivi)
7631 struct igb_adapter *adapter = netdev_priv(netdev);
7632 if (vf >= adapter->vfs_allocated_count)
7635 memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
7636 ivi->tx_rate = adapter->vf_data[vf].tx_rate;
7637 ivi->vlan = adapter->vf_data[vf].pf_vlan;
7638 ivi->qos = adapter->vf_data[vf].pf_qos;
7639 ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
7643 static void igb_vmm_control(struct igb_adapter *adapter)
7645 struct e1000_hw *hw = &adapter->hw;
7648 switch (hw->mac.type) {
7653 /* replication is not supported for 82575 */
7656 /* notify HW that the MAC is adding vlan tags */
7657 reg = rd32(E1000_DTXCTL);
7658 reg |= E1000_DTXCTL_VLAN_ADDED;
7659 wr32(E1000_DTXCTL, reg);
7661 /* enable replication vlan tag stripping */
7662 reg = rd32(E1000_RPLOLR);
7663 reg |= E1000_RPLOLR_STRVLAN;
7664 wr32(E1000_RPLOLR, reg);
7666 /* none of the above registers are supported by i350 */
7670 if (adapter->vfs_allocated_count) {
7671 igb_vmdq_set_loopback_pf(hw, true);
7672 igb_vmdq_set_replication_pf(hw, true);
7673 igb_vmdq_set_anti_spoofing_pf(hw, true,
7674 adapter->vfs_allocated_count);
7676 igb_vmdq_set_loopback_pf(hw, false);
7677 igb_vmdq_set_replication_pf(hw, false);
7681 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
7683 struct e1000_hw *hw = &adapter->hw;
7687 if (hw->mac.type > e1000_82580) {
7688 if (adapter->flags & IGB_FLAG_DMAC) {
7691 /* force threshold to 0. */
7692 wr32(E1000_DMCTXTH, 0);
7694 /* DMA Coalescing high water mark needs to be greater
7695 * than the Rx threshold. Set hwm to PBA - max frame
7696 * size in 16B units, capping it at PBA - 6KB.
7698 hwm = 64 * pba - adapter->max_frame_size / 16;
7699 if (hwm < 64 * (pba - 6))
7700 hwm = 64 * (pba - 6);
7701 reg = rd32(E1000_FCRTC);
7702 reg &= ~E1000_FCRTC_RTH_COAL_MASK;
7703 reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
7704 & E1000_FCRTC_RTH_COAL_MASK);
7705 wr32(E1000_FCRTC, reg);
7707 /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
7708 * frame size, capping it at PBA - 10KB.
7710 dmac_thr = pba - adapter->max_frame_size / 512;
7711 if (dmac_thr < pba - 10)
7712 dmac_thr = pba - 10;
7713 reg = rd32(E1000_DMACR);
7714 reg &= ~E1000_DMACR_DMACTHR_MASK;
7715 reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
7716 & E1000_DMACR_DMACTHR_MASK);
7718 /* transition to L0x or L1 if available..*/
7719 reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
7721 /* watchdog timer= +-1000 usec in 32usec intervals */
7724 /* Disable BMC-to-OS Watchdog Enable */
7725 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
7726 wr32(E1000_DMACR, reg);
7728 /* no lower threshold to disable
7729 * coalescing(smart fifb)-UTRESH=0
7731 wr32(E1000_DMCRTRH, 0);
7733 reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
7735 wr32(E1000_DMCTLX, reg);
7737 /* free space in tx packet buffer to wake from
7740 wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
7741 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
7743 /* make low power state decision controlled
7746 reg = rd32(E1000_PCIEMISC);
7747 reg &= ~E1000_PCIEMISC_LX_DECISION;
7748 wr32(E1000_PCIEMISC, reg);
7749 } /* endif adapter->dmac is not disabled */
7750 } else if (hw->mac.type == e1000_82580) {
7751 u32 reg = rd32(E1000_PCIEMISC);
7752 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
7753 wr32(E1000_DMACR, 0);
7758 * igb_read_i2c_byte - Reads 8 bit word over I2C
7759 * @hw: pointer to hardware structure
7760 * @byte_offset: byte offset to read
7761 * @dev_addr: device address
7764 * Performs byte read operation over I2C interface at
7765 * a specified device address.
7767 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
7768 u8 dev_addr, u8 *data)
7770 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
7771 struct i2c_client *this_client = adapter->i2c_client;
7776 return E1000_ERR_I2C;
7778 swfw_mask = E1000_SWFW_PHY0_SM;
7780 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
7782 return E1000_ERR_SWFW_SYNC;
7784 status = i2c_smbus_read_byte_data(this_client, byte_offset);
7785 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
7788 return E1000_ERR_I2C;
7791 return E1000_SUCCESS;
7796 * igb_write_i2c_byte - Writes 8 bit word over I2C
7797 * @hw: pointer to hardware structure
7798 * @byte_offset: byte offset to write
7799 * @dev_addr: device address
7800 * @data: value to write
7802 * Performs byte write operation over I2C interface at
7803 * a specified device address.
7805 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
7806 u8 dev_addr, u8 data)
7808 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
7809 struct i2c_client *this_client = adapter->i2c_client;
7811 u16 swfw_mask = E1000_SWFW_PHY0_SM;
7814 return E1000_ERR_I2C;
7816 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
7817 return E1000_ERR_SWFW_SYNC;
7818 status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
7819 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
7822 return E1000_ERR_I2C;
7824 return E1000_SUCCESS;