drivers/net/ethernet/intel/igb/igb_ptp.c

   1 /* PTP Hardware Clock (PHC) driver for the Intel 82576 and 82580
   2  *
   3  * Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program; if not, write to the Free Software Foundation, Inc.,
  17  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  18  */
  19 #include <linux/module.h>
  20 #include <linux/device.h>
  21 #include <linux/pci.h>
  22 #include <linux/ptp_classify.h>
  23
  24 #include "igb.h"
  25
  26 #define INCVALUE_MASK           0x7fffffff
  27 #define ISGN                    0x80000000
  28
  29 /* The 82580 timesync updates the system timer every 8ns by 8ns,
  30  * and this update value cannot be reprogrammed.
  31  *
  32  * Neither the 82576 nor the 82580 offer registers wide enough to hold
  33  * nanoseconds time values for very long. For the 82580, SYSTIM always
  34  * counts nanoseconds, but the upper 24 bits are not availible. The
  35  * frequency is adjusted by changing the 32 bit fractional nanoseconds
  36  * register, TIMINCA.
  37  *
  38  * For the 82576, the SYSTIM register time unit is affect by the
  39  * choice of the 24 bit TININCA:IV (incvalue) field. Five bits of this
  40  * field are needed to provide the nominal 16 nanosecond period,
  41  * leaving 19 bits for fractional nanoseconds.
  42  *
  43  * We scale the NIC clock cycle by a large factor so that relatively
  44  * small clock corrections can be added or subtracted at each clock
  45  * tick. The drawbacks of a large factor are a) that the clock
  46  * register overflows more quickly (not such a big deal) and b) that
  47  * the increment per tick has to fit into 24 bits.  As a result we
  48  * need to use a shift of 19 so we can fit a value of 16 into the
  49  * TIMINCA register.
  50  *
  51  *
  52  *             SYSTIMH            SYSTIML
  53  *        +--------------+   +---+---+------+
  54  *  82576 |      32      |   | 8 | 5 |  19  |
  55  *        +--------------+   +---+---+------+
  56  *         \________ 45 bits _______/  fract
  57  *
  58  *        +----------+---+   +--------------+
  59  *  82580 |    24    | 8 |   |      32      |
  60  *        +----------+---+   +--------------+
  61  *          reserved  \______ 40 bits _____/
  62  *
  63  *
  64  * The 45 bit 82576 SYSTIM overflows every
  65  *   2^45 * 10^-9 / 3600 = 9.77 hours.
  66  *
  67  * The 40 bit 82580 SYSTIM overflows every
  68  *   2^40 * 10^-9 /  60  = 18.3 minutes.
  69  */
  70
  71 #define IGB_SYSTIM_OVERFLOW_PERIOD      (HZ * 60 * 9)
  72 #define IGB_PTP_TX_TIMEOUT              (HZ * 15)
  73 #define INCPERIOD_82576                 (1 << E1000_TIMINCA_16NS_SHIFT)
  74 #define INCVALUE_82576_MASK             ((1 << E1000_TIMINCA_16NS_SHIFT) - 1)
  75 #define INCVALUE_82576                  (16 << IGB_82576_TSYNC_SHIFT)
  76 #define IGB_NBITS_82580                 40
  77
  78 /* SYSTIM read access for the 82576 */
  79 static cycle_t igb_ptp_read_82576(const struct cyclecounter *cc)
  80 {
  81         struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);
  82         struct e1000_hw *hw = &igb->hw;
  83         u64 val;
  84         u32 lo, hi;
  85
  86         lo = rd32(E1000_SYSTIML);
  87         hi = rd32(E1000_SYSTIMH);
  88
  89         val = ((u64) hi) << 32;
  90         val |= lo;
  91
  92         return val;
  93 }
  94
  95 /* SYSTIM read access for the 82580 */
  96 static cycle_t igb_ptp_read_82580(const struct cyclecounter *cc)
  97 {
  98         struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);
  99         struct e1000_hw *hw = &igb->hw;
 100         u64 val;
 101         u32 lo, hi, jk;
 102
 103         /* The timestamp latches on lowest register read. For the 82580
 104          * the lowest register is SYSTIMR instead of SYSTIML.  However we only
 105          * need to provide nanosecond resolution, so we just ignore it.
 106          */
 107         jk = rd32(E1000_SYSTIMR);
 108         lo = rd32(E1000_SYSTIML);
 109         hi = rd32(E1000_SYSTIMH);
 110
 111         val = ((u64) hi) << 32;
 112         val |= lo;
 113
 114         return val;
 115 }
 116
 117 /* SYSTIM read access for I210/I211 */
 118 static void igb_ptp_read_i210(struct igb_adapter *adapter, struct timespec *ts)
 119 {
 120         struct e1000_hw *hw = &adapter->hw;
 121         u32 sec, nsec, jk;
 122
 123         /* The timestamp latches on lowest register read. For I210/I211, the
 124          * lowest register is SYSTIMR. Since we only need to provide nanosecond
 125          * resolution, we can ignore it.
 126          */
 127         jk = rd32(E1000_SYSTIMR);
 128         nsec = rd32(E1000_SYSTIML);
 129         sec = rd32(E1000_SYSTIMH);
 130
 131         ts->tv_sec = sec;
 132         ts->tv_nsec = nsec;
 133 }
 134
 135 static void igb_ptp_write_i210(struct igb_adapter *adapter,
 136                                const struct timespec *ts)
 137 {
 138         struct e1000_hw *hw = &adapter->hw;
 139
 140         /* Writing the SYSTIMR register is not necessary as it only provides
 141          * sub-nanosecond resolution.
 142          */
 143         wr32(E1000_SYSTIML, ts->tv_nsec);
 144         wr32(E1000_SYSTIMH, ts->tv_sec);
 145 }
 146
 147 /**
 148  * igb_ptp_systim_to_hwtstamp - convert system time value to hw timestamp
 149  * @adapter: board private structure
 150  * @hwtstamps: timestamp structure to update
 151  * @systim: unsigned 64bit system time value.
 152  *
 153  * We need to convert the system time value stored in the RX/TXSTMP registers
 154  * into a hwtstamp which can be used by the upper level timestamping functions.
 155  *
 156  * The 'tmreg_lock' spinlock is used to protect the consistency of the
 157  * system time value. This is needed because reading the 64 bit time
 158  * value involves reading two (or three) 32 bit registers. The first
 159  * read latches the value. Ditto for writing.
 160  *
 161  * In addition, here have extended the system time with an overflow
 162  * counter in software.
 163  **/
 164 static void igb_ptp_systim_to_hwtstamp(struct igb_adapter *adapter,
 165                                        struct skb_shared_hwtstamps *hwtstamps,
 166                                        u64 systim)
 167 {
 168         unsigned long flags;
 169         u64 ns;
 170
 171         switch (adapter->hw.mac.type) {
 172         case e1000_82576:
 173         case e1000_82580:
 174         case e1000_i350:
 175                 spin_lock_irqsave(&adapter->tmreg_lock, flags);
 176
 177                 ns = timecounter_cyc2time(&adapter->tc, systim);
 178
 179                 spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
 180
 181                 memset(hwtstamps, 0, sizeof(*hwtstamps));
 182                 hwtstamps->hwtstamp = ns_to_ktime(ns);
 183                 break;
 184         case e1000_i210:
 185         case e1000_i211:
 186                 memset(hwtstamps, 0, sizeof(*hwtstamps));
 187                 /* Upper 32 bits contain s, lower 32 bits contain ns. */
 188                 hwtstamps->hwtstamp = ktime_set(systim >> 32,
 189                                                 systim & 0xFFFFFFFF);
 190                 break;
 191         default:
 192                 break;
 193         }
 194 }
 195
 196 /* PTP clock operations */
 197 static int igb_ptp_adjfreq_82576(struct ptp_clock_info *ptp, s32 ppb)
 198 {
 199         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 200                                                ptp_caps);
 201         struct e1000_hw *hw = &igb->hw;
 202         int neg_adj = 0;
 203         u64 rate;
 204         u32 incvalue;
 205
 206         if (ppb < 0) {
 207                 neg_adj = 1;
 208                 ppb = -ppb;
 209         }
 210         rate = ppb;
 211         rate <<= 14;
 212         rate = div_u64(rate, 1953125);
 213
 214         incvalue = 16 << IGB_82576_TSYNC_SHIFT;
 215
 216         if (neg_adj)
 217                 incvalue -= rate;
 218         else
 219                 incvalue += rate;
 220
 221         wr32(E1000_TIMINCA, INCPERIOD_82576 | (incvalue & INCVALUE_82576_MASK));
 222
 223         return 0;
 224 }
 225
 226 static int igb_ptp_adjfreq_82580(struct ptp_clock_info *ptp, s32 ppb)
 227 {
 228         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 229                                                ptp_caps);
 230         struct e1000_hw *hw = &igb->hw;
 231         int neg_adj = 0;
 232         u64 rate;
 233         u32 inca;
 234
 235         if (ppb < 0) {
 236                 neg_adj = 1;
 237                 ppb = -ppb;
 238         }
 239         rate = ppb;
 240         rate <<= 26;
 241         rate = div_u64(rate, 1953125);
 242
 243         inca = rate & INCVALUE_MASK;
 244         if (neg_adj)
 245                 inca |= ISGN;
 246
 247         wr32(E1000_TIMINCA, inca);
 248
 249         return 0;
 250 }
 251
 252 static int igb_ptp_adjtime_82576(struct ptp_clock_info *ptp, s64 delta)
 253 {
 254         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 255                                                ptp_caps);
 256         unsigned long flags;
 257         s64 now;
 258
 259         spin_lock_irqsave(&igb->tmreg_lock, flags);
 260
 261         now = timecounter_read(&igb->tc);
 262         now += delta;
 263         timecounter_init(&igb->tc, &igb->cc, now);
 264
 265         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 266
 267         return 0;
 268 }
 269
 270 static int igb_ptp_adjtime_i210(struct ptp_clock_info *ptp, s64 delta)
 271 {
 272         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 273                                                ptp_caps);
 274         unsigned long flags;
 275         struct timespec now, then = ns_to_timespec(delta);
 276
 277         spin_lock_irqsave(&igb->tmreg_lock, flags);
 278
 279         igb_ptp_read_i210(igb, &now);
 280         now = timespec_add(now, then);
 281         igb_ptp_write_i210(igb, (const struct timespec *)&now);
 282
 283         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 284
 285         return 0;
 286 }
 287
 288 static int igb_ptp_gettime_82576(struct ptp_clock_info *ptp,
 289                                  struct timespec *ts)
 290 {
 291         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 292                                                ptp_caps);
 293         unsigned long flags;
 294         u64 ns;
 295         u32 remainder;
 296
 297         spin_lock_irqsave(&igb->tmreg_lock, flags);
 298
 299         ns = timecounter_read(&igb->tc);
 300
 301         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 302
 303         ts->tv_sec = div_u64_rem(ns, 1000000000, &remainder);
 304         ts->tv_nsec = remainder;
 305
 306         return 0;
 307 }
 308
 309 static int igb_ptp_gettime_i210(struct ptp_clock_info *ptp,
 310                                 struct timespec *ts)
 311 {
 312         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 313                                                ptp_caps);
 314         unsigned long flags;
 315
 316         spin_lock_irqsave(&igb->tmreg_lock, flags);
 317
 318         igb_ptp_read_i210(igb, ts);
 319
 320         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 321
 322         return 0;
 323 }
 324
 325 static int igb_ptp_settime_82576(struct ptp_clock_info *ptp,
 326                                  const struct timespec *ts)
 327 {
 328         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 329                                                ptp_caps);
 330         unsigned long flags;
 331         u64 ns;
 332
 333         ns = ts->tv_sec * 1000000000ULL;
 334         ns += ts->tv_nsec;
 335
 336         spin_lock_irqsave(&igb->tmreg_lock, flags);
 337
 338         timecounter_init(&igb->tc, &igb->cc, ns);
 339
 340         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 341
 342         return 0;
 343 }
 344
 345 static int igb_ptp_settime_i210(struct ptp_clock_info *ptp,
 346                                 const struct timespec *ts)
 347 {
 348         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 349                                                ptp_caps);
 350         unsigned long flags;
 351
 352         spin_lock_irqsave(&igb->tmreg_lock, flags);
 353
 354         igb_ptp_write_i210(igb, ts);
 355
 356         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 357
 358         return 0;
 359 }
 360
 361 static int igb_ptp_enable(struct ptp_clock_info *ptp,
 362                           struct ptp_clock_request *rq, int on)
 363 {
 364         return -EOPNOTSUPP;
 365 }
 366
 367 /**
 368  * igb_ptp_tx_work
 369  * @work: pointer to work struct
 370  *
 371  * This work function polls the TSYNCTXCTL valid bit to determine when a
 372  * timestamp has been taken for the current stored skb.
 373  **/
 374 void igb_ptp_tx_work(struct work_struct *work)
 375 {
 376         struct igb_adapter *adapter = container_of(work, struct igb_adapter,
 377                                                    ptp_tx_work);
 378         struct e1000_hw *hw = &adapter->hw;
 379         u32 tsynctxctl;
 380
 381         if (!adapter->ptp_tx_skb)
 382                 return;
 383
 384         if (time_is_before_jiffies(adapter->ptp_tx_start +
 385                                    IGB_PTP_TX_TIMEOUT)) {
 386                 dev_kfree_skb_any(adapter->ptp_tx_skb);
 387                 adapter->ptp_tx_skb = NULL;
 388                 adapter->tx_hwtstamp_timeouts++;
 389                 dev_warn(&adapter->pdev->dev, "clearing Tx timestamp hang");
 390                 return;
 391         }
 392
 393         tsynctxctl = rd32(E1000_TSYNCTXCTL);
 394         if (tsynctxctl & E1000_TSYNCTXCTL_VALID)
 395                 igb_ptp_tx_hwtstamp(adapter);
 396         else
 397                 /* reschedule to check later */
 398                 schedule_work(&adapter->ptp_tx_work);
 399 }
 400
 401 static void igb_ptp_overflow_check(struct work_struct *work)
 402 {
 403         struct igb_adapter *igb =
 404                 container_of(work, struct igb_adapter, ptp_overflow_work.work);
 405         struct timespec ts;
 406
 407         igb->ptp_caps.gettime(&igb->ptp_caps, &ts);
 408
 409         pr_debug("igb overflow check at %ld.%09lu\n", ts.tv_sec, ts.tv_nsec);
 410
 411         schedule_delayed_work(&igb->ptp_overflow_work,
 412                               IGB_SYSTIM_OVERFLOW_PERIOD);
 413 }
 414
 415 /**
 416  * igb_ptp_rx_hang - detect error case when Rx timestamp registers latched
 417  * @adapter: private network adapter structure
 418  *
 419  * This watchdog task is scheduled to detect error case where hardware has
 420  * dropped an Rx packet that was timestamped when the ring is full. The
 421  * particular error is rare but leaves the device in a state unable to timestamp
 422  * any future packets.
 423  **/
 424 void igb_ptp_rx_hang(struct igb_adapter *adapter)
 425 {
 426         struct e1000_hw *hw = &adapter->hw;
 427         struct igb_ring *rx_ring;
 428         u32 tsyncrxctl = rd32(E1000_TSYNCRXCTL);
 429         unsigned long rx_event;
 430         int n;
 431
 432         if (hw->mac.type != e1000_82576)
 433                 return;
 434
 435         /* If we don't have a valid timestamp in the registers, just update the
 436          * timeout counter and exit
 437          */
 438         if (!(tsyncrxctl & E1000_TSYNCRXCTL_VALID)) {
 439                 adapter->last_rx_ptp_check = jiffies;
 440                 return;
 441         }
 442
 443         /* Determine the most recent watchdog or rx_timestamp event */
 444         rx_event = adapter->last_rx_ptp_check;
 445         for (n = 0; n < adapter->num_rx_queues; n++) {
 446                 rx_ring = adapter->rx_ring[n];
 447                 if (time_after(rx_ring->last_rx_timestamp, rx_event))
 448                         rx_event = rx_ring->last_rx_timestamp;
 449         }
 450
 451         /* Only need to read the high RXSTMP register to clear the lock */
 452         if (time_is_before_jiffies(rx_event + 5 * HZ)) {
 453                 rd32(E1000_RXSTMPH);
 454                 adapter->last_rx_ptp_check = jiffies;
 455                 adapter->rx_hwtstamp_cleared++;
 456                 dev_warn(&adapter->pdev->dev, "clearing Rx timestamp hang");
 457         }
 458 }
 459
 460 /**
 461  * igb_ptp_tx_hwtstamp - utility function which checks for TX time stamp
 462  * @adapter: Board private structure.
 463  *
 464  * If we were asked to do hardware stamping and such a time stamp is
 465  * available, then it must have been for this skb here because we only
 466  * allow only one such packet into the queue.
 467  **/
 468 void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter)
 469 {
 470         struct e1000_hw *hw = &adapter->hw;
 471         struct skb_shared_hwtstamps shhwtstamps;
 472         u64 regval;
 473
 474         regval = rd32(E1000_TXSTMPL);
 475         regval |= (u64)rd32(E1000_TXSTMPH) << 32;
 476
 477         igb_ptp_systim_to_hwtstamp(adapter, &shhwtstamps, regval);
 478         skb_tstamp_tx(adapter->ptp_tx_skb, &shhwtstamps);
 479         dev_kfree_skb_any(adapter->ptp_tx_skb);
 480         adapter->ptp_tx_skb = NULL;
 481 }
 482
 483 /**
 484  * igb_ptp_rx_pktstamp - retrieve Rx per packet timestamp
 485  * @q_vector: Pointer to interrupt specific structure
 486  * @va: Pointer to address containing Rx buffer
 487  * @skb: Buffer containing timestamp and packet
 488  *
 489  * This function is meant to retrieve a timestamp from the first buffer of an
 490  * incoming frame.  The value is stored in little endian format starting on
 491  * byte 8.
 492  **/
 493 void igb_ptp_rx_pktstamp(struct igb_q_vector *q_vector,
 494                          unsigned char *va,
 495                          struct sk_buff *skb)
 496 {
 497         __le64 *regval = (__le64 *)va;
 498
 499         /* The timestamp is recorded in little endian format.
 500          * DWORD: 0        1        2        3
 501          * Field: Reserved Reserved SYSTIML  SYSTIMH
 502          */
 503         igb_ptp_systim_to_hwtstamp(q_vector->adapter, skb_hwtstamps(skb),
 504                                    le64_to_cpu(regval[1]));
 505 }
 506
 507 /**
 508  * igb_ptp_rx_rgtstamp - retrieve Rx timestamp stored in register
 509  * @q_vector: Pointer to interrupt specific structure
 510  * @skb: Buffer containing timestamp and packet
 511  *
 512  * This function is meant to retrieve a timestamp from the internal registers
 513  * of the adapter and store it in the skb.
 514  **/
 515 void igb_ptp_rx_rgtstamp(struct igb_q_vector *q_vector,
 516                          struct sk_buff *skb)
 517 {
 518         struct igb_adapter *adapter = q_vector->adapter;
 519         struct e1000_hw *hw = &adapter->hw;
 520         u64 regval;
 521
 522         /* If this bit is set, then the RX registers contain the time stamp. No
 523          * other packet will be time stamped until we read these registers, so
 524          * read the registers to make them available again. Because only one
 525          * packet can be time stamped at a time, we know that the register
 526          * values must belong to this one here and therefore we don't need to
 527          * compare any of the additional attributes stored for it.
 528          *
 529          * If nothing went wrong, then it should have a shared tx_flags that we
 530          * can turn into a skb_shared_hwtstamps.
 531          */
 532         if (!(rd32(E1000_TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
 533                 return;
 534
 535         regval = rd32(E1000_RXSTMPL);
 536         regval |= (u64)rd32(E1000_RXSTMPH) << 32;
 537
 538         igb_ptp_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), regval);
 539 }
 540
 541 /**
 542  * igb_ptp_hwtstamp_ioctl - control hardware time stamping
 543  * @netdev:
 544  * @ifreq:
 545  * @cmd:
 546  *
 547  * Outgoing time stamping can be enabled and disabled. Play nice and
 548  * disable it when requested, although it shouldn't case any overhead
 549  * when no packet needs it. At most one packet in the queue may be
 550  * marked for time stamping, otherwise it would be impossible to tell
 551  * for sure to which packet the hardware time stamp belongs.
 552  *
 553  * Incoming time stamping has to be configured via the hardware
 554  * filters. Not all combinations are supported, in particular event
 555  * type has to be specified. Matching the kind of event packet is
 556  * not supported, with the exception of "all V2 events regardless of
 557  * level 2 or 4".
 558  **/
 559 int igb_ptp_hwtstamp_ioctl(struct net_device *netdev,
 560                            struct ifreq *ifr, int cmd)
 561 {
 562         struct igb_adapter *adapter = netdev_priv(netdev);
 563         struct e1000_hw *hw = &adapter->hw;
 564         struct hwtstamp_config config;
 565         u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
 566         u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
 567         u32 tsync_rx_cfg = 0;
 568         bool is_l4 = false;
 569         bool is_l2 = false;
 570         u32 regval;
 571
 572         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
 573                 return -EFAULT;
 574
 575         /* reserved for future extensions */
 576         if (config.flags)
 577                 return -EINVAL;
 578
 579         switch (config.tx_type) {
 580         case HWTSTAMP_TX_OFF:
 581                 tsync_tx_ctl = 0;
 582         case HWTSTAMP_TX_ON:
 583                 break;
 584         default:
 585                 return -ERANGE;
 586         }
 587
 588         switch (config.rx_filter) {
 589         case HWTSTAMP_FILTER_NONE:
 590                 tsync_rx_ctl = 0;
 591                 break;
 592         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
 593                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
 594                 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE;
 595                 is_l4 = true;
 596                 break;
 597         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
 598                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
 599                 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE;
 600                 is_l4 = true;
 601                 break;
 602         case HWTSTAMP_FILTER_PTP_V2_EVENT:
 603         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
 604         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
 605         case HWTSTAMP_FILTER_PTP_V2_SYNC:
 606         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
 607         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
 608         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
 609         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
 610         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
 611                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
 612                 config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
 613                 is_l2 = true;
 614                 is_l4 = true;
 615                 break;
 616         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
 617         case HWTSTAMP_FILTER_ALL:
 618                 /* 82576 cannot timestamp all packets, which it needs to do to
 619                  * support both V1 Sync and Delay_Req messages
 620                  */
 621                 if (hw->mac.type != e1000_82576) {
 622                         tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
 623                         config.rx_filter = HWTSTAMP_FILTER_ALL;
 624                         break;
 625                 }
 626                 /* fall through */
 627         default:
 628                 config.rx_filter = HWTSTAMP_FILTER_NONE;
 629                 return -ERANGE;
 630         }
 631
 632         if (hw->mac.type == e1000_82575) {
 633                 if (tsync_rx_ctl | tsync_tx_ctl)
 634                         return -EINVAL;
 635                 return 0;
 636         }
 637
 638         /* Per-packet timestamping only works if all packets are
 639          * timestamped, so enable timestamping in all packets as
 640          * long as one Rx filter was configured.
 641          */
 642         if ((hw->mac.type >= e1000_82580) && tsync_rx_ctl) {
 643                 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
 644                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
 645                 config.rx_filter = HWTSTAMP_FILTER_ALL;
 646                 is_l2 = true;
 647                 is_l4 = true;
 648
 649                 if ((hw->mac.type == e1000_i210) ||
 650                     (hw->mac.type == e1000_i211)) {
 651                         regval = rd32(E1000_RXPBS);
 652                         regval |= E1000_RXPBS_CFG_TS_EN;
 653                         wr32(E1000_RXPBS, regval);
 654                 }
 655         }
 656
 657         /* enable/disable TX */
 658         regval = rd32(E1000_TSYNCTXCTL);
 659         regval &= ~E1000_TSYNCTXCTL_ENABLED;
 660         regval |= tsync_tx_ctl;
 661         wr32(E1000_TSYNCTXCTL, regval);
 662
 663         /* enable/disable RX */
 664         regval = rd32(E1000_TSYNCRXCTL);
 665         regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
 666         regval |= tsync_rx_ctl;
 667         wr32(E1000_TSYNCRXCTL, regval);
 668
 669         /* define which PTP packets are time stamped */
 670         wr32(E1000_TSYNCRXCFG, tsync_rx_cfg);
 671
 672         /* define ethertype filter for timestamped packets */
 673         if (is_l2)
 674                 wr32(E1000_ETQF(3),
 675                      (E1000_ETQF_FILTER_ENABLE | /* enable filter */
 676                       E1000_ETQF_1588 | /* enable timestamping */
 677                       ETH_P_1588));     /* 1588 eth protocol type */
 678         else
 679                 wr32(E1000_ETQF(3), 0);
 680
 681         /* L4 Queue Filter[3]: filter by destination port and protocol */
 682         if (is_l4) {
 683                 u32 ftqf = (IPPROTO_UDP /* UDP */
 684                         | E1000_FTQF_VF_BP /* VF not compared */
 685                         | E1000_FTQF_1588_TIME_STAMP /* Enable Timestamping */
 686                         | E1000_FTQF_MASK); /* mask all inputs */
 687                 ftqf &= ~E1000_FTQF_MASK_PROTO_BP; /* enable protocol check */
 688
 689                 wr32(E1000_IMIR(3), htons(PTP_EV_PORT));
 690                 wr32(E1000_IMIREXT(3),
 691                      (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
 692                 if (hw->mac.type == e1000_82576) {
 693                         /* enable source port check */
 694                         wr32(E1000_SPQF(3), htons(PTP_EV_PORT));
 695                         ftqf &= ~E1000_FTQF_MASK_SOURCE_PORT_BP;
 696                 }
 697                 wr32(E1000_FTQF(3), ftqf);
 698         } else {
 699                 wr32(E1000_FTQF(3), E1000_FTQF_MASK);
 700         }
 701         wrfl();
 702
 703         /* clear TX/RX time stamp registers, just to be sure */
 704         regval = rd32(E1000_TXSTMPL);
 705         regval = rd32(E1000_TXSTMPH);
 706         regval = rd32(E1000_RXSTMPL);
 707         regval = rd32(E1000_RXSTMPH);
 708
 709         return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
 710                 -EFAULT : 0;
 711 }
 712
 713 void igb_ptp_init(struct igb_adapter *adapter)
 714 {
 715         struct e1000_hw *hw = &adapter->hw;
 716         struct net_device *netdev = adapter->netdev;
 717
 718         switch (hw->mac.type) {
 719         case e1000_82576:
 720                 snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
 721                 adapter->ptp_caps.owner = THIS_MODULE;
 722                 adapter->ptp_caps.max_adj = 999999881;
 723                 adapter->ptp_caps.n_ext_ts = 0;
 724                 adapter->ptp_caps.pps = 0;
 725                 adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82576;
 726                 adapter->ptp_caps.adjtime = igb_ptp_adjtime_82576;
 727                 adapter->ptp_caps.gettime = igb_ptp_gettime_82576;
 728                 adapter->ptp_caps.settime = igb_ptp_settime_82576;
 729                 adapter->ptp_caps.enable = igb_ptp_enable;
 730                 adapter->cc.read = igb_ptp_read_82576;
 731                 adapter->cc.mask = CLOCKSOURCE_MASK(64);
 732                 adapter->cc.mult = 1;
 733                 adapter->cc.shift = IGB_82576_TSYNC_SHIFT;
 734                 /* Dial the nominal frequency. */
 735                 wr32(E1000_TIMINCA, INCPERIOD_82576 | INCVALUE_82576);
 736                 break;
 737         case e1000_82580:
 738         case e1000_i350:
 739                 snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
 740                 adapter->ptp_caps.owner = THIS_MODULE;
 741                 adapter->ptp_caps.max_adj = 62499999;
 742                 adapter->ptp_caps.n_ext_ts = 0;
 743                 adapter->ptp_caps.pps = 0;
 744                 adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82580;
 745                 adapter->ptp_caps.adjtime = igb_ptp_adjtime_82576;
 746                 adapter->ptp_caps.gettime = igb_ptp_gettime_82576;
 747                 adapter->ptp_caps.settime = igb_ptp_settime_82576;
 748                 adapter->ptp_caps.enable = igb_ptp_enable;
 749                 adapter->cc.read = igb_ptp_read_82580;
 750                 adapter->cc.mask = CLOCKSOURCE_MASK(IGB_NBITS_82580);
 751                 adapter->cc.mult = 1;
 752                 adapter->cc.shift = 0;
 753                 /* Enable the timer functions by clearing bit 31. */
 754                 wr32(E1000_TSAUXC, 0x0);
 755                 break;
 756         case e1000_i210:
 757         case e1000_i211:
 758                 snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
 759                 adapter->ptp_caps.owner = THIS_MODULE;
 760                 adapter->ptp_caps.max_adj = 62499999;
 761                 adapter->ptp_caps.n_ext_ts = 0;
 762                 adapter->ptp_caps.pps = 0;
 763                 adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82580;
 764                 adapter->ptp_caps.adjtime = igb_ptp_adjtime_i210;
 765                 adapter->ptp_caps.gettime = igb_ptp_gettime_i210;
 766                 adapter->ptp_caps.settime = igb_ptp_settime_i210;
 767                 adapter->ptp_caps.enable = igb_ptp_enable;
 768                 /* Enable the timer functions by clearing bit 31. */
 769                 wr32(E1000_TSAUXC, 0x0);
 770                 break;
 771         default:
 772                 adapter->ptp_clock = NULL;
 773                 return;
 774         }
 775
 776         wrfl();
 777
 778         spin_lock_init(&adapter->tmreg_lock);
 779         INIT_WORK(&adapter->ptp_tx_work, igb_ptp_tx_work);
 780
 781         /* Initialize the clock and overflow work for devices that need it. */
 782         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) {
 783                 struct timespec ts = ktime_to_timespec(ktime_get_real());
 784
 785                 igb_ptp_settime_i210(&adapter->ptp_caps, &ts);
 786         } else {
 787                 timecounter_init(&adapter->tc, &adapter->cc,
 788                                  ktime_to_ns(ktime_get_real()));
 789
 790                 INIT_DELAYED_WORK(&adapter->ptp_overflow_work,
 791                                   igb_ptp_overflow_check);
 792
 793                 schedule_delayed_work(&adapter->ptp_overflow_work,
 794                                       IGB_SYSTIM_OVERFLOW_PERIOD);
 795         }
 796
 797         /* Initialize the time sync interrupts for devices that support it. */
 798         if (hw->mac.type >= e1000_82580) {
 799                 wr32(E1000_TSIM, E1000_TSIM_TXTS);
 800                 wr32(E1000_IMS, E1000_IMS_TS);
 801         }
 802
 803         adapter->ptp_clock = ptp_clock_register(&adapter->ptp_caps,
 804                                                 &adapter->pdev->dev);
 805         if (IS_ERR(adapter->ptp_clock)) {
 806                 adapter->ptp_clock = NULL;
 807                 dev_err(&adapter->pdev->dev, "ptp_clock_register failed\n");
 808         } else {
 809                 dev_info(&adapter->pdev->dev, "added PHC on %s\n",
 810                          adapter->netdev->name);
 811                 adapter->flags |= IGB_FLAG_PTP;
 812         }
 813 }
 814
 815 /**
 816  * igb_ptp_stop - Disable PTP device and stop the overflow check.
 817  * @adapter: Board private structure.
 818  *
 819  * This function stops the PTP support and cancels the delayed work.
 820  **/
 821 void igb_ptp_stop(struct igb_adapter *adapter)
 822 {
 823         switch (adapter->hw.mac.type) {
 824         case e1000_82576:
 825         case e1000_82580:
 826         case e1000_i350:
 827                 cancel_delayed_work_sync(&adapter->ptp_overflow_work);
 828                 break;
 829         case e1000_i210:
 830         case e1000_i211:
 831                 /* No delayed work to cancel. */
 832                 break;
 833         default:
 834                 return;
 835         }
 836
 837         cancel_work_sync(&adapter->ptp_tx_work);
 838         if (adapter->ptp_tx_skb) {
 839                 dev_kfree_skb_any(adapter->ptp_tx_skb);
 840                 adapter->ptp_tx_skb = NULL;
 841         }
 842
 843         if (adapter->ptp_clock) {
 844                 ptp_clock_unregister(adapter->ptp_clock);
 845                 dev_info(&adapter->pdev->dev, "removed PHC on %s\n",
 846                          adapter->netdev->name);
 847                 adapter->flags &= ~IGB_FLAG_PTP;
 848         }
 849 }
 850
 851 /**
 852  * igb_ptp_reset - Re-enable the adapter for PTP following a reset.
 853  * @adapter: Board private structure.
 854  *
 855  * This function handles the reset work required to re-enable the PTP device.
 856  **/
 857 void igb_ptp_reset(struct igb_adapter *adapter)
 858 {
 859         struct e1000_hw *hw = &adapter->hw;
 860
 861         if (!(adapter->flags & IGB_FLAG_PTP))
 862                 return;
 863
 864         switch (adapter->hw.mac.type) {
 865         case e1000_82576:
 866                 /* Dial the nominal frequency. */
 867                 wr32(E1000_TIMINCA, INCPERIOD_82576 | INCVALUE_82576);
 868                 break;
 869         case e1000_82580:
 870         case e1000_i350:
 871         case e1000_i210:
 872         case e1000_i211:
 873                 /* Enable the timer functions and interrupts. */
 874                 wr32(E1000_TSAUXC, 0x0);
 875                 wr32(E1000_TSIM, E1000_TSIM_TXTS);
 876                 wr32(E1000_IMS, E1000_IMS_TS);
 877                 break;
 878         default:
 879                 /* No work to do. */
 880                 return;
 881         }
 882
 883         /* Re-initialize the timer. */
 884         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) {
 885                 struct timespec ts = ktime_to_timespec(ktime_get_real());
 886
 887                 igb_ptp_settime_i210(&adapter->ptp_caps, &ts);
 888         } else {
 889                 timecounter_init(&adapter->tc, &adapter->cc,
 890                                  ktime_to_ns(ktime_get_real()));
 891         }
 892 }