drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2012 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for ixgbe */
  29
  30 #include <linux/interrupt.h>
  31 #include <linux/types.h>
  32 #include <linux/module.h>
  33 #include <linux/slab.h>
  34 #include <linux/pci.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/ethtool.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/highmem.h>
  39 #include <linux/uaccess.h>
  40
  41 #include "ixgbe.h"
  42
  43
  44 #define IXGBE_ALL_RAR_ENTRIES 16
  45
  46 enum {NETDEV_STATS, IXGBE_STATS};
  47
  48 struct ixgbe_stats {
  49         char stat_string[ETH_GSTRING_LEN];
  50         int type;
  51         int sizeof_stat;
  52         int stat_offset;
  53 };
  54
  55 #define IXGBE_STAT(m)           IXGBE_STATS, \
  56                                 sizeof(((struct ixgbe_adapter *)0)->m), \
  57                                 offsetof(struct ixgbe_adapter, m)
  58 #define IXGBE_NETDEV_STAT(m)    NETDEV_STATS, \
  59                                 sizeof(((struct rtnl_link_stats64 *)0)->m), \
  60                                 offsetof(struct rtnl_link_stats64, m)
  61
  62 static const struct ixgbe_stats ixgbe_gstrings_stats[] = {
  63         {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
  64         {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
  65         {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
  66         {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
  67         {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
  68         {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
  69         {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
  70         {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
  71         {"lsc_int", IXGBE_STAT(lsc_int)},
  72         {"tx_busy", IXGBE_STAT(tx_busy)},
  73         {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
  74         {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
  75         {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
  76         {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
  77         {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
  78         {"multicast", IXGBE_NETDEV_STAT(multicast)},
  79         {"broadcast", IXGBE_STAT(stats.bprc)},
  80         {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
  81         {"collisions", IXGBE_NETDEV_STAT(collisions)},
  82         {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
  83         {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
  84         {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
  85         {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
  86         {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
  87         {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
  88         {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
  89         {"fdir_overflow", IXGBE_STAT(fdir_overflow)},
  90         {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
  91         {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
  92         {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
  93         {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
  94         {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
  95         {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
  96         {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
  97         {"tx_restart_queue", IXGBE_STAT(restart_queue)},
  98         {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
  99         {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
 100         {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
 101         {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
 102         {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
 103         {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
 104         {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
 105         {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
 106         {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
 107         {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
 108         {"os2bmc_rx_by_bmc", IXGBE_STAT(stats.o2bgptc)},
 109         {"os2bmc_tx_by_bmc", IXGBE_STAT(stats.b2ospc)},
 110         {"os2bmc_tx_by_host", IXGBE_STAT(stats.o2bspc)},
 111         {"os2bmc_rx_by_host", IXGBE_STAT(stats.b2ogprc)},
 112 #ifdef IXGBE_FCOE
 113         {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
 114         {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
 115         {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
 116         {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
 117         {"fcoe_noddp", IXGBE_STAT(stats.fcoe_noddp)},
 118         {"fcoe_noddp_ext_buff", IXGBE_STAT(stats.fcoe_noddp_ext_buff)},
 119         {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
 120         {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
 121 #endif /* IXGBE_FCOE */
 122 };
 123
 124 /* ixgbe allocates num_tx_queues and num_rx_queues symmetrically so
 125  * we set the num_rx_queues to evaluate to num_tx_queues. This is
 126  * used because we do not have a good way to get the max number of
 127  * rx queues with CONFIG_RPS disabled.
 128  */
 129 #define IXGBE_NUM_RX_QUEUES netdev->num_tx_queues
 130
 131 #define IXGBE_QUEUE_STATS_LEN ( \
 132         (netdev->num_tx_queues + IXGBE_NUM_RX_QUEUES) * \
 133         (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
 134 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
 135 #define IXGBE_PB_STATS_LEN ( \
 136                         (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
 137                          sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
 138                          sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
 139                          sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
 140                         / sizeof(u64))
 141 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
 142                          IXGBE_PB_STATS_LEN + \
 143                          IXGBE_QUEUE_STATS_LEN)
 144
 145 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
 146         "Register test  (offline)", "Eeprom test    (offline)",
 147         "Interrupt test (offline)", "Loopback test  (offline)",
 148         "Link test   (on/offline)"
 149 };
 150 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
 151
 152 static int ixgbe_get_settings(struct net_device *netdev,
 153                               struct ethtool_cmd *ecmd)
 154 {
 155         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 156         struct ixgbe_hw *hw = &adapter->hw;
 157         ixgbe_link_speed supported_link;
 158         u32 link_speed = 0;
 159         bool autoneg;
 160         bool link_up;
 161
 162         hw->mac.ops.get_link_capabilities(hw, &supported_link, &autoneg);
 163
 164         /* set the supported link speeds */
 165         if (supported_link & IXGBE_LINK_SPEED_10GB_FULL)
 166                 ecmd->supported |= SUPPORTED_10000baseT_Full;
 167         if (supported_link & IXGBE_LINK_SPEED_1GB_FULL)
 168                 ecmd->supported |= SUPPORTED_1000baseT_Full;
 169         if (supported_link & IXGBE_LINK_SPEED_100_FULL)
 170                 ecmd->supported |= SUPPORTED_100baseT_Full;
 171
 172         /* set the advertised speeds */
 173         if (hw->phy.autoneg_advertised) {
 174                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL)
 175                         ecmd->advertising |= ADVERTISED_100baseT_Full;
 176                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
 177                         ecmd->advertising |= ADVERTISED_10000baseT_Full;
 178                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
 179                         ecmd->advertising |= ADVERTISED_1000baseT_Full;
 180         } else {
 181                 /* default modes in case phy.autoneg_advertised isn't set */
 182                 if (supported_link & IXGBE_LINK_SPEED_10GB_FULL)
 183                         ecmd->advertising |= ADVERTISED_10000baseT_Full;
 184                 if (supported_link & IXGBE_LINK_SPEED_1GB_FULL)
 185                         ecmd->advertising |= ADVERTISED_1000baseT_Full;
 186                 if (supported_link & IXGBE_LINK_SPEED_100_FULL)
 187                         ecmd->advertising |= ADVERTISED_100baseT_Full;
 188         }
 189
 190         if (autoneg) {
 191                 ecmd->supported |= SUPPORTED_Autoneg;
 192                 ecmd->advertising |= ADVERTISED_Autoneg;
 193                 ecmd->autoneg = AUTONEG_ENABLE;
 194         } else
 195                 ecmd->autoneg = AUTONEG_DISABLE;
 196
 197         ecmd->transceiver = XCVR_EXTERNAL;
 198
 199         /* Determine the remaining settings based on the PHY type. */
 200         switch (adapter->hw.phy.type) {
 201         case ixgbe_phy_tn:
 202         case ixgbe_phy_aq:
 203         case ixgbe_phy_cu_unknown:
 204                 ecmd->supported |= SUPPORTED_TP;
 205                 ecmd->advertising |= ADVERTISED_TP;
 206                 ecmd->port = PORT_TP;
 207                 break;
 208         case ixgbe_phy_qt:
 209                 ecmd->supported |= SUPPORTED_FIBRE;
 210                 ecmd->advertising |= ADVERTISED_FIBRE;
 211                 ecmd->port = PORT_FIBRE;
 212                 break;
 213         case ixgbe_phy_nl:
 214         case ixgbe_phy_sfp_passive_tyco:
 215         case ixgbe_phy_sfp_passive_unknown:
 216         case ixgbe_phy_sfp_ftl:
 217         case ixgbe_phy_sfp_avago:
 218         case ixgbe_phy_sfp_intel:
 219         case ixgbe_phy_sfp_unknown:
 220                 /* SFP+ devices, further checking needed */
 221                 switch (adapter->hw.phy.sfp_type) {
 222                 case ixgbe_sfp_type_da_cu:
 223                 case ixgbe_sfp_type_da_cu_core0:
 224                 case ixgbe_sfp_type_da_cu_core1:
 225                         ecmd->supported |= SUPPORTED_FIBRE;
 226                         ecmd->advertising |= ADVERTISED_FIBRE;
 227                         ecmd->port = PORT_DA;
 228                         break;
 229                 case ixgbe_sfp_type_sr:
 230                 case ixgbe_sfp_type_lr:
 231                 case ixgbe_sfp_type_srlr_core0:
 232                 case ixgbe_sfp_type_srlr_core1:
 233                         ecmd->supported |= SUPPORTED_FIBRE;
 234                         ecmd->advertising |= ADVERTISED_FIBRE;
 235                         ecmd->port = PORT_FIBRE;
 236                         break;
 237                 case ixgbe_sfp_type_not_present:
 238                         ecmd->supported |= SUPPORTED_FIBRE;
 239                         ecmd->advertising |= ADVERTISED_FIBRE;
 240                         ecmd->port = PORT_NONE;
 241                         break;
 242                 case ixgbe_sfp_type_1g_cu_core0:
 243                 case ixgbe_sfp_type_1g_cu_core1:
 244                         ecmd->supported |= SUPPORTED_TP;
 245                         ecmd->advertising |= ADVERTISED_TP;
 246                         ecmd->port = PORT_TP;
 247                         break;
 248                 case ixgbe_sfp_type_1g_sx_core0:
 249                 case ixgbe_sfp_type_1g_sx_core1:
 250                         ecmd->supported |= SUPPORTED_FIBRE;
 251                         ecmd->advertising |= ADVERTISED_FIBRE;
 252                         ecmd->port = PORT_FIBRE;
 253                         break;
 254                 case ixgbe_sfp_type_unknown:
 255                 default:
 256                         ecmd->supported |= SUPPORTED_FIBRE;
 257                         ecmd->advertising |= ADVERTISED_FIBRE;
 258                         ecmd->port = PORT_OTHER;
 259                         break;
 260                 }
 261                 break;
 262         case ixgbe_phy_xaui:
 263                 ecmd->supported |= SUPPORTED_FIBRE;
 264                 ecmd->advertising |= ADVERTISED_FIBRE;
 265                 ecmd->port = PORT_NONE;
 266                 break;
 267         case ixgbe_phy_unknown:
 268         case ixgbe_phy_generic:
 269         case ixgbe_phy_sfp_unsupported:
 270         default:
 271                 ecmd->supported |= SUPPORTED_FIBRE;
 272                 ecmd->advertising |= ADVERTISED_FIBRE;
 273                 ecmd->port = PORT_OTHER;
 274                 break;
 275         }
 276
 277         hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
 278         if (link_up) {
 279                 switch (link_speed) {
 280                 case IXGBE_LINK_SPEED_10GB_FULL:
 281                         ethtool_cmd_speed_set(ecmd, SPEED_10000);
 282                         break;
 283                 case IXGBE_LINK_SPEED_1GB_FULL:
 284                         ethtool_cmd_speed_set(ecmd, SPEED_1000);
 285                         break;
 286                 case IXGBE_LINK_SPEED_100_FULL:
 287                         ethtool_cmd_speed_set(ecmd, SPEED_100);
 288                         break;
 289                 default:
 290                         break;
 291                 }
 292                 ecmd->duplex = DUPLEX_FULL;
 293         } else {
 294                 ethtool_cmd_speed_set(ecmd, -1);
 295                 ecmd->duplex = -1;
 296         }
 297
 298         return 0;
 299 }
 300
 301 static int ixgbe_set_settings(struct net_device *netdev,
 302                               struct ethtool_cmd *ecmd)
 303 {
 304         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 305         struct ixgbe_hw *hw = &adapter->hw;
 306         u32 advertised, old;
 307         s32 err = 0;
 308
 309         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 310             (hw->phy.multispeed_fiber)) {
 311                 /*
 312                  * this function does not support duplex forcing, but can
 313                  * limit the advertising of the adapter to the specified speed
 314                  */
 315                 if (ecmd->autoneg == AUTONEG_DISABLE)
 316                         return -EINVAL;
 317
 318                 if (ecmd->advertising & ~ecmd->supported)
 319                         return -EINVAL;
 320
 321                 old = hw->phy.autoneg_advertised;
 322                 advertised = 0;
 323                 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
 324                         advertised |= IXGBE_LINK_SPEED_10GB_FULL;
 325
 326                 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
 327                         advertised |= IXGBE_LINK_SPEED_1GB_FULL;
 328
 329                 if (ecmd->advertising & ADVERTISED_100baseT_Full)
 330                         advertised |= IXGBE_LINK_SPEED_100_FULL;
 331
 332                 if (old == advertised)
 333                         return err;
 334                 /* this sets the link speed and restarts auto-neg */
 335                 hw->mac.autotry_restart = true;
 336                 err = hw->mac.ops.setup_link(hw, advertised, true, true);
 337                 if (err) {
 338                         e_info(probe, "setup link failed with code %d\n", err);
 339                         hw->mac.ops.setup_link(hw, old, true, true);
 340                 }
 341         } else {
 342                 /* in this case we currently only support 10Gb/FULL */
 343                 u32 speed = ethtool_cmd_speed(ecmd);
 344                 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
 345                     (ecmd->advertising != ADVERTISED_10000baseT_Full) ||
 346                     (speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
 347                         return -EINVAL;
 348         }
 349
 350         return err;
 351 }
 352
 353 static void ixgbe_get_pauseparam(struct net_device *netdev,
 354                                  struct ethtool_pauseparam *pause)
 355 {
 356         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 357         struct ixgbe_hw *hw = &adapter->hw;
 358
 359         if (hw->fc.disable_fc_autoneg)
 360                 pause->autoneg = 0;
 361         else
 362                 pause->autoneg = 1;
 363
 364         if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
 365                 pause->rx_pause = 1;
 366         } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
 367                 pause->tx_pause = 1;
 368         } else if (hw->fc.current_mode == ixgbe_fc_full) {
 369                 pause->rx_pause = 1;
 370                 pause->tx_pause = 1;
 371         }
 372 }
 373
 374 static int ixgbe_set_pauseparam(struct net_device *netdev,
 375                                 struct ethtool_pauseparam *pause)
 376 {
 377         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 378         struct ixgbe_hw *hw = &adapter->hw;
 379         struct ixgbe_fc_info fc = hw->fc;
 380
 381         /* 82598 does no support link flow control with DCB enabled */
 382         if ((hw->mac.type == ixgbe_mac_82598EB) &&
 383             (adapter->flags & IXGBE_FLAG_DCB_ENABLED))
 384                 return -EINVAL;
 385
 386         fc.disable_fc_autoneg = (pause->autoneg != AUTONEG_ENABLE);
 387
 388         if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
 389                 fc.requested_mode = ixgbe_fc_full;
 390         else if (pause->rx_pause && !pause->tx_pause)
 391                 fc.requested_mode = ixgbe_fc_rx_pause;
 392         else if (!pause->rx_pause && pause->tx_pause)
 393                 fc.requested_mode = ixgbe_fc_tx_pause;
 394         else
 395                 fc.requested_mode = ixgbe_fc_none;
 396
 397         /* if the thing changed then we'll update and use new autoneg */
 398         if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
 399                 hw->fc = fc;
 400                 if (netif_running(netdev))
 401                         ixgbe_reinit_locked(adapter);
 402                 else
 403                         ixgbe_reset(adapter);
 404         }
 405
 406         return 0;
 407 }
 408
 409 static u32 ixgbe_get_msglevel(struct net_device *netdev)
 410 {
 411         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 412         return adapter->msg_enable;
 413 }
 414
 415 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
 416 {
 417         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 418         adapter->msg_enable = data;
 419 }
 420
 421 static int ixgbe_get_regs_len(struct net_device *netdev)
 422 {
 423 #define IXGBE_REGS_LEN  1129
 424         return IXGBE_REGS_LEN * sizeof(u32);
 425 }
 426
 427 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
 428
 429 static void ixgbe_get_regs(struct net_device *netdev,
 430                            struct ethtool_regs *regs, void *p)
 431 {
 432         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 433         struct ixgbe_hw *hw = &adapter->hw;
 434         u32 *regs_buff = p;
 435         u8 i;
 436
 437         memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
 438
 439         regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
 440
 441         /* General Registers */
 442         regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
 443         regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
 444         regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
 445         regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
 446         regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
 447         regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
 448         regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
 449         regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
 450
 451         /* NVM Register */
 452         regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
 453         regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
 454         regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
 455         regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
 456         regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
 457         regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
 458         regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
 459         regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
 460         regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
 461         regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
 462
 463         /* Interrupt */
 464         /* don't read EICR because it can clear interrupt causes, instead
 465          * read EICS which is a shadow but doesn't clear EICR */
 466         regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
 467         regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
 468         regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
 469         regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
 470         regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
 471         regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
 472         regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
 473         regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
 474         regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
 475         regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
 476         regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
 477         regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
 478
 479         /* Flow Control */
 480         regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
 481         regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
 482         regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
 483         regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
 484         regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
 485         for (i = 0; i < 8; i++) {
 486                 switch (hw->mac.type) {
 487                 case ixgbe_mac_82598EB:
 488                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
 489                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
 490                         break;
 491                 case ixgbe_mac_82599EB:
 492                 case ixgbe_mac_X540:
 493                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
 494                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
 495                         break;
 496                 default:
 497                         break;
 498                 }
 499         }
 500         regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
 501         regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
 502
 503         /* Receive DMA */
 504         for (i = 0; i < 64; i++)
 505                 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 506         for (i = 0; i < 64; i++)
 507                 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 508         for (i = 0; i < 64; i++)
 509                 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 510         for (i = 0; i < 64; i++)
 511                 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 512         for (i = 0; i < 64; i++)
 513                 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 514         for (i = 0; i < 64; i++)
 515                 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 516         for (i = 0; i < 16; i++)
 517                 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 518         for (i = 0; i < 16; i++)
 519                 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 520         regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
 521         for (i = 0; i < 8; i++)
 522                 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
 523         regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
 524         regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
 525
 526         /* Receive */
 527         regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
 528         regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
 529         for (i = 0; i < 16; i++)
 530                 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
 531         for (i = 0; i < 16; i++)
 532                 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
 533         regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
 534         regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
 535         regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 536         regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
 537         regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
 538         regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
 539         for (i = 0; i < 8; i++)
 540                 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
 541         for (i = 0; i < 8; i++)
 542                 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
 543         regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
 544
 545         /* Transmit */
 546         for (i = 0; i < 32; i++)
 547                 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 548         for (i = 0; i < 32; i++)
 549                 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 550         for (i = 0; i < 32; i++)
 551                 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 552         for (i = 0; i < 32; i++)
 553                 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 554         for (i = 0; i < 32; i++)
 555                 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 556         for (i = 0; i < 32; i++)
 557                 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 558         for (i = 0; i < 32; i++)
 559                 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
 560         for (i = 0; i < 32; i++)
 561                 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
 562         regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
 563         for (i = 0; i < 16; i++)
 564                 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
 565         regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
 566         for (i = 0; i < 8; i++)
 567                 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
 568         regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
 569
 570         /* Wake Up */
 571         regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
 572         regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
 573         regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
 574         regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
 575         regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
 576         regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
 577         regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
 578         regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
 579         regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
 580
 581         /* DCB */
 582         regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
 583         regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
 584         regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
 585         regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
 586         for (i = 0; i < 8; i++)
 587                 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
 588         for (i = 0; i < 8; i++)
 589                 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
 590         for (i = 0; i < 8; i++)
 591                 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
 592         for (i = 0; i < 8; i++)
 593                 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
 594         for (i = 0; i < 8; i++)
 595                 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
 596         for (i = 0; i < 8; i++)
 597                 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
 598
 599         /* Statistics */
 600         regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
 601         regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
 602         regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
 603         regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
 604         for (i = 0; i < 8; i++)
 605                 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
 606         regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
 607         regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
 608         regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
 609         regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
 610         regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
 611         regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
 612         regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
 613         for (i = 0; i < 8; i++)
 614                 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
 615         for (i = 0; i < 8; i++)
 616                 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
 617         for (i = 0; i < 8; i++)
 618                 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
 619         for (i = 0; i < 8; i++)
 620                 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
 621         regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
 622         regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
 623         regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
 624         regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
 625         regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
 626         regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
 627         regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
 628         regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
 629         regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
 630         regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
 631         regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
 632         regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
 633         for (i = 0; i < 8; i++)
 634                 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
 635         regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
 636         regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
 637         regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
 638         regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
 639         regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
 640         regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
 641         regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
 642         regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
 643         regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
 644         regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
 645         regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
 646         regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
 647         regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
 648         regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
 649         regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
 650         regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
 651         regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
 652         regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
 653         regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
 654         for (i = 0; i < 16; i++)
 655                 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
 656         for (i = 0; i < 16; i++)
 657                 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
 658         for (i = 0; i < 16; i++)
 659                 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
 660         for (i = 0; i < 16; i++)
 661                 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
 662
 663         /* MAC */
 664         regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
 665         regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
 666         regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
 667         regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
 668         regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
 669         regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
 670         regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
 671         regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
 672         regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
 673         regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
 674         regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
 675         regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
 676         regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
 677         regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
 678         regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
 679         regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
 680         regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
 681         regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
 682         regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
 683         regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
 684         regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
 685         regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
 686         regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
 687         regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
 688         regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
 689         regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
 690         regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
 691         regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
 692         regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
 693         regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
 694         regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
 695         regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
 696         regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
 697
 698         /* Diagnostic */
 699         regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
 700         for (i = 0; i < 8; i++)
 701                 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
 702         regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
 703         for (i = 0; i < 4; i++)
 704                 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
 705         regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
 706         regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
 707         for (i = 0; i < 8; i++)
 708                 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
 709         regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
 710         for (i = 0; i < 4; i++)
 711                 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
 712         regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
 713         regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
 714         regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
 715         regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
 716         regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
 717         regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
 718         regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
 719         regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
 720         regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
 721         regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
 722         regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
 723         for (i = 0; i < 8; i++)
 724                 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
 725         regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
 726         regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
 727         regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
 728         regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
 729         regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
 730         regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
 731         regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
 732         regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
 733         regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
 734
 735         /* 82599 X540 specific registers  */
 736         regs_buff[1128] = IXGBE_READ_REG(hw, IXGBE_MFLCN);
 737 }
 738
 739 static int ixgbe_get_eeprom_len(struct net_device *netdev)
 740 {
 741         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 742         return adapter->hw.eeprom.word_size * 2;
 743 }
 744
 745 static int ixgbe_get_eeprom(struct net_device *netdev,
 746                             struct ethtool_eeprom *eeprom, u8 *bytes)
 747 {
 748         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 749         struct ixgbe_hw *hw = &adapter->hw;
 750         u16 *eeprom_buff;
 751         int first_word, last_word, eeprom_len;
 752         int ret_val = 0;
 753         u16 i;
 754
 755         if (eeprom->len == 0)
 756                 return -EINVAL;
 757
 758         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 759
 760         first_word = eeprom->offset >> 1;
 761         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 762         eeprom_len = last_word - first_word + 1;
 763
 764         eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
 765         if (!eeprom_buff)
 766                 return -ENOMEM;
 767
 768         ret_val = hw->eeprom.ops.read_buffer(hw, first_word, eeprom_len,
 769                                              eeprom_buff);
 770
 771         /* Device's eeprom is always little-endian, word addressable */
 772         for (i = 0; i < eeprom_len; i++)
 773                 le16_to_cpus(&eeprom_buff[i]);
 774
 775         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
 776         kfree(eeprom_buff);
 777
 778         return ret_val;
 779 }
 780
 781 static int ixgbe_set_eeprom(struct net_device *netdev,
 782                             struct ethtool_eeprom *eeprom, u8 *bytes)
 783 {
 784         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 785         struct ixgbe_hw *hw = &adapter->hw;
 786         u16 *eeprom_buff;
 787         void *ptr;
 788         int max_len, first_word, last_word, ret_val = 0;
 789         u16 i;
 790
 791         if (eeprom->len == 0)
 792                 return -EINVAL;
 793
 794         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
 795                 return -EINVAL;
 796
 797         max_len = hw->eeprom.word_size * 2;
 798
 799         first_word = eeprom->offset >> 1;
 800         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 801         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
 802         if (!eeprom_buff)
 803                 return -ENOMEM;
 804
 805         ptr = eeprom_buff;
 806
 807         if (eeprom->offset & 1) {
 808                 /*
 809                  * need read/modify/write of first changed EEPROM word
 810                  * only the second byte of the word is being modified
 811                  */
 812                 ret_val = hw->eeprom.ops.read(hw, first_word, &eeprom_buff[0]);
 813                 if (ret_val)
 814                         goto err;
 815
 816                 ptr++;
 817         }
 818         if ((eeprom->offset + eeprom->len) & 1) {
 819                 /*
 820                  * need read/modify/write of last changed EEPROM word
 821                  * only the first byte of the word is being modified
 822                  */
 823                 ret_val = hw->eeprom.ops.read(hw, last_word,
 824                                           &eeprom_buff[last_word - first_word]);
 825                 if (ret_val)
 826                         goto err;
 827         }
 828
 829         /* Device's eeprom is always little-endian, word addressable */
 830         for (i = 0; i < last_word - first_word + 1; i++)
 831                 le16_to_cpus(&eeprom_buff[i]);
 832
 833         memcpy(ptr, bytes, eeprom->len);
 834
 835         for (i = 0; i < last_word - first_word + 1; i++)
 836                 cpu_to_le16s(&eeprom_buff[i]);
 837
 838         ret_val = hw->eeprom.ops.write_buffer(hw, first_word,
 839                                               last_word - first_word + 1,
 840                                               eeprom_buff);
 841
 842         /* Update the checksum */
 843         if (ret_val == 0)
 844                 hw->eeprom.ops.update_checksum(hw);
 845
 846 err:
 847         kfree(eeprom_buff);
 848         return ret_val;
 849 }
 850
 851 static void ixgbe_get_drvinfo(struct net_device *netdev,
 852                               struct ethtool_drvinfo *drvinfo)
 853 {
 854         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 855         u32 nvm_track_id;
 856
 857         strlcpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver));
 858         strlcpy(drvinfo->version, ixgbe_driver_version,
 859                 sizeof(drvinfo->version));
 860
 861         nvm_track_id = (adapter->eeprom_verh << 16) |
 862                         adapter->eeprom_verl;
 863         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), "0x%08x",
 864                  nvm_track_id);
 865
 866         strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
 867                 sizeof(drvinfo->bus_info));
 868         drvinfo->n_stats = IXGBE_STATS_LEN;
 869         drvinfo->testinfo_len = IXGBE_TEST_LEN;
 870         drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
 871 }
 872
 873 static void ixgbe_get_ringparam(struct net_device *netdev,
 874                                 struct ethtool_ringparam *ring)
 875 {
 876         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 877         struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
 878         struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
 879
 880         ring->rx_max_pending = IXGBE_MAX_RXD;
 881         ring->tx_max_pending = IXGBE_MAX_TXD;
 882         ring->rx_pending = rx_ring->count;
 883         ring->tx_pending = tx_ring->count;
 884 }
 885
 886 static int ixgbe_set_ringparam(struct net_device *netdev,
 887                                struct ethtool_ringparam *ring)
 888 {
 889         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 890         struct ixgbe_ring *temp_ring;
 891         int i, err = 0;
 892         u32 new_rx_count, new_tx_count;
 893
 894         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 895                 return -EINVAL;
 896
 897         new_tx_count = clamp_t(u32, ring->tx_pending,
 898                                IXGBE_MIN_TXD, IXGBE_MAX_TXD);
 899         new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
 900
 901         new_rx_count = clamp_t(u32, ring->rx_pending,
 902                                IXGBE_MIN_RXD, IXGBE_MAX_RXD);
 903         new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
 904
 905         if ((new_tx_count == adapter->tx_ring_count) &&
 906             (new_rx_count == adapter->rx_ring_count)) {
 907                 /* nothing to do */
 908                 return 0;
 909         }
 910
 911         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
 912                 usleep_range(1000, 2000);
 913
 914         if (!netif_running(adapter->netdev)) {
 915                 for (i = 0; i < adapter->num_tx_queues; i++)
 916                         adapter->tx_ring[i]->count = new_tx_count;
 917                 for (i = 0; i < adapter->num_rx_queues; i++)
 918                         adapter->rx_ring[i]->count = new_rx_count;
 919                 adapter->tx_ring_count = new_tx_count;
 920                 adapter->rx_ring_count = new_rx_count;
 921                 goto clear_reset;
 922         }
 923
 924         /* allocate temporary buffer to store rings in */
 925         i = max_t(int, adapter->num_tx_queues, adapter->num_rx_queues);
 926         temp_ring = vmalloc(i * sizeof(struct ixgbe_ring));
 927
 928         if (!temp_ring) {
 929                 err = -ENOMEM;
 930                 goto clear_reset;
 931         }
 932
 933         ixgbe_down(adapter);
 934
 935         /*
 936          * Setup new Tx resources and free the old Tx resources in that order.
 937          * We can then assign the new resources to the rings via a memcpy.
 938          * The advantage to this approach is that we are guaranteed to still
 939          * have resources even in the case of an allocation failure.
 940          */
 941         if (new_tx_count != adapter->tx_ring_count) {
 942                 for (i = 0; i < adapter->num_tx_queues; i++) {
 943                         memcpy(&temp_ring[i], adapter->tx_ring[i],
 944                                sizeof(struct ixgbe_ring));
 945
 946                         temp_ring[i].count = new_tx_count;
 947                         err = ixgbe_setup_tx_resources(&temp_ring[i]);
 948                         if (err) {
 949                                 while (i) {
 950                                         i--;
 951                                         ixgbe_free_tx_resources(&temp_ring[i]);
 952                                 }
 953                                 goto err_setup;
 954                         }
 955                 }
 956
 957                 for (i = 0; i < adapter->num_tx_queues; i++) {
 958                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
 959
 960                         memcpy(adapter->tx_ring[i], &temp_ring[i],
 961                                sizeof(struct ixgbe_ring));
 962                 }
 963
 964                 adapter->tx_ring_count = new_tx_count;
 965         }
 966
 967         /* Repeat the process for the Rx rings if needed */
 968         if (new_rx_count != adapter->rx_ring_count) {
 969                 for (i = 0; i < adapter->num_rx_queues; i++) {
 970                         memcpy(&temp_ring[i], adapter->rx_ring[i],
 971                                sizeof(struct ixgbe_ring));
 972
 973                         temp_ring[i].count = new_rx_count;
 974                         err = ixgbe_setup_rx_resources(&temp_ring[i]);
 975                         if (err) {
 976                                 while (i) {
 977                                         i--;
 978                                         ixgbe_free_rx_resources(&temp_ring[i]);
 979                                 }
 980                                 goto err_setup;
 981                         }
 982
 983                 }
 984
 985                 for (i = 0; i < adapter->num_rx_queues; i++) {
 986                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
 987
 988                         memcpy(adapter->rx_ring[i], &temp_ring[i],
 989                                sizeof(struct ixgbe_ring));
 990                 }
 991
 992                 adapter->rx_ring_count = new_rx_count;
 993         }
 994
 995 err_setup:
 996         ixgbe_up(adapter);
 997         vfree(temp_ring);
 998 clear_reset:
 999         clear_bit(__IXGBE_RESETTING, &adapter->state);
1000         return err;
1001 }
1002
1003 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
1004 {
1005         switch (sset) {
1006         case ETH_SS_TEST:
1007                 return IXGBE_TEST_LEN;
1008         case ETH_SS_STATS:
1009                 return IXGBE_STATS_LEN;
1010         default:
1011                 return -EOPNOTSUPP;
1012         }
1013 }
1014
1015 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1016                                     struct ethtool_stats *stats, u64 *data)
1017 {
1018         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1019         struct rtnl_link_stats64 temp;
1020         const struct rtnl_link_stats64 *net_stats;
1021         unsigned int start;
1022         struct ixgbe_ring *ring;
1023         int i, j;
1024         char *p = NULL;
1025
1026         ixgbe_update_stats(adapter);
1027         net_stats = dev_get_stats(netdev, &temp);
1028         for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1029                 switch (ixgbe_gstrings_stats[i].type) {
1030                 case NETDEV_STATS:
1031                         p = (char *) net_stats +
1032                                         ixgbe_gstrings_stats[i].stat_offset;
1033                         break;
1034                 case IXGBE_STATS:
1035                         p = (char *) adapter +
1036                                         ixgbe_gstrings_stats[i].stat_offset;
1037                         break;
1038                 }
1039
1040                 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1041                            sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1042         }
1043         for (j = 0; j < IXGBE_NUM_RX_QUEUES; j++) {
1044                 ring = adapter->tx_ring[j];
1045                 if (!ring) {
1046                         data[i] = 0;
1047                         data[i+1] = 0;
1048                         i += 2;
1049                         continue;
1050                 }
1051
1052                 do {
1053                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1054                         data[i]   = ring->stats.packets;
1055                         data[i+1] = ring->stats.bytes;
1056                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1057                 i += 2;
1058         }
1059         for (j = 0; j < IXGBE_NUM_RX_QUEUES; j++) {
1060                 ring = adapter->rx_ring[j];
1061                 if (!ring) {
1062                         data[i] = 0;
1063                         data[i+1] = 0;
1064                         i += 2;
1065                         continue;
1066                 }
1067
1068                 do {
1069                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1070                         data[i]   = ring->stats.packets;
1071                         data[i+1] = ring->stats.bytes;
1072                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1073                 i += 2;
1074         }
1075
1076         for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) {
1077                 data[i++] = adapter->stats.pxontxc[j];
1078                 data[i++] = adapter->stats.pxofftxc[j];
1079         }
1080         for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) {
1081                 data[i++] = adapter->stats.pxonrxc[j];
1082                 data[i++] = adapter->stats.pxoffrxc[j];
1083         }
1084 }
1085
1086 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1087                               u8 *data)
1088 {
1089         char *p = (char *)data;
1090         int i;
1091
1092         switch (stringset) {
1093         case ETH_SS_TEST:
1094                 memcpy(data, *ixgbe_gstrings_test,
1095                        IXGBE_TEST_LEN * ETH_GSTRING_LEN);
1096                 break;
1097         case ETH_SS_STATS:
1098                 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1099                         memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1100                                ETH_GSTRING_LEN);
1101                         p += ETH_GSTRING_LEN;
1102                 }
1103                 for (i = 0; i < netdev->num_tx_queues; i++) {
1104                         sprintf(p, "tx_queue_%u_packets", i);
1105                         p += ETH_GSTRING_LEN;
1106                         sprintf(p, "tx_queue_%u_bytes", i);
1107                         p += ETH_GSTRING_LEN;
1108                 }
1109                 for (i = 0; i < IXGBE_NUM_RX_QUEUES; i++) {
1110                         sprintf(p, "rx_queue_%u_packets", i);
1111                         p += ETH_GSTRING_LEN;
1112                         sprintf(p, "rx_queue_%u_bytes", i);
1113                         p += ETH_GSTRING_LEN;
1114                 }
1115                 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) {
1116                         sprintf(p, "tx_pb_%u_pxon", i);
1117                         p += ETH_GSTRING_LEN;
1118                         sprintf(p, "tx_pb_%u_pxoff", i);
1119                         p += ETH_GSTRING_LEN;
1120                 }
1121                 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) {
1122                         sprintf(p, "rx_pb_%u_pxon", i);
1123                         p += ETH_GSTRING_LEN;
1124                         sprintf(p, "rx_pb_%u_pxoff", i);
1125                         p += ETH_GSTRING_LEN;
1126                 }
1127                 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1128                 break;
1129         }
1130 }
1131
1132 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1133 {
1134         struct ixgbe_hw *hw = &adapter->hw;
1135         bool link_up;
1136         u32 link_speed = 0;
1137         *data = 0;
1138
1139         hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1140         if (link_up)
1141                 return *data;
1142         else
1143                 *data = 1;
1144         return *data;
1145 }
1146
1147 /* ethtool register test data */
1148 struct ixgbe_reg_test {
1149         u16 reg;
1150         u8  array_len;
1151         u8  test_type;
1152         u32 mask;
1153         u32 write;
1154 };
1155
1156 /* In the hardware, registers are laid out either singly, in arrays
1157  * spaced 0x40 bytes apart, or in contiguous tables.  We assume
1158  * most tests take place on arrays or single registers (handled
1159  * as a single-element array) and special-case the tables.
1160  * Table tests are always pattern tests.
1161  *
1162  * We also make provision for some required setup steps by specifying
1163  * registers to be written without any read-back testing.
1164  */
1165
1166 #define PATTERN_TEST    1
1167 #define SET_READ_TEST   2
1168 #define WRITE_NO_TEST   3
1169 #define TABLE32_TEST    4
1170 #define TABLE64_TEST_LO 5
1171 #define TABLE64_TEST_HI 6
1172
1173 /* default 82599 register test */
1174 static const struct ixgbe_reg_test reg_test_82599[] = {
1175         { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1176         { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1177         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1178         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1179         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1180         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1181         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1182         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1183         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1184         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1185         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1186         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1187         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1188         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1189         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1190         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1191         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1192         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1193         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1194         { 0, 0, 0, 0 }
1195 };
1196
1197 /* default 82598 register test */
1198 static const struct ixgbe_reg_test reg_test_82598[] = {
1199         { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1200         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1201         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1202         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1203         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1204         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1205         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1206         /* Enable all four RX queues before testing. */
1207         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1208         /* RDH is read-only for 82598, only test RDT. */
1209         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1210         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1211         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1212         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1213         { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1214         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1215         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1216         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1217         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1218         { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1219         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1220         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1221         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1222         { 0, 0, 0, 0 }
1223 };
1224
1225 static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg,
1226                              u32 mask, u32 write)
1227 {
1228         u32 pat, val, before;
1229         static const u32 test_pattern[] = {
1230                 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1231
1232         for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) {
1233                 before = readl(adapter->hw.hw_addr + reg);
1234                 writel((test_pattern[pat] & write),
1235                        (adapter->hw.hw_addr + reg));
1236                 val = readl(adapter->hw.hw_addr + reg);
1237                 if (val != (test_pattern[pat] & write & mask)) {
1238                         e_err(drv, "pattern test reg %04X failed: got "
1239                               "0x%08X expected 0x%08X\n",
1240                               reg, val, (test_pattern[pat] & write & mask));
1241                         *data = reg;
1242                         writel(before, adapter->hw.hw_addr + reg);
1243                         return 1;
1244                 }
1245                 writel(before, adapter->hw.hw_addr + reg);
1246         }
1247         return 0;
1248 }
1249
1250 static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg,
1251                               u32 mask, u32 write)
1252 {
1253         u32 val, before;
1254         before = readl(adapter->hw.hw_addr + reg);
1255         writel((write & mask), (adapter->hw.hw_addr + reg));
1256         val = readl(adapter->hw.hw_addr + reg);
1257         if ((write & mask) != (val & mask)) {
1258                 e_err(drv, "set/check reg %04X test failed: got 0x%08X "
1259                       "expected 0x%08X\n", reg, (val & mask), (write & mask));
1260                 *data = reg;
1261                 writel(before, (adapter->hw.hw_addr + reg));
1262                 return 1;
1263         }
1264         writel(before, (adapter->hw.hw_addr + reg));
1265         return 0;
1266 }
1267
1268 #define REG_PATTERN_TEST(reg, mask, write)                                    \
1269         do {                                                                  \
1270                 if (reg_pattern_test(adapter, data, reg, mask, write))        \
1271                         return 1;                                             \
1272         } while (0)                                                           \
1273
1274
1275 #define REG_SET_AND_CHECK(reg, mask, write)                                   \
1276         do {                                                                  \
1277                 if (reg_set_and_check(adapter, data, reg, mask, write))       \
1278                         return 1;                                             \
1279         } while (0)                                                           \
1280
1281 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1282 {
1283         const struct ixgbe_reg_test *test;
1284         u32 value, before, after;
1285         u32 i, toggle;
1286
1287         switch (adapter->hw.mac.type) {
1288         case ixgbe_mac_82598EB:
1289                 toggle = 0x7FFFF3FF;
1290                 test = reg_test_82598;
1291                 break;
1292         case ixgbe_mac_82599EB:
1293         case ixgbe_mac_X540:
1294                 toggle = 0x7FFFF30F;
1295                 test = reg_test_82599;
1296                 break;
1297         default:
1298                 *data = 1;
1299                 return 1;
1300                 break;
1301         }
1302
1303         /*
1304          * Because the status register is such a special case,
1305          * we handle it separately from the rest of the register
1306          * tests.  Some bits are read-only, some toggle, and some
1307          * are writeable on newer MACs.
1308          */
1309         before = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS);
1310         value = (IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle);
1311         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, toggle);
1312         after = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle;
1313         if (value != after) {
1314                 e_err(drv, "failed STATUS register test got: 0x%08X "
1315                       "expected: 0x%08X\n", after, value);
1316                 *data = 1;
1317                 return 1;
1318         }
1319         /* restore previous status */
1320         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, before);
1321
1322         /*
1323          * Perform the remainder of the register test, looping through
1324          * the test table until we either fail or reach the null entry.
1325          */
1326         while (test->reg) {
1327                 for (i = 0; i < test->array_len; i++) {
1328                         switch (test->test_type) {
1329                         case PATTERN_TEST:
1330                                 REG_PATTERN_TEST(test->reg + (i * 0x40),
1331                                                  test->mask,
1332                                                  test->write);
1333                                 break;
1334                         case SET_READ_TEST:
1335                                 REG_SET_AND_CHECK(test->reg + (i * 0x40),
1336                                                   test->mask,
1337                                                   test->write);
1338                                 break;
1339                         case WRITE_NO_TEST:
1340                                 writel(test->write,
1341                                        (adapter->hw.hw_addr + test->reg)
1342                                        + (i * 0x40));
1343                                 break;
1344                         case TABLE32_TEST:
1345                                 REG_PATTERN_TEST(test->reg + (i * 4),
1346                                                  test->mask,
1347                                                  test->write);
1348                                 break;
1349                         case TABLE64_TEST_LO:
1350                                 REG_PATTERN_TEST(test->reg + (i * 8),
1351                                                  test->mask,
1352                                                  test->write);
1353                                 break;
1354                         case TABLE64_TEST_HI:
1355                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1356                                                  test->mask,
1357                                                  test->write);
1358                                 break;
1359                         }
1360                 }
1361                 test++;
1362         }
1363
1364         *data = 0;
1365         return 0;
1366 }
1367
1368 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1369 {
1370         struct ixgbe_hw *hw = &adapter->hw;
1371         if (hw->eeprom.ops.validate_checksum(hw, NULL))
1372                 *data = 1;
1373         else
1374                 *data = 0;
1375         return *data;
1376 }
1377
1378 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1379 {
1380         struct net_device *netdev = (struct net_device *) data;
1381         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1382
1383         adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1384
1385         return IRQ_HANDLED;
1386 }
1387
1388 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1389 {
1390         struct net_device *netdev = adapter->netdev;
1391         u32 mask, i = 0, shared_int = true;
1392         u32 irq = adapter->pdev->irq;
1393
1394         *data = 0;
1395
1396         /* Hook up test interrupt handler just for this test */
1397         if (adapter->msix_entries) {
1398                 /* NOTE: we don't test MSI-X interrupts here, yet */
1399                 return 0;
1400         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1401                 shared_int = false;
1402                 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1403                                 netdev)) {
1404                         *data = 1;
1405                         return -1;
1406                 }
1407         } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1408                                 netdev->name, netdev)) {
1409                 shared_int = false;
1410         } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1411                                netdev->name, netdev)) {
1412                 *data = 1;
1413                 return -1;
1414         }
1415         e_info(hw, "testing %s interrupt\n", shared_int ?
1416                "shared" : "unshared");
1417
1418         /* Disable all the interrupts */
1419         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1420         IXGBE_WRITE_FLUSH(&adapter->hw);
1421         usleep_range(10000, 20000);
1422
1423         /* Test each interrupt */
1424         for (; i < 10; i++) {
1425                 /* Interrupt to test */
1426                 mask = 1 << i;
1427
1428                 if (!shared_int) {
1429                         /*
1430                          * Disable the interrupts to be reported in
1431                          * the cause register and then force the same
1432                          * interrupt and see if one gets posted.  If
1433                          * an interrupt was posted to the bus, the
1434                          * test failed.
1435                          */
1436                         adapter->test_icr = 0;
1437                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1438                                         ~mask & 0x00007FFF);
1439                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1440                                         ~mask & 0x00007FFF);
1441                         IXGBE_WRITE_FLUSH(&adapter->hw);
1442                         usleep_range(10000, 20000);
1443
1444                         if (adapter->test_icr & mask) {
1445                                 *data = 3;
1446                                 break;
1447                         }
1448                 }
1449
1450                 /*
1451                  * Enable the interrupt to be reported in the cause
1452                  * register and then force the same interrupt and see
1453                  * if one gets posted.  If an interrupt was not posted
1454                  * to the bus, the test failed.
1455                  */
1456                 adapter->test_icr = 0;
1457                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1458                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1459                 IXGBE_WRITE_FLUSH(&adapter->hw);
1460                 usleep_range(10000, 20000);
1461
1462                 if (!(adapter->test_icr &mask)) {
1463                         *data = 4;
1464                         break;
1465                 }
1466
1467                 if (!shared_int) {
1468                         /*
1469                          * Disable the other interrupts to be reported in
1470                          * the cause register and then force the other
1471                          * interrupts and see if any get posted.  If
1472                          * an interrupt was posted to the bus, the
1473                          * test failed.
1474                          */
1475                         adapter->test_icr = 0;
1476                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1477                                         ~mask & 0x00007FFF);
1478                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1479                                         ~mask & 0x00007FFF);
1480                         IXGBE_WRITE_FLUSH(&adapter->hw);
1481                         usleep_range(10000, 20000);
1482
1483                         if (adapter->test_icr) {
1484                                 *data = 5;
1485                                 break;
1486                         }
1487                 }
1488         }
1489
1490         /* Disable all the interrupts */
1491         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1492         IXGBE_WRITE_FLUSH(&adapter->hw);
1493         usleep_range(10000, 20000);
1494
1495         /* Unhook test interrupt handler */
1496         free_irq(irq, netdev);
1497
1498         return *data;
1499 }
1500
1501 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1502 {
1503         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1504         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1505         struct ixgbe_hw *hw = &adapter->hw;
1506         u32 reg_ctl;
1507
1508         /* shut down the DMA engines now so they can be reinitialized later */
1509
1510         /* first Rx */
1511         reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1512         reg_ctl &= ~IXGBE_RXCTRL_RXEN;
1513         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg_ctl);
1514         ixgbe_disable_rx_queue(adapter, rx_ring);
1515
1516         /* now Tx */
1517         reg_ctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx));
1518         reg_ctl &= ~IXGBE_TXDCTL_ENABLE;
1519         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx), reg_ctl);
1520
1521         switch (hw->mac.type) {
1522         case ixgbe_mac_82599EB:
1523         case ixgbe_mac_X540:
1524                 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1525                 reg_ctl &= ~IXGBE_DMATXCTL_TE;
1526                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
1527                 break;
1528         default:
1529                 break;
1530         }
1531
1532         ixgbe_reset(adapter);
1533
1534         ixgbe_free_tx_resources(&adapter->test_tx_ring);
1535         ixgbe_free_rx_resources(&adapter->test_rx_ring);
1536 }
1537
1538 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1539 {
1540         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1541         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1542         u32 rctl, reg_data;
1543         int ret_val;
1544         int err;
1545
1546         /* Setup Tx descriptor ring and Tx buffers */
1547         tx_ring->count = IXGBE_DEFAULT_TXD;
1548         tx_ring->queue_index = 0;
1549         tx_ring->dev = &adapter->pdev->dev;
1550         tx_ring->netdev = adapter->netdev;
1551         tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1552
1553         err = ixgbe_setup_tx_resources(tx_ring);
1554         if (err)
1555                 return 1;
1556
1557         switch (adapter->hw.mac.type) {
1558         case ixgbe_mac_82599EB:
1559         case ixgbe_mac_X540:
1560                 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1561                 reg_data |= IXGBE_DMATXCTL_TE;
1562                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1563                 break;
1564         default:
1565                 break;
1566         }
1567
1568         ixgbe_configure_tx_ring(adapter, tx_ring);
1569
1570         /* Setup Rx Descriptor ring and Rx buffers */
1571         rx_ring->count = IXGBE_DEFAULT_RXD;
1572         rx_ring->queue_index = 0;
1573         rx_ring->dev = &adapter->pdev->dev;
1574         rx_ring->netdev = adapter->netdev;
1575         rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1576
1577         err = ixgbe_setup_rx_resources(rx_ring);
1578         if (err) {
1579                 ret_val = 4;
1580                 goto err_nomem;
1581         }
1582
1583         rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1584         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl & ~IXGBE_RXCTRL_RXEN);
1585
1586         ixgbe_configure_rx_ring(adapter, rx_ring);
1587
1588         rctl |= IXGBE_RXCTRL_RXEN | IXGBE_RXCTRL_DMBYPS;
1589         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1590
1591         return 0;
1592
1593 err_nomem:
1594         ixgbe_free_desc_rings(adapter);
1595         return ret_val;
1596 }
1597
1598 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1599 {
1600         struct ixgbe_hw *hw = &adapter->hw;
1601         u32 reg_data;
1602
1603         /* X540 needs to set the MACC.FLU bit to force link up */
1604         if (adapter->hw.mac.type == ixgbe_mac_X540) {
1605                 reg_data = IXGBE_READ_REG(hw, IXGBE_MACC);
1606                 reg_data |= IXGBE_MACC_FLU;
1607                 IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data);
1608         }
1609
1610         /* right now we only support MAC loopback in the driver */
1611         reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1612         /* Setup MAC loopback */
1613         reg_data |= IXGBE_HLREG0_LPBK;
1614         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data);
1615
1616         reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1617         reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1618         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data);
1619
1620         reg_data = IXGBE_READ_REG(hw, IXGBE_AUTOC);
1621         reg_data &= ~IXGBE_AUTOC_LMS_MASK;
1622         reg_data |= IXGBE_AUTOC_LMS_10G_LINK_NO_AN | IXGBE_AUTOC_FLU;
1623         IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data);
1624         IXGBE_WRITE_FLUSH(hw);
1625         usleep_range(10000, 20000);
1626
1627         /* Disable Atlas Tx lanes; re-enabled in reset path */
1628         if (hw->mac.type == ixgbe_mac_82598EB) {
1629                 u8 atlas;
1630
1631                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1632                 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1633                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1634
1635                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1636                 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1637                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1638
1639                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1640                 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1641                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1642
1643                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1644                 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1645                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1646         }
1647
1648         return 0;
1649 }
1650
1651 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1652 {
1653         u32 reg_data;
1654
1655         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1656         reg_data &= ~IXGBE_HLREG0_LPBK;
1657         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1658 }
1659
1660 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
1661                                       unsigned int frame_size)
1662 {
1663         memset(skb->data, 0xFF, frame_size);
1664         frame_size >>= 1;
1665         memset(&skb->data[frame_size], 0xAA, frame_size / 2 - 1);
1666         memset(&skb->data[frame_size + 10], 0xBE, 1);
1667         memset(&skb->data[frame_size + 12], 0xAF, 1);
1668 }
1669
1670 static bool ixgbe_check_lbtest_frame(struct ixgbe_rx_buffer *rx_buffer,
1671                                      unsigned int frame_size)
1672 {
1673         unsigned char *data;
1674         bool match = true;
1675
1676         frame_size >>= 1;
1677
1678         data = kmap(rx_buffer->page) + rx_buffer->page_offset;
1679
1680         if (data[3] != 0xFF ||
1681             data[frame_size + 10] != 0xBE ||
1682             data[frame_size + 12] != 0xAF)
1683                 match = false;
1684
1685         kunmap(rx_buffer->page);
1686
1687         return match;
1688 }
1689
1690 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
1691                                   struct ixgbe_ring *tx_ring,
1692                                   unsigned int size)
1693 {
1694         union ixgbe_adv_rx_desc *rx_desc;
1695         struct ixgbe_rx_buffer *rx_buffer;
1696         struct ixgbe_tx_buffer *tx_buffer;
1697         u16 rx_ntc, tx_ntc, count = 0;
1698
1699         /* initialize next to clean and descriptor values */
1700         rx_ntc = rx_ring->next_to_clean;
1701         tx_ntc = tx_ring->next_to_clean;
1702         rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);
1703
1704         while (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_DD)) {
1705                 /* check Rx buffer */
1706                 rx_buffer = &rx_ring->rx_buffer_info[rx_ntc];
1707
1708                 /* sync Rx buffer for CPU read */
1709                 dma_sync_single_for_cpu(rx_ring->dev,
1710                                         rx_buffer->dma,
1711                                         ixgbe_rx_bufsz(rx_ring),
1712                                         DMA_FROM_DEVICE);
1713
1714                 /* verify contents of skb */
1715                 if (ixgbe_check_lbtest_frame(rx_buffer, size))
1716                         count++;
1717
1718                 /* sync Rx buffer for device write */
1719                 dma_sync_single_for_device(rx_ring->dev,
1720                                            rx_buffer->dma,
1721                                            ixgbe_rx_bufsz(rx_ring),
1722                                            DMA_FROM_DEVICE);
1723
1724                 /* unmap buffer on Tx side */
1725                 tx_buffer = &tx_ring->tx_buffer_info[tx_ntc];
1726                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
1727
1728                 /* increment Rx/Tx next to clean counters */
1729                 rx_ntc++;
1730                 if (rx_ntc == rx_ring->count)
1731                         rx_ntc = 0;
1732                 tx_ntc++;
1733                 if (tx_ntc == tx_ring->count)
1734                         tx_ntc = 0;
1735
1736                 /* fetch next descriptor */
1737                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);
1738         }
1739
1740         netdev_tx_reset_queue(txring_txq(tx_ring));
1741
1742         /* re-map buffers to ring, store next to clean values */
1743         ixgbe_alloc_rx_buffers(rx_ring, count);
1744         rx_ring->next_to_clean = rx_ntc;
1745         tx_ring->next_to_clean = tx_ntc;
1746
1747         return count;
1748 }
1749
1750 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
1751 {
1752         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1753         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1754         int i, j, lc, good_cnt, ret_val = 0;
1755         unsigned int size = 1024;
1756         netdev_tx_t tx_ret_val;
1757         struct sk_buff *skb;
1758
1759         /* allocate test skb */
1760         skb = alloc_skb(size, GFP_KERNEL);
1761         if (!skb)
1762                 return 11;
1763
1764         /* place data into test skb */
1765         ixgbe_create_lbtest_frame(skb, size);
1766         skb_put(skb, size);
1767
1768         /*
1769          * Calculate the loop count based on the largest descriptor ring
1770          * The idea is to wrap the largest ring a number of times using 64
1771          * send/receive pairs during each loop
1772          */
1773
1774         if (rx_ring->count <= tx_ring->count)
1775                 lc = ((tx_ring->count / 64) * 2) + 1;
1776         else
1777                 lc = ((rx_ring->count / 64) * 2) + 1;
1778
1779         for (j = 0; j <= lc; j++) {
1780                 /* reset count of good packets */
1781                 good_cnt = 0;
1782
1783                 /* place 64 packets on the transmit queue*/
1784                 for (i = 0; i < 64; i++) {
1785                         skb_get(skb);
1786                         tx_ret_val = ixgbe_xmit_frame_ring(skb,
1787                                                            adapter,
1788                                                            tx_ring);
1789                         if (tx_ret_val == NETDEV_TX_OK)
1790                                 good_cnt++;
1791                 }
1792
1793                 if (good_cnt != 64) {
1794                         ret_val = 12;
1795                         break;
1796                 }
1797
1798                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1799                 msleep(200);
1800
1801                 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size);
1802                 if (good_cnt != 64) {
1803                         ret_val = 13;
1804                         break;
1805                 }
1806         }
1807
1808         /* free the original skb */
1809         kfree_skb(skb);
1810
1811         return ret_val;
1812 }
1813
1814 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
1815 {
1816         *data = ixgbe_setup_desc_rings(adapter);
1817         if (*data)
1818                 goto out;
1819         *data = ixgbe_setup_loopback_test(adapter);
1820         if (*data)
1821                 goto err_loopback;
1822         *data = ixgbe_run_loopback_test(adapter);
1823         ixgbe_loopback_cleanup(adapter);
1824
1825 err_loopback:
1826         ixgbe_free_desc_rings(adapter);
1827 out:
1828         return *data;
1829 }
1830
1831 static void ixgbe_diag_test(struct net_device *netdev,
1832                             struct ethtool_test *eth_test, u64 *data)
1833 {
1834         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1835         bool if_running = netif_running(netdev);
1836
1837         set_bit(__IXGBE_TESTING, &adapter->state);
1838         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1839                 /* Offline tests */
1840
1841                 e_info(hw, "offline testing starting\n");
1842
1843                 /* Link test performed before hardware reset so autoneg doesn't
1844                  * interfere with test result */
1845                 if (ixgbe_link_test(adapter, &data[4]))
1846                         eth_test->flags |= ETH_TEST_FL_FAILED;
1847
1848                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
1849                         int i;
1850                         for (i = 0; i < adapter->num_vfs; i++) {
1851                                 if (adapter->vfinfo[i].clear_to_send) {
1852                                         netdev_warn(netdev, "%s",
1853                                                     "offline diagnostic is not "
1854                                                     "supported when VFs are "
1855                                                     "present\n");
1856                                         data[0] = 1;
1857                                         data[1] = 1;
1858                                         data[2] = 1;
1859                                         data[3] = 1;
1860                                         eth_test->flags |= ETH_TEST_FL_FAILED;
1861                                         clear_bit(__IXGBE_TESTING,
1862                                                   &adapter->state);
1863                                         goto skip_ol_tests;
1864                                 }
1865                         }
1866                 }
1867
1868                 if (if_running)
1869                         /* indicate we're in test mode */
1870                         dev_close(netdev);
1871                 else
1872                         ixgbe_reset(adapter);
1873
1874                 e_info(hw, "register testing starting\n");
1875                 if (ixgbe_reg_test(adapter, &data[0]))
1876                         eth_test->flags |= ETH_TEST_FL_FAILED;
1877
1878                 ixgbe_reset(adapter);
1879                 e_info(hw, "eeprom testing starting\n");
1880                 if (ixgbe_eeprom_test(adapter, &data[1]))
1881                         eth_test->flags |= ETH_TEST_FL_FAILED;
1882
1883                 ixgbe_reset(adapter);
1884                 e_info(hw, "interrupt testing starting\n");
1885                 if (ixgbe_intr_test(adapter, &data[2]))
1886                         eth_test->flags |= ETH_TEST_FL_FAILED;
1887
1888                 /* If SRIOV or VMDq is enabled then skip MAC
1889                  * loopback diagnostic. */
1890                 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
1891                                       IXGBE_FLAG_VMDQ_ENABLED)) {
1892                         e_info(hw, "Skip MAC loopback diagnostic in VT "
1893                                "mode\n");
1894                         data[3] = 0;
1895                         goto skip_loopback;
1896                 }
1897
1898                 ixgbe_reset(adapter);
1899                 e_info(hw, "loopback testing starting\n");
1900                 if (ixgbe_loopback_test(adapter, &data[3]))
1901                         eth_test->flags |= ETH_TEST_FL_FAILED;
1902
1903 skip_loopback:
1904                 ixgbe_reset(adapter);
1905
1906                 clear_bit(__IXGBE_TESTING, &adapter->state);
1907                 if (if_running)
1908                         dev_open(netdev);
1909         } else {
1910                 e_info(hw, "online testing starting\n");
1911                 /* Online tests */
1912                 if (ixgbe_link_test(adapter, &data[4]))
1913                         eth_test->flags |= ETH_TEST_FL_FAILED;
1914
1915                 /* Online tests aren't run; pass by default */
1916                 data[0] = 0;
1917                 data[1] = 0;
1918                 data[2] = 0;
1919                 data[3] = 0;
1920
1921                 clear_bit(__IXGBE_TESTING, &adapter->state);
1922         }
1923 skip_ol_tests:
1924         msleep_interruptible(4 * 1000);
1925 }
1926
1927 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
1928                                struct ethtool_wolinfo *wol)
1929 {
1930         struct ixgbe_hw *hw = &adapter->hw;
1931         int retval = 0;
1932
1933         /* WOL not supported for all devices */
1934         if (!ixgbe_wol_supported(adapter, hw->device_id,
1935                                  hw->subsystem_device_id)) {
1936                 retval = 1;
1937                 wol->supported = 0;
1938         }
1939
1940         return retval;
1941 }
1942
1943 static void ixgbe_get_wol(struct net_device *netdev,
1944                           struct ethtool_wolinfo *wol)
1945 {
1946         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1947
1948         wol->supported = WAKE_UCAST | WAKE_MCAST |
1949                          WAKE_BCAST | WAKE_MAGIC;
1950         wol->wolopts = 0;
1951
1952         if (ixgbe_wol_exclusion(adapter, wol) ||
1953             !device_can_wakeup(&adapter->pdev->dev))
1954                 return;
1955
1956         if (adapter->wol & IXGBE_WUFC_EX)
1957                 wol->wolopts |= WAKE_UCAST;
1958         if (adapter->wol & IXGBE_WUFC_MC)
1959                 wol->wolopts |= WAKE_MCAST;
1960         if (adapter->wol & IXGBE_WUFC_BC)
1961                 wol->wolopts |= WAKE_BCAST;
1962         if (adapter->wol & IXGBE_WUFC_MAG)
1963                 wol->wolopts |= WAKE_MAGIC;
1964 }
1965
1966 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1967 {
1968         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1969
1970         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1971                 return -EOPNOTSUPP;
1972
1973         if (ixgbe_wol_exclusion(adapter, wol))
1974                 return wol->wolopts ? -EOPNOTSUPP : 0;
1975
1976         adapter->wol = 0;
1977
1978         if (wol->wolopts & WAKE_UCAST)
1979                 adapter->wol |= IXGBE_WUFC_EX;
1980         if (wol->wolopts & WAKE_MCAST)
1981                 adapter->wol |= IXGBE_WUFC_MC;
1982         if (wol->wolopts & WAKE_BCAST)
1983                 adapter->wol |= IXGBE_WUFC_BC;
1984         if (wol->wolopts & WAKE_MAGIC)
1985                 adapter->wol |= IXGBE_WUFC_MAG;
1986
1987         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1988
1989         return 0;
1990 }
1991
1992 static int ixgbe_nway_reset(struct net_device *netdev)
1993 {
1994         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1995
1996         if (netif_running(netdev))
1997                 ixgbe_reinit_locked(adapter);
1998
1999         return 0;
2000 }
2001
2002 static int ixgbe_set_phys_id(struct net_device *netdev,
2003                              enum ethtool_phys_id_state state)
2004 {
2005         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2006         struct ixgbe_hw *hw = &adapter->hw;
2007
2008         switch (state) {
2009         case ETHTOOL_ID_ACTIVE:
2010                 adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
2011                 return 2;
2012
2013         case ETHTOOL_ID_ON:
2014                 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
2015                 break;
2016
2017         case ETHTOOL_ID_OFF:
2018                 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
2019                 break;
2020
2021         case ETHTOOL_ID_INACTIVE:
2022                 /* Restore LED settings */
2023                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg);
2024                 break;
2025         }
2026
2027         return 0;
2028 }
2029
2030 static int ixgbe_get_coalesce(struct net_device *netdev,
2031                               struct ethtool_coalesce *ec)
2032 {
2033         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2034
2035         /* only valid if in constant ITR mode */
2036         if (adapter->rx_itr_setting <= 1)
2037                 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2038         else
2039                 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2040
2041         /* if in mixed tx/rx queues per vector mode, report only rx settings */
2042         if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
2043                 return 0;
2044
2045         /* only valid if in constant ITR mode */
2046         if (adapter->tx_itr_setting <= 1)
2047                 ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2048         else
2049                 ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2050
2051         return 0;
2052 }
2053
2054 /*
2055  * this function must be called before setting the new value of
2056  * rx_itr_setting
2057  */
2058 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter)
2059 {
2060         struct net_device *netdev = adapter->netdev;
2061
2062         /* nothing to do if LRO or RSC are not enabled */
2063         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) ||
2064             !(netdev->features & NETIF_F_LRO))
2065                 return false;
2066
2067         /* check the feature flag value and enable RSC if necessary */
2068         if (adapter->rx_itr_setting == 1 ||
2069             adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
2070                 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2071                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2072                         e_info(probe, "rx-usecs value high enough "
2073                                       "to re-enable RSC\n");
2074                         return true;
2075                 }
2076         /* if interrupt rate is too high then disable RSC */
2077         } else if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2078                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2079                 e_info(probe, "rx-usecs set too low, disabling RSC\n");
2080                 return true;
2081         }
2082         return false;
2083 }
2084
2085 static int ixgbe_set_coalesce(struct net_device *netdev,
2086                               struct ethtool_coalesce *ec)
2087 {
2088         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2089         struct ixgbe_q_vector *q_vector;
2090         int i;
2091         u16 tx_itr_param, rx_itr_param;
2092         bool need_reset = false;
2093
2094         /* don't accept tx specific changes if we've got mixed RxTx vectors */
2095         if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count
2096             && ec->tx_coalesce_usecs)
2097                 return -EINVAL;
2098
2099         if ((ec->rx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)) ||
2100             (ec->tx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)))
2101                 return -EINVAL;
2102
2103         if (ec->rx_coalesce_usecs > 1)
2104                 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2105         else
2106                 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2107
2108         if (adapter->rx_itr_setting == 1)
2109                 rx_itr_param = IXGBE_20K_ITR;
2110         else
2111                 rx_itr_param = adapter->rx_itr_setting;
2112
2113         if (ec->tx_coalesce_usecs > 1)
2114                 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2115         else
2116                 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2117
2118         if (adapter->tx_itr_setting == 1)
2119                 tx_itr_param = IXGBE_10K_ITR;
2120         else
2121                 tx_itr_param = adapter->tx_itr_setting;
2122
2123         /* check the old value and enable RSC if necessary */
2124         need_reset = ixgbe_update_rsc(adapter);
2125
2126         for (i = 0; i < adapter->num_q_vectors; i++) {
2127                 q_vector = adapter->q_vector[i];
2128                 if (q_vector->tx.count && !q_vector->rx.count)
2129                         /* tx only */
2130                         q_vector->itr = tx_itr_param;
2131                 else
2132                         /* rx only or mixed */
2133                         q_vector->itr = rx_itr_param;
2134                 ixgbe_write_eitr(q_vector);
2135         }
2136
2137         /*
2138          * do reset here at the end to make sure EITR==0 case is handled
2139          * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2140          * also locks in RSC enable/disable which requires reset
2141          */
2142         if (need_reset)
2143                 ixgbe_do_reset(netdev);
2144
2145         return 0;
2146 }
2147
2148 static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2149                                         struct ethtool_rxnfc *cmd)
2150 {
2151         union ixgbe_atr_input *mask = &adapter->fdir_mask;
2152         struct ethtool_rx_flow_spec *fsp =
2153                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2154         struct hlist_node *node, *node2;
2155         struct ixgbe_fdir_filter *rule = NULL;
2156
2157         /* report total rule count */
2158         cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2159
2160         hlist_for_each_entry_safe(rule, node, node2,
2161                                   &adapter->fdir_filter_list, fdir_node) {
2162                 if (fsp->location <= rule->sw_idx)
2163                         break;
2164         }
2165
2166         if (!rule || fsp->location != rule->sw_idx)
2167                 return -EINVAL;
2168
2169         /* fill out the flow spec entry */
2170
2171         /* set flow type field */
2172         switch (rule->filter.formatted.flow_type) {
2173         case IXGBE_ATR_FLOW_TYPE_TCPV4:
2174                 fsp->flow_type = TCP_V4_FLOW;
2175                 break;
2176         case IXGBE_ATR_FLOW_TYPE_UDPV4:
2177                 fsp->flow_type = UDP_V4_FLOW;
2178                 break;
2179         case IXGBE_ATR_FLOW_TYPE_SCTPV4:
2180                 fsp->flow_type = SCTP_V4_FLOW;
2181                 break;
2182         case IXGBE_ATR_FLOW_TYPE_IPV4:
2183                 fsp->flow_type = IP_USER_FLOW;
2184                 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2185                 fsp->h_u.usr_ip4_spec.proto = 0;
2186                 fsp->m_u.usr_ip4_spec.proto = 0;
2187                 break;
2188         default:
2189                 return -EINVAL;
2190         }
2191
2192         fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port;
2193         fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port;
2194         fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port;
2195         fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port;
2196         fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0];
2197         fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0];
2198         fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0];
2199         fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0];
2200         fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id;
2201         fsp->m_ext.vlan_tci = mask->formatted.vlan_id;
2202         fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes;
2203         fsp->m_ext.vlan_etype = mask->formatted.flex_bytes;
2204         fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool);
2205         fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool);
2206         fsp->flow_type |= FLOW_EXT;
2207
2208         /* record action */
2209         if (rule->action == IXGBE_FDIR_DROP_QUEUE)
2210                 fsp->ring_cookie = RX_CLS_FLOW_DISC;
2211         else
2212                 fsp->ring_cookie = rule->action;
2213
2214         return 0;
2215 }
2216
2217 static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter,
2218                                       struct ethtool_rxnfc *cmd,
2219                                       u32 *rule_locs)
2220 {
2221         struct hlist_node *node, *node2;
2222         struct ixgbe_fdir_filter *rule;
2223         int cnt = 0;
2224
2225         /* report total rule count */
2226         cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2227
2228         hlist_for_each_entry_safe(rule, node, node2,
2229                                   &adapter->fdir_filter_list, fdir_node) {
2230                 if (cnt == cmd->rule_cnt)
2231                         return -EMSGSIZE;
2232                 rule_locs[cnt] = rule->sw_idx;
2233                 cnt++;
2234         }
2235
2236         cmd->rule_cnt = cnt;
2237
2238         return 0;
2239 }
2240
2241 static int ixgbe_get_rss_hash_opts(struct ixgbe_adapter *adapter,
2242                                    struct ethtool_rxnfc *cmd)
2243 {
2244         cmd->data = 0;
2245
2246         /* Report default options for RSS on ixgbe */
2247         switch (cmd->flow_type) {
2248         case TCP_V4_FLOW:
2249                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2250         case UDP_V4_FLOW:
2251                 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2252                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2253         case SCTP_V4_FLOW:
2254         case AH_ESP_V4_FLOW:
2255         case AH_V4_FLOW:
2256         case ESP_V4_FLOW:
2257         case IPV4_FLOW:
2258                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2259                 break;
2260         case TCP_V6_FLOW:
2261                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2262         case UDP_V6_FLOW:
2263                 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2264                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2265         case SCTP_V6_FLOW:
2266         case AH_ESP_V6_FLOW:
2267         case AH_V6_FLOW:
2268         case ESP_V6_FLOW:
2269         case IPV6_FLOW:
2270                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2271                 break;
2272         default:
2273                 return -EINVAL;
2274         }
2275
2276         return 0;
2277 }
2278
2279 static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2280                            u32 *rule_locs)
2281 {
2282         struct ixgbe_adapter *adapter = netdev_priv(dev);
2283         int ret = -EOPNOTSUPP;
2284
2285         switch (cmd->cmd) {
2286         case ETHTOOL_GRXRINGS:
2287                 cmd->data = adapter->num_rx_queues;
2288                 ret = 0;
2289                 break;
2290         case ETHTOOL_GRXCLSRLCNT:
2291                 cmd->rule_cnt = adapter->fdir_filter_count;
2292                 ret = 0;
2293                 break;
2294         case ETHTOOL_GRXCLSRULE:
2295                 ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd);
2296                 break;
2297         case ETHTOOL_GRXCLSRLALL:
2298                 ret = ixgbe_get_ethtool_fdir_all(adapter, cmd, rule_locs);
2299                 break;
2300         case ETHTOOL_GRXFH:
2301                 ret = ixgbe_get_rss_hash_opts(adapter, cmd);
2302                 break;
2303         default:
2304                 break;
2305         }
2306
2307         return ret;
2308 }
2309
2310 static int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2311                                            struct ixgbe_fdir_filter *input,
2312                                            u16 sw_idx)
2313 {
2314         struct ixgbe_hw *hw = &adapter->hw;
2315         struct hlist_node *node, *node2, *parent;
2316         struct ixgbe_fdir_filter *rule;
2317         int err = -EINVAL;
2318
2319         parent = NULL;
2320         rule = NULL;
2321
2322         hlist_for_each_entry_safe(rule, node, node2,
2323                                   &adapter->fdir_filter_list, fdir_node) {
2324                 /* hash found, or no matching entry */
2325                 if (rule->sw_idx >= sw_idx)
2326                         break;
2327                 parent = node;
2328         }
2329
2330         /* if there is an old rule occupying our place remove it */
2331         if (rule && (rule->sw_idx == sw_idx)) {
2332                 if (!input || (rule->filter.formatted.bkt_hash !=
2333                                input->filter.formatted.bkt_hash)) {
2334                         err = ixgbe_fdir_erase_perfect_filter_82599(hw,
2335                                                                 &rule->filter,
2336                                                                 sw_idx);
2337                 }
2338
2339                 hlist_del(&rule->fdir_node);
2340                 kfree(rule);
2341                 adapter->fdir_filter_count--;
2342         }
2343
2344         /*
2345          * If no input this was a delete, err should be 0 if a rule was
2346          * successfully found and removed from the list else -EINVAL
2347          */
2348         if (!input)
2349                 return err;
2350
2351         /* initialize node and set software index */
2352         INIT_HLIST_NODE(&input->fdir_node);
2353
2354         /* add filter to the list */
2355         if (parent)
2356                 hlist_add_after(parent, &input->fdir_node);
2357         else
2358                 hlist_add_head(&input->fdir_node,
2359                                &adapter->fdir_filter_list);
2360
2361         /* update counts */
2362         adapter->fdir_filter_count++;
2363
2364         return 0;
2365 }
2366
2367 static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp,
2368                                        u8 *flow_type)
2369 {
2370         switch (fsp->flow_type & ~FLOW_EXT) {
2371         case TCP_V4_FLOW:
2372                 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2373                 break;
2374         case UDP_V4_FLOW:
2375                 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2376                 break;
2377         case SCTP_V4_FLOW:
2378                 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2379                 break;
2380         case IP_USER_FLOW:
2381                 switch (fsp->h_u.usr_ip4_spec.proto) {
2382                 case IPPROTO_TCP:
2383                         *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2384                         break;
2385                 case IPPROTO_UDP:
2386                         *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2387                         break;
2388                 case IPPROTO_SCTP:
2389                         *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2390                         break;
2391                 case 0:
2392                         if (!fsp->m_u.usr_ip4_spec.proto) {
2393                                 *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4;
2394                                 break;
2395                         }
2396                 default:
2397                         return 0;
2398                 }
2399                 break;
2400         default:
2401                 return 0;
2402         }
2403
2404         return 1;
2405 }
2406
2407 static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2408                                         struct ethtool_rxnfc *cmd)
2409 {
2410         struct ethtool_rx_flow_spec *fsp =
2411                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2412         struct ixgbe_hw *hw = &adapter->hw;
2413         struct ixgbe_fdir_filter *input;
2414         union ixgbe_atr_input mask;
2415         int err;
2416
2417         if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
2418                 return -EOPNOTSUPP;
2419
2420         /*
2421          * Don't allow programming if the action is a queue greater than
2422          * the number of online Rx queues.
2423          */
2424         if ((fsp->ring_cookie != RX_CLS_FLOW_DISC) &&
2425             (fsp->ring_cookie >= adapter->num_rx_queues))
2426                 return -EINVAL;
2427
2428         /* Don't allow indexes to exist outside of available space */
2429         if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) {
2430                 e_err(drv, "Location out of range\n");
2431                 return -EINVAL;
2432         }
2433
2434         input = kzalloc(sizeof(*input), GFP_ATOMIC);
2435         if (!input)
2436                 return -ENOMEM;
2437
2438         memset(&mask, 0, sizeof(union ixgbe_atr_input));
2439
2440         /* set SW index */
2441         input->sw_idx = fsp->location;
2442
2443         /* record flow type */
2444         if (!ixgbe_flowspec_to_flow_type(fsp,
2445                                          &input->filter.formatted.flow_type)) {
2446                 e_err(drv, "Unrecognized flow type\n");
2447                 goto err_out;
2448         }
2449
2450         mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
2451                                    IXGBE_ATR_L4TYPE_MASK;
2452
2453         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
2454                 mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
2455
2456         /* Copy input into formatted structures */
2457         input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src;
2458         mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src;
2459         input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst;
2460         mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst;
2461         input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc;
2462         mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc;
2463         input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst;
2464         mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst;
2465
2466         if (fsp->flow_type & FLOW_EXT) {
2467                 input->filter.formatted.vm_pool =
2468                                 (unsigned char)ntohl(fsp->h_ext.data[1]);
2469                 mask.formatted.vm_pool =
2470                                 (unsigned char)ntohl(fsp->m_ext.data[1]);
2471                 input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci;
2472                 mask.formatted.vlan_id = fsp->m_ext.vlan_tci;
2473                 input->filter.formatted.flex_bytes =
2474                                                 fsp->h_ext.vlan_etype;
2475                 mask.formatted.flex_bytes = fsp->m_ext.vlan_etype;
2476         }
2477
2478         /* determine if we need to drop or route the packet */
2479         if (fsp->ring_cookie == RX_CLS_FLOW_DISC)
2480                 input->action = IXGBE_FDIR_DROP_QUEUE;
2481         else
2482                 input->action = fsp->ring_cookie;
2483
2484         spin_lock(&adapter->fdir_perfect_lock);
2485
2486         if (hlist_empty(&adapter->fdir_filter_list)) {
2487                 /* save mask and program input mask into HW */
2488                 memcpy(&adapter->fdir_mask, &mask, sizeof(mask));
2489                 err = ixgbe_fdir_set_input_mask_82599(hw, &mask);
2490                 if (err) {
2491                         e_err(drv, "Error writing mask\n");
2492                         goto err_out_w_lock;
2493                 }
2494         } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) {
2495                 e_err(drv, "Only one mask supported per port\n");
2496                 goto err_out_w_lock;
2497         }
2498
2499         /* apply mask and compute/store hash */
2500         ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask);
2501
2502         /* program filters to filter memory */
2503         err = ixgbe_fdir_write_perfect_filter_82599(hw,
2504                                 &input->filter, input->sw_idx,
2505                                 (input->action == IXGBE_FDIR_DROP_QUEUE) ?
2506                                 IXGBE_FDIR_DROP_QUEUE :
2507                                 adapter->rx_ring[input->action]->reg_idx);
2508         if (err)
2509                 goto err_out_w_lock;
2510
2511         ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
2512
2513         spin_unlock(&adapter->fdir_perfect_lock);
2514
2515         return err;
2516 err_out_w_lock:
2517         spin_unlock(&adapter->fdir_perfect_lock);
2518 err_out:
2519         kfree(input);
2520         return -EINVAL;
2521 }
2522
2523 static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2524                                         struct ethtool_rxnfc *cmd)
2525 {
2526         struct ethtool_rx_flow_spec *fsp =
2527                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2528         int err;
2529
2530         spin_lock(&adapter->fdir_perfect_lock);
2531         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, fsp->location);
2532         spin_unlock(&adapter->fdir_perfect_lock);
2533
2534         return err;
2535 }
2536
2537 #define UDP_RSS_FLAGS (IXGBE_FLAG2_RSS_FIELD_IPV4_UDP | \
2538                        IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2539 static int ixgbe_set_rss_hash_opt(struct ixgbe_adapter *adapter,
2540                                   struct ethtool_rxnfc *nfc)
2541 {
2542         u32 flags2 = adapter->flags2;
2543
2544         /*
2545          * RSS does not support anything other than hashing
2546          * to queues on src and dst IPs and ports
2547          */
2548         if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2549                           RXH_L4_B_0_1 | RXH_L4_B_2_3))
2550                 return -EINVAL;
2551
2552         switch (nfc->flow_type) {
2553         case TCP_V4_FLOW:
2554         case TCP_V6_FLOW:
2555                 if (!(nfc->data & RXH_IP_SRC) ||
2556                     !(nfc->data & RXH_IP_DST) ||
2557                     !(nfc->data & RXH_L4_B_0_1) ||
2558                     !(nfc->data & RXH_L4_B_2_3))
2559                         return -EINVAL;
2560                 break;
2561         case UDP_V4_FLOW:
2562                 if (!(nfc->data & RXH_IP_SRC) ||
2563                     !(nfc->data & RXH_IP_DST))
2564                         return -EINVAL;
2565                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2566                 case 0:
2567                         flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
2568                         break;
2569                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2570                         flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
2571                         break;
2572                 default:
2573                         return -EINVAL;
2574                 }
2575                 break;
2576         case UDP_V6_FLOW:
2577                 if (!(nfc->data & RXH_IP_SRC) ||
2578                     !(nfc->data & RXH_IP_DST))
2579                         return -EINVAL;
2580                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2581                 case 0:
2582                         flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
2583                         break;
2584                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2585                         flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
2586                         break;
2587                 default:
2588                         return -EINVAL;
2589                 }
2590                 break;
2591         case AH_ESP_V4_FLOW:
2592         case AH_V4_FLOW:
2593         case ESP_V4_FLOW:
2594         case SCTP_V4_FLOW:
2595         case AH_ESP_V6_FLOW:
2596         case AH_V6_FLOW:
2597         case ESP_V6_FLOW:
2598         case SCTP_V6_FLOW:
2599                 if (!(nfc->data & RXH_IP_SRC) ||
2600                     !(nfc->data & RXH_IP_DST) ||
2601                     (nfc->data & RXH_L4_B_0_1) ||
2602                     (nfc->data & RXH_L4_B_2_3))
2603                         return -EINVAL;
2604                 break;
2605         default:
2606                 return -EINVAL;
2607         }
2608
2609         /* if we changed something we need to update flags */
2610         if (flags2 != adapter->flags2) {
2611                 struct ixgbe_hw *hw = &adapter->hw;
2612                 u32 mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC);
2613
2614                 if ((flags2 & UDP_RSS_FLAGS) &&
2615                     !(adapter->flags2 & UDP_RSS_FLAGS))
2616                         e_warn(drv, "enabling UDP RSS: fragmented packets"
2617                                " may arrive out of order to the stack above\n");
2618
2619                 adapter->flags2 = flags2;
2620
2621                 /* Perform hash on these packet types */
2622                 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4
2623                       | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2624                       | IXGBE_MRQC_RSS_FIELD_IPV6
2625                       | IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
2626
2627                 mrqc &= ~(IXGBE_MRQC_RSS_FIELD_IPV4_UDP |
2628                           IXGBE_MRQC_RSS_FIELD_IPV6_UDP);
2629
2630                 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2631                         mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
2632
2633                 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2634                         mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
2635
2636                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
2637         }
2638
2639         return 0;
2640 }
2641
2642 static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2643 {
2644         struct ixgbe_adapter *adapter = netdev_priv(dev);
2645         int ret = -EOPNOTSUPP;
2646
2647         switch (cmd->cmd) {
2648         case ETHTOOL_SRXCLSRLINS:
2649                 ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd);
2650                 break;
2651         case ETHTOOL_SRXCLSRLDEL:
2652                 ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd);
2653                 break;
2654         case ETHTOOL_SRXFH:
2655                 ret = ixgbe_set_rss_hash_opt(adapter, cmd);
2656                 break;
2657         default:
2658                 break;
2659         }
2660
2661         return ret;
2662 }
2663
2664 static int ixgbe_get_ts_info(struct net_device *dev,
2665                              struct ethtool_ts_info *info)
2666 {
2667         struct ixgbe_adapter *adapter = netdev_priv(dev);
2668
2669         switch (adapter->hw.mac.type) {
2670 #ifdef CONFIG_IXGBE_PTP
2671         case ixgbe_mac_X540:
2672         case ixgbe_mac_82599EB:
2673                 info->so_timestamping =
2674                         SOF_TIMESTAMPING_TX_HARDWARE |
2675                         SOF_TIMESTAMPING_RX_HARDWARE |
2676                         SOF_TIMESTAMPING_RAW_HARDWARE;
2677
2678                 if (adapter->ptp_clock)
2679                         info->phc_index = ptp_clock_index(adapter->ptp_clock);
2680                 else
2681                         info->phc_index = -1;
2682
2683                 info->tx_types =
2684                         (1 << HWTSTAMP_TX_OFF) |
2685                         (1 << HWTSTAMP_TX_ON);
2686
2687                 info->rx_filters =
2688                         (1 << HWTSTAMP_FILTER_NONE) |
2689                         (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2690                         (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2691                         (1 << HWTSTAMP_FILTER_PTP_V2_EVENT);
2692                 break;
2693 #endif /* CONFIG_IXGBE_PTP */
2694         default:
2695                 return ethtool_op_get_ts_info(dev, info);
2696                 break;
2697         }
2698         return 0;
2699 }
2700
2701 static const struct ethtool_ops ixgbe_ethtool_ops = {
2702         .get_settings           = ixgbe_get_settings,
2703         .set_settings           = ixgbe_set_settings,
2704         .get_drvinfo            = ixgbe_get_drvinfo,
2705         .get_regs_len           = ixgbe_get_regs_len,
2706         .get_regs               = ixgbe_get_regs,
2707         .get_wol                = ixgbe_get_wol,
2708         .set_wol                = ixgbe_set_wol,
2709         .nway_reset             = ixgbe_nway_reset,
2710         .get_link               = ethtool_op_get_link,
2711         .get_eeprom_len         = ixgbe_get_eeprom_len,
2712         .get_eeprom             = ixgbe_get_eeprom,
2713         .set_eeprom             = ixgbe_set_eeprom,
2714         .get_ringparam          = ixgbe_get_ringparam,
2715         .set_ringparam          = ixgbe_set_ringparam,
2716         .get_pauseparam         = ixgbe_get_pauseparam,
2717         .set_pauseparam         = ixgbe_set_pauseparam,
2718         .get_msglevel           = ixgbe_get_msglevel,
2719         .set_msglevel           = ixgbe_set_msglevel,
2720         .self_test              = ixgbe_diag_test,
2721         .get_strings            = ixgbe_get_strings,
2722         .set_phys_id            = ixgbe_set_phys_id,
2723         .get_sset_count         = ixgbe_get_sset_count,
2724         .get_ethtool_stats      = ixgbe_get_ethtool_stats,
2725         .get_coalesce           = ixgbe_get_coalesce,
2726         .set_coalesce           = ixgbe_set_coalesce,
2727         .get_rxnfc              = ixgbe_get_rxnfc,
2728         .set_rxnfc              = ixgbe_set_rxnfc,
2729         .get_ts_info            = ixgbe_get_ts_info,
2730 };
2731
2732 void ixgbe_set_ethtool_ops(struct net_device *netdev)
2733 {
2734         SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
2735 }