1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2014 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
36 #include <linux/interrupt.h>
38 #include <linux/tcp.h>
39 #include <linux/sctp.h>
40 #include <linux/pkt_sched.h>
41 #include <linux/ipv6.h>
42 #include <linux/slab.h>
43 #include <net/checksum.h>
44 #include <net/ip6_checksum.h>
45 #include <linux/etherdevice.h>
46 #include <linux/ethtool.h>
48 #include <linux/if_vlan.h>
49 #include <linux/if_macvlan.h>
50 #include <linux/if_bridge.h>
51 #include <linux/prefetch.h>
52 #include <scsi/fc/fc_fcoe.h>
55 #include <linux/of_net.h>
59 #include <asm/idprom.h>
64 #include "ixgbe_common.h"
65 #include "ixgbe_dcb_82599.h"
66 #include "ixgbe_sriov.h"
68 char ixgbe_driver_name[] = "ixgbe";
69 static const char ixgbe_driver_string[] =
70 "Intel(R) 10 Gigabit PCI Express Network Driver";
72 char ixgbe_default_device_descr[] =
73 "Intel(R) 10 Gigabit Network Connection";
75 static char ixgbe_default_device_descr[] =
76 "Intel(R) 10 Gigabit Network Connection";
78 #define DRV_VERSION "3.19.1-k"
79 const char ixgbe_driver_version[] = DRV_VERSION;
80 static const char ixgbe_copyright[] =
81 "Copyright (c) 1999-2014 Intel Corporation.";
83 static const struct ixgbe_info *ixgbe_info_tbl[] = {
84 [board_82598] = &ixgbe_82598_info,
85 [board_82599] = &ixgbe_82599_info,
86 [board_X540] = &ixgbe_X540_info,
87 [board_X550] = &ixgbe_X550_info,
88 [board_X550EM_x] = &ixgbe_X550EM_x_info,
91 /* ixgbe_pci_tbl - PCI Device ID Table
93 * Wildcard entries (PCI_ANY_ID) should come last
94 * Last entry must be all 0s
96 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
97 * Class, Class Mask, private data (not used) }
99 static const struct pci_device_id ixgbe_pci_tbl[] = {
100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
117 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
118 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
119 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
120 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
121 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
122 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
123 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
124 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
125 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
126 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
127 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
128 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
129 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
130 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
131 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
132 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
133 /* required last entry */
136 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
138 #ifdef CONFIG_IXGBE_DCA
139 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
141 static struct notifier_block dca_notifier = {
142 .notifier_call = ixgbe_notify_dca,
148 #ifdef CONFIG_PCI_IOV
149 static unsigned int max_vfs;
150 module_param(max_vfs, uint, 0);
151 MODULE_PARM_DESC(max_vfs,
152 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
153 #endif /* CONFIG_PCI_IOV */
155 static unsigned int allow_unsupported_sfp;
156 module_param(allow_unsupported_sfp, uint, 0);
157 MODULE_PARM_DESC(allow_unsupported_sfp,
158 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
160 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
161 static int debug = -1;
162 module_param(debug, int, 0);
163 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
165 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
166 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
167 MODULE_LICENSE("GPL");
168 MODULE_VERSION(DRV_VERSION);
170 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
172 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
175 struct pci_dev *parent_dev;
176 struct pci_bus *parent_bus;
178 parent_bus = adapter->pdev->bus->parent;
182 parent_dev = parent_bus->self;
186 if (!pci_is_pcie(parent_dev))
189 pcie_capability_read_word(parent_dev, reg, value);
190 if (*value == IXGBE_FAILED_READ_CFG_WORD &&
191 ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
196 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
198 struct ixgbe_hw *hw = &adapter->hw;
202 hw->bus.type = ixgbe_bus_type_pci_express;
204 /* Get the negotiated link width and speed from PCI config space of the
205 * parent, as this device is behind a switch
207 err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
209 /* assume caller will handle error case */
213 hw->bus.width = ixgbe_convert_bus_width(link_status);
214 hw->bus.speed = ixgbe_convert_bus_speed(link_status);
220 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
221 * @hw: hw specific details
223 * This function is used by probe to determine whether a device's PCI-Express
224 * bandwidth details should be gathered from the parent bus instead of from the
225 * device. Used to ensure that various locations all have the correct device ID
228 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
230 switch (hw->device_id) {
231 case IXGBE_DEV_ID_82599_SFP_SF_QP:
232 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
239 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
243 enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
244 enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
245 struct pci_dev *pdev;
247 /* determine whether to use the the parent device
249 if (ixgbe_pcie_from_parent(&adapter->hw))
250 pdev = adapter->pdev->bus->parent->self;
252 pdev = adapter->pdev;
254 if (pcie_get_minimum_link(pdev, &speed, &width) ||
255 speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
256 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
261 case PCIE_SPEED_2_5GT:
262 /* 8b/10b encoding reduces max throughput by 20% */
265 case PCIE_SPEED_5_0GT:
266 /* 8b/10b encoding reduces max throughput by 20% */
269 case PCIE_SPEED_8_0GT:
270 /* 128b/130b encoding reduces throughput by less than 2% */
274 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
278 e_dev_info("PCI Express bandwidth of %dGT/s available\n",
280 e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
281 (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
282 speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
283 speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
286 (speed == PCIE_SPEED_2_5GT ? "20%" :
287 speed == PCIE_SPEED_5_0GT ? "20%" :
288 speed == PCIE_SPEED_8_0GT ? "<2%" :
291 if (max_gts < expected_gts) {
292 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
293 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
295 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
299 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
301 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
302 !test_bit(__IXGBE_REMOVING, &adapter->state) &&
303 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
304 schedule_work(&adapter->service_task);
307 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
309 struct ixgbe_adapter *adapter = hw->back;
314 e_dev_err("Adapter removed\n");
315 if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
316 ixgbe_service_event_schedule(adapter);
319 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
323 /* The following check not only optimizes a bit by not
324 * performing a read on the status register when the
325 * register just read was a status register read that
326 * returned IXGBE_FAILED_READ_REG. It also blocks any
327 * potential recursion.
329 if (reg == IXGBE_STATUS) {
330 ixgbe_remove_adapter(hw);
333 value = ixgbe_read_reg(hw, IXGBE_STATUS);
334 if (value == IXGBE_FAILED_READ_REG)
335 ixgbe_remove_adapter(hw);
339 * ixgbe_read_reg - Read from device register
340 * @hw: hw specific details
341 * @reg: offset of register to read
343 * Returns : value read or IXGBE_FAILED_READ_REG if removed
345 * This function is used to read device registers. It checks for device
346 * removal by confirming any read that returns all ones by checking the
347 * status register value for all ones. This function avoids reading from
348 * the hardware if a removal was previously detected in which case it
349 * returns IXGBE_FAILED_READ_REG (all ones).
351 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
353 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
356 if (ixgbe_removed(reg_addr))
357 return IXGBE_FAILED_READ_REG;
358 value = readl(reg_addr + reg);
359 if (unlikely(value == IXGBE_FAILED_READ_REG))
360 ixgbe_check_remove(hw, reg);
364 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
368 pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
369 if (value == IXGBE_FAILED_READ_CFG_WORD) {
370 ixgbe_remove_adapter(hw);
376 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
378 struct ixgbe_adapter *adapter = hw->back;
381 if (ixgbe_removed(hw->hw_addr))
382 return IXGBE_FAILED_READ_CFG_WORD;
383 pci_read_config_word(adapter->pdev, reg, &value);
384 if (value == IXGBE_FAILED_READ_CFG_WORD &&
385 ixgbe_check_cfg_remove(hw, adapter->pdev))
386 return IXGBE_FAILED_READ_CFG_WORD;
390 #ifdef CONFIG_PCI_IOV
391 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
393 struct ixgbe_adapter *adapter = hw->back;
396 if (ixgbe_removed(hw->hw_addr))
397 return IXGBE_FAILED_READ_CFG_DWORD;
398 pci_read_config_dword(adapter->pdev, reg, &value);
399 if (value == IXGBE_FAILED_READ_CFG_DWORD &&
400 ixgbe_check_cfg_remove(hw, adapter->pdev))
401 return IXGBE_FAILED_READ_CFG_DWORD;
404 #endif /* CONFIG_PCI_IOV */
406 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
408 struct ixgbe_adapter *adapter = hw->back;
410 if (ixgbe_removed(hw->hw_addr))
412 pci_write_config_word(adapter->pdev, reg, value);
415 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
417 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
419 /* flush memory to make sure state is correct before next watchdog */
420 smp_mb__before_atomic();
421 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
424 struct ixgbe_reg_info {
429 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
431 /* General Registers */
432 {IXGBE_CTRL, "CTRL"},
433 {IXGBE_STATUS, "STATUS"},
434 {IXGBE_CTRL_EXT, "CTRL_EXT"},
436 /* Interrupt Registers */
437 {IXGBE_EICR, "EICR"},
440 {IXGBE_SRRCTL(0), "SRRCTL"},
441 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
442 {IXGBE_RDLEN(0), "RDLEN"},
443 {IXGBE_RDH(0), "RDH"},
444 {IXGBE_RDT(0), "RDT"},
445 {IXGBE_RXDCTL(0), "RXDCTL"},
446 {IXGBE_RDBAL(0), "RDBAL"},
447 {IXGBE_RDBAH(0), "RDBAH"},
450 {IXGBE_TDBAL(0), "TDBAL"},
451 {IXGBE_TDBAH(0), "TDBAH"},
452 {IXGBE_TDLEN(0), "TDLEN"},
453 {IXGBE_TDH(0), "TDH"},
454 {IXGBE_TDT(0), "TDT"},
455 {IXGBE_TXDCTL(0), "TXDCTL"},
457 /* List Terminator */
463 * ixgbe_regdump - register printout routine
465 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
471 switch (reginfo->ofs) {
472 case IXGBE_SRRCTL(0):
473 for (i = 0; i < 64; i++)
474 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
476 case IXGBE_DCA_RXCTRL(0):
477 for (i = 0; i < 64; i++)
478 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
481 for (i = 0; i < 64; i++)
482 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
485 for (i = 0; i < 64; i++)
486 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
489 for (i = 0; i < 64; i++)
490 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
492 case IXGBE_RXDCTL(0):
493 for (i = 0; i < 64; i++)
494 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
497 for (i = 0; i < 64; i++)
498 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
501 for (i = 0; i < 64; i++)
502 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
505 for (i = 0; i < 64; i++)
506 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
509 for (i = 0; i < 64; i++)
510 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
513 for (i = 0; i < 64; i++)
514 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
517 for (i = 0; i < 64; i++)
518 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
521 for (i = 0; i < 64; i++)
522 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
524 case IXGBE_TXDCTL(0):
525 for (i = 0; i < 64; i++)
526 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
529 pr_info("%-15s %08x\n", reginfo->name,
530 IXGBE_READ_REG(hw, reginfo->ofs));
534 for (i = 0; i < 8; i++) {
535 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
536 pr_err("%-15s", rname);
537 for (j = 0; j < 8; j++)
538 pr_cont(" %08x", regs[i*8+j]);
545 * ixgbe_dump - Print registers, tx-rings and rx-rings
547 static void ixgbe_dump(struct ixgbe_adapter *adapter)
549 struct net_device *netdev = adapter->netdev;
550 struct ixgbe_hw *hw = &adapter->hw;
551 struct ixgbe_reg_info *reginfo;
553 struct ixgbe_ring *tx_ring;
554 struct ixgbe_tx_buffer *tx_buffer;
555 union ixgbe_adv_tx_desc *tx_desc;
556 struct my_u0 { u64 a; u64 b; } *u0;
557 struct ixgbe_ring *rx_ring;
558 union ixgbe_adv_rx_desc *rx_desc;
559 struct ixgbe_rx_buffer *rx_buffer_info;
563 if (!netif_msg_hw(adapter))
566 /* Print netdevice Info */
568 dev_info(&adapter->pdev->dev, "Net device Info\n");
569 pr_info("Device Name state "
570 "trans_start last_rx\n");
571 pr_info("%-15s %016lX %016lX %016lX\n",
578 /* Print Registers */
579 dev_info(&adapter->pdev->dev, "Register Dump\n");
580 pr_info(" Register Name Value\n");
581 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
582 reginfo->name; reginfo++) {
583 ixgbe_regdump(hw, reginfo);
586 /* Print TX Ring Summary */
587 if (!netdev || !netif_running(netdev))
590 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
591 pr_info(" %s %s %s %s\n",
592 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
593 "leng", "ntw", "timestamp");
594 for (n = 0; n < adapter->num_tx_queues; n++) {
595 tx_ring = adapter->tx_ring[n];
596 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
597 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
598 n, tx_ring->next_to_use, tx_ring->next_to_clean,
599 (u64)dma_unmap_addr(tx_buffer, dma),
600 dma_unmap_len(tx_buffer, len),
601 tx_buffer->next_to_watch,
602 (u64)tx_buffer->time_stamp);
606 if (!netif_msg_tx_done(adapter))
607 goto rx_ring_summary;
609 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
611 /* Transmit Descriptor Formats
613 * 82598 Advanced Transmit Descriptor
614 * +--------------------------------------------------------------+
615 * 0 | Buffer Address [63:0] |
616 * +--------------------------------------------------------------+
617 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
618 * +--------------------------------------------------------------+
619 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
621 * 82598 Advanced Transmit Descriptor (Write-Back Format)
622 * +--------------------------------------------------------------+
624 * +--------------------------------------------------------------+
625 * 8 | RSV | STA | NXTSEQ |
626 * +--------------------------------------------------------------+
629 * 82599+ Advanced Transmit Descriptor
630 * +--------------------------------------------------------------+
631 * 0 | Buffer Address [63:0] |
632 * +--------------------------------------------------------------+
633 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
634 * +--------------------------------------------------------------+
635 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
637 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
638 * +--------------------------------------------------------------+
640 * +--------------------------------------------------------------+
641 * 8 | RSV | STA | RSV |
642 * +--------------------------------------------------------------+
646 for (n = 0; n < adapter->num_tx_queues; n++) {
647 tx_ring = adapter->tx_ring[n];
648 pr_info("------------------------------------\n");
649 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
650 pr_info("------------------------------------\n");
651 pr_info("%s%s %s %s %s %s\n",
652 "T [desc] [address 63:0 ] ",
653 "[PlPOIdStDDt Ln] [bi->dma ] ",
654 "leng", "ntw", "timestamp", "bi->skb");
656 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
657 tx_desc = IXGBE_TX_DESC(tx_ring, i);
658 tx_buffer = &tx_ring->tx_buffer_info[i];
659 u0 = (struct my_u0 *)tx_desc;
660 if (dma_unmap_len(tx_buffer, len) > 0) {
661 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p",
665 (u64)dma_unmap_addr(tx_buffer, dma),
666 dma_unmap_len(tx_buffer, len),
667 tx_buffer->next_to_watch,
668 (u64)tx_buffer->time_stamp,
670 if (i == tx_ring->next_to_use &&
671 i == tx_ring->next_to_clean)
673 else if (i == tx_ring->next_to_use)
675 else if (i == tx_ring->next_to_clean)
680 if (netif_msg_pktdata(adapter) &&
682 print_hex_dump(KERN_INFO, "",
683 DUMP_PREFIX_ADDRESS, 16, 1,
684 tx_buffer->skb->data,
685 dma_unmap_len(tx_buffer, len),
691 /* Print RX Rings Summary */
693 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
694 pr_info("Queue [NTU] [NTC]\n");
695 for (n = 0; n < adapter->num_rx_queues; n++) {
696 rx_ring = adapter->rx_ring[n];
697 pr_info("%5d %5X %5X\n",
698 n, rx_ring->next_to_use, rx_ring->next_to_clean);
702 if (!netif_msg_rx_status(adapter))
705 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
707 /* Receive Descriptor Formats
709 * 82598 Advanced Receive Descriptor (Read) Format
711 * +-----------------------------------------------------+
712 * 0 | Packet Buffer Address [63:1] |A0/NSE|
713 * +----------------------------------------------+------+
714 * 8 | Header Buffer Address [63:1] | DD |
715 * +-----------------------------------------------------+
718 * 82598 Advanced Receive Descriptor (Write-Back) Format
720 * 63 48 47 32 31 30 21 20 16 15 4 3 0
721 * +------------------------------------------------------+
722 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
723 * | Packet | IP | | | | Type | Type |
724 * | Checksum | Ident | | | | | |
725 * +------------------------------------------------------+
726 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
727 * +------------------------------------------------------+
728 * 63 48 47 32 31 20 19 0
730 * 82599+ Advanced Receive Descriptor (Read) Format
732 * +-----------------------------------------------------+
733 * 0 | Packet Buffer Address [63:1] |A0/NSE|
734 * +----------------------------------------------+------+
735 * 8 | Header Buffer Address [63:1] | DD |
736 * +-----------------------------------------------------+
739 * 82599+ Advanced Receive Descriptor (Write-Back) Format
741 * 63 48 47 32 31 30 21 20 17 16 4 3 0
742 * +------------------------------------------------------+
743 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
744 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
745 * |/ Flow Dir Flt ID | | | | | |
746 * +------------------------------------------------------+
747 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
748 * +------------------------------------------------------+
749 * 63 48 47 32 31 20 19 0
752 for (n = 0; n < adapter->num_rx_queues; n++) {
753 rx_ring = adapter->rx_ring[n];
754 pr_info("------------------------------------\n");
755 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
756 pr_info("------------------------------------\n");
758 "R [desc] [ PktBuf A0] ",
759 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
760 "<-- Adv Rx Read format\n");
762 "RWB[desc] [PcsmIpSHl PtRs] ",
763 "[vl er S cks ln] ---------------- [bi->skb ] ",
764 "<-- Adv Rx Write-Back format\n");
766 for (i = 0; i < rx_ring->count; i++) {
767 rx_buffer_info = &rx_ring->rx_buffer_info[i];
768 rx_desc = IXGBE_RX_DESC(rx_ring, i);
769 u0 = (struct my_u0 *)rx_desc;
770 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
771 if (staterr & IXGBE_RXD_STAT_DD) {
772 /* Descriptor Done */
773 pr_info("RWB[0x%03X] %016llX "
774 "%016llX ---------------- %p", i,
777 rx_buffer_info->skb);
779 pr_info("R [0x%03X] %016llX "
780 "%016llX %016llX %p", i,
783 (u64)rx_buffer_info->dma,
784 rx_buffer_info->skb);
786 if (netif_msg_pktdata(adapter) &&
787 rx_buffer_info->dma) {
788 print_hex_dump(KERN_INFO, "",
789 DUMP_PREFIX_ADDRESS, 16, 1,
790 page_address(rx_buffer_info->page) +
791 rx_buffer_info->page_offset,
792 ixgbe_rx_bufsz(rx_ring), true);
796 if (i == rx_ring->next_to_use)
798 else if (i == rx_ring->next_to_clean)
807 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
811 /* Let firmware take over control of h/w */
812 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
813 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
814 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
817 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
821 /* Let firmware know the driver has taken over */
822 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
823 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
824 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
828 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
829 * @adapter: pointer to adapter struct
830 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
831 * @queue: queue to map the corresponding interrupt to
832 * @msix_vector: the vector to map to the corresponding queue
835 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
836 u8 queue, u8 msix_vector)
839 struct ixgbe_hw *hw = &adapter->hw;
840 switch (hw->mac.type) {
841 case ixgbe_mac_82598EB:
842 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
845 index = (((direction * 64) + queue) >> 2) & 0x1F;
846 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
847 ivar &= ~(0xFF << (8 * (queue & 0x3)));
848 ivar |= (msix_vector << (8 * (queue & 0x3)));
849 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
851 case ixgbe_mac_82599EB:
854 case ixgbe_mac_X550EM_x:
855 if (direction == -1) {
857 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
858 index = ((queue & 1) * 8);
859 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
860 ivar &= ~(0xFF << index);
861 ivar |= (msix_vector << index);
862 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
865 /* tx or rx causes */
866 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
867 index = ((16 * (queue & 1)) + (8 * direction));
868 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
869 ivar &= ~(0xFF << index);
870 ivar |= (msix_vector << index);
871 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
879 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
884 switch (adapter->hw.mac.type) {
885 case ixgbe_mac_82598EB:
886 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
887 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
889 case ixgbe_mac_82599EB:
892 case ixgbe_mac_X550EM_x:
893 mask = (qmask & 0xFFFFFFFF);
894 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
895 mask = (qmask >> 32);
896 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
903 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
904 struct ixgbe_tx_buffer *tx_buffer)
906 if (tx_buffer->skb) {
907 dev_kfree_skb_any(tx_buffer->skb);
908 if (dma_unmap_len(tx_buffer, len))
909 dma_unmap_single(ring->dev,
910 dma_unmap_addr(tx_buffer, dma),
911 dma_unmap_len(tx_buffer, len),
913 } else if (dma_unmap_len(tx_buffer, len)) {
914 dma_unmap_page(ring->dev,
915 dma_unmap_addr(tx_buffer, dma),
916 dma_unmap_len(tx_buffer, len),
919 tx_buffer->next_to_watch = NULL;
920 tx_buffer->skb = NULL;
921 dma_unmap_len_set(tx_buffer, len, 0);
922 /* tx_buffer must be completely set up in the transmit path */
925 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
927 struct ixgbe_hw *hw = &adapter->hw;
928 struct ixgbe_hw_stats *hwstats = &adapter->stats;
932 if ((hw->fc.current_mode != ixgbe_fc_full) &&
933 (hw->fc.current_mode != ixgbe_fc_rx_pause))
936 switch (hw->mac.type) {
937 case ixgbe_mac_82598EB:
938 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
941 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
943 hwstats->lxoffrxc += data;
945 /* refill credits (no tx hang) if we received xoff */
949 for (i = 0; i < adapter->num_tx_queues; i++)
950 clear_bit(__IXGBE_HANG_CHECK_ARMED,
951 &adapter->tx_ring[i]->state);
954 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
956 struct ixgbe_hw *hw = &adapter->hw;
957 struct ixgbe_hw_stats *hwstats = &adapter->stats;
961 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
963 if (adapter->ixgbe_ieee_pfc)
964 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
966 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
967 ixgbe_update_xoff_rx_lfc(adapter);
971 /* update stats for each tc, only valid with PFC enabled */
972 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
975 switch (hw->mac.type) {
976 case ixgbe_mac_82598EB:
977 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
980 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
982 hwstats->pxoffrxc[i] += pxoffrxc;
983 /* Get the TC for given UP */
984 tc = netdev_get_prio_tc_map(adapter->netdev, i);
985 xoff[tc] += pxoffrxc;
988 /* disarm tx queues that have received xoff frames */
989 for (i = 0; i < adapter->num_tx_queues; i++) {
990 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
992 tc = tx_ring->dcb_tc;
994 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
998 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1000 return ring->stats.packets;
1003 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1005 struct ixgbe_adapter *adapter;
1006 struct ixgbe_hw *hw;
1009 if (ring->l2_accel_priv)
1010 adapter = ring->l2_accel_priv->real_adapter;
1012 adapter = netdev_priv(ring->netdev);
1015 head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1016 tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1019 return (head < tail) ?
1020 tail - head : (tail + ring->count - head);
1025 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1027 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1028 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1029 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1031 clear_check_for_tx_hang(tx_ring);
1034 * Check for a hung queue, but be thorough. This verifies
1035 * that a transmit has been completed since the previous
1036 * check AND there is at least one packet pending. The
1037 * ARMED bit is set to indicate a potential hang. The
1038 * bit is cleared if a pause frame is received to remove
1039 * false hang detection due to PFC or 802.3x frames. By
1040 * requiring this to fail twice we avoid races with
1041 * pfc clearing the ARMED bit and conditions where we
1042 * run the check_tx_hang logic with a transmit completion
1043 * pending but without time to complete it yet.
1045 if (tx_done_old == tx_done && tx_pending)
1046 /* make sure it is true for two checks in a row */
1047 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1049 /* update completed stats and continue */
1050 tx_ring->tx_stats.tx_done_old = tx_done;
1051 /* reset the countdown */
1052 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1058 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1059 * @adapter: driver private struct
1061 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1064 /* Do the reset outside of interrupt context */
1065 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1066 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
1067 e_warn(drv, "initiating reset due to tx timeout\n");
1068 ixgbe_service_event_schedule(adapter);
1073 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1074 * @q_vector: structure containing interrupt and ring information
1075 * @tx_ring: tx ring to clean
1077 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1078 struct ixgbe_ring *tx_ring)
1080 struct ixgbe_adapter *adapter = q_vector->adapter;
1081 struct ixgbe_tx_buffer *tx_buffer;
1082 union ixgbe_adv_tx_desc *tx_desc;
1083 unsigned int total_bytes = 0, total_packets = 0;
1084 unsigned int budget = q_vector->tx.work_limit;
1085 unsigned int i = tx_ring->next_to_clean;
1087 if (test_bit(__IXGBE_DOWN, &adapter->state))
1090 tx_buffer = &tx_ring->tx_buffer_info[i];
1091 tx_desc = IXGBE_TX_DESC(tx_ring, i);
1092 i -= tx_ring->count;
1095 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1097 /* if next_to_watch is not set then there is no work pending */
1101 /* prevent any other reads prior to eop_desc */
1102 read_barrier_depends();
1104 /* if DD is not set pending work has not been completed */
1105 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1108 /* clear next_to_watch to prevent false hangs */
1109 tx_buffer->next_to_watch = NULL;
1111 /* update the statistics for this packet */
1112 total_bytes += tx_buffer->bytecount;
1113 total_packets += tx_buffer->gso_segs;
1116 dev_consume_skb_any(tx_buffer->skb);
1118 /* unmap skb header data */
1119 dma_unmap_single(tx_ring->dev,
1120 dma_unmap_addr(tx_buffer, dma),
1121 dma_unmap_len(tx_buffer, len),
1124 /* clear tx_buffer data */
1125 tx_buffer->skb = NULL;
1126 dma_unmap_len_set(tx_buffer, len, 0);
1128 /* unmap remaining buffers */
1129 while (tx_desc != eop_desc) {
1134 i -= tx_ring->count;
1135 tx_buffer = tx_ring->tx_buffer_info;
1136 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1139 /* unmap any remaining paged data */
1140 if (dma_unmap_len(tx_buffer, len)) {
1141 dma_unmap_page(tx_ring->dev,
1142 dma_unmap_addr(tx_buffer, dma),
1143 dma_unmap_len(tx_buffer, len),
1145 dma_unmap_len_set(tx_buffer, len, 0);
1149 /* move us one more past the eop_desc for start of next pkt */
1154 i -= tx_ring->count;
1155 tx_buffer = tx_ring->tx_buffer_info;
1156 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1159 /* issue prefetch for next Tx descriptor */
1162 /* update budget accounting */
1164 } while (likely(budget));
1166 i += tx_ring->count;
1167 tx_ring->next_to_clean = i;
1168 u64_stats_update_begin(&tx_ring->syncp);
1169 tx_ring->stats.bytes += total_bytes;
1170 tx_ring->stats.packets += total_packets;
1171 u64_stats_update_end(&tx_ring->syncp);
1172 q_vector->tx.total_bytes += total_bytes;
1173 q_vector->tx.total_packets += total_packets;
1175 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1176 /* schedule immediate reset if we believe we hung */
1177 struct ixgbe_hw *hw = &adapter->hw;
1178 e_err(drv, "Detected Tx Unit Hang\n"
1180 " TDH, TDT <%x>, <%x>\n"
1181 " next_to_use <%x>\n"
1182 " next_to_clean <%x>\n"
1183 "tx_buffer_info[next_to_clean]\n"
1184 " time_stamp <%lx>\n"
1186 tx_ring->queue_index,
1187 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1188 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1189 tx_ring->next_to_use, i,
1190 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1192 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1195 "tx hang %d detected on queue %d, resetting adapter\n",
1196 adapter->tx_timeout_count + 1, tx_ring->queue_index);
1198 /* schedule immediate reset if we believe we hung */
1199 ixgbe_tx_timeout_reset(adapter);
1201 /* the adapter is about to reset, no point in enabling stuff */
1205 netdev_tx_completed_queue(txring_txq(tx_ring),
1206 total_packets, total_bytes);
1208 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1209 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1210 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1211 /* Make sure that anybody stopping the queue after this
1212 * sees the new next_to_clean.
1215 if (__netif_subqueue_stopped(tx_ring->netdev,
1216 tx_ring->queue_index)
1217 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1218 netif_wake_subqueue(tx_ring->netdev,
1219 tx_ring->queue_index);
1220 ++tx_ring->tx_stats.restart_queue;
1227 #ifdef CONFIG_IXGBE_DCA
1228 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1229 struct ixgbe_ring *tx_ring,
1232 struct ixgbe_hw *hw = &adapter->hw;
1233 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1236 switch (hw->mac.type) {
1237 case ixgbe_mac_82598EB:
1238 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1240 case ixgbe_mac_82599EB:
1241 case ixgbe_mac_X540:
1242 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1243 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1246 /* for unknown hardware do not write register */
1251 * We can enable relaxed ordering for reads, but not writes when
1252 * DCA is enabled. This is due to a known issue in some chipsets
1253 * which will cause the DCA tag to be cleared.
1255 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1256 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1257 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1259 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1262 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1263 struct ixgbe_ring *rx_ring,
1266 struct ixgbe_hw *hw = &adapter->hw;
1267 u32 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1268 u8 reg_idx = rx_ring->reg_idx;
1271 switch (hw->mac.type) {
1272 case ixgbe_mac_82599EB:
1273 case ixgbe_mac_X540:
1274 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1281 * We can enable relaxed ordering for reads, but not writes when
1282 * DCA is enabled. This is due to a known issue in some chipsets
1283 * which will cause the DCA tag to be cleared.
1285 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1286 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1288 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1291 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1293 struct ixgbe_adapter *adapter = q_vector->adapter;
1294 struct ixgbe_ring *ring;
1295 int cpu = get_cpu();
1297 if (q_vector->cpu == cpu)
1300 ixgbe_for_each_ring(ring, q_vector->tx)
1301 ixgbe_update_tx_dca(adapter, ring, cpu);
1303 ixgbe_for_each_ring(ring, q_vector->rx)
1304 ixgbe_update_rx_dca(adapter, ring, cpu);
1306 q_vector->cpu = cpu;
1311 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1315 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
1318 /* always use CB2 mode, difference is masked in the CB driver */
1319 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
1321 for (i = 0; i < adapter->num_q_vectors; i++) {
1322 adapter->q_vector[i]->cpu = -1;
1323 ixgbe_update_dca(adapter->q_vector[i]);
1327 static int __ixgbe_notify_dca(struct device *dev, void *data)
1329 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1330 unsigned long event = *(unsigned long *)data;
1332 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1336 case DCA_PROVIDER_ADD:
1337 /* if we're already enabled, don't do it again */
1338 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1340 if (dca_add_requester(dev) == 0) {
1341 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1342 ixgbe_setup_dca(adapter);
1345 /* Fall Through since DCA is disabled. */
1346 case DCA_PROVIDER_REMOVE:
1347 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1348 dca_remove_requester(dev);
1349 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1350 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
1358 #endif /* CONFIG_IXGBE_DCA */
1359 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1360 union ixgbe_adv_rx_desc *rx_desc,
1361 struct sk_buff *skb)
1363 if (ring->netdev->features & NETIF_F_RXHASH)
1365 le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1371 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1372 * @ring: structure containing ring specific data
1373 * @rx_desc: advanced rx descriptor
1375 * Returns : true if it is FCoE pkt
1377 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1378 union ixgbe_adv_rx_desc *rx_desc)
1380 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1382 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1383 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1384 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1385 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1388 #endif /* IXGBE_FCOE */
1390 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1391 * @ring: structure containing ring specific data
1392 * @rx_desc: current Rx descriptor being processed
1393 * @skb: skb currently being received and modified
1395 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1396 union ixgbe_adv_rx_desc *rx_desc,
1397 struct sk_buff *skb)
1399 skb_checksum_none_assert(skb);
1401 /* Rx csum disabled */
1402 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1405 /* if IP and error */
1406 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1407 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1408 ring->rx_stats.csum_err++;
1412 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1415 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1416 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1419 * 82599 errata, UDP frames with a 0 checksum can be marked as
1422 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1423 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1426 ring->rx_stats.csum_err++;
1430 /* It must be a TCP or UDP packet with a valid checksum */
1431 skb->ip_summed = CHECKSUM_UNNECESSARY;
1434 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1435 struct ixgbe_rx_buffer *bi)
1437 struct page *page = bi->page;
1440 /* since we are recycling buffers we should seldom need to alloc */
1444 /* alloc new page for storage */
1445 page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1446 if (unlikely(!page)) {
1447 rx_ring->rx_stats.alloc_rx_page_failed++;
1451 /* map page for use */
1452 dma = dma_map_page(rx_ring->dev, page, 0,
1453 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1456 * if mapping failed free memory back to system since
1457 * there isn't much point in holding memory we can't use
1459 if (dma_mapping_error(rx_ring->dev, dma)) {
1460 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1462 rx_ring->rx_stats.alloc_rx_page_failed++;
1468 bi->page_offset = 0;
1474 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1475 * @rx_ring: ring to place buffers on
1476 * @cleaned_count: number of buffers to replace
1478 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1480 union ixgbe_adv_rx_desc *rx_desc;
1481 struct ixgbe_rx_buffer *bi;
1482 u16 i = rx_ring->next_to_use;
1488 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1489 bi = &rx_ring->rx_buffer_info[i];
1490 i -= rx_ring->count;
1493 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1497 * Refresh the desc even if buffer_addrs didn't change
1498 * because each write-back erases this info.
1500 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1506 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1507 bi = rx_ring->rx_buffer_info;
1508 i -= rx_ring->count;
1511 /* clear the status bits for the next_to_use descriptor */
1512 rx_desc->wb.upper.status_error = 0;
1515 } while (cleaned_count);
1517 i += rx_ring->count;
1519 if (rx_ring->next_to_use != i) {
1520 rx_ring->next_to_use = i;
1522 /* update next to alloc since we have filled the ring */
1523 rx_ring->next_to_alloc = i;
1525 /* Force memory writes to complete before letting h/w
1526 * know there are new descriptors to fetch. (Only
1527 * applicable for weak-ordered memory model archs,
1531 writel(i, rx_ring->tail);
1535 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1536 struct sk_buff *skb)
1538 u16 hdr_len = skb_headlen(skb);
1540 /* set gso_size to avoid messing up TCP MSS */
1541 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1542 IXGBE_CB(skb)->append_cnt);
1543 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1546 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1547 struct sk_buff *skb)
1549 /* if append_cnt is 0 then frame is not RSC */
1550 if (!IXGBE_CB(skb)->append_cnt)
1553 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1554 rx_ring->rx_stats.rsc_flush++;
1556 ixgbe_set_rsc_gso_size(rx_ring, skb);
1558 /* gso_size is computed using append_cnt so always clear it last */
1559 IXGBE_CB(skb)->append_cnt = 0;
1563 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1564 * @rx_ring: rx descriptor ring packet is being transacted on
1565 * @rx_desc: pointer to the EOP Rx descriptor
1566 * @skb: pointer to current skb being populated
1568 * This function checks the ring, descriptor, and packet information in
1569 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1570 * other fields within the skb.
1572 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1573 union ixgbe_adv_rx_desc *rx_desc,
1574 struct sk_buff *skb)
1576 struct net_device *dev = rx_ring->netdev;
1578 ixgbe_update_rsc_stats(rx_ring, skb);
1580 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1582 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1584 if (unlikely(ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS)))
1585 ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector->adapter, skb);
1587 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1588 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1589 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1590 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1593 skb_record_rx_queue(skb, rx_ring->queue_index);
1595 skb->protocol = eth_type_trans(skb, dev);
1598 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1599 struct sk_buff *skb)
1601 struct ixgbe_adapter *adapter = q_vector->adapter;
1603 if (ixgbe_qv_busy_polling(q_vector))
1604 netif_receive_skb(skb);
1605 else if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1606 napi_gro_receive(&q_vector->napi, skb);
1612 * ixgbe_is_non_eop - process handling of non-EOP buffers
1613 * @rx_ring: Rx ring being processed
1614 * @rx_desc: Rx descriptor for current buffer
1615 * @skb: Current socket buffer containing buffer in progress
1617 * This function updates next to clean. If the buffer is an EOP buffer
1618 * this function exits returning false, otherwise it will place the
1619 * sk_buff in the next buffer to be chained and return true indicating
1620 * that this is in fact a non-EOP buffer.
1622 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1623 union ixgbe_adv_rx_desc *rx_desc,
1624 struct sk_buff *skb)
1626 u32 ntc = rx_ring->next_to_clean + 1;
1628 /* fetch, update, and store next to clean */
1629 ntc = (ntc < rx_ring->count) ? ntc : 0;
1630 rx_ring->next_to_clean = ntc;
1632 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1634 /* update RSC append count if present */
1635 if (ring_is_rsc_enabled(rx_ring)) {
1636 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1637 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1639 if (unlikely(rsc_enabled)) {
1640 u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1642 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1643 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1645 /* update ntc based on RSC value */
1646 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1647 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1648 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1652 /* if we are the last buffer then there is nothing else to do */
1653 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1656 /* place skb in next buffer to be received */
1657 rx_ring->rx_buffer_info[ntc].skb = skb;
1658 rx_ring->rx_stats.non_eop_descs++;
1664 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1665 * @rx_ring: rx descriptor ring packet is being transacted on
1666 * @skb: pointer to current skb being adjusted
1668 * This function is an ixgbe specific version of __pskb_pull_tail. The
1669 * main difference between this version and the original function is that
1670 * this function can make several assumptions about the state of things
1671 * that allow for significant optimizations versus the standard function.
1672 * As a result we can do things like drop a frag and maintain an accurate
1673 * truesize for the skb.
1675 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1676 struct sk_buff *skb)
1678 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1680 unsigned int pull_len;
1683 * it is valid to use page_address instead of kmap since we are
1684 * working with pages allocated out of the lomem pool per
1685 * alloc_page(GFP_ATOMIC)
1687 va = skb_frag_address(frag);
1690 * we need the header to contain the greater of either ETH_HLEN or
1691 * 60 bytes if the skb->len is less than 60 for skb_pad.
1693 pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1695 /* align pull length to size of long to optimize memcpy performance */
1696 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1698 /* update all of the pointers */
1699 skb_frag_size_sub(frag, pull_len);
1700 frag->page_offset += pull_len;
1701 skb->data_len -= pull_len;
1702 skb->tail += pull_len;
1706 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1707 * @rx_ring: rx descriptor ring packet is being transacted on
1708 * @skb: pointer to current skb being updated
1710 * This function provides a basic DMA sync up for the first fragment of an
1711 * skb. The reason for doing this is that the first fragment cannot be
1712 * unmapped until we have reached the end of packet descriptor for a buffer
1715 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1716 struct sk_buff *skb)
1718 /* if the page was released unmap it, else just sync our portion */
1719 if (unlikely(IXGBE_CB(skb)->page_released)) {
1720 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1721 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1722 IXGBE_CB(skb)->page_released = false;
1724 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1726 dma_sync_single_range_for_cpu(rx_ring->dev,
1729 ixgbe_rx_bufsz(rx_ring),
1732 IXGBE_CB(skb)->dma = 0;
1736 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1737 * @rx_ring: rx descriptor ring packet is being transacted on
1738 * @rx_desc: pointer to the EOP Rx descriptor
1739 * @skb: pointer to current skb being fixed
1741 * Check for corrupted packet headers caused by senders on the local L2
1742 * embedded NIC switch not setting up their Tx Descriptors right. These
1743 * should be very rare.
1745 * Also address the case where we are pulling data in on pages only
1746 * and as such no data is present in the skb header.
1748 * In addition if skb is not at least 60 bytes we need to pad it so that
1749 * it is large enough to qualify as a valid Ethernet frame.
1751 * Returns true if an error was encountered and skb was freed.
1753 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1754 union ixgbe_adv_rx_desc *rx_desc,
1755 struct sk_buff *skb)
1757 struct net_device *netdev = rx_ring->netdev;
1759 /* verify that the packet does not have any known errors */
1760 if (unlikely(ixgbe_test_staterr(rx_desc,
1761 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1762 !(netdev->features & NETIF_F_RXALL))) {
1763 dev_kfree_skb_any(skb);
1767 /* place header in linear portion of buffer */
1768 if (skb_is_nonlinear(skb))
1769 ixgbe_pull_tail(rx_ring, skb);
1772 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1773 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1777 /* if skb_pad returns an error the skb was freed */
1778 if (unlikely(skb->len < 60)) {
1779 int pad_len = 60 - skb->len;
1781 if (skb_pad(skb, pad_len))
1783 __skb_put(skb, pad_len);
1790 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1791 * @rx_ring: rx descriptor ring to store buffers on
1792 * @old_buff: donor buffer to have page reused
1794 * Synchronizes page for reuse by the adapter
1796 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1797 struct ixgbe_rx_buffer *old_buff)
1799 struct ixgbe_rx_buffer *new_buff;
1800 u16 nta = rx_ring->next_to_alloc;
1802 new_buff = &rx_ring->rx_buffer_info[nta];
1804 /* update, and store next to alloc */
1806 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1808 /* transfer page from old buffer to new buffer */
1809 *new_buff = *old_buff;
1811 /* sync the buffer for use by the device */
1812 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1813 new_buff->page_offset,
1814 ixgbe_rx_bufsz(rx_ring),
1818 static inline bool ixgbe_page_is_reserved(struct page *page)
1820 return (page_to_nid(page) != numa_mem_id()) || page->pfmemalloc;
1824 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1825 * @rx_ring: rx descriptor ring to transact packets on
1826 * @rx_buffer: buffer containing page to add
1827 * @rx_desc: descriptor containing length of buffer written by hardware
1828 * @skb: sk_buff to place the data into
1830 * This function will add the data contained in rx_buffer->page to the skb.
1831 * This is done either through a direct copy if the data in the buffer is
1832 * less than the skb header size, otherwise it will just attach the page as
1833 * a frag to the skb.
1835 * The function will then update the page offset if necessary and return
1836 * true if the buffer can be reused by the adapter.
1838 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1839 struct ixgbe_rx_buffer *rx_buffer,
1840 union ixgbe_adv_rx_desc *rx_desc,
1841 struct sk_buff *skb)
1843 struct page *page = rx_buffer->page;
1844 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1845 #if (PAGE_SIZE < 8192)
1846 unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1848 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1849 unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1850 ixgbe_rx_bufsz(rx_ring);
1853 if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1854 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1856 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1858 /* page is not reserved, we can reuse buffer as-is */
1859 if (likely(!ixgbe_page_is_reserved(page)))
1862 /* this page cannot be reused so discard it */
1863 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1867 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1868 rx_buffer->page_offset, size, truesize);
1870 /* avoid re-using remote pages */
1871 if (unlikely(ixgbe_page_is_reserved(page)))
1874 #if (PAGE_SIZE < 8192)
1875 /* if we are only owner of page we can reuse it */
1876 if (unlikely(page_count(page) != 1))
1879 /* flip page offset to other buffer */
1880 rx_buffer->page_offset ^= truesize;
1882 /* move offset up to the next cache line */
1883 rx_buffer->page_offset += truesize;
1885 if (rx_buffer->page_offset > last_offset)
1889 /* Even if we own the page, we are not allowed to use atomic_set()
1890 * This would break get_page_unless_zero() users.
1892 atomic_inc(&page->_count);
1897 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
1898 union ixgbe_adv_rx_desc *rx_desc)
1900 struct ixgbe_rx_buffer *rx_buffer;
1901 struct sk_buff *skb;
1904 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
1905 page = rx_buffer->page;
1908 skb = rx_buffer->skb;
1911 void *page_addr = page_address(page) +
1912 rx_buffer->page_offset;
1914 /* prefetch first cache line of first page */
1915 prefetch(page_addr);
1916 #if L1_CACHE_BYTES < 128
1917 prefetch(page_addr + L1_CACHE_BYTES);
1920 /* allocate a skb to store the frags */
1921 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
1923 if (unlikely(!skb)) {
1924 rx_ring->rx_stats.alloc_rx_buff_failed++;
1929 * we will be copying header into skb->data in
1930 * pskb_may_pull so it is in our interest to prefetch
1931 * it now to avoid a possible cache miss
1933 prefetchw(skb->data);
1936 * Delay unmapping of the first packet. It carries the
1937 * header information, HW may still access the header
1938 * after the writeback. Only unmap it when EOP is
1941 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1944 IXGBE_CB(skb)->dma = rx_buffer->dma;
1946 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
1947 ixgbe_dma_sync_frag(rx_ring, skb);
1950 /* we are reusing so sync this buffer for CPU use */
1951 dma_sync_single_range_for_cpu(rx_ring->dev,
1953 rx_buffer->page_offset,
1954 ixgbe_rx_bufsz(rx_ring),
1957 rx_buffer->skb = NULL;
1960 /* pull page into skb */
1961 if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
1962 /* hand second half of page back to the ring */
1963 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
1964 } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
1965 /* the page has been released from the ring */
1966 IXGBE_CB(skb)->page_released = true;
1968 /* we are not reusing the buffer so unmap it */
1969 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
1970 ixgbe_rx_pg_size(rx_ring),
1974 /* clear contents of buffer_info */
1975 rx_buffer->page = NULL;
1981 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1982 * @q_vector: structure containing interrupt and ring information
1983 * @rx_ring: rx descriptor ring to transact packets on
1984 * @budget: Total limit on number of packets to process
1986 * This function provides a "bounce buffer" approach to Rx interrupt
1987 * processing. The advantage to this is that on systems that have
1988 * expensive overhead for IOMMU access this provides a means of avoiding
1989 * it by maintaining the mapping of the page to the syste.
1991 * Returns amount of work completed
1993 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
1994 struct ixgbe_ring *rx_ring,
1997 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1999 struct ixgbe_adapter *adapter = q_vector->adapter;
2001 unsigned int mss = 0;
2002 #endif /* IXGBE_FCOE */
2003 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2005 while (likely(total_rx_packets < budget)) {
2006 union ixgbe_adv_rx_desc *rx_desc;
2007 struct sk_buff *skb;
2009 /* return some buffers to hardware, one at a time is too slow */
2010 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2011 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2015 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2017 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
2021 * This memory barrier is needed to keep us from reading
2022 * any other fields out of the rx_desc until we know the
2023 * RXD_STAT_DD bit is set
2027 /* retrieve a buffer from the ring */
2028 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2030 /* exit if we failed to retrieve a buffer */
2036 /* place incomplete frames back on ring for completion */
2037 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2040 /* verify the packet layout is correct */
2041 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2044 /* probably a little skewed due to removing CRC */
2045 total_rx_bytes += skb->len;
2047 /* populate checksum, timestamp, VLAN, and protocol */
2048 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2051 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2052 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2053 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2054 /* include DDPed FCoE data */
2055 if (ddp_bytes > 0) {
2057 mss = rx_ring->netdev->mtu -
2058 sizeof(struct fcoe_hdr) -
2059 sizeof(struct fc_frame_header) -
2060 sizeof(struct fcoe_crc_eof);
2064 total_rx_bytes += ddp_bytes;
2065 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2069 dev_kfree_skb_any(skb);
2074 #endif /* IXGBE_FCOE */
2075 skb_mark_napi_id(skb, &q_vector->napi);
2076 ixgbe_rx_skb(q_vector, skb);
2078 /* update budget accounting */
2082 u64_stats_update_begin(&rx_ring->syncp);
2083 rx_ring->stats.packets += total_rx_packets;
2084 rx_ring->stats.bytes += total_rx_bytes;
2085 u64_stats_update_end(&rx_ring->syncp);
2086 q_vector->rx.total_packets += total_rx_packets;
2087 q_vector->rx.total_bytes += total_rx_bytes;
2089 return total_rx_packets;
2092 #ifdef CONFIG_NET_RX_BUSY_POLL
2093 /* must be called with local_bh_disable()d */
2094 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2096 struct ixgbe_q_vector *q_vector =
2097 container_of(napi, struct ixgbe_q_vector, napi);
2098 struct ixgbe_adapter *adapter = q_vector->adapter;
2099 struct ixgbe_ring *ring;
2102 if (test_bit(__IXGBE_DOWN, &adapter->state))
2103 return LL_FLUSH_FAILED;
2105 if (!ixgbe_qv_lock_poll(q_vector))
2106 return LL_FLUSH_BUSY;
2108 ixgbe_for_each_ring(ring, q_vector->rx) {
2109 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2110 #ifdef BP_EXTENDED_STATS
2112 ring->stats.cleaned += found;
2114 ring->stats.misses++;
2120 ixgbe_qv_unlock_poll(q_vector);
2124 #endif /* CONFIG_NET_RX_BUSY_POLL */
2127 * ixgbe_configure_msix - Configure MSI-X hardware
2128 * @adapter: board private structure
2130 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2133 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2135 struct ixgbe_q_vector *q_vector;
2139 /* Populate MSIX to EITR Select */
2140 if (adapter->num_vfs > 32) {
2141 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
2142 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2146 * Populate the IVAR table and set the ITR values to the
2147 * corresponding register.
2149 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2150 struct ixgbe_ring *ring;
2151 q_vector = adapter->q_vector[v_idx];
2153 ixgbe_for_each_ring(ring, q_vector->rx)
2154 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2156 ixgbe_for_each_ring(ring, q_vector->tx)
2157 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2159 ixgbe_write_eitr(q_vector);
2162 switch (adapter->hw.mac.type) {
2163 case ixgbe_mac_82598EB:
2164 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2167 case ixgbe_mac_82599EB:
2168 case ixgbe_mac_X540:
2169 case ixgbe_mac_X550:
2170 case ixgbe_mac_X550EM_x:
2171 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2176 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2178 /* set up to autoclear timer, and the vectors */
2179 mask = IXGBE_EIMS_ENABLE_MASK;
2180 mask &= ~(IXGBE_EIMS_OTHER |
2181 IXGBE_EIMS_MAILBOX |
2184 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2187 enum latency_range {
2191 latency_invalid = 255
2195 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2196 * @q_vector: structure containing interrupt and ring information
2197 * @ring_container: structure containing ring performance data
2199 * Stores a new ITR value based on packets and byte
2200 * counts during the last interrupt. The advantage of per interrupt
2201 * computation is faster updates and more accurate ITR for the current
2202 * traffic pattern. Constants in this function were computed
2203 * based on theoretical maximum wire speed and thresholds were set based
2204 * on testing data as well as attempting to minimize response time
2205 * while increasing bulk throughput.
2206 * this functionality is controlled by the InterruptThrottleRate module
2207 * parameter (see ixgbe_param.c)
2209 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2210 struct ixgbe_ring_container *ring_container)
2212 int bytes = ring_container->total_bytes;
2213 int packets = ring_container->total_packets;
2216 u8 itr_setting = ring_container->itr;
2221 /* simple throttlerate management
2222 * 0-10MB/s lowest (100000 ints/s)
2223 * 10-20MB/s low (20000 ints/s)
2224 * 20-1249MB/s bulk (8000 ints/s)
2226 /* what was last interrupt timeslice? */
2227 timepassed_us = q_vector->itr >> 2;
2228 if (timepassed_us == 0)
2231 bytes_perint = bytes / timepassed_us; /* bytes/usec */
2233 switch (itr_setting) {
2234 case lowest_latency:
2235 if (bytes_perint > 10)
2236 itr_setting = low_latency;
2239 if (bytes_perint > 20)
2240 itr_setting = bulk_latency;
2241 else if (bytes_perint <= 10)
2242 itr_setting = lowest_latency;
2245 if (bytes_perint <= 20)
2246 itr_setting = low_latency;
2250 /* clear work counters since we have the values we need */
2251 ring_container->total_bytes = 0;
2252 ring_container->total_packets = 0;
2254 /* write updated itr to ring container */
2255 ring_container->itr = itr_setting;
2259 * ixgbe_write_eitr - write EITR register in hardware specific way
2260 * @q_vector: structure containing interrupt and ring information
2262 * This function is made to be called by ethtool and by the driver
2263 * when it needs to update EITR registers at runtime. Hardware
2264 * specific quirks/differences are taken care of here.
2266 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2268 struct ixgbe_adapter *adapter = q_vector->adapter;
2269 struct ixgbe_hw *hw = &adapter->hw;
2270 int v_idx = q_vector->v_idx;
2271 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2273 switch (adapter->hw.mac.type) {
2274 case ixgbe_mac_82598EB:
2275 /* must write high and low 16 bits to reset counter */
2276 itr_reg |= (itr_reg << 16);
2278 case ixgbe_mac_82599EB:
2279 case ixgbe_mac_X540:
2280 case ixgbe_mac_X550:
2281 case ixgbe_mac_X550EM_x:
2283 * set the WDIS bit to not clear the timer bits and cause an
2284 * immediate assertion of the interrupt
2286 itr_reg |= IXGBE_EITR_CNT_WDIS;
2291 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2294 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2296 u32 new_itr = q_vector->itr;
2299 ixgbe_update_itr(q_vector, &q_vector->tx);
2300 ixgbe_update_itr(q_vector, &q_vector->rx);
2302 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2304 switch (current_itr) {
2305 /* counts and packets in update_itr are dependent on these numbers */
2306 case lowest_latency:
2307 new_itr = IXGBE_100K_ITR;
2310 new_itr = IXGBE_20K_ITR;
2313 new_itr = IXGBE_8K_ITR;
2319 if (new_itr != q_vector->itr) {
2320 /* do an exponential smoothing */
2321 new_itr = (10 * new_itr * q_vector->itr) /
2322 ((9 * new_itr) + q_vector->itr);
2324 /* save the algorithm value here */
2325 q_vector->itr = new_itr;
2327 ixgbe_write_eitr(q_vector);
2332 * ixgbe_check_overtemp_subtask - check for over temperature
2333 * @adapter: pointer to adapter
2335 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2337 struct ixgbe_hw *hw = &adapter->hw;
2338 u32 eicr = adapter->interrupt_event;
2340 if (test_bit(__IXGBE_DOWN, &adapter->state))
2343 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2344 !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2347 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2349 switch (hw->device_id) {
2350 case IXGBE_DEV_ID_82599_T3_LOM:
2352 * Since the warning interrupt is for both ports
2353 * we don't have to check if:
2354 * - This interrupt wasn't for our port.
2355 * - We may have missed the interrupt so always have to
2356 * check if we got a LSC
2358 if (!(eicr & IXGBE_EICR_GPI_SDP0) &&
2359 !(eicr & IXGBE_EICR_LSC))
2362 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2364 bool link_up = false;
2366 hw->mac.ops.check_link(hw, &speed, &link_up, false);
2372 /* Check if this is not due to overtemp */
2373 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2378 if (!(eicr & IXGBE_EICR_GPI_SDP0))
2383 "Network adapter has been stopped because it has over heated. "
2384 "Restart the computer. If the problem persists, "
2385 "power off the system and replace the adapter\n");
2387 adapter->interrupt_event = 0;
2390 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2392 struct ixgbe_hw *hw = &adapter->hw;
2394 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2395 (eicr & IXGBE_EICR_GPI_SDP1)) {
2396 e_crit(probe, "Fan has stopped, replace the adapter\n");
2397 /* write to clear the interrupt */
2398 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2402 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2404 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2407 switch (adapter->hw.mac.type) {
2408 case ixgbe_mac_82599EB:
2410 * Need to check link state so complete overtemp check
2413 if (((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC)) &&
2414 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2415 adapter->interrupt_event = eicr;
2416 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2417 ixgbe_service_event_schedule(adapter);
2421 case ixgbe_mac_X540:
2422 if (!(eicr & IXGBE_EICR_TS))
2430 "Network adapter has been stopped because it has over heated. "
2431 "Restart the computer. If the problem persists, "
2432 "power off the system and replace the adapter\n");
2435 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2437 struct ixgbe_hw *hw = &adapter->hw;
2439 if (eicr & IXGBE_EICR_GPI_SDP2) {
2440 /* Clear the interrupt */
2441 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
2442 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2443 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2444 ixgbe_service_event_schedule(adapter);
2448 if (eicr & IXGBE_EICR_GPI_SDP1) {
2449 /* Clear the interrupt */
2450 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2451 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2452 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2453 ixgbe_service_event_schedule(adapter);
2458 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2460 struct ixgbe_hw *hw = &adapter->hw;
2463 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2464 adapter->link_check_timeout = jiffies;
2465 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2466 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2467 IXGBE_WRITE_FLUSH(hw);
2468 ixgbe_service_event_schedule(adapter);
2472 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2476 struct ixgbe_hw *hw = &adapter->hw;
2478 switch (hw->mac.type) {
2479 case ixgbe_mac_82598EB:
2480 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2481 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2483 case ixgbe_mac_82599EB:
2484 case ixgbe_mac_X540:
2485 case ixgbe_mac_X550:
2486 case ixgbe_mac_X550EM_x:
2487 mask = (qmask & 0xFFFFFFFF);
2489 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2490 mask = (qmask >> 32);
2492 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2497 /* skip the flush */
2500 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2504 struct ixgbe_hw *hw = &adapter->hw;
2506 switch (hw->mac.type) {
2507 case ixgbe_mac_82598EB:
2508 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2509 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2511 case ixgbe_mac_82599EB:
2512 case ixgbe_mac_X540:
2513 case ixgbe_mac_X550:
2514 case ixgbe_mac_X550EM_x:
2515 mask = (qmask & 0xFFFFFFFF);
2517 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2518 mask = (qmask >> 32);
2520 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2525 /* skip the flush */
2529 * ixgbe_irq_enable - Enable default interrupt generation settings
2530 * @adapter: board private structure
2532 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2535 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2537 /* don't reenable LSC while waiting for link */
2538 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2539 mask &= ~IXGBE_EIMS_LSC;
2541 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2542 switch (adapter->hw.mac.type) {
2543 case ixgbe_mac_82599EB:
2544 mask |= IXGBE_EIMS_GPI_SDP0;
2546 case ixgbe_mac_X540:
2547 case ixgbe_mac_X550:
2548 case ixgbe_mac_X550EM_x:
2549 mask |= IXGBE_EIMS_TS;
2554 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2555 mask |= IXGBE_EIMS_GPI_SDP1;
2556 switch (adapter->hw.mac.type) {
2557 case ixgbe_mac_82599EB:
2558 mask |= IXGBE_EIMS_GPI_SDP1;
2559 mask |= IXGBE_EIMS_GPI_SDP2;
2561 case ixgbe_mac_X540:
2562 case ixgbe_mac_X550:
2563 case ixgbe_mac_X550EM_x:
2564 mask |= IXGBE_EIMS_ECC;
2565 mask |= IXGBE_EIMS_MAILBOX;
2571 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2572 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2573 mask |= IXGBE_EIMS_FLOW_DIR;
2575 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2577 ixgbe_irq_enable_queues(adapter, ~0);
2579 IXGBE_WRITE_FLUSH(&adapter->hw);
2582 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2584 struct ixgbe_adapter *adapter = data;
2585 struct ixgbe_hw *hw = &adapter->hw;
2589 * Workaround for Silicon errata. Use clear-by-write instead
2590 * of clear-by-read. Reading with EICS will return the
2591 * interrupt causes without clearing, which later be done
2592 * with the write to EICR.
2594 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2596 /* The lower 16bits of the EICR register are for the queue interrupts
2597 * which should be masked here in order to not accidently clear them if
2598 * the bits are high when ixgbe_msix_other is called. There is a race
2599 * condition otherwise which results in possible performance loss
2600 * especially if the ixgbe_msix_other interrupt is triggering
2601 * consistently (as it would when PPS is turned on for the X540 device)
2605 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2607 if (eicr & IXGBE_EICR_LSC)
2608 ixgbe_check_lsc(adapter);
2610 if (eicr & IXGBE_EICR_MAILBOX)
2611 ixgbe_msg_task(adapter);
2613 switch (hw->mac.type) {
2614 case ixgbe_mac_82599EB:
2615 case ixgbe_mac_X540:
2616 case ixgbe_mac_X550:
2617 case ixgbe_mac_X550EM_x:
2618 if (eicr & IXGBE_EICR_ECC) {
2619 e_info(link, "Received ECC Err, initiating reset\n");
2620 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2621 ixgbe_service_event_schedule(adapter);
2622 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2624 /* Handle Flow Director Full threshold interrupt */
2625 if (eicr & IXGBE_EICR_FLOW_DIR) {
2626 int reinit_count = 0;
2628 for (i = 0; i < adapter->num_tx_queues; i++) {
2629 struct ixgbe_ring *ring = adapter->tx_ring[i];
2630 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2635 /* no more flow director interrupts until after init */
2636 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2637 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2638 ixgbe_service_event_schedule(adapter);
2641 ixgbe_check_sfp_event(adapter, eicr);
2642 ixgbe_check_overtemp_event(adapter, eicr);
2648 ixgbe_check_fan_failure(adapter, eicr);
2650 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2651 ixgbe_ptp_check_pps_event(adapter, eicr);
2653 /* re-enable the original interrupt state, no lsc, no queues */
2654 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2655 ixgbe_irq_enable(adapter, false, false);
2660 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2662 struct ixgbe_q_vector *q_vector = data;
2664 /* EIAM disabled interrupts (on this vector) for us */
2666 if (q_vector->rx.ring || q_vector->tx.ring)
2667 napi_schedule(&q_vector->napi);
2673 * ixgbe_poll - NAPI Rx polling callback
2674 * @napi: structure for representing this polling device
2675 * @budget: how many packets driver is allowed to clean
2677 * This function is used for legacy and MSI, NAPI mode
2679 int ixgbe_poll(struct napi_struct *napi, int budget)
2681 struct ixgbe_q_vector *q_vector =
2682 container_of(napi, struct ixgbe_q_vector, napi);
2683 struct ixgbe_adapter *adapter = q_vector->adapter;
2684 struct ixgbe_ring *ring;
2685 int per_ring_budget;
2686 bool clean_complete = true;
2688 #ifdef CONFIG_IXGBE_DCA
2689 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2690 ixgbe_update_dca(q_vector);
2693 ixgbe_for_each_ring(ring, q_vector->tx)
2694 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2696 if (!ixgbe_qv_lock_napi(q_vector))
2699 /* attempt to distribute budget to each queue fairly, but don't allow
2700 * the budget to go below 1 because we'll exit polling */
2701 if (q_vector->rx.count > 1)
2702 per_ring_budget = max(budget/q_vector->rx.count, 1);
2704 per_ring_budget = budget;
2706 ixgbe_for_each_ring(ring, q_vector->rx)
2707 clean_complete &= (ixgbe_clean_rx_irq(q_vector, ring,
2708 per_ring_budget) < per_ring_budget);
2710 ixgbe_qv_unlock_napi(q_vector);
2711 /* If all work not completed, return budget and keep polling */
2712 if (!clean_complete)
2715 /* all work done, exit the polling mode */
2716 napi_complete(napi);
2717 if (adapter->rx_itr_setting & 1)
2718 ixgbe_set_itr(q_vector);
2719 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2720 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2726 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2727 * @adapter: board private structure
2729 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2730 * interrupts from the kernel.
2732 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2734 struct net_device *netdev = adapter->netdev;
2738 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2739 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2740 struct msix_entry *entry = &adapter->msix_entries[vector];
2742 if (q_vector->tx.ring && q_vector->rx.ring) {
2743 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2744 "%s-%s-%d", netdev->name, "TxRx", ri++);
2746 } else if (q_vector->rx.ring) {
2747 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2748 "%s-%s-%d", netdev->name, "rx", ri++);
2749 } else if (q_vector->tx.ring) {
2750 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2751 "%s-%s-%d", netdev->name, "tx", ti++);
2753 /* skip this unused q_vector */
2756 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2757 q_vector->name, q_vector);
2759 e_err(probe, "request_irq failed for MSIX interrupt "
2760 "Error: %d\n", err);
2761 goto free_queue_irqs;
2763 /* If Flow Director is enabled, set interrupt affinity */
2764 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2765 /* assign the mask for this irq */
2766 irq_set_affinity_hint(entry->vector,
2767 &q_vector->affinity_mask);
2771 err = request_irq(adapter->msix_entries[vector].vector,
2772 ixgbe_msix_other, 0, netdev->name, adapter);
2774 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2775 goto free_queue_irqs;
2783 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2785 free_irq(adapter->msix_entries[vector].vector,
2786 adapter->q_vector[vector]);
2788 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2789 pci_disable_msix(adapter->pdev);
2790 kfree(adapter->msix_entries);
2791 adapter->msix_entries = NULL;
2796 * ixgbe_intr - legacy mode Interrupt Handler
2797 * @irq: interrupt number
2798 * @data: pointer to a network interface device structure
2800 static irqreturn_t ixgbe_intr(int irq, void *data)
2802 struct ixgbe_adapter *adapter = data;
2803 struct ixgbe_hw *hw = &adapter->hw;
2804 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2808 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2809 * before the read of EICR.
2811 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2813 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2814 * therefore no explicit interrupt disable is necessary */
2815 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2818 * shared interrupt alert!
2819 * make sure interrupts are enabled because the read will
2820 * have disabled interrupts due to EIAM
2821 * finish the workaround of silicon errata on 82598. Unmask
2822 * the interrupt that we masked before the EICR read.
2824 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2825 ixgbe_irq_enable(adapter, true, true);
2826 return IRQ_NONE; /* Not our interrupt */
2829 if (eicr & IXGBE_EICR_LSC)
2830 ixgbe_check_lsc(adapter);
2832 switch (hw->mac.type) {
2833 case ixgbe_mac_82599EB:
2834 ixgbe_check_sfp_event(adapter, eicr);
2836 case ixgbe_mac_X540:
2837 case ixgbe_mac_X550:
2838 case ixgbe_mac_X550EM_x:
2839 if (eicr & IXGBE_EICR_ECC) {
2840 e_info(link, "Received ECC Err, initiating reset\n");
2841 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2842 ixgbe_service_event_schedule(adapter);
2843 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2845 ixgbe_check_overtemp_event(adapter, eicr);
2851 ixgbe_check_fan_failure(adapter, eicr);
2852 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2853 ixgbe_ptp_check_pps_event(adapter, eicr);
2855 /* would disable interrupts here but EIAM disabled it */
2856 napi_schedule(&q_vector->napi);
2859 * re-enable link(maybe) and non-queue interrupts, no flush.
2860 * ixgbe_poll will re-enable the queue interrupts
2862 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2863 ixgbe_irq_enable(adapter, false, false);
2869 * ixgbe_request_irq - initialize interrupts
2870 * @adapter: board private structure
2872 * Attempts to configure interrupts using the best available
2873 * capabilities of the hardware and kernel.
2875 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2877 struct net_device *netdev = adapter->netdev;
2880 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2881 err = ixgbe_request_msix_irqs(adapter);
2882 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2883 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2884 netdev->name, adapter);
2886 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2887 netdev->name, adapter);
2890 e_err(probe, "request_irq failed, Error %d\n", err);
2895 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2899 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2900 free_irq(adapter->pdev->irq, adapter);
2904 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2905 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2906 struct msix_entry *entry = &adapter->msix_entries[vector];
2908 /* free only the irqs that were actually requested */
2909 if (!q_vector->rx.ring && !q_vector->tx.ring)
2912 /* clear the affinity_mask in the IRQ descriptor */
2913 irq_set_affinity_hint(entry->vector, NULL);
2915 free_irq(entry->vector, q_vector);
2918 free_irq(adapter->msix_entries[vector++].vector, adapter);
2922 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2923 * @adapter: board private structure
2925 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
2927 switch (adapter->hw.mac.type) {
2928 case ixgbe_mac_82598EB:
2929 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
2931 case ixgbe_mac_82599EB:
2932 case ixgbe_mac_X540:
2933 case ixgbe_mac_X550:
2934 case ixgbe_mac_X550EM_x:
2935 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
2936 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
2937 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
2942 IXGBE_WRITE_FLUSH(&adapter->hw);
2943 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2946 for (vector = 0; vector < adapter->num_q_vectors; vector++)
2947 synchronize_irq(adapter->msix_entries[vector].vector);
2949 synchronize_irq(adapter->msix_entries[vector++].vector);
2951 synchronize_irq(adapter->pdev->irq);
2956 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2959 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
2961 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2963 ixgbe_write_eitr(q_vector);
2965 ixgbe_set_ivar(adapter, 0, 0, 0);
2966 ixgbe_set_ivar(adapter, 1, 0, 0);
2968 e_info(hw, "Legacy interrupt IVAR setup done\n");
2972 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
2973 * @adapter: board private structure
2974 * @ring: structure containing ring specific data
2976 * Configure the Tx descriptor ring after a reset.
2978 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
2979 struct ixgbe_ring *ring)
2981 struct ixgbe_hw *hw = &adapter->hw;
2982 u64 tdba = ring->dma;
2984 u32 txdctl = IXGBE_TXDCTL_ENABLE;
2985 u8 reg_idx = ring->reg_idx;
2987 /* disable queue to avoid issues while updating state */
2988 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
2989 IXGBE_WRITE_FLUSH(hw);
2991 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
2992 (tdba & DMA_BIT_MASK(32)));
2993 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
2994 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
2995 ring->count * sizeof(union ixgbe_adv_tx_desc));
2996 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
2997 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
2998 ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3001 * set WTHRESH to encourage burst writeback, it should not be set
3002 * higher than 1 when:
3003 * - ITR is 0 as it could cause false TX hangs
3004 * - ITR is set to > 100k int/sec and BQL is enabled
3006 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3007 * to or less than the number of on chip descriptors, which is
3010 if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3011 txdctl |= (1 << 16); /* WTHRESH = 1 */
3013 txdctl |= (8 << 16); /* WTHRESH = 8 */
3016 * Setting PTHRESH to 32 both improves performance
3017 * and avoids a TX hang with DFP enabled
3019 txdctl |= (1 << 8) | /* HTHRESH = 1 */
3020 32; /* PTHRESH = 32 */
3022 /* reinitialize flowdirector state */
3023 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3024 ring->atr_sample_rate = adapter->atr_sample_rate;
3025 ring->atr_count = 0;
3026 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3028 ring->atr_sample_rate = 0;
3031 /* initialize XPS */
3032 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3033 struct ixgbe_q_vector *q_vector = ring->q_vector;
3036 netif_set_xps_queue(ring->netdev,
3037 &q_vector->affinity_mask,
3041 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3044 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3046 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3047 if (hw->mac.type == ixgbe_mac_82598EB &&
3048 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3051 /* poll to verify queue is enabled */
3053 usleep_range(1000, 2000);
3054 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3055 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3057 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
3060 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3062 struct ixgbe_hw *hw = &adapter->hw;
3064 u8 tcs = netdev_get_num_tc(adapter->netdev);
3066 if (hw->mac.type == ixgbe_mac_82598EB)
3069 /* disable the arbiter while setting MTQC */
3070 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3071 rttdcs |= IXGBE_RTTDCS_ARBDIS;
3072 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3074 /* set transmit pool layout */
3075 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3076 mtqc = IXGBE_MTQC_VT_ENA;
3078 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3080 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3081 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3082 mtqc |= IXGBE_MTQC_32VF;
3084 mtqc |= IXGBE_MTQC_64VF;
3087 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3089 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3091 mtqc = IXGBE_MTQC_64Q_1PB;
3094 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3096 /* Enable Security TX Buffer IFG for multiple pb */
3098 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3099 sectx |= IXGBE_SECTX_DCB;
3100 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3103 /* re-enable the arbiter */
3104 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3105 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3109 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3110 * @adapter: board private structure
3112 * Configure the Tx unit of the MAC after a reset.
3114 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3116 struct ixgbe_hw *hw = &adapter->hw;
3120 ixgbe_setup_mtqc(adapter);
3122 if (hw->mac.type != ixgbe_mac_82598EB) {
3123 /* DMATXCTL.EN must be before Tx queues are enabled */
3124 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3125 dmatxctl |= IXGBE_DMATXCTL_TE;
3126 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3129 /* Setup the HW Tx Head and Tail descriptor pointers */
3130 for (i = 0; i < adapter->num_tx_queues; i++)
3131 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3134 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3135 struct ixgbe_ring *ring)
3137 struct ixgbe_hw *hw = &adapter->hw;
3138 u8 reg_idx = ring->reg_idx;
3139 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3141 srrctl |= IXGBE_SRRCTL_DROP_EN;
3143 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3146 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3147 struct ixgbe_ring *ring)
3149 struct ixgbe_hw *hw = &adapter->hw;
3150 u8 reg_idx = ring->reg_idx;
3151 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3153 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3155 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3158 #ifdef CONFIG_IXGBE_DCB
3159 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3161 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3165 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3167 if (adapter->ixgbe_ieee_pfc)
3168 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3171 * We should set the drop enable bit if:
3174 * Number of Rx queues > 1 and flow control is disabled
3176 * This allows us to avoid head of line blocking for security
3177 * and performance reasons.
3179 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3180 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3181 for (i = 0; i < adapter->num_rx_queues; i++)
3182 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3184 for (i = 0; i < adapter->num_rx_queues; i++)
3185 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3189 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3191 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3192 struct ixgbe_ring *rx_ring)
3194 struct ixgbe_hw *hw = &adapter->hw;
3196 u8 reg_idx = rx_ring->reg_idx;
3198 if (hw->mac.type == ixgbe_mac_82598EB) {
3199 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3202 * if VMDq is not active we must program one srrctl register
3203 * per RSS queue since we have enabled RDRXCTL.MVMEN
3208 /* configure header buffer length, needed for RSC */
3209 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3211 /* configure the packet buffer length */
3212 srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3214 /* configure descriptor type */
3215 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3217 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3220 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter, const u32 *seed)
3222 struct ixgbe_hw *hw = &adapter->hw;
3225 int reta_entries = 128;
3226 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3230 * Program table for at least 2 queues w/ SR-IOV so that VFs can
3231 * make full use of any rings they may have. We will use the
3232 * PSRTYPE register to control how many rings we use within the PF.
3234 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
3237 /* Fill out hash function seeds */
3238 for (i = 0; i < 10; i++)
3239 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
3241 /* Fill out the redirection table as follows:
3242 * 82598: 128 (8 bit wide) entries containing pair of 4 bit RSS indices
3243 * 82599/X540: 128 (8 bit wide) entries containing 4 bit RSS index
3244 * X550: 512 (8 bit wide) entries containing 6 bit RSS index
3246 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3247 indices_multi = 0x11;
3249 indices_multi = 0x1;
3251 switch (adapter->hw.mac.type) {
3252 case ixgbe_mac_X550:
3253 case ixgbe_mac_X550EM_x:
3254 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3260 /* Fill out redirection table */
3261 for (i = 0, j = 0; i < reta_entries; i++, j++) {
3264 reta = (reta << 8) | (j * indices_multi);
3267 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3269 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3275 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter, const u32 *seed)
3277 struct ixgbe_hw *hw = &adapter->hw;
3279 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3280 unsigned int pf_pool = adapter->num_vfs;
3283 /* Fill out hash function seeds */
3284 for (i = 0; i < 10; i++)
3285 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool), seed[i]);
3287 /* Fill out the redirection table */
3288 for (i = 0, j = 0; i < 64; i++, j++) {
3291 vfreta = (vfreta << 8) | j;
3293 IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3298 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3300 struct ixgbe_hw *hw = &adapter->hw;
3301 u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3305 /* Disable indicating checksum in descriptor, enables RSS hash */
3306 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3307 rxcsum |= IXGBE_RXCSUM_PCSD;
3308 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3310 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3311 if (adapter->ring_feature[RING_F_RSS].mask)
3312 mrqc = IXGBE_MRQC_RSSEN;
3314 u8 tcs = netdev_get_num_tc(adapter->netdev);
3316 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3318 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
3320 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
3321 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3322 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3324 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3327 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3329 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3331 mrqc = IXGBE_MRQC_RSSEN;
3335 /* Perform hash on these packet types */
3336 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3337 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3338 IXGBE_MRQC_RSS_FIELD_IPV6 |
3339 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3341 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3342 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3343 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3344 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3346 netdev_rss_key_fill(rss_key, sizeof(rss_key));
3347 if ((hw->mac.type >= ixgbe_mac_X550) &&
3348 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3349 unsigned int pf_pool = adapter->num_vfs;
3351 /* Enable VF RSS mode */
3352 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3353 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3355 /* Setup RSS through the VF registers */
3356 ixgbe_setup_vfreta(adapter, rss_key);
3357 vfmrqc = IXGBE_MRQC_RSSEN;
3358 vfmrqc |= rss_field;
3359 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3361 ixgbe_setup_reta(adapter, rss_key);
3363 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3368 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3369 * @adapter: address of board private structure
3370 * @index: index of ring to set
3372 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3373 struct ixgbe_ring *ring)
3375 struct ixgbe_hw *hw = &adapter->hw;
3377 u8 reg_idx = ring->reg_idx;
3379 if (!ring_is_rsc_enabled(ring))
3382 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3383 rscctrl |= IXGBE_RSCCTL_RSCEN;
3385 * we must limit the number of descriptors so that the
3386 * total size of max desc * buf_len is not greater
3389 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3390 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3393 #define IXGBE_MAX_RX_DESC_POLL 10
3394 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3395 struct ixgbe_ring *ring)
3397 struct ixgbe_hw *hw = &adapter->hw;
3398 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3400 u8 reg_idx = ring->reg_idx;
3402 if (ixgbe_removed(hw->hw_addr))
3404 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3405 if (hw->mac.type == ixgbe_mac_82598EB &&
3406 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3410 usleep_range(1000, 2000);
3411 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3412 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3415 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3416 "the polling period\n", reg_idx);
3420 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3421 struct ixgbe_ring *ring)
3423 struct ixgbe_hw *hw = &adapter->hw;
3424 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3426 u8 reg_idx = ring->reg_idx;
3428 if (ixgbe_removed(hw->hw_addr))
3430 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3431 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3433 /* write value back with RXDCTL.ENABLE bit cleared */
3434 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3436 if (hw->mac.type == ixgbe_mac_82598EB &&
3437 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3440 /* the hardware may take up to 100us to really disable the rx queue */
3443 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3444 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3447 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3448 "the polling period\n", reg_idx);
3452 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3453 struct ixgbe_ring *ring)
3455 struct ixgbe_hw *hw = &adapter->hw;
3456 u64 rdba = ring->dma;
3458 u8 reg_idx = ring->reg_idx;
3460 /* disable queue to avoid issues while updating state */
3461 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3462 ixgbe_disable_rx_queue(adapter, ring);
3464 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3465 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3466 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3467 ring->count * sizeof(union ixgbe_adv_rx_desc));
3468 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3469 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3470 ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3472 ixgbe_configure_srrctl(adapter, ring);
3473 ixgbe_configure_rscctl(adapter, ring);
3475 if (hw->mac.type == ixgbe_mac_82598EB) {
3477 * enable cache line friendly hardware writes:
3478 * PTHRESH=32 descriptors (half the internal cache),
3479 * this also removes ugly rx_no_buffer_count increment
3480 * HTHRESH=4 descriptors (to minimize latency on fetch)
3481 * WTHRESH=8 burst writeback up to two cache lines
3483 rxdctl &= ~0x3FFFFF;
3487 /* enable receive descriptor ring */
3488 rxdctl |= IXGBE_RXDCTL_ENABLE;
3489 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3491 ixgbe_rx_desc_queue_enable(adapter, ring);
3492 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3495 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3497 struct ixgbe_hw *hw = &adapter->hw;
3498 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3501 /* PSRTYPE must be initialized in non 82598 adapters */
3502 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3503 IXGBE_PSRTYPE_UDPHDR |
3504 IXGBE_PSRTYPE_IPV4HDR |
3505 IXGBE_PSRTYPE_L2HDR |
3506 IXGBE_PSRTYPE_IPV6HDR;
3508 if (hw->mac.type == ixgbe_mac_82598EB)
3516 for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3517 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3520 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3522 struct ixgbe_hw *hw = &adapter->hw;
3523 u32 reg_offset, vf_shift;
3524 u32 gcr_ext, vmdctl;
3527 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3530 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3531 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3532 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3533 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3534 vmdctl |= IXGBE_VT_CTL_REPLEN;
3535 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3537 vf_shift = VMDQ_P(0) % 32;
3538 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3540 /* Enable only the PF's pool for Tx/Rx */
3541 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift);
3542 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3543 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
3544 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3545 if (adapter->flags2 & IXGBE_FLAG2_BRIDGE_MODE_VEB)
3546 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3548 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3549 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3552 * Set up VF register offsets for selected VT Mode,
3553 * i.e. 32 or 64 VFs for SR-IOV
3555 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3556 case IXGBE_82599_VMDQ_8Q_MASK:
3557 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3559 case IXGBE_82599_VMDQ_4Q_MASK:
3560 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3563 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3567 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3570 /* Enable MAC Anti-Spoofing */
3571 hw->mac.ops.set_mac_anti_spoofing(hw, (adapter->num_vfs != 0),
3573 /* For VFs that have spoof checking turned off */
3574 for (i = 0; i < adapter->num_vfs; i++) {
3575 if (!adapter->vfinfo[i].spoofchk_enabled)
3576 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3580 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3582 struct ixgbe_hw *hw = &adapter->hw;
3583 struct net_device *netdev = adapter->netdev;
3584 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3585 struct ixgbe_ring *rx_ring;
3590 /* adjust max frame to be able to do baby jumbo for FCoE */
3591 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3592 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3593 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3595 #endif /* IXGBE_FCOE */
3597 /* adjust max frame to be at least the size of a standard frame */
3598 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3599 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3601 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3602 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3603 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3604 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3606 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3609 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3610 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3611 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3612 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3615 * Setup the HW Rx Head and Tail Descriptor Pointers and
3616 * the Base and Length of the Rx Descriptor Ring
3618 for (i = 0; i < adapter->num_rx_queues; i++) {
3619 rx_ring = adapter->rx_ring[i];
3620 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3621 set_ring_rsc_enabled(rx_ring);
3623 clear_ring_rsc_enabled(rx_ring);
3627 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3629 struct ixgbe_hw *hw = &adapter->hw;
3630 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3632 switch (hw->mac.type) {
3633 case ixgbe_mac_X550:
3634 case ixgbe_mac_X550EM_x:
3635 case ixgbe_mac_82598EB:
3637 * For VMDq support of different descriptor types or
3638 * buffer sizes through the use of multiple SRRCTL
3639 * registers, RDRXCTL.MVMEN must be set to 1
3641 * also, the manual doesn't mention it clearly but DCA hints
3642 * will only use queue 0's tags unless this bit is set. Side
3643 * effects of setting this bit are only that SRRCTL must be
3644 * fully programmed [0..15]
3646 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3648 case ixgbe_mac_82599EB:
3649 case ixgbe_mac_X540:
3650 /* Disable RSC for ACK packets */
3651 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3652 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3653 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3654 /* hardware requires some bits to be set by default */
3655 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3656 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3659 /* We should do nothing since we don't know this hardware */
3663 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3667 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3668 * @adapter: board private structure
3670 * Configure the Rx unit of the MAC after a reset.
3672 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3674 struct ixgbe_hw *hw = &adapter->hw;
3678 /* disable receives while setting up the descriptors */
3679 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3680 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
3682 ixgbe_setup_psrtype(adapter);
3683 ixgbe_setup_rdrxctl(adapter);
3686 rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3687 rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3688 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3689 rfctl |= IXGBE_RFCTL_RSC_DIS;
3690 IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3692 /* Program registers for the distribution of queues */
3693 ixgbe_setup_mrqc(adapter);
3695 /* set_rx_buffer_len must be called before ring initialization */
3696 ixgbe_set_rx_buffer_len(adapter);
3699 * Setup the HW Rx Head and Tail Descriptor Pointers and
3700 * the Base and Length of the Rx Descriptor Ring
3702 for (i = 0; i < adapter->num_rx_queues; i++)
3703 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3705 /* disable drop enable for 82598 parts */
3706 if (hw->mac.type == ixgbe_mac_82598EB)
3707 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3709 /* enable all receives */
3710 rxctrl |= IXGBE_RXCTRL_RXEN;
3711 hw->mac.ops.enable_rx_dma(hw, rxctrl);
3714 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3715 __be16 proto, u16 vid)
3717 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3718 struct ixgbe_hw *hw = &adapter->hw;
3720 /* add VID to filter table */
3721 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true);
3722 set_bit(vid, adapter->active_vlans);
3727 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
3728 __be16 proto, u16 vid)
3730 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3731 struct ixgbe_hw *hw = &adapter->hw;
3733 /* remove VID from filter table */
3734 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), false);
3735 clear_bit(vid, adapter->active_vlans);
3741 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3742 * @adapter: driver data
3744 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3746 struct ixgbe_hw *hw = &adapter->hw;
3750 switch (hw->mac.type) {
3751 case ixgbe_mac_82598EB:
3752 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3753 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3754 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3756 case ixgbe_mac_82599EB:
3757 case ixgbe_mac_X540:
3758 case ixgbe_mac_X550:
3759 case ixgbe_mac_X550EM_x:
3760 for (i = 0; i < adapter->num_rx_queues; i++) {
3761 struct ixgbe_ring *ring = adapter->rx_ring[i];
3763 if (ring->l2_accel_priv)
3766 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3767 vlnctrl &= ~IXGBE_RXDCTL_VME;
3768 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3777 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3778 * @adapter: driver data
3780 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3782 struct ixgbe_hw *hw = &adapter->hw;
3786 switch (hw->mac.type) {
3787 case ixgbe_mac_82598EB:
3788 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3789 vlnctrl |= IXGBE_VLNCTRL_VME;
3790 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3792 case ixgbe_mac_82599EB:
3793 case ixgbe_mac_X540:
3794 case ixgbe_mac_X550:
3795 case ixgbe_mac_X550EM_x:
3796 for (i = 0; i < adapter->num_rx_queues; i++) {
3797 struct ixgbe_ring *ring = adapter->rx_ring[i];
3799 if (ring->l2_accel_priv)
3802 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3803 vlnctrl |= IXGBE_RXDCTL_VME;
3804 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3812 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3816 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
3818 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
3819 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
3823 * ixgbe_write_mc_addr_list - write multicast addresses to MTA
3824 * @netdev: network interface device structure
3826 * Writes multicast address list to the MTA hash table.
3827 * Returns: -ENOMEM on failure
3828 * 0 on no addresses written
3829 * X on writing X addresses to MTA
3831 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
3833 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3834 struct ixgbe_hw *hw = &adapter->hw;
3836 if (!netif_running(netdev))
3839 if (hw->mac.ops.update_mc_addr_list)
3840 hw->mac.ops.update_mc_addr_list(hw, netdev);
3844 #ifdef CONFIG_PCI_IOV
3845 ixgbe_restore_vf_multicasts(adapter);
3848 return netdev_mc_count(netdev);
3851 #ifdef CONFIG_PCI_IOV
3852 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
3854 struct ixgbe_hw *hw = &adapter->hw;
3856 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3857 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
3858 hw->mac.ops.set_rar(hw, i, adapter->mac_table[i].addr,
3859 adapter->mac_table[i].queue,
3862 hw->mac.ops.clear_rar(hw, i);
3864 adapter->mac_table[i].state &= ~(IXGBE_MAC_STATE_MODIFIED);
3869 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
3871 struct ixgbe_hw *hw = &adapter->hw;
3873 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3874 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_MODIFIED) {
3875 if (adapter->mac_table[i].state &
3876 IXGBE_MAC_STATE_IN_USE)
3877 hw->mac.ops.set_rar(hw, i,
3878 adapter->mac_table[i].addr,
3879 adapter->mac_table[i].queue,
3882 hw->mac.ops.clear_rar(hw, i);
3884 adapter->mac_table[i].state &=
3885 ~(IXGBE_MAC_STATE_MODIFIED);
3890 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
3893 struct ixgbe_hw *hw = &adapter->hw;
3895 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3896 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
3897 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
3898 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
3899 adapter->mac_table[i].queue = 0;
3901 ixgbe_sync_mac_table(adapter);
3904 static int ixgbe_available_rars(struct ixgbe_adapter *adapter)
3906 struct ixgbe_hw *hw = &adapter->hw;
3909 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3910 if (adapter->mac_table[i].state == 0)
3916 /* this function destroys the first RAR entry */
3917 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter,
3920 struct ixgbe_hw *hw = &adapter->hw;
3922 memcpy(&adapter->mac_table[0].addr, addr, ETH_ALEN);
3923 adapter->mac_table[0].queue = VMDQ_P(0);
3924 adapter->mac_table[0].state = (IXGBE_MAC_STATE_DEFAULT |
3925 IXGBE_MAC_STATE_IN_USE);
3926 hw->mac.ops.set_rar(hw, 0, adapter->mac_table[0].addr,
3927 adapter->mac_table[0].queue,
3931 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
3933 struct ixgbe_hw *hw = &adapter->hw;
3936 if (is_zero_ether_addr(addr))
3939 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3940 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
3942 adapter->mac_table[i].state |= (IXGBE_MAC_STATE_MODIFIED |
3943 IXGBE_MAC_STATE_IN_USE);
3944 ether_addr_copy(adapter->mac_table[i].addr, addr);
3945 adapter->mac_table[i].queue = queue;
3946 ixgbe_sync_mac_table(adapter);
3952 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
3954 /* search table for addr, if found, set to 0 and sync */
3956 struct ixgbe_hw *hw = &adapter->hw;
3958 if (is_zero_ether_addr(addr))
3961 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3962 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
3963 adapter->mac_table[i].queue == queue) {
3964 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
3965 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
3966 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
3967 adapter->mac_table[i].queue = 0;
3968 ixgbe_sync_mac_table(adapter);
3975 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3976 * @netdev: network interface device structure
3978 * Writes unicast address list to the RAR table.
3979 * Returns: -ENOMEM on failure/insufficient address space
3980 * 0 on no addresses written
3981 * X on writing X addresses to the RAR table
3983 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
3985 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3988 /* return ENOMEM indicating insufficient memory for addresses */
3989 if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter))
3992 if (!netdev_uc_empty(netdev)) {
3993 struct netdev_hw_addr *ha;
3994 netdev_for_each_uc_addr(ha, netdev) {
3995 ixgbe_del_mac_filter(adapter, ha->addr, vfn);
3996 ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4004 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4005 * @netdev: network interface device structure
4007 * The set_rx_method entry point is called whenever the unicast/multicast
4008 * address list or the network interface flags are updated. This routine is
4009 * responsible for configuring the hardware for proper unicast, multicast and
4012 void ixgbe_set_rx_mode(struct net_device *netdev)
4014 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4015 struct ixgbe_hw *hw = &adapter->hw;
4016 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4020 /* Check for Promiscuous and All Multicast modes */
4021 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4022 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4024 /* set all bits that we expect to always be set */
4025 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4026 fctrl |= IXGBE_FCTRL_BAM;
4027 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4028 fctrl |= IXGBE_FCTRL_PMCF;
4030 /* clear the bits we are changing the status of */
4031 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4032 vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4033 if (netdev->flags & IFF_PROMISC) {
4034 hw->addr_ctrl.user_set_promisc = true;
4035 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4036 vmolr |= IXGBE_VMOLR_MPE;
4037 /* Only disable hardware filter vlans in promiscuous mode
4038 * if SR-IOV and VMDQ are disabled - otherwise ensure
4039 * that hardware VLAN filters remain enabled.
4041 if (adapter->flags & (IXGBE_FLAG_VMDQ_ENABLED |
4042 IXGBE_FLAG_SRIOV_ENABLED))
4043 vlnctrl |= (IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4045 if (netdev->flags & IFF_ALLMULTI) {
4046 fctrl |= IXGBE_FCTRL_MPE;
4047 vmolr |= IXGBE_VMOLR_MPE;
4049 vlnctrl |= IXGBE_VLNCTRL_VFE;
4050 hw->addr_ctrl.user_set_promisc = false;
4054 * Write addresses to available RAR registers, if there is not
4055 * sufficient space to store all the addresses then enable
4056 * unicast promiscuous mode
4058 count = ixgbe_write_uc_addr_list(netdev, VMDQ_P(0));
4060 fctrl |= IXGBE_FCTRL_UPE;
4061 vmolr |= IXGBE_VMOLR_ROPE;
4064 /* Write addresses to the MTA, if the attempt fails
4065 * then we should just turn on promiscuous mode so
4066 * that we can at least receive multicast traffic
4068 count = ixgbe_write_mc_addr_list(netdev);
4070 fctrl |= IXGBE_FCTRL_MPE;
4071 vmolr |= IXGBE_VMOLR_MPE;
4073 vmolr |= IXGBE_VMOLR_ROMPE;
4076 if (hw->mac.type != ixgbe_mac_82598EB) {
4077 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4078 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4080 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4083 /* This is useful for sniffing bad packets. */
4084 if (adapter->netdev->features & NETIF_F_RXALL) {
4085 /* UPE and MPE will be handled by normal PROMISC logic
4086 * in e1000e_set_rx_mode */
4087 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4088 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4089 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4091 fctrl &= ~(IXGBE_FCTRL_DPF);
4092 /* NOTE: VLAN filtering is disabled by setting PROMISC */
4095 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4096 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4098 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
4099 ixgbe_vlan_strip_enable(adapter);
4101 ixgbe_vlan_strip_disable(adapter);
4104 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4108 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4109 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
4110 napi_enable(&adapter->q_vector[q_idx]->napi);
4114 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4118 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4119 napi_disable(&adapter->q_vector[q_idx]->napi);
4120 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
4121 pr_info("QV %d locked\n", q_idx);
4122 usleep_range(1000, 20000);
4127 #ifdef CONFIG_IXGBE_DCB
4129 * ixgbe_configure_dcb - Configure DCB hardware
4130 * @adapter: ixgbe adapter struct
4132 * This is called by the driver on open to configure the DCB hardware.
4133 * This is also called by the gennetlink interface when reconfiguring
4136 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4138 struct ixgbe_hw *hw = &adapter->hw;
4139 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4141 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4142 if (hw->mac.type == ixgbe_mac_82598EB)
4143 netif_set_gso_max_size(adapter->netdev, 65536);
4147 if (hw->mac.type == ixgbe_mac_82598EB)
4148 netif_set_gso_max_size(adapter->netdev, 32768);
4151 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4152 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4155 /* reconfigure the hardware */
4156 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4157 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4159 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4161 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4162 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4163 ixgbe_dcb_hw_ets(&adapter->hw,
4164 adapter->ixgbe_ieee_ets,
4166 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4167 adapter->ixgbe_ieee_pfc->pfc_en,
4168 adapter->ixgbe_ieee_ets->prio_tc);
4171 /* Enable RSS Hash per TC */
4172 if (hw->mac.type != ixgbe_mac_82598EB) {
4174 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4181 /* write msb to all 8 TCs in one write */
4182 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4187 /* Additional bittime to account for IXGBE framing */
4188 #define IXGBE_ETH_FRAMING 20
4191 * ixgbe_hpbthresh - calculate high water mark for flow control
4193 * @adapter: board private structure to calculate for
4194 * @pb: packet buffer to calculate
4196 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4198 struct ixgbe_hw *hw = &adapter->hw;
4199 struct net_device *dev = adapter->netdev;
4200 int link, tc, kb, marker;
4203 /* Calculate max LAN frame size */
4204 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4207 /* FCoE traffic class uses FCOE jumbo frames */
4208 if ((dev->features & NETIF_F_FCOE_MTU) &&
4209 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4210 (pb == ixgbe_fcoe_get_tc(adapter)))
4211 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4214 /* Calculate delay value for device */
4215 switch (hw->mac.type) {
4216 case ixgbe_mac_X540:
4217 case ixgbe_mac_X550:
4218 case ixgbe_mac_X550EM_x:
4219 dv_id = IXGBE_DV_X540(link, tc);
4222 dv_id = IXGBE_DV(link, tc);
4226 /* Loopback switch introduces additional latency */
4227 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4228 dv_id += IXGBE_B2BT(tc);
4230 /* Delay value is calculated in bit times convert to KB */
4231 kb = IXGBE_BT2KB(dv_id);
4232 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4234 marker = rx_pba - kb;
4236 /* It is possible that the packet buffer is not large enough
4237 * to provide required headroom. In this case throw an error
4238 * to user and a do the best we can.
4241 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4242 "headroom to support flow control."
4243 "Decrease MTU or number of traffic classes\n", pb);
4251 * ixgbe_lpbthresh - calculate low water mark for for flow control
4253 * @adapter: board private structure to calculate for
4254 * @pb: packet buffer to calculate
4256 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4258 struct ixgbe_hw *hw = &adapter->hw;
4259 struct net_device *dev = adapter->netdev;
4263 /* Calculate max LAN frame size */
4264 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4267 /* FCoE traffic class uses FCOE jumbo frames */
4268 if ((dev->features & NETIF_F_FCOE_MTU) &&
4269 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4270 (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4271 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4274 /* Calculate delay value for device */
4275 switch (hw->mac.type) {
4276 case ixgbe_mac_X540:
4277 case ixgbe_mac_X550:
4278 case ixgbe_mac_X550EM_x:
4279 dv_id = IXGBE_LOW_DV_X540(tc);
4282 dv_id = IXGBE_LOW_DV(tc);
4286 /* Delay value is calculated in bit times convert to KB */
4287 return IXGBE_BT2KB(dv_id);
4291 * ixgbe_pbthresh_setup - calculate and setup high low water marks
4293 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4295 struct ixgbe_hw *hw = &adapter->hw;
4296 int num_tc = netdev_get_num_tc(adapter->netdev);
4302 for (i = 0; i < num_tc; i++) {
4303 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4304 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4306 /* Low water marks must not be larger than high water marks */
4307 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4308 hw->fc.low_water[i] = 0;
4311 for (; i < MAX_TRAFFIC_CLASS; i++)
4312 hw->fc.high_water[i] = 0;
4315 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4317 struct ixgbe_hw *hw = &adapter->hw;
4319 u8 tc = netdev_get_num_tc(adapter->netdev);
4321 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4322 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4323 hdrm = 32 << adapter->fdir_pballoc;
4327 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4328 ixgbe_pbthresh_setup(adapter);
4331 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4333 struct ixgbe_hw *hw = &adapter->hw;
4334 struct hlist_node *node2;
4335 struct ixgbe_fdir_filter *filter;
4337 spin_lock(&adapter->fdir_perfect_lock);
4339 if (!hlist_empty(&adapter->fdir_filter_list))
4340 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4342 hlist_for_each_entry_safe(filter, node2,
4343 &adapter->fdir_filter_list, fdir_node) {
4344 ixgbe_fdir_write_perfect_filter_82599(hw,
4347 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4348 IXGBE_FDIR_DROP_QUEUE :
4349 adapter->rx_ring[filter->action]->reg_idx);
4352 spin_unlock(&adapter->fdir_perfect_lock);
4355 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4356 struct ixgbe_adapter *adapter)
4358 struct ixgbe_hw *hw = &adapter->hw;
4361 /* No unicast promiscuous support for VMDQ devices. */
4362 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4363 vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4365 /* clear the affected bit */
4366 vmolr &= ~IXGBE_VMOLR_MPE;
4368 if (dev->flags & IFF_ALLMULTI) {
4369 vmolr |= IXGBE_VMOLR_MPE;
4371 vmolr |= IXGBE_VMOLR_ROMPE;
4372 hw->mac.ops.update_mc_addr_list(hw, dev);
4374 ixgbe_write_uc_addr_list(adapter->netdev, pool);
4375 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4378 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4380 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4381 int rss_i = adapter->num_rx_queues_per_pool;
4382 struct ixgbe_hw *hw = &adapter->hw;
4383 u16 pool = vadapter->pool;
4384 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4385 IXGBE_PSRTYPE_UDPHDR |
4386 IXGBE_PSRTYPE_IPV4HDR |
4387 IXGBE_PSRTYPE_L2HDR |
4388 IXGBE_PSRTYPE_IPV6HDR;
4390 if (hw->mac.type == ixgbe_mac_82598EB)
4398 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4402 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4403 * @rx_ring: ring to free buffers from
4405 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4407 struct device *dev = rx_ring->dev;
4411 /* ring already cleared, nothing to do */
4412 if (!rx_ring->rx_buffer_info)
4415 /* Free all the Rx ring sk_buffs */
4416 for (i = 0; i < rx_ring->count; i++) {
4417 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
4419 if (rx_buffer->skb) {
4420 struct sk_buff *skb = rx_buffer->skb;
4421 if (IXGBE_CB(skb)->page_released)
4424 ixgbe_rx_bufsz(rx_ring),
4427 rx_buffer->skb = NULL;
4430 if (!rx_buffer->page)
4433 dma_unmap_page(dev, rx_buffer->dma,
4434 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
4435 __free_pages(rx_buffer->page, ixgbe_rx_pg_order(rx_ring));
4437 rx_buffer->page = NULL;
4440 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4441 memset(rx_ring->rx_buffer_info, 0, size);
4443 /* Zero out the descriptor ring */
4444 memset(rx_ring->desc, 0, rx_ring->size);
4446 rx_ring->next_to_alloc = 0;
4447 rx_ring->next_to_clean = 0;
4448 rx_ring->next_to_use = 0;
4451 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4452 struct ixgbe_ring *rx_ring)
4454 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4455 int index = rx_ring->queue_index + vadapter->rx_base_queue;
4457 /* shutdown specific queue receive and wait for dma to settle */
4458 ixgbe_disable_rx_queue(adapter, rx_ring);
4459 usleep_range(10000, 20000);
4460 ixgbe_irq_disable_queues(adapter, ((u64)1 << index));
4461 ixgbe_clean_rx_ring(rx_ring);
4462 rx_ring->l2_accel_priv = NULL;
4465 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4466 struct ixgbe_fwd_adapter *accel)
4468 struct ixgbe_adapter *adapter = accel->real_adapter;
4469 unsigned int rxbase = accel->rx_base_queue;
4470 unsigned int txbase = accel->tx_base_queue;
4473 netif_tx_stop_all_queues(vdev);
4475 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4476 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4477 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4480 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4481 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4482 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4489 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4490 struct ixgbe_fwd_adapter *accel)
4492 struct ixgbe_adapter *adapter = accel->real_adapter;
4493 unsigned int rxbase, txbase, queues;
4494 int i, baseq, err = 0;
4496 if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4499 baseq = accel->pool * adapter->num_rx_queues_per_pool;
4500 netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4501 accel->pool, adapter->num_rx_pools,
4502 baseq, baseq + adapter->num_rx_queues_per_pool,
4503 adapter->fwd_bitmask);
4505 accel->netdev = vdev;
4506 accel->rx_base_queue = rxbase = baseq;
4507 accel->tx_base_queue = txbase = baseq;
4509 for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
4510 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4512 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4513 adapter->rx_ring[rxbase + i]->netdev = vdev;
4514 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
4515 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
4518 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4519 adapter->tx_ring[txbase + i]->netdev = vdev;
4520 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
4523 queues = min_t(unsigned int,
4524 adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
4525 err = netif_set_real_num_tx_queues(vdev, queues);
4529 err = netif_set_real_num_rx_queues(vdev, queues);
4533 if (is_valid_ether_addr(vdev->dev_addr))
4534 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
4536 ixgbe_fwd_psrtype(accel);
4537 ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
4540 ixgbe_fwd_ring_down(vdev, accel);
4544 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
4546 struct net_device *upper;
4547 struct list_head *iter;
4550 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
4551 if (netif_is_macvlan(upper)) {
4552 struct macvlan_dev *dfwd = netdev_priv(upper);
4553 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
4555 if (dfwd->fwd_priv) {
4556 err = ixgbe_fwd_ring_up(upper, vadapter);
4564 static void ixgbe_configure(struct ixgbe_adapter *adapter)
4566 struct ixgbe_hw *hw = &adapter->hw;
4568 ixgbe_configure_pb(adapter);
4569 #ifdef CONFIG_IXGBE_DCB
4570 ixgbe_configure_dcb(adapter);
4573 * We must restore virtualization before VLANs or else
4574 * the VLVF registers will not be populated
4576 ixgbe_configure_virtualization(adapter);
4578 ixgbe_set_rx_mode(adapter->netdev);
4579 ixgbe_restore_vlan(adapter);
4581 switch (hw->mac.type) {
4582 case ixgbe_mac_82599EB:
4583 case ixgbe_mac_X540:
4584 hw->mac.ops.disable_rx_buff(hw);
4590 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
4591 ixgbe_init_fdir_signature_82599(&adapter->hw,
4592 adapter->fdir_pballoc);
4593 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
4594 ixgbe_init_fdir_perfect_82599(&adapter->hw,
4595 adapter->fdir_pballoc);
4596 ixgbe_fdir_filter_restore(adapter);
4599 switch (hw->mac.type) {
4600 case ixgbe_mac_82599EB:
4601 case ixgbe_mac_X540:
4602 hw->mac.ops.enable_rx_buff(hw);
4609 /* configure FCoE L2 filters, redirection table, and Rx control */
4610 ixgbe_configure_fcoe(adapter);
4612 #endif /* IXGBE_FCOE */
4613 ixgbe_configure_tx(adapter);
4614 ixgbe_configure_rx(adapter);
4615 ixgbe_configure_dfwd(adapter);
4618 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
4620 switch (hw->phy.type) {
4621 case ixgbe_phy_sfp_avago:
4622 case ixgbe_phy_sfp_ftl:
4623 case ixgbe_phy_sfp_intel:
4624 case ixgbe_phy_sfp_unknown:
4625 case ixgbe_phy_sfp_passive_tyco:
4626 case ixgbe_phy_sfp_passive_unknown:
4627 case ixgbe_phy_sfp_active_unknown:
4628 case ixgbe_phy_sfp_ftl_active:
4629 case ixgbe_phy_qsfp_passive_unknown:
4630 case ixgbe_phy_qsfp_active_unknown:
4631 case ixgbe_phy_qsfp_intel:
4632 case ixgbe_phy_qsfp_unknown:
4633 /* ixgbe_phy_none is set when no SFP module is present */
4634 case ixgbe_phy_none:
4637 if (hw->mac.type == ixgbe_mac_82598EB)
4645 * ixgbe_sfp_link_config - set up SFP+ link
4646 * @adapter: pointer to private adapter struct
4648 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
4651 * We are assuming the worst case scenario here, and that
4652 * is that an SFP was inserted/removed after the reset
4653 * but before SFP detection was enabled. As such the best
4654 * solution is to just start searching as soon as we start
4656 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
4657 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
4659 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
4663 * ixgbe_non_sfp_link_config - set up non-SFP+ link
4664 * @hw: pointer to private hardware struct
4666 * Returns 0 on success, negative on failure
4668 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
4671 bool autoneg, link_up = false;
4672 u32 ret = IXGBE_ERR_LINK_SETUP;
4674 if (hw->mac.ops.check_link)
4675 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
4680 speed = hw->phy.autoneg_advertised;
4681 if ((!speed) && (hw->mac.ops.get_link_capabilities))
4682 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
4687 if (hw->mac.ops.setup_link)
4688 ret = hw->mac.ops.setup_link(hw, speed, link_up);
4693 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
4695 struct ixgbe_hw *hw = &adapter->hw;
4698 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4699 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
4701 gpie |= IXGBE_GPIE_EIAME;
4703 * use EIAM to auto-mask when MSI-X interrupt is asserted
4704 * this saves a register write for every interrupt
4706 switch (hw->mac.type) {
4707 case ixgbe_mac_82598EB:
4708 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4710 case ixgbe_mac_82599EB:
4711 case ixgbe_mac_X540:
4712 case ixgbe_mac_X550:
4713 case ixgbe_mac_X550EM_x:
4715 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4716 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4720 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4721 * specifically only auto mask tx and rx interrupts */
4722 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4725 /* XXX: to interrupt immediately for EICS writes, enable this */
4726 /* gpie |= IXGBE_GPIE_EIMEN; */
4728 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
4729 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
4731 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4732 case IXGBE_82599_VMDQ_8Q_MASK:
4733 gpie |= IXGBE_GPIE_VTMODE_16;
4735 case IXGBE_82599_VMDQ_4Q_MASK:
4736 gpie |= IXGBE_GPIE_VTMODE_32;
4739 gpie |= IXGBE_GPIE_VTMODE_64;
4744 /* Enable Thermal over heat sensor interrupt */
4745 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
4746 switch (adapter->hw.mac.type) {
4747 case ixgbe_mac_82599EB:
4748 gpie |= IXGBE_SDP0_GPIEN;
4750 case ixgbe_mac_X540:
4751 gpie |= IXGBE_EIMS_TS;
4758 /* Enable fan failure interrupt */
4759 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
4760 gpie |= IXGBE_SDP1_GPIEN;
4762 if (hw->mac.type == ixgbe_mac_82599EB) {
4763 gpie |= IXGBE_SDP1_GPIEN;
4764 gpie |= IXGBE_SDP2_GPIEN;
4767 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4770 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
4772 struct ixgbe_hw *hw = &adapter->hw;
4776 ixgbe_get_hw_control(adapter);
4777 ixgbe_setup_gpie(adapter);
4779 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4780 ixgbe_configure_msix(adapter);
4782 ixgbe_configure_msi_and_legacy(adapter);
4784 /* enable the optics for 82599 SFP+ fiber */
4785 if (hw->mac.ops.enable_tx_laser)
4786 hw->mac.ops.enable_tx_laser(hw);
4788 smp_mb__before_atomic();
4789 clear_bit(__IXGBE_DOWN, &adapter->state);
4790 ixgbe_napi_enable_all(adapter);
4792 if (ixgbe_is_sfp(hw)) {
4793 ixgbe_sfp_link_config(adapter);
4795 err = ixgbe_non_sfp_link_config(hw);
4797 e_err(probe, "link_config FAILED %d\n", err);
4800 /* clear any pending interrupts, may auto mask */
4801 IXGBE_READ_REG(hw, IXGBE_EICR);
4802 ixgbe_irq_enable(adapter, true, true);
4805 * If this adapter has a fan, check to see if we had a failure
4806 * before we enabled the interrupt.
4808 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
4809 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
4810 if (esdp & IXGBE_ESDP_SDP1)
4811 e_crit(drv, "Fan has stopped, replace the adapter\n");
4814 /* bring the link up in the watchdog, this could race with our first
4815 * link up interrupt but shouldn't be a problem */
4816 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
4817 adapter->link_check_timeout = jiffies;
4818 mod_timer(&adapter->service_timer, jiffies);
4820 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4821 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
4822 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
4823 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
4826 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
4828 WARN_ON(in_interrupt());
4829 /* put off any impending NetWatchDogTimeout */
4830 adapter->netdev->trans_start = jiffies;
4832 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
4833 usleep_range(1000, 2000);
4834 ixgbe_down(adapter);
4836 * If SR-IOV enabled then wait a bit before bringing the adapter
4837 * back up to give the VFs time to respond to the reset. The
4838 * two second wait is based upon the watchdog timer cycle in
4841 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4844 clear_bit(__IXGBE_RESETTING, &adapter->state);
4847 void ixgbe_up(struct ixgbe_adapter *adapter)
4849 /* hardware has been reset, we need to reload some things */
4850 ixgbe_configure(adapter);
4852 ixgbe_up_complete(adapter);
4855 void ixgbe_reset(struct ixgbe_adapter *adapter)
4857 struct ixgbe_hw *hw = &adapter->hw;
4858 struct net_device *netdev = adapter->netdev;
4860 u8 old_addr[ETH_ALEN];
4862 if (ixgbe_removed(hw->hw_addr))
4864 /* lock SFP init bit to prevent race conditions with the watchdog */
4865 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
4866 usleep_range(1000, 2000);
4868 /* clear all SFP and link config related flags while holding SFP_INIT */
4869 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
4870 IXGBE_FLAG2_SFP_NEEDS_RESET);
4871 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
4873 err = hw->mac.ops.init_hw(hw);
4876 case IXGBE_ERR_SFP_NOT_PRESENT:
4877 case IXGBE_ERR_SFP_NOT_SUPPORTED:
4879 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
4880 e_dev_err("master disable timed out\n");
4882 case IXGBE_ERR_EEPROM_VERSION:
4883 /* We are running on a pre-production device, log a warning */
4884 e_dev_warn("This device is a pre-production adapter/LOM. "
4885 "Please be aware there may be issues associated with "
4886 "your hardware. If you are experiencing problems "
4887 "please contact your Intel or hardware "
4888 "representative who provided you with this "
4892 e_dev_err("Hardware Error: %d\n", err);
4895 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
4896 /* do not flush user set addresses */
4897 memcpy(old_addr, &adapter->mac_table[0].addr, netdev->addr_len);
4898 ixgbe_flush_sw_mac_table(adapter);
4899 ixgbe_mac_set_default_filter(adapter, old_addr);
4901 /* update SAN MAC vmdq pool selection */
4902 if (hw->mac.san_mac_rar_index)
4903 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
4905 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
4906 ixgbe_ptp_reset(adapter);
4910 * ixgbe_clean_tx_ring - Free Tx Buffers
4911 * @tx_ring: ring to be cleaned
4913 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
4915 struct ixgbe_tx_buffer *tx_buffer_info;
4919 /* ring already cleared, nothing to do */
4920 if (!tx_ring->tx_buffer_info)
4923 /* Free all the Tx ring sk_buffs */
4924 for (i = 0; i < tx_ring->count; i++) {
4925 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4926 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
4929 netdev_tx_reset_queue(txring_txq(tx_ring));
4931 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
4932 memset(tx_ring->tx_buffer_info, 0, size);
4934 /* Zero out the descriptor ring */
4935 memset(tx_ring->desc, 0, tx_ring->size);
4937 tx_ring->next_to_use = 0;
4938 tx_ring->next_to_clean = 0;
4942 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
4943 * @adapter: board private structure
4945 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
4949 for (i = 0; i < adapter->num_rx_queues; i++)
4950 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
4954 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
4955 * @adapter: board private structure
4957 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
4961 for (i = 0; i < adapter->num_tx_queues; i++)
4962 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
4965 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
4967 struct hlist_node *node2;
4968 struct ixgbe_fdir_filter *filter;
4970 spin_lock(&adapter->fdir_perfect_lock);
4972 hlist_for_each_entry_safe(filter, node2,
4973 &adapter->fdir_filter_list, fdir_node) {
4974 hlist_del(&filter->fdir_node);
4977 adapter->fdir_filter_count = 0;
4979 spin_unlock(&adapter->fdir_perfect_lock);
4982 void ixgbe_down(struct ixgbe_adapter *adapter)
4984 struct net_device *netdev = adapter->netdev;
4985 struct ixgbe_hw *hw = &adapter->hw;
4986 struct net_device *upper;
4987 struct list_head *iter;
4991 /* signal that we are down to the interrupt handler */
4992 if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
4993 return; /* do nothing if already down */
4995 /* disable receives */
4996 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4997 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
4999 /* disable all enabled rx queues */
5000 for (i = 0; i < adapter->num_rx_queues; i++)
5001 /* this call also flushes the previous write */
5002 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5004 usleep_range(10000, 20000);
5006 netif_tx_stop_all_queues(netdev);
5008 /* call carrier off first to avoid false dev_watchdog timeouts */
5009 netif_carrier_off(netdev);
5010 netif_tx_disable(netdev);
5012 /* disable any upper devices */
5013 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
5014 if (netif_is_macvlan(upper)) {
5015 struct macvlan_dev *vlan = netdev_priv(upper);
5017 if (vlan->fwd_priv) {
5018 netif_tx_stop_all_queues(upper);
5019 netif_carrier_off(upper);
5020 netif_tx_disable(upper);
5025 ixgbe_irq_disable(adapter);
5027 ixgbe_napi_disable_all(adapter);
5029 adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
5030 IXGBE_FLAG2_RESET_REQUESTED);
5031 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5033 del_timer_sync(&adapter->service_timer);
5035 if (adapter->num_vfs) {
5036 /* Clear EITR Select mapping */
5037 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5039 /* Mark all the VFs as inactive */
5040 for (i = 0 ; i < adapter->num_vfs; i++)
5041 adapter->vfinfo[i].clear_to_send = false;
5043 /* ping all the active vfs to let them know we are going down */
5044 ixgbe_ping_all_vfs(adapter);
5046 /* Disable all VFTE/VFRE TX/RX */
5047 ixgbe_disable_tx_rx(adapter);
5050 /* disable transmits in the hardware now that interrupts are off */
5051 for (i = 0; i < adapter->num_tx_queues; i++) {
5052 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5053 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5056 /* Disable the Tx DMA engine on 82599 and later MAC */
5057 switch (hw->mac.type) {
5058 case ixgbe_mac_82599EB:
5059 case ixgbe_mac_X540:
5060 case ixgbe_mac_X550:
5061 case ixgbe_mac_X550EM_x:
5062 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5063 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5064 ~IXGBE_DMATXCTL_TE));
5070 if (!pci_channel_offline(adapter->pdev))
5071 ixgbe_reset(adapter);
5073 /* power down the optics for 82599 SFP+ fiber */
5074 if (hw->mac.ops.disable_tx_laser)
5075 hw->mac.ops.disable_tx_laser(hw);
5077 ixgbe_clean_all_tx_rings(adapter);
5078 ixgbe_clean_all_rx_rings(adapter);
5080 #ifdef CONFIG_IXGBE_DCA
5081 /* since we reset the hardware DCA settings were cleared */
5082 ixgbe_setup_dca(adapter);
5087 * ixgbe_tx_timeout - Respond to a Tx Hang
5088 * @netdev: network interface device structure
5090 static void ixgbe_tx_timeout(struct net_device *netdev)
5092 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5094 /* Do the reset outside of interrupt context */
5095 ixgbe_tx_timeout_reset(adapter);
5099 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5100 * @adapter: board private structure to initialize
5102 * ixgbe_sw_init initializes the Adapter private data structure.
5103 * Fields are initialized based on PCI device information and
5104 * OS network device settings (MTU size).
5106 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
5108 struct ixgbe_hw *hw = &adapter->hw;
5109 struct pci_dev *pdev = adapter->pdev;
5110 unsigned int rss, fdir;
5112 #ifdef CONFIG_IXGBE_DCB
5114 struct tc_configuration *tc;
5117 /* PCI config space info */
5119 hw->vendor_id = pdev->vendor;
5120 hw->device_id = pdev->device;
5121 hw->revision_id = pdev->revision;
5122 hw->subsystem_vendor_id = pdev->subsystem_vendor;
5123 hw->subsystem_device_id = pdev->subsystem_device;
5125 /* Set common capability flags and settings */
5126 rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
5127 adapter->ring_feature[RING_F_RSS].limit = rss;
5128 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5129 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
5130 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5131 adapter->atr_sample_rate = 20;
5132 fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5133 adapter->ring_feature[RING_F_FDIR].limit = fdir;
5134 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5135 #ifdef CONFIG_IXGBE_DCA
5136 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5139 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5140 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5141 #ifdef CONFIG_IXGBE_DCB
5142 /* Default traffic class to use for FCoE */
5143 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5144 #endif /* CONFIG_IXGBE_DCB */
5145 #endif /* IXGBE_FCOE */
5147 adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5148 hw->mac.num_rar_entries,
5151 /* Set MAC specific capability flags and exceptions */
5152 switch (hw->mac.type) {
5153 case ixgbe_mac_82598EB:
5154 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5155 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
5157 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5158 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5160 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5161 adapter->ring_feature[RING_F_FDIR].limit = 0;
5162 adapter->atr_sample_rate = 0;
5163 adapter->fdir_pballoc = 0;
5165 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5166 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5167 #ifdef CONFIG_IXGBE_DCB
5168 adapter->fcoe.up = 0;
5169 #endif /* IXGBE_DCB */
5170 #endif /* IXGBE_FCOE */
5172 case ixgbe_mac_82599EB:
5173 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5174 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5176 case ixgbe_mac_X540:
5177 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM);
5178 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5179 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5181 case ixgbe_mac_X550EM_x:
5182 case ixgbe_mac_X550:
5183 #ifdef CONFIG_IXGBE_DCA
5184 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
5192 /* FCoE support exists, always init the FCoE lock */
5193 spin_lock_init(&adapter->fcoe.lock);
5196 /* n-tuple support exists, always init our spinlock */
5197 spin_lock_init(&adapter->fdir_perfect_lock);
5199 #ifdef CONFIG_IXGBE_DCB
5200 switch (hw->mac.type) {
5201 case ixgbe_mac_X540:
5202 case ixgbe_mac_X550:
5203 case ixgbe_mac_X550EM_x:
5204 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5205 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5208 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5209 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5213 /* Configure DCB traffic classes */
5214 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5215 tc = &adapter->dcb_cfg.tc_config[j];
5216 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5217 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5218 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5219 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5220 tc->dcb_pfc = pfc_disabled;
5223 /* Initialize default user to priority mapping, UPx->TC0 */
5224 tc = &adapter->dcb_cfg.tc_config[0];
5225 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5226 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5228 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5229 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5230 adapter->dcb_cfg.pfc_mode_enable = false;
5231 adapter->dcb_set_bitmap = 0x00;
5232 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5233 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5234 sizeof(adapter->temp_dcb_cfg));
5238 /* default flow control settings */
5239 hw->fc.requested_mode = ixgbe_fc_full;
5240 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
5241 ixgbe_pbthresh_setup(adapter);
5242 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5243 hw->fc.send_xon = true;
5244 hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5246 #ifdef CONFIG_PCI_IOV
5248 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5250 /* assign number of SR-IOV VFs */
5251 if (hw->mac.type != ixgbe_mac_82598EB) {
5252 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5253 adapter->num_vfs = 0;
5254 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5256 adapter->num_vfs = max_vfs;
5259 #endif /* CONFIG_PCI_IOV */
5261 /* enable itr by default in dynamic mode */
5262 adapter->rx_itr_setting = 1;
5263 adapter->tx_itr_setting = 1;
5265 /* set default ring sizes */
5266 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5267 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5269 /* set default work limits */
5270 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5272 /* initialize eeprom parameters */
5273 if (ixgbe_init_eeprom_params_generic(hw)) {
5274 e_dev_err("EEPROM initialization failed\n");
5278 /* PF holds first pool slot */
5279 set_bit(0, &adapter->fwd_bitmask);
5280 set_bit(__IXGBE_DOWN, &adapter->state);
5286 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5287 * @tx_ring: tx descriptor ring (for a specific queue) to setup
5289 * Return 0 on success, negative on failure
5291 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5293 struct device *dev = tx_ring->dev;
5294 int orig_node = dev_to_node(dev);
5298 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5300 if (tx_ring->q_vector)
5301 ring_node = tx_ring->q_vector->numa_node;
5303 tx_ring->tx_buffer_info = vzalloc_node(size, ring_node);
5304 if (!tx_ring->tx_buffer_info)
5305 tx_ring->tx_buffer_info = vzalloc(size);
5306 if (!tx_ring->tx_buffer_info)
5309 u64_stats_init(&tx_ring->syncp);
5311 /* round up to nearest 4K */
5312 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5313 tx_ring->size = ALIGN(tx_ring->size, 4096);
5315 set_dev_node(dev, ring_node);
5316 tx_ring->desc = dma_alloc_coherent(dev,
5320 set_dev_node(dev, orig_node);
5322 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5323 &tx_ring->dma, GFP_KERNEL);
5327 tx_ring->next_to_use = 0;
5328 tx_ring->next_to_clean = 0;
5332 vfree(tx_ring->tx_buffer_info);
5333 tx_ring->tx_buffer_info = NULL;
5334 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5339 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5340 * @adapter: board private structure
5342 * If this function returns with an error, then it's possible one or
5343 * more of the rings is populated (while the rest are not). It is the
5344 * callers duty to clean those orphaned rings.
5346 * Return 0 on success, negative on failure
5348 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5352 for (i = 0; i < adapter->num_tx_queues; i++) {
5353 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5357 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5363 /* rewind the index freeing the rings as we go */
5365 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5370 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5371 * @rx_ring: rx descriptor ring (for a specific queue) to setup
5373 * Returns 0 on success, negative on failure
5375 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5377 struct device *dev = rx_ring->dev;
5378 int orig_node = dev_to_node(dev);
5382 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5384 if (rx_ring->q_vector)
5385 ring_node = rx_ring->q_vector->numa_node;
5387 rx_ring->rx_buffer_info = vzalloc_node(size, ring_node);
5388 if (!rx_ring->rx_buffer_info)
5389 rx_ring->rx_buffer_info = vzalloc(size);
5390 if (!rx_ring->rx_buffer_info)
5393 u64_stats_init(&rx_ring->syncp);
5395 /* Round up to nearest 4K */
5396 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5397 rx_ring->size = ALIGN(rx_ring->size, 4096);
5399 set_dev_node(dev, ring_node);
5400 rx_ring->desc = dma_alloc_coherent(dev,
5404 set_dev_node(dev, orig_node);
5406 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5407 &rx_ring->dma, GFP_KERNEL);
5411 rx_ring->next_to_clean = 0;
5412 rx_ring->next_to_use = 0;
5416 vfree(rx_ring->rx_buffer_info);
5417 rx_ring->rx_buffer_info = NULL;
5418 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5423 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5424 * @adapter: board private structure
5426 * If this function returns with an error, then it's possible one or
5427 * more of the rings is populated (while the rest are not). It is the
5428 * callers duty to clean those orphaned rings.
5430 * Return 0 on success, negative on failure
5432 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
5436 for (i = 0; i < adapter->num_rx_queues; i++) {
5437 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
5441 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
5446 err = ixgbe_setup_fcoe_ddp_resources(adapter);
5451 /* rewind the index freeing the rings as we go */
5453 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5458 * ixgbe_free_tx_resources - Free Tx Resources per Queue
5459 * @tx_ring: Tx descriptor ring for a specific queue
5461 * Free all transmit software resources
5463 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
5465 ixgbe_clean_tx_ring(tx_ring);
5467 vfree(tx_ring->tx_buffer_info);
5468 tx_ring->tx_buffer_info = NULL;
5470 /* if not set, then don't free */
5474 dma_free_coherent(tx_ring->dev, tx_ring->size,
5475 tx_ring->desc, tx_ring->dma);
5477 tx_ring->desc = NULL;
5481 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5482 * @adapter: board private structure
5484 * Free all transmit software resources
5486 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
5490 for (i = 0; i < adapter->num_tx_queues; i++)
5491 if (adapter->tx_ring[i]->desc)
5492 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5496 * ixgbe_free_rx_resources - Free Rx Resources
5497 * @rx_ring: ring to clean the resources from
5499 * Free all receive software resources
5501 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
5503 ixgbe_clean_rx_ring(rx_ring);
5505 vfree(rx_ring->rx_buffer_info);
5506 rx_ring->rx_buffer_info = NULL;
5508 /* if not set, then don't free */
5512 dma_free_coherent(rx_ring->dev, rx_ring->size,
5513 rx_ring->desc, rx_ring->dma);
5515 rx_ring->desc = NULL;
5519 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5520 * @adapter: board private structure
5522 * Free all receive software resources
5524 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
5529 ixgbe_free_fcoe_ddp_resources(adapter);
5532 for (i = 0; i < adapter->num_rx_queues; i++)
5533 if (adapter->rx_ring[i]->desc)
5534 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5538 * ixgbe_change_mtu - Change the Maximum Transfer Unit
5539 * @netdev: network interface device structure
5540 * @new_mtu: new value for maximum frame size
5542 * Returns 0 on success, negative on failure
5544 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
5546 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5547 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5549 /* MTU < 68 is an error and causes problems on some kernels */
5550 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
5554 * For 82599EB we cannot allow legacy VFs to enable their receive
5555 * paths when MTU greater than 1500 is configured. So display a
5556 * warning that legacy VFs will be disabled.
5558 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
5559 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
5560 (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
5561 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
5563 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5565 /* must set new MTU before calling down or up */
5566 netdev->mtu = new_mtu;
5568 if (netif_running(netdev))
5569 ixgbe_reinit_locked(adapter);
5575 * ixgbe_open - Called when a network interface is made active
5576 * @netdev: network interface device structure
5578 * Returns 0 on success, negative value on failure
5580 * The open entry point is called when a network interface is made
5581 * active by the system (IFF_UP). At this point all resources needed
5582 * for transmit and receive operations are allocated, the interrupt
5583 * handler is registered with the OS, the watchdog timer is started,
5584 * and the stack is notified that the interface is ready.
5586 static int ixgbe_open(struct net_device *netdev)
5588 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5591 /* disallow open during test */
5592 if (test_bit(__IXGBE_TESTING, &adapter->state))
5595 netif_carrier_off(netdev);
5597 /* allocate transmit descriptors */
5598 err = ixgbe_setup_all_tx_resources(adapter);
5602 /* allocate receive descriptors */
5603 err = ixgbe_setup_all_rx_resources(adapter);
5607 ixgbe_configure(adapter);
5609 err = ixgbe_request_irq(adapter);
5613 /* Notify the stack of the actual queue counts. */
5614 if (adapter->num_rx_pools > 1)
5615 queues = adapter->num_rx_queues_per_pool;
5617 queues = adapter->num_tx_queues;
5619 err = netif_set_real_num_tx_queues(netdev, queues);
5621 goto err_set_queues;
5623 if (adapter->num_rx_pools > 1 &&
5624 adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
5625 queues = IXGBE_MAX_L2A_QUEUES;
5627 queues = adapter->num_rx_queues;
5628 err = netif_set_real_num_rx_queues(netdev, queues);
5630 goto err_set_queues;
5632 ixgbe_ptp_init(adapter);
5634 ixgbe_up_complete(adapter);
5639 ixgbe_free_irq(adapter);
5641 ixgbe_free_all_rx_resources(adapter);
5643 ixgbe_free_all_tx_resources(adapter);
5645 ixgbe_reset(adapter);
5650 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
5652 ixgbe_ptp_suspend(adapter);
5654 ixgbe_down(adapter);
5655 ixgbe_free_irq(adapter);
5657 ixgbe_free_all_tx_resources(adapter);
5658 ixgbe_free_all_rx_resources(adapter);
5662 * ixgbe_close - Disables a network interface
5663 * @netdev: network interface device structure
5665 * Returns 0, this is not allowed to fail
5667 * The close entry point is called when an interface is de-activated
5668 * by the OS. The hardware is still under the drivers control, but
5669 * needs to be disabled. A global MAC reset is issued to stop the
5670 * hardware, and all transmit and receive resources are freed.
5672 static int ixgbe_close(struct net_device *netdev)
5674 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5676 ixgbe_ptp_stop(adapter);
5678 ixgbe_close_suspend(adapter);
5680 ixgbe_fdir_filter_exit(adapter);
5682 ixgbe_release_hw_control(adapter);
5688 static int ixgbe_resume(struct pci_dev *pdev)
5690 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5691 struct net_device *netdev = adapter->netdev;
5694 adapter->hw.hw_addr = adapter->io_addr;
5695 pci_set_power_state(pdev, PCI_D0);
5696 pci_restore_state(pdev);
5698 * pci_restore_state clears dev->state_saved so call
5699 * pci_save_state to restore it.
5701 pci_save_state(pdev);
5703 err = pci_enable_device_mem(pdev);
5705 e_dev_err("Cannot enable PCI device from suspend\n");
5708 smp_mb__before_atomic();
5709 clear_bit(__IXGBE_DISABLED, &adapter->state);
5710 pci_set_master(pdev);
5712 pci_wake_from_d3(pdev, false);
5714 ixgbe_reset(adapter);
5716 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5719 err = ixgbe_init_interrupt_scheme(adapter);
5720 if (!err && netif_running(netdev))
5721 err = ixgbe_open(netdev);
5728 netif_device_attach(netdev);
5732 #endif /* CONFIG_PM */
5734 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
5736 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5737 struct net_device *netdev = adapter->netdev;
5738 struct ixgbe_hw *hw = &adapter->hw;
5740 u32 wufc = adapter->wol;
5745 netif_device_detach(netdev);
5748 if (netif_running(netdev))
5749 ixgbe_close_suspend(adapter);
5752 ixgbe_clear_interrupt_scheme(adapter);
5755 retval = pci_save_state(pdev);
5760 if (hw->mac.ops.stop_link_on_d3)
5761 hw->mac.ops.stop_link_on_d3(hw);
5764 ixgbe_set_rx_mode(netdev);
5766 /* enable the optics for 82599 SFP+ fiber as we can WoL */
5767 if (hw->mac.ops.enable_tx_laser)
5768 hw->mac.ops.enable_tx_laser(hw);
5770 /* turn on all-multi mode if wake on multicast is enabled */
5771 if (wufc & IXGBE_WUFC_MC) {
5772 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5773 fctrl |= IXGBE_FCTRL_MPE;
5774 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5777 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
5778 ctrl |= IXGBE_CTRL_GIO_DIS;
5779 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
5781 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
5783 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
5784 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
5787 switch (hw->mac.type) {
5788 case ixgbe_mac_82598EB:
5789 pci_wake_from_d3(pdev, false);
5791 case ixgbe_mac_82599EB:
5792 case ixgbe_mac_X540:
5793 case ixgbe_mac_X550:
5794 case ixgbe_mac_X550EM_x:
5795 pci_wake_from_d3(pdev, !!wufc);
5801 *enable_wake = !!wufc;
5803 ixgbe_release_hw_control(adapter);
5805 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
5806 pci_disable_device(pdev);
5812 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
5817 retval = __ixgbe_shutdown(pdev, &wake);
5822 pci_prepare_to_sleep(pdev);
5824 pci_wake_from_d3(pdev, false);
5825 pci_set_power_state(pdev, PCI_D3hot);
5830 #endif /* CONFIG_PM */
5832 static void ixgbe_shutdown(struct pci_dev *pdev)
5836 __ixgbe_shutdown(pdev, &wake);
5838 if (system_state == SYSTEM_POWER_OFF) {
5839 pci_wake_from_d3(pdev, wake);
5840 pci_set_power_state(pdev, PCI_D3hot);
5845 * ixgbe_update_stats - Update the board statistics counters.
5846 * @adapter: board private structure
5848 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
5850 struct net_device *netdev = adapter->netdev;
5851 struct ixgbe_hw *hw = &adapter->hw;
5852 struct ixgbe_hw_stats *hwstats = &adapter->stats;
5854 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
5855 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
5856 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
5857 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
5859 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5860 test_bit(__IXGBE_RESETTING, &adapter->state))
5863 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
5866 for (i = 0; i < adapter->num_rx_queues; i++) {
5867 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
5868 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
5870 adapter->rsc_total_count = rsc_count;
5871 adapter->rsc_total_flush = rsc_flush;
5874 for (i = 0; i < adapter->num_rx_queues; i++) {
5875 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
5876 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
5877 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
5878 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
5879 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
5880 bytes += rx_ring->stats.bytes;
5881 packets += rx_ring->stats.packets;
5883 adapter->non_eop_descs = non_eop_descs;
5884 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
5885 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
5886 adapter->hw_csum_rx_error = hw_csum_rx_error;
5887 netdev->stats.rx_bytes = bytes;
5888 netdev->stats.rx_packets = packets;
5892 /* gather some stats to the adapter struct that are per queue */
5893 for (i = 0; i < adapter->num_tx_queues; i++) {
5894 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
5895 restart_queue += tx_ring->tx_stats.restart_queue;
5896 tx_busy += tx_ring->tx_stats.tx_busy;
5897 bytes += tx_ring->stats.bytes;
5898 packets += tx_ring->stats.packets;
5900 adapter->restart_queue = restart_queue;
5901 adapter->tx_busy = tx_busy;
5902 netdev->stats.tx_bytes = bytes;
5903 netdev->stats.tx_packets = packets;
5905 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
5907 /* 8 register reads */
5908 for (i = 0; i < 8; i++) {
5909 /* for packet buffers not used, the register should read 0 */
5910 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
5912 hwstats->mpc[i] += mpc;
5913 total_mpc += hwstats->mpc[i];
5914 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
5915 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
5916 switch (hw->mac.type) {
5917 case ixgbe_mac_82598EB:
5918 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
5919 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
5920 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
5921 hwstats->pxonrxc[i] +=
5922 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
5924 case ixgbe_mac_82599EB:
5925 case ixgbe_mac_X540:
5926 case ixgbe_mac_X550:
5927 case ixgbe_mac_X550EM_x:
5928 hwstats->pxonrxc[i] +=
5929 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
5936 /*16 register reads */
5937 for (i = 0; i < 16; i++) {
5938 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
5939 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
5940 if ((hw->mac.type == ixgbe_mac_82599EB) ||
5941 (hw->mac.type == ixgbe_mac_X540) ||
5942 (hw->mac.type == ixgbe_mac_X550) ||
5943 (hw->mac.type == ixgbe_mac_X550EM_x)) {
5944 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
5945 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
5946 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
5947 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
5951 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
5952 /* work around hardware counting issue */
5953 hwstats->gprc -= missed_rx;
5955 ixgbe_update_xoff_received(adapter);
5957 /* 82598 hardware only has a 32 bit counter in the high register */
5958 switch (hw->mac.type) {
5959 case ixgbe_mac_82598EB:
5960 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
5961 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
5962 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
5963 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
5965 case ixgbe_mac_X540:
5966 case ixgbe_mac_X550:
5967 case ixgbe_mac_X550EM_x:
5968 /* OS2BMC stats are X540 and later */
5969 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
5970 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
5971 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
5972 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
5973 case ixgbe_mac_82599EB:
5974 for (i = 0; i < 16; i++)
5975 adapter->hw_rx_no_dma_resources +=
5976 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
5977 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
5978 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
5979 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
5980 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
5981 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
5982 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
5983 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
5984 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
5985 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
5987 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
5988 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
5989 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
5990 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
5991 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
5992 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
5993 /* Add up per cpu counters for total ddp aloc fail */
5994 if (adapter->fcoe.ddp_pool) {
5995 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
5996 struct ixgbe_fcoe_ddp_pool *ddp_pool;
5998 u64 noddp = 0, noddp_ext_buff = 0;
5999 for_each_possible_cpu(cpu) {
6000 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6001 noddp += ddp_pool->noddp;
6002 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6004 hwstats->fcoe_noddp = noddp;
6005 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6007 #endif /* IXGBE_FCOE */
6012 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6013 hwstats->bprc += bprc;
6014 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6015 if (hw->mac.type == ixgbe_mac_82598EB)
6016 hwstats->mprc -= bprc;
6017 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6018 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6019 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6020 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6021 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6022 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6023 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6024 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6025 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6026 hwstats->lxontxc += lxon;
6027 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6028 hwstats->lxofftxc += lxoff;
6029 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6030 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6032 * 82598 errata - tx of flow control packets is included in tx counters
6034 xon_off_tot = lxon + lxoff;
6035 hwstats->gptc -= xon_off_tot;
6036 hwstats->mptc -= xon_off_tot;
6037 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6038 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6039 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6040 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6041 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6042 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6043 hwstats->ptc64 -= xon_off_tot;
6044 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6045 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6046 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6047 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6048 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6049 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6051 /* Fill out the OS statistics structure */
6052 netdev->stats.multicast = hwstats->mprc;
6055 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6056 netdev->stats.rx_dropped = 0;
6057 netdev->stats.rx_length_errors = hwstats->rlec;
6058 netdev->stats.rx_crc_errors = hwstats->crcerrs;
6059 netdev->stats.rx_missed_errors = total_mpc;
6063 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6064 * @adapter: pointer to the device adapter structure
6066 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6068 struct ixgbe_hw *hw = &adapter->hw;
6071 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6074 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6076 /* if interface is down do nothing */
6077 if (test_bit(__IXGBE_DOWN, &adapter->state))
6080 /* do nothing if we are not using signature filters */
6081 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6084 adapter->fdir_overflow++;
6086 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6087 for (i = 0; i < adapter->num_tx_queues; i++)
6088 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6089 &(adapter->tx_ring[i]->state));
6090 /* re-enable flow director interrupts */
6091 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6093 e_err(probe, "failed to finish FDIR re-initialization, "
6094 "ignored adding FDIR ATR filters\n");
6099 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6100 * @adapter: pointer to the device adapter structure
6102 * This function serves two purposes. First it strobes the interrupt lines
6103 * in order to make certain interrupts are occurring. Secondly it sets the
6104 * bits needed to check for TX hangs. As a result we should immediately
6105 * determine if a hang has occurred.
6107 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6109 struct ixgbe_hw *hw = &adapter->hw;
6113 /* If we're down, removing or resetting, just bail */
6114 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6115 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6116 test_bit(__IXGBE_RESETTING, &adapter->state))
6119 /* Force detection of hung controller */
6120 if (netif_carrier_ok(adapter->netdev)) {
6121 for (i = 0; i < adapter->num_tx_queues; i++)
6122 set_check_for_tx_hang(adapter->tx_ring[i]);
6125 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6127 * for legacy and MSI interrupts don't set any bits
6128 * that are enabled for EIAM, because this operation
6129 * would set *both* EIMS and EICS for any bit in EIAM
6131 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6132 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6134 /* get one bit for every active tx/rx interrupt vector */
6135 for (i = 0; i < adapter->num_q_vectors; i++) {
6136 struct ixgbe_q_vector *qv = adapter->q_vector[i];
6137 if (qv->rx.ring || qv->tx.ring)
6138 eics |= ((u64)1 << i);
6142 /* Cause software interrupt to ensure rings are cleaned */
6143 ixgbe_irq_rearm_queues(adapter, eics);
6148 * ixgbe_watchdog_update_link - update the link status
6149 * @adapter: pointer to the device adapter structure
6150 * @link_speed: pointer to a u32 to store the link_speed
6152 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6154 struct ixgbe_hw *hw = &adapter->hw;
6155 u32 link_speed = adapter->link_speed;
6156 bool link_up = adapter->link_up;
6157 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6159 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6162 if (hw->mac.ops.check_link) {
6163 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6165 /* always assume link is up, if no check link function */
6166 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6170 if (adapter->ixgbe_ieee_pfc)
6171 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6173 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6174 hw->mac.ops.fc_enable(hw);
6175 ixgbe_set_rx_drop_en(adapter);
6179 time_after(jiffies, (adapter->link_check_timeout +
6180 IXGBE_TRY_LINK_TIMEOUT))) {
6181 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6182 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6183 IXGBE_WRITE_FLUSH(hw);
6186 adapter->link_up = link_up;
6187 adapter->link_speed = link_speed;
6190 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6192 #ifdef CONFIG_IXGBE_DCB
6193 struct net_device *netdev = adapter->netdev;
6194 struct dcb_app app = {
6195 .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6200 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6201 up = dcb_ieee_getapp_mask(netdev, &app);
6203 adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6208 * ixgbe_watchdog_link_is_up - update netif_carrier status and
6209 * print link up message
6210 * @adapter: pointer to the device adapter structure
6212 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6214 struct net_device *netdev = adapter->netdev;
6215 struct ixgbe_hw *hw = &adapter->hw;
6216 struct net_device *upper;
6217 struct list_head *iter;
6218 u32 link_speed = adapter->link_speed;
6219 bool flow_rx, flow_tx;
6221 /* only continue if link was previously down */
6222 if (netif_carrier_ok(netdev))
6225 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6227 switch (hw->mac.type) {
6228 case ixgbe_mac_82598EB: {
6229 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6230 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6231 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6232 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6235 case ixgbe_mac_X540:
6236 case ixgbe_mac_X550:
6237 case ixgbe_mac_X550EM_x:
6238 case ixgbe_mac_82599EB: {
6239 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6240 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6241 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6242 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6251 adapter->last_rx_ptp_check = jiffies;
6253 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6254 ixgbe_ptp_start_cyclecounter(adapter);
6256 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n",
6257 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
6259 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
6261 (link_speed == IXGBE_LINK_SPEED_100_FULL ?
6264 ((flow_rx && flow_tx) ? "RX/TX" :
6266 (flow_tx ? "TX" : "None"))));
6268 netif_carrier_on(netdev);
6269 ixgbe_check_vf_rate_limit(adapter);
6271 /* enable transmits */
6272 netif_tx_wake_all_queues(adapter->netdev);
6274 /* enable any upper devices */
6276 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
6277 if (netif_is_macvlan(upper)) {
6278 struct macvlan_dev *vlan = netdev_priv(upper);
6281 netif_tx_wake_all_queues(upper);
6286 /* update the default user priority for VFs */
6287 ixgbe_update_default_up(adapter);
6289 /* ping all the active vfs to let them know link has changed */
6290 ixgbe_ping_all_vfs(adapter);
6294 * ixgbe_watchdog_link_is_down - update netif_carrier status and
6295 * print link down message
6296 * @adapter: pointer to the adapter structure
6298 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6300 struct net_device *netdev = adapter->netdev;
6301 struct ixgbe_hw *hw = &adapter->hw;
6303 adapter->link_up = false;
6304 adapter->link_speed = 0;
6306 /* only continue if link was up previously */
6307 if (!netif_carrier_ok(netdev))
6310 /* poll for SFP+ cable when link is down */
6311 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6312 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6314 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6315 ixgbe_ptp_start_cyclecounter(adapter);
6317 e_info(drv, "NIC Link is Down\n");
6318 netif_carrier_off(netdev);
6320 /* ping all the active vfs to let them know link has changed */
6321 ixgbe_ping_all_vfs(adapter);
6324 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
6328 for (i = 0; i < adapter->num_tx_queues; i++) {
6329 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6331 if (tx_ring->next_to_use != tx_ring->next_to_clean)
6338 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
6340 struct ixgbe_hw *hw = &adapter->hw;
6341 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
6342 u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
6346 if (!adapter->num_vfs)
6349 /* resetting the PF is only needed for MAC before X550 */
6350 if (hw->mac.type >= ixgbe_mac_X550)
6353 for (i = 0; i < adapter->num_vfs; i++) {
6354 for (j = 0; j < q_per_pool; j++) {
6357 h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
6358 t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
6369 * ixgbe_watchdog_flush_tx - flush queues on link down
6370 * @adapter: pointer to the device adapter structure
6372 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6374 if (!netif_carrier_ok(adapter->netdev)) {
6375 if (ixgbe_ring_tx_pending(adapter) ||
6376 ixgbe_vf_tx_pending(adapter)) {
6377 /* We've lost link, so the controller stops DMA,
6378 * but we've got queued Tx work that's never going
6379 * to get done, so reset controller to flush Tx.
6380 * (Do the reset outside of interrupt context).
6382 e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6383 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
6388 #ifdef CONFIG_PCI_IOV
6389 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter *adapter,
6390 struct pci_dev *vfdev)
6392 if (!pci_wait_for_pending_transaction(vfdev))
6393 e_dev_warn("Issuing VFLR with pending transactions\n");
6395 e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev));
6396 pcie_capability_set_word(vfdev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
6401 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6403 struct ixgbe_hw *hw = &adapter->hw;
6404 struct pci_dev *pdev = adapter->pdev;
6405 struct pci_dev *vfdev;
6408 unsigned short vf_id;
6410 if (!(netif_carrier_ok(adapter->netdev)))
6413 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
6414 if (gpc) /* If incrementing then no need for the check below */
6416 /* Check to see if a bad DMA write target from an errant or
6417 * malicious VF has caused a PCIe error. If so then we can
6418 * issue a VFLR to the offending VF(s) and then resume without
6419 * requesting a full slot reset.
6425 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
6429 /* get the device ID for the VF */
6430 pci_read_config_word(pdev, pos + PCI_SRIOV_VF_DID, &vf_id);
6432 /* check status reg for all VFs owned by this PF */
6433 vfdev = pci_get_device(pdev->vendor, vf_id, NULL);
6435 if (vfdev->is_virtfn && (vfdev->physfn == pdev)) {
6438 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
6439 if (status_reg & PCI_STATUS_REC_MASTER_ABORT)
6441 ixgbe_issue_vf_flr(adapter, vfdev);
6444 vfdev = pci_get_device(pdev->vendor, vf_id, vfdev);
6448 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
6452 /* Do not perform spoof check for 82598 or if not in IOV mode */
6453 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
6454 adapter->num_vfs == 0)
6457 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
6460 * ssvpc register is cleared on read, if zero then no
6461 * spoofed packets in the last interval.
6466 e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
6469 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
6474 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
6477 #endif /* CONFIG_PCI_IOV */
6481 * ixgbe_watchdog_subtask - check and bring link up
6482 * @adapter: pointer to the device adapter structure
6484 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
6486 /* if interface is down, removing or resetting, do nothing */
6487 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6488 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6489 test_bit(__IXGBE_RESETTING, &adapter->state))
6492 ixgbe_watchdog_update_link(adapter);
6494 if (adapter->link_up)
6495 ixgbe_watchdog_link_is_up(adapter);
6497 ixgbe_watchdog_link_is_down(adapter);
6499 ixgbe_check_for_bad_vf(adapter);
6500 ixgbe_spoof_check(adapter);
6501 ixgbe_update_stats(adapter);
6503 ixgbe_watchdog_flush_tx(adapter);
6507 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
6508 * @adapter: the ixgbe adapter structure
6510 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
6512 struct ixgbe_hw *hw = &adapter->hw;
6515 /* not searching for SFP so there is nothing to do here */
6516 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
6517 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6520 /* someone else is in init, wait until next service event */
6521 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6524 err = hw->phy.ops.identify_sfp(hw);
6525 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6528 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
6529 /* If no cable is present, then we need to reset
6530 * the next time we find a good cable. */
6531 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
6538 /* exit if reset not needed */
6539 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6542 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
6545 * A module may be identified correctly, but the EEPROM may not have
6546 * support for that module. setup_sfp() will fail in that case, so
6547 * we should not allow that module to load.
6549 if (hw->mac.type == ixgbe_mac_82598EB)
6550 err = hw->phy.ops.reset(hw);
6552 err = hw->mac.ops.setup_sfp(hw);
6554 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6557 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
6558 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
6561 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6563 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
6564 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
6565 e_dev_err("failed to initialize because an unsupported "
6566 "SFP+ module type was detected.\n");
6567 e_dev_err("Reload the driver after installing a "
6568 "supported module.\n");
6569 unregister_netdev(adapter->netdev);
6574 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
6575 * @adapter: the ixgbe adapter structure
6577 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
6579 struct ixgbe_hw *hw = &adapter->hw;
6581 bool autoneg = false;
6583 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
6586 /* someone else is in init, wait until next service event */
6587 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6590 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
6592 speed = hw->phy.autoneg_advertised;
6593 if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
6594 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
6596 /* setup the highest link when no autoneg */
6598 if (speed & IXGBE_LINK_SPEED_10GB_FULL)
6599 speed = IXGBE_LINK_SPEED_10GB_FULL;
6603 if (hw->mac.ops.setup_link)
6604 hw->mac.ops.setup_link(hw, speed, true);
6606 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
6607 adapter->link_check_timeout = jiffies;
6608 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6612 * ixgbe_service_timer - Timer Call-back
6613 * @data: pointer to adapter cast into an unsigned long
6615 static void ixgbe_service_timer(unsigned long data)
6617 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
6618 unsigned long next_event_offset;
6620 /* poll faster when waiting for link */
6621 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
6622 next_event_offset = HZ / 10;
6624 next_event_offset = HZ * 2;
6626 /* Reset the timer */
6627 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
6629 ixgbe_service_event_schedule(adapter);
6632 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
6634 if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
6637 adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
6639 /* If we're already down, removing or resetting, just bail */
6640 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6641 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6642 test_bit(__IXGBE_RESETTING, &adapter->state))
6645 ixgbe_dump(adapter);
6646 netdev_err(adapter->netdev, "Reset adapter\n");
6647 adapter->tx_timeout_count++;
6650 ixgbe_reinit_locked(adapter);
6655 * ixgbe_service_task - manages and runs subtasks
6656 * @work: pointer to work_struct containing our data
6658 static void ixgbe_service_task(struct work_struct *work)
6660 struct ixgbe_adapter *adapter = container_of(work,
6661 struct ixgbe_adapter,
6663 if (ixgbe_removed(adapter->hw.hw_addr)) {
6664 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
6666 ixgbe_down(adapter);
6669 ixgbe_service_event_complete(adapter);
6672 ixgbe_reset_subtask(adapter);
6673 ixgbe_sfp_detection_subtask(adapter);
6674 ixgbe_sfp_link_config_subtask(adapter);
6675 ixgbe_check_overtemp_subtask(adapter);
6676 ixgbe_watchdog_subtask(adapter);
6677 ixgbe_fdir_reinit_subtask(adapter);
6678 ixgbe_check_hang_subtask(adapter);
6680 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
6681 ixgbe_ptp_overflow_check(adapter);
6682 ixgbe_ptp_rx_hang(adapter);
6685 ixgbe_service_event_complete(adapter);
6688 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
6689 struct ixgbe_tx_buffer *first,
6692 struct sk_buff *skb = first->skb;
6693 u32 vlan_macip_lens, type_tucmd;
6694 u32 mss_l4len_idx, l4len;
6697 if (skb->ip_summed != CHECKSUM_PARTIAL)
6700 if (!skb_is_gso(skb))
6703 err = skb_cow_head(skb, 0);
6707 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
6708 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
6710 if (first->protocol == htons(ETH_P_IP)) {
6711 struct iphdr *iph = ip_hdr(skb);
6714 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
6718 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6719 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6720 IXGBE_TX_FLAGS_CSUM |
6721 IXGBE_TX_FLAGS_IPV4;
6722 } else if (skb_is_gso_v6(skb)) {
6723 ipv6_hdr(skb)->payload_len = 0;
6724 tcp_hdr(skb)->check =
6725 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
6726 &ipv6_hdr(skb)->daddr,
6728 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6729 IXGBE_TX_FLAGS_CSUM;
6732 /* compute header lengths */
6733 l4len = tcp_hdrlen(skb);
6734 *hdr_len = skb_transport_offset(skb) + l4len;
6736 /* update gso size and bytecount with header size */
6737 first->gso_segs = skb_shinfo(skb)->gso_segs;
6738 first->bytecount += (first->gso_segs - 1) * *hdr_len;
6740 /* mss_l4len_id: use 0 as index for TSO */
6741 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
6742 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
6744 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
6745 vlan_macip_lens = skb_network_header_len(skb);
6746 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6747 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6749 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
6755 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
6756 struct ixgbe_tx_buffer *first)
6758 struct sk_buff *skb = first->skb;
6759 u32 vlan_macip_lens = 0;
6760 u32 mss_l4len_idx = 0;
6763 if (skb->ip_summed != CHECKSUM_PARTIAL) {
6764 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN) &&
6765 !(first->tx_flags & IXGBE_TX_FLAGS_CC))
6769 switch (first->protocol) {
6770 case htons(ETH_P_IP):
6771 vlan_macip_lens |= skb_network_header_len(skb);
6772 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6773 l4_hdr = ip_hdr(skb)->protocol;
6775 case htons(ETH_P_IPV6):
6776 vlan_macip_lens |= skb_network_header_len(skb);
6777 l4_hdr = ipv6_hdr(skb)->nexthdr;
6780 if (unlikely(net_ratelimit())) {
6781 dev_warn(tx_ring->dev,
6782 "partial checksum but proto=%x!\n",
6790 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
6791 mss_l4len_idx = tcp_hdrlen(skb) <<
6792 IXGBE_ADVTXD_L4LEN_SHIFT;
6795 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
6796 mss_l4len_idx = sizeof(struct sctphdr) <<
6797 IXGBE_ADVTXD_L4LEN_SHIFT;
6800 mss_l4len_idx = sizeof(struct udphdr) <<
6801 IXGBE_ADVTXD_L4LEN_SHIFT;
6804 if (unlikely(net_ratelimit())) {
6805 dev_warn(tx_ring->dev,
6806 "partial checksum but l4 proto=%x!\n",
6812 /* update TX checksum flag */
6813 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
6816 /* vlan_macip_lens: MACLEN, VLAN tag */
6817 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6818 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6820 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
6821 type_tucmd, mss_l4len_idx);
6824 #define IXGBE_SET_FLAG(_input, _flag, _result) \
6825 ((_flag <= _result) ? \
6826 ((u32)(_input & _flag) * (_result / _flag)) : \
6827 ((u32)(_input & _flag) / (_flag / _result)))
6829 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
6831 /* set type for advanced descriptor with frame checksum insertion */
6832 u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
6833 IXGBE_ADVTXD_DCMD_DEXT |
6834 IXGBE_ADVTXD_DCMD_IFCS;
6836 /* set HW vlan bit if vlan is present */
6837 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
6838 IXGBE_ADVTXD_DCMD_VLE);
6840 /* set segmentation enable bits for TSO/FSO */
6841 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
6842 IXGBE_ADVTXD_DCMD_TSE);
6844 /* set timestamp bit if present */
6845 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
6846 IXGBE_ADVTXD_MAC_TSTAMP);
6848 /* insert frame checksum */
6849 cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
6854 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
6855 u32 tx_flags, unsigned int paylen)
6857 u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
6859 /* enable L4 checksum for TSO and TX checksum offload */
6860 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
6861 IXGBE_TX_FLAGS_CSUM,
6862 IXGBE_ADVTXD_POPTS_TXSM);
6864 /* enble IPv4 checksum for TSO */
6865 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
6866 IXGBE_TX_FLAGS_IPV4,
6867 IXGBE_ADVTXD_POPTS_IXSM);
6870 * Check Context must be set if Tx switch is enabled, which it
6871 * always is for case where virtual functions are running
6873 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
6877 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
6880 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6882 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
6884 /* Herbert's original patch had:
6885 * smp_mb__after_netif_stop_queue();
6886 * but since that doesn't exist yet, just open code it.
6890 /* We need to check again in a case another CPU has just
6891 * made room available.
6893 if (likely(ixgbe_desc_unused(tx_ring) < size))
6896 /* A reprieve! - use start_queue because it doesn't call schedule */
6897 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
6898 ++tx_ring->tx_stats.restart_queue;
6902 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6904 if (likely(ixgbe_desc_unused(tx_ring) >= size))
6907 return __ixgbe_maybe_stop_tx(tx_ring, size);
6910 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
6913 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
6914 struct ixgbe_tx_buffer *first,
6917 struct sk_buff *skb = first->skb;
6918 struct ixgbe_tx_buffer *tx_buffer;
6919 union ixgbe_adv_tx_desc *tx_desc;
6920 struct skb_frag_struct *frag;
6922 unsigned int data_len, size;
6923 u32 tx_flags = first->tx_flags;
6924 u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
6925 u16 i = tx_ring->next_to_use;
6927 tx_desc = IXGBE_TX_DESC(tx_ring, i);
6929 ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
6931 size = skb_headlen(skb);
6932 data_len = skb->data_len;
6935 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
6936 if (data_len < sizeof(struct fcoe_crc_eof)) {
6937 size -= sizeof(struct fcoe_crc_eof) - data_len;
6940 data_len -= sizeof(struct fcoe_crc_eof);
6945 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
6949 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
6950 if (dma_mapping_error(tx_ring->dev, dma))
6953 /* record length, and DMA address */
6954 dma_unmap_len_set(tx_buffer, len, size);
6955 dma_unmap_addr_set(tx_buffer, dma, dma);
6957 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6959 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
6960 tx_desc->read.cmd_type_len =
6961 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
6965 if (i == tx_ring->count) {
6966 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6969 tx_desc->read.olinfo_status = 0;
6971 dma += IXGBE_MAX_DATA_PER_TXD;
6972 size -= IXGBE_MAX_DATA_PER_TXD;
6974 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6977 if (likely(!data_len))
6980 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
6984 if (i == tx_ring->count) {
6985 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6988 tx_desc->read.olinfo_status = 0;
6991 size = min_t(unsigned int, data_len, skb_frag_size(frag));
6993 size = skb_frag_size(frag);
6997 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
7000 tx_buffer = &tx_ring->tx_buffer_info[i];
7003 /* write last descriptor with RS and EOP bits */
7004 cmd_type |= size | IXGBE_TXD_CMD;
7005 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
7007 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
7009 /* set the timestamp */
7010 first->time_stamp = jiffies;
7013 * Force memory writes to complete before letting h/w know there
7014 * are new descriptors to fetch. (Only applicable for weak-ordered
7015 * memory model archs, such as IA-64).
7017 * We also need this memory barrier to make certain all of the
7018 * status bits have been updated before next_to_watch is written.
7022 /* set next_to_watch value indicating a packet is present */
7023 first->next_to_watch = tx_desc;
7026 if (i == tx_ring->count)
7029 tx_ring->next_to_use = i;
7031 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7033 if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
7034 writel(i, tx_ring->tail);
7036 /* we need this if more than one processor can write to our tail
7037 * at a time, it synchronizes IO on IA64/Altix systems
7044 dev_err(tx_ring->dev, "TX DMA map failed\n");
7046 /* clear dma mappings for failed tx_buffer_info map */
7048 tx_buffer = &tx_ring->tx_buffer_info[i];
7049 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
7050 if (tx_buffer == first)
7057 tx_ring->next_to_use = i;
7060 static void ixgbe_atr(struct ixgbe_ring *ring,
7061 struct ixgbe_tx_buffer *first)
7063 struct ixgbe_q_vector *q_vector = ring->q_vector;
7064 union ixgbe_atr_hash_dword input = { .dword = 0 };
7065 union ixgbe_atr_hash_dword common = { .dword = 0 };
7067 unsigned char *network;
7069 struct ipv6hdr *ipv6;
7074 /* if ring doesn't have a interrupt vector, cannot perform ATR */
7078 /* do nothing if sampling is disabled */
7079 if (!ring->atr_sample_rate)
7084 /* snag network header to get L4 type and address */
7085 hdr.network = skb_network_header(first->skb);
7087 /* Currently only IPv4/IPv6 with TCP is supported */
7088 if ((first->protocol != htons(ETH_P_IPV6) ||
7089 hdr.ipv6->nexthdr != IPPROTO_TCP) &&
7090 (first->protocol != htons(ETH_P_IP) ||
7091 hdr.ipv4->protocol != IPPROTO_TCP))
7094 th = tcp_hdr(first->skb);
7096 /* skip this packet since it is invalid or the socket is closing */
7100 /* sample on all syn packets or once every atr sample count */
7101 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7104 /* reset sample count */
7105 ring->atr_count = 0;
7107 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7110 * src and dst are inverted, think how the receiver sees them
7112 * The input is broken into two sections, a non-compressed section
7113 * containing vm_pool, vlan_id, and flow_type. The rest of the data
7114 * is XORed together and stored in the compressed dword.
7116 input.formatted.vlan_id = vlan_id;
7119 * since src port and flex bytes occupy the same word XOR them together
7120 * and write the value to source port portion of compressed dword
7122 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7123 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7125 common.port.src ^= th->dest ^ first->protocol;
7126 common.port.dst ^= th->source;
7128 if (first->protocol == htons(ETH_P_IP)) {
7129 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7130 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7132 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7133 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7134 hdr.ipv6->saddr.s6_addr32[1] ^
7135 hdr.ipv6->saddr.s6_addr32[2] ^
7136 hdr.ipv6->saddr.s6_addr32[3] ^
7137 hdr.ipv6->daddr.s6_addr32[0] ^
7138 hdr.ipv6->daddr.s6_addr32[1] ^
7139 hdr.ipv6->daddr.s6_addr32[2] ^
7140 hdr.ipv6->daddr.s6_addr32[3];
7143 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7144 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7145 input, common, ring->queue_index);
7148 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7149 void *accel_priv, select_queue_fallback_t fallback)
7151 struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7153 struct ixgbe_adapter *adapter;
7154 struct ixgbe_ring_feature *f;
7159 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7164 * only execute the code below if protocol is FCoE
7165 * or FIP and we have FCoE enabled on the adapter
7167 switch (vlan_get_protocol(skb)) {
7168 case htons(ETH_P_FCOE):
7169 case htons(ETH_P_FIP):
7170 adapter = netdev_priv(dev);
7172 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7175 return fallback(dev, skb);
7178 f = &adapter->ring_feature[RING_F_FCOE];
7180 txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7183 while (txq >= f->indices)
7186 return txq + f->offset;
7188 return fallback(dev, skb);
7192 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
7193 struct ixgbe_adapter *adapter,
7194 struct ixgbe_ring *tx_ring)
7196 struct ixgbe_tx_buffer *first;
7200 u16 count = TXD_USE_COUNT(skb_headlen(skb));
7201 __be16 protocol = skb->protocol;
7205 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7206 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7207 * + 2 desc gap to keep tail from touching head,
7208 * + 1 desc for context descriptor,
7209 * otherwise try next time
7211 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7212 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7214 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7215 tx_ring->tx_stats.tx_busy++;
7216 return NETDEV_TX_BUSY;
7219 /* record the location of the first descriptor for this packet */
7220 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7222 first->bytecount = skb->len;
7223 first->gso_segs = 1;
7225 /* if we have a HW VLAN tag being added default to the HW one */
7226 if (vlan_tx_tag_present(skb)) {
7227 tx_flags |= vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7228 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7229 /* else if it is a SW VLAN check the next protocol and store the tag */
7230 } else if (protocol == htons(ETH_P_8021Q)) {
7231 struct vlan_hdr *vhdr, _vhdr;
7232 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7236 protocol = vhdr->h_vlan_encapsulated_proto;
7237 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7238 IXGBE_TX_FLAGS_VLAN_SHIFT;
7239 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7242 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
7243 adapter->ptp_clock &&
7244 !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7246 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7247 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7249 /* schedule check for Tx timestamp */
7250 adapter->ptp_tx_skb = skb_get(skb);
7251 adapter->ptp_tx_start = jiffies;
7252 schedule_work(&adapter->ptp_tx_work);
7255 skb_tx_timestamp(skb);
7257 #ifdef CONFIG_PCI_IOV
7259 * Use the l2switch_enable flag - would be false if the DMA
7260 * Tx switch had been disabled.
7262 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7263 tx_flags |= IXGBE_TX_FLAGS_CC;
7266 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7267 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7268 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7269 (skb->priority != TC_PRIO_CONTROL))) {
7270 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7271 tx_flags |= (skb->priority & 0x7) <<
7272 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7273 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7274 struct vlan_ethhdr *vhdr;
7276 if (skb_cow_head(skb, 0))
7278 vhdr = (struct vlan_ethhdr *)skb->data;
7279 vhdr->h_vlan_TCI = htons(tx_flags >>
7280 IXGBE_TX_FLAGS_VLAN_SHIFT);
7282 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7286 /* record initial flags and protocol */
7287 first->tx_flags = tx_flags;
7288 first->protocol = protocol;
7291 /* setup tx offload for FCoE */
7292 if ((protocol == htons(ETH_P_FCOE)) &&
7293 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7294 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7301 #endif /* IXGBE_FCOE */
7302 tso = ixgbe_tso(tx_ring, first, &hdr_len);
7306 ixgbe_tx_csum(tx_ring, first);
7308 /* add the ATR filter if ATR is on */
7309 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
7310 ixgbe_atr(tx_ring, first);
7314 #endif /* IXGBE_FCOE */
7315 ixgbe_tx_map(tx_ring, first, hdr_len);
7317 return NETDEV_TX_OK;
7320 dev_kfree_skb_any(first->skb);
7323 return NETDEV_TX_OK;
7326 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
7327 struct net_device *netdev,
7328 struct ixgbe_ring *ring)
7330 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7331 struct ixgbe_ring *tx_ring;
7334 * The minimum packet size for olinfo paylen is 17 so pad the skb
7335 * in order to meet this minimum size requirement.
7337 if (unlikely(skb->len < 17)) {
7338 if (skb_pad(skb, 17 - skb->len))
7339 return NETDEV_TX_OK;
7341 skb_set_tail_pointer(skb, 17);
7344 tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
7346 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
7349 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
7350 struct net_device *netdev)
7352 return __ixgbe_xmit_frame(skb, netdev, NULL);
7356 * ixgbe_set_mac - Change the Ethernet Address of the NIC
7357 * @netdev: network interface device structure
7358 * @p: pointer to an address structure
7360 * Returns 0 on success, negative on failure
7362 static int ixgbe_set_mac(struct net_device *netdev, void *p)
7364 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7365 struct ixgbe_hw *hw = &adapter->hw;
7366 struct sockaddr *addr = p;
7369 if (!is_valid_ether_addr(addr->sa_data))
7370 return -EADDRNOTAVAIL;
7372 ixgbe_del_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7373 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
7374 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
7376 ret = ixgbe_add_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7377 return ret > 0 ? 0 : ret;
7381 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
7383 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7384 struct ixgbe_hw *hw = &adapter->hw;
7388 if (prtad != hw->phy.mdio.prtad)
7390 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
7396 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
7397 u16 addr, u16 value)
7399 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7400 struct ixgbe_hw *hw = &adapter->hw;
7402 if (prtad != hw->phy.mdio.prtad)
7404 return hw->phy.ops.write_reg(hw, addr, devad, value);
7407 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
7409 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7413 return ixgbe_ptp_set_ts_config(adapter, req);
7415 return ixgbe_ptp_get_ts_config(adapter, req);
7417 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
7422 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
7424 * @netdev: network interface device structure
7426 * Returns non-zero on failure
7428 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
7431 struct ixgbe_adapter *adapter = netdev_priv(dev);
7432 struct ixgbe_hw *hw = &adapter->hw;
7434 if (is_valid_ether_addr(hw->mac.san_addr)) {
7436 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
7439 /* update SAN MAC vmdq pool selection */
7440 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
7446 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
7448 * @netdev: network interface device structure
7450 * Returns non-zero on failure
7452 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
7455 struct ixgbe_adapter *adapter = netdev_priv(dev);
7456 struct ixgbe_mac_info *mac = &adapter->hw.mac;
7458 if (is_valid_ether_addr(mac->san_addr)) {
7460 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
7466 #ifdef CONFIG_NET_POLL_CONTROLLER
7468 * Polling 'interrupt' - used by things like netconsole to send skbs
7469 * without having to re-enable interrupts. It's not called while
7470 * the interrupt routine is executing.
7472 static void ixgbe_netpoll(struct net_device *netdev)
7474 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7477 /* if interface is down do nothing */
7478 if (test_bit(__IXGBE_DOWN, &adapter->state))
7481 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
7482 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
7483 for (i = 0; i < adapter->num_q_vectors; i++)
7484 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
7486 ixgbe_intr(adapter->pdev->irq, netdev);
7488 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
7492 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
7493 struct rtnl_link_stats64 *stats)
7495 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7499 for (i = 0; i < adapter->num_rx_queues; i++) {
7500 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
7506 start = u64_stats_fetch_begin_irq(&ring->syncp);
7507 packets = ring->stats.packets;
7508 bytes = ring->stats.bytes;
7509 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7510 stats->rx_packets += packets;
7511 stats->rx_bytes += bytes;
7515 for (i = 0; i < adapter->num_tx_queues; i++) {
7516 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
7522 start = u64_stats_fetch_begin_irq(&ring->syncp);
7523 packets = ring->stats.packets;
7524 bytes = ring->stats.bytes;
7525 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7526 stats->tx_packets += packets;
7527 stats->tx_bytes += bytes;
7531 /* following stats updated by ixgbe_watchdog_task() */
7532 stats->multicast = netdev->stats.multicast;
7533 stats->rx_errors = netdev->stats.rx_errors;
7534 stats->rx_length_errors = netdev->stats.rx_length_errors;
7535 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
7536 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
7540 #ifdef CONFIG_IXGBE_DCB
7542 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
7543 * @adapter: pointer to ixgbe_adapter
7544 * @tc: number of traffic classes currently enabled
7546 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
7547 * 802.1Q priority maps to a packet buffer that exists.
7549 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
7551 struct ixgbe_hw *hw = &adapter->hw;
7555 /* 82598 have a static priority to TC mapping that can not
7556 * be changed so no validation is needed.
7558 if (hw->mac.type == ixgbe_mac_82598EB)
7561 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
7564 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
7565 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
7567 /* If up2tc is out of bounds default to zero */
7569 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
7573 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
7579 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
7580 * @adapter: Pointer to adapter struct
7582 * Populate the netdev user priority to tc map
7584 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
7586 struct net_device *dev = adapter->netdev;
7587 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
7588 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
7591 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
7594 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
7595 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
7597 tc = ets->prio_tc[prio];
7599 netdev_set_prio_tc_map(dev, prio, tc);
7603 #endif /* CONFIG_IXGBE_DCB */
7605 * ixgbe_setup_tc - configure net_device for multiple traffic classes
7607 * @netdev: net device to configure
7608 * @tc: number of traffic classes to enable
7610 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
7612 struct ixgbe_adapter *adapter = netdev_priv(dev);
7613 struct ixgbe_hw *hw = &adapter->hw;
7616 /* Hardware supports up to 8 traffic classes */
7617 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs ||
7618 (hw->mac.type == ixgbe_mac_82598EB &&
7619 tc < MAX_TRAFFIC_CLASS))
7622 pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
7623 if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
7626 /* Hardware has to reinitialize queues and interrupts to
7627 * match packet buffer alignment. Unfortunately, the
7628 * hardware is not flexible enough to do this dynamically.
7630 if (netif_running(dev))
7632 ixgbe_clear_interrupt_scheme(adapter);
7634 #ifdef CONFIG_IXGBE_DCB
7636 netdev_set_num_tc(dev, tc);
7637 ixgbe_set_prio_tc_map(adapter);
7639 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
7641 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
7642 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
7643 adapter->hw.fc.requested_mode = ixgbe_fc_none;
7646 netdev_reset_tc(dev);
7648 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
7649 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
7651 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
7653 adapter->temp_dcb_cfg.pfc_mode_enable = false;
7654 adapter->dcb_cfg.pfc_mode_enable = false;
7657 ixgbe_validate_rtr(adapter, tc);
7659 #endif /* CONFIG_IXGBE_DCB */
7660 ixgbe_init_interrupt_scheme(adapter);
7662 if (netif_running(dev))
7663 return ixgbe_open(dev);
7668 #ifdef CONFIG_PCI_IOV
7669 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
7671 struct net_device *netdev = adapter->netdev;
7674 ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
7679 void ixgbe_do_reset(struct net_device *netdev)
7681 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7683 if (netif_running(netdev))
7684 ixgbe_reinit_locked(adapter);
7686 ixgbe_reset(adapter);
7689 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
7690 netdev_features_t features)
7692 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7694 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
7695 if (!(features & NETIF_F_RXCSUM))
7696 features &= ~NETIF_F_LRO;
7698 /* Turn off LRO if not RSC capable */
7699 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
7700 features &= ~NETIF_F_LRO;
7705 static int ixgbe_set_features(struct net_device *netdev,
7706 netdev_features_t features)
7708 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7709 netdev_features_t changed = netdev->features ^ features;
7710 bool need_reset = false;
7712 /* Make sure RSC matches LRO, reset if change */
7713 if (!(features & NETIF_F_LRO)) {
7714 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
7716 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
7717 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
7718 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
7719 if (adapter->rx_itr_setting == 1 ||
7720 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
7721 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
7723 } else if ((changed ^ features) & NETIF_F_LRO) {
7724 e_info(probe, "rx-usecs set too low, "
7730 * Check if Flow Director n-tuple support was enabled or disabled. If
7731 * the state changed, we need to reset.
7733 switch (features & NETIF_F_NTUPLE) {
7734 case NETIF_F_NTUPLE:
7735 /* turn off ATR, enable perfect filters and reset */
7736 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
7739 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
7740 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
7743 /* turn off perfect filters, enable ATR and reset */
7744 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
7747 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
7749 /* We cannot enable ATR if SR-IOV is enabled */
7750 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7753 /* We cannot enable ATR if we have 2 or more traffic classes */
7754 if (netdev_get_num_tc(netdev) > 1)
7757 /* We cannot enable ATR if RSS is disabled */
7758 if (adapter->ring_feature[RING_F_RSS].limit <= 1)
7761 /* A sample rate of 0 indicates ATR disabled */
7762 if (!adapter->atr_sample_rate)
7765 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
7769 if (features & NETIF_F_HW_VLAN_CTAG_RX)
7770 ixgbe_vlan_strip_enable(adapter);
7772 ixgbe_vlan_strip_disable(adapter);
7774 if (changed & NETIF_F_RXALL)
7777 netdev->features = features;
7779 ixgbe_do_reset(netdev);
7784 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
7785 struct net_device *dev,
7786 const unsigned char *addr, u16 vid,
7789 /* guarantee we can provide a unique filter for the unicast address */
7790 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
7791 if (IXGBE_MAX_PF_MACVLANS <= netdev_uc_count(dev))
7795 return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
7798 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
7799 struct nlmsghdr *nlh)
7801 struct ixgbe_adapter *adapter = netdev_priv(dev);
7802 struct nlattr *attr, *br_spec;
7805 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
7808 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
7812 nla_for_each_nested(attr, br_spec, rem) {
7816 if (nla_type(attr) != IFLA_BRIDGE_MODE)
7819 if (nla_len(attr) < sizeof(mode))
7822 mode = nla_get_u16(attr);
7823 if (mode == BRIDGE_MODE_VEPA) {
7825 adapter->flags2 &= ~IXGBE_FLAG2_BRIDGE_MODE_VEB;
7826 } else if (mode == BRIDGE_MODE_VEB) {
7827 reg = IXGBE_PFDTXGSWC_VT_LBEN;
7828 adapter->flags2 |= IXGBE_FLAG2_BRIDGE_MODE_VEB;
7832 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, reg);
7834 e_info(drv, "enabling bridge mode: %s\n",
7835 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
7841 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
7842 struct net_device *dev,
7845 struct ixgbe_adapter *adapter = netdev_priv(dev);
7848 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
7851 if (adapter->flags2 & IXGBE_FLAG2_BRIDGE_MODE_VEB)
7852 mode = BRIDGE_MODE_VEB;
7854 mode = BRIDGE_MODE_VEPA;
7856 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0);
7859 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
7861 struct ixgbe_fwd_adapter *fwd_adapter = NULL;
7862 struct ixgbe_adapter *adapter = netdev_priv(pdev);
7863 int used_pools = adapter->num_vfs + adapter->num_rx_pools;
7867 /* Hardware has a limited number of available pools. Each VF, and the
7868 * PF require a pool. Check to ensure we don't attempt to use more
7869 * then the available number of pools.
7871 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
7872 return ERR_PTR(-EINVAL);
7875 if (vdev->num_rx_queues != vdev->num_tx_queues) {
7876 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
7878 return ERR_PTR(-EINVAL);
7881 /* Check for hardware restriction on number of rx/tx queues */
7882 if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
7883 vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
7885 "%s: Supports RX/TX Queue counts 1,2, and 4\n",
7887 return ERR_PTR(-EINVAL);
7890 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7891 adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
7892 (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
7893 return ERR_PTR(-EBUSY);
7895 fwd_adapter = kcalloc(1, sizeof(struct ixgbe_fwd_adapter), GFP_KERNEL);
7897 return ERR_PTR(-ENOMEM);
7899 pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
7900 adapter->num_rx_pools++;
7901 set_bit(pool, &adapter->fwd_bitmask);
7902 limit = find_last_bit(&adapter->fwd_bitmask, 32);
7904 /* Enable VMDq flag so device will be set in VM mode */
7905 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
7906 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
7907 adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
7909 /* Force reinit of ring allocation with VMDQ enabled */
7910 err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
7913 fwd_adapter->pool = pool;
7914 fwd_adapter->real_adapter = adapter;
7915 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
7918 netif_tx_start_all_queues(vdev);
7921 /* unwind counter and free adapter struct */
7923 "%s: dfwd hardware acceleration failed\n", vdev->name);
7924 clear_bit(pool, &adapter->fwd_bitmask);
7925 adapter->num_rx_pools--;
7927 return ERR_PTR(err);
7930 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
7932 struct ixgbe_fwd_adapter *fwd_adapter = priv;
7933 struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
7936 clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
7937 adapter->num_rx_pools--;
7939 limit = find_last_bit(&adapter->fwd_bitmask, 32);
7940 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
7941 ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
7942 ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
7943 netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
7944 fwd_adapter->pool, adapter->num_rx_pools,
7945 fwd_adapter->rx_base_queue,
7946 fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
7947 adapter->fwd_bitmask);
7951 static const struct net_device_ops ixgbe_netdev_ops = {
7952 .ndo_open = ixgbe_open,
7953 .ndo_stop = ixgbe_close,
7954 .ndo_start_xmit = ixgbe_xmit_frame,
7955 .ndo_select_queue = ixgbe_select_queue,
7956 .ndo_set_rx_mode = ixgbe_set_rx_mode,
7957 .ndo_validate_addr = eth_validate_addr,
7958 .ndo_set_mac_address = ixgbe_set_mac,
7959 .ndo_change_mtu = ixgbe_change_mtu,
7960 .ndo_tx_timeout = ixgbe_tx_timeout,
7961 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
7962 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
7963 .ndo_do_ioctl = ixgbe_ioctl,
7964 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
7965 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
7966 .ndo_set_vf_rate = ixgbe_ndo_set_vf_bw,
7967 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
7968 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
7969 .ndo_get_stats64 = ixgbe_get_stats64,
7970 #ifdef CONFIG_IXGBE_DCB
7971 .ndo_setup_tc = ixgbe_setup_tc,
7973 #ifdef CONFIG_NET_POLL_CONTROLLER
7974 .ndo_poll_controller = ixgbe_netpoll,
7976 #ifdef CONFIG_NET_RX_BUSY_POLL
7977 .ndo_busy_poll = ixgbe_low_latency_recv,
7980 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
7981 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
7982 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
7983 .ndo_fcoe_enable = ixgbe_fcoe_enable,
7984 .ndo_fcoe_disable = ixgbe_fcoe_disable,
7985 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
7986 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
7987 #endif /* IXGBE_FCOE */
7988 .ndo_set_features = ixgbe_set_features,
7989 .ndo_fix_features = ixgbe_fix_features,
7990 .ndo_fdb_add = ixgbe_ndo_fdb_add,
7991 .ndo_bridge_setlink = ixgbe_ndo_bridge_setlink,
7992 .ndo_bridge_getlink = ixgbe_ndo_bridge_getlink,
7993 .ndo_dfwd_add_station = ixgbe_fwd_add,
7994 .ndo_dfwd_del_station = ixgbe_fwd_del,
7998 * ixgbe_enumerate_functions - Get the number of ports this device has
7999 * @adapter: adapter structure
8001 * This function enumerates the phsyical functions co-located on a single slot,
8002 * in order to determine how many ports a device has. This is most useful in
8003 * determining the required GT/s of PCIe bandwidth necessary for optimal
8006 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
8008 struct pci_dev *entry, *pdev = adapter->pdev;
8011 /* Some cards can not use the generic count PCIe functions method,
8012 * because they are behind a parent switch, so we hardcode these with
8013 * the correct number of functions.
8015 if (ixgbe_pcie_from_parent(&adapter->hw))
8018 list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
8019 /* don't count virtual functions */
8020 if (entry->is_virtfn)
8023 /* When the devices on the bus don't all match our device ID,
8024 * we can't reliably determine the correct number of
8025 * functions. This can occur if a function has been direct
8026 * attached to a virtual machine using VT-d, for example. In
8027 * this case, simply return -1 to indicate this.
8029 if ((entry->vendor != pdev->vendor) ||
8030 (entry->device != pdev->device))
8040 * ixgbe_wol_supported - Check whether device supports WoL
8041 * @hw: hw specific details
8042 * @device_id: the device ID
8043 * @subdev_id: the subsystem device ID
8045 * This function is used by probe and ethtool to determine
8046 * which devices have WoL support
8049 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
8052 struct ixgbe_hw *hw = &adapter->hw;
8053 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
8054 int is_wol_supported = 0;
8056 switch (device_id) {
8057 case IXGBE_DEV_ID_82599_SFP:
8058 /* Only these subdevices could supports WOL */
8059 switch (subdevice_id) {
8060 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
8061 case IXGBE_SUBDEV_ID_82599_560FLR:
8062 /* only support first port */
8063 if (hw->bus.func != 0)
8065 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
8066 case IXGBE_SUBDEV_ID_82599_SFP:
8067 case IXGBE_SUBDEV_ID_82599_RNDC:
8068 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
8069 case IXGBE_SUBDEV_ID_82599_LOM_SFP:
8070 is_wol_supported = 1;
8074 case IXGBE_DEV_ID_82599EN_SFP:
8075 /* Only this subdevice supports WOL */
8076 switch (subdevice_id) {
8077 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
8078 is_wol_supported = 1;
8082 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
8083 /* All except this subdevice support WOL */
8084 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
8085 is_wol_supported = 1;
8087 case IXGBE_DEV_ID_82599_KX4:
8088 is_wol_supported = 1;
8090 case IXGBE_DEV_ID_X540T:
8091 case IXGBE_DEV_ID_X540T1:
8092 /* check eeprom to see if enabled wol */
8093 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
8094 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
8095 (hw->bus.func == 0))) {
8096 is_wol_supported = 1;
8101 return is_wol_supported;
8105 * ixgbe_get_platform_mac_addr - Look up MAC address in Open Firmware / IDPROM
8106 * @adapter: Pointer to adapter struct
8108 static void ixgbe_get_platform_mac_addr(struct ixgbe_adapter *adapter)
8111 struct device_node *dp = pci_device_to_OF_node(adapter->pdev);
8112 struct ixgbe_hw *hw = &adapter->hw;
8113 const unsigned char *addr;
8115 addr = of_get_mac_address(dp);
8117 ether_addr_copy(hw->mac.perm_addr, addr);
8120 #endif /* CONFIG_OF */
8123 ether_addr_copy(hw->mac.perm_addr, idprom->id_ethaddr);
8124 #endif /* CONFIG_SPARC */
8128 * ixgbe_probe - Device Initialization Routine
8129 * @pdev: PCI device information struct
8130 * @ent: entry in ixgbe_pci_tbl
8132 * Returns 0 on success, negative on failure
8134 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
8135 * The OS initialization, configuring of the adapter private structure,
8136 * and a hardware reset occur.
8138 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8140 struct net_device *netdev;
8141 struct ixgbe_adapter *adapter = NULL;
8142 struct ixgbe_hw *hw;
8143 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
8144 int i, err, pci_using_dac, expected_gts;
8145 unsigned int indices = MAX_TX_QUEUES;
8146 u8 part_str[IXGBE_PBANUM_LENGTH];
8147 bool disable_dev = false;
8153 /* Catch broken hardware that put the wrong VF device ID in
8154 * the PCIe SR-IOV capability.
8156 if (pdev->is_virtfn) {
8157 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
8158 pci_name(pdev), pdev->vendor, pdev->device);
8162 err = pci_enable_device_mem(pdev);
8166 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
8169 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8172 "No usable DMA configuration, aborting\n");
8178 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8179 IORESOURCE_MEM), ixgbe_driver_name);
8182 "pci_request_selected_regions failed 0x%x\n", err);
8186 pci_enable_pcie_error_reporting(pdev);
8188 pci_set_master(pdev);
8189 pci_save_state(pdev);
8191 if (ii->mac == ixgbe_mac_82598EB) {
8192 #ifdef CONFIG_IXGBE_DCB
8193 /* 8 TC w/ 4 queues per TC */
8194 indices = 4 * MAX_TRAFFIC_CLASS;
8196 indices = IXGBE_MAX_RSS_INDICES;
8200 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
8203 goto err_alloc_etherdev;
8206 SET_NETDEV_DEV(netdev, &pdev->dev);
8208 adapter = netdev_priv(netdev);
8209 pci_set_drvdata(pdev, adapter);
8211 adapter->netdev = netdev;
8212 adapter->pdev = pdev;
8215 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
8217 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8218 pci_resource_len(pdev, 0));
8219 adapter->io_addr = hw->hw_addr;
8225 netdev->netdev_ops = &ixgbe_netdev_ops;
8226 ixgbe_set_ethtool_ops(netdev);
8227 netdev->watchdog_timeo = 5 * HZ;
8228 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
8231 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
8232 hw->mac.type = ii->mac;
8235 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
8236 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
8237 if (ixgbe_removed(hw->hw_addr)) {
8241 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
8242 if (!(eec & (1 << 8)))
8243 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
8246 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
8247 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
8248 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
8249 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
8250 hw->phy.mdio.mmds = 0;
8251 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
8252 hw->phy.mdio.dev = netdev;
8253 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
8254 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
8256 ii->get_invariants(hw);
8258 /* setup the private structure */
8259 err = ixgbe_sw_init(adapter);
8263 /* Make it possible the adapter to be woken up via WOL */
8264 switch (adapter->hw.mac.type) {
8265 case ixgbe_mac_82599EB:
8266 case ixgbe_mac_X540:
8267 case ixgbe_mac_X550:
8268 case ixgbe_mac_X550EM_x:
8269 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8276 * If there is a fan on this device and it has failed log the
8279 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
8280 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
8281 if (esdp & IXGBE_ESDP_SDP1)
8282 e_crit(probe, "Fan has stopped, replace the adapter\n");
8285 if (allow_unsupported_sfp)
8286 hw->allow_unsupported_sfp = allow_unsupported_sfp;
8288 /* reset_hw fills in the perm_addr as well */
8289 hw->phy.reset_if_overtemp = true;
8290 err = hw->mac.ops.reset_hw(hw);
8291 hw->phy.reset_if_overtemp = false;
8292 if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
8293 hw->mac.type == ixgbe_mac_82598EB) {
8295 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
8296 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
8297 e_dev_err("Reload the driver after installing a supported module.\n");
8300 e_dev_err("HW Init failed: %d\n", err);
8304 #ifdef CONFIG_PCI_IOV
8305 /* SR-IOV not supported on the 82598 */
8306 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8309 ixgbe_init_mbx_params_pf(hw);
8310 memcpy(&hw->mbx.ops, ii->mbx_ops, sizeof(hw->mbx.ops));
8311 pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
8312 ixgbe_enable_sriov(adapter);
8316 netdev->features = NETIF_F_SG |
8319 NETIF_F_HW_VLAN_CTAG_TX |
8320 NETIF_F_HW_VLAN_CTAG_RX |
8321 NETIF_F_HW_VLAN_CTAG_FILTER |
8327 netdev->hw_features = netdev->features | NETIF_F_HW_L2FW_DOFFLOAD;
8329 switch (adapter->hw.mac.type) {
8330 case ixgbe_mac_82599EB:
8331 case ixgbe_mac_X540:
8332 case ixgbe_mac_X550:
8333 case ixgbe_mac_X550EM_x:
8334 netdev->features |= NETIF_F_SCTP_CSUM;
8335 netdev->hw_features |= NETIF_F_SCTP_CSUM |
8342 netdev->hw_features |= NETIF_F_RXALL;
8344 netdev->vlan_features |= NETIF_F_TSO;
8345 netdev->vlan_features |= NETIF_F_TSO6;
8346 netdev->vlan_features |= NETIF_F_IP_CSUM;
8347 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
8348 netdev->vlan_features |= NETIF_F_SG;
8350 netdev->priv_flags |= IFF_UNICAST_FLT;
8351 netdev->priv_flags |= IFF_SUPP_NOFCS;
8353 #ifdef CONFIG_IXGBE_DCB
8354 netdev->dcbnl_ops = &dcbnl_ops;
8358 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
8359 unsigned int fcoe_l;
8361 if (hw->mac.ops.get_device_caps) {
8362 hw->mac.ops.get_device_caps(hw, &device_caps);
8363 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
8364 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
8368 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
8369 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
8371 netdev->features |= NETIF_F_FSO |
8374 netdev->vlan_features |= NETIF_F_FSO |
8378 #endif /* IXGBE_FCOE */
8379 if (pci_using_dac) {
8380 netdev->features |= NETIF_F_HIGHDMA;
8381 netdev->vlan_features |= NETIF_F_HIGHDMA;
8384 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
8385 netdev->hw_features |= NETIF_F_LRO;
8386 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8387 netdev->features |= NETIF_F_LRO;
8389 /* make sure the EEPROM is good */
8390 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
8391 e_dev_err("The EEPROM Checksum Is Not Valid\n");
8396 ixgbe_get_platform_mac_addr(adapter);
8398 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
8400 if (!is_valid_ether_addr(netdev->dev_addr)) {
8401 e_dev_err("invalid MAC address\n");
8406 ixgbe_mac_set_default_filter(adapter, hw->mac.perm_addr);
8408 setup_timer(&adapter->service_timer, &ixgbe_service_timer,
8409 (unsigned long) adapter);
8411 if (ixgbe_removed(hw->hw_addr)) {
8415 INIT_WORK(&adapter->service_task, ixgbe_service_task);
8416 set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
8417 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
8419 err = ixgbe_init_interrupt_scheme(adapter);
8423 /* WOL not supported for all devices */
8425 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
8426 hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
8427 pdev->subsystem_device);
8428 if (hw->wol_enabled)
8429 adapter->wol = IXGBE_WUFC_MAG;
8431 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
8433 /* save off EEPROM version number */
8434 hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
8435 hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
8437 /* pick up the PCI bus settings for reporting later */
8438 hw->mac.ops.get_bus_info(hw);
8439 if (ixgbe_pcie_from_parent(hw))
8440 ixgbe_get_parent_bus_info(adapter);
8442 /* calculate the expected PCIe bandwidth required for optimal
8443 * performance. Note that some older parts will never have enough
8444 * bandwidth due to being older generation PCIe parts. We clamp these
8445 * parts to ensure no warning is displayed if it can't be fixed.
8447 switch (hw->mac.type) {
8448 case ixgbe_mac_82598EB:
8449 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
8452 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
8456 /* don't check link if we failed to enumerate functions */
8457 if (expected_gts > 0)
8458 ixgbe_check_minimum_link(adapter, expected_gts);
8460 err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
8462 strlcpy(part_str, "Unknown", sizeof(part_str));
8463 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
8464 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
8465 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
8468 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
8469 hw->mac.type, hw->phy.type, part_str);
8471 e_dev_info("%pM\n", netdev->dev_addr);
8473 /* reset the hardware with the new settings */
8474 err = hw->mac.ops.start_hw(hw);
8475 if (err == IXGBE_ERR_EEPROM_VERSION) {
8476 /* We are running on a pre-production device, log a warning */
8477 e_dev_warn("This device is a pre-production adapter/LOM. "
8478 "Please be aware there may be issues associated "
8479 "with your hardware. If you are experiencing "
8480 "problems please contact your Intel or hardware "
8481 "representative who provided you with this "
8484 strcpy(netdev->name, "eth%d");
8485 err = register_netdev(netdev);
8489 /* power down the optics for 82599 SFP+ fiber */
8490 if (hw->mac.ops.disable_tx_laser)
8491 hw->mac.ops.disable_tx_laser(hw);
8493 /* carrier off reporting is important to ethtool even BEFORE open */
8494 netif_carrier_off(netdev);
8496 #ifdef CONFIG_IXGBE_DCA
8497 if (dca_add_requester(&pdev->dev) == 0) {
8498 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
8499 ixgbe_setup_dca(adapter);
8502 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
8503 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
8504 for (i = 0; i < adapter->num_vfs; i++)
8505 ixgbe_vf_configuration(pdev, (i | 0x10000000));
8508 /* firmware requires driver version to be 0xFFFFFFFF
8509 * since os does not support feature
8511 if (hw->mac.ops.set_fw_drv_ver)
8512 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
8515 /* add san mac addr to netdev */
8516 ixgbe_add_sanmac_netdev(netdev);
8518 e_dev_info("%s\n", ixgbe_default_device_descr);
8520 #ifdef CONFIG_IXGBE_HWMON
8521 if (ixgbe_sysfs_init(adapter))
8522 e_err(probe, "failed to allocate sysfs resources\n");
8523 #endif /* CONFIG_IXGBE_HWMON */
8525 ixgbe_dbg_adapter_init(adapter);
8527 /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
8528 if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
8529 hw->mac.ops.setup_link(hw,
8530 IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
8536 ixgbe_release_hw_control(adapter);
8537 ixgbe_clear_interrupt_scheme(adapter);
8539 ixgbe_disable_sriov(adapter);
8540 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
8541 iounmap(adapter->io_addr);
8542 kfree(adapter->mac_table);
8544 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
8545 free_netdev(netdev);
8547 pci_release_selected_regions(pdev,
8548 pci_select_bars(pdev, IORESOURCE_MEM));
8551 if (!adapter || disable_dev)
8552 pci_disable_device(pdev);
8557 * ixgbe_remove - Device Removal Routine
8558 * @pdev: PCI device information struct
8560 * ixgbe_remove is called by the PCI subsystem to alert the driver
8561 * that it should release a PCI device. The could be caused by a
8562 * Hot-Plug event, or because the driver is going to be removed from
8565 static void ixgbe_remove(struct pci_dev *pdev)
8567 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8568 struct net_device *netdev = adapter->netdev;
8571 ixgbe_dbg_adapter_exit(adapter);
8573 set_bit(__IXGBE_REMOVING, &adapter->state);
8574 cancel_work_sync(&adapter->service_task);
8577 #ifdef CONFIG_IXGBE_DCA
8578 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
8579 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
8580 dca_remove_requester(&pdev->dev);
8581 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
8585 #ifdef CONFIG_IXGBE_HWMON
8586 ixgbe_sysfs_exit(adapter);
8587 #endif /* CONFIG_IXGBE_HWMON */
8589 /* remove the added san mac */
8590 ixgbe_del_sanmac_netdev(netdev);
8592 if (netdev->reg_state == NETREG_REGISTERED)
8593 unregister_netdev(netdev);
8595 #ifdef CONFIG_PCI_IOV
8597 * Only disable SR-IOV on unload if the user specified the now
8598 * deprecated max_vfs module parameter.
8601 ixgbe_disable_sriov(adapter);
8603 ixgbe_clear_interrupt_scheme(adapter);
8605 ixgbe_release_hw_control(adapter);
8608 kfree(adapter->ixgbe_ieee_pfc);
8609 kfree(adapter->ixgbe_ieee_ets);
8612 iounmap(adapter->io_addr);
8613 pci_release_selected_regions(pdev, pci_select_bars(pdev,
8616 e_dev_info("complete\n");
8618 kfree(adapter->mac_table);
8619 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
8620 free_netdev(netdev);
8622 pci_disable_pcie_error_reporting(pdev);
8625 pci_disable_device(pdev);
8629 * ixgbe_io_error_detected - called when PCI error is detected
8630 * @pdev: Pointer to PCI device
8631 * @state: The current pci connection state
8633 * This function is called after a PCI bus error affecting
8634 * this device has been detected.
8636 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
8637 pci_channel_state_t state)
8639 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8640 struct net_device *netdev = adapter->netdev;
8642 #ifdef CONFIG_PCI_IOV
8643 struct ixgbe_hw *hw = &adapter->hw;
8644 struct pci_dev *bdev, *vfdev;
8645 u32 dw0, dw1, dw2, dw3;
8647 u16 req_id, pf_func;
8649 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
8650 adapter->num_vfs == 0)
8651 goto skip_bad_vf_detection;
8653 bdev = pdev->bus->self;
8654 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
8655 bdev = bdev->bus->self;
8658 goto skip_bad_vf_detection;
8660 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
8662 goto skip_bad_vf_detection;
8664 dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
8665 dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
8666 dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
8667 dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
8668 if (ixgbe_removed(hw->hw_addr))
8669 goto skip_bad_vf_detection;
8672 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
8673 if (!(req_id & 0x0080))
8674 goto skip_bad_vf_detection;
8676 pf_func = req_id & 0x01;
8677 if ((pf_func & 1) == (pdev->devfn & 1)) {
8678 unsigned int device_id;
8680 vf = (req_id & 0x7F) >> 1;
8681 e_dev_err("VF %d has caused a PCIe error\n", vf);
8682 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
8683 "%8.8x\tdw3: %8.8x\n",
8684 dw0, dw1, dw2, dw3);
8685 switch (adapter->hw.mac.type) {
8686 case ixgbe_mac_82599EB:
8687 device_id = IXGBE_82599_VF_DEVICE_ID;
8689 case ixgbe_mac_X540:
8690 device_id = IXGBE_X540_VF_DEVICE_ID;
8692 case ixgbe_mac_X550:
8693 device_id = IXGBE_DEV_ID_X550_VF;
8695 case ixgbe_mac_X550EM_x:
8696 device_id = IXGBE_DEV_ID_X550EM_X_VF;
8703 /* Find the pci device of the offending VF */
8704 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
8706 if (vfdev->devfn == (req_id & 0xFF))
8708 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
8712 * There's a slim chance the VF could have been hot plugged,
8713 * so if it is no longer present we don't need to issue the
8714 * VFLR. Just clean up the AER in that case.
8717 ixgbe_issue_vf_flr(adapter, vfdev);
8718 /* Free device reference count */
8722 pci_cleanup_aer_uncorrect_error_status(pdev);
8726 * Even though the error may have occurred on the other port
8727 * we still need to increment the vf error reference count for
8728 * both ports because the I/O resume function will be called
8731 adapter->vferr_refcount++;
8733 return PCI_ERS_RESULT_RECOVERED;
8735 skip_bad_vf_detection:
8736 #endif /* CONFIG_PCI_IOV */
8737 if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
8738 return PCI_ERS_RESULT_DISCONNECT;
8741 netif_device_detach(netdev);
8743 if (state == pci_channel_io_perm_failure) {
8745 return PCI_ERS_RESULT_DISCONNECT;
8748 if (netif_running(netdev))
8749 ixgbe_down(adapter);
8751 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
8752 pci_disable_device(pdev);
8755 /* Request a slot reset. */
8756 return PCI_ERS_RESULT_NEED_RESET;
8760 * ixgbe_io_slot_reset - called after the pci bus has been reset.
8761 * @pdev: Pointer to PCI device
8763 * Restart the card from scratch, as if from a cold-boot.
8765 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
8767 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8768 pci_ers_result_t result;
8771 if (pci_enable_device_mem(pdev)) {
8772 e_err(probe, "Cannot re-enable PCI device after reset.\n");
8773 result = PCI_ERS_RESULT_DISCONNECT;
8775 smp_mb__before_atomic();
8776 clear_bit(__IXGBE_DISABLED, &adapter->state);
8777 adapter->hw.hw_addr = adapter->io_addr;
8778 pci_set_master(pdev);
8779 pci_restore_state(pdev);
8780 pci_save_state(pdev);
8782 pci_wake_from_d3(pdev, false);
8784 ixgbe_reset(adapter);
8785 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8786 result = PCI_ERS_RESULT_RECOVERED;
8789 err = pci_cleanup_aer_uncorrect_error_status(pdev);
8791 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
8792 "failed 0x%0x\n", err);
8793 /* non-fatal, continue */
8800 * ixgbe_io_resume - called when traffic can start flowing again.
8801 * @pdev: Pointer to PCI device
8803 * This callback is called when the error recovery driver tells us that
8804 * its OK to resume normal operation.
8806 static void ixgbe_io_resume(struct pci_dev *pdev)
8808 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8809 struct net_device *netdev = adapter->netdev;
8811 #ifdef CONFIG_PCI_IOV
8812 if (adapter->vferr_refcount) {
8813 e_info(drv, "Resuming after VF err\n");
8814 adapter->vferr_refcount--;
8819 if (netif_running(netdev))
8822 netif_device_attach(netdev);
8825 static const struct pci_error_handlers ixgbe_err_handler = {
8826 .error_detected = ixgbe_io_error_detected,
8827 .slot_reset = ixgbe_io_slot_reset,
8828 .resume = ixgbe_io_resume,
8831 static struct pci_driver ixgbe_driver = {
8832 .name = ixgbe_driver_name,
8833 .id_table = ixgbe_pci_tbl,
8834 .probe = ixgbe_probe,
8835 .remove = ixgbe_remove,
8837 .suspend = ixgbe_suspend,
8838 .resume = ixgbe_resume,
8840 .shutdown = ixgbe_shutdown,
8841 .sriov_configure = ixgbe_pci_sriov_configure,
8842 .err_handler = &ixgbe_err_handler
8846 * ixgbe_init_module - Driver Registration Routine
8848 * ixgbe_init_module is the first routine called when the driver is
8849 * loaded. All it does is register with the PCI subsystem.
8851 static int __init ixgbe_init_module(void)
8854 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
8855 pr_info("%s\n", ixgbe_copyright);
8859 ret = pci_register_driver(&ixgbe_driver);
8865 #ifdef CONFIG_IXGBE_DCA
8866 dca_register_notify(&dca_notifier);
8872 module_init(ixgbe_init_module);
8875 * ixgbe_exit_module - Driver Exit Cleanup Routine
8877 * ixgbe_exit_module is called just before the driver is removed
8880 static void __exit ixgbe_exit_module(void)
8882 #ifdef CONFIG_IXGBE_DCA
8883 dca_unregister_notify(&dca_notifier);
8885 pci_unregister_driver(&ixgbe_driver);
8889 rcu_barrier(); /* Wait for completion of call_rcu()'s */
8892 #ifdef CONFIG_IXGBE_DCA
8893 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
8898 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
8899 __ixgbe_notify_dca);
8901 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
8904 #endif /* CONFIG_IXGBE_DCA */
8906 module_exit(ixgbe_exit_module);