1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2012 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
35 #include <linux/interrupt.h>
37 #include <linux/tcp.h>
38 #include <linux/sctp.h>
39 #include <linux/pkt_sched.h>
40 #include <linux/ipv6.h>
41 #include <linux/slab.h>
42 #include <net/checksum.h>
43 #include <net/ip6_checksum.h>
44 #include <linux/ethtool.h>
46 #include <linux/if_vlan.h>
47 #include <linux/prefetch.h>
48 #include <scsi/fc/fc_fcoe.h>
51 #include "ixgbe_common.h"
52 #include "ixgbe_dcb_82599.h"
53 #include "ixgbe_sriov.h"
55 char ixgbe_driver_name[] = "ixgbe";
56 static const char ixgbe_driver_string[] =
57 "Intel(R) 10 Gigabit PCI Express Network Driver";
59 char ixgbe_default_device_descr[] =
60 "Intel(R) 10 Gigabit Network Connection";
62 static char ixgbe_default_device_descr[] =
63 "Intel(R) 10 Gigabit Network Connection";
68 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
69 __stringify(BUILD) "-k"
70 const char ixgbe_driver_version[] = DRV_VERSION;
71 static const char ixgbe_copyright[] =
72 "Copyright (c) 1999-2012 Intel Corporation.";
74 static const struct ixgbe_info *ixgbe_info_tbl[] = {
75 [board_82598] = &ixgbe_82598_info,
76 [board_82599] = &ixgbe_82599_info,
77 [board_X540] = &ixgbe_X540_info,
80 /* ixgbe_pci_tbl - PCI Device ID Table
82 * Wildcard entries (PCI_ANY_ID) should come last
83 * Last entry must be all 0s
85 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
86 * Class, Class Mask, private data (not used) }
88 static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl) = {
89 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
95 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
96 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
97 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
98 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
99 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
117 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
118 /* required last entry */
121 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
123 #ifdef CONFIG_IXGBE_DCA
124 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
126 static struct notifier_block dca_notifier = {
127 .notifier_call = ixgbe_notify_dca,
133 #ifdef CONFIG_PCI_IOV
134 static unsigned int max_vfs;
135 module_param(max_vfs, uint, 0);
136 MODULE_PARM_DESC(max_vfs,
137 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63");
138 #endif /* CONFIG_PCI_IOV */
140 static unsigned int allow_unsupported_sfp;
141 module_param(allow_unsupported_sfp, uint, 0);
142 MODULE_PARM_DESC(allow_unsupported_sfp,
143 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
145 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
146 static int debug = -1;
147 module_param(debug, int, 0);
148 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
150 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
151 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
152 MODULE_LICENSE("GPL");
153 MODULE_VERSION(DRV_VERSION);
155 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
157 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
158 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
159 schedule_work(&adapter->service_task);
162 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
164 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
166 /* flush memory to make sure state is correct before next watchdog */
167 smp_mb__before_clear_bit();
168 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
171 struct ixgbe_reg_info {
176 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
178 /* General Registers */
179 {IXGBE_CTRL, "CTRL"},
180 {IXGBE_STATUS, "STATUS"},
181 {IXGBE_CTRL_EXT, "CTRL_EXT"},
183 /* Interrupt Registers */
184 {IXGBE_EICR, "EICR"},
187 {IXGBE_SRRCTL(0), "SRRCTL"},
188 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
189 {IXGBE_RDLEN(0), "RDLEN"},
190 {IXGBE_RDH(0), "RDH"},
191 {IXGBE_RDT(0), "RDT"},
192 {IXGBE_RXDCTL(0), "RXDCTL"},
193 {IXGBE_RDBAL(0), "RDBAL"},
194 {IXGBE_RDBAH(0), "RDBAH"},
197 {IXGBE_TDBAL(0), "TDBAL"},
198 {IXGBE_TDBAH(0), "TDBAH"},
199 {IXGBE_TDLEN(0), "TDLEN"},
200 {IXGBE_TDH(0), "TDH"},
201 {IXGBE_TDT(0), "TDT"},
202 {IXGBE_TXDCTL(0), "TXDCTL"},
204 /* List Terminator */
210 * ixgbe_regdump - register printout routine
212 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
218 switch (reginfo->ofs) {
219 case IXGBE_SRRCTL(0):
220 for (i = 0; i < 64; i++)
221 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
223 case IXGBE_DCA_RXCTRL(0):
224 for (i = 0; i < 64; i++)
225 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
228 for (i = 0; i < 64; i++)
229 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
232 for (i = 0; i < 64; i++)
233 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
236 for (i = 0; i < 64; i++)
237 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
239 case IXGBE_RXDCTL(0):
240 for (i = 0; i < 64; i++)
241 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
244 for (i = 0; i < 64; i++)
245 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
248 for (i = 0; i < 64; i++)
249 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
252 for (i = 0; i < 64; i++)
253 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
256 for (i = 0; i < 64; i++)
257 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
260 for (i = 0; i < 64; i++)
261 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
264 for (i = 0; i < 64; i++)
265 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
268 for (i = 0; i < 64; i++)
269 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
271 case IXGBE_TXDCTL(0):
272 for (i = 0; i < 64; i++)
273 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
276 pr_info("%-15s %08x\n", reginfo->name,
277 IXGBE_READ_REG(hw, reginfo->ofs));
281 for (i = 0; i < 8; i++) {
282 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
283 pr_err("%-15s", rname);
284 for (j = 0; j < 8; j++)
285 pr_cont(" %08x", regs[i*8+j]);
292 * ixgbe_dump - Print registers, tx-rings and rx-rings
294 static void ixgbe_dump(struct ixgbe_adapter *adapter)
296 struct net_device *netdev = adapter->netdev;
297 struct ixgbe_hw *hw = &adapter->hw;
298 struct ixgbe_reg_info *reginfo;
300 struct ixgbe_ring *tx_ring;
301 struct ixgbe_tx_buffer *tx_buffer;
302 union ixgbe_adv_tx_desc *tx_desc;
303 struct my_u0 { u64 a; u64 b; } *u0;
304 struct ixgbe_ring *rx_ring;
305 union ixgbe_adv_rx_desc *rx_desc;
306 struct ixgbe_rx_buffer *rx_buffer_info;
310 if (!netif_msg_hw(adapter))
313 /* Print netdevice Info */
315 dev_info(&adapter->pdev->dev, "Net device Info\n");
316 pr_info("Device Name state "
317 "trans_start last_rx\n");
318 pr_info("%-15s %016lX %016lX %016lX\n",
325 /* Print Registers */
326 dev_info(&adapter->pdev->dev, "Register Dump\n");
327 pr_info(" Register Name Value\n");
328 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
329 reginfo->name; reginfo++) {
330 ixgbe_regdump(hw, reginfo);
333 /* Print TX Ring Summary */
334 if (!netdev || !netif_running(netdev))
337 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
338 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
339 for (n = 0; n < adapter->num_tx_queues; n++) {
340 tx_ring = adapter->tx_ring[n];
341 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
342 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
343 n, tx_ring->next_to_use, tx_ring->next_to_clean,
344 (u64)dma_unmap_addr(tx_buffer, dma),
345 dma_unmap_len(tx_buffer, len),
346 tx_buffer->next_to_watch,
347 (u64)tx_buffer->time_stamp);
351 if (!netif_msg_tx_done(adapter))
352 goto rx_ring_summary;
354 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
356 /* Transmit Descriptor Formats
358 * 82598 Advanced Transmit Descriptor
359 * +--------------------------------------------------------------+
360 * 0 | Buffer Address [63:0] |
361 * +--------------------------------------------------------------+
362 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
363 * +--------------------------------------------------------------+
364 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
366 * 82598 Advanced Transmit Descriptor (Write-Back Format)
367 * +--------------------------------------------------------------+
369 * +--------------------------------------------------------------+
370 * 8 | RSV | STA | NXTSEQ |
371 * +--------------------------------------------------------------+
374 * 82599+ Advanced Transmit Descriptor
375 * +--------------------------------------------------------------+
376 * 0 | Buffer Address [63:0] |
377 * +--------------------------------------------------------------+
378 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
379 * +--------------------------------------------------------------+
380 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
382 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
383 * +--------------------------------------------------------------+
385 * +--------------------------------------------------------------+
386 * 8 | RSV | STA | RSV |
387 * +--------------------------------------------------------------+
391 for (n = 0; n < adapter->num_tx_queues; n++) {
392 tx_ring = adapter->tx_ring[n];
393 pr_info("------------------------------------\n");
394 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
395 pr_info("------------------------------------\n");
396 pr_info("T [desc] [address 63:0 ] "
397 "[PlPOIdStDDt Ln] [bi->dma ] "
398 "leng ntw timestamp bi->skb\n");
400 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
401 tx_desc = IXGBE_TX_DESC(tx_ring, i);
402 tx_buffer = &tx_ring->tx_buffer_info[i];
403 u0 = (struct my_u0 *)tx_desc;
404 pr_info("T [0x%03X] %016llX %016llX %016llX"
405 " %04X %p %016llX %p", i,
408 (u64)dma_unmap_addr(tx_buffer, dma),
409 dma_unmap_len(tx_buffer, len),
410 tx_buffer->next_to_watch,
411 (u64)tx_buffer->time_stamp,
413 if (i == tx_ring->next_to_use &&
414 i == tx_ring->next_to_clean)
416 else if (i == tx_ring->next_to_use)
418 else if (i == tx_ring->next_to_clean)
423 if (netif_msg_pktdata(adapter) &&
425 print_hex_dump(KERN_INFO, "",
426 DUMP_PREFIX_ADDRESS, 16, 1,
427 tx_buffer->skb->data,
428 dma_unmap_len(tx_buffer, len),
433 /* Print RX Rings Summary */
435 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
436 pr_info("Queue [NTU] [NTC]\n");
437 for (n = 0; n < adapter->num_rx_queues; n++) {
438 rx_ring = adapter->rx_ring[n];
439 pr_info("%5d %5X %5X\n",
440 n, rx_ring->next_to_use, rx_ring->next_to_clean);
444 if (!netif_msg_rx_status(adapter))
447 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
449 /* Receive Descriptor Formats
451 * 82598 Advanced Receive Descriptor (Read) Format
453 * +-----------------------------------------------------+
454 * 0 | Packet Buffer Address [63:1] |A0/NSE|
455 * +----------------------------------------------+------+
456 * 8 | Header Buffer Address [63:1] | DD |
457 * +-----------------------------------------------------+
460 * 82598 Advanced Receive Descriptor (Write-Back) Format
462 * 63 48 47 32 31 30 21 20 16 15 4 3 0
463 * +------------------------------------------------------+
464 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
465 * | Packet | IP | | | | Type | Type |
466 * | Checksum | Ident | | | | | |
467 * +------------------------------------------------------+
468 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
469 * +------------------------------------------------------+
470 * 63 48 47 32 31 20 19 0
472 * 82599+ Advanced Receive Descriptor (Read) Format
474 * +-----------------------------------------------------+
475 * 0 | Packet Buffer Address [63:1] |A0/NSE|
476 * +----------------------------------------------+------+
477 * 8 | Header Buffer Address [63:1] | DD |
478 * +-----------------------------------------------------+
481 * 82599+ Advanced Receive Descriptor (Write-Back) Format
483 * 63 48 47 32 31 30 21 20 17 16 4 3 0
484 * +------------------------------------------------------+
485 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
486 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
487 * |/ Flow Dir Flt ID | | | | | |
488 * +------------------------------------------------------+
489 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
490 * +------------------------------------------------------+
491 * 63 48 47 32 31 20 19 0
494 for (n = 0; n < adapter->num_rx_queues; n++) {
495 rx_ring = adapter->rx_ring[n];
496 pr_info("------------------------------------\n");
497 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
498 pr_info("------------------------------------\n");
499 pr_info("R [desc] [ PktBuf A0] "
500 "[ HeadBuf DD] [bi->dma ] [bi->skb] "
501 "<-- Adv Rx Read format\n");
502 pr_info("RWB[desc] [PcsmIpSHl PtRs] "
503 "[vl er S cks ln] ---------------- [bi->skb] "
504 "<-- Adv Rx Write-Back format\n");
506 for (i = 0; i < rx_ring->count; i++) {
507 rx_buffer_info = &rx_ring->rx_buffer_info[i];
508 rx_desc = IXGBE_RX_DESC(rx_ring, i);
509 u0 = (struct my_u0 *)rx_desc;
510 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
511 if (staterr & IXGBE_RXD_STAT_DD) {
512 /* Descriptor Done */
513 pr_info("RWB[0x%03X] %016llX "
514 "%016llX ---------------- %p", i,
517 rx_buffer_info->skb);
519 pr_info("R [0x%03X] %016llX "
520 "%016llX %016llX %p", i,
523 (u64)rx_buffer_info->dma,
524 rx_buffer_info->skb);
526 if (netif_msg_pktdata(adapter) &&
527 rx_buffer_info->dma) {
528 print_hex_dump(KERN_INFO, "",
529 DUMP_PREFIX_ADDRESS, 16, 1,
530 page_address(rx_buffer_info->page) +
531 rx_buffer_info->page_offset,
532 ixgbe_rx_bufsz(rx_ring), true);
536 if (i == rx_ring->next_to_use)
538 else if (i == rx_ring->next_to_clean)
550 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
554 /* Let firmware take over control of h/w */
555 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
556 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
557 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
560 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
564 /* Let firmware know the driver has taken over */
565 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
566 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
567 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
571 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
572 * @adapter: pointer to adapter struct
573 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
574 * @queue: queue to map the corresponding interrupt to
575 * @msix_vector: the vector to map to the corresponding queue
578 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
579 u8 queue, u8 msix_vector)
582 struct ixgbe_hw *hw = &adapter->hw;
583 switch (hw->mac.type) {
584 case ixgbe_mac_82598EB:
585 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
588 index = (((direction * 64) + queue) >> 2) & 0x1F;
589 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
590 ivar &= ~(0xFF << (8 * (queue & 0x3)));
591 ivar |= (msix_vector << (8 * (queue & 0x3)));
592 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
594 case ixgbe_mac_82599EB:
596 if (direction == -1) {
598 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
599 index = ((queue & 1) * 8);
600 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
601 ivar &= ~(0xFF << index);
602 ivar |= (msix_vector << index);
603 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
606 /* tx or rx causes */
607 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
608 index = ((16 * (queue & 1)) + (8 * direction));
609 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
610 ivar &= ~(0xFF << index);
611 ivar |= (msix_vector << index);
612 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
620 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
625 switch (adapter->hw.mac.type) {
626 case ixgbe_mac_82598EB:
627 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
628 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
630 case ixgbe_mac_82599EB:
632 mask = (qmask & 0xFFFFFFFF);
633 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
634 mask = (qmask >> 32);
635 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
642 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
643 struct ixgbe_tx_buffer *tx_buffer)
645 if (tx_buffer->skb) {
646 dev_kfree_skb_any(tx_buffer->skb);
647 if (dma_unmap_len(tx_buffer, len))
648 dma_unmap_single(ring->dev,
649 dma_unmap_addr(tx_buffer, dma),
650 dma_unmap_len(tx_buffer, len),
652 } else if (dma_unmap_len(tx_buffer, len)) {
653 dma_unmap_page(ring->dev,
654 dma_unmap_addr(tx_buffer, dma),
655 dma_unmap_len(tx_buffer, len),
658 tx_buffer->next_to_watch = NULL;
659 tx_buffer->skb = NULL;
660 dma_unmap_len_set(tx_buffer, len, 0);
661 /* tx_buffer must be completely set up in the transmit path */
664 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
666 struct ixgbe_hw *hw = &adapter->hw;
667 struct ixgbe_hw_stats *hwstats = &adapter->stats;
671 if ((hw->fc.current_mode != ixgbe_fc_full) &&
672 (hw->fc.current_mode != ixgbe_fc_rx_pause))
675 switch (hw->mac.type) {
676 case ixgbe_mac_82598EB:
677 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
680 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
682 hwstats->lxoffrxc += data;
684 /* refill credits (no tx hang) if we received xoff */
688 for (i = 0; i < adapter->num_tx_queues; i++)
689 clear_bit(__IXGBE_HANG_CHECK_ARMED,
690 &adapter->tx_ring[i]->state);
693 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
695 struct ixgbe_hw *hw = &adapter->hw;
696 struct ixgbe_hw_stats *hwstats = &adapter->stats;
699 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
701 if (adapter->ixgbe_ieee_pfc)
702 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
704 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
705 ixgbe_update_xoff_rx_lfc(adapter);
709 /* update stats for each tc, only valid with PFC enabled */
710 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
711 switch (hw->mac.type) {
712 case ixgbe_mac_82598EB:
713 xoff[i] = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
716 xoff[i] = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
718 hwstats->pxoffrxc[i] += xoff[i];
721 /* disarm tx queues that have received xoff frames */
722 for (i = 0; i < adapter->num_tx_queues; i++) {
723 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
724 u8 tc = tx_ring->dcb_tc;
727 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
731 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
733 return ring->stats.packets;
736 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
738 struct ixgbe_adapter *adapter = netdev_priv(ring->netdev);
739 struct ixgbe_hw *hw = &adapter->hw;
741 u32 head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
742 u32 tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
745 return (head < tail) ?
746 tail - head : (tail + ring->count - head);
751 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
753 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
754 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
755 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
758 clear_check_for_tx_hang(tx_ring);
761 * Check for a hung queue, but be thorough. This verifies
762 * that a transmit has been completed since the previous
763 * check AND there is at least one packet pending. The
764 * ARMED bit is set to indicate a potential hang. The
765 * bit is cleared if a pause frame is received to remove
766 * false hang detection due to PFC or 802.3x frames. By
767 * requiring this to fail twice we avoid races with
768 * pfc clearing the ARMED bit and conditions where we
769 * run the check_tx_hang logic with a transmit completion
770 * pending but without time to complete it yet.
772 if ((tx_done_old == tx_done) && tx_pending) {
773 /* make sure it is true for two checks in a row */
774 ret = test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
777 /* update completed stats and continue */
778 tx_ring->tx_stats.tx_done_old = tx_done;
779 /* reset the countdown */
780 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
787 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
788 * @adapter: driver private struct
790 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
793 /* Do the reset outside of interrupt context */
794 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
795 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
796 ixgbe_service_event_schedule(adapter);
801 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
802 * @q_vector: structure containing interrupt and ring information
803 * @tx_ring: tx ring to clean
805 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
806 struct ixgbe_ring *tx_ring)
808 struct ixgbe_adapter *adapter = q_vector->adapter;
809 struct ixgbe_tx_buffer *tx_buffer;
810 union ixgbe_adv_tx_desc *tx_desc;
811 unsigned int total_bytes = 0, total_packets = 0;
812 unsigned int budget = q_vector->tx.work_limit;
813 unsigned int i = tx_ring->next_to_clean;
815 if (test_bit(__IXGBE_DOWN, &adapter->state))
818 tx_buffer = &tx_ring->tx_buffer_info[i];
819 tx_desc = IXGBE_TX_DESC(tx_ring, i);
823 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
825 /* if next_to_watch is not set then there is no work pending */
829 /* prevent any other reads prior to eop_desc */
832 /* if DD is not set pending work has not been completed */
833 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
836 /* clear next_to_watch to prevent false hangs */
837 tx_buffer->next_to_watch = NULL;
839 /* update the statistics for this packet */
840 total_bytes += tx_buffer->bytecount;
841 total_packets += tx_buffer->gso_segs;
843 #ifdef CONFIG_IXGBE_PTP
844 if (unlikely(tx_buffer->tx_flags & IXGBE_TX_FLAGS_TSTAMP))
845 ixgbe_ptp_tx_hwtstamp(q_vector, tx_buffer->skb);
849 dev_kfree_skb_any(tx_buffer->skb);
851 /* unmap skb header data */
852 dma_unmap_single(tx_ring->dev,
853 dma_unmap_addr(tx_buffer, dma),
854 dma_unmap_len(tx_buffer, len),
857 /* clear tx_buffer data */
858 tx_buffer->skb = NULL;
859 dma_unmap_len_set(tx_buffer, len, 0);
861 /* unmap remaining buffers */
862 while (tx_desc != eop_desc) {
868 tx_buffer = tx_ring->tx_buffer_info;
869 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
872 /* unmap any remaining paged data */
873 if (dma_unmap_len(tx_buffer, len)) {
874 dma_unmap_page(tx_ring->dev,
875 dma_unmap_addr(tx_buffer, dma),
876 dma_unmap_len(tx_buffer, len),
878 dma_unmap_len_set(tx_buffer, len, 0);
882 /* move us one more past the eop_desc for start of next pkt */
888 tx_buffer = tx_ring->tx_buffer_info;
889 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
892 /* issue prefetch for next Tx descriptor */
895 /* update budget accounting */
897 } while (likely(budget));
900 tx_ring->next_to_clean = i;
901 u64_stats_update_begin(&tx_ring->syncp);
902 tx_ring->stats.bytes += total_bytes;
903 tx_ring->stats.packets += total_packets;
904 u64_stats_update_end(&tx_ring->syncp);
905 q_vector->tx.total_bytes += total_bytes;
906 q_vector->tx.total_packets += total_packets;
908 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
909 /* schedule immediate reset if we believe we hung */
910 struct ixgbe_hw *hw = &adapter->hw;
911 e_err(drv, "Detected Tx Unit Hang\n"
913 " TDH, TDT <%x>, <%x>\n"
914 " next_to_use <%x>\n"
915 " next_to_clean <%x>\n"
916 "tx_buffer_info[next_to_clean]\n"
917 " time_stamp <%lx>\n"
919 tx_ring->queue_index,
920 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
921 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
922 tx_ring->next_to_use, i,
923 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
925 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
928 "tx hang %d detected on queue %d, resetting adapter\n",
929 adapter->tx_timeout_count + 1, tx_ring->queue_index);
931 /* schedule immediate reset if we believe we hung */
932 ixgbe_tx_timeout_reset(adapter);
934 /* the adapter is about to reset, no point in enabling stuff */
938 netdev_tx_completed_queue(txring_txq(tx_ring),
939 total_packets, total_bytes);
941 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
942 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
943 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
944 /* Make sure that anybody stopping the queue after this
945 * sees the new next_to_clean.
948 if (__netif_subqueue_stopped(tx_ring->netdev,
949 tx_ring->queue_index)
950 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
951 netif_wake_subqueue(tx_ring->netdev,
952 tx_ring->queue_index);
953 ++tx_ring->tx_stats.restart_queue;
960 #ifdef CONFIG_IXGBE_DCA
961 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
962 struct ixgbe_ring *tx_ring,
965 struct ixgbe_hw *hw = &adapter->hw;
966 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
969 switch (hw->mac.type) {
970 case ixgbe_mac_82598EB:
971 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
973 case ixgbe_mac_82599EB:
975 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
976 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
979 /* for unknown hardware do not write register */
984 * We can enable relaxed ordering for reads, but not writes when
985 * DCA is enabled. This is due to a known issue in some chipsets
986 * which will cause the DCA tag to be cleared.
988 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
989 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
990 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
992 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
995 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
996 struct ixgbe_ring *rx_ring,
999 struct ixgbe_hw *hw = &adapter->hw;
1000 u32 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1001 u8 reg_idx = rx_ring->reg_idx;
1004 switch (hw->mac.type) {
1005 case ixgbe_mac_82599EB:
1006 case ixgbe_mac_X540:
1007 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1014 * We can enable relaxed ordering for reads, but not writes when
1015 * DCA is enabled. This is due to a known issue in some chipsets
1016 * which will cause the DCA tag to be cleared.
1018 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1019 IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1020 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1022 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1025 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1027 struct ixgbe_adapter *adapter = q_vector->adapter;
1028 struct ixgbe_ring *ring;
1029 int cpu = get_cpu();
1031 if (q_vector->cpu == cpu)
1034 ixgbe_for_each_ring(ring, q_vector->tx)
1035 ixgbe_update_tx_dca(adapter, ring, cpu);
1037 ixgbe_for_each_ring(ring, q_vector->rx)
1038 ixgbe_update_rx_dca(adapter, ring, cpu);
1040 q_vector->cpu = cpu;
1045 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1049 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
1052 /* always use CB2 mode, difference is masked in the CB driver */
1053 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
1055 for (i = 0; i < adapter->num_q_vectors; i++) {
1056 adapter->q_vector[i]->cpu = -1;
1057 ixgbe_update_dca(adapter->q_vector[i]);
1061 static int __ixgbe_notify_dca(struct device *dev, void *data)
1063 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1064 unsigned long event = *(unsigned long *)data;
1066 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1070 case DCA_PROVIDER_ADD:
1071 /* if we're already enabled, don't do it again */
1072 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1074 if (dca_add_requester(dev) == 0) {
1075 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1076 ixgbe_setup_dca(adapter);
1079 /* Fall Through since DCA is disabled. */
1080 case DCA_PROVIDER_REMOVE:
1081 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1082 dca_remove_requester(dev);
1083 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1084 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
1092 #endif /* CONFIG_IXGBE_DCA */
1093 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1094 union ixgbe_adv_rx_desc *rx_desc,
1095 struct sk_buff *skb)
1097 if (ring->netdev->features & NETIF_F_RXHASH)
1098 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
1103 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1104 * @ring: structure containing ring specific data
1105 * @rx_desc: advanced rx descriptor
1107 * Returns : true if it is FCoE pkt
1109 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1110 union ixgbe_adv_rx_desc *rx_desc)
1112 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1114 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1115 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1116 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1117 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1120 #endif /* IXGBE_FCOE */
1122 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1123 * @ring: structure containing ring specific data
1124 * @rx_desc: current Rx descriptor being processed
1125 * @skb: skb currently being received and modified
1127 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1128 union ixgbe_adv_rx_desc *rx_desc,
1129 struct sk_buff *skb)
1131 skb_checksum_none_assert(skb);
1133 /* Rx csum disabled */
1134 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1137 /* if IP and error */
1138 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1139 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1140 ring->rx_stats.csum_err++;
1144 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1147 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1148 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1151 * 82599 errata, UDP frames with a 0 checksum can be marked as
1154 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1155 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1158 ring->rx_stats.csum_err++;
1162 /* It must be a TCP or UDP packet with a valid checksum */
1163 skb->ip_summed = CHECKSUM_UNNECESSARY;
1166 static inline void ixgbe_release_rx_desc(struct ixgbe_ring *rx_ring, u32 val)
1168 rx_ring->next_to_use = val;
1170 /* update next to alloc since we have filled the ring */
1171 rx_ring->next_to_alloc = val;
1173 * Force memory writes to complete before letting h/w
1174 * know there are new descriptors to fetch. (Only
1175 * applicable for weak-ordered memory model archs,
1179 writel(val, rx_ring->tail);
1182 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1183 struct ixgbe_rx_buffer *bi)
1185 struct page *page = bi->page;
1186 dma_addr_t dma = bi->dma;
1188 /* since we are recycling buffers we should seldom need to alloc */
1192 /* alloc new page for storage */
1193 if (likely(!page)) {
1194 page = __skb_alloc_pages(GFP_ATOMIC | __GFP_COLD | __GFP_COMP,
1195 bi->skb, ixgbe_rx_pg_order(rx_ring));
1196 if (unlikely(!page)) {
1197 rx_ring->rx_stats.alloc_rx_page_failed++;
1203 /* map page for use */
1204 dma = dma_map_page(rx_ring->dev, page, 0,
1205 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1208 * if mapping failed free memory back to system since
1209 * there isn't much point in holding memory we can't use
1211 if (dma_mapping_error(rx_ring->dev, dma)) {
1212 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1215 rx_ring->rx_stats.alloc_rx_page_failed++;
1220 bi->page_offset = 0;
1226 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1227 * @rx_ring: ring to place buffers on
1228 * @cleaned_count: number of buffers to replace
1230 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1232 union ixgbe_adv_rx_desc *rx_desc;
1233 struct ixgbe_rx_buffer *bi;
1234 u16 i = rx_ring->next_to_use;
1240 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1241 bi = &rx_ring->rx_buffer_info[i];
1242 i -= rx_ring->count;
1245 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1249 * Refresh the desc even if buffer_addrs didn't change
1250 * because each write-back erases this info.
1252 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1258 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1259 bi = rx_ring->rx_buffer_info;
1260 i -= rx_ring->count;
1263 /* clear the hdr_addr for the next_to_use descriptor */
1264 rx_desc->read.hdr_addr = 0;
1267 } while (cleaned_count);
1269 i += rx_ring->count;
1271 if (rx_ring->next_to_use != i)
1272 ixgbe_release_rx_desc(rx_ring, i);
1276 * ixgbe_get_headlen - determine size of header for RSC/LRO/GRO/FCOE
1277 * @data: pointer to the start of the headers
1278 * @max_len: total length of section to find headers in
1280 * This function is meant to determine the length of headers that will
1281 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1282 * motivation of doing this is to only perform one pull for IPv4 TCP
1283 * packets so that we can do basic things like calculating the gso_size
1284 * based on the average data per packet.
1286 static unsigned int ixgbe_get_headlen(unsigned char *data,
1287 unsigned int max_len)
1290 unsigned char *network;
1293 struct vlan_hdr *vlan;
1296 struct ipv6hdr *ipv6;
1299 u8 nexthdr = 0; /* default to not TCP */
1302 /* this should never happen, but better safe than sorry */
1303 if (max_len < ETH_HLEN)
1306 /* initialize network frame pointer */
1309 /* set first protocol and move network header forward */
1310 protocol = hdr.eth->h_proto;
1311 hdr.network += ETH_HLEN;
1313 /* handle any vlan tag if present */
1314 if (protocol == __constant_htons(ETH_P_8021Q)) {
1315 if ((hdr.network - data) > (max_len - VLAN_HLEN))
1318 protocol = hdr.vlan->h_vlan_encapsulated_proto;
1319 hdr.network += VLAN_HLEN;
1322 /* handle L3 protocols */
1323 if (protocol == __constant_htons(ETH_P_IP)) {
1324 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
1327 /* access ihl as a u8 to avoid unaligned access on ia64 */
1328 hlen = (hdr.network[0] & 0x0F) << 2;
1330 /* verify hlen meets minimum size requirements */
1331 if (hlen < sizeof(struct iphdr))
1332 return hdr.network - data;
1334 /* record next protocol */
1335 nexthdr = hdr.ipv4->protocol;
1336 hdr.network += hlen;
1337 } else if (protocol == __constant_htons(ETH_P_IPV6)) {
1338 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
1341 /* record next protocol */
1342 nexthdr = hdr.ipv6->nexthdr;
1343 hdr.network += sizeof(struct ipv6hdr);
1345 } else if (protocol == __constant_htons(ETH_P_FCOE)) {
1346 if ((hdr.network - data) > (max_len - FCOE_HEADER_LEN))
1348 hdr.network += FCOE_HEADER_LEN;
1351 return hdr.network - data;
1354 /* finally sort out TCP/UDP */
1355 if (nexthdr == IPPROTO_TCP) {
1356 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
1359 /* access doff as a u8 to avoid unaligned access on ia64 */
1360 hlen = (hdr.network[12] & 0xF0) >> 2;
1362 /* verify hlen meets minimum size requirements */
1363 if (hlen < sizeof(struct tcphdr))
1364 return hdr.network - data;
1366 hdr.network += hlen;
1367 } else if (nexthdr == IPPROTO_UDP) {
1368 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
1371 hdr.network += sizeof(struct udphdr);
1375 * If everything has gone correctly hdr.network should be the
1376 * data section of the packet and will be the end of the header.
1377 * If not then it probably represents the end of the last recognized
1380 if ((hdr.network - data) < max_len)
1381 return hdr.network - data;
1386 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1387 struct sk_buff *skb)
1389 u16 hdr_len = skb_headlen(skb);
1391 /* set gso_size to avoid messing up TCP MSS */
1392 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1393 IXGBE_CB(skb)->append_cnt);
1396 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1397 struct sk_buff *skb)
1399 /* if append_cnt is 0 then frame is not RSC */
1400 if (!IXGBE_CB(skb)->append_cnt)
1403 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1404 rx_ring->rx_stats.rsc_flush++;
1406 ixgbe_set_rsc_gso_size(rx_ring, skb);
1408 /* gso_size is computed using append_cnt so always clear it last */
1409 IXGBE_CB(skb)->append_cnt = 0;
1413 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1414 * @rx_ring: rx descriptor ring packet is being transacted on
1415 * @rx_desc: pointer to the EOP Rx descriptor
1416 * @skb: pointer to current skb being populated
1418 * This function checks the ring, descriptor, and packet information in
1419 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1420 * other fields within the skb.
1422 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1423 union ixgbe_adv_rx_desc *rx_desc,
1424 struct sk_buff *skb)
1426 struct net_device *dev = rx_ring->netdev;
1428 ixgbe_update_rsc_stats(rx_ring, skb);
1430 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1432 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1434 #ifdef CONFIG_IXGBE_PTP
1435 ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector, rx_desc, skb);
1438 if ((dev->features & NETIF_F_HW_VLAN_RX) &&
1439 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1440 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1441 __vlan_hwaccel_put_tag(skb, vid);
1444 skb_record_rx_queue(skb, rx_ring->queue_index);
1446 skb->protocol = eth_type_trans(skb, dev);
1449 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1450 struct sk_buff *skb)
1452 struct ixgbe_adapter *adapter = q_vector->adapter;
1454 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1455 napi_gro_receive(&q_vector->napi, skb);
1461 * ixgbe_is_non_eop - process handling of non-EOP buffers
1462 * @rx_ring: Rx ring being processed
1463 * @rx_desc: Rx descriptor for current buffer
1464 * @skb: Current socket buffer containing buffer in progress
1466 * This function updates next to clean. If the buffer is an EOP buffer
1467 * this function exits returning false, otherwise it will place the
1468 * sk_buff in the next buffer to be chained and return true indicating
1469 * that this is in fact a non-EOP buffer.
1471 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1472 union ixgbe_adv_rx_desc *rx_desc,
1473 struct sk_buff *skb)
1475 u32 ntc = rx_ring->next_to_clean + 1;
1477 /* fetch, update, and store next to clean */
1478 ntc = (ntc < rx_ring->count) ? ntc : 0;
1479 rx_ring->next_to_clean = ntc;
1481 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1483 /* update RSC append count if present */
1484 if (ring_is_rsc_enabled(rx_ring)) {
1485 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1486 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1488 if (unlikely(rsc_enabled)) {
1489 u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1491 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1492 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1494 /* update ntc based on RSC value */
1495 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1496 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1497 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1501 /* if we are the last buffer then there is nothing else to do */
1502 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1505 /* place skb in next buffer to be received */
1506 rx_ring->rx_buffer_info[ntc].skb = skb;
1507 rx_ring->rx_stats.non_eop_descs++;
1513 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1514 * @rx_ring: rx descriptor ring packet is being transacted on
1515 * @skb: pointer to current skb being adjusted
1517 * This function is an ixgbe specific version of __pskb_pull_tail. The
1518 * main difference between this version and the original function is that
1519 * this function can make several assumptions about the state of things
1520 * that allow for significant optimizations versus the standard function.
1521 * As a result we can do things like drop a frag and maintain an accurate
1522 * truesize for the skb.
1524 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1525 struct sk_buff *skb)
1527 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1529 unsigned int pull_len;
1532 * it is valid to use page_address instead of kmap since we are
1533 * working with pages allocated out of the lomem pool per
1534 * alloc_page(GFP_ATOMIC)
1536 va = skb_frag_address(frag);
1539 * we need the header to contain the greater of either ETH_HLEN or
1540 * 60 bytes if the skb->len is less than 60 for skb_pad.
1542 pull_len = ixgbe_get_headlen(va, IXGBE_RX_HDR_SIZE);
1544 /* align pull length to size of long to optimize memcpy performance */
1545 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1547 /* update all of the pointers */
1548 skb_frag_size_sub(frag, pull_len);
1549 frag->page_offset += pull_len;
1550 skb->data_len -= pull_len;
1551 skb->tail += pull_len;
1555 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1556 * @rx_ring: rx descriptor ring packet is being transacted on
1557 * @skb: pointer to current skb being updated
1559 * This function provides a basic DMA sync up for the first fragment of an
1560 * skb. The reason for doing this is that the first fragment cannot be
1561 * unmapped until we have reached the end of packet descriptor for a buffer
1564 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1565 struct sk_buff *skb)
1567 /* if the page was released unmap it, else just sync our portion */
1568 if (unlikely(IXGBE_CB(skb)->page_released)) {
1569 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1570 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1571 IXGBE_CB(skb)->page_released = false;
1573 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1575 dma_sync_single_range_for_cpu(rx_ring->dev,
1578 ixgbe_rx_bufsz(rx_ring),
1581 IXGBE_CB(skb)->dma = 0;
1585 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1586 * @rx_ring: rx descriptor ring packet is being transacted on
1587 * @rx_desc: pointer to the EOP Rx descriptor
1588 * @skb: pointer to current skb being fixed
1590 * Check for corrupted packet headers caused by senders on the local L2
1591 * embedded NIC switch not setting up their Tx Descriptors right. These
1592 * should be very rare.
1594 * Also address the case where we are pulling data in on pages only
1595 * and as such no data is present in the skb header.
1597 * In addition if skb is not at least 60 bytes we need to pad it so that
1598 * it is large enough to qualify as a valid Ethernet frame.
1600 * Returns true if an error was encountered and skb was freed.
1602 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1603 union ixgbe_adv_rx_desc *rx_desc,
1604 struct sk_buff *skb)
1606 struct net_device *netdev = rx_ring->netdev;
1608 /* verify that the packet does not have any known errors */
1609 if (unlikely(ixgbe_test_staterr(rx_desc,
1610 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1611 !(netdev->features & NETIF_F_RXALL))) {
1612 dev_kfree_skb_any(skb);
1616 /* place header in linear portion of buffer */
1617 if (skb_is_nonlinear(skb))
1618 ixgbe_pull_tail(rx_ring, skb);
1621 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1622 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1626 /* if skb_pad returns an error the skb was freed */
1627 if (unlikely(skb->len < 60)) {
1628 int pad_len = 60 - skb->len;
1630 if (skb_pad(skb, pad_len))
1632 __skb_put(skb, pad_len);
1639 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1640 * @rx_ring: rx descriptor ring to store buffers on
1641 * @old_buff: donor buffer to have page reused
1643 * Synchronizes page for reuse by the adapter
1645 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1646 struct ixgbe_rx_buffer *old_buff)
1648 struct ixgbe_rx_buffer *new_buff;
1649 u16 nta = rx_ring->next_to_alloc;
1651 new_buff = &rx_ring->rx_buffer_info[nta];
1653 /* update, and store next to alloc */
1655 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1657 /* transfer page from old buffer to new buffer */
1658 new_buff->page = old_buff->page;
1659 new_buff->dma = old_buff->dma;
1660 new_buff->page_offset = old_buff->page_offset;
1662 /* sync the buffer for use by the device */
1663 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1664 new_buff->page_offset,
1665 ixgbe_rx_bufsz(rx_ring),
1670 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1671 * @rx_ring: rx descriptor ring to transact packets on
1672 * @rx_buffer: buffer containing page to add
1673 * @rx_desc: descriptor containing length of buffer written by hardware
1674 * @skb: sk_buff to place the data into
1676 * This function will add the data contained in rx_buffer->page to the skb.
1677 * This is done either through a direct copy if the data in the buffer is
1678 * less than the skb header size, otherwise it will just attach the page as
1679 * a frag to the skb.
1681 * The function will then update the page offset if necessary and return
1682 * true if the buffer can be reused by the adapter.
1684 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1685 struct ixgbe_rx_buffer *rx_buffer,
1686 union ixgbe_adv_rx_desc *rx_desc,
1687 struct sk_buff *skb)
1689 struct page *page = rx_buffer->page;
1690 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1691 #if (PAGE_SIZE < 8192)
1692 unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1694 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1695 unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1696 ixgbe_rx_bufsz(rx_ring);
1699 if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1700 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1702 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1704 /* we can reuse buffer as-is, just make sure it is local */
1705 if (likely(page_to_nid(page) == numa_node_id()))
1708 /* this page cannot be reused so discard it */
1713 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1714 rx_buffer->page_offset, size, truesize);
1716 /* avoid re-using remote pages */
1717 if (unlikely(page_to_nid(page) != numa_node_id()))
1720 #if (PAGE_SIZE < 8192)
1721 /* if we are only owner of page we can reuse it */
1722 if (unlikely(page_count(page) != 1))
1725 /* flip page offset to other buffer */
1726 rx_buffer->page_offset ^= truesize;
1729 * since we are the only owner of the page and we need to
1730 * increment it, just set the value to 2 in order to avoid
1731 * an unecessary locked operation
1733 atomic_set(&page->_count, 2);
1735 /* move offset up to the next cache line */
1736 rx_buffer->page_offset += truesize;
1738 if (rx_buffer->page_offset > last_offset)
1741 /* bump ref count on page before it is given to the stack */
1748 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
1749 union ixgbe_adv_rx_desc *rx_desc)
1751 struct ixgbe_rx_buffer *rx_buffer;
1752 struct sk_buff *skb;
1755 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
1756 page = rx_buffer->page;
1759 skb = rx_buffer->skb;
1762 void *page_addr = page_address(page) +
1763 rx_buffer->page_offset;
1765 /* prefetch first cache line of first page */
1766 prefetch(page_addr);
1767 #if L1_CACHE_BYTES < 128
1768 prefetch(page_addr + L1_CACHE_BYTES);
1771 /* allocate a skb to store the frags */
1772 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
1774 if (unlikely(!skb)) {
1775 rx_ring->rx_stats.alloc_rx_buff_failed++;
1780 * we will be copying header into skb->data in
1781 * pskb_may_pull so it is in our interest to prefetch
1782 * it now to avoid a possible cache miss
1784 prefetchw(skb->data);
1787 * Delay unmapping of the first packet. It carries the
1788 * header information, HW may still access the header
1789 * after the writeback. Only unmap it when EOP is
1792 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1795 IXGBE_CB(skb)->dma = rx_buffer->dma;
1797 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
1798 ixgbe_dma_sync_frag(rx_ring, skb);
1801 /* we are reusing so sync this buffer for CPU use */
1802 dma_sync_single_range_for_cpu(rx_ring->dev,
1804 rx_buffer->page_offset,
1805 ixgbe_rx_bufsz(rx_ring),
1809 /* pull page into skb */
1810 if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
1811 /* hand second half of page back to the ring */
1812 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
1813 } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
1814 /* the page has been released from the ring */
1815 IXGBE_CB(skb)->page_released = true;
1817 /* we are not reusing the buffer so unmap it */
1818 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
1819 ixgbe_rx_pg_size(rx_ring),
1823 /* clear contents of buffer_info */
1824 rx_buffer->skb = NULL;
1826 rx_buffer->page = NULL;
1832 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1833 * @q_vector: structure containing interrupt and ring information
1834 * @rx_ring: rx descriptor ring to transact packets on
1835 * @budget: Total limit on number of packets to process
1837 * This function provides a "bounce buffer" approach to Rx interrupt
1838 * processing. The advantage to this is that on systems that have
1839 * expensive overhead for IOMMU access this provides a means of avoiding
1840 * it by maintaining the mapping of the page to the syste.
1842 * Returns true if all work is completed without reaching budget
1844 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
1845 struct ixgbe_ring *rx_ring,
1848 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1850 struct ixgbe_adapter *adapter = q_vector->adapter;
1852 unsigned int mss = 0;
1853 #endif /* IXGBE_FCOE */
1854 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
1857 union ixgbe_adv_rx_desc *rx_desc;
1858 struct sk_buff *skb;
1860 /* return some buffers to hardware, one at a time is too slow */
1861 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
1862 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
1866 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
1868 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
1872 * This memory barrier is needed to keep us from reading
1873 * any other fields out of the rx_desc until we know the
1874 * RXD_STAT_DD bit is set
1878 /* retrieve a buffer from the ring */
1879 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
1881 /* exit if we failed to retrieve a buffer */
1887 /* place incomplete frames back on ring for completion */
1888 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
1891 /* verify the packet layout is correct */
1892 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
1895 /* probably a little skewed due to removing CRC */
1896 total_rx_bytes += skb->len;
1898 /* populate checksum, timestamp, VLAN, and protocol */
1899 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
1902 /* if ddp, not passing to ULD unless for FCP_RSP or error */
1903 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
1904 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
1905 /* include DDPed FCoE data */
1906 if (ddp_bytes > 0) {
1908 mss = rx_ring->netdev->mtu -
1909 sizeof(struct fcoe_hdr) -
1910 sizeof(struct fc_frame_header) -
1911 sizeof(struct fcoe_crc_eof);
1915 total_rx_bytes += ddp_bytes;
1916 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
1920 dev_kfree_skb_any(skb);
1925 #endif /* IXGBE_FCOE */
1926 ixgbe_rx_skb(q_vector, skb);
1928 /* update budget accounting */
1930 } while (likely(total_rx_packets < budget));
1932 u64_stats_update_begin(&rx_ring->syncp);
1933 rx_ring->stats.packets += total_rx_packets;
1934 rx_ring->stats.bytes += total_rx_bytes;
1935 u64_stats_update_end(&rx_ring->syncp);
1936 q_vector->rx.total_packets += total_rx_packets;
1937 q_vector->rx.total_bytes += total_rx_bytes;
1940 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
1942 return (total_rx_packets < budget);
1946 * ixgbe_configure_msix - Configure MSI-X hardware
1947 * @adapter: board private structure
1949 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
1952 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
1954 struct ixgbe_q_vector *q_vector;
1958 /* Populate MSIX to EITR Select */
1959 if (adapter->num_vfs > 32) {
1960 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
1961 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
1965 * Populate the IVAR table and set the ITR values to the
1966 * corresponding register.
1968 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
1969 struct ixgbe_ring *ring;
1970 q_vector = adapter->q_vector[v_idx];
1972 ixgbe_for_each_ring(ring, q_vector->rx)
1973 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
1975 ixgbe_for_each_ring(ring, q_vector->tx)
1976 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
1978 if (q_vector->tx.ring && !q_vector->rx.ring) {
1979 /* tx only vector */
1980 if (adapter->tx_itr_setting == 1)
1981 q_vector->itr = IXGBE_10K_ITR;
1983 q_vector->itr = adapter->tx_itr_setting;
1985 /* rx or rx/tx vector */
1986 if (adapter->rx_itr_setting == 1)
1987 q_vector->itr = IXGBE_20K_ITR;
1989 q_vector->itr = adapter->rx_itr_setting;
1992 ixgbe_write_eitr(q_vector);
1995 switch (adapter->hw.mac.type) {
1996 case ixgbe_mac_82598EB:
1997 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2000 case ixgbe_mac_82599EB:
2001 case ixgbe_mac_X540:
2002 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2007 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2009 /* set up to autoclear timer, and the vectors */
2010 mask = IXGBE_EIMS_ENABLE_MASK;
2011 mask &= ~(IXGBE_EIMS_OTHER |
2012 IXGBE_EIMS_MAILBOX |
2015 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2018 enum latency_range {
2022 latency_invalid = 255
2026 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2027 * @q_vector: structure containing interrupt and ring information
2028 * @ring_container: structure containing ring performance data
2030 * Stores a new ITR value based on packets and byte
2031 * counts during the last interrupt. The advantage of per interrupt
2032 * computation is faster updates and more accurate ITR for the current
2033 * traffic pattern. Constants in this function were computed
2034 * based on theoretical maximum wire speed and thresholds were set based
2035 * on testing data as well as attempting to minimize response time
2036 * while increasing bulk throughput.
2037 * this functionality is controlled by the InterruptThrottleRate module
2038 * parameter (see ixgbe_param.c)
2040 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2041 struct ixgbe_ring_container *ring_container)
2043 int bytes = ring_container->total_bytes;
2044 int packets = ring_container->total_packets;
2047 u8 itr_setting = ring_container->itr;
2052 /* simple throttlerate management
2053 * 0-10MB/s lowest (100000 ints/s)
2054 * 10-20MB/s low (20000 ints/s)
2055 * 20-1249MB/s bulk (8000 ints/s)
2057 /* what was last interrupt timeslice? */
2058 timepassed_us = q_vector->itr >> 2;
2059 bytes_perint = bytes / timepassed_us; /* bytes/usec */
2061 switch (itr_setting) {
2062 case lowest_latency:
2063 if (bytes_perint > 10)
2064 itr_setting = low_latency;
2067 if (bytes_perint > 20)
2068 itr_setting = bulk_latency;
2069 else if (bytes_perint <= 10)
2070 itr_setting = lowest_latency;
2073 if (bytes_perint <= 20)
2074 itr_setting = low_latency;
2078 /* clear work counters since we have the values we need */
2079 ring_container->total_bytes = 0;
2080 ring_container->total_packets = 0;
2082 /* write updated itr to ring container */
2083 ring_container->itr = itr_setting;
2087 * ixgbe_write_eitr - write EITR register in hardware specific way
2088 * @q_vector: structure containing interrupt and ring information
2090 * This function is made to be called by ethtool and by the driver
2091 * when it needs to update EITR registers at runtime. Hardware
2092 * specific quirks/differences are taken care of here.
2094 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2096 struct ixgbe_adapter *adapter = q_vector->adapter;
2097 struct ixgbe_hw *hw = &adapter->hw;
2098 int v_idx = q_vector->v_idx;
2099 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2101 switch (adapter->hw.mac.type) {
2102 case ixgbe_mac_82598EB:
2103 /* must write high and low 16 bits to reset counter */
2104 itr_reg |= (itr_reg << 16);
2106 case ixgbe_mac_82599EB:
2107 case ixgbe_mac_X540:
2109 * set the WDIS bit to not clear the timer bits and cause an
2110 * immediate assertion of the interrupt
2112 itr_reg |= IXGBE_EITR_CNT_WDIS;
2117 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2120 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2122 u32 new_itr = q_vector->itr;
2125 ixgbe_update_itr(q_vector, &q_vector->tx);
2126 ixgbe_update_itr(q_vector, &q_vector->rx);
2128 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2130 switch (current_itr) {
2131 /* counts and packets in update_itr are dependent on these numbers */
2132 case lowest_latency:
2133 new_itr = IXGBE_100K_ITR;
2136 new_itr = IXGBE_20K_ITR;
2139 new_itr = IXGBE_8K_ITR;
2145 if (new_itr != q_vector->itr) {
2146 /* do an exponential smoothing */
2147 new_itr = (10 * new_itr * q_vector->itr) /
2148 ((9 * new_itr) + q_vector->itr);
2150 /* save the algorithm value here */
2151 q_vector->itr = new_itr;
2153 ixgbe_write_eitr(q_vector);
2158 * ixgbe_check_overtemp_subtask - check for over temperature
2159 * @adapter: pointer to adapter
2161 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2163 struct ixgbe_hw *hw = &adapter->hw;
2164 u32 eicr = adapter->interrupt_event;
2166 if (test_bit(__IXGBE_DOWN, &adapter->state))
2169 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2170 !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2173 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2175 switch (hw->device_id) {
2176 case IXGBE_DEV_ID_82599_T3_LOM:
2178 * Since the warning interrupt is for both ports
2179 * we don't have to check if:
2180 * - This interrupt wasn't for our port.
2181 * - We may have missed the interrupt so always have to
2182 * check if we got a LSC
2184 if (!(eicr & IXGBE_EICR_GPI_SDP0) &&
2185 !(eicr & IXGBE_EICR_LSC))
2188 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2190 bool link_up = false;
2192 hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
2198 /* Check if this is not due to overtemp */
2199 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2204 if (!(eicr & IXGBE_EICR_GPI_SDP0))
2209 "Network adapter has been stopped because it has over heated. "
2210 "Restart the computer. If the problem persists, "
2211 "power off the system and replace the adapter\n");
2213 adapter->interrupt_event = 0;
2216 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2218 struct ixgbe_hw *hw = &adapter->hw;
2220 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2221 (eicr & IXGBE_EICR_GPI_SDP1)) {
2222 e_crit(probe, "Fan has stopped, replace the adapter\n");
2223 /* write to clear the interrupt */
2224 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2228 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2230 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2233 switch (adapter->hw.mac.type) {
2234 case ixgbe_mac_82599EB:
2236 * Need to check link state so complete overtemp check
2239 if (((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC)) &&
2240 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2241 adapter->interrupt_event = eicr;
2242 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2243 ixgbe_service_event_schedule(adapter);
2247 case ixgbe_mac_X540:
2248 if (!(eicr & IXGBE_EICR_TS))
2256 "Network adapter has been stopped because it has over heated. "
2257 "Restart the computer. If the problem persists, "
2258 "power off the system and replace the adapter\n");
2261 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2263 struct ixgbe_hw *hw = &adapter->hw;
2265 if (eicr & IXGBE_EICR_GPI_SDP2) {
2266 /* Clear the interrupt */
2267 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
2268 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2269 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2270 ixgbe_service_event_schedule(adapter);
2274 if (eicr & IXGBE_EICR_GPI_SDP1) {
2275 /* Clear the interrupt */
2276 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2277 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2278 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2279 ixgbe_service_event_schedule(adapter);
2284 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2286 struct ixgbe_hw *hw = &adapter->hw;
2289 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2290 adapter->link_check_timeout = jiffies;
2291 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2292 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2293 IXGBE_WRITE_FLUSH(hw);
2294 ixgbe_service_event_schedule(adapter);
2298 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2302 struct ixgbe_hw *hw = &adapter->hw;
2304 switch (hw->mac.type) {
2305 case ixgbe_mac_82598EB:
2306 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2307 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2309 case ixgbe_mac_82599EB:
2310 case ixgbe_mac_X540:
2311 mask = (qmask & 0xFFFFFFFF);
2313 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2314 mask = (qmask >> 32);
2316 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2321 /* skip the flush */
2324 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2328 struct ixgbe_hw *hw = &adapter->hw;
2330 switch (hw->mac.type) {
2331 case ixgbe_mac_82598EB:
2332 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2333 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2335 case ixgbe_mac_82599EB:
2336 case ixgbe_mac_X540:
2337 mask = (qmask & 0xFFFFFFFF);
2339 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2340 mask = (qmask >> 32);
2342 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2347 /* skip the flush */
2351 * ixgbe_irq_enable - Enable default interrupt generation settings
2352 * @adapter: board private structure
2354 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2357 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2359 /* don't reenable LSC while waiting for link */
2360 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2361 mask &= ~IXGBE_EIMS_LSC;
2363 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2364 switch (adapter->hw.mac.type) {
2365 case ixgbe_mac_82599EB:
2366 mask |= IXGBE_EIMS_GPI_SDP0;
2368 case ixgbe_mac_X540:
2369 mask |= IXGBE_EIMS_TS;
2374 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2375 mask |= IXGBE_EIMS_GPI_SDP1;
2376 switch (adapter->hw.mac.type) {
2377 case ixgbe_mac_82599EB:
2378 mask |= IXGBE_EIMS_GPI_SDP1;
2379 mask |= IXGBE_EIMS_GPI_SDP2;
2380 case ixgbe_mac_X540:
2381 mask |= IXGBE_EIMS_ECC;
2382 mask |= IXGBE_EIMS_MAILBOX;
2388 #ifdef CONFIG_IXGBE_PTP
2389 if (adapter->hw.mac.type == ixgbe_mac_X540)
2390 mask |= IXGBE_EIMS_TIMESYNC;
2393 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2394 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2395 mask |= IXGBE_EIMS_FLOW_DIR;
2397 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2399 ixgbe_irq_enable_queues(adapter, ~0);
2401 IXGBE_WRITE_FLUSH(&adapter->hw);
2404 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2406 struct ixgbe_adapter *adapter = data;
2407 struct ixgbe_hw *hw = &adapter->hw;
2411 * Workaround for Silicon errata. Use clear-by-write instead
2412 * of clear-by-read. Reading with EICS will return the
2413 * interrupt causes without clearing, which later be done
2414 * with the write to EICR.
2416 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2417 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2419 if (eicr & IXGBE_EICR_LSC)
2420 ixgbe_check_lsc(adapter);
2422 if (eicr & IXGBE_EICR_MAILBOX)
2423 ixgbe_msg_task(adapter);
2425 switch (hw->mac.type) {
2426 case ixgbe_mac_82599EB:
2427 case ixgbe_mac_X540:
2428 if (eicr & IXGBE_EICR_ECC)
2429 e_info(link, "Received unrecoverable ECC Err, please "
2431 /* Handle Flow Director Full threshold interrupt */
2432 if (eicr & IXGBE_EICR_FLOW_DIR) {
2433 int reinit_count = 0;
2435 for (i = 0; i < adapter->num_tx_queues; i++) {
2436 struct ixgbe_ring *ring = adapter->tx_ring[i];
2437 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2442 /* no more flow director interrupts until after init */
2443 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2444 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2445 ixgbe_service_event_schedule(adapter);
2448 ixgbe_check_sfp_event(adapter, eicr);
2449 ixgbe_check_overtemp_event(adapter, eicr);
2455 ixgbe_check_fan_failure(adapter, eicr);
2457 #ifdef CONFIG_IXGBE_PTP
2458 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2459 ixgbe_ptp_check_pps_event(adapter, eicr);
2462 /* re-enable the original interrupt state, no lsc, no queues */
2463 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2464 ixgbe_irq_enable(adapter, false, false);
2469 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2471 struct ixgbe_q_vector *q_vector = data;
2473 /* EIAM disabled interrupts (on this vector) for us */
2475 if (q_vector->rx.ring || q_vector->tx.ring)
2476 napi_schedule(&q_vector->napi);
2482 * ixgbe_poll - NAPI Rx polling callback
2483 * @napi: structure for representing this polling device
2484 * @budget: how many packets driver is allowed to clean
2486 * This function is used for legacy and MSI, NAPI mode
2488 int ixgbe_poll(struct napi_struct *napi, int budget)
2490 struct ixgbe_q_vector *q_vector =
2491 container_of(napi, struct ixgbe_q_vector, napi);
2492 struct ixgbe_adapter *adapter = q_vector->adapter;
2493 struct ixgbe_ring *ring;
2494 int per_ring_budget;
2495 bool clean_complete = true;
2497 #ifdef CONFIG_IXGBE_DCA
2498 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2499 ixgbe_update_dca(q_vector);
2502 ixgbe_for_each_ring(ring, q_vector->tx)
2503 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2505 /* attempt to distribute budget to each queue fairly, but don't allow
2506 * the budget to go below 1 because we'll exit polling */
2507 if (q_vector->rx.count > 1)
2508 per_ring_budget = max(budget/q_vector->rx.count, 1);
2510 per_ring_budget = budget;
2512 ixgbe_for_each_ring(ring, q_vector->rx)
2513 clean_complete &= ixgbe_clean_rx_irq(q_vector, ring,
2516 /* If all work not completed, return budget and keep polling */
2517 if (!clean_complete)
2520 /* all work done, exit the polling mode */
2521 napi_complete(napi);
2522 if (adapter->rx_itr_setting & 1)
2523 ixgbe_set_itr(q_vector);
2524 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2525 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2531 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2532 * @adapter: board private structure
2534 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2535 * interrupts from the kernel.
2537 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2539 struct net_device *netdev = adapter->netdev;
2543 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2544 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2545 struct msix_entry *entry = &adapter->msix_entries[vector];
2547 if (q_vector->tx.ring && q_vector->rx.ring) {
2548 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2549 "%s-%s-%d", netdev->name, "TxRx", ri++);
2551 } else if (q_vector->rx.ring) {
2552 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2553 "%s-%s-%d", netdev->name, "rx", ri++);
2554 } else if (q_vector->tx.ring) {
2555 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2556 "%s-%s-%d", netdev->name, "tx", ti++);
2558 /* skip this unused q_vector */
2561 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2562 q_vector->name, q_vector);
2564 e_err(probe, "request_irq failed for MSIX interrupt "
2565 "Error: %d\n", err);
2566 goto free_queue_irqs;
2568 /* If Flow Director is enabled, set interrupt affinity */
2569 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2570 /* assign the mask for this irq */
2571 irq_set_affinity_hint(entry->vector,
2572 &q_vector->affinity_mask);
2576 err = request_irq(adapter->msix_entries[vector].vector,
2577 ixgbe_msix_other, 0, netdev->name, adapter);
2579 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2580 goto free_queue_irqs;
2588 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2590 free_irq(adapter->msix_entries[vector].vector,
2591 adapter->q_vector[vector]);
2593 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2594 pci_disable_msix(adapter->pdev);
2595 kfree(adapter->msix_entries);
2596 adapter->msix_entries = NULL;
2601 * ixgbe_intr - legacy mode Interrupt Handler
2602 * @irq: interrupt number
2603 * @data: pointer to a network interface device structure
2605 static irqreturn_t ixgbe_intr(int irq, void *data)
2607 struct ixgbe_adapter *adapter = data;
2608 struct ixgbe_hw *hw = &adapter->hw;
2609 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2613 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2614 * before the read of EICR.
2616 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2618 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2619 * therefore no explicit interrupt disable is necessary */
2620 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2623 * shared interrupt alert!
2624 * make sure interrupts are enabled because the read will
2625 * have disabled interrupts due to EIAM
2626 * finish the workaround of silicon errata on 82598. Unmask
2627 * the interrupt that we masked before the EICR read.
2629 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2630 ixgbe_irq_enable(adapter, true, true);
2631 return IRQ_NONE; /* Not our interrupt */
2634 if (eicr & IXGBE_EICR_LSC)
2635 ixgbe_check_lsc(adapter);
2637 switch (hw->mac.type) {
2638 case ixgbe_mac_82599EB:
2639 ixgbe_check_sfp_event(adapter, eicr);
2641 case ixgbe_mac_X540:
2642 if (eicr & IXGBE_EICR_ECC)
2643 e_info(link, "Received unrecoverable ECC err, please "
2645 ixgbe_check_overtemp_event(adapter, eicr);
2651 ixgbe_check_fan_failure(adapter, eicr);
2652 #ifdef CONFIG_IXGBE_PTP
2653 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2654 ixgbe_ptp_check_pps_event(adapter, eicr);
2657 /* would disable interrupts here but EIAM disabled it */
2658 napi_schedule(&q_vector->napi);
2661 * re-enable link(maybe) and non-queue interrupts, no flush.
2662 * ixgbe_poll will re-enable the queue interrupts
2664 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2665 ixgbe_irq_enable(adapter, false, false);
2671 * ixgbe_request_irq - initialize interrupts
2672 * @adapter: board private structure
2674 * Attempts to configure interrupts using the best available
2675 * capabilities of the hardware and kernel.
2677 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2679 struct net_device *netdev = adapter->netdev;
2682 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2683 err = ixgbe_request_msix_irqs(adapter);
2684 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2685 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2686 netdev->name, adapter);
2688 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2689 netdev->name, adapter);
2692 e_err(probe, "request_irq failed, Error %d\n", err);
2697 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2701 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2702 free_irq(adapter->pdev->irq, adapter);
2706 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2707 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2708 struct msix_entry *entry = &adapter->msix_entries[vector];
2710 /* free only the irqs that were actually requested */
2711 if (!q_vector->rx.ring && !q_vector->tx.ring)
2714 /* clear the affinity_mask in the IRQ descriptor */
2715 irq_set_affinity_hint(entry->vector, NULL);
2717 free_irq(entry->vector, q_vector);
2720 free_irq(adapter->msix_entries[vector++].vector, adapter);
2724 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2725 * @adapter: board private structure
2727 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
2729 switch (adapter->hw.mac.type) {
2730 case ixgbe_mac_82598EB:
2731 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
2733 case ixgbe_mac_82599EB:
2734 case ixgbe_mac_X540:
2735 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
2736 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
2737 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
2742 IXGBE_WRITE_FLUSH(&adapter->hw);
2743 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2746 for (vector = 0; vector < adapter->num_q_vectors; vector++)
2747 synchronize_irq(adapter->msix_entries[vector].vector);
2749 synchronize_irq(adapter->msix_entries[vector++].vector);
2751 synchronize_irq(adapter->pdev->irq);
2756 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2759 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
2761 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2764 if (adapter->rx_itr_setting == 1)
2765 q_vector->itr = IXGBE_20K_ITR;
2767 q_vector->itr = adapter->rx_itr_setting;
2769 ixgbe_write_eitr(q_vector);
2771 ixgbe_set_ivar(adapter, 0, 0, 0);
2772 ixgbe_set_ivar(adapter, 1, 0, 0);
2774 e_info(hw, "Legacy interrupt IVAR setup done\n");
2778 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
2779 * @adapter: board private structure
2780 * @ring: structure containing ring specific data
2782 * Configure the Tx descriptor ring after a reset.
2784 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
2785 struct ixgbe_ring *ring)
2787 struct ixgbe_hw *hw = &adapter->hw;
2788 u64 tdba = ring->dma;
2790 u32 txdctl = IXGBE_TXDCTL_ENABLE;
2791 u8 reg_idx = ring->reg_idx;
2793 /* disable queue to avoid issues while updating state */
2794 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
2795 IXGBE_WRITE_FLUSH(hw);
2797 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
2798 (tdba & DMA_BIT_MASK(32)));
2799 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
2800 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
2801 ring->count * sizeof(union ixgbe_adv_tx_desc));
2802 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
2803 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
2804 ring->tail = hw->hw_addr + IXGBE_TDT(reg_idx);
2807 * set WTHRESH to encourage burst writeback, it should not be set
2808 * higher than 1 when ITR is 0 as it could cause false TX hangs
2810 * In order to avoid issues WTHRESH + PTHRESH should always be equal
2811 * to or less than the number of on chip descriptors, which is
2814 if (!ring->q_vector || (ring->q_vector->itr < 8))
2815 txdctl |= (1 << 16); /* WTHRESH = 1 */
2817 txdctl |= (8 << 16); /* WTHRESH = 8 */
2820 * Setting PTHRESH to 32 both improves performance
2821 * and avoids a TX hang with DFP enabled
2823 txdctl |= (1 << 8) | /* HTHRESH = 1 */
2824 32; /* PTHRESH = 32 */
2826 /* reinitialize flowdirector state */
2827 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2828 ring->atr_sample_rate = adapter->atr_sample_rate;
2829 ring->atr_count = 0;
2830 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
2832 ring->atr_sample_rate = 0;
2835 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
2838 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
2840 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
2841 if (hw->mac.type == ixgbe_mac_82598EB &&
2842 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
2845 /* poll to verify queue is enabled */
2847 usleep_range(1000, 2000);
2848 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
2849 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
2851 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
2854 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
2856 struct ixgbe_hw *hw = &adapter->hw;
2858 u8 tcs = netdev_get_num_tc(adapter->netdev);
2860 if (hw->mac.type == ixgbe_mac_82598EB)
2863 /* disable the arbiter while setting MTQC */
2864 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
2865 rttdcs |= IXGBE_RTTDCS_ARBDIS;
2866 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2868 /* set transmit pool layout */
2869 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
2870 mtqc = IXGBE_MTQC_VT_ENA;
2872 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
2874 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
2875 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
2876 mtqc |= IXGBE_MTQC_32VF;
2878 mtqc |= IXGBE_MTQC_64VF;
2881 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
2883 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
2885 mtqc = IXGBE_MTQC_64Q_1PB;
2888 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
2890 /* Enable Security TX Buffer IFG for multiple pb */
2892 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
2893 sectx |= IXGBE_SECTX_DCB;
2894 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
2897 /* re-enable the arbiter */
2898 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
2899 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2903 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
2904 * @adapter: board private structure
2906 * Configure the Tx unit of the MAC after a reset.
2908 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
2910 struct ixgbe_hw *hw = &adapter->hw;
2914 ixgbe_setup_mtqc(adapter);
2916 if (hw->mac.type != ixgbe_mac_82598EB) {
2917 /* DMATXCTL.EN must be before Tx queues are enabled */
2918 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
2919 dmatxctl |= IXGBE_DMATXCTL_TE;
2920 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
2923 /* Setup the HW Tx Head and Tail descriptor pointers */
2924 for (i = 0; i < adapter->num_tx_queues; i++)
2925 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
2928 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
2929 struct ixgbe_ring *ring)
2931 struct ixgbe_hw *hw = &adapter->hw;
2932 u8 reg_idx = ring->reg_idx;
2933 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
2935 srrctl |= IXGBE_SRRCTL_DROP_EN;
2937 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
2940 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
2941 struct ixgbe_ring *ring)
2943 struct ixgbe_hw *hw = &adapter->hw;
2944 u8 reg_idx = ring->reg_idx;
2945 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
2947 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
2949 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
2952 #ifdef CONFIG_IXGBE_DCB
2953 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
2955 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
2959 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
2961 if (adapter->ixgbe_ieee_pfc)
2962 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
2965 * We should set the drop enable bit if:
2968 * Number of Rx queues > 1 and flow control is disabled
2970 * This allows us to avoid head of line blocking for security
2971 * and performance reasons.
2973 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
2974 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
2975 for (i = 0; i < adapter->num_rx_queues; i++)
2976 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
2978 for (i = 0; i < adapter->num_rx_queues; i++)
2979 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
2983 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
2985 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
2986 struct ixgbe_ring *rx_ring)
2988 struct ixgbe_hw *hw = &adapter->hw;
2990 u8 reg_idx = rx_ring->reg_idx;
2992 if (hw->mac.type == ixgbe_mac_82598EB) {
2993 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
2996 * if VMDq is not active we must program one srrctl register
2997 * per RSS queue since we have enabled RDRXCTL.MVMEN
3002 /* configure header buffer length, needed for RSC */
3003 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3005 /* configure the packet buffer length */
3006 srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3008 /* configure descriptor type */
3009 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3011 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3014 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3016 struct ixgbe_hw *hw = &adapter->hw;
3017 static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
3018 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
3019 0x6A3E67EA, 0x14364D17, 0x3BED200D};
3020 u32 mrqc = 0, reta = 0;
3023 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3026 * Program table for at least 2 queues w/ SR-IOV so that VFs can
3027 * make full use of any rings they may have. We will use the
3028 * PSRTYPE register to control how many rings we use within the PF.
3030 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
3033 /* Fill out hash function seeds */
3034 for (i = 0; i < 10; i++)
3035 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
3037 /* Fill out redirection table */
3038 for (i = 0, j = 0; i < 128; i++, j++) {
3041 /* reta = 4-byte sliding window of
3042 * 0x00..(indices-1)(indices-1)00..etc. */
3043 reta = (reta << 8) | (j * 0x11);
3045 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3048 /* Disable indicating checksum in descriptor, enables RSS hash */
3049 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3050 rxcsum |= IXGBE_RXCSUM_PCSD;
3051 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3053 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3054 if (adapter->ring_feature[RING_F_RSS].mask)
3055 mrqc = IXGBE_MRQC_RSSEN;
3057 u8 tcs = netdev_get_num_tc(adapter->netdev);
3059 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3061 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
3063 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
3064 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3065 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3067 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3070 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3072 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3074 mrqc = IXGBE_MRQC_RSSEN;
3078 /* Perform hash on these packet types */
3079 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3080 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3081 IXGBE_MRQC_RSS_FIELD_IPV6 |
3082 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3084 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3085 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3086 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3087 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3089 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3093 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3094 * @adapter: address of board private structure
3095 * @index: index of ring to set
3097 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3098 struct ixgbe_ring *ring)
3100 struct ixgbe_hw *hw = &adapter->hw;
3102 u8 reg_idx = ring->reg_idx;
3104 if (!ring_is_rsc_enabled(ring))
3107 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3108 rscctrl |= IXGBE_RSCCTL_RSCEN;
3110 * we must limit the number of descriptors so that the
3111 * total size of max desc * buf_len is not greater
3114 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3115 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3118 #define IXGBE_MAX_RX_DESC_POLL 10
3119 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3120 struct ixgbe_ring *ring)
3122 struct ixgbe_hw *hw = &adapter->hw;
3123 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3125 u8 reg_idx = ring->reg_idx;
3127 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3128 if (hw->mac.type == ixgbe_mac_82598EB &&
3129 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3133 usleep_range(1000, 2000);
3134 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3135 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3138 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3139 "the polling period\n", reg_idx);
3143 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3144 struct ixgbe_ring *ring)
3146 struct ixgbe_hw *hw = &adapter->hw;
3147 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3149 u8 reg_idx = ring->reg_idx;
3151 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3152 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3154 /* write value back with RXDCTL.ENABLE bit cleared */
3155 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3157 if (hw->mac.type == ixgbe_mac_82598EB &&
3158 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3161 /* the hardware may take up to 100us to really disable the rx queue */
3164 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3165 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3168 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3169 "the polling period\n", reg_idx);
3173 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3174 struct ixgbe_ring *ring)
3176 struct ixgbe_hw *hw = &adapter->hw;
3177 u64 rdba = ring->dma;
3179 u8 reg_idx = ring->reg_idx;
3181 /* disable queue to avoid issues while updating state */
3182 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3183 ixgbe_disable_rx_queue(adapter, ring);
3185 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3186 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3187 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3188 ring->count * sizeof(union ixgbe_adv_rx_desc));
3189 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3190 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3191 ring->tail = hw->hw_addr + IXGBE_RDT(reg_idx);
3193 ixgbe_configure_srrctl(adapter, ring);
3194 ixgbe_configure_rscctl(adapter, ring);
3196 /* If operating in IOV mode set RLPML for X540 */
3197 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
3198 hw->mac.type == ixgbe_mac_X540) {
3199 rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK;
3200 rxdctl |= ((ring->netdev->mtu + ETH_HLEN +
3201 ETH_FCS_LEN + VLAN_HLEN) | IXGBE_RXDCTL_RLPML_EN);
3204 if (hw->mac.type == ixgbe_mac_82598EB) {
3206 * enable cache line friendly hardware writes:
3207 * PTHRESH=32 descriptors (half the internal cache),
3208 * this also removes ugly rx_no_buffer_count increment
3209 * HTHRESH=4 descriptors (to minimize latency on fetch)
3210 * WTHRESH=8 burst writeback up to two cache lines
3212 rxdctl &= ~0x3FFFFF;
3216 /* enable receive descriptor ring */
3217 rxdctl |= IXGBE_RXDCTL_ENABLE;
3218 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3220 ixgbe_rx_desc_queue_enable(adapter, ring);
3221 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3224 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3226 struct ixgbe_hw *hw = &adapter->hw;
3227 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3230 /* PSRTYPE must be initialized in non 82598 adapters */
3231 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3232 IXGBE_PSRTYPE_UDPHDR |
3233 IXGBE_PSRTYPE_IPV4HDR |
3234 IXGBE_PSRTYPE_L2HDR |
3235 IXGBE_PSRTYPE_IPV6HDR;
3237 if (hw->mac.type == ixgbe_mac_82598EB)
3245 for (p = 0; p < adapter->num_rx_pools; p++)
3246 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(p)),
3250 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3252 struct ixgbe_hw *hw = &adapter->hw;
3253 u32 reg_offset, vf_shift;
3254 u32 gcr_ext, vmdctl;
3257 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3260 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3261 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3262 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3263 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3264 vmdctl |= IXGBE_VT_CTL_REPLEN;
3265 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3267 vf_shift = VMDQ_P(0) % 32;
3268 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3270 /* Enable only the PF's pool for Tx/Rx */
3271 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift);
3272 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3273 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
3274 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3275 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3277 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3278 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3281 * Set up VF register offsets for selected VT Mode,
3282 * i.e. 32 or 64 VFs for SR-IOV
3284 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3285 case IXGBE_82599_VMDQ_8Q_MASK:
3286 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3288 case IXGBE_82599_VMDQ_4Q_MASK:
3289 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3292 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3296 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3298 /* enable Tx loopback for VF/PF communication */
3299 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3301 /* Enable MAC Anti-Spoofing */
3302 hw->mac.ops.set_mac_anti_spoofing(hw, (adapter->num_vfs != 0),
3304 /* For VFs that have spoof checking turned off */
3305 for (i = 0; i < adapter->num_vfs; i++) {
3306 if (!adapter->vfinfo[i].spoofchk_enabled)
3307 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3311 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3313 struct ixgbe_hw *hw = &adapter->hw;
3314 struct net_device *netdev = adapter->netdev;
3315 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3316 struct ixgbe_ring *rx_ring;
3321 /* adjust max frame to be able to do baby jumbo for FCoE */
3322 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3323 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3324 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3326 #endif /* IXGBE_FCOE */
3328 /* adjust max frame to be at least the size of a standard frame */
3329 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3330 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3332 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3333 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3334 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3335 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3337 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3340 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3341 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3342 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3343 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3346 * Setup the HW Rx Head and Tail Descriptor Pointers and
3347 * the Base and Length of the Rx Descriptor Ring
3349 for (i = 0; i < adapter->num_rx_queues; i++) {
3350 rx_ring = adapter->rx_ring[i];
3351 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3352 set_ring_rsc_enabled(rx_ring);
3354 clear_ring_rsc_enabled(rx_ring);
3358 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3360 struct ixgbe_hw *hw = &adapter->hw;
3361 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3363 switch (hw->mac.type) {
3364 case ixgbe_mac_82598EB:
3366 * For VMDq support of different descriptor types or
3367 * buffer sizes through the use of multiple SRRCTL
3368 * registers, RDRXCTL.MVMEN must be set to 1
3370 * also, the manual doesn't mention it clearly but DCA hints
3371 * will only use queue 0's tags unless this bit is set. Side
3372 * effects of setting this bit are only that SRRCTL must be
3373 * fully programmed [0..15]
3375 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3377 case ixgbe_mac_82599EB:
3378 case ixgbe_mac_X540:
3379 /* Disable RSC for ACK packets */
3380 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3381 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3382 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3383 /* hardware requires some bits to be set by default */
3384 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3385 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3388 /* We should do nothing since we don't know this hardware */
3392 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3396 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3397 * @adapter: board private structure
3399 * Configure the Rx unit of the MAC after a reset.
3401 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3403 struct ixgbe_hw *hw = &adapter->hw;
3407 /* disable receives while setting up the descriptors */
3408 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3409 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
3411 ixgbe_setup_psrtype(adapter);
3412 ixgbe_setup_rdrxctl(adapter);
3414 /* Program registers for the distribution of queues */
3415 ixgbe_setup_mrqc(adapter);
3417 /* set_rx_buffer_len must be called before ring initialization */
3418 ixgbe_set_rx_buffer_len(adapter);
3421 * Setup the HW Rx Head and Tail Descriptor Pointers and
3422 * the Base and Length of the Rx Descriptor Ring
3424 for (i = 0; i < adapter->num_rx_queues; i++)
3425 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3427 /* disable drop enable for 82598 parts */
3428 if (hw->mac.type == ixgbe_mac_82598EB)
3429 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3431 /* enable all receives */
3432 rxctrl |= IXGBE_RXCTRL_RXEN;
3433 hw->mac.ops.enable_rx_dma(hw, rxctrl);
3436 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
3438 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3439 struct ixgbe_hw *hw = &adapter->hw;
3441 /* add VID to filter table */
3442 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true);
3443 set_bit(vid, adapter->active_vlans);
3448 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
3450 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3451 struct ixgbe_hw *hw = &adapter->hw;
3453 /* remove VID from filter table */
3454 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), false);
3455 clear_bit(vid, adapter->active_vlans);
3461 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
3462 * @adapter: driver data
3464 static void ixgbe_vlan_filter_disable(struct ixgbe_adapter *adapter)
3466 struct ixgbe_hw *hw = &adapter->hw;
3469 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3470 vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
3471 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3475 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
3476 * @adapter: driver data
3478 static void ixgbe_vlan_filter_enable(struct ixgbe_adapter *adapter)
3480 struct ixgbe_hw *hw = &adapter->hw;
3483 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3484 vlnctrl |= IXGBE_VLNCTRL_VFE;
3485 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
3486 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3490 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3491 * @adapter: driver data
3493 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3495 struct ixgbe_hw *hw = &adapter->hw;
3499 switch (hw->mac.type) {
3500 case ixgbe_mac_82598EB:
3501 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3502 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3503 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3505 case ixgbe_mac_82599EB:
3506 case ixgbe_mac_X540:
3507 for (i = 0; i < adapter->num_rx_queues; i++) {
3508 j = adapter->rx_ring[i]->reg_idx;
3509 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3510 vlnctrl &= ~IXGBE_RXDCTL_VME;
3511 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3520 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3521 * @adapter: driver data
3523 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3525 struct ixgbe_hw *hw = &adapter->hw;
3529 switch (hw->mac.type) {
3530 case ixgbe_mac_82598EB:
3531 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3532 vlnctrl |= IXGBE_VLNCTRL_VME;
3533 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3535 case ixgbe_mac_82599EB:
3536 case ixgbe_mac_X540:
3537 for (i = 0; i < adapter->num_rx_queues; i++) {
3538 j = adapter->rx_ring[i]->reg_idx;
3539 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3540 vlnctrl |= IXGBE_RXDCTL_VME;
3541 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3549 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3553 ixgbe_vlan_rx_add_vid(adapter->netdev, 0);
3555 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
3556 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
3560 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3561 * @netdev: network interface device structure
3563 * Writes unicast address list to the RAR table.
3564 * Returns: -ENOMEM on failure/insufficient address space
3565 * 0 on no addresses written
3566 * X on writing X addresses to the RAR table
3568 static int ixgbe_write_uc_addr_list(struct net_device *netdev)
3570 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3571 struct ixgbe_hw *hw = &adapter->hw;
3572 unsigned int rar_entries = hw->mac.num_rar_entries - 1;
3575 /* In SR-IOV mode significantly less RAR entries are available */
3576 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3577 rar_entries = IXGBE_MAX_PF_MACVLANS - 1;
3579 /* return ENOMEM indicating insufficient memory for addresses */
3580 if (netdev_uc_count(netdev) > rar_entries)
3583 if (!netdev_uc_empty(netdev)) {
3584 struct netdev_hw_addr *ha;
3585 /* return error if we do not support writing to RAR table */
3586 if (!hw->mac.ops.set_rar)
3589 netdev_for_each_uc_addr(ha, netdev) {
3592 hw->mac.ops.set_rar(hw, rar_entries--, ha->addr,
3593 VMDQ_P(0), IXGBE_RAH_AV);
3597 /* write the addresses in reverse order to avoid write combining */
3598 for (; rar_entries > 0 ; rar_entries--)
3599 hw->mac.ops.clear_rar(hw, rar_entries);
3605 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
3606 * @netdev: network interface device structure
3608 * The set_rx_method entry point is called whenever the unicast/multicast
3609 * address list or the network interface flags are updated. This routine is
3610 * responsible for configuring the hardware for proper unicast, multicast and
3613 void ixgbe_set_rx_mode(struct net_device *netdev)
3615 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3616 struct ixgbe_hw *hw = &adapter->hw;
3617 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
3620 /* Check for Promiscuous and All Multicast modes */
3622 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3624 /* set all bits that we expect to always be set */
3625 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
3626 fctrl |= IXGBE_FCTRL_BAM;
3627 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
3628 fctrl |= IXGBE_FCTRL_PMCF;
3630 /* clear the bits we are changing the status of */
3631 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3633 if (netdev->flags & IFF_PROMISC) {
3634 hw->addr_ctrl.user_set_promisc = true;
3635 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3636 vmolr |= (IXGBE_VMOLR_ROPE | IXGBE_VMOLR_MPE);
3637 /* don't hardware filter vlans in promisc mode */
3638 ixgbe_vlan_filter_disable(adapter);
3640 if (netdev->flags & IFF_ALLMULTI) {
3641 fctrl |= IXGBE_FCTRL_MPE;
3642 vmolr |= IXGBE_VMOLR_MPE;
3645 * Write addresses to the MTA, if the attempt fails
3646 * then we should just turn on promiscuous mode so
3647 * that we can at least receive multicast traffic
3649 hw->mac.ops.update_mc_addr_list(hw, netdev);
3650 vmolr |= IXGBE_VMOLR_ROMPE;
3652 ixgbe_vlan_filter_enable(adapter);
3653 hw->addr_ctrl.user_set_promisc = false;
3657 * Write addresses to available RAR registers, if there is not
3658 * sufficient space to store all the addresses then enable
3659 * unicast promiscuous mode
3661 count = ixgbe_write_uc_addr_list(netdev);
3663 fctrl |= IXGBE_FCTRL_UPE;
3664 vmolr |= IXGBE_VMOLR_ROPE;
3667 if (adapter->num_vfs)
3668 ixgbe_restore_vf_multicasts(adapter);
3670 if (hw->mac.type != ixgbe_mac_82598EB) {
3671 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
3672 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
3674 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
3677 /* This is useful for sniffing bad packets. */
3678 if (adapter->netdev->features & NETIF_F_RXALL) {
3679 /* UPE and MPE will be handled by normal PROMISC logic
3680 * in e1000e_set_rx_mode */
3681 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
3682 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
3683 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
3685 fctrl &= ~(IXGBE_FCTRL_DPF);
3686 /* NOTE: VLAN filtering is disabled by setting PROMISC */
3689 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
3691 if (netdev->features & NETIF_F_HW_VLAN_RX)
3692 ixgbe_vlan_strip_enable(adapter);
3694 ixgbe_vlan_strip_disable(adapter);
3697 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
3701 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
3702 napi_enable(&adapter->q_vector[q_idx]->napi);
3705 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
3709 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
3710 napi_disable(&adapter->q_vector[q_idx]->napi);
3713 #ifdef CONFIG_IXGBE_DCB
3715 * ixgbe_configure_dcb - Configure DCB hardware
3716 * @adapter: ixgbe adapter struct
3718 * This is called by the driver on open to configure the DCB hardware.
3719 * This is also called by the gennetlink interface when reconfiguring
3722 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
3724 struct ixgbe_hw *hw = &adapter->hw;
3725 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3727 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
3728 if (hw->mac.type == ixgbe_mac_82598EB)
3729 netif_set_gso_max_size(adapter->netdev, 65536);
3733 if (hw->mac.type == ixgbe_mac_82598EB)
3734 netif_set_gso_max_size(adapter->netdev, 32768);
3737 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
3738 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
3741 /* reconfigure the hardware */
3742 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
3743 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
3745 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
3747 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
3748 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
3749 ixgbe_dcb_hw_ets(&adapter->hw,
3750 adapter->ixgbe_ieee_ets,
3752 ixgbe_dcb_hw_pfc_config(&adapter->hw,
3753 adapter->ixgbe_ieee_pfc->pfc_en,
3754 adapter->ixgbe_ieee_ets->prio_tc);
3757 /* Enable RSS Hash per TC */
3758 if (hw->mac.type != ixgbe_mac_82598EB) {
3760 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
3767 /* write msb to all 8 TCs in one write */
3768 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
3773 /* Additional bittime to account for IXGBE framing */
3774 #define IXGBE_ETH_FRAMING 20
3777 * ixgbe_hpbthresh - calculate high water mark for flow control
3779 * @adapter: board private structure to calculate for
3780 * @pb: packet buffer to calculate
3782 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
3784 struct ixgbe_hw *hw = &adapter->hw;
3785 struct net_device *dev = adapter->netdev;
3786 int link, tc, kb, marker;
3789 /* Calculate max LAN frame size */
3790 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
3793 /* FCoE traffic class uses FCOE jumbo frames */
3794 if ((dev->features & NETIF_F_FCOE_MTU) &&
3795 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
3796 (pb == ixgbe_fcoe_get_tc(adapter)))
3797 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3800 /* Calculate delay value for device */
3801 switch (hw->mac.type) {
3802 case ixgbe_mac_X540:
3803 dv_id = IXGBE_DV_X540(link, tc);
3806 dv_id = IXGBE_DV(link, tc);
3810 /* Loopback switch introduces additional latency */
3811 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3812 dv_id += IXGBE_B2BT(tc);
3814 /* Delay value is calculated in bit times convert to KB */
3815 kb = IXGBE_BT2KB(dv_id);
3816 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
3818 marker = rx_pba - kb;
3820 /* It is possible that the packet buffer is not large enough
3821 * to provide required headroom. In this case throw an error
3822 * to user and a do the best we can.
3825 e_warn(drv, "Packet Buffer(%i) can not provide enough"
3826 "headroom to support flow control."
3827 "Decrease MTU or number of traffic classes\n", pb);
3835 * ixgbe_lpbthresh - calculate low water mark for for flow control
3837 * @adapter: board private structure to calculate for
3838 * @pb: packet buffer to calculate
3840 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter)
3842 struct ixgbe_hw *hw = &adapter->hw;
3843 struct net_device *dev = adapter->netdev;
3847 /* Calculate max LAN frame size */
3848 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
3850 /* Calculate delay value for device */
3851 switch (hw->mac.type) {
3852 case ixgbe_mac_X540:
3853 dv_id = IXGBE_LOW_DV_X540(tc);
3856 dv_id = IXGBE_LOW_DV(tc);
3860 /* Delay value is calculated in bit times convert to KB */
3861 return IXGBE_BT2KB(dv_id);
3865 * ixgbe_pbthresh_setup - calculate and setup high low water marks
3867 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
3869 struct ixgbe_hw *hw = &adapter->hw;
3870 int num_tc = netdev_get_num_tc(adapter->netdev);
3876 hw->fc.low_water = ixgbe_lpbthresh(adapter);
3878 for (i = 0; i < num_tc; i++) {
3879 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
3881 /* Low water marks must not be larger than high water marks */
3882 if (hw->fc.low_water > hw->fc.high_water[i])
3883 hw->fc.low_water = 0;
3887 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
3889 struct ixgbe_hw *hw = &adapter->hw;
3891 u8 tc = netdev_get_num_tc(adapter->netdev);
3893 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
3894 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
3895 hdrm = 32 << adapter->fdir_pballoc;
3899 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
3900 ixgbe_pbthresh_setup(adapter);
3903 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
3905 struct ixgbe_hw *hw = &adapter->hw;
3906 struct hlist_node *node, *node2;
3907 struct ixgbe_fdir_filter *filter;
3909 spin_lock(&adapter->fdir_perfect_lock);
3911 if (!hlist_empty(&adapter->fdir_filter_list))
3912 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
3914 hlist_for_each_entry_safe(filter, node, node2,
3915 &adapter->fdir_filter_list, fdir_node) {
3916 ixgbe_fdir_write_perfect_filter_82599(hw,
3919 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
3920 IXGBE_FDIR_DROP_QUEUE :
3921 adapter->rx_ring[filter->action]->reg_idx);
3924 spin_unlock(&adapter->fdir_perfect_lock);
3927 static void ixgbe_configure(struct ixgbe_adapter *adapter)
3929 struct ixgbe_hw *hw = &adapter->hw;
3931 ixgbe_configure_pb(adapter);
3932 #ifdef CONFIG_IXGBE_DCB
3933 ixgbe_configure_dcb(adapter);
3936 * We must restore virtualization before VLANs or else
3937 * the VLVF registers will not be populated
3939 ixgbe_configure_virtualization(adapter);
3941 ixgbe_set_rx_mode(adapter->netdev);
3942 ixgbe_restore_vlan(adapter);
3944 switch (hw->mac.type) {
3945 case ixgbe_mac_82599EB:
3946 case ixgbe_mac_X540:
3947 hw->mac.ops.disable_rx_buff(hw);
3953 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3954 ixgbe_init_fdir_signature_82599(&adapter->hw,
3955 adapter->fdir_pballoc);
3956 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
3957 ixgbe_init_fdir_perfect_82599(&adapter->hw,
3958 adapter->fdir_pballoc);
3959 ixgbe_fdir_filter_restore(adapter);
3962 switch (hw->mac.type) {
3963 case ixgbe_mac_82599EB:
3964 case ixgbe_mac_X540:
3965 hw->mac.ops.enable_rx_buff(hw);
3972 /* configure FCoE L2 filters, redirection table, and Rx control */
3973 ixgbe_configure_fcoe(adapter);
3975 #endif /* IXGBE_FCOE */
3976 ixgbe_configure_tx(adapter);
3977 ixgbe_configure_rx(adapter);
3980 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
3982 switch (hw->phy.type) {
3983 case ixgbe_phy_sfp_avago:
3984 case ixgbe_phy_sfp_ftl:
3985 case ixgbe_phy_sfp_intel:
3986 case ixgbe_phy_sfp_unknown:
3987 case ixgbe_phy_sfp_passive_tyco:
3988 case ixgbe_phy_sfp_passive_unknown:
3989 case ixgbe_phy_sfp_active_unknown:
3990 case ixgbe_phy_sfp_ftl_active:
3993 if (hw->mac.type == ixgbe_mac_82598EB)
4001 * ixgbe_sfp_link_config - set up SFP+ link
4002 * @adapter: pointer to private adapter struct
4004 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
4007 * We are assuming the worst case scenario here, and that
4008 * is that an SFP was inserted/removed after the reset
4009 * but before SFP detection was enabled. As such the best
4010 * solution is to just start searching as soon as we start
4012 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
4013 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
4015 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
4019 * ixgbe_non_sfp_link_config - set up non-SFP+ link
4020 * @hw: pointer to private hardware struct
4022 * Returns 0 on success, negative on failure
4024 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
4027 bool negotiation, link_up = false;
4028 u32 ret = IXGBE_ERR_LINK_SETUP;
4030 if (hw->mac.ops.check_link)
4031 ret = hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
4036 autoneg = hw->phy.autoneg_advertised;
4037 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
4038 ret = hw->mac.ops.get_link_capabilities(hw, &autoneg,
4043 if (hw->mac.ops.setup_link)
4044 ret = hw->mac.ops.setup_link(hw, autoneg, negotiation, link_up);
4049 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
4051 struct ixgbe_hw *hw = &adapter->hw;
4054 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4055 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
4057 gpie |= IXGBE_GPIE_EIAME;
4059 * use EIAM to auto-mask when MSI-X interrupt is asserted
4060 * this saves a register write for every interrupt
4062 switch (hw->mac.type) {
4063 case ixgbe_mac_82598EB:
4064 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4066 case ixgbe_mac_82599EB:
4067 case ixgbe_mac_X540:
4069 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4070 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4074 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4075 * specifically only auto mask tx and rx interrupts */
4076 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4079 /* XXX: to interrupt immediately for EICS writes, enable this */
4080 /* gpie |= IXGBE_GPIE_EIMEN; */
4082 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
4083 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
4085 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4086 case IXGBE_82599_VMDQ_8Q_MASK:
4087 gpie |= IXGBE_GPIE_VTMODE_16;
4089 case IXGBE_82599_VMDQ_4Q_MASK:
4090 gpie |= IXGBE_GPIE_VTMODE_32;
4093 gpie |= IXGBE_GPIE_VTMODE_64;
4098 /* Enable Thermal over heat sensor interrupt */
4099 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
4100 switch (adapter->hw.mac.type) {
4101 case ixgbe_mac_82599EB:
4102 gpie |= IXGBE_SDP0_GPIEN;
4104 case ixgbe_mac_X540:
4105 gpie |= IXGBE_EIMS_TS;
4112 /* Enable fan failure interrupt */
4113 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
4114 gpie |= IXGBE_SDP1_GPIEN;
4116 if (hw->mac.type == ixgbe_mac_82599EB) {
4117 gpie |= IXGBE_SDP1_GPIEN;
4118 gpie |= IXGBE_SDP2_GPIEN;
4121 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4124 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
4126 struct ixgbe_hw *hw = &adapter->hw;
4130 ixgbe_get_hw_control(adapter);
4131 ixgbe_setup_gpie(adapter);
4133 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4134 ixgbe_configure_msix(adapter);
4136 ixgbe_configure_msi_and_legacy(adapter);
4138 /* enable the optics for 82599 SFP+ fiber */
4139 if (hw->mac.ops.enable_tx_laser)
4140 hw->mac.ops.enable_tx_laser(hw);
4142 clear_bit(__IXGBE_DOWN, &adapter->state);
4143 ixgbe_napi_enable_all(adapter);
4145 if (ixgbe_is_sfp(hw)) {
4146 ixgbe_sfp_link_config(adapter);
4148 err = ixgbe_non_sfp_link_config(hw);
4150 e_err(probe, "link_config FAILED %d\n", err);
4153 /* clear any pending interrupts, may auto mask */
4154 IXGBE_READ_REG(hw, IXGBE_EICR);
4155 ixgbe_irq_enable(adapter, true, true);
4158 * If this adapter has a fan, check to see if we had a failure
4159 * before we enabled the interrupt.
4161 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
4162 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
4163 if (esdp & IXGBE_ESDP_SDP1)
4164 e_crit(drv, "Fan has stopped, replace the adapter\n");
4167 /* enable transmits */
4168 netif_tx_start_all_queues(adapter->netdev);
4170 /* bring the link up in the watchdog, this could race with our first
4171 * link up interrupt but shouldn't be a problem */
4172 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
4173 adapter->link_check_timeout = jiffies;
4174 mod_timer(&adapter->service_timer, jiffies);
4176 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4177 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
4178 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
4179 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
4182 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
4184 WARN_ON(in_interrupt());
4185 /* put off any impending NetWatchDogTimeout */
4186 adapter->netdev->trans_start = jiffies;
4188 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
4189 usleep_range(1000, 2000);
4190 ixgbe_down(adapter);
4192 * If SR-IOV enabled then wait a bit before bringing the adapter
4193 * back up to give the VFs time to respond to the reset. The
4194 * two second wait is based upon the watchdog timer cycle in
4197 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4200 clear_bit(__IXGBE_RESETTING, &adapter->state);
4203 void ixgbe_up(struct ixgbe_adapter *adapter)
4205 /* hardware has been reset, we need to reload some things */
4206 ixgbe_configure(adapter);
4208 ixgbe_up_complete(adapter);
4211 void ixgbe_reset(struct ixgbe_adapter *adapter)
4213 struct ixgbe_hw *hw = &adapter->hw;
4216 /* lock SFP init bit to prevent race conditions with the watchdog */
4217 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
4218 usleep_range(1000, 2000);
4220 /* clear all SFP and link config related flags while holding SFP_INIT */
4221 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
4222 IXGBE_FLAG2_SFP_NEEDS_RESET);
4223 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
4225 err = hw->mac.ops.init_hw(hw);
4228 case IXGBE_ERR_SFP_NOT_PRESENT:
4229 case IXGBE_ERR_SFP_NOT_SUPPORTED:
4231 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
4232 e_dev_err("master disable timed out\n");
4234 case IXGBE_ERR_EEPROM_VERSION:
4235 /* We are running on a pre-production device, log a warning */
4236 e_dev_warn("This device is a pre-production adapter/LOM. "
4237 "Please be aware there may be issues associated with "
4238 "your hardware. If you are experiencing problems "
4239 "please contact your Intel or hardware "
4240 "representative who provided you with this "
4244 e_dev_err("Hardware Error: %d\n", err);
4247 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
4249 /* reprogram the RAR[0] in case user changed it. */
4250 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, VMDQ_P(0), IXGBE_RAH_AV);
4252 /* update SAN MAC vmdq pool selection */
4253 if (hw->mac.san_mac_rar_index)
4254 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
4256 #ifdef CONFIG_IXGBE_PTP
4257 if (adapter->flags2 & IXGBE_FLAG2_PTP_ENABLED)
4258 ixgbe_ptp_reset(adapter);
4263 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4264 * @rx_ring: ring to free buffers from
4266 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4268 struct device *dev = rx_ring->dev;
4272 /* ring already cleared, nothing to do */
4273 if (!rx_ring->rx_buffer_info)
4276 /* Free all the Rx ring sk_buffs */
4277 for (i = 0; i < rx_ring->count; i++) {
4278 struct ixgbe_rx_buffer *rx_buffer;
4280 rx_buffer = &rx_ring->rx_buffer_info[i];
4281 if (rx_buffer->skb) {
4282 struct sk_buff *skb = rx_buffer->skb;
4283 if (IXGBE_CB(skb)->page_released) {
4286 ixgbe_rx_bufsz(rx_ring),
4288 IXGBE_CB(skb)->page_released = false;
4292 rx_buffer->skb = NULL;
4294 dma_unmap_page(dev, rx_buffer->dma,
4295 ixgbe_rx_pg_size(rx_ring),
4298 if (rx_buffer->page)
4299 __free_pages(rx_buffer->page,
4300 ixgbe_rx_pg_order(rx_ring));
4301 rx_buffer->page = NULL;
4304 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4305 memset(rx_ring->rx_buffer_info, 0, size);
4307 /* Zero out the descriptor ring */
4308 memset(rx_ring->desc, 0, rx_ring->size);
4310 rx_ring->next_to_alloc = 0;
4311 rx_ring->next_to_clean = 0;
4312 rx_ring->next_to_use = 0;
4316 * ixgbe_clean_tx_ring - Free Tx Buffers
4317 * @tx_ring: ring to be cleaned
4319 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
4321 struct ixgbe_tx_buffer *tx_buffer_info;
4325 /* ring already cleared, nothing to do */
4326 if (!tx_ring->tx_buffer_info)
4329 /* Free all the Tx ring sk_buffs */
4330 for (i = 0; i < tx_ring->count; i++) {
4331 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4332 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
4335 netdev_tx_reset_queue(txring_txq(tx_ring));
4337 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
4338 memset(tx_ring->tx_buffer_info, 0, size);
4340 /* Zero out the descriptor ring */
4341 memset(tx_ring->desc, 0, tx_ring->size);
4343 tx_ring->next_to_use = 0;
4344 tx_ring->next_to_clean = 0;
4348 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
4349 * @adapter: board private structure
4351 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
4355 for (i = 0; i < adapter->num_rx_queues; i++)
4356 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
4360 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
4361 * @adapter: board private structure
4363 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
4367 for (i = 0; i < adapter->num_tx_queues; i++)
4368 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
4371 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
4373 struct hlist_node *node, *node2;
4374 struct ixgbe_fdir_filter *filter;
4376 spin_lock(&adapter->fdir_perfect_lock);
4378 hlist_for_each_entry_safe(filter, node, node2,
4379 &adapter->fdir_filter_list, fdir_node) {
4380 hlist_del(&filter->fdir_node);
4383 adapter->fdir_filter_count = 0;
4385 spin_unlock(&adapter->fdir_perfect_lock);
4388 void ixgbe_down(struct ixgbe_adapter *adapter)
4390 struct net_device *netdev = adapter->netdev;
4391 struct ixgbe_hw *hw = &adapter->hw;
4395 /* signal that we are down to the interrupt handler */
4396 set_bit(__IXGBE_DOWN, &adapter->state);
4398 /* disable receives */
4399 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4400 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
4402 /* disable all enabled rx queues */
4403 for (i = 0; i < adapter->num_rx_queues; i++)
4404 /* this call also flushes the previous write */
4405 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
4407 usleep_range(10000, 20000);
4409 netif_tx_stop_all_queues(netdev);
4411 /* call carrier off first to avoid false dev_watchdog timeouts */
4412 netif_carrier_off(netdev);
4413 netif_tx_disable(netdev);
4415 ixgbe_irq_disable(adapter);
4417 ixgbe_napi_disable_all(adapter);
4419 adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
4420 IXGBE_FLAG2_RESET_REQUESTED);
4421 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
4423 del_timer_sync(&adapter->service_timer);
4425 if (adapter->num_vfs) {
4426 /* Clear EITR Select mapping */
4427 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
4429 /* Mark all the VFs as inactive */
4430 for (i = 0 ; i < adapter->num_vfs; i++)
4431 adapter->vfinfo[i].clear_to_send = false;
4433 /* ping all the active vfs to let them know we are going down */
4434 ixgbe_ping_all_vfs(adapter);
4436 /* Disable all VFTE/VFRE TX/RX */
4437 ixgbe_disable_tx_rx(adapter);
4440 /* disable transmits in the hardware now that interrupts are off */
4441 for (i = 0; i < adapter->num_tx_queues; i++) {
4442 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
4443 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
4446 /* Disable the Tx DMA engine on 82599 and X540 */
4447 switch (hw->mac.type) {
4448 case ixgbe_mac_82599EB:
4449 case ixgbe_mac_X540:
4450 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
4451 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
4452 ~IXGBE_DMATXCTL_TE));
4458 if (!pci_channel_offline(adapter->pdev))
4459 ixgbe_reset(adapter);
4461 /* power down the optics for 82599 SFP+ fiber */
4462 if (hw->mac.ops.disable_tx_laser)
4463 hw->mac.ops.disable_tx_laser(hw);
4465 ixgbe_clean_all_tx_rings(adapter);
4466 ixgbe_clean_all_rx_rings(adapter);
4468 #ifdef CONFIG_IXGBE_DCA
4469 /* since we reset the hardware DCA settings were cleared */
4470 ixgbe_setup_dca(adapter);
4475 * ixgbe_tx_timeout - Respond to a Tx Hang
4476 * @netdev: network interface device structure
4478 static void ixgbe_tx_timeout(struct net_device *netdev)
4480 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4482 /* Do the reset outside of interrupt context */
4483 ixgbe_tx_timeout_reset(adapter);
4487 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4488 * @adapter: board private structure to initialize
4490 * ixgbe_sw_init initializes the Adapter private data structure.
4491 * Fields are initialized based on PCI device information and
4492 * OS network device settings (MTU size).
4494 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
4496 struct ixgbe_hw *hw = &adapter->hw;
4497 struct pci_dev *pdev = adapter->pdev;
4499 #ifdef CONFIG_IXGBE_DCB
4501 struct tc_configuration *tc;
4504 /* PCI config space info */
4506 hw->vendor_id = pdev->vendor;
4507 hw->device_id = pdev->device;
4508 hw->revision_id = pdev->revision;
4509 hw->subsystem_vendor_id = pdev->subsystem_vendor;
4510 hw->subsystem_device_id = pdev->subsystem_device;
4512 /* Set capability flags */
4513 rss = min_t(int, IXGBE_MAX_RSS_INDICES, num_online_cpus());
4514 adapter->ring_feature[RING_F_RSS].limit = rss;
4515 switch (hw->mac.type) {
4516 case ixgbe_mac_82598EB:
4517 if (hw->device_id == IXGBE_DEV_ID_82598AT)
4518 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
4519 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
4521 case ixgbe_mac_X540:
4522 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
4523 case ixgbe_mac_82599EB:
4524 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
4525 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
4526 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
4527 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
4528 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
4529 /* Flow Director hash filters enabled */
4530 adapter->atr_sample_rate = 20;
4531 adapter->ring_feature[RING_F_FDIR].limit =
4532 IXGBE_MAX_FDIR_INDICES;
4533 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
4535 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
4536 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
4537 #ifdef CONFIG_IXGBE_DCB
4538 /* Default traffic class to use for FCoE */
4539 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
4541 #endif /* IXGBE_FCOE */
4548 /* FCoE support exists, always init the FCoE lock */
4549 spin_lock_init(&adapter->fcoe.lock);
4552 /* n-tuple support exists, always init our spinlock */
4553 spin_lock_init(&adapter->fdir_perfect_lock);
4555 #ifdef CONFIG_IXGBE_DCB
4556 switch (hw->mac.type) {
4557 case ixgbe_mac_X540:
4558 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
4559 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
4562 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
4563 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
4567 /* Configure DCB traffic classes */
4568 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
4569 tc = &adapter->dcb_cfg.tc_config[j];
4570 tc->path[DCB_TX_CONFIG].bwg_id = 0;
4571 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
4572 tc->path[DCB_RX_CONFIG].bwg_id = 0;
4573 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
4574 tc->dcb_pfc = pfc_disabled;
4577 /* Initialize default user to priority mapping, UPx->TC0 */
4578 tc = &adapter->dcb_cfg.tc_config[0];
4579 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
4580 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
4582 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
4583 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
4584 adapter->dcb_cfg.pfc_mode_enable = false;
4585 adapter->dcb_set_bitmap = 0x00;
4586 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
4587 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
4588 sizeof(adapter->temp_dcb_cfg));
4592 /* default flow control settings */
4593 hw->fc.requested_mode = ixgbe_fc_full;
4594 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
4595 ixgbe_pbthresh_setup(adapter);
4596 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
4597 hw->fc.send_xon = true;
4598 hw->fc.disable_fc_autoneg = false;
4600 #ifdef CONFIG_PCI_IOV
4601 /* assign number of SR-IOV VFs */
4602 if (hw->mac.type != ixgbe_mac_82598EB)
4603 adapter->num_vfs = (max_vfs > 63) ? 0 : max_vfs;
4606 /* enable itr by default in dynamic mode */
4607 adapter->rx_itr_setting = 1;
4608 adapter->tx_itr_setting = 1;
4610 /* set default ring sizes */
4611 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
4612 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
4614 /* set default work limits */
4615 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
4617 /* initialize eeprom parameters */
4618 if (ixgbe_init_eeprom_params_generic(hw)) {
4619 e_dev_err("EEPROM initialization failed\n");
4623 set_bit(__IXGBE_DOWN, &adapter->state);
4629 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
4630 * @tx_ring: tx descriptor ring (for a specific queue) to setup
4632 * Return 0 on success, negative on failure
4634 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
4636 struct device *dev = tx_ring->dev;
4637 int orig_node = dev_to_node(dev);
4641 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
4643 if (tx_ring->q_vector)
4644 numa_node = tx_ring->q_vector->numa_node;
4646 tx_ring->tx_buffer_info = vzalloc_node(size, numa_node);
4647 if (!tx_ring->tx_buffer_info)
4648 tx_ring->tx_buffer_info = vzalloc(size);
4649 if (!tx_ring->tx_buffer_info)
4652 /* round up to nearest 4K */
4653 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
4654 tx_ring->size = ALIGN(tx_ring->size, 4096);
4656 set_dev_node(dev, numa_node);
4657 tx_ring->desc = dma_alloc_coherent(dev,
4661 set_dev_node(dev, orig_node);
4663 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
4664 &tx_ring->dma, GFP_KERNEL);
4668 tx_ring->next_to_use = 0;
4669 tx_ring->next_to_clean = 0;
4673 vfree(tx_ring->tx_buffer_info);
4674 tx_ring->tx_buffer_info = NULL;
4675 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
4680 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
4681 * @adapter: board private structure
4683 * If this function returns with an error, then it's possible one or
4684 * more of the rings is populated (while the rest are not). It is the
4685 * callers duty to clean those orphaned rings.
4687 * Return 0 on success, negative on failure
4689 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
4693 for (i = 0; i < adapter->num_tx_queues; i++) {
4694 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
4698 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
4704 /* rewind the index freeing the rings as we go */
4706 ixgbe_free_tx_resources(adapter->tx_ring[i]);
4711 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
4712 * @rx_ring: rx descriptor ring (for a specific queue) to setup
4714 * Returns 0 on success, negative on failure
4716 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
4718 struct device *dev = rx_ring->dev;
4719 int orig_node = dev_to_node(dev);
4723 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4725 if (rx_ring->q_vector)
4726 numa_node = rx_ring->q_vector->numa_node;
4728 rx_ring->rx_buffer_info = vzalloc_node(size, numa_node);
4729 if (!rx_ring->rx_buffer_info)
4730 rx_ring->rx_buffer_info = vzalloc(size);
4731 if (!rx_ring->rx_buffer_info)
4734 /* Round up to nearest 4K */
4735 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
4736 rx_ring->size = ALIGN(rx_ring->size, 4096);
4738 set_dev_node(dev, numa_node);
4739 rx_ring->desc = dma_alloc_coherent(dev,
4743 set_dev_node(dev, orig_node);
4745 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
4746 &rx_ring->dma, GFP_KERNEL);
4750 rx_ring->next_to_clean = 0;
4751 rx_ring->next_to_use = 0;
4755 vfree(rx_ring->rx_buffer_info);
4756 rx_ring->rx_buffer_info = NULL;
4757 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
4762 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
4763 * @adapter: board private structure
4765 * If this function returns with an error, then it's possible one or
4766 * more of the rings is populated (while the rest are not). It is the
4767 * callers duty to clean those orphaned rings.
4769 * Return 0 on success, negative on failure
4771 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
4775 for (i = 0; i < adapter->num_rx_queues; i++) {
4776 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
4780 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
4785 err = ixgbe_setup_fcoe_ddp_resources(adapter);
4790 /* rewind the index freeing the rings as we go */
4792 ixgbe_free_rx_resources(adapter->rx_ring[i]);
4797 * ixgbe_free_tx_resources - Free Tx Resources per Queue
4798 * @tx_ring: Tx descriptor ring for a specific queue
4800 * Free all transmit software resources
4802 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
4804 ixgbe_clean_tx_ring(tx_ring);
4806 vfree(tx_ring->tx_buffer_info);
4807 tx_ring->tx_buffer_info = NULL;
4809 /* if not set, then don't free */
4813 dma_free_coherent(tx_ring->dev, tx_ring->size,
4814 tx_ring->desc, tx_ring->dma);
4816 tx_ring->desc = NULL;
4820 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
4821 * @adapter: board private structure
4823 * Free all transmit software resources
4825 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
4829 for (i = 0; i < adapter->num_tx_queues; i++)
4830 if (adapter->tx_ring[i]->desc)
4831 ixgbe_free_tx_resources(adapter->tx_ring[i]);
4835 * ixgbe_free_rx_resources - Free Rx Resources
4836 * @rx_ring: ring to clean the resources from
4838 * Free all receive software resources
4840 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
4842 ixgbe_clean_rx_ring(rx_ring);
4844 vfree(rx_ring->rx_buffer_info);
4845 rx_ring->rx_buffer_info = NULL;
4847 /* if not set, then don't free */
4851 dma_free_coherent(rx_ring->dev, rx_ring->size,
4852 rx_ring->desc, rx_ring->dma);
4854 rx_ring->desc = NULL;
4858 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
4859 * @adapter: board private structure
4861 * Free all receive software resources
4863 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
4868 ixgbe_free_fcoe_ddp_resources(adapter);
4871 for (i = 0; i < adapter->num_rx_queues; i++)
4872 if (adapter->rx_ring[i]->desc)
4873 ixgbe_free_rx_resources(adapter->rx_ring[i]);
4877 * ixgbe_change_mtu - Change the Maximum Transfer Unit
4878 * @netdev: network interface device structure
4879 * @new_mtu: new value for maximum frame size
4881 * Returns 0 on success, negative on failure
4883 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
4885 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4886 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4888 /* MTU < 68 is an error and causes problems on some kernels */
4889 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
4893 * For 82599EB we cannot allow legacy VFs to enable their receive
4894 * paths when MTU greater than 1500 is configured. So display a
4895 * warning that legacy VFs will be disabled.
4897 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
4898 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
4899 (max_frame > MAXIMUM_ETHERNET_VLAN_SIZE))
4900 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
4902 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4904 /* must set new MTU before calling down or up */
4905 netdev->mtu = new_mtu;
4907 if (netif_running(netdev))
4908 ixgbe_reinit_locked(adapter);
4914 * ixgbe_open - Called when a network interface is made active
4915 * @netdev: network interface device structure
4917 * Returns 0 on success, negative value on failure
4919 * The open entry point is called when a network interface is made
4920 * active by the system (IFF_UP). At this point all resources needed
4921 * for transmit and receive operations are allocated, the interrupt
4922 * handler is registered with the OS, the watchdog timer is started,
4923 * and the stack is notified that the interface is ready.
4925 static int ixgbe_open(struct net_device *netdev)
4927 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4930 /* disallow open during test */
4931 if (test_bit(__IXGBE_TESTING, &adapter->state))
4934 netif_carrier_off(netdev);
4936 /* allocate transmit descriptors */
4937 err = ixgbe_setup_all_tx_resources(adapter);
4941 /* allocate receive descriptors */
4942 err = ixgbe_setup_all_rx_resources(adapter);
4946 ixgbe_configure(adapter);
4948 err = ixgbe_request_irq(adapter);
4952 /* Notify the stack of the actual queue counts. */
4953 err = netif_set_real_num_tx_queues(netdev,
4954 adapter->num_rx_pools > 1 ? 1 :
4955 adapter->num_tx_queues);
4957 goto err_set_queues;
4960 err = netif_set_real_num_rx_queues(netdev,
4961 adapter->num_rx_pools > 1 ? 1 :
4962 adapter->num_rx_queues);
4964 goto err_set_queues;
4966 #ifdef CONFIG_IXGBE_PTP
4967 ixgbe_ptp_init(adapter);
4968 #endif /* CONFIG_IXGBE_PTP*/
4970 ixgbe_up_complete(adapter);
4975 ixgbe_free_irq(adapter);
4977 ixgbe_free_all_rx_resources(adapter);
4979 ixgbe_free_all_tx_resources(adapter);
4981 ixgbe_reset(adapter);
4987 * ixgbe_close - Disables a network interface
4988 * @netdev: network interface device structure
4990 * Returns 0, this is not allowed to fail
4992 * The close entry point is called when an interface is de-activated
4993 * by the OS. The hardware is still under the drivers control, but
4994 * needs to be disabled. A global MAC reset is issued to stop the
4995 * hardware, and all transmit and receive resources are freed.
4997 static int ixgbe_close(struct net_device *netdev)
4999 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5001 #ifdef CONFIG_IXGBE_PTP
5002 ixgbe_ptp_stop(adapter);
5005 ixgbe_down(adapter);
5006 ixgbe_free_irq(adapter);
5008 ixgbe_fdir_filter_exit(adapter);
5010 ixgbe_free_all_tx_resources(adapter);
5011 ixgbe_free_all_rx_resources(adapter);
5013 ixgbe_release_hw_control(adapter);
5019 static int ixgbe_resume(struct pci_dev *pdev)
5021 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5022 struct net_device *netdev = adapter->netdev;
5025 pci_set_power_state(pdev, PCI_D0);
5026 pci_restore_state(pdev);
5028 * pci_restore_state clears dev->state_saved so call
5029 * pci_save_state to restore it.
5031 pci_save_state(pdev);
5033 err = pci_enable_device_mem(pdev);
5035 e_dev_err("Cannot enable PCI device from suspend\n");
5038 pci_set_master(pdev);
5040 pci_wake_from_d3(pdev, false);
5042 ixgbe_reset(adapter);
5044 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5047 err = ixgbe_init_interrupt_scheme(adapter);
5048 if (!err && netif_running(netdev))
5049 err = ixgbe_open(netdev);
5056 netif_device_attach(netdev);
5060 #endif /* CONFIG_PM */
5062 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
5064 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5065 struct net_device *netdev = adapter->netdev;
5066 struct ixgbe_hw *hw = &adapter->hw;
5068 u32 wufc = adapter->wol;
5073 netif_device_detach(netdev);
5075 if (netif_running(netdev)) {
5077 ixgbe_down(adapter);
5078 ixgbe_free_irq(adapter);
5079 ixgbe_free_all_tx_resources(adapter);
5080 ixgbe_free_all_rx_resources(adapter);
5084 ixgbe_clear_interrupt_scheme(adapter);
5087 retval = pci_save_state(pdev);
5093 ixgbe_set_rx_mode(netdev);
5095 /* enable the optics for 82599 SFP+ fiber as we can WoL */
5096 if (hw->mac.ops.enable_tx_laser)
5097 hw->mac.ops.enable_tx_laser(hw);
5099 /* turn on all-multi mode if wake on multicast is enabled */
5100 if (wufc & IXGBE_WUFC_MC) {
5101 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5102 fctrl |= IXGBE_FCTRL_MPE;
5103 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5106 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
5107 ctrl |= IXGBE_CTRL_GIO_DIS;
5108 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
5110 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
5112 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
5113 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
5116 switch (hw->mac.type) {
5117 case ixgbe_mac_82598EB:
5118 pci_wake_from_d3(pdev, false);
5120 case ixgbe_mac_82599EB:
5121 case ixgbe_mac_X540:
5122 pci_wake_from_d3(pdev, !!wufc);
5128 *enable_wake = !!wufc;
5130 ixgbe_release_hw_control(adapter);
5132 pci_disable_device(pdev);
5138 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
5143 retval = __ixgbe_shutdown(pdev, &wake);
5148 pci_prepare_to_sleep(pdev);
5150 pci_wake_from_d3(pdev, false);
5151 pci_set_power_state(pdev, PCI_D3hot);
5156 #endif /* CONFIG_PM */
5158 static void ixgbe_shutdown(struct pci_dev *pdev)
5162 __ixgbe_shutdown(pdev, &wake);
5164 if (system_state == SYSTEM_POWER_OFF) {
5165 pci_wake_from_d3(pdev, wake);
5166 pci_set_power_state(pdev, PCI_D3hot);
5171 * ixgbe_update_stats - Update the board statistics counters.
5172 * @adapter: board private structure
5174 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
5176 struct net_device *netdev = adapter->netdev;
5177 struct ixgbe_hw *hw = &adapter->hw;
5178 struct ixgbe_hw_stats *hwstats = &adapter->stats;
5180 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
5181 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
5182 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
5183 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
5185 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5186 test_bit(__IXGBE_RESETTING, &adapter->state))
5189 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
5192 for (i = 0; i < adapter->num_rx_queues; i++) {
5193 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
5194 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
5196 adapter->rsc_total_count = rsc_count;
5197 adapter->rsc_total_flush = rsc_flush;
5200 for (i = 0; i < adapter->num_rx_queues; i++) {
5201 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
5202 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
5203 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
5204 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
5205 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
5206 bytes += rx_ring->stats.bytes;
5207 packets += rx_ring->stats.packets;
5209 adapter->non_eop_descs = non_eop_descs;
5210 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
5211 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
5212 adapter->hw_csum_rx_error = hw_csum_rx_error;
5213 netdev->stats.rx_bytes = bytes;
5214 netdev->stats.rx_packets = packets;
5218 /* gather some stats to the adapter struct that are per queue */
5219 for (i = 0; i < adapter->num_tx_queues; i++) {
5220 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
5221 restart_queue += tx_ring->tx_stats.restart_queue;
5222 tx_busy += tx_ring->tx_stats.tx_busy;
5223 bytes += tx_ring->stats.bytes;
5224 packets += tx_ring->stats.packets;
5226 adapter->restart_queue = restart_queue;
5227 adapter->tx_busy = tx_busy;
5228 netdev->stats.tx_bytes = bytes;
5229 netdev->stats.tx_packets = packets;
5231 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
5233 /* 8 register reads */
5234 for (i = 0; i < 8; i++) {
5235 /* for packet buffers not used, the register should read 0 */
5236 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
5238 hwstats->mpc[i] += mpc;
5239 total_mpc += hwstats->mpc[i];
5240 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
5241 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
5242 switch (hw->mac.type) {
5243 case ixgbe_mac_82598EB:
5244 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
5245 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
5246 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
5247 hwstats->pxonrxc[i] +=
5248 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
5250 case ixgbe_mac_82599EB:
5251 case ixgbe_mac_X540:
5252 hwstats->pxonrxc[i] +=
5253 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
5260 /*16 register reads */
5261 for (i = 0; i < 16; i++) {
5262 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
5263 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
5264 if ((hw->mac.type == ixgbe_mac_82599EB) ||
5265 (hw->mac.type == ixgbe_mac_X540)) {
5266 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
5267 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
5268 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
5269 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
5273 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
5274 /* work around hardware counting issue */
5275 hwstats->gprc -= missed_rx;
5277 ixgbe_update_xoff_received(adapter);
5279 /* 82598 hardware only has a 32 bit counter in the high register */
5280 switch (hw->mac.type) {
5281 case ixgbe_mac_82598EB:
5282 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
5283 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
5284 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
5285 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
5287 case ixgbe_mac_X540:
5288 /* OS2BMC stats are X540 only*/
5289 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
5290 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
5291 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
5292 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
5293 case ixgbe_mac_82599EB:
5294 for (i = 0; i < 16; i++)
5295 adapter->hw_rx_no_dma_resources +=
5296 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
5297 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
5298 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
5299 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
5300 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
5301 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
5302 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
5303 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
5304 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
5305 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
5307 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
5308 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
5309 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
5310 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
5311 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
5312 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
5313 /* Add up per cpu counters for total ddp aloc fail */
5314 if (adapter->fcoe.ddp_pool) {
5315 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
5316 struct ixgbe_fcoe_ddp_pool *ddp_pool;
5318 u64 noddp = 0, noddp_ext_buff = 0;
5319 for_each_possible_cpu(cpu) {
5320 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
5321 noddp += ddp_pool->noddp;
5322 noddp_ext_buff += ddp_pool->noddp_ext_buff;
5324 hwstats->fcoe_noddp = noddp;
5325 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
5327 #endif /* IXGBE_FCOE */
5332 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
5333 hwstats->bprc += bprc;
5334 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
5335 if (hw->mac.type == ixgbe_mac_82598EB)
5336 hwstats->mprc -= bprc;
5337 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
5338 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
5339 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
5340 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
5341 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
5342 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
5343 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
5344 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
5345 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
5346 hwstats->lxontxc += lxon;
5347 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
5348 hwstats->lxofftxc += lxoff;
5349 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
5350 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
5352 * 82598 errata - tx of flow control packets is included in tx counters
5354 xon_off_tot = lxon + lxoff;
5355 hwstats->gptc -= xon_off_tot;
5356 hwstats->mptc -= xon_off_tot;
5357 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
5358 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
5359 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
5360 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
5361 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
5362 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
5363 hwstats->ptc64 -= xon_off_tot;
5364 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
5365 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
5366 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
5367 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
5368 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
5369 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
5371 /* Fill out the OS statistics structure */
5372 netdev->stats.multicast = hwstats->mprc;
5375 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
5376 netdev->stats.rx_dropped = 0;
5377 netdev->stats.rx_length_errors = hwstats->rlec;
5378 netdev->stats.rx_crc_errors = hwstats->crcerrs;
5379 netdev->stats.rx_missed_errors = total_mpc;
5383 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
5384 * @adapter: pointer to the device adapter structure
5386 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
5388 struct ixgbe_hw *hw = &adapter->hw;
5391 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
5394 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5396 /* if interface is down do nothing */
5397 if (test_bit(__IXGBE_DOWN, &adapter->state))
5400 /* do nothing if we are not using signature filters */
5401 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
5404 adapter->fdir_overflow++;
5406 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
5407 for (i = 0; i < adapter->num_tx_queues; i++)
5408 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
5409 &(adapter->tx_ring[i]->state));
5410 /* re-enable flow director interrupts */
5411 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
5413 e_err(probe, "failed to finish FDIR re-initialization, "
5414 "ignored adding FDIR ATR filters\n");
5419 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
5420 * @adapter: pointer to the device adapter structure
5422 * This function serves two purposes. First it strobes the interrupt lines
5423 * in order to make certain interrupts are occurring. Secondly it sets the
5424 * bits needed to check for TX hangs. As a result we should immediately
5425 * determine if a hang has occurred.
5427 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
5429 struct ixgbe_hw *hw = &adapter->hw;
5433 /* If we're down or resetting, just bail */
5434 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5435 test_bit(__IXGBE_RESETTING, &adapter->state))
5438 /* Force detection of hung controller */
5439 if (netif_carrier_ok(adapter->netdev)) {
5440 for (i = 0; i < adapter->num_tx_queues; i++)
5441 set_check_for_tx_hang(adapter->tx_ring[i]);
5444 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
5446 * for legacy and MSI interrupts don't set any bits
5447 * that are enabled for EIAM, because this operation
5448 * would set *both* EIMS and EICS for any bit in EIAM
5450 IXGBE_WRITE_REG(hw, IXGBE_EICS,
5451 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
5453 /* get one bit for every active tx/rx interrupt vector */
5454 for (i = 0; i < adapter->num_q_vectors; i++) {
5455 struct ixgbe_q_vector *qv = adapter->q_vector[i];
5456 if (qv->rx.ring || qv->tx.ring)
5457 eics |= ((u64)1 << i);
5461 /* Cause software interrupt to ensure rings are cleaned */
5462 ixgbe_irq_rearm_queues(adapter, eics);
5467 * ixgbe_watchdog_update_link - update the link status
5468 * @adapter: pointer to the device adapter structure
5469 * @link_speed: pointer to a u32 to store the link_speed
5471 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
5473 struct ixgbe_hw *hw = &adapter->hw;
5474 u32 link_speed = adapter->link_speed;
5475 bool link_up = adapter->link_up;
5476 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
5478 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
5481 if (hw->mac.ops.check_link) {
5482 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
5484 /* always assume link is up, if no check link function */
5485 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
5489 if (adapter->ixgbe_ieee_pfc)
5490 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
5492 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
5493 hw->mac.ops.fc_enable(hw);
5494 ixgbe_set_rx_drop_en(adapter);
5498 time_after(jiffies, (adapter->link_check_timeout +
5499 IXGBE_TRY_LINK_TIMEOUT))) {
5500 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5501 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
5502 IXGBE_WRITE_FLUSH(hw);
5505 adapter->link_up = link_up;
5506 adapter->link_speed = link_speed;
5509 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
5511 #ifdef CONFIG_IXGBE_DCB
5512 struct net_device *netdev = adapter->netdev;
5513 struct dcb_app app = {
5514 .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
5519 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
5520 up = dcb_ieee_getapp_mask(netdev, &app);
5522 adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
5527 * ixgbe_watchdog_link_is_up - update netif_carrier status and
5528 * print link up message
5529 * @adapter: pointer to the device adapter structure
5531 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
5533 struct net_device *netdev = adapter->netdev;
5534 struct ixgbe_hw *hw = &adapter->hw;
5535 u32 link_speed = adapter->link_speed;
5536 bool flow_rx, flow_tx;
5538 /* only continue if link was previously down */
5539 if (netif_carrier_ok(netdev))
5542 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
5544 switch (hw->mac.type) {
5545 case ixgbe_mac_82598EB: {
5546 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5547 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
5548 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
5549 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
5552 case ixgbe_mac_X540:
5553 case ixgbe_mac_82599EB: {
5554 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
5555 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
5556 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
5557 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
5566 #ifdef CONFIG_IXGBE_PTP
5567 if (adapter->flags2 & IXGBE_FLAG2_PTP_ENABLED)
5568 ixgbe_ptp_start_cyclecounter(adapter);
5571 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n",
5572 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
5574 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
5576 (link_speed == IXGBE_LINK_SPEED_100_FULL ?
5579 ((flow_rx && flow_tx) ? "RX/TX" :
5581 (flow_tx ? "TX" : "None"))));
5583 netif_carrier_on(netdev);
5584 ixgbe_check_vf_rate_limit(adapter);
5586 /* update the default user priority for VFs */
5587 ixgbe_update_default_up(adapter);
5589 /* ping all the active vfs to let them know link has changed */
5590 ixgbe_ping_all_vfs(adapter);
5594 * ixgbe_watchdog_link_is_down - update netif_carrier status and
5595 * print link down message
5596 * @adapter: pointer to the adapter structure
5598 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
5600 struct net_device *netdev = adapter->netdev;
5601 struct ixgbe_hw *hw = &adapter->hw;
5603 adapter->link_up = false;
5604 adapter->link_speed = 0;
5606 /* only continue if link was up previously */
5607 if (!netif_carrier_ok(netdev))
5610 /* poll for SFP+ cable when link is down */
5611 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
5612 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5614 #ifdef CONFIG_IXGBE_PTP
5615 if (adapter->flags2 & IXGBE_FLAG2_PTP_ENABLED)
5616 ixgbe_ptp_start_cyclecounter(adapter);
5619 e_info(drv, "NIC Link is Down\n");
5620 netif_carrier_off(netdev);
5622 /* ping all the active vfs to let them know link has changed */
5623 ixgbe_ping_all_vfs(adapter);
5627 * ixgbe_watchdog_flush_tx - flush queues on link down
5628 * @adapter: pointer to the device adapter structure
5630 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
5633 int some_tx_pending = 0;
5635 if (!netif_carrier_ok(adapter->netdev)) {
5636 for (i = 0; i < adapter->num_tx_queues; i++) {
5637 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
5638 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
5639 some_tx_pending = 1;
5644 if (some_tx_pending) {
5645 /* We've lost link, so the controller stops DMA,
5646 * but we've got queued Tx work that's never going
5647 * to get done, so reset controller to flush Tx.
5648 * (Do the reset outside of interrupt context).
5650 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
5655 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
5659 /* Do not perform spoof check for 82598 or if not in IOV mode */
5660 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
5661 adapter->num_vfs == 0)
5664 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
5667 * ssvpc register is cleared on read, if zero then no
5668 * spoofed packets in the last interval.
5673 e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
5677 * ixgbe_watchdog_subtask - check and bring link up
5678 * @adapter: pointer to the device adapter structure
5680 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
5682 /* if interface is down do nothing */
5683 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5684 test_bit(__IXGBE_RESETTING, &adapter->state))
5687 ixgbe_watchdog_update_link(adapter);
5689 if (adapter->link_up)
5690 ixgbe_watchdog_link_is_up(adapter);
5692 ixgbe_watchdog_link_is_down(adapter);
5694 ixgbe_spoof_check(adapter);
5695 ixgbe_update_stats(adapter);
5697 ixgbe_watchdog_flush_tx(adapter);
5701 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
5702 * @adapter: the ixgbe adapter structure
5704 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
5706 struct ixgbe_hw *hw = &adapter->hw;
5709 /* not searching for SFP so there is nothing to do here */
5710 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
5711 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
5714 /* someone else is in init, wait until next service event */
5715 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5718 err = hw->phy.ops.identify_sfp(hw);
5719 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
5722 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
5723 /* If no cable is present, then we need to reset
5724 * the next time we find a good cable. */
5725 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5732 /* exit if reset not needed */
5733 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
5736 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
5739 * A module may be identified correctly, but the EEPROM may not have
5740 * support for that module. setup_sfp() will fail in that case, so
5741 * we should not allow that module to load.
5743 if (hw->mac.type == ixgbe_mac_82598EB)
5744 err = hw->phy.ops.reset(hw);
5746 err = hw->mac.ops.setup_sfp(hw);
5748 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
5751 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
5752 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
5755 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5757 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
5758 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
5759 e_dev_err("failed to initialize because an unsupported "
5760 "SFP+ module type was detected.\n");
5761 e_dev_err("Reload the driver after installing a "
5762 "supported module.\n");
5763 unregister_netdev(adapter->netdev);
5768 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
5769 * @adapter: the ixgbe adapter structure
5771 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
5773 struct ixgbe_hw *hw = &adapter->hw;
5777 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
5780 /* someone else is in init, wait until next service event */
5781 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5784 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5786 autoneg = hw->phy.autoneg_advertised;
5787 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
5788 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiation);
5789 if (hw->mac.ops.setup_link)
5790 hw->mac.ops.setup_link(hw, autoneg, negotiation, true);
5792 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5793 adapter->link_check_timeout = jiffies;
5794 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5797 #ifdef CONFIG_PCI_IOV
5798 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
5801 struct ixgbe_hw *hw = &adapter->hw;
5802 struct net_device *netdev = adapter->netdev;
5806 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
5807 if (gpc) /* If incrementing then no need for the check below */
5810 * Check to see if a bad DMA write target from an errant or
5811 * malicious VF has caused a PCIe error. If so then we can
5812 * issue a VFLR to the offending VF(s) and then resume without
5813 * requesting a full slot reset.
5816 for (vf = 0; vf < adapter->num_vfs; vf++) {
5817 ciaa = (vf << 16) | 0x80000000;
5818 /* 32 bit read so align, we really want status at offset 6 */
5819 ciaa |= PCI_COMMAND;
5820 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5821 ciad = IXGBE_READ_REG(hw, IXGBE_CIAD_82599);
5823 /* disable debug mode asap after reading data */
5824 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5825 /* Get the upper 16 bits which will be the PCI status reg */
5827 if (ciad & PCI_STATUS_REC_MASTER_ABORT) {
5828 netdev_err(netdev, "VF %d Hung DMA\n", vf);
5830 ciaa = (vf << 16) | 0x80000000;
5832 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5833 ciad = 0x00008000; /* VFLR */
5834 IXGBE_WRITE_REG(hw, IXGBE_CIAD_82599, ciad);
5836 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5843 * ixgbe_service_timer - Timer Call-back
5844 * @data: pointer to adapter cast into an unsigned long
5846 static void ixgbe_service_timer(unsigned long data)
5848 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
5849 unsigned long next_event_offset;
5852 /* poll faster when waiting for link */
5853 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
5854 next_event_offset = HZ / 10;
5856 next_event_offset = HZ * 2;
5858 #ifdef CONFIG_PCI_IOV
5860 * don't bother with SR-IOV VF DMA hang check if there are
5861 * no VFs or the link is down
5863 if (!adapter->num_vfs ||
5864 (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
5865 goto normal_timer_service;
5867 /* If we have VFs allocated then we must check for DMA hangs */
5868 ixgbe_check_for_bad_vf(adapter);
5869 next_event_offset = HZ / 50;
5870 adapter->timer_event_accumulator++;
5872 if (adapter->timer_event_accumulator >= 100)
5873 adapter->timer_event_accumulator = 0;
5877 normal_timer_service:
5879 /* Reset the timer */
5880 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
5883 ixgbe_service_event_schedule(adapter);
5886 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
5888 if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
5891 adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
5893 /* If we're already down or resetting, just bail */
5894 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5895 test_bit(__IXGBE_RESETTING, &adapter->state))
5898 ixgbe_dump(adapter);
5899 netdev_err(adapter->netdev, "Reset adapter\n");
5900 adapter->tx_timeout_count++;
5902 ixgbe_reinit_locked(adapter);
5906 * ixgbe_service_task - manages and runs subtasks
5907 * @work: pointer to work_struct containing our data
5909 static void ixgbe_service_task(struct work_struct *work)
5911 struct ixgbe_adapter *adapter = container_of(work,
5912 struct ixgbe_adapter,
5915 ixgbe_reset_subtask(adapter);
5916 ixgbe_sfp_detection_subtask(adapter);
5917 ixgbe_sfp_link_config_subtask(adapter);
5918 ixgbe_check_overtemp_subtask(adapter);
5919 ixgbe_watchdog_subtask(adapter);
5920 ixgbe_fdir_reinit_subtask(adapter);
5921 ixgbe_check_hang_subtask(adapter);
5922 #ifdef CONFIG_IXGBE_PTP
5923 ixgbe_ptp_overflow_check(adapter);
5926 ixgbe_service_event_complete(adapter);
5929 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
5930 struct ixgbe_tx_buffer *first,
5933 struct sk_buff *skb = first->skb;
5934 u32 vlan_macip_lens, type_tucmd;
5935 u32 mss_l4len_idx, l4len;
5937 if (!skb_is_gso(skb))
5940 if (skb_header_cloned(skb)) {
5941 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5946 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5947 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
5949 if (first->protocol == __constant_htons(ETH_P_IP)) {
5950 struct iphdr *iph = ip_hdr(skb);
5953 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5957 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
5958 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
5959 IXGBE_TX_FLAGS_CSUM |
5960 IXGBE_TX_FLAGS_IPV4;
5961 } else if (skb_is_gso_v6(skb)) {
5962 ipv6_hdr(skb)->payload_len = 0;
5963 tcp_hdr(skb)->check =
5964 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5965 &ipv6_hdr(skb)->daddr,
5967 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
5968 IXGBE_TX_FLAGS_CSUM;
5971 /* compute header lengths */
5972 l4len = tcp_hdrlen(skb);
5973 *hdr_len = skb_transport_offset(skb) + l4len;
5975 /* update gso size and bytecount with header size */
5976 first->gso_segs = skb_shinfo(skb)->gso_segs;
5977 first->bytecount += (first->gso_segs - 1) * *hdr_len;
5979 /* mss_l4len_id: use 1 as index for TSO */
5980 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
5981 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
5982 mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
5984 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
5985 vlan_macip_lens = skb_network_header_len(skb);
5986 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
5987 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
5989 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
5995 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
5996 struct ixgbe_tx_buffer *first)
5998 struct sk_buff *skb = first->skb;
5999 u32 vlan_macip_lens = 0;
6000 u32 mss_l4len_idx = 0;
6003 if (skb->ip_summed != CHECKSUM_PARTIAL) {
6004 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN)) {
6005 if (unlikely(skb->no_fcs))
6006 first->tx_flags |= IXGBE_TX_FLAGS_NO_IFCS;
6007 if (!(first->tx_flags & IXGBE_TX_FLAGS_TXSW))
6012 switch (first->protocol) {
6013 case __constant_htons(ETH_P_IP):
6014 vlan_macip_lens |= skb_network_header_len(skb);
6015 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6016 l4_hdr = ip_hdr(skb)->protocol;
6018 case __constant_htons(ETH_P_IPV6):
6019 vlan_macip_lens |= skb_network_header_len(skb);
6020 l4_hdr = ipv6_hdr(skb)->nexthdr;
6023 if (unlikely(net_ratelimit())) {
6024 dev_warn(tx_ring->dev,
6025 "partial checksum but proto=%x!\n",
6033 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
6034 mss_l4len_idx = tcp_hdrlen(skb) <<
6035 IXGBE_ADVTXD_L4LEN_SHIFT;
6038 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
6039 mss_l4len_idx = sizeof(struct sctphdr) <<
6040 IXGBE_ADVTXD_L4LEN_SHIFT;
6043 mss_l4len_idx = sizeof(struct udphdr) <<
6044 IXGBE_ADVTXD_L4LEN_SHIFT;
6047 if (unlikely(net_ratelimit())) {
6048 dev_warn(tx_ring->dev,
6049 "partial checksum but l4 proto=%x!\n",
6055 /* update TX checksum flag */
6056 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
6059 /* vlan_macip_lens: MACLEN, VLAN tag */
6060 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6061 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6063 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
6064 type_tucmd, mss_l4len_idx);
6067 static __le32 ixgbe_tx_cmd_type(u32 tx_flags)
6069 /* set type for advanced descriptor with frame checksum insertion */
6070 __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
6071 IXGBE_ADVTXD_DCMD_DEXT);
6073 /* set HW vlan bit if vlan is present */
6074 if (tx_flags & IXGBE_TX_FLAGS_HW_VLAN)
6075 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
6077 #ifdef CONFIG_IXGBE_PTP
6078 if (tx_flags & IXGBE_TX_FLAGS_TSTAMP)
6079 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_MAC_TSTAMP);
6082 /* set segmentation enable bits for TSO/FSO */
6084 if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_FSO))
6086 if (tx_flags & IXGBE_TX_FLAGS_TSO)
6088 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
6090 /* insert frame checksum */
6091 if (!(tx_flags & IXGBE_TX_FLAGS_NO_IFCS))
6092 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_IFCS);
6097 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
6098 u32 tx_flags, unsigned int paylen)
6100 __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
6102 /* enable L4 checksum for TSO and TX checksum offload */
6103 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
6104 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
6106 /* enble IPv4 checksum for TSO */
6107 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
6108 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
6110 /* use index 1 context for TSO/FSO/FCOE */
6112 if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_FCOE))
6114 if (tx_flags & IXGBE_TX_FLAGS_TSO)
6116 olinfo_status |= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT);
6119 * Check Context must be set if Tx switch is enabled, which it
6120 * always is for case where virtual functions are running
6123 if (tx_flags & (IXGBE_TX_FLAGS_TXSW | IXGBE_TX_FLAGS_FCOE))
6125 if (tx_flags & IXGBE_TX_FLAGS_TXSW)
6127 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
6129 tx_desc->read.olinfo_status = olinfo_status;
6132 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
6135 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
6136 struct ixgbe_tx_buffer *first,
6140 struct sk_buff *skb = first->skb;
6141 struct ixgbe_tx_buffer *tx_buffer;
6142 union ixgbe_adv_tx_desc *tx_desc;
6143 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
6144 unsigned int data_len = skb->data_len;
6145 unsigned int size = skb_headlen(skb);
6146 unsigned int paylen = skb->len - hdr_len;
6147 u32 tx_flags = first->tx_flags;
6149 u16 i = tx_ring->next_to_use;
6151 tx_desc = IXGBE_TX_DESC(tx_ring, i);
6153 ixgbe_tx_olinfo_status(tx_desc, tx_flags, paylen);
6154 cmd_type = ixgbe_tx_cmd_type(tx_flags);
6157 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
6158 if (data_len < sizeof(struct fcoe_crc_eof)) {
6159 size -= sizeof(struct fcoe_crc_eof) - data_len;
6162 data_len -= sizeof(struct fcoe_crc_eof);
6167 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
6168 if (dma_mapping_error(tx_ring->dev, dma))
6171 /* record length, and DMA address */
6172 dma_unmap_len_set(first, len, size);
6173 dma_unmap_addr_set(first, dma, dma);
6175 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6178 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
6179 tx_desc->read.cmd_type_len =
6180 cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
6184 if (i == tx_ring->count) {
6185 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6189 dma += IXGBE_MAX_DATA_PER_TXD;
6190 size -= IXGBE_MAX_DATA_PER_TXD;
6192 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6193 tx_desc->read.olinfo_status = 0;
6196 if (likely(!data_len))
6199 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
6203 if (i == tx_ring->count) {
6204 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6209 size = min_t(unsigned int, data_len, skb_frag_size(frag));
6211 size = skb_frag_size(frag);
6215 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
6217 if (dma_mapping_error(tx_ring->dev, dma))
6220 tx_buffer = &tx_ring->tx_buffer_info[i];
6221 dma_unmap_len_set(tx_buffer, len, size);
6222 dma_unmap_addr_set(tx_buffer, dma, dma);
6224 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6225 tx_desc->read.olinfo_status = 0;
6230 /* write last descriptor with RS and EOP bits */
6231 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
6232 tx_desc->read.cmd_type_len = cmd_type;
6234 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6236 /* set the timestamp */
6237 first->time_stamp = jiffies;
6240 * Force memory writes to complete before letting h/w know there
6241 * are new descriptors to fetch. (Only applicable for weak-ordered
6242 * memory model archs, such as IA-64).
6244 * We also need this memory barrier to make certain all of the
6245 * status bits have been updated before next_to_watch is written.
6249 /* set next_to_watch value indicating a packet is present */
6250 first->next_to_watch = tx_desc;
6253 if (i == tx_ring->count)
6256 tx_ring->next_to_use = i;
6258 /* notify HW of packet */
6259 writel(i, tx_ring->tail);
6263 dev_err(tx_ring->dev, "TX DMA map failed\n");
6265 /* clear dma mappings for failed tx_buffer_info map */
6267 tx_buffer = &tx_ring->tx_buffer_info[i];
6268 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
6269 if (tx_buffer == first)
6276 tx_ring->next_to_use = i;
6279 static void ixgbe_atr(struct ixgbe_ring *ring,
6280 struct ixgbe_tx_buffer *first)
6282 struct ixgbe_q_vector *q_vector = ring->q_vector;
6283 union ixgbe_atr_hash_dword input = { .dword = 0 };
6284 union ixgbe_atr_hash_dword common = { .dword = 0 };
6286 unsigned char *network;
6288 struct ipv6hdr *ipv6;
6293 /* if ring doesn't have a interrupt vector, cannot perform ATR */
6297 /* do nothing if sampling is disabled */
6298 if (!ring->atr_sample_rate)
6303 /* snag network header to get L4 type and address */
6304 hdr.network = skb_network_header(first->skb);
6306 /* Currently only IPv4/IPv6 with TCP is supported */
6307 if ((first->protocol != __constant_htons(ETH_P_IPV6) ||
6308 hdr.ipv6->nexthdr != IPPROTO_TCP) &&
6309 (first->protocol != __constant_htons(ETH_P_IP) ||
6310 hdr.ipv4->protocol != IPPROTO_TCP))
6313 th = tcp_hdr(first->skb);
6315 /* skip this packet since it is invalid or the socket is closing */
6319 /* sample on all syn packets or once every atr sample count */
6320 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
6323 /* reset sample count */
6324 ring->atr_count = 0;
6326 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
6329 * src and dst are inverted, think how the receiver sees them
6331 * The input is broken into two sections, a non-compressed section
6332 * containing vm_pool, vlan_id, and flow_type. The rest of the data
6333 * is XORed together and stored in the compressed dword.
6335 input.formatted.vlan_id = vlan_id;
6338 * since src port and flex bytes occupy the same word XOR them together
6339 * and write the value to source port portion of compressed dword
6341 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
6342 common.port.src ^= th->dest ^ __constant_htons(ETH_P_8021Q);
6344 common.port.src ^= th->dest ^ first->protocol;
6345 common.port.dst ^= th->source;
6347 if (first->protocol == __constant_htons(ETH_P_IP)) {
6348 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
6349 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
6351 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
6352 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
6353 hdr.ipv6->saddr.s6_addr32[1] ^
6354 hdr.ipv6->saddr.s6_addr32[2] ^
6355 hdr.ipv6->saddr.s6_addr32[3] ^
6356 hdr.ipv6->daddr.s6_addr32[0] ^
6357 hdr.ipv6->daddr.s6_addr32[1] ^
6358 hdr.ipv6->daddr.s6_addr32[2] ^
6359 hdr.ipv6->daddr.s6_addr32[3];
6362 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
6363 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
6364 input, common, ring->queue_index);
6367 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6369 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
6370 /* Herbert's original patch had:
6371 * smp_mb__after_netif_stop_queue();
6372 * but since that doesn't exist yet, just open code it. */
6375 /* We need to check again in a case another CPU has just
6376 * made room available. */
6377 if (likely(ixgbe_desc_unused(tx_ring) < size))
6380 /* A reprieve! - use start_queue because it doesn't call schedule */
6381 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
6382 ++tx_ring->tx_stats.restart_queue;
6386 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6388 if (likely(ixgbe_desc_unused(tx_ring) >= size))
6390 return __ixgbe_maybe_stop_tx(tx_ring, size);
6393 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb)
6395 struct ixgbe_adapter *adapter = netdev_priv(dev);
6396 int txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
6399 __be16 protocol = vlan_get_protocol(skb);
6401 if (((protocol == htons(ETH_P_FCOE)) ||
6402 (protocol == htons(ETH_P_FIP))) &&
6403 (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)) {
6404 struct ixgbe_ring_feature *f;
6406 f = &adapter->ring_feature[RING_F_FCOE];
6408 while (txq >= f->indices)
6410 txq += adapter->ring_feature[RING_F_FCOE].offset;
6416 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
6417 while (unlikely(txq >= dev->real_num_tx_queues))
6418 txq -= dev->real_num_tx_queues;
6422 return skb_tx_hash(dev, skb);
6425 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
6426 struct ixgbe_adapter *adapter,
6427 struct ixgbe_ring *tx_ring)
6429 struct ixgbe_tx_buffer *first;
6432 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6435 u16 count = TXD_USE_COUNT(skb_headlen(skb));
6436 __be16 protocol = skb->protocol;
6440 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
6441 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
6442 * + 2 desc gap to keep tail from touching head,
6443 * + 1 desc for context descriptor,
6444 * otherwise try next time
6446 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6447 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
6448 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
6450 count += skb_shinfo(skb)->nr_frags;
6452 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
6453 tx_ring->tx_stats.tx_busy++;
6454 return NETDEV_TX_BUSY;
6457 /* record the location of the first descriptor for this packet */
6458 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6460 first->bytecount = skb->len;
6461 first->gso_segs = 1;
6463 /* if we have a HW VLAN tag being added default to the HW one */
6464 if (vlan_tx_tag_present(skb)) {
6465 tx_flags |= vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
6466 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
6467 /* else if it is a SW VLAN check the next protocol and store the tag */
6468 } else if (protocol == __constant_htons(ETH_P_8021Q)) {
6469 struct vlan_hdr *vhdr, _vhdr;
6470 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
6474 protocol = vhdr->h_vlan_encapsulated_proto;
6475 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
6476 IXGBE_TX_FLAGS_VLAN_SHIFT;
6477 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
6480 skb_tx_timestamp(skb);
6482 #ifdef CONFIG_IXGBE_PTP
6483 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
6484 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
6485 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
6489 #ifdef CONFIG_PCI_IOV
6491 * Use the l2switch_enable flag - would be false if the DMA
6492 * Tx switch had been disabled.
6494 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6495 tx_flags |= IXGBE_TX_FLAGS_TXSW;
6498 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
6499 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
6500 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
6501 (skb->priority != TC_PRIO_CONTROL))) {
6502 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
6503 tx_flags |= (skb->priority & 0x7) <<
6504 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
6505 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
6506 struct vlan_ethhdr *vhdr;
6507 if (skb_header_cloned(skb) &&
6508 pskb_expand_head(skb, 0, 0, GFP_ATOMIC))
6510 vhdr = (struct vlan_ethhdr *)skb->data;
6511 vhdr->h_vlan_TCI = htons(tx_flags >>
6512 IXGBE_TX_FLAGS_VLAN_SHIFT);
6514 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
6518 /* record initial flags and protocol */
6519 first->tx_flags = tx_flags;
6520 first->protocol = protocol;
6523 /* setup tx offload for FCoE */
6524 if ((protocol == __constant_htons(ETH_P_FCOE)) &&
6525 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
6526 tso = ixgbe_fso(tx_ring, first, &hdr_len);
6533 #endif /* IXGBE_FCOE */
6534 tso = ixgbe_tso(tx_ring, first, &hdr_len);
6538 ixgbe_tx_csum(tx_ring, first);
6540 /* add the ATR filter if ATR is on */
6541 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
6542 ixgbe_atr(tx_ring, first);
6546 #endif /* IXGBE_FCOE */
6547 ixgbe_tx_map(tx_ring, first, hdr_len);
6549 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
6551 return NETDEV_TX_OK;
6554 dev_kfree_skb_any(first->skb);
6557 return NETDEV_TX_OK;
6560 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
6561 struct net_device *netdev)
6563 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6564 struct ixgbe_ring *tx_ring;
6567 * The minimum packet size for olinfo paylen is 17 so pad the skb
6568 * in order to meet this minimum size requirement.
6570 if (unlikely(skb->len < 17)) {
6571 if (skb_pad(skb, 17 - skb->len))
6572 return NETDEV_TX_OK;
6574 skb_set_tail_pointer(skb, 17);
6577 tx_ring = adapter->tx_ring[skb->queue_mapping];
6578 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
6582 * ixgbe_set_mac - Change the Ethernet Address of the NIC
6583 * @netdev: network interface device structure
6584 * @p: pointer to an address structure
6586 * Returns 0 on success, negative on failure
6588 static int ixgbe_set_mac(struct net_device *netdev, void *p)
6590 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6591 struct ixgbe_hw *hw = &adapter->hw;
6592 struct sockaddr *addr = p;
6594 if (!is_valid_ether_addr(addr->sa_data))
6595 return -EADDRNOTAVAIL;
6597 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
6598 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
6600 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, VMDQ_P(0), IXGBE_RAH_AV);
6606 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
6608 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6609 struct ixgbe_hw *hw = &adapter->hw;
6613 if (prtad != hw->phy.mdio.prtad)
6615 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
6621 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
6622 u16 addr, u16 value)
6624 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6625 struct ixgbe_hw *hw = &adapter->hw;
6627 if (prtad != hw->phy.mdio.prtad)
6629 return hw->phy.ops.write_reg(hw, addr, devad, value);
6632 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
6634 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6637 #ifdef CONFIG_IXGBE_PTP
6639 return ixgbe_ptp_hwtstamp_ioctl(adapter, req, cmd);
6642 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
6647 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
6649 * @netdev: network interface device structure
6651 * Returns non-zero on failure
6653 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
6656 struct ixgbe_adapter *adapter = netdev_priv(dev);
6657 struct ixgbe_hw *hw = &adapter->hw;
6659 if (is_valid_ether_addr(hw->mac.san_addr)) {
6661 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
6664 /* update SAN MAC vmdq pool selection */
6665 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
6671 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
6673 * @netdev: network interface device structure
6675 * Returns non-zero on failure
6677 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
6680 struct ixgbe_adapter *adapter = netdev_priv(dev);
6681 struct ixgbe_mac_info *mac = &adapter->hw.mac;
6683 if (is_valid_ether_addr(mac->san_addr)) {
6685 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
6691 #ifdef CONFIG_NET_POLL_CONTROLLER
6693 * Polling 'interrupt' - used by things like netconsole to send skbs
6694 * without having to re-enable interrupts. It's not called while
6695 * the interrupt routine is executing.
6697 static void ixgbe_netpoll(struct net_device *netdev)
6699 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6702 /* if interface is down do nothing */
6703 if (test_bit(__IXGBE_DOWN, &adapter->state))
6706 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
6707 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
6708 for (i = 0; i < adapter->num_q_vectors; i++)
6709 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
6711 ixgbe_intr(adapter->pdev->irq, netdev);
6713 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
6717 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
6718 struct rtnl_link_stats64 *stats)
6720 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6724 for (i = 0; i < adapter->num_rx_queues; i++) {
6725 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
6731 start = u64_stats_fetch_begin_bh(&ring->syncp);
6732 packets = ring->stats.packets;
6733 bytes = ring->stats.bytes;
6734 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
6735 stats->rx_packets += packets;
6736 stats->rx_bytes += bytes;
6740 for (i = 0; i < adapter->num_tx_queues; i++) {
6741 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
6747 start = u64_stats_fetch_begin_bh(&ring->syncp);
6748 packets = ring->stats.packets;
6749 bytes = ring->stats.bytes;
6750 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
6751 stats->tx_packets += packets;
6752 stats->tx_bytes += bytes;
6756 /* following stats updated by ixgbe_watchdog_task() */
6757 stats->multicast = netdev->stats.multicast;
6758 stats->rx_errors = netdev->stats.rx_errors;
6759 stats->rx_length_errors = netdev->stats.rx_length_errors;
6760 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
6761 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
6765 #ifdef CONFIG_IXGBE_DCB
6767 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
6768 * @adapter: pointer to ixgbe_adapter
6769 * @tc: number of traffic classes currently enabled
6771 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
6772 * 802.1Q priority maps to a packet buffer that exists.
6774 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
6776 struct ixgbe_hw *hw = &adapter->hw;
6780 /* 82598 have a static priority to TC mapping that can not
6781 * be changed so no validation is needed.
6783 if (hw->mac.type == ixgbe_mac_82598EB)
6786 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
6789 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
6790 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
6792 /* If up2tc is out of bounds default to zero */
6794 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
6798 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
6804 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
6805 * @adapter: Pointer to adapter struct
6807 * Populate the netdev user priority to tc map
6809 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
6811 struct net_device *dev = adapter->netdev;
6812 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
6813 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
6816 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
6819 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
6820 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
6822 tc = ets->prio_tc[prio];
6824 netdev_set_prio_tc_map(dev, prio, tc);
6829 * ixgbe_setup_tc - configure net_device for multiple traffic classes
6831 * @netdev: net device to configure
6832 * @tc: number of traffic classes to enable
6834 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
6836 struct ixgbe_adapter *adapter = netdev_priv(dev);
6837 struct ixgbe_hw *hw = &adapter->hw;
6839 /* Hardware supports up to 8 traffic classes */
6840 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs ||
6841 (hw->mac.type == ixgbe_mac_82598EB &&
6842 tc < MAX_TRAFFIC_CLASS))
6845 /* Hardware has to reinitialize queues and interrupts to
6846 * match packet buffer alignment. Unfortunately, the
6847 * hardware is not flexible enough to do this dynamically.
6849 if (netif_running(dev))
6851 ixgbe_clear_interrupt_scheme(adapter);
6854 netdev_set_num_tc(dev, tc);
6855 ixgbe_set_prio_tc_map(adapter);
6857 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
6859 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
6860 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
6861 adapter->hw.fc.requested_mode = ixgbe_fc_none;
6864 netdev_reset_tc(dev);
6866 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
6867 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
6869 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6871 adapter->temp_dcb_cfg.pfc_mode_enable = false;
6872 adapter->dcb_cfg.pfc_mode_enable = false;
6875 ixgbe_init_interrupt_scheme(adapter);
6876 ixgbe_validate_rtr(adapter, tc);
6877 if (netif_running(dev))
6883 #endif /* CONFIG_IXGBE_DCB */
6884 void ixgbe_do_reset(struct net_device *netdev)
6886 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6888 if (netif_running(netdev))
6889 ixgbe_reinit_locked(adapter);
6891 ixgbe_reset(adapter);
6894 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
6895 netdev_features_t features)
6897 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6899 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
6900 if (!(features & NETIF_F_RXCSUM))
6901 features &= ~NETIF_F_LRO;
6903 /* Turn off LRO if not RSC capable */
6904 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
6905 features &= ~NETIF_F_LRO;
6910 static int ixgbe_set_features(struct net_device *netdev,
6911 netdev_features_t features)
6913 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6914 netdev_features_t changed = netdev->features ^ features;
6915 bool need_reset = false;
6917 /* Make sure RSC matches LRO, reset if change */
6918 if (!(features & NETIF_F_LRO)) {
6919 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
6921 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
6922 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
6923 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
6924 if (adapter->rx_itr_setting == 1 ||
6925 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
6926 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
6928 } else if ((changed ^ features) & NETIF_F_LRO) {
6929 e_info(probe, "rx-usecs set too low, "
6935 * Check if Flow Director n-tuple support was enabled or disabled. If
6936 * the state changed, we need to reset.
6938 switch (features & NETIF_F_NTUPLE) {
6939 case NETIF_F_NTUPLE:
6940 /* turn off ATR, enable perfect filters and reset */
6941 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
6944 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
6945 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
6948 /* turn off perfect filters, enable ATR and reset */
6949 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
6952 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
6954 /* We cannot enable ATR if SR-IOV is enabled */
6955 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6958 /* We cannot enable ATR if we have 2 or more traffic classes */
6959 if (netdev_get_num_tc(netdev) > 1)
6962 /* We cannot enable ATR if RSS is disabled */
6963 if (adapter->ring_feature[RING_F_RSS].limit <= 1)
6966 /* A sample rate of 0 indicates ATR disabled */
6967 if (!adapter->atr_sample_rate)
6970 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
6974 if (features & NETIF_F_HW_VLAN_RX)
6975 ixgbe_vlan_strip_enable(adapter);
6977 ixgbe_vlan_strip_disable(adapter);
6979 if (changed & NETIF_F_RXALL)
6982 netdev->features = features;
6984 ixgbe_do_reset(netdev);
6989 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
6990 struct net_device *dev,
6991 const unsigned char *addr,
6994 struct ixgbe_adapter *adapter = netdev_priv(dev);
6997 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
7000 if (ndm->ndm_state & NUD_PERMANENT) {
7001 pr_info("%s: FDB only supports static addresses\n",
7006 if (is_unicast_ether_addr(addr) || is_link_local(addr)) {
7007 u32 rar_uc_entries = IXGBE_MAX_PF_MACVLANS;
7009 if (netdev_uc_count(dev) < rar_uc_entries)
7010 err = dev_uc_add_excl(dev, addr);
7013 } else if (is_multicast_ether_addr(addr)) {
7014 err = dev_mc_add_excl(dev, addr);
7019 /* Only return duplicate errors if NLM_F_EXCL is set */
7020 if (err == -EEXIST && !(flags & NLM_F_EXCL))
7026 static int ixgbe_ndo_fdb_del(struct ndmsg *ndm,
7027 struct net_device *dev,
7028 const unsigned char *addr)
7030 struct ixgbe_adapter *adapter = netdev_priv(dev);
7031 int err = -EOPNOTSUPP;
7033 if (ndm->ndm_state & NUD_PERMANENT) {
7034 pr_info("%s: FDB only supports static addresses\n",
7039 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
7040 if (is_unicast_ether_addr(addr))
7041 err = dev_uc_del(dev, addr);
7042 else if (is_multicast_ether_addr(addr))
7043 err = dev_mc_del(dev, addr);
7051 static int ixgbe_ndo_fdb_dump(struct sk_buff *skb,
7052 struct netlink_callback *cb,
7053 struct net_device *dev,
7056 struct ixgbe_adapter *adapter = netdev_priv(dev);
7058 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7059 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
7064 static const struct net_device_ops ixgbe_netdev_ops = {
7065 .ndo_open = ixgbe_open,
7066 .ndo_stop = ixgbe_close,
7067 .ndo_start_xmit = ixgbe_xmit_frame,
7068 .ndo_select_queue = ixgbe_select_queue,
7069 .ndo_set_rx_mode = ixgbe_set_rx_mode,
7070 .ndo_validate_addr = eth_validate_addr,
7071 .ndo_set_mac_address = ixgbe_set_mac,
7072 .ndo_change_mtu = ixgbe_change_mtu,
7073 .ndo_tx_timeout = ixgbe_tx_timeout,
7074 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
7075 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
7076 .ndo_do_ioctl = ixgbe_ioctl,
7077 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
7078 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
7079 .ndo_set_vf_tx_rate = ixgbe_ndo_set_vf_bw,
7080 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
7081 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
7082 .ndo_get_stats64 = ixgbe_get_stats64,
7083 #ifdef CONFIG_IXGBE_DCB
7084 .ndo_setup_tc = ixgbe_setup_tc,
7086 #ifdef CONFIG_NET_POLL_CONTROLLER
7087 .ndo_poll_controller = ixgbe_netpoll,
7090 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
7091 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
7092 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
7093 .ndo_fcoe_enable = ixgbe_fcoe_enable,
7094 .ndo_fcoe_disable = ixgbe_fcoe_disable,
7095 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
7096 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
7097 #endif /* IXGBE_FCOE */
7098 .ndo_set_features = ixgbe_set_features,
7099 .ndo_fix_features = ixgbe_fix_features,
7100 .ndo_fdb_add = ixgbe_ndo_fdb_add,
7101 .ndo_fdb_del = ixgbe_ndo_fdb_del,
7102 .ndo_fdb_dump = ixgbe_ndo_fdb_dump,
7106 * ixgbe_wol_supported - Check whether device supports WoL
7107 * @hw: hw specific details
7108 * @device_id: the device ID
7109 * @subdev_id: the subsystem device ID
7111 * This function is used by probe and ethtool to determine
7112 * which devices have WoL support
7115 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
7118 struct ixgbe_hw *hw = &adapter->hw;
7119 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
7120 int is_wol_supported = 0;
7122 switch (device_id) {
7123 case IXGBE_DEV_ID_82599_SFP:
7124 /* Only these subdevices could supports WOL */
7125 switch (subdevice_id) {
7126 case IXGBE_SUBDEV_ID_82599_560FLR:
7127 /* only support first port */
7128 if (hw->bus.func != 0)
7130 case IXGBE_SUBDEV_ID_82599_SFP:
7131 case IXGBE_SUBDEV_ID_82599_RNDC:
7132 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
7133 is_wol_supported = 1;
7137 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
7138 /* All except this subdevice support WOL */
7139 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
7140 is_wol_supported = 1;
7142 case IXGBE_DEV_ID_82599_KX4:
7143 is_wol_supported = 1;
7145 case IXGBE_DEV_ID_X540T:
7146 case IXGBE_DEV_ID_X540T1:
7147 /* check eeprom to see if enabled wol */
7148 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
7149 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
7150 (hw->bus.func == 0))) {
7151 is_wol_supported = 1;
7156 return is_wol_supported;
7160 * ixgbe_probe - Device Initialization Routine
7161 * @pdev: PCI device information struct
7162 * @ent: entry in ixgbe_pci_tbl
7164 * Returns 0 on success, negative on failure
7166 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
7167 * The OS initialization, configuring of the adapter private structure,
7168 * and a hardware reset occur.
7170 static int __devinit ixgbe_probe(struct pci_dev *pdev,
7171 const struct pci_device_id *ent)
7173 struct net_device *netdev;
7174 struct ixgbe_adapter *adapter = NULL;
7175 struct ixgbe_hw *hw;
7176 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
7177 static int cards_found;
7178 int i, err, pci_using_dac;
7179 u8 part_str[IXGBE_PBANUM_LENGTH];
7180 unsigned int indices = num_possible_cpus();
7181 unsigned int dcb_max = 0;
7187 /* Catch broken hardware that put the wrong VF device ID in
7188 * the PCIe SR-IOV capability.
7190 if (pdev->is_virtfn) {
7191 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
7192 pci_name(pdev), pdev->vendor, pdev->device);
7196 err = pci_enable_device_mem(pdev);
7200 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
7201 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
7204 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
7206 err = dma_set_coherent_mask(&pdev->dev,
7210 "No usable DMA configuration, aborting\n");
7217 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
7218 IORESOURCE_MEM), ixgbe_driver_name);
7221 "pci_request_selected_regions failed 0x%x\n", err);
7225 pci_enable_pcie_error_reporting(pdev);
7227 pci_set_master(pdev);
7228 pci_save_state(pdev);
7230 #ifdef CONFIG_IXGBE_DCB
7231 if (ii->mac == ixgbe_mac_82598EB)
7232 dcb_max = min_t(unsigned int, indices * MAX_TRAFFIC_CLASS,
7233 IXGBE_MAX_RSS_INDICES);
7235 dcb_max = min_t(unsigned int, indices * MAX_TRAFFIC_CLASS,
7236 IXGBE_MAX_FDIR_INDICES);
7239 if (ii->mac == ixgbe_mac_82598EB)
7240 indices = min_t(unsigned int, indices, IXGBE_MAX_RSS_INDICES);
7242 indices = min_t(unsigned int, indices, IXGBE_MAX_FDIR_INDICES);
7245 indices += min_t(unsigned int, num_possible_cpus(),
7246 IXGBE_MAX_FCOE_INDICES);
7248 indices = max_t(unsigned int, dcb_max, indices);
7249 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
7252 goto err_alloc_etherdev;
7255 SET_NETDEV_DEV(netdev, &pdev->dev);
7257 adapter = netdev_priv(netdev);
7258 pci_set_drvdata(pdev, adapter);
7260 adapter->netdev = netdev;
7261 adapter->pdev = pdev;
7264 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7266 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
7267 pci_resource_len(pdev, 0));
7273 netdev->netdev_ops = &ixgbe_netdev_ops;
7274 ixgbe_set_ethtool_ops(netdev);
7275 netdev->watchdog_timeo = 5 * HZ;
7276 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
7278 adapter->bd_number = cards_found;
7281 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
7282 hw->mac.type = ii->mac;
7285 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
7286 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
7287 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
7288 if (!(eec & (1 << 8)))
7289 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
7292 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
7293 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
7294 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
7295 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
7296 hw->phy.mdio.mmds = 0;
7297 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
7298 hw->phy.mdio.dev = netdev;
7299 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
7300 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
7302 ii->get_invariants(hw);
7304 /* setup the private structure */
7305 err = ixgbe_sw_init(adapter);
7309 /* Make it possible the adapter to be woken up via WOL */
7310 switch (adapter->hw.mac.type) {
7311 case ixgbe_mac_82599EB:
7312 case ixgbe_mac_X540:
7313 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
7320 * If there is a fan on this device and it has failed log the
7323 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
7324 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
7325 if (esdp & IXGBE_ESDP_SDP1)
7326 e_crit(probe, "Fan has stopped, replace the adapter\n");
7329 if (allow_unsupported_sfp)
7330 hw->allow_unsupported_sfp = allow_unsupported_sfp;
7332 /* reset_hw fills in the perm_addr as well */
7333 hw->phy.reset_if_overtemp = true;
7334 err = hw->mac.ops.reset_hw(hw);
7335 hw->phy.reset_if_overtemp = false;
7336 if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
7337 hw->mac.type == ixgbe_mac_82598EB) {
7339 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
7340 e_dev_err("failed to load because an unsupported SFP+ "
7341 "module type was detected.\n");
7342 e_dev_err("Reload the driver after installing a supported "
7346 e_dev_err("HW Init failed: %d\n", err);
7350 #ifdef CONFIG_PCI_IOV
7351 ixgbe_enable_sriov(adapter, ii);
7354 netdev->features = NETIF_F_SG |
7357 NETIF_F_HW_VLAN_TX |
7358 NETIF_F_HW_VLAN_RX |
7359 NETIF_F_HW_VLAN_FILTER |
7365 netdev->hw_features = netdev->features;
7367 switch (adapter->hw.mac.type) {
7368 case ixgbe_mac_82599EB:
7369 case ixgbe_mac_X540:
7370 netdev->features |= NETIF_F_SCTP_CSUM;
7371 netdev->hw_features |= NETIF_F_SCTP_CSUM |
7378 netdev->hw_features |= NETIF_F_RXALL;
7380 netdev->vlan_features |= NETIF_F_TSO;
7381 netdev->vlan_features |= NETIF_F_TSO6;
7382 netdev->vlan_features |= NETIF_F_IP_CSUM;
7383 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
7384 netdev->vlan_features |= NETIF_F_SG;
7386 netdev->priv_flags |= IFF_UNICAST_FLT;
7387 netdev->priv_flags |= IFF_SUPP_NOFCS;
7389 #ifdef CONFIG_IXGBE_DCB
7390 netdev->dcbnl_ops = &dcbnl_ops;
7394 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
7395 if (hw->mac.ops.get_device_caps) {
7396 hw->mac.ops.get_device_caps(hw, &device_caps);
7397 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
7398 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
7401 adapter->ring_feature[RING_F_FCOE].limit = IXGBE_FCRETA_SIZE;
7403 netdev->features |= NETIF_F_FSO |
7406 netdev->vlan_features |= NETIF_F_FSO |
7410 #endif /* IXGBE_FCOE */
7411 if (pci_using_dac) {
7412 netdev->features |= NETIF_F_HIGHDMA;
7413 netdev->vlan_features |= NETIF_F_HIGHDMA;
7416 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
7417 netdev->hw_features |= NETIF_F_LRO;
7418 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
7419 netdev->features |= NETIF_F_LRO;
7421 /* make sure the EEPROM is good */
7422 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
7423 e_dev_err("The EEPROM Checksum Is Not Valid\n");
7428 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
7429 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
7431 if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
7432 e_dev_err("invalid MAC address\n");
7437 setup_timer(&adapter->service_timer, &ixgbe_service_timer,
7438 (unsigned long) adapter);
7440 INIT_WORK(&adapter->service_task, ixgbe_service_task);
7441 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
7443 err = ixgbe_init_interrupt_scheme(adapter);
7447 /* WOL not supported for all devices */
7449 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
7450 if (ixgbe_wol_supported(adapter, pdev->device, pdev->subsystem_device))
7451 adapter->wol = IXGBE_WUFC_MAG;
7453 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
7455 /* save off EEPROM version number */
7456 hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
7457 hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
7459 /* pick up the PCI bus settings for reporting later */
7460 hw->mac.ops.get_bus_info(hw);
7462 /* print bus type/speed/width info */
7463 e_dev_info("(PCI Express:%s:%s) %pM\n",
7464 (hw->bus.speed == ixgbe_bus_speed_5000 ? "5.0GT/s" :
7465 hw->bus.speed == ixgbe_bus_speed_2500 ? "2.5GT/s" :
7467 (hw->bus.width == ixgbe_bus_width_pcie_x8 ? "Width x8" :
7468 hw->bus.width == ixgbe_bus_width_pcie_x4 ? "Width x4" :
7469 hw->bus.width == ixgbe_bus_width_pcie_x1 ? "Width x1" :
7473 err = ixgbe_read_pba_string_generic(hw, part_str, IXGBE_PBANUM_LENGTH);
7475 strncpy(part_str, "Unknown", IXGBE_PBANUM_LENGTH);
7476 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
7477 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
7478 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
7481 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
7482 hw->mac.type, hw->phy.type, part_str);
7484 if (hw->bus.width <= ixgbe_bus_width_pcie_x4) {
7485 e_dev_warn("PCI-Express bandwidth available for this card is "
7486 "not sufficient for optimal performance.\n");
7487 e_dev_warn("For optimal performance a x8 PCI-Express slot "
7491 /* reset the hardware with the new settings */
7492 err = hw->mac.ops.start_hw(hw);
7493 if (err == IXGBE_ERR_EEPROM_VERSION) {
7494 /* We are running on a pre-production device, log a warning */
7495 e_dev_warn("This device is a pre-production adapter/LOM. "
7496 "Please be aware there may be issues associated "
7497 "with your hardware. If you are experiencing "
7498 "problems please contact your Intel or hardware "
7499 "representative who provided you with this "
7502 strcpy(netdev->name, "eth%d");
7503 err = register_netdev(netdev);
7507 /* power down the optics for 82599 SFP+ fiber */
7508 if (hw->mac.ops.disable_tx_laser)
7509 hw->mac.ops.disable_tx_laser(hw);
7511 /* carrier off reporting is important to ethtool even BEFORE open */
7512 netif_carrier_off(netdev);
7514 #ifdef CONFIG_IXGBE_DCA
7515 if (dca_add_requester(&pdev->dev) == 0) {
7516 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
7517 ixgbe_setup_dca(adapter);
7520 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
7521 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
7522 for (i = 0; i < adapter->num_vfs; i++)
7523 ixgbe_vf_configuration(pdev, (i | 0x10000000));
7526 /* firmware requires driver version to be 0xFFFFFFFF
7527 * since os does not support feature
7529 if (hw->mac.ops.set_fw_drv_ver)
7530 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
7533 /* add san mac addr to netdev */
7534 ixgbe_add_sanmac_netdev(netdev);
7536 e_dev_info("%s\n", ixgbe_default_device_descr);
7539 #ifdef CONFIG_IXGBE_HWMON
7540 if (ixgbe_sysfs_init(adapter))
7541 e_err(probe, "failed to allocate sysfs resources\n");
7542 #endif /* CONFIG_IXGBE_HWMON */
7544 #ifdef CONFIG_DEBUG_FS
7545 ixgbe_dbg_adapter_init(adapter);
7546 #endif /* CONFIG_DEBUG_FS */
7551 ixgbe_release_hw_control(adapter);
7552 ixgbe_clear_interrupt_scheme(adapter);
7554 ixgbe_disable_sriov(adapter);
7555 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7556 iounmap(hw->hw_addr);
7558 free_netdev(netdev);
7560 pci_release_selected_regions(pdev,
7561 pci_select_bars(pdev, IORESOURCE_MEM));
7564 pci_disable_device(pdev);
7569 * ixgbe_remove - Device Removal Routine
7570 * @pdev: PCI device information struct
7572 * ixgbe_remove is called by the PCI subsystem to alert the driver
7573 * that it should release a PCI device. The could be caused by a
7574 * Hot-Plug event, or because the driver is going to be removed from
7577 static void __devexit ixgbe_remove(struct pci_dev *pdev)
7579 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7580 struct net_device *netdev = adapter->netdev;
7582 #ifdef CONFIG_DEBUG_FS
7583 ixgbe_dbg_adapter_exit(adapter);
7584 #endif /*CONFIG_DEBUG_FS */
7586 set_bit(__IXGBE_DOWN, &adapter->state);
7587 cancel_work_sync(&adapter->service_task);
7590 #ifdef CONFIG_IXGBE_DCA
7591 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
7592 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
7593 dca_remove_requester(&pdev->dev);
7594 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
7598 #ifdef CONFIG_IXGBE_HWMON
7599 ixgbe_sysfs_exit(adapter);
7600 #endif /* CONFIG_IXGBE_HWMON */
7602 /* remove the added san mac */
7603 ixgbe_del_sanmac_netdev(netdev);
7605 if (netdev->reg_state == NETREG_REGISTERED)
7606 unregister_netdev(netdev);
7608 ixgbe_disable_sriov(adapter);
7610 ixgbe_clear_interrupt_scheme(adapter);
7612 ixgbe_release_hw_control(adapter);
7615 kfree(adapter->ixgbe_ieee_pfc);
7616 kfree(adapter->ixgbe_ieee_ets);
7619 iounmap(adapter->hw.hw_addr);
7620 pci_release_selected_regions(pdev, pci_select_bars(pdev,
7623 e_dev_info("complete\n");
7625 free_netdev(netdev);
7627 pci_disable_pcie_error_reporting(pdev);
7629 pci_disable_device(pdev);
7633 * ixgbe_io_error_detected - called when PCI error is detected
7634 * @pdev: Pointer to PCI device
7635 * @state: The current pci connection state
7637 * This function is called after a PCI bus error affecting
7638 * this device has been detected.
7640 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
7641 pci_channel_state_t state)
7643 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7644 struct net_device *netdev = adapter->netdev;
7646 #ifdef CONFIG_PCI_IOV
7647 struct pci_dev *bdev, *vfdev;
7648 u32 dw0, dw1, dw2, dw3;
7650 u16 req_id, pf_func;
7652 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7653 adapter->num_vfs == 0)
7654 goto skip_bad_vf_detection;
7656 bdev = pdev->bus->self;
7657 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
7658 bdev = bdev->bus->self;
7661 goto skip_bad_vf_detection;
7663 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
7665 goto skip_bad_vf_detection;
7667 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
7668 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
7669 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
7670 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
7673 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
7674 if (!(req_id & 0x0080))
7675 goto skip_bad_vf_detection;
7677 pf_func = req_id & 0x01;
7678 if ((pf_func & 1) == (pdev->devfn & 1)) {
7679 unsigned int device_id;
7681 vf = (req_id & 0x7F) >> 1;
7682 e_dev_err("VF %d has caused a PCIe error\n", vf);
7683 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
7684 "%8.8x\tdw3: %8.8x\n",
7685 dw0, dw1, dw2, dw3);
7686 switch (adapter->hw.mac.type) {
7687 case ixgbe_mac_82599EB:
7688 device_id = IXGBE_82599_VF_DEVICE_ID;
7690 case ixgbe_mac_X540:
7691 device_id = IXGBE_X540_VF_DEVICE_ID;
7698 /* Find the pci device of the offending VF */
7699 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
7701 if (vfdev->devfn == (req_id & 0xFF))
7703 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
7707 * There's a slim chance the VF could have been hot plugged,
7708 * so if it is no longer present we don't need to issue the
7709 * VFLR. Just clean up the AER in that case.
7712 e_dev_err("Issuing VFLR to VF %d\n", vf);
7713 pci_write_config_dword(vfdev, 0xA8, 0x00008000);
7716 pci_cleanup_aer_uncorrect_error_status(pdev);
7720 * Even though the error may have occurred on the other port
7721 * we still need to increment the vf error reference count for
7722 * both ports because the I/O resume function will be called
7725 adapter->vferr_refcount++;
7727 return PCI_ERS_RESULT_RECOVERED;
7729 skip_bad_vf_detection:
7730 #endif /* CONFIG_PCI_IOV */
7731 netif_device_detach(netdev);
7733 if (state == pci_channel_io_perm_failure)
7734 return PCI_ERS_RESULT_DISCONNECT;
7736 if (netif_running(netdev))
7737 ixgbe_down(adapter);
7738 pci_disable_device(pdev);
7740 /* Request a slot reset. */
7741 return PCI_ERS_RESULT_NEED_RESET;
7745 * ixgbe_io_slot_reset - called after the pci bus has been reset.
7746 * @pdev: Pointer to PCI device
7748 * Restart the card from scratch, as if from a cold-boot.
7750 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
7752 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7753 pci_ers_result_t result;
7756 if (pci_enable_device_mem(pdev)) {
7757 e_err(probe, "Cannot re-enable PCI device after reset.\n");
7758 result = PCI_ERS_RESULT_DISCONNECT;
7760 pci_set_master(pdev);
7761 pci_restore_state(pdev);
7762 pci_save_state(pdev);
7764 pci_wake_from_d3(pdev, false);
7766 ixgbe_reset(adapter);
7767 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
7768 result = PCI_ERS_RESULT_RECOVERED;
7771 err = pci_cleanup_aer_uncorrect_error_status(pdev);
7773 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
7774 "failed 0x%0x\n", err);
7775 /* non-fatal, continue */
7782 * ixgbe_io_resume - called when traffic can start flowing again.
7783 * @pdev: Pointer to PCI device
7785 * This callback is called when the error recovery driver tells us that
7786 * its OK to resume normal operation.
7788 static void ixgbe_io_resume(struct pci_dev *pdev)
7790 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7791 struct net_device *netdev = adapter->netdev;
7793 #ifdef CONFIG_PCI_IOV
7794 if (adapter->vferr_refcount) {
7795 e_info(drv, "Resuming after VF err\n");
7796 adapter->vferr_refcount--;
7801 if (netif_running(netdev))
7804 netif_device_attach(netdev);
7807 static const struct pci_error_handlers ixgbe_err_handler = {
7808 .error_detected = ixgbe_io_error_detected,
7809 .slot_reset = ixgbe_io_slot_reset,
7810 .resume = ixgbe_io_resume,
7813 static struct pci_driver ixgbe_driver = {
7814 .name = ixgbe_driver_name,
7815 .id_table = ixgbe_pci_tbl,
7816 .probe = ixgbe_probe,
7817 .remove = __devexit_p(ixgbe_remove),
7819 .suspend = ixgbe_suspend,
7820 .resume = ixgbe_resume,
7822 .shutdown = ixgbe_shutdown,
7823 .err_handler = &ixgbe_err_handler
7827 * ixgbe_init_module - Driver Registration Routine
7829 * ixgbe_init_module is the first routine called when the driver is
7830 * loaded. All it does is register with the PCI subsystem.
7832 static int __init ixgbe_init_module(void)
7835 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
7836 pr_info("%s\n", ixgbe_copyright);
7838 #ifdef CONFIG_DEBUG_FS
7840 #endif /* CONFIG_DEBUG_FS */
7842 #ifdef CONFIG_IXGBE_DCA
7843 dca_register_notify(&dca_notifier);
7846 ret = pci_register_driver(&ixgbe_driver);
7850 module_init(ixgbe_init_module);
7853 * ixgbe_exit_module - Driver Exit Cleanup Routine
7855 * ixgbe_exit_module is called just before the driver is removed
7858 static void __exit ixgbe_exit_module(void)
7860 #ifdef CONFIG_IXGBE_DCA
7861 dca_unregister_notify(&dca_notifier);
7863 pci_unregister_driver(&ixgbe_driver);
7865 #ifdef CONFIG_DEBUG_FS
7867 #endif /* CONFIG_DEBUG_FS */
7869 rcu_barrier(); /* Wait for completion of call_rcu()'s */
7872 #ifdef CONFIG_IXGBE_DCA
7873 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
7878 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
7879 __ixgbe_notify_dca);
7881 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
7884 #endif /* CONFIG_IXGBE_DCA */
7886 module_exit(ixgbe_exit_module);