1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2012 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
35 #include <linux/interrupt.h>
37 #include <linux/tcp.h>
38 #include <linux/sctp.h>
39 #include <linux/pkt_sched.h>
40 #include <linux/ipv6.h>
41 #include <linux/slab.h>
42 #include <net/checksum.h>
43 #include <net/ip6_checksum.h>
44 #include <linux/ethtool.h>
46 #include <linux/if_vlan.h>
47 #include <linux/prefetch.h>
48 #include <scsi/fc/fc_fcoe.h>
51 #include "ixgbe_common.h"
52 #include "ixgbe_dcb_82599.h"
53 #include "ixgbe_sriov.h"
55 char ixgbe_driver_name[] = "ixgbe";
56 static const char ixgbe_driver_string[] =
57 "Intel(R) 10 Gigabit PCI Express Network Driver";
59 char ixgbe_default_device_descr[] =
60 "Intel(R) 10 Gigabit Network Connection";
62 static char ixgbe_default_device_descr[] =
63 "Intel(R) 10 Gigabit Network Connection";
68 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
69 __stringify(BUILD) "-k"
70 const char ixgbe_driver_version[] = DRV_VERSION;
71 static const char ixgbe_copyright[] =
72 "Copyright (c) 1999-2012 Intel Corporation.";
74 static const struct ixgbe_info *ixgbe_info_tbl[] = {
75 [board_82598] = &ixgbe_82598_info,
76 [board_82599] = &ixgbe_82599_info,
77 [board_X540] = &ixgbe_X540_info,
80 /* ixgbe_pci_tbl - PCI Device ID Table
82 * Wildcard entries (PCI_ANY_ID) should come last
83 * Last entry must be all 0s
85 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
86 * Class, Class Mask, private data (not used) }
88 static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl) = {
89 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
95 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
96 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
97 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
98 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
99 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
117 /* required last entry */
120 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
122 #ifdef CONFIG_IXGBE_DCA
123 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
125 static struct notifier_block dca_notifier = {
126 .notifier_call = ixgbe_notify_dca,
132 #ifdef CONFIG_PCI_IOV
133 static unsigned int max_vfs;
134 module_param(max_vfs, uint, 0);
135 MODULE_PARM_DESC(max_vfs,
136 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63");
137 #endif /* CONFIG_PCI_IOV */
139 static unsigned int allow_unsupported_sfp;
140 module_param(allow_unsupported_sfp, uint, 0);
141 MODULE_PARM_DESC(allow_unsupported_sfp,
142 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
144 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
145 static int debug = -1;
146 module_param(debug, int, 0);
147 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
149 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
150 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
151 MODULE_LICENSE("GPL");
152 MODULE_VERSION(DRV_VERSION);
154 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
156 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
157 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
158 schedule_work(&adapter->service_task);
161 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
163 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
165 /* flush memory to make sure state is correct before next watchdog */
166 smp_mb__before_clear_bit();
167 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
170 struct ixgbe_reg_info {
175 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
177 /* General Registers */
178 {IXGBE_CTRL, "CTRL"},
179 {IXGBE_STATUS, "STATUS"},
180 {IXGBE_CTRL_EXT, "CTRL_EXT"},
182 /* Interrupt Registers */
183 {IXGBE_EICR, "EICR"},
186 {IXGBE_SRRCTL(0), "SRRCTL"},
187 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
188 {IXGBE_RDLEN(0), "RDLEN"},
189 {IXGBE_RDH(0), "RDH"},
190 {IXGBE_RDT(0), "RDT"},
191 {IXGBE_RXDCTL(0), "RXDCTL"},
192 {IXGBE_RDBAL(0), "RDBAL"},
193 {IXGBE_RDBAH(0), "RDBAH"},
196 {IXGBE_TDBAL(0), "TDBAL"},
197 {IXGBE_TDBAH(0), "TDBAH"},
198 {IXGBE_TDLEN(0), "TDLEN"},
199 {IXGBE_TDH(0), "TDH"},
200 {IXGBE_TDT(0), "TDT"},
201 {IXGBE_TXDCTL(0), "TXDCTL"},
203 /* List Terminator */
209 * ixgbe_regdump - register printout routine
211 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
217 switch (reginfo->ofs) {
218 case IXGBE_SRRCTL(0):
219 for (i = 0; i < 64; i++)
220 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
222 case IXGBE_DCA_RXCTRL(0):
223 for (i = 0; i < 64; i++)
224 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
227 for (i = 0; i < 64; i++)
228 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
231 for (i = 0; i < 64; i++)
232 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
235 for (i = 0; i < 64; i++)
236 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
238 case IXGBE_RXDCTL(0):
239 for (i = 0; i < 64; i++)
240 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
243 for (i = 0; i < 64; i++)
244 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
247 for (i = 0; i < 64; i++)
248 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
251 for (i = 0; i < 64; i++)
252 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
255 for (i = 0; i < 64; i++)
256 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
259 for (i = 0; i < 64; i++)
260 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
263 for (i = 0; i < 64; i++)
264 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
267 for (i = 0; i < 64; i++)
268 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
270 case IXGBE_TXDCTL(0):
271 for (i = 0; i < 64; i++)
272 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
275 pr_info("%-15s %08x\n", reginfo->name,
276 IXGBE_READ_REG(hw, reginfo->ofs));
280 for (i = 0; i < 8; i++) {
281 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
282 pr_err("%-15s", rname);
283 for (j = 0; j < 8; j++)
284 pr_cont(" %08x", regs[i*8+j]);
291 * ixgbe_dump - Print registers, tx-rings and rx-rings
293 static void ixgbe_dump(struct ixgbe_adapter *adapter)
295 struct net_device *netdev = adapter->netdev;
296 struct ixgbe_hw *hw = &adapter->hw;
297 struct ixgbe_reg_info *reginfo;
299 struct ixgbe_ring *tx_ring;
300 struct ixgbe_tx_buffer *tx_buffer;
301 union ixgbe_adv_tx_desc *tx_desc;
302 struct my_u0 { u64 a; u64 b; } *u0;
303 struct ixgbe_ring *rx_ring;
304 union ixgbe_adv_rx_desc *rx_desc;
305 struct ixgbe_rx_buffer *rx_buffer_info;
309 if (!netif_msg_hw(adapter))
312 /* Print netdevice Info */
314 dev_info(&adapter->pdev->dev, "Net device Info\n");
315 pr_info("Device Name state "
316 "trans_start last_rx\n");
317 pr_info("%-15s %016lX %016lX %016lX\n",
324 /* Print Registers */
325 dev_info(&adapter->pdev->dev, "Register Dump\n");
326 pr_info(" Register Name Value\n");
327 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
328 reginfo->name; reginfo++) {
329 ixgbe_regdump(hw, reginfo);
332 /* Print TX Ring Summary */
333 if (!netdev || !netif_running(netdev))
336 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
337 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
338 for (n = 0; n < adapter->num_tx_queues; n++) {
339 tx_ring = adapter->tx_ring[n];
340 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
341 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
342 n, tx_ring->next_to_use, tx_ring->next_to_clean,
343 (u64)dma_unmap_addr(tx_buffer, dma),
344 dma_unmap_len(tx_buffer, len),
345 tx_buffer->next_to_watch,
346 (u64)tx_buffer->time_stamp);
350 if (!netif_msg_tx_done(adapter))
351 goto rx_ring_summary;
353 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
355 /* Transmit Descriptor Formats
357 * Advanced Transmit Descriptor
358 * +--------------------------------------------------------------+
359 * 0 | Buffer Address [63:0] |
360 * +--------------------------------------------------------------+
361 * 8 | PAYLEN | PORTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
362 * +--------------------------------------------------------------+
363 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
366 for (n = 0; n < adapter->num_tx_queues; n++) {
367 tx_ring = adapter->tx_ring[n];
368 pr_info("------------------------------------\n");
369 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
370 pr_info("------------------------------------\n");
371 pr_info("T [desc] [address 63:0 ] "
372 "[PlPOIdStDDt Ln] [bi->dma ] "
373 "leng ntw timestamp bi->skb\n");
375 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
376 tx_desc = IXGBE_TX_DESC(tx_ring, i);
377 tx_buffer = &tx_ring->tx_buffer_info[i];
378 u0 = (struct my_u0 *)tx_desc;
379 pr_info("T [0x%03X] %016llX %016llX %016llX"
380 " %04X %p %016llX %p", i,
383 (u64)dma_unmap_addr(tx_buffer, dma),
384 dma_unmap_len(tx_buffer, len),
385 tx_buffer->next_to_watch,
386 (u64)tx_buffer->time_stamp,
388 if (i == tx_ring->next_to_use &&
389 i == tx_ring->next_to_clean)
391 else if (i == tx_ring->next_to_use)
393 else if (i == tx_ring->next_to_clean)
398 if (netif_msg_pktdata(adapter) &&
400 print_hex_dump(KERN_INFO, "",
401 DUMP_PREFIX_ADDRESS, 16, 1,
402 tx_buffer->skb->data,
403 dma_unmap_len(tx_buffer, len),
408 /* Print RX Rings Summary */
410 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
411 pr_info("Queue [NTU] [NTC]\n");
412 for (n = 0; n < adapter->num_rx_queues; n++) {
413 rx_ring = adapter->rx_ring[n];
414 pr_info("%5d %5X %5X\n",
415 n, rx_ring->next_to_use, rx_ring->next_to_clean);
419 if (!netif_msg_rx_status(adapter))
422 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
424 /* Advanced Receive Descriptor (Read) Format
426 * +-----------------------------------------------------+
427 * 0 | Packet Buffer Address [63:1] |A0/NSE|
428 * +----------------------------------------------+------+
429 * 8 | Header Buffer Address [63:1] | DD |
430 * +-----------------------------------------------------+
433 * Advanced Receive Descriptor (Write-Back) Format
435 * 63 48 47 32 31 30 21 20 16 15 4 3 0
436 * +------------------------------------------------------+
437 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
438 * | Checksum Ident | | | | Type | Type |
439 * +------------------------------------------------------+
440 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
441 * +------------------------------------------------------+
442 * 63 48 47 32 31 20 19 0
444 for (n = 0; n < adapter->num_rx_queues; n++) {
445 rx_ring = adapter->rx_ring[n];
446 pr_info("------------------------------------\n");
447 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
448 pr_info("------------------------------------\n");
449 pr_info("R [desc] [ PktBuf A0] "
450 "[ HeadBuf DD] [bi->dma ] [bi->skb] "
451 "<-- Adv Rx Read format\n");
452 pr_info("RWB[desc] [PcsmIpSHl PtRs] "
453 "[vl er S cks ln] ---------------- [bi->skb] "
454 "<-- Adv Rx Write-Back format\n");
456 for (i = 0; i < rx_ring->count; i++) {
457 rx_buffer_info = &rx_ring->rx_buffer_info[i];
458 rx_desc = IXGBE_RX_DESC(rx_ring, i);
459 u0 = (struct my_u0 *)rx_desc;
460 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
461 if (staterr & IXGBE_RXD_STAT_DD) {
462 /* Descriptor Done */
463 pr_info("RWB[0x%03X] %016llX "
464 "%016llX ---------------- %p", i,
467 rx_buffer_info->skb);
469 pr_info("R [0x%03X] %016llX "
470 "%016llX %016llX %p", i,
473 (u64)rx_buffer_info->dma,
474 rx_buffer_info->skb);
476 if (netif_msg_pktdata(adapter) &&
477 rx_buffer_info->dma) {
478 print_hex_dump(KERN_INFO, "",
479 DUMP_PREFIX_ADDRESS, 16, 1,
480 page_address(rx_buffer_info->page) +
481 rx_buffer_info->page_offset,
482 ixgbe_rx_bufsz(rx_ring), true);
486 if (i == rx_ring->next_to_use)
488 else if (i == rx_ring->next_to_clean)
500 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
504 /* Let firmware take over control of h/w */
505 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
506 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
507 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
510 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
514 /* Let firmware know the driver has taken over */
515 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
516 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
517 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
521 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
522 * @adapter: pointer to adapter struct
523 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
524 * @queue: queue to map the corresponding interrupt to
525 * @msix_vector: the vector to map to the corresponding queue
528 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
529 u8 queue, u8 msix_vector)
532 struct ixgbe_hw *hw = &adapter->hw;
533 switch (hw->mac.type) {
534 case ixgbe_mac_82598EB:
535 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
538 index = (((direction * 64) + queue) >> 2) & 0x1F;
539 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
540 ivar &= ~(0xFF << (8 * (queue & 0x3)));
541 ivar |= (msix_vector << (8 * (queue & 0x3)));
542 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
544 case ixgbe_mac_82599EB:
546 if (direction == -1) {
548 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
549 index = ((queue & 1) * 8);
550 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
551 ivar &= ~(0xFF << index);
552 ivar |= (msix_vector << index);
553 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
556 /* tx or rx causes */
557 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
558 index = ((16 * (queue & 1)) + (8 * direction));
559 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
560 ivar &= ~(0xFF << index);
561 ivar |= (msix_vector << index);
562 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
570 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
575 switch (adapter->hw.mac.type) {
576 case ixgbe_mac_82598EB:
577 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
578 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
580 case ixgbe_mac_82599EB:
582 mask = (qmask & 0xFFFFFFFF);
583 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
584 mask = (qmask >> 32);
585 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
592 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
593 struct ixgbe_tx_buffer *tx_buffer)
595 if (tx_buffer->skb) {
596 dev_kfree_skb_any(tx_buffer->skb);
597 if (dma_unmap_len(tx_buffer, len))
598 dma_unmap_single(ring->dev,
599 dma_unmap_addr(tx_buffer, dma),
600 dma_unmap_len(tx_buffer, len),
602 } else if (dma_unmap_len(tx_buffer, len)) {
603 dma_unmap_page(ring->dev,
604 dma_unmap_addr(tx_buffer, dma),
605 dma_unmap_len(tx_buffer, len),
608 tx_buffer->next_to_watch = NULL;
609 tx_buffer->skb = NULL;
610 dma_unmap_len_set(tx_buffer, len, 0);
611 /* tx_buffer must be completely set up in the transmit path */
614 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
616 struct ixgbe_hw *hw = &adapter->hw;
617 struct ixgbe_hw_stats *hwstats = &adapter->stats;
621 if ((hw->fc.current_mode != ixgbe_fc_full) &&
622 (hw->fc.current_mode != ixgbe_fc_rx_pause))
625 switch (hw->mac.type) {
626 case ixgbe_mac_82598EB:
627 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
630 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
632 hwstats->lxoffrxc += data;
634 /* refill credits (no tx hang) if we received xoff */
638 for (i = 0; i < adapter->num_tx_queues; i++)
639 clear_bit(__IXGBE_HANG_CHECK_ARMED,
640 &adapter->tx_ring[i]->state);
643 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
645 struct ixgbe_hw *hw = &adapter->hw;
646 struct ixgbe_hw_stats *hwstats = &adapter->stats;
649 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
651 if (adapter->ixgbe_ieee_pfc)
652 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
654 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
655 ixgbe_update_xoff_rx_lfc(adapter);
659 /* update stats for each tc, only valid with PFC enabled */
660 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
661 switch (hw->mac.type) {
662 case ixgbe_mac_82598EB:
663 xoff[i] = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
666 xoff[i] = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
668 hwstats->pxoffrxc[i] += xoff[i];
671 /* disarm tx queues that have received xoff frames */
672 for (i = 0; i < adapter->num_tx_queues; i++) {
673 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
674 u8 tc = tx_ring->dcb_tc;
677 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
681 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
683 return ring->stats.packets;
686 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
688 struct ixgbe_adapter *adapter = netdev_priv(ring->netdev);
689 struct ixgbe_hw *hw = &adapter->hw;
691 u32 head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
692 u32 tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
695 return (head < tail) ?
696 tail - head : (tail + ring->count - head);
701 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
703 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
704 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
705 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
708 clear_check_for_tx_hang(tx_ring);
711 * Check for a hung queue, but be thorough. This verifies
712 * that a transmit has been completed since the previous
713 * check AND there is at least one packet pending. The
714 * ARMED bit is set to indicate a potential hang. The
715 * bit is cleared if a pause frame is received to remove
716 * false hang detection due to PFC or 802.3x frames. By
717 * requiring this to fail twice we avoid races with
718 * pfc clearing the ARMED bit and conditions where we
719 * run the check_tx_hang logic with a transmit completion
720 * pending but without time to complete it yet.
722 if ((tx_done_old == tx_done) && tx_pending) {
723 /* make sure it is true for two checks in a row */
724 ret = test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
727 /* update completed stats and continue */
728 tx_ring->tx_stats.tx_done_old = tx_done;
729 /* reset the countdown */
730 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
737 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
738 * @adapter: driver private struct
740 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
743 /* Do the reset outside of interrupt context */
744 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
745 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
746 ixgbe_service_event_schedule(adapter);
751 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
752 * @q_vector: structure containing interrupt and ring information
753 * @tx_ring: tx ring to clean
755 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
756 struct ixgbe_ring *tx_ring)
758 struct ixgbe_adapter *adapter = q_vector->adapter;
759 struct ixgbe_tx_buffer *tx_buffer;
760 union ixgbe_adv_tx_desc *tx_desc;
761 unsigned int total_bytes = 0, total_packets = 0;
762 unsigned int budget = q_vector->tx.work_limit;
763 unsigned int i = tx_ring->next_to_clean;
765 if (test_bit(__IXGBE_DOWN, &adapter->state))
768 tx_buffer = &tx_ring->tx_buffer_info[i];
769 tx_desc = IXGBE_TX_DESC(tx_ring, i);
773 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
775 /* if next_to_watch is not set then there is no work pending */
779 /* prevent any other reads prior to eop_desc */
782 /* if DD is not set pending work has not been completed */
783 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
786 /* clear next_to_watch to prevent false hangs */
787 tx_buffer->next_to_watch = NULL;
789 /* update the statistics for this packet */
790 total_bytes += tx_buffer->bytecount;
791 total_packets += tx_buffer->gso_segs;
793 #ifdef CONFIG_IXGBE_PTP
794 if (unlikely(tx_buffer->tx_flags & IXGBE_TX_FLAGS_TSTAMP))
795 ixgbe_ptp_tx_hwtstamp(q_vector, tx_buffer->skb);
799 dev_kfree_skb_any(tx_buffer->skb);
801 /* unmap skb header data */
802 dma_unmap_single(tx_ring->dev,
803 dma_unmap_addr(tx_buffer, dma),
804 dma_unmap_len(tx_buffer, len),
807 /* clear tx_buffer data */
808 tx_buffer->skb = NULL;
809 dma_unmap_len_set(tx_buffer, len, 0);
811 /* unmap remaining buffers */
812 while (tx_desc != eop_desc) {
818 tx_buffer = tx_ring->tx_buffer_info;
819 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
822 /* unmap any remaining paged data */
823 if (dma_unmap_len(tx_buffer, len)) {
824 dma_unmap_page(tx_ring->dev,
825 dma_unmap_addr(tx_buffer, dma),
826 dma_unmap_len(tx_buffer, len),
828 dma_unmap_len_set(tx_buffer, len, 0);
832 /* move us one more past the eop_desc for start of next pkt */
838 tx_buffer = tx_ring->tx_buffer_info;
839 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
842 /* issue prefetch for next Tx descriptor */
845 /* update budget accounting */
847 } while (likely(budget));
850 tx_ring->next_to_clean = i;
851 u64_stats_update_begin(&tx_ring->syncp);
852 tx_ring->stats.bytes += total_bytes;
853 tx_ring->stats.packets += total_packets;
854 u64_stats_update_end(&tx_ring->syncp);
855 q_vector->tx.total_bytes += total_bytes;
856 q_vector->tx.total_packets += total_packets;
858 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
859 /* schedule immediate reset if we believe we hung */
860 struct ixgbe_hw *hw = &adapter->hw;
861 e_err(drv, "Detected Tx Unit Hang\n"
863 " TDH, TDT <%x>, <%x>\n"
864 " next_to_use <%x>\n"
865 " next_to_clean <%x>\n"
866 "tx_buffer_info[next_to_clean]\n"
867 " time_stamp <%lx>\n"
869 tx_ring->queue_index,
870 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
871 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
872 tx_ring->next_to_use, i,
873 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
875 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
878 "tx hang %d detected on queue %d, resetting adapter\n",
879 adapter->tx_timeout_count + 1, tx_ring->queue_index);
881 /* schedule immediate reset if we believe we hung */
882 ixgbe_tx_timeout_reset(adapter);
884 /* the adapter is about to reset, no point in enabling stuff */
888 netdev_tx_completed_queue(txring_txq(tx_ring),
889 total_packets, total_bytes);
891 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
892 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
893 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
894 /* Make sure that anybody stopping the queue after this
895 * sees the new next_to_clean.
898 if (__netif_subqueue_stopped(tx_ring->netdev,
899 tx_ring->queue_index)
900 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
901 netif_wake_subqueue(tx_ring->netdev,
902 tx_ring->queue_index);
903 ++tx_ring->tx_stats.restart_queue;
910 #ifdef CONFIG_IXGBE_DCA
911 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
912 struct ixgbe_ring *tx_ring,
915 struct ixgbe_hw *hw = &adapter->hw;
916 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
919 switch (hw->mac.type) {
920 case ixgbe_mac_82598EB:
921 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
923 case ixgbe_mac_82599EB:
925 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
926 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
929 /* for unknown hardware do not write register */
934 * We can enable relaxed ordering for reads, but not writes when
935 * DCA is enabled. This is due to a known issue in some chipsets
936 * which will cause the DCA tag to be cleared.
938 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
939 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
940 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
942 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
945 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
946 struct ixgbe_ring *rx_ring,
949 struct ixgbe_hw *hw = &adapter->hw;
950 u32 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
951 u8 reg_idx = rx_ring->reg_idx;
954 switch (hw->mac.type) {
955 case ixgbe_mac_82599EB:
957 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
964 * We can enable relaxed ordering for reads, but not writes when
965 * DCA is enabled. This is due to a known issue in some chipsets
966 * which will cause the DCA tag to be cleared.
968 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
969 IXGBE_DCA_RXCTRL_DATA_DCA_EN |
970 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
972 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
975 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
977 struct ixgbe_adapter *adapter = q_vector->adapter;
978 struct ixgbe_ring *ring;
981 if (q_vector->cpu == cpu)
984 ixgbe_for_each_ring(ring, q_vector->tx)
985 ixgbe_update_tx_dca(adapter, ring, cpu);
987 ixgbe_for_each_ring(ring, q_vector->rx)
988 ixgbe_update_rx_dca(adapter, ring, cpu);
995 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
999 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
1002 /* always use CB2 mode, difference is masked in the CB driver */
1003 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
1005 for (i = 0; i < adapter->num_q_vectors; i++) {
1006 adapter->q_vector[i]->cpu = -1;
1007 ixgbe_update_dca(adapter->q_vector[i]);
1011 static int __ixgbe_notify_dca(struct device *dev, void *data)
1013 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1014 unsigned long event = *(unsigned long *)data;
1016 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1020 case DCA_PROVIDER_ADD:
1021 /* if we're already enabled, don't do it again */
1022 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1024 if (dca_add_requester(dev) == 0) {
1025 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1026 ixgbe_setup_dca(adapter);
1029 /* Fall Through since DCA is disabled. */
1030 case DCA_PROVIDER_REMOVE:
1031 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1032 dca_remove_requester(dev);
1033 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1034 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
1042 #endif /* CONFIG_IXGBE_DCA */
1043 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1044 union ixgbe_adv_rx_desc *rx_desc,
1045 struct sk_buff *skb)
1047 if (ring->netdev->features & NETIF_F_RXHASH)
1048 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
1053 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1054 * @ring: structure containing ring specific data
1055 * @rx_desc: advanced rx descriptor
1057 * Returns : true if it is FCoE pkt
1059 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1060 union ixgbe_adv_rx_desc *rx_desc)
1062 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1064 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1065 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1066 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1067 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1070 #endif /* IXGBE_FCOE */
1072 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1073 * @ring: structure containing ring specific data
1074 * @rx_desc: current Rx descriptor being processed
1075 * @skb: skb currently being received and modified
1077 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1078 union ixgbe_adv_rx_desc *rx_desc,
1079 struct sk_buff *skb)
1081 skb_checksum_none_assert(skb);
1083 /* Rx csum disabled */
1084 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1087 /* if IP and error */
1088 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1089 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1090 ring->rx_stats.csum_err++;
1094 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1097 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1098 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1101 * 82599 errata, UDP frames with a 0 checksum can be marked as
1104 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1105 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1108 ring->rx_stats.csum_err++;
1112 /* It must be a TCP or UDP packet with a valid checksum */
1113 skb->ip_summed = CHECKSUM_UNNECESSARY;
1116 static inline void ixgbe_release_rx_desc(struct ixgbe_ring *rx_ring, u32 val)
1118 rx_ring->next_to_use = val;
1120 /* update next to alloc since we have filled the ring */
1121 rx_ring->next_to_alloc = val;
1123 * Force memory writes to complete before letting h/w
1124 * know there are new descriptors to fetch. (Only
1125 * applicable for weak-ordered memory model archs,
1129 writel(val, rx_ring->tail);
1132 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1133 struct ixgbe_rx_buffer *bi)
1135 struct page *page = bi->page;
1136 dma_addr_t dma = bi->dma;
1138 /* since we are recycling buffers we should seldom need to alloc */
1142 /* alloc new page for storage */
1143 if (likely(!page)) {
1144 page = __skb_alloc_pages(GFP_ATOMIC | __GFP_COLD | __GFP_COMP,
1145 bi->skb, ixgbe_rx_pg_order(rx_ring));
1146 if (unlikely(!page)) {
1147 rx_ring->rx_stats.alloc_rx_page_failed++;
1153 /* map page for use */
1154 dma = dma_map_page(rx_ring->dev, page, 0,
1155 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1158 * if mapping failed free memory back to system since
1159 * there isn't much point in holding memory we can't use
1161 if (dma_mapping_error(rx_ring->dev, dma)) {
1162 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1165 rx_ring->rx_stats.alloc_rx_page_failed++;
1170 bi->page_offset = 0;
1176 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1177 * @rx_ring: ring to place buffers on
1178 * @cleaned_count: number of buffers to replace
1180 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1182 union ixgbe_adv_rx_desc *rx_desc;
1183 struct ixgbe_rx_buffer *bi;
1184 u16 i = rx_ring->next_to_use;
1190 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1191 bi = &rx_ring->rx_buffer_info[i];
1192 i -= rx_ring->count;
1195 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1199 * Refresh the desc even if buffer_addrs didn't change
1200 * because each write-back erases this info.
1202 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1208 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1209 bi = rx_ring->rx_buffer_info;
1210 i -= rx_ring->count;
1213 /* clear the hdr_addr for the next_to_use descriptor */
1214 rx_desc->read.hdr_addr = 0;
1217 } while (cleaned_count);
1219 i += rx_ring->count;
1221 if (rx_ring->next_to_use != i)
1222 ixgbe_release_rx_desc(rx_ring, i);
1226 * ixgbe_get_headlen - determine size of header for RSC/LRO/GRO/FCOE
1227 * @data: pointer to the start of the headers
1228 * @max_len: total length of section to find headers in
1230 * This function is meant to determine the length of headers that will
1231 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1232 * motivation of doing this is to only perform one pull for IPv4 TCP
1233 * packets so that we can do basic things like calculating the gso_size
1234 * based on the average data per packet.
1236 static unsigned int ixgbe_get_headlen(unsigned char *data,
1237 unsigned int max_len)
1240 unsigned char *network;
1243 struct vlan_hdr *vlan;
1248 u8 nexthdr = 0; /* default to not TCP */
1251 /* this should never happen, but better safe than sorry */
1252 if (max_len < ETH_HLEN)
1255 /* initialize network frame pointer */
1258 /* set first protocol and move network header forward */
1259 protocol = hdr.eth->h_proto;
1260 hdr.network += ETH_HLEN;
1262 /* handle any vlan tag if present */
1263 if (protocol == __constant_htons(ETH_P_8021Q)) {
1264 if ((hdr.network - data) > (max_len - VLAN_HLEN))
1267 protocol = hdr.vlan->h_vlan_encapsulated_proto;
1268 hdr.network += VLAN_HLEN;
1271 /* handle L3 protocols */
1272 if (protocol == __constant_htons(ETH_P_IP)) {
1273 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
1276 /* access ihl as a u8 to avoid unaligned access on ia64 */
1277 hlen = (hdr.network[0] & 0x0F) << 2;
1279 /* verify hlen meets minimum size requirements */
1280 if (hlen < sizeof(struct iphdr))
1281 return hdr.network - data;
1283 /* record next protocol */
1284 nexthdr = hdr.ipv4->protocol;
1285 hdr.network += hlen;
1287 } else if (protocol == __constant_htons(ETH_P_FCOE)) {
1288 if ((hdr.network - data) > (max_len - FCOE_HEADER_LEN))
1290 hdr.network += FCOE_HEADER_LEN;
1293 return hdr.network - data;
1296 /* finally sort out TCP */
1297 if (nexthdr == IPPROTO_TCP) {
1298 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
1301 /* access doff as a u8 to avoid unaligned access on ia64 */
1302 hlen = (hdr.network[12] & 0xF0) >> 2;
1304 /* verify hlen meets minimum size requirements */
1305 if (hlen < sizeof(struct tcphdr))
1306 return hdr.network - data;
1308 hdr.network += hlen;
1312 * If everything has gone correctly hdr.network should be the
1313 * data section of the packet and will be the end of the header.
1314 * If not then it probably represents the end of the last recognized
1317 if ((hdr.network - data) < max_len)
1318 return hdr.network - data;
1323 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1324 struct sk_buff *skb)
1326 u16 hdr_len = skb_headlen(skb);
1328 /* set gso_size to avoid messing up TCP MSS */
1329 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1330 IXGBE_CB(skb)->append_cnt);
1333 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1334 struct sk_buff *skb)
1336 /* if append_cnt is 0 then frame is not RSC */
1337 if (!IXGBE_CB(skb)->append_cnt)
1340 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1341 rx_ring->rx_stats.rsc_flush++;
1343 ixgbe_set_rsc_gso_size(rx_ring, skb);
1345 /* gso_size is computed using append_cnt so always clear it last */
1346 IXGBE_CB(skb)->append_cnt = 0;
1350 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1351 * @rx_ring: rx descriptor ring packet is being transacted on
1352 * @rx_desc: pointer to the EOP Rx descriptor
1353 * @skb: pointer to current skb being populated
1355 * This function checks the ring, descriptor, and packet information in
1356 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1357 * other fields within the skb.
1359 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1360 union ixgbe_adv_rx_desc *rx_desc,
1361 struct sk_buff *skb)
1363 struct net_device *dev = rx_ring->netdev;
1365 ixgbe_update_rsc_stats(rx_ring, skb);
1367 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1369 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1371 #ifdef CONFIG_IXGBE_PTP
1372 ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector, rx_desc, skb);
1375 if ((dev->features & NETIF_F_HW_VLAN_RX) &&
1376 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1377 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1378 __vlan_hwaccel_put_tag(skb, vid);
1381 skb_record_rx_queue(skb, rx_ring->queue_index);
1383 skb->protocol = eth_type_trans(skb, dev);
1386 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1387 struct sk_buff *skb)
1389 struct ixgbe_adapter *adapter = q_vector->adapter;
1391 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1392 napi_gro_receive(&q_vector->napi, skb);
1398 * ixgbe_is_non_eop - process handling of non-EOP buffers
1399 * @rx_ring: Rx ring being processed
1400 * @rx_desc: Rx descriptor for current buffer
1401 * @skb: Current socket buffer containing buffer in progress
1403 * This function updates next to clean. If the buffer is an EOP buffer
1404 * this function exits returning false, otherwise it will place the
1405 * sk_buff in the next buffer to be chained and return true indicating
1406 * that this is in fact a non-EOP buffer.
1408 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1409 union ixgbe_adv_rx_desc *rx_desc,
1410 struct sk_buff *skb)
1412 u32 ntc = rx_ring->next_to_clean + 1;
1414 /* fetch, update, and store next to clean */
1415 ntc = (ntc < rx_ring->count) ? ntc : 0;
1416 rx_ring->next_to_clean = ntc;
1418 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1420 /* update RSC append count if present */
1421 if (ring_is_rsc_enabled(rx_ring)) {
1422 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1423 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1425 if (unlikely(rsc_enabled)) {
1426 u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1428 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1429 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1431 /* update ntc based on RSC value */
1432 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1433 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1434 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1438 /* if we are the last buffer then there is nothing else to do */
1439 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1442 /* place skb in next buffer to be received */
1443 rx_ring->rx_buffer_info[ntc].skb = skb;
1444 rx_ring->rx_stats.non_eop_descs++;
1450 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1451 * @rx_ring: rx descriptor ring packet is being transacted on
1452 * @skb: pointer to current skb being adjusted
1454 * This function is an ixgbe specific version of __pskb_pull_tail. The
1455 * main difference between this version and the original function is that
1456 * this function can make several assumptions about the state of things
1457 * that allow for significant optimizations versus the standard function.
1458 * As a result we can do things like drop a frag and maintain an accurate
1459 * truesize for the skb.
1461 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1462 struct sk_buff *skb)
1464 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1466 unsigned int pull_len;
1469 * it is valid to use page_address instead of kmap since we are
1470 * working with pages allocated out of the lomem pool per
1471 * alloc_page(GFP_ATOMIC)
1473 va = skb_frag_address(frag);
1476 * we need the header to contain the greater of either ETH_HLEN or
1477 * 60 bytes if the skb->len is less than 60 for skb_pad.
1479 pull_len = ixgbe_get_headlen(va, IXGBE_RX_HDR_SIZE);
1481 /* align pull length to size of long to optimize memcpy performance */
1482 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1484 /* update all of the pointers */
1485 skb_frag_size_sub(frag, pull_len);
1486 frag->page_offset += pull_len;
1487 skb->data_len -= pull_len;
1488 skb->tail += pull_len;
1492 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1493 * @rx_ring: rx descriptor ring packet is being transacted on
1494 * @skb: pointer to current skb being updated
1496 * This function provides a basic DMA sync up for the first fragment of an
1497 * skb. The reason for doing this is that the first fragment cannot be
1498 * unmapped until we have reached the end of packet descriptor for a buffer
1501 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1502 struct sk_buff *skb)
1504 /* if the page was released unmap it, else just sync our portion */
1505 if (unlikely(IXGBE_CB(skb)->page_released)) {
1506 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1507 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1508 IXGBE_CB(skb)->page_released = false;
1510 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1512 dma_sync_single_range_for_cpu(rx_ring->dev,
1515 ixgbe_rx_bufsz(rx_ring),
1518 IXGBE_CB(skb)->dma = 0;
1522 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1523 * @rx_ring: rx descriptor ring packet is being transacted on
1524 * @rx_desc: pointer to the EOP Rx descriptor
1525 * @skb: pointer to current skb being fixed
1527 * Check for corrupted packet headers caused by senders on the local L2
1528 * embedded NIC switch not setting up their Tx Descriptors right. These
1529 * should be very rare.
1531 * Also address the case where we are pulling data in on pages only
1532 * and as such no data is present in the skb header.
1534 * In addition if skb is not at least 60 bytes we need to pad it so that
1535 * it is large enough to qualify as a valid Ethernet frame.
1537 * Returns true if an error was encountered and skb was freed.
1539 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1540 union ixgbe_adv_rx_desc *rx_desc,
1541 struct sk_buff *skb)
1543 struct net_device *netdev = rx_ring->netdev;
1545 /* verify that the packet does not have any known errors */
1546 if (unlikely(ixgbe_test_staterr(rx_desc,
1547 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1548 !(netdev->features & NETIF_F_RXALL))) {
1549 dev_kfree_skb_any(skb);
1553 /* place header in linear portion of buffer */
1554 if (skb_is_nonlinear(skb))
1555 ixgbe_pull_tail(rx_ring, skb);
1558 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1559 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1563 /* if skb_pad returns an error the skb was freed */
1564 if (unlikely(skb->len < 60)) {
1565 int pad_len = 60 - skb->len;
1567 if (skb_pad(skb, pad_len))
1569 __skb_put(skb, pad_len);
1576 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1577 * @rx_ring: rx descriptor ring to store buffers on
1578 * @old_buff: donor buffer to have page reused
1580 * Synchronizes page for reuse by the adapter
1582 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1583 struct ixgbe_rx_buffer *old_buff)
1585 struct ixgbe_rx_buffer *new_buff;
1586 u16 nta = rx_ring->next_to_alloc;
1588 new_buff = &rx_ring->rx_buffer_info[nta];
1590 /* update, and store next to alloc */
1592 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1594 /* transfer page from old buffer to new buffer */
1595 new_buff->page = old_buff->page;
1596 new_buff->dma = old_buff->dma;
1597 new_buff->page_offset = old_buff->page_offset;
1599 /* sync the buffer for use by the device */
1600 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1601 new_buff->page_offset,
1602 ixgbe_rx_bufsz(rx_ring),
1607 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1608 * @rx_ring: rx descriptor ring to transact packets on
1609 * @rx_buffer: buffer containing page to add
1610 * @rx_desc: descriptor containing length of buffer written by hardware
1611 * @skb: sk_buff to place the data into
1613 * This function will add the data contained in rx_buffer->page to the skb.
1614 * This is done either through a direct copy if the data in the buffer is
1615 * less than the skb header size, otherwise it will just attach the page as
1616 * a frag to the skb.
1618 * The function will then update the page offset if necessary and return
1619 * true if the buffer can be reused by the adapter.
1621 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1622 struct ixgbe_rx_buffer *rx_buffer,
1623 union ixgbe_adv_rx_desc *rx_desc,
1624 struct sk_buff *skb)
1626 struct page *page = rx_buffer->page;
1627 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1628 #if (PAGE_SIZE < 8192)
1629 unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1631 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1632 unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1633 ixgbe_rx_bufsz(rx_ring);
1636 if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1637 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1639 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1641 /* we can reuse buffer as-is, just make sure it is local */
1642 if (likely(page_to_nid(page) == numa_node_id()))
1645 /* this page cannot be reused so discard it */
1650 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1651 rx_buffer->page_offset, size, truesize);
1653 /* avoid re-using remote pages */
1654 if (unlikely(page_to_nid(page) != numa_node_id()))
1657 #if (PAGE_SIZE < 8192)
1658 /* if we are only owner of page we can reuse it */
1659 if (unlikely(page_count(page) != 1))
1662 /* flip page offset to other buffer */
1663 rx_buffer->page_offset ^= truesize;
1666 * since we are the only owner of the page and we need to
1667 * increment it, just set the value to 2 in order to avoid
1668 * an unecessary locked operation
1670 atomic_set(&page->_count, 2);
1672 /* move offset up to the next cache line */
1673 rx_buffer->page_offset += truesize;
1675 if (rx_buffer->page_offset > last_offset)
1678 /* bump ref count on page before it is given to the stack */
1685 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
1686 union ixgbe_adv_rx_desc *rx_desc)
1688 struct ixgbe_rx_buffer *rx_buffer;
1689 struct sk_buff *skb;
1692 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
1693 page = rx_buffer->page;
1696 skb = rx_buffer->skb;
1699 void *page_addr = page_address(page) +
1700 rx_buffer->page_offset;
1702 /* prefetch first cache line of first page */
1703 prefetch(page_addr);
1704 #if L1_CACHE_BYTES < 128
1705 prefetch(page_addr + L1_CACHE_BYTES);
1708 /* allocate a skb to store the frags */
1709 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
1711 if (unlikely(!skb)) {
1712 rx_ring->rx_stats.alloc_rx_buff_failed++;
1717 * we will be copying header into skb->data in
1718 * pskb_may_pull so it is in our interest to prefetch
1719 * it now to avoid a possible cache miss
1721 prefetchw(skb->data);
1724 * Delay unmapping of the first packet. It carries the
1725 * header information, HW may still access the header
1726 * after the writeback. Only unmap it when EOP is
1729 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1732 IXGBE_CB(skb)->dma = rx_buffer->dma;
1734 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
1735 ixgbe_dma_sync_frag(rx_ring, skb);
1738 /* we are reusing so sync this buffer for CPU use */
1739 dma_sync_single_range_for_cpu(rx_ring->dev,
1741 rx_buffer->page_offset,
1742 ixgbe_rx_bufsz(rx_ring),
1746 /* pull page into skb */
1747 if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
1748 /* hand second half of page back to the ring */
1749 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
1750 } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
1751 /* the page has been released from the ring */
1752 IXGBE_CB(skb)->page_released = true;
1754 /* we are not reusing the buffer so unmap it */
1755 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
1756 ixgbe_rx_pg_size(rx_ring),
1760 /* clear contents of buffer_info */
1761 rx_buffer->skb = NULL;
1763 rx_buffer->page = NULL;
1769 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1770 * @q_vector: structure containing interrupt and ring information
1771 * @rx_ring: rx descriptor ring to transact packets on
1772 * @budget: Total limit on number of packets to process
1774 * This function provides a "bounce buffer" approach to Rx interrupt
1775 * processing. The advantage to this is that on systems that have
1776 * expensive overhead for IOMMU access this provides a means of avoiding
1777 * it by maintaining the mapping of the page to the syste.
1779 * Returns true if all work is completed without reaching budget
1781 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
1782 struct ixgbe_ring *rx_ring,
1785 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1787 struct ixgbe_adapter *adapter = q_vector->adapter;
1789 #endif /* IXGBE_FCOE */
1790 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
1793 union ixgbe_adv_rx_desc *rx_desc;
1794 struct sk_buff *skb;
1796 /* return some buffers to hardware, one at a time is too slow */
1797 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
1798 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
1802 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
1804 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
1808 * This memory barrier is needed to keep us from reading
1809 * any other fields out of the rx_desc until we know the
1810 * RXD_STAT_DD bit is set
1814 /* retrieve a buffer from the ring */
1815 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
1817 /* exit if we failed to retrieve a buffer */
1823 /* place incomplete frames back on ring for completion */
1824 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
1827 /* verify the packet layout is correct */
1828 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
1831 /* probably a little skewed due to removing CRC */
1832 total_rx_bytes += skb->len;
1835 /* populate checksum, timestamp, VLAN, and protocol */
1836 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
1839 /* if ddp, not passing to ULD unless for FCP_RSP or error */
1840 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
1841 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
1843 dev_kfree_skb_any(skb);
1848 #endif /* IXGBE_FCOE */
1849 ixgbe_rx_skb(q_vector, skb);
1851 /* update budget accounting */
1853 } while (likely(budget));
1856 /* include DDPed FCoE data */
1857 if (ddp_bytes > 0) {
1860 mss = rx_ring->netdev->mtu - sizeof(struct fcoe_hdr) -
1861 sizeof(struct fc_frame_header) -
1862 sizeof(struct fcoe_crc_eof);
1865 total_rx_bytes += ddp_bytes;
1866 total_rx_packets += DIV_ROUND_UP(ddp_bytes, mss);
1869 #endif /* IXGBE_FCOE */
1870 u64_stats_update_begin(&rx_ring->syncp);
1871 rx_ring->stats.packets += total_rx_packets;
1872 rx_ring->stats.bytes += total_rx_bytes;
1873 u64_stats_update_end(&rx_ring->syncp);
1874 q_vector->rx.total_packets += total_rx_packets;
1875 q_vector->rx.total_bytes += total_rx_bytes;
1878 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
1884 * ixgbe_configure_msix - Configure MSI-X hardware
1885 * @adapter: board private structure
1887 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
1890 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
1892 struct ixgbe_q_vector *q_vector;
1896 /* Populate MSIX to EITR Select */
1897 if (adapter->num_vfs > 32) {
1898 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
1899 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
1903 * Populate the IVAR table and set the ITR values to the
1904 * corresponding register.
1906 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
1907 struct ixgbe_ring *ring;
1908 q_vector = adapter->q_vector[v_idx];
1910 ixgbe_for_each_ring(ring, q_vector->rx)
1911 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
1913 ixgbe_for_each_ring(ring, q_vector->tx)
1914 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
1916 if (q_vector->tx.ring && !q_vector->rx.ring) {
1917 /* tx only vector */
1918 if (adapter->tx_itr_setting == 1)
1919 q_vector->itr = IXGBE_10K_ITR;
1921 q_vector->itr = adapter->tx_itr_setting;
1923 /* rx or rx/tx vector */
1924 if (adapter->rx_itr_setting == 1)
1925 q_vector->itr = IXGBE_20K_ITR;
1927 q_vector->itr = adapter->rx_itr_setting;
1930 ixgbe_write_eitr(q_vector);
1933 switch (adapter->hw.mac.type) {
1934 case ixgbe_mac_82598EB:
1935 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
1938 case ixgbe_mac_82599EB:
1939 case ixgbe_mac_X540:
1940 ixgbe_set_ivar(adapter, -1, 1, v_idx);
1945 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
1947 /* set up to autoclear timer, and the vectors */
1948 mask = IXGBE_EIMS_ENABLE_MASK;
1949 mask &= ~(IXGBE_EIMS_OTHER |
1950 IXGBE_EIMS_MAILBOX |
1953 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
1956 enum latency_range {
1960 latency_invalid = 255
1964 * ixgbe_update_itr - update the dynamic ITR value based on statistics
1965 * @q_vector: structure containing interrupt and ring information
1966 * @ring_container: structure containing ring performance data
1968 * Stores a new ITR value based on packets and byte
1969 * counts during the last interrupt. The advantage of per interrupt
1970 * computation is faster updates and more accurate ITR for the current
1971 * traffic pattern. Constants in this function were computed
1972 * based on theoretical maximum wire speed and thresholds were set based
1973 * on testing data as well as attempting to minimize response time
1974 * while increasing bulk throughput.
1975 * this functionality is controlled by the InterruptThrottleRate module
1976 * parameter (see ixgbe_param.c)
1978 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
1979 struct ixgbe_ring_container *ring_container)
1981 int bytes = ring_container->total_bytes;
1982 int packets = ring_container->total_packets;
1985 u8 itr_setting = ring_container->itr;
1990 /* simple throttlerate management
1991 * 0-10MB/s lowest (100000 ints/s)
1992 * 10-20MB/s low (20000 ints/s)
1993 * 20-1249MB/s bulk (8000 ints/s)
1995 /* what was last interrupt timeslice? */
1996 timepassed_us = q_vector->itr >> 2;
1997 bytes_perint = bytes / timepassed_us; /* bytes/usec */
1999 switch (itr_setting) {
2000 case lowest_latency:
2001 if (bytes_perint > 10)
2002 itr_setting = low_latency;
2005 if (bytes_perint > 20)
2006 itr_setting = bulk_latency;
2007 else if (bytes_perint <= 10)
2008 itr_setting = lowest_latency;
2011 if (bytes_perint <= 20)
2012 itr_setting = low_latency;
2016 /* clear work counters since we have the values we need */
2017 ring_container->total_bytes = 0;
2018 ring_container->total_packets = 0;
2020 /* write updated itr to ring container */
2021 ring_container->itr = itr_setting;
2025 * ixgbe_write_eitr - write EITR register in hardware specific way
2026 * @q_vector: structure containing interrupt and ring information
2028 * This function is made to be called by ethtool and by the driver
2029 * when it needs to update EITR registers at runtime. Hardware
2030 * specific quirks/differences are taken care of here.
2032 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2034 struct ixgbe_adapter *adapter = q_vector->adapter;
2035 struct ixgbe_hw *hw = &adapter->hw;
2036 int v_idx = q_vector->v_idx;
2037 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2039 switch (adapter->hw.mac.type) {
2040 case ixgbe_mac_82598EB:
2041 /* must write high and low 16 bits to reset counter */
2042 itr_reg |= (itr_reg << 16);
2044 case ixgbe_mac_82599EB:
2045 case ixgbe_mac_X540:
2047 * set the WDIS bit to not clear the timer bits and cause an
2048 * immediate assertion of the interrupt
2050 itr_reg |= IXGBE_EITR_CNT_WDIS;
2055 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2058 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2060 u32 new_itr = q_vector->itr;
2063 ixgbe_update_itr(q_vector, &q_vector->tx);
2064 ixgbe_update_itr(q_vector, &q_vector->rx);
2066 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2068 switch (current_itr) {
2069 /* counts and packets in update_itr are dependent on these numbers */
2070 case lowest_latency:
2071 new_itr = IXGBE_100K_ITR;
2074 new_itr = IXGBE_20K_ITR;
2077 new_itr = IXGBE_8K_ITR;
2083 if (new_itr != q_vector->itr) {
2084 /* do an exponential smoothing */
2085 new_itr = (10 * new_itr * q_vector->itr) /
2086 ((9 * new_itr) + q_vector->itr);
2088 /* save the algorithm value here */
2089 q_vector->itr = new_itr;
2091 ixgbe_write_eitr(q_vector);
2096 * ixgbe_check_overtemp_subtask - check for over temperature
2097 * @adapter: pointer to adapter
2099 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2101 struct ixgbe_hw *hw = &adapter->hw;
2102 u32 eicr = adapter->interrupt_event;
2104 if (test_bit(__IXGBE_DOWN, &adapter->state))
2107 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2108 !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2111 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2113 switch (hw->device_id) {
2114 case IXGBE_DEV_ID_82599_T3_LOM:
2116 * Since the warning interrupt is for both ports
2117 * we don't have to check if:
2118 * - This interrupt wasn't for our port.
2119 * - We may have missed the interrupt so always have to
2120 * check if we got a LSC
2122 if (!(eicr & IXGBE_EICR_GPI_SDP0) &&
2123 !(eicr & IXGBE_EICR_LSC))
2126 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2128 bool link_up = false;
2130 hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
2136 /* Check if this is not due to overtemp */
2137 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2142 if (!(eicr & IXGBE_EICR_GPI_SDP0))
2147 "Network adapter has been stopped because it has over heated. "
2148 "Restart the computer. If the problem persists, "
2149 "power off the system and replace the adapter\n");
2151 adapter->interrupt_event = 0;
2154 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2156 struct ixgbe_hw *hw = &adapter->hw;
2158 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2159 (eicr & IXGBE_EICR_GPI_SDP1)) {
2160 e_crit(probe, "Fan has stopped, replace the adapter\n");
2161 /* write to clear the interrupt */
2162 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2166 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2168 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2171 switch (adapter->hw.mac.type) {
2172 case ixgbe_mac_82599EB:
2174 * Need to check link state so complete overtemp check
2177 if (((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC)) &&
2178 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2179 adapter->interrupt_event = eicr;
2180 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2181 ixgbe_service_event_schedule(adapter);
2185 case ixgbe_mac_X540:
2186 if (!(eicr & IXGBE_EICR_TS))
2194 "Network adapter has been stopped because it has over heated. "
2195 "Restart the computer. If the problem persists, "
2196 "power off the system and replace the adapter\n");
2199 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2201 struct ixgbe_hw *hw = &adapter->hw;
2203 if (eicr & IXGBE_EICR_GPI_SDP2) {
2204 /* Clear the interrupt */
2205 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
2206 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2207 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2208 ixgbe_service_event_schedule(adapter);
2212 if (eicr & IXGBE_EICR_GPI_SDP1) {
2213 /* Clear the interrupt */
2214 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2215 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2216 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2217 ixgbe_service_event_schedule(adapter);
2222 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2224 struct ixgbe_hw *hw = &adapter->hw;
2227 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2228 adapter->link_check_timeout = jiffies;
2229 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2230 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2231 IXGBE_WRITE_FLUSH(hw);
2232 ixgbe_service_event_schedule(adapter);
2236 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2240 struct ixgbe_hw *hw = &adapter->hw;
2242 switch (hw->mac.type) {
2243 case ixgbe_mac_82598EB:
2244 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2245 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2247 case ixgbe_mac_82599EB:
2248 case ixgbe_mac_X540:
2249 mask = (qmask & 0xFFFFFFFF);
2251 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2252 mask = (qmask >> 32);
2254 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2259 /* skip the flush */
2262 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2266 struct ixgbe_hw *hw = &adapter->hw;
2268 switch (hw->mac.type) {
2269 case ixgbe_mac_82598EB:
2270 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2271 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2273 case ixgbe_mac_82599EB:
2274 case ixgbe_mac_X540:
2275 mask = (qmask & 0xFFFFFFFF);
2277 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2278 mask = (qmask >> 32);
2280 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2285 /* skip the flush */
2289 * ixgbe_irq_enable - Enable default interrupt generation settings
2290 * @adapter: board private structure
2292 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2295 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2297 /* don't reenable LSC while waiting for link */
2298 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2299 mask &= ~IXGBE_EIMS_LSC;
2301 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2302 switch (adapter->hw.mac.type) {
2303 case ixgbe_mac_82599EB:
2304 mask |= IXGBE_EIMS_GPI_SDP0;
2306 case ixgbe_mac_X540:
2307 mask |= IXGBE_EIMS_TS;
2312 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2313 mask |= IXGBE_EIMS_GPI_SDP1;
2314 switch (adapter->hw.mac.type) {
2315 case ixgbe_mac_82599EB:
2316 mask |= IXGBE_EIMS_GPI_SDP1;
2317 mask |= IXGBE_EIMS_GPI_SDP2;
2318 case ixgbe_mac_X540:
2319 mask |= IXGBE_EIMS_ECC;
2320 mask |= IXGBE_EIMS_MAILBOX;
2325 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2326 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2327 mask |= IXGBE_EIMS_FLOW_DIR;
2329 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2331 ixgbe_irq_enable_queues(adapter, ~0);
2333 IXGBE_WRITE_FLUSH(&adapter->hw);
2336 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2338 struct ixgbe_adapter *adapter = data;
2339 struct ixgbe_hw *hw = &adapter->hw;
2343 * Workaround for Silicon errata. Use clear-by-write instead
2344 * of clear-by-read. Reading with EICS will return the
2345 * interrupt causes without clearing, which later be done
2346 * with the write to EICR.
2348 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2349 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2351 if (eicr & IXGBE_EICR_LSC)
2352 ixgbe_check_lsc(adapter);
2354 if (eicr & IXGBE_EICR_MAILBOX)
2355 ixgbe_msg_task(adapter);
2357 switch (hw->mac.type) {
2358 case ixgbe_mac_82599EB:
2359 case ixgbe_mac_X540:
2360 if (eicr & IXGBE_EICR_ECC)
2361 e_info(link, "Received unrecoverable ECC Err, please "
2363 /* Handle Flow Director Full threshold interrupt */
2364 if (eicr & IXGBE_EICR_FLOW_DIR) {
2365 int reinit_count = 0;
2367 for (i = 0; i < adapter->num_tx_queues; i++) {
2368 struct ixgbe_ring *ring = adapter->tx_ring[i];
2369 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2374 /* no more flow director interrupts until after init */
2375 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2376 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2377 ixgbe_service_event_schedule(adapter);
2380 ixgbe_check_sfp_event(adapter, eicr);
2381 ixgbe_check_overtemp_event(adapter, eicr);
2387 ixgbe_check_fan_failure(adapter, eicr);
2388 #ifdef CONFIG_IXGBE_PTP
2389 ixgbe_ptp_check_pps_event(adapter, eicr);
2392 /* re-enable the original interrupt state, no lsc, no queues */
2393 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2394 ixgbe_irq_enable(adapter, false, false);
2399 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2401 struct ixgbe_q_vector *q_vector = data;
2403 /* EIAM disabled interrupts (on this vector) for us */
2405 if (q_vector->rx.ring || q_vector->tx.ring)
2406 napi_schedule(&q_vector->napi);
2412 * ixgbe_poll - NAPI Rx polling callback
2413 * @napi: structure for representing this polling device
2414 * @budget: how many packets driver is allowed to clean
2416 * This function is used for legacy and MSI, NAPI mode
2418 int ixgbe_poll(struct napi_struct *napi, int budget)
2420 struct ixgbe_q_vector *q_vector =
2421 container_of(napi, struct ixgbe_q_vector, napi);
2422 struct ixgbe_adapter *adapter = q_vector->adapter;
2423 struct ixgbe_ring *ring;
2424 int per_ring_budget;
2425 bool clean_complete = true;
2427 #ifdef CONFIG_IXGBE_DCA
2428 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2429 ixgbe_update_dca(q_vector);
2432 ixgbe_for_each_ring(ring, q_vector->tx)
2433 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2435 /* attempt to distribute budget to each queue fairly, but don't allow
2436 * the budget to go below 1 because we'll exit polling */
2437 if (q_vector->rx.count > 1)
2438 per_ring_budget = max(budget/q_vector->rx.count, 1);
2440 per_ring_budget = budget;
2442 ixgbe_for_each_ring(ring, q_vector->rx)
2443 clean_complete &= ixgbe_clean_rx_irq(q_vector, ring,
2446 /* If all work not completed, return budget and keep polling */
2447 if (!clean_complete)
2450 /* all work done, exit the polling mode */
2451 napi_complete(napi);
2452 if (adapter->rx_itr_setting & 1)
2453 ixgbe_set_itr(q_vector);
2454 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2455 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2461 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2462 * @adapter: board private structure
2464 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2465 * interrupts from the kernel.
2467 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2469 struct net_device *netdev = adapter->netdev;
2473 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2474 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2475 struct msix_entry *entry = &adapter->msix_entries[vector];
2477 if (q_vector->tx.ring && q_vector->rx.ring) {
2478 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2479 "%s-%s-%d", netdev->name, "TxRx", ri++);
2481 } else if (q_vector->rx.ring) {
2482 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2483 "%s-%s-%d", netdev->name, "rx", ri++);
2484 } else if (q_vector->tx.ring) {
2485 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2486 "%s-%s-%d", netdev->name, "tx", ti++);
2488 /* skip this unused q_vector */
2491 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2492 q_vector->name, q_vector);
2494 e_err(probe, "request_irq failed for MSIX interrupt "
2495 "Error: %d\n", err);
2496 goto free_queue_irqs;
2498 /* If Flow Director is enabled, set interrupt affinity */
2499 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2500 /* assign the mask for this irq */
2501 irq_set_affinity_hint(entry->vector,
2502 &q_vector->affinity_mask);
2506 err = request_irq(adapter->msix_entries[vector].vector,
2507 ixgbe_msix_other, 0, netdev->name, adapter);
2509 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2510 goto free_queue_irqs;
2518 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2520 free_irq(adapter->msix_entries[vector].vector,
2521 adapter->q_vector[vector]);
2523 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2524 pci_disable_msix(adapter->pdev);
2525 kfree(adapter->msix_entries);
2526 adapter->msix_entries = NULL;
2531 * ixgbe_intr - legacy mode Interrupt Handler
2532 * @irq: interrupt number
2533 * @data: pointer to a network interface device structure
2535 static irqreturn_t ixgbe_intr(int irq, void *data)
2537 struct ixgbe_adapter *adapter = data;
2538 struct ixgbe_hw *hw = &adapter->hw;
2539 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2543 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2544 * before the read of EICR.
2546 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2548 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2549 * therefore no explicit interrupt disable is necessary */
2550 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2553 * shared interrupt alert!
2554 * make sure interrupts are enabled because the read will
2555 * have disabled interrupts due to EIAM
2556 * finish the workaround of silicon errata on 82598. Unmask
2557 * the interrupt that we masked before the EICR read.
2559 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2560 ixgbe_irq_enable(adapter, true, true);
2561 return IRQ_NONE; /* Not our interrupt */
2564 if (eicr & IXGBE_EICR_LSC)
2565 ixgbe_check_lsc(adapter);
2567 switch (hw->mac.type) {
2568 case ixgbe_mac_82599EB:
2569 ixgbe_check_sfp_event(adapter, eicr);
2571 case ixgbe_mac_X540:
2572 if (eicr & IXGBE_EICR_ECC)
2573 e_info(link, "Received unrecoverable ECC err, please "
2575 ixgbe_check_overtemp_event(adapter, eicr);
2581 ixgbe_check_fan_failure(adapter, eicr);
2582 #ifdef CONFIG_IXGBE_PTP
2583 ixgbe_ptp_check_pps_event(adapter, eicr);
2586 /* would disable interrupts here but EIAM disabled it */
2587 napi_schedule(&q_vector->napi);
2590 * re-enable link(maybe) and non-queue interrupts, no flush.
2591 * ixgbe_poll will re-enable the queue interrupts
2593 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2594 ixgbe_irq_enable(adapter, false, false);
2600 * ixgbe_request_irq - initialize interrupts
2601 * @adapter: board private structure
2603 * Attempts to configure interrupts using the best available
2604 * capabilities of the hardware and kernel.
2606 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2608 struct net_device *netdev = adapter->netdev;
2611 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2612 err = ixgbe_request_msix_irqs(adapter);
2613 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2614 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2615 netdev->name, adapter);
2617 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2618 netdev->name, adapter);
2621 e_err(probe, "request_irq failed, Error %d\n", err);
2626 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2630 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2631 free_irq(adapter->pdev->irq, adapter);
2635 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2636 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2637 struct msix_entry *entry = &adapter->msix_entries[vector];
2639 /* free only the irqs that were actually requested */
2640 if (!q_vector->rx.ring && !q_vector->tx.ring)
2643 /* clear the affinity_mask in the IRQ descriptor */
2644 irq_set_affinity_hint(entry->vector, NULL);
2646 free_irq(entry->vector, q_vector);
2649 free_irq(adapter->msix_entries[vector++].vector, adapter);
2653 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2654 * @adapter: board private structure
2656 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
2658 switch (adapter->hw.mac.type) {
2659 case ixgbe_mac_82598EB:
2660 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
2662 case ixgbe_mac_82599EB:
2663 case ixgbe_mac_X540:
2664 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
2665 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
2666 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
2671 IXGBE_WRITE_FLUSH(&adapter->hw);
2672 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2675 for (vector = 0; vector < adapter->num_q_vectors; vector++)
2676 synchronize_irq(adapter->msix_entries[vector].vector);
2678 synchronize_irq(adapter->msix_entries[vector++].vector);
2680 synchronize_irq(adapter->pdev->irq);
2685 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2688 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
2690 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2693 if (adapter->rx_itr_setting == 1)
2694 q_vector->itr = IXGBE_20K_ITR;
2696 q_vector->itr = adapter->rx_itr_setting;
2698 ixgbe_write_eitr(q_vector);
2700 ixgbe_set_ivar(adapter, 0, 0, 0);
2701 ixgbe_set_ivar(adapter, 1, 0, 0);
2703 e_info(hw, "Legacy interrupt IVAR setup done\n");
2707 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
2708 * @adapter: board private structure
2709 * @ring: structure containing ring specific data
2711 * Configure the Tx descriptor ring after a reset.
2713 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
2714 struct ixgbe_ring *ring)
2716 struct ixgbe_hw *hw = &adapter->hw;
2717 u64 tdba = ring->dma;
2719 u32 txdctl = IXGBE_TXDCTL_ENABLE;
2720 u8 reg_idx = ring->reg_idx;
2722 /* disable queue to avoid issues while updating state */
2723 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
2724 IXGBE_WRITE_FLUSH(hw);
2726 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
2727 (tdba & DMA_BIT_MASK(32)));
2728 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
2729 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
2730 ring->count * sizeof(union ixgbe_adv_tx_desc));
2731 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
2732 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
2733 ring->tail = hw->hw_addr + IXGBE_TDT(reg_idx);
2736 * set WTHRESH to encourage burst writeback, it should not be set
2737 * higher than 1 when ITR is 0 as it could cause false TX hangs
2739 * In order to avoid issues WTHRESH + PTHRESH should always be equal
2740 * to or less than the number of on chip descriptors, which is
2743 if (!ring->q_vector || (ring->q_vector->itr < 8))
2744 txdctl |= (1 << 16); /* WTHRESH = 1 */
2746 txdctl |= (8 << 16); /* WTHRESH = 8 */
2749 * Setting PTHRESH to 32 both improves performance
2750 * and avoids a TX hang with DFP enabled
2752 txdctl |= (1 << 8) | /* HTHRESH = 1 */
2753 32; /* PTHRESH = 32 */
2755 /* reinitialize flowdirector state */
2756 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2757 ring->atr_sample_rate = adapter->atr_sample_rate;
2758 ring->atr_count = 0;
2759 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
2761 ring->atr_sample_rate = 0;
2764 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
2767 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
2769 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
2770 if (hw->mac.type == ixgbe_mac_82598EB &&
2771 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
2774 /* poll to verify queue is enabled */
2776 usleep_range(1000, 2000);
2777 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
2778 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
2780 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
2783 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
2785 struct ixgbe_hw *hw = &adapter->hw;
2787 u8 tcs = netdev_get_num_tc(adapter->netdev);
2789 if (hw->mac.type == ixgbe_mac_82598EB)
2792 /* disable the arbiter while setting MTQC */
2793 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
2794 rttdcs |= IXGBE_RTTDCS_ARBDIS;
2795 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2797 /* set transmit pool layout */
2798 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
2799 mtqc = IXGBE_MTQC_VT_ENA;
2801 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
2803 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
2804 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
2805 mtqc |= IXGBE_MTQC_32VF;
2807 mtqc |= IXGBE_MTQC_64VF;
2810 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
2812 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
2814 mtqc = IXGBE_MTQC_64Q_1PB;
2817 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
2819 /* Enable Security TX Buffer IFG for multiple pb */
2821 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
2822 sectx |= IXGBE_SECTX_DCB;
2823 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
2826 /* re-enable the arbiter */
2827 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
2828 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2832 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
2833 * @adapter: board private structure
2835 * Configure the Tx unit of the MAC after a reset.
2837 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
2839 struct ixgbe_hw *hw = &adapter->hw;
2843 ixgbe_setup_mtqc(adapter);
2845 if (hw->mac.type != ixgbe_mac_82598EB) {
2846 /* DMATXCTL.EN must be before Tx queues are enabled */
2847 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
2848 dmatxctl |= IXGBE_DMATXCTL_TE;
2849 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
2852 /* Setup the HW Tx Head and Tail descriptor pointers */
2853 for (i = 0; i < adapter->num_tx_queues; i++)
2854 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
2857 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
2858 struct ixgbe_ring *ring)
2860 struct ixgbe_hw *hw = &adapter->hw;
2861 u8 reg_idx = ring->reg_idx;
2862 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
2864 srrctl |= IXGBE_SRRCTL_DROP_EN;
2866 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
2869 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
2870 struct ixgbe_ring *ring)
2872 struct ixgbe_hw *hw = &adapter->hw;
2873 u8 reg_idx = ring->reg_idx;
2874 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
2876 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
2878 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
2881 #ifdef CONFIG_IXGBE_DCB
2882 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
2884 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
2888 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
2890 if (adapter->ixgbe_ieee_pfc)
2891 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
2894 * We should set the drop enable bit if:
2897 * Number of Rx queues > 1 and flow control is disabled
2899 * This allows us to avoid head of line blocking for security
2900 * and performance reasons.
2902 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
2903 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
2904 for (i = 0; i < adapter->num_rx_queues; i++)
2905 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
2907 for (i = 0; i < adapter->num_rx_queues; i++)
2908 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
2912 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
2914 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
2915 struct ixgbe_ring *rx_ring)
2917 struct ixgbe_hw *hw = &adapter->hw;
2919 u8 reg_idx = rx_ring->reg_idx;
2921 if (hw->mac.type == ixgbe_mac_82598EB) {
2922 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
2925 * if VMDq is not active we must program one srrctl register
2926 * per RSS queue since we have enabled RDRXCTL.MVMEN
2931 /* configure header buffer length, needed for RSC */
2932 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
2934 /* configure the packet buffer length */
2935 srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
2937 /* configure descriptor type */
2938 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
2940 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
2943 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
2945 struct ixgbe_hw *hw = &adapter->hw;
2946 static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
2947 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
2948 0x6A3E67EA, 0x14364D17, 0x3BED200D};
2949 u32 mrqc = 0, reta = 0;
2952 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2955 * Program table for at least 2 queues w/ SR-IOV so that VFs can
2956 * make full use of any rings they may have. We will use the
2957 * PSRTYPE register to control how many rings we use within the PF.
2959 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
2962 /* Fill out hash function seeds */
2963 for (i = 0; i < 10; i++)
2964 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
2966 /* Fill out redirection table */
2967 for (i = 0, j = 0; i < 128; i++, j++) {
2970 /* reta = 4-byte sliding window of
2971 * 0x00..(indices-1)(indices-1)00..etc. */
2972 reta = (reta << 8) | (j * 0x11);
2974 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
2977 /* Disable indicating checksum in descriptor, enables RSS hash */
2978 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
2979 rxcsum |= IXGBE_RXCSUM_PCSD;
2980 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
2982 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
2983 if (adapter->ring_feature[RING_F_RSS].mask)
2984 mrqc = IXGBE_MRQC_RSSEN;
2986 u8 tcs = netdev_get_num_tc(adapter->netdev);
2988 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
2990 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
2992 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
2993 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
2994 mrqc = IXGBE_MRQC_VMDQRSS32EN;
2996 mrqc = IXGBE_MRQC_VMDQRSS64EN;
2999 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3001 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3003 mrqc = IXGBE_MRQC_RSSEN;
3007 /* Perform hash on these packet types */
3008 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3009 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3010 IXGBE_MRQC_RSS_FIELD_IPV6 |
3011 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3013 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3014 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3015 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3016 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3018 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3022 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3023 * @adapter: address of board private structure
3024 * @index: index of ring to set
3026 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3027 struct ixgbe_ring *ring)
3029 struct ixgbe_hw *hw = &adapter->hw;
3031 u8 reg_idx = ring->reg_idx;
3033 if (!ring_is_rsc_enabled(ring))
3036 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3037 rscctrl |= IXGBE_RSCCTL_RSCEN;
3039 * we must limit the number of descriptors so that the
3040 * total size of max desc * buf_len is not greater
3043 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3044 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3047 #define IXGBE_MAX_RX_DESC_POLL 10
3048 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3049 struct ixgbe_ring *ring)
3051 struct ixgbe_hw *hw = &adapter->hw;
3052 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3054 u8 reg_idx = ring->reg_idx;
3056 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3057 if (hw->mac.type == ixgbe_mac_82598EB &&
3058 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3062 usleep_range(1000, 2000);
3063 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3064 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3067 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3068 "the polling period\n", reg_idx);
3072 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3073 struct ixgbe_ring *ring)
3075 struct ixgbe_hw *hw = &adapter->hw;
3076 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3078 u8 reg_idx = ring->reg_idx;
3080 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3081 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3083 /* write value back with RXDCTL.ENABLE bit cleared */
3084 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3086 if (hw->mac.type == ixgbe_mac_82598EB &&
3087 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3090 /* the hardware may take up to 100us to really disable the rx queue */
3093 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3094 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3097 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3098 "the polling period\n", reg_idx);
3102 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3103 struct ixgbe_ring *ring)
3105 struct ixgbe_hw *hw = &adapter->hw;
3106 u64 rdba = ring->dma;
3108 u8 reg_idx = ring->reg_idx;
3110 /* disable queue to avoid issues while updating state */
3111 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3112 ixgbe_disable_rx_queue(adapter, ring);
3114 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3115 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3116 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3117 ring->count * sizeof(union ixgbe_adv_rx_desc));
3118 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3119 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3120 ring->tail = hw->hw_addr + IXGBE_RDT(reg_idx);
3122 ixgbe_configure_srrctl(adapter, ring);
3123 ixgbe_configure_rscctl(adapter, ring);
3125 /* If operating in IOV mode set RLPML for X540 */
3126 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
3127 hw->mac.type == ixgbe_mac_X540) {
3128 rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK;
3129 rxdctl |= ((ring->netdev->mtu + ETH_HLEN +
3130 ETH_FCS_LEN + VLAN_HLEN) | IXGBE_RXDCTL_RLPML_EN);
3133 if (hw->mac.type == ixgbe_mac_82598EB) {
3135 * enable cache line friendly hardware writes:
3136 * PTHRESH=32 descriptors (half the internal cache),
3137 * this also removes ugly rx_no_buffer_count increment
3138 * HTHRESH=4 descriptors (to minimize latency on fetch)
3139 * WTHRESH=8 burst writeback up to two cache lines
3141 rxdctl &= ~0x3FFFFF;
3145 /* enable receive descriptor ring */
3146 rxdctl |= IXGBE_RXDCTL_ENABLE;
3147 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3149 ixgbe_rx_desc_queue_enable(adapter, ring);
3150 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3153 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3155 struct ixgbe_hw *hw = &adapter->hw;
3156 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3159 /* PSRTYPE must be initialized in non 82598 adapters */
3160 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3161 IXGBE_PSRTYPE_UDPHDR |
3162 IXGBE_PSRTYPE_IPV4HDR |
3163 IXGBE_PSRTYPE_L2HDR |
3164 IXGBE_PSRTYPE_IPV6HDR;
3166 if (hw->mac.type == ixgbe_mac_82598EB)
3174 for (p = 0; p < adapter->num_rx_pools; p++)
3175 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(p)),
3179 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3181 struct ixgbe_hw *hw = &adapter->hw;
3182 u32 reg_offset, vf_shift;
3183 u32 gcr_ext, vmdctl;
3186 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3189 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3190 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3191 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3192 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3193 vmdctl |= IXGBE_VT_CTL_REPLEN;
3194 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3196 vf_shift = VMDQ_P(0) % 32;
3197 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3199 /* Enable only the PF's pool for Tx/Rx */
3200 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift);
3201 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3202 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
3203 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3204 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3206 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3207 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3210 * Set up VF register offsets for selected VT Mode,
3211 * i.e. 32 or 64 VFs for SR-IOV
3213 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3214 case IXGBE_82599_VMDQ_8Q_MASK:
3215 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3217 case IXGBE_82599_VMDQ_4Q_MASK:
3218 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3221 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3225 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3227 /* enable Tx loopback for VF/PF communication */
3228 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3230 /* Enable MAC Anti-Spoofing */
3231 hw->mac.ops.set_mac_anti_spoofing(hw, (adapter->num_vfs != 0),
3233 /* For VFs that have spoof checking turned off */
3234 for (i = 0; i < adapter->num_vfs; i++) {
3235 if (!adapter->vfinfo[i].spoofchk_enabled)
3236 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3240 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3242 struct ixgbe_hw *hw = &adapter->hw;
3243 struct net_device *netdev = adapter->netdev;
3244 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3245 struct ixgbe_ring *rx_ring;
3250 /* adjust max frame to be able to do baby jumbo for FCoE */
3251 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3252 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3253 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3255 #endif /* IXGBE_FCOE */
3256 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3257 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3258 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3259 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3261 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3264 /* MHADD will allow an extra 4 bytes past for vlan tagged frames */
3265 max_frame += VLAN_HLEN;
3267 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3268 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3269 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3270 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3273 * Setup the HW Rx Head and Tail Descriptor Pointers and
3274 * the Base and Length of the Rx Descriptor Ring
3276 for (i = 0; i < adapter->num_rx_queues; i++) {
3277 rx_ring = adapter->rx_ring[i];
3278 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3279 set_ring_rsc_enabled(rx_ring);
3281 clear_ring_rsc_enabled(rx_ring);
3285 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3287 struct ixgbe_hw *hw = &adapter->hw;
3288 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3290 switch (hw->mac.type) {
3291 case ixgbe_mac_82598EB:
3293 * For VMDq support of different descriptor types or
3294 * buffer sizes through the use of multiple SRRCTL
3295 * registers, RDRXCTL.MVMEN must be set to 1
3297 * also, the manual doesn't mention it clearly but DCA hints
3298 * will only use queue 0's tags unless this bit is set. Side
3299 * effects of setting this bit are only that SRRCTL must be
3300 * fully programmed [0..15]
3302 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3304 case ixgbe_mac_82599EB:
3305 case ixgbe_mac_X540:
3306 /* Disable RSC for ACK packets */
3307 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3308 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3309 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3310 /* hardware requires some bits to be set by default */
3311 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3312 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3315 /* We should do nothing since we don't know this hardware */
3319 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3323 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3324 * @adapter: board private structure
3326 * Configure the Rx unit of the MAC after a reset.
3328 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3330 struct ixgbe_hw *hw = &adapter->hw;
3334 /* disable receives while setting up the descriptors */
3335 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3336 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
3338 ixgbe_setup_psrtype(adapter);
3339 ixgbe_setup_rdrxctl(adapter);
3341 /* Program registers for the distribution of queues */
3342 ixgbe_setup_mrqc(adapter);
3344 /* set_rx_buffer_len must be called before ring initialization */
3345 ixgbe_set_rx_buffer_len(adapter);
3348 * Setup the HW Rx Head and Tail Descriptor Pointers and
3349 * the Base and Length of the Rx Descriptor Ring
3351 for (i = 0; i < adapter->num_rx_queues; i++)
3352 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3354 /* disable drop enable for 82598 parts */
3355 if (hw->mac.type == ixgbe_mac_82598EB)
3356 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3358 /* enable all receives */
3359 rxctrl |= IXGBE_RXCTRL_RXEN;
3360 hw->mac.ops.enable_rx_dma(hw, rxctrl);
3363 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
3365 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3366 struct ixgbe_hw *hw = &adapter->hw;
3368 /* add VID to filter table */
3369 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true);
3370 set_bit(vid, adapter->active_vlans);
3375 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
3377 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3378 struct ixgbe_hw *hw = &adapter->hw;
3380 /* remove VID from filter table */
3381 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), false);
3382 clear_bit(vid, adapter->active_vlans);
3388 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
3389 * @adapter: driver data
3391 static void ixgbe_vlan_filter_disable(struct ixgbe_adapter *adapter)
3393 struct ixgbe_hw *hw = &adapter->hw;
3396 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3397 vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
3398 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3402 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
3403 * @adapter: driver data
3405 static void ixgbe_vlan_filter_enable(struct ixgbe_adapter *adapter)
3407 struct ixgbe_hw *hw = &adapter->hw;
3410 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3411 vlnctrl |= IXGBE_VLNCTRL_VFE;
3412 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
3413 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3417 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3418 * @adapter: driver data
3420 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3422 struct ixgbe_hw *hw = &adapter->hw;
3426 switch (hw->mac.type) {
3427 case ixgbe_mac_82598EB:
3428 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3429 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3430 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3432 case ixgbe_mac_82599EB:
3433 case ixgbe_mac_X540:
3434 for (i = 0; i < adapter->num_rx_queues; i++) {
3435 j = adapter->rx_ring[i]->reg_idx;
3436 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3437 vlnctrl &= ~IXGBE_RXDCTL_VME;
3438 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3447 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3448 * @adapter: driver data
3450 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3452 struct ixgbe_hw *hw = &adapter->hw;
3456 switch (hw->mac.type) {
3457 case ixgbe_mac_82598EB:
3458 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3459 vlnctrl |= IXGBE_VLNCTRL_VME;
3460 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3462 case ixgbe_mac_82599EB:
3463 case ixgbe_mac_X540:
3464 for (i = 0; i < adapter->num_rx_queues; i++) {
3465 j = adapter->rx_ring[i]->reg_idx;
3466 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3467 vlnctrl |= IXGBE_RXDCTL_VME;
3468 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3476 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3480 ixgbe_vlan_rx_add_vid(adapter->netdev, 0);
3482 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
3483 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
3487 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3488 * @netdev: network interface device structure
3490 * Writes unicast address list to the RAR table.
3491 * Returns: -ENOMEM on failure/insufficient address space
3492 * 0 on no addresses written
3493 * X on writing X addresses to the RAR table
3495 static int ixgbe_write_uc_addr_list(struct net_device *netdev)
3497 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3498 struct ixgbe_hw *hw = &adapter->hw;
3499 unsigned int rar_entries = hw->mac.num_rar_entries - 1;
3502 /* In SR-IOV mode significantly less RAR entries are available */
3503 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3504 rar_entries = IXGBE_MAX_PF_MACVLANS - 1;
3506 /* return ENOMEM indicating insufficient memory for addresses */
3507 if (netdev_uc_count(netdev) > rar_entries)
3510 if (!netdev_uc_empty(netdev)) {
3511 struct netdev_hw_addr *ha;
3512 /* return error if we do not support writing to RAR table */
3513 if (!hw->mac.ops.set_rar)
3516 netdev_for_each_uc_addr(ha, netdev) {
3519 hw->mac.ops.set_rar(hw, rar_entries--, ha->addr,
3520 VMDQ_P(0), IXGBE_RAH_AV);
3524 /* write the addresses in reverse order to avoid write combining */
3525 for (; rar_entries > 0 ; rar_entries--)
3526 hw->mac.ops.clear_rar(hw, rar_entries);
3532 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
3533 * @netdev: network interface device structure
3535 * The set_rx_method entry point is called whenever the unicast/multicast
3536 * address list or the network interface flags are updated. This routine is
3537 * responsible for configuring the hardware for proper unicast, multicast and
3540 void ixgbe_set_rx_mode(struct net_device *netdev)
3542 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3543 struct ixgbe_hw *hw = &adapter->hw;
3544 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
3547 /* Check for Promiscuous and All Multicast modes */
3549 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3551 /* set all bits that we expect to always be set */
3552 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
3553 fctrl |= IXGBE_FCTRL_BAM;
3554 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
3555 fctrl |= IXGBE_FCTRL_PMCF;
3557 /* clear the bits we are changing the status of */
3558 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3560 if (netdev->flags & IFF_PROMISC) {
3561 hw->addr_ctrl.user_set_promisc = true;
3562 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3563 vmolr |= (IXGBE_VMOLR_ROPE | IXGBE_VMOLR_MPE);
3564 /* don't hardware filter vlans in promisc mode */
3565 ixgbe_vlan_filter_disable(adapter);
3567 if (netdev->flags & IFF_ALLMULTI) {
3568 fctrl |= IXGBE_FCTRL_MPE;
3569 vmolr |= IXGBE_VMOLR_MPE;
3572 * Write addresses to the MTA, if the attempt fails
3573 * then we should just turn on promiscuous mode so
3574 * that we can at least receive multicast traffic
3576 hw->mac.ops.update_mc_addr_list(hw, netdev);
3577 vmolr |= IXGBE_VMOLR_ROMPE;
3579 ixgbe_vlan_filter_enable(adapter);
3580 hw->addr_ctrl.user_set_promisc = false;
3584 * Write addresses to available RAR registers, if there is not
3585 * sufficient space to store all the addresses then enable
3586 * unicast promiscuous mode
3588 count = ixgbe_write_uc_addr_list(netdev);
3590 fctrl |= IXGBE_FCTRL_UPE;
3591 vmolr |= IXGBE_VMOLR_ROPE;
3594 if (adapter->num_vfs)
3595 ixgbe_restore_vf_multicasts(adapter);
3597 if (hw->mac.type != ixgbe_mac_82598EB) {
3598 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
3599 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
3601 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
3604 /* This is useful for sniffing bad packets. */
3605 if (adapter->netdev->features & NETIF_F_RXALL) {
3606 /* UPE and MPE will be handled by normal PROMISC logic
3607 * in e1000e_set_rx_mode */
3608 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
3609 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
3610 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
3612 fctrl &= ~(IXGBE_FCTRL_DPF);
3613 /* NOTE: VLAN filtering is disabled by setting PROMISC */
3616 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
3618 if (netdev->features & NETIF_F_HW_VLAN_RX)
3619 ixgbe_vlan_strip_enable(adapter);
3621 ixgbe_vlan_strip_disable(adapter);
3624 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
3628 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
3629 napi_enable(&adapter->q_vector[q_idx]->napi);
3632 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
3636 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
3637 napi_disable(&adapter->q_vector[q_idx]->napi);
3640 #ifdef CONFIG_IXGBE_DCB
3642 * ixgbe_configure_dcb - Configure DCB hardware
3643 * @adapter: ixgbe adapter struct
3645 * This is called by the driver on open to configure the DCB hardware.
3646 * This is also called by the gennetlink interface when reconfiguring
3649 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
3651 struct ixgbe_hw *hw = &adapter->hw;
3652 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3654 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
3655 if (hw->mac.type == ixgbe_mac_82598EB)
3656 netif_set_gso_max_size(adapter->netdev, 65536);
3660 if (hw->mac.type == ixgbe_mac_82598EB)
3661 netif_set_gso_max_size(adapter->netdev, 32768);
3663 hw->mac.ops.set_vfta(&adapter->hw, 0, 0, true);
3666 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
3667 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
3670 /* reconfigure the hardware */
3671 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
3672 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
3674 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
3676 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
3677 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
3678 ixgbe_dcb_hw_ets(&adapter->hw,
3679 adapter->ixgbe_ieee_ets,
3681 ixgbe_dcb_hw_pfc_config(&adapter->hw,
3682 adapter->ixgbe_ieee_pfc->pfc_en,
3683 adapter->ixgbe_ieee_ets->prio_tc);
3686 /* Enable RSS Hash per TC */
3687 if (hw->mac.type != ixgbe_mac_82598EB) {
3689 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
3696 /* write msb to all 8 TCs in one write */
3697 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
3702 /* Additional bittime to account for IXGBE framing */
3703 #define IXGBE_ETH_FRAMING 20
3706 * ixgbe_hpbthresh - calculate high water mark for flow control
3708 * @adapter: board private structure to calculate for
3709 * @pb: packet buffer to calculate
3711 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
3713 struct ixgbe_hw *hw = &adapter->hw;
3714 struct net_device *dev = adapter->netdev;
3715 int link, tc, kb, marker;
3718 /* Calculate max LAN frame size */
3719 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
3722 /* FCoE traffic class uses FCOE jumbo frames */
3723 if ((dev->features & NETIF_F_FCOE_MTU) &&
3724 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
3725 (pb == ixgbe_fcoe_get_tc(adapter)))
3726 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3729 /* Calculate delay value for device */
3730 switch (hw->mac.type) {
3731 case ixgbe_mac_X540:
3732 dv_id = IXGBE_DV_X540(link, tc);
3735 dv_id = IXGBE_DV(link, tc);
3739 /* Loopback switch introduces additional latency */
3740 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3741 dv_id += IXGBE_B2BT(tc);
3743 /* Delay value is calculated in bit times convert to KB */
3744 kb = IXGBE_BT2KB(dv_id);
3745 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
3747 marker = rx_pba - kb;
3749 /* It is possible that the packet buffer is not large enough
3750 * to provide required headroom. In this case throw an error
3751 * to user and a do the best we can.
3754 e_warn(drv, "Packet Buffer(%i) can not provide enough"
3755 "headroom to support flow control."
3756 "Decrease MTU or number of traffic classes\n", pb);
3764 * ixgbe_lpbthresh - calculate low water mark for for flow control
3766 * @adapter: board private structure to calculate for
3767 * @pb: packet buffer to calculate
3769 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter)
3771 struct ixgbe_hw *hw = &adapter->hw;
3772 struct net_device *dev = adapter->netdev;
3776 /* Calculate max LAN frame size */
3777 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
3779 /* Calculate delay value for device */
3780 switch (hw->mac.type) {
3781 case ixgbe_mac_X540:
3782 dv_id = IXGBE_LOW_DV_X540(tc);
3785 dv_id = IXGBE_LOW_DV(tc);
3789 /* Delay value is calculated in bit times convert to KB */
3790 return IXGBE_BT2KB(dv_id);
3794 * ixgbe_pbthresh_setup - calculate and setup high low water marks
3796 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
3798 struct ixgbe_hw *hw = &adapter->hw;
3799 int num_tc = netdev_get_num_tc(adapter->netdev);
3805 hw->fc.low_water = ixgbe_lpbthresh(adapter);
3807 for (i = 0; i < num_tc; i++) {
3808 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
3810 /* Low water marks must not be larger than high water marks */
3811 if (hw->fc.low_water > hw->fc.high_water[i])
3812 hw->fc.low_water = 0;
3816 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
3818 struct ixgbe_hw *hw = &adapter->hw;
3820 u8 tc = netdev_get_num_tc(adapter->netdev);
3822 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
3823 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
3824 hdrm = 32 << adapter->fdir_pballoc;
3828 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
3829 ixgbe_pbthresh_setup(adapter);
3832 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
3834 struct ixgbe_hw *hw = &adapter->hw;
3835 struct hlist_node *node, *node2;
3836 struct ixgbe_fdir_filter *filter;
3838 spin_lock(&adapter->fdir_perfect_lock);
3840 if (!hlist_empty(&adapter->fdir_filter_list))
3841 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
3843 hlist_for_each_entry_safe(filter, node, node2,
3844 &adapter->fdir_filter_list, fdir_node) {
3845 ixgbe_fdir_write_perfect_filter_82599(hw,
3848 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
3849 IXGBE_FDIR_DROP_QUEUE :
3850 adapter->rx_ring[filter->action]->reg_idx);
3853 spin_unlock(&adapter->fdir_perfect_lock);
3856 static void ixgbe_configure(struct ixgbe_adapter *adapter)
3858 struct ixgbe_hw *hw = &adapter->hw;
3860 ixgbe_configure_pb(adapter);
3861 #ifdef CONFIG_IXGBE_DCB
3862 ixgbe_configure_dcb(adapter);
3865 ixgbe_set_rx_mode(adapter->netdev);
3866 ixgbe_restore_vlan(adapter);
3868 switch (hw->mac.type) {
3869 case ixgbe_mac_82599EB:
3870 case ixgbe_mac_X540:
3871 hw->mac.ops.disable_rx_buff(hw);
3877 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3878 ixgbe_init_fdir_signature_82599(&adapter->hw,
3879 adapter->fdir_pballoc);
3880 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
3881 ixgbe_init_fdir_perfect_82599(&adapter->hw,
3882 adapter->fdir_pballoc);
3883 ixgbe_fdir_filter_restore(adapter);
3886 switch (hw->mac.type) {
3887 case ixgbe_mac_82599EB:
3888 case ixgbe_mac_X540:
3889 hw->mac.ops.enable_rx_buff(hw);
3895 ixgbe_configure_virtualization(adapter);
3898 /* configure FCoE L2 filters, redirection table, and Rx control */
3899 ixgbe_configure_fcoe(adapter);
3901 #endif /* IXGBE_FCOE */
3902 ixgbe_configure_tx(adapter);
3903 ixgbe_configure_rx(adapter);
3906 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
3908 switch (hw->phy.type) {
3909 case ixgbe_phy_sfp_avago:
3910 case ixgbe_phy_sfp_ftl:
3911 case ixgbe_phy_sfp_intel:
3912 case ixgbe_phy_sfp_unknown:
3913 case ixgbe_phy_sfp_passive_tyco:
3914 case ixgbe_phy_sfp_passive_unknown:
3915 case ixgbe_phy_sfp_active_unknown:
3916 case ixgbe_phy_sfp_ftl_active:
3919 if (hw->mac.type == ixgbe_mac_82598EB)
3927 * ixgbe_sfp_link_config - set up SFP+ link
3928 * @adapter: pointer to private adapter struct
3930 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
3933 * We are assuming the worst case scenario here, and that
3934 * is that an SFP was inserted/removed after the reset
3935 * but before SFP detection was enabled. As such the best
3936 * solution is to just start searching as soon as we start
3938 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3939 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
3941 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
3945 * ixgbe_non_sfp_link_config - set up non-SFP+ link
3946 * @hw: pointer to private hardware struct
3948 * Returns 0 on success, negative on failure
3950 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
3953 bool negotiation, link_up = false;
3954 u32 ret = IXGBE_ERR_LINK_SETUP;
3956 if (hw->mac.ops.check_link)
3957 ret = hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
3962 autoneg = hw->phy.autoneg_advertised;
3963 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
3964 ret = hw->mac.ops.get_link_capabilities(hw, &autoneg,
3969 if (hw->mac.ops.setup_link)
3970 ret = hw->mac.ops.setup_link(hw, autoneg, negotiation, link_up);
3975 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
3977 struct ixgbe_hw *hw = &adapter->hw;
3980 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3981 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
3983 gpie |= IXGBE_GPIE_EIAME;
3985 * use EIAM to auto-mask when MSI-X interrupt is asserted
3986 * this saves a register write for every interrupt
3988 switch (hw->mac.type) {
3989 case ixgbe_mac_82598EB:
3990 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
3992 case ixgbe_mac_82599EB:
3993 case ixgbe_mac_X540:
3995 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
3996 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4000 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4001 * specifically only auto mask tx and rx interrupts */
4002 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4005 /* XXX: to interrupt immediately for EICS writes, enable this */
4006 /* gpie |= IXGBE_GPIE_EIMEN; */
4008 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
4009 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
4011 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4012 case IXGBE_82599_VMDQ_8Q_MASK:
4013 gpie |= IXGBE_GPIE_VTMODE_16;
4015 case IXGBE_82599_VMDQ_4Q_MASK:
4016 gpie |= IXGBE_GPIE_VTMODE_32;
4019 gpie |= IXGBE_GPIE_VTMODE_64;
4024 /* Enable Thermal over heat sensor interrupt */
4025 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
4026 switch (adapter->hw.mac.type) {
4027 case ixgbe_mac_82599EB:
4028 gpie |= IXGBE_SDP0_GPIEN;
4030 case ixgbe_mac_X540:
4031 gpie |= IXGBE_EIMS_TS;
4038 /* Enable fan failure interrupt */
4039 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
4040 gpie |= IXGBE_SDP1_GPIEN;
4042 if (hw->mac.type == ixgbe_mac_82599EB) {
4043 gpie |= IXGBE_SDP1_GPIEN;
4044 gpie |= IXGBE_SDP2_GPIEN;
4047 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4050 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
4052 struct ixgbe_hw *hw = &adapter->hw;
4056 ixgbe_get_hw_control(adapter);
4057 ixgbe_setup_gpie(adapter);
4059 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4060 ixgbe_configure_msix(adapter);
4062 ixgbe_configure_msi_and_legacy(adapter);
4064 /* enable the optics for both mult-speed fiber and 82599 SFP+ fiber */
4065 if (hw->mac.ops.enable_tx_laser &&
4066 ((hw->phy.multispeed_fiber) ||
4067 ((hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) &&
4068 (hw->mac.type == ixgbe_mac_82599EB))))
4069 hw->mac.ops.enable_tx_laser(hw);
4071 clear_bit(__IXGBE_DOWN, &adapter->state);
4072 ixgbe_napi_enable_all(adapter);
4074 if (ixgbe_is_sfp(hw)) {
4075 ixgbe_sfp_link_config(adapter);
4077 err = ixgbe_non_sfp_link_config(hw);
4079 e_err(probe, "link_config FAILED %d\n", err);
4082 /* clear any pending interrupts, may auto mask */
4083 IXGBE_READ_REG(hw, IXGBE_EICR);
4084 ixgbe_irq_enable(adapter, true, true);
4087 * If this adapter has a fan, check to see if we had a failure
4088 * before we enabled the interrupt.
4090 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
4091 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
4092 if (esdp & IXGBE_ESDP_SDP1)
4093 e_crit(drv, "Fan has stopped, replace the adapter\n");
4096 /* enable transmits */
4097 netif_tx_start_all_queues(adapter->netdev);
4099 /* bring the link up in the watchdog, this could race with our first
4100 * link up interrupt but shouldn't be a problem */
4101 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
4102 adapter->link_check_timeout = jiffies;
4103 mod_timer(&adapter->service_timer, jiffies);
4105 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4106 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
4107 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
4108 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
4111 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
4113 WARN_ON(in_interrupt());
4114 /* put off any impending NetWatchDogTimeout */
4115 adapter->netdev->trans_start = jiffies;
4117 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
4118 usleep_range(1000, 2000);
4119 ixgbe_down(adapter);
4121 * If SR-IOV enabled then wait a bit before bringing the adapter
4122 * back up to give the VFs time to respond to the reset. The
4123 * two second wait is based upon the watchdog timer cycle in
4126 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4129 clear_bit(__IXGBE_RESETTING, &adapter->state);
4132 void ixgbe_up(struct ixgbe_adapter *adapter)
4134 /* hardware has been reset, we need to reload some things */
4135 ixgbe_configure(adapter);
4137 ixgbe_up_complete(adapter);
4140 void ixgbe_reset(struct ixgbe_adapter *adapter)
4142 struct ixgbe_hw *hw = &adapter->hw;
4145 /* lock SFP init bit to prevent race conditions with the watchdog */
4146 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
4147 usleep_range(1000, 2000);
4149 /* clear all SFP and link config related flags while holding SFP_INIT */
4150 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
4151 IXGBE_FLAG2_SFP_NEEDS_RESET);
4152 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
4154 err = hw->mac.ops.init_hw(hw);
4157 case IXGBE_ERR_SFP_NOT_PRESENT:
4158 case IXGBE_ERR_SFP_NOT_SUPPORTED:
4160 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
4161 e_dev_err("master disable timed out\n");
4163 case IXGBE_ERR_EEPROM_VERSION:
4164 /* We are running on a pre-production device, log a warning */
4165 e_dev_warn("This device is a pre-production adapter/LOM. "
4166 "Please be aware there may be issues associated with "
4167 "your hardware. If you are experiencing problems "
4168 "please contact your Intel or hardware "
4169 "representative who provided you with this "
4173 e_dev_err("Hardware Error: %d\n", err);
4176 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
4178 /* reprogram the RAR[0] in case user changed it. */
4179 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, VMDQ_P(0), IXGBE_RAH_AV);
4181 /* update SAN MAC vmdq pool selection */
4182 if (hw->mac.san_mac_rar_index)
4183 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
4187 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4188 * @rx_ring: ring to free buffers from
4190 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4192 struct device *dev = rx_ring->dev;
4196 /* ring already cleared, nothing to do */
4197 if (!rx_ring->rx_buffer_info)
4200 /* Free all the Rx ring sk_buffs */
4201 for (i = 0; i < rx_ring->count; i++) {
4202 struct ixgbe_rx_buffer *rx_buffer;
4204 rx_buffer = &rx_ring->rx_buffer_info[i];
4205 if (rx_buffer->skb) {
4206 struct sk_buff *skb = rx_buffer->skb;
4207 if (IXGBE_CB(skb)->page_released) {
4210 ixgbe_rx_bufsz(rx_ring),
4212 IXGBE_CB(skb)->page_released = false;
4216 rx_buffer->skb = NULL;
4218 dma_unmap_page(dev, rx_buffer->dma,
4219 ixgbe_rx_pg_size(rx_ring),
4222 if (rx_buffer->page)
4223 __free_pages(rx_buffer->page,
4224 ixgbe_rx_pg_order(rx_ring));
4225 rx_buffer->page = NULL;
4228 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4229 memset(rx_ring->rx_buffer_info, 0, size);
4231 /* Zero out the descriptor ring */
4232 memset(rx_ring->desc, 0, rx_ring->size);
4234 rx_ring->next_to_alloc = 0;
4235 rx_ring->next_to_clean = 0;
4236 rx_ring->next_to_use = 0;
4240 * ixgbe_clean_tx_ring - Free Tx Buffers
4241 * @tx_ring: ring to be cleaned
4243 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
4245 struct ixgbe_tx_buffer *tx_buffer_info;
4249 /* ring already cleared, nothing to do */
4250 if (!tx_ring->tx_buffer_info)
4253 /* Free all the Tx ring sk_buffs */
4254 for (i = 0; i < tx_ring->count; i++) {
4255 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4256 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
4259 netdev_tx_reset_queue(txring_txq(tx_ring));
4261 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
4262 memset(tx_ring->tx_buffer_info, 0, size);
4264 /* Zero out the descriptor ring */
4265 memset(tx_ring->desc, 0, tx_ring->size);
4267 tx_ring->next_to_use = 0;
4268 tx_ring->next_to_clean = 0;
4272 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
4273 * @adapter: board private structure
4275 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
4279 for (i = 0; i < adapter->num_rx_queues; i++)
4280 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
4284 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
4285 * @adapter: board private structure
4287 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
4291 for (i = 0; i < adapter->num_tx_queues; i++)
4292 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
4295 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
4297 struct hlist_node *node, *node2;
4298 struct ixgbe_fdir_filter *filter;
4300 spin_lock(&adapter->fdir_perfect_lock);
4302 hlist_for_each_entry_safe(filter, node, node2,
4303 &adapter->fdir_filter_list, fdir_node) {
4304 hlist_del(&filter->fdir_node);
4307 adapter->fdir_filter_count = 0;
4309 spin_unlock(&adapter->fdir_perfect_lock);
4312 void ixgbe_down(struct ixgbe_adapter *adapter)
4314 struct net_device *netdev = adapter->netdev;
4315 struct ixgbe_hw *hw = &adapter->hw;
4319 /* signal that we are down to the interrupt handler */
4320 set_bit(__IXGBE_DOWN, &adapter->state);
4322 /* disable receives */
4323 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4324 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
4326 /* disable all enabled rx queues */
4327 for (i = 0; i < adapter->num_rx_queues; i++)
4328 /* this call also flushes the previous write */
4329 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
4331 usleep_range(10000, 20000);
4333 netif_tx_stop_all_queues(netdev);
4335 /* call carrier off first to avoid false dev_watchdog timeouts */
4336 netif_carrier_off(netdev);
4337 netif_tx_disable(netdev);
4339 ixgbe_irq_disable(adapter);
4341 ixgbe_napi_disable_all(adapter);
4343 adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
4344 IXGBE_FLAG2_RESET_REQUESTED);
4345 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
4347 del_timer_sync(&adapter->service_timer);
4349 if (adapter->num_vfs) {
4350 /* Clear EITR Select mapping */
4351 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
4353 /* Mark all the VFs as inactive */
4354 for (i = 0 ; i < adapter->num_vfs; i++)
4355 adapter->vfinfo[i].clear_to_send = false;
4357 /* ping all the active vfs to let them know we are going down */
4358 ixgbe_ping_all_vfs(adapter);
4360 /* Disable all VFTE/VFRE TX/RX */
4361 ixgbe_disable_tx_rx(adapter);
4364 /* disable transmits in the hardware now that interrupts are off */
4365 for (i = 0; i < adapter->num_tx_queues; i++) {
4366 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
4367 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
4370 /* Disable the Tx DMA engine on 82599 and X540 */
4371 switch (hw->mac.type) {
4372 case ixgbe_mac_82599EB:
4373 case ixgbe_mac_X540:
4374 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
4375 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
4376 ~IXGBE_DMATXCTL_TE));
4382 if (!pci_channel_offline(adapter->pdev))
4383 ixgbe_reset(adapter);
4385 /* power down the optics for multispeed fiber and 82599 SFP+ fiber */
4386 if (hw->mac.ops.disable_tx_laser &&
4387 ((hw->phy.multispeed_fiber) ||
4388 ((hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) &&
4389 (hw->mac.type == ixgbe_mac_82599EB))))
4390 hw->mac.ops.disable_tx_laser(hw);
4392 ixgbe_clean_all_tx_rings(adapter);
4393 ixgbe_clean_all_rx_rings(adapter);
4395 #ifdef CONFIG_IXGBE_DCA
4396 /* since we reset the hardware DCA settings were cleared */
4397 ixgbe_setup_dca(adapter);
4402 * ixgbe_tx_timeout - Respond to a Tx Hang
4403 * @netdev: network interface device structure
4405 static void ixgbe_tx_timeout(struct net_device *netdev)
4407 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4409 /* Do the reset outside of interrupt context */
4410 ixgbe_tx_timeout_reset(adapter);
4414 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4415 * @adapter: board private structure to initialize
4417 * ixgbe_sw_init initializes the Adapter private data structure.
4418 * Fields are initialized based on PCI device information and
4419 * OS network device settings (MTU size).
4421 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
4423 struct ixgbe_hw *hw = &adapter->hw;
4424 struct pci_dev *pdev = adapter->pdev;
4426 #ifdef CONFIG_IXGBE_DCB
4428 struct tc_configuration *tc;
4431 /* PCI config space info */
4433 hw->vendor_id = pdev->vendor;
4434 hw->device_id = pdev->device;
4435 hw->revision_id = pdev->revision;
4436 hw->subsystem_vendor_id = pdev->subsystem_vendor;
4437 hw->subsystem_device_id = pdev->subsystem_device;
4439 /* Set capability flags */
4440 rss = min_t(int, IXGBE_MAX_RSS_INDICES, num_online_cpus());
4441 adapter->ring_feature[RING_F_RSS].limit = rss;
4442 switch (hw->mac.type) {
4443 case ixgbe_mac_82598EB:
4444 if (hw->device_id == IXGBE_DEV_ID_82598AT)
4445 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
4446 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
4448 case ixgbe_mac_X540:
4449 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
4450 case ixgbe_mac_82599EB:
4451 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
4452 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
4453 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
4454 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
4455 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
4456 /* Flow Director hash filters enabled */
4457 adapter->atr_sample_rate = 20;
4458 adapter->ring_feature[RING_F_FDIR].limit =
4459 IXGBE_MAX_FDIR_INDICES;
4460 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
4462 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
4463 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
4464 #ifdef CONFIG_IXGBE_DCB
4465 /* Default traffic class to use for FCoE */
4466 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
4468 #endif /* IXGBE_FCOE */
4475 /* FCoE support exists, always init the FCoE lock */
4476 spin_lock_init(&adapter->fcoe.lock);
4479 /* n-tuple support exists, always init our spinlock */
4480 spin_lock_init(&adapter->fdir_perfect_lock);
4482 #ifdef CONFIG_IXGBE_DCB
4483 switch (hw->mac.type) {
4484 case ixgbe_mac_X540:
4485 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
4486 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
4489 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
4490 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
4494 /* Configure DCB traffic classes */
4495 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
4496 tc = &adapter->dcb_cfg.tc_config[j];
4497 tc->path[DCB_TX_CONFIG].bwg_id = 0;
4498 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
4499 tc->path[DCB_RX_CONFIG].bwg_id = 0;
4500 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
4501 tc->dcb_pfc = pfc_disabled;
4504 /* Initialize default user to priority mapping, UPx->TC0 */
4505 tc = &adapter->dcb_cfg.tc_config[0];
4506 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
4507 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
4509 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
4510 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
4511 adapter->dcb_cfg.pfc_mode_enable = false;
4512 adapter->dcb_set_bitmap = 0x00;
4513 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
4514 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
4515 sizeof(adapter->temp_dcb_cfg));
4519 /* default flow control settings */
4520 hw->fc.requested_mode = ixgbe_fc_full;
4521 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
4522 ixgbe_pbthresh_setup(adapter);
4523 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
4524 hw->fc.send_xon = true;
4525 hw->fc.disable_fc_autoneg = false;
4527 #ifdef CONFIG_PCI_IOV
4528 /* assign number of SR-IOV VFs */
4529 if (hw->mac.type != ixgbe_mac_82598EB)
4530 adapter->num_vfs = (max_vfs > 63) ? 0 : max_vfs;
4533 /* enable itr by default in dynamic mode */
4534 adapter->rx_itr_setting = 1;
4535 adapter->tx_itr_setting = 1;
4537 /* set default ring sizes */
4538 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
4539 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
4541 /* set default work limits */
4542 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
4544 /* initialize eeprom parameters */
4545 if (ixgbe_init_eeprom_params_generic(hw)) {
4546 e_dev_err("EEPROM initialization failed\n");
4550 set_bit(__IXGBE_DOWN, &adapter->state);
4556 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
4557 * @tx_ring: tx descriptor ring (for a specific queue) to setup
4559 * Return 0 on success, negative on failure
4561 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
4563 struct device *dev = tx_ring->dev;
4564 int orig_node = dev_to_node(dev);
4568 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
4570 if (tx_ring->q_vector)
4571 numa_node = tx_ring->q_vector->numa_node;
4573 tx_ring->tx_buffer_info = vzalloc_node(size, numa_node);
4574 if (!tx_ring->tx_buffer_info)
4575 tx_ring->tx_buffer_info = vzalloc(size);
4576 if (!tx_ring->tx_buffer_info)
4579 /* round up to nearest 4K */
4580 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
4581 tx_ring->size = ALIGN(tx_ring->size, 4096);
4583 set_dev_node(dev, numa_node);
4584 tx_ring->desc = dma_alloc_coherent(dev,
4588 set_dev_node(dev, orig_node);
4590 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
4591 &tx_ring->dma, GFP_KERNEL);
4595 tx_ring->next_to_use = 0;
4596 tx_ring->next_to_clean = 0;
4600 vfree(tx_ring->tx_buffer_info);
4601 tx_ring->tx_buffer_info = NULL;
4602 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
4607 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
4608 * @adapter: board private structure
4610 * If this function returns with an error, then it's possible one or
4611 * more of the rings is populated (while the rest are not). It is the
4612 * callers duty to clean those orphaned rings.
4614 * Return 0 on success, negative on failure
4616 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
4620 for (i = 0; i < adapter->num_tx_queues; i++) {
4621 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
4625 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
4631 /* rewind the index freeing the rings as we go */
4633 ixgbe_free_tx_resources(adapter->tx_ring[i]);
4638 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
4639 * @rx_ring: rx descriptor ring (for a specific queue) to setup
4641 * Returns 0 on success, negative on failure
4643 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
4645 struct device *dev = rx_ring->dev;
4646 int orig_node = dev_to_node(dev);
4650 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4652 if (rx_ring->q_vector)
4653 numa_node = rx_ring->q_vector->numa_node;
4655 rx_ring->rx_buffer_info = vzalloc_node(size, numa_node);
4656 if (!rx_ring->rx_buffer_info)
4657 rx_ring->rx_buffer_info = vzalloc(size);
4658 if (!rx_ring->rx_buffer_info)
4661 /* Round up to nearest 4K */
4662 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
4663 rx_ring->size = ALIGN(rx_ring->size, 4096);
4665 set_dev_node(dev, numa_node);
4666 rx_ring->desc = dma_alloc_coherent(dev,
4670 set_dev_node(dev, orig_node);
4672 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
4673 &rx_ring->dma, GFP_KERNEL);
4677 rx_ring->next_to_clean = 0;
4678 rx_ring->next_to_use = 0;
4682 vfree(rx_ring->rx_buffer_info);
4683 rx_ring->rx_buffer_info = NULL;
4684 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
4689 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
4690 * @adapter: board private structure
4692 * If this function returns with an error, then it's possible one or
4693 * more of the rings is populated (while the rest are not). It is the
4694 * callers duty to clean those orphaned rings.
4696 * Return 0 on success, negative on failure
4698 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
4702 for (i = 0; i < adapter->num_rx_queues; i++) {
4703 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
4707 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
4712 err = ixgbe_setup_fcoe_ddp_resources(adapter);
4717 /* rewind the index freeing the rings as we go */
4719 ixgbe_free_rx_resources(adapter->rx_ring[i]);
4724 * ixgbe_free_tx_resources - Free Tx Resources per Queue
4725 * @tx_ring: Tx descriptor ring for a specific queue
4727 * Free all transmit software resources
4729 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
4731 ixgbe_clean_tx_ring(tx_ring);
4733 vfree(tx_ring->tx_buffer_info);
4734 tx_ring->tx_buffer_info = NULL;
4736 /* if not set, then don't free */
4740 dma_free_coherent(tx_ring->dev, tx_ring->size,
4741 tx_ring->desc, tx_ring->dma);
4743 tx_ring->desc = NULL;
4747 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
4748 * @adapter: board private structure
4750 * Free all transmit software resources
4752 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
4756 for (i = 0; i < adapter->num_tx_queues; i++)
4757 if (adapter->tx_ring[i]->desc)
4758 ixgbe_free_tx_resources(adapter->tx_ring[i]);
4762 * ixgbe_free_rx_resources - Free Rx Resources
4763 * @rx_ring: ring to clean the resources from
4765 * Free all receive software resources
4767 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
4769 ixgbe_clean_rx_ring(rx_ring);
4771 vfree(rx_ring->rx_buffer_info);
4772 rx_ring->rx_buffer_info = NULL;
4774 /* if not set, then don't free */
4778 dma_free_coherent(rx_ring->dev, rx_ring->size,
4779 rx_ring->desc, rx_ring->dma);
4781 rx_ring->desc = NULL;
4785 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
4786 * @adapter: board private structure
4788 * Free all receive software resources
4790 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
4795 ixgbe_free_fcoe_ddp_resources(adapter);
4798 for (i = 0; i < adapter->num_rx_queues; i++)
4799 if (adapter->rx_ring[i]->desc)
4800 ixgbe_free_rx_resources(adapter->rx_ring[i]);
4804 * ixgbe_change_mtu - Change the Maximum Transfer Unit
4805 * @netdev: network interface device structure
4806 * @new_mtu: new value for maximum frame size
4808 * Returns 0 on success, negative on failure
4810 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
4812 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4813 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4815 /* MTU < 68 is an error and causes problems on some kernels */
4816 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
4820 * For 82599EB we cannot allow PF to change MTU greater than 1500
4821 * in SR-IOV mode as it may cause buffer overruns in guest VFs that
4822 * don't allocate and chain buffers correctly.
4824 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
4825 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
4826 (max_frame > MAXIMUM_ETHERNET_VLAN_SIZE))
4829 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4831 /* must set new MTU before calling down or up */
4832 netdev->mtu = new_mtu;
4834 if (netif_running(netdev))
4835 ixgbe_reinit_locked(adapter);
4841 * ixgbe_open - Called when a network interface is made active
4842 * @netdev: network interface device structure
4844 * Returns 0 on success, negative value on failure
4846 * The open entry point is called when a network interface is made
4847 * active by the system (IFF_UP). At this point all resources needed
4848 * for transmit and receive operations are allocated, the interrupt
4849 * handler is registered with the OS, the watchdog timer is started,
4850 * and the stack is notified that the interface is ready.
4852 static int ixgbe_open(struct net_device *netdev)
4854 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4857 /* disallow open during test */
4858 if (test_bit(__IXGBE_TESTING, &adapter->state))
4861 netif_carrier_off(netdev);
4863 /* allocate transmit descriptors */
4864 err = ixgbe_setup_all_tx_resources(adapter);
4868 /* allocate receive descriptors */
4869 err = ixgbe_setup_all_rx_resources(adapter);
4873 ixgbe_configure(adapter);
4875 err = ixgbe_request_irq(adapter);
4879 /* Notify the stack of the actual queue counts. */
4880 err = netif_set_real_num_tx_queues(netdev,
4881 adapter->num_rx_pools > 1 ? 1 :
4882 adapter->num_tx_queues);
4884 goto err_set_queues;
4887 err = netif_set_real_num_rx_queues(netdev,
4888 adapter->num_rx_pools > 1 ? 1 :
4889 adapter->num_rx_queues);
4891 goto err_set_queues;
4893 ixgbe_up_complete(adapter);
4898 ixgbe_free_irq(adapter);
4900 ixgbe_free_all_rx_resources(adapter);
4902 ixgbe_free_all_tx_resources(adapter);
4904 ixgbe_reset(adapter);
4910 * ixgbe_close - Disables a network interface
4911 * @netdev: network interface device structure
4913 * Returns 0, this is not allowed to fail
4915 * The close entry point is called when an interface is de-activated
4916 * by the OS. The hardware is still under the drivers control, but
4917 * needs to be disabled. A global MAC reset is issued to stop the
4918 * hardware, and all transmit and receive resources are freed.
4920 static int ixgbe_close(struct net_device *netdev)
4922 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4924 ixgbe_down(adapter);
4925 ixgbe_free_irq(adapter);
4927 ixgbe_fdir_filter_exit(adapter);
4929 ixgbe_free_all_tx_resources(adapter);
4930 ixgbe_free_all_rx_resources(adapter);
4932 ixgbe_release_hw_control(adapter);
4938 static int ixgbe_resume(struct pci_dev *pdev)
4940 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
4941 struct net_device *netdev = adapter->netdev;
4944 pci_set_power_state(pdev, PCI_D0);
4945 pci_restore_state(pdev);
4947 * pci_restore_state clears dev->state_saved so call
4948 * pci_save_state to restore it.
4950 pci_save_state(pdev);
4952 err = pci_enable_device_mem(pdev);
4954 e_dev_err("Cannot enable PCI device from suspend\n");
4957 pci_set_master(pdev);
4959 pci_wake_from_d3(pdev, false);
4961 ixgbe_reset(adapter);
4963 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
4966 err = ixgbe_init_interrupt_scheme(adapter);
4967 if (!err && netif_running(netdev))
4968 err = ixgbe_open(netdev);
4975 netif_device_attach(netdev);
4979 #endif /* CONFIG_PM */
4981 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
4983 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
4984 struct net_device *netdev = adapter->netdev;
4985 struct ixgbe_hw *hw = &adapter->hw;
4987 u32 wufc = adapter->wol;
4992 netif_device_detach(netdev);
4994 if (netif_running(netdev)) {
4996 ixgbe_down(adapter);
4997 ixgbe_free_irq(adapter);
4998 ixgbe_free_all_tx_resources(adapter);
4999 ixgbe_free_all_rx_resources(adapter);
5003 ixgbe_clear_interrupt_scheme(adapter);
5006 retval = pci_save_state(pdev);
5012 ixgbe_set_rx_mode(netdev);
5015 * enable the optics for both mult-speed fiber and
5016 * 82599 SFP+ fiber as we can WoL.
5018 if (hw->mac.ops.enable_tx_laser &&
5019 (hw->phy.multispeed_fiber ||
5020 (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber &&
5021 hw->mac.type == ixgbe_mac_82599EB)))
5022 hw->mac.ops.enable_tx_laser(hw);
5024 /* turn on all-multi mode if wake on multicast is enabled */
5025 if (wufc & IXGBE_WUFC_MC) {
5026 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5027 fctrl |= IXGBE_FCTRL_MPE;
5028 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5031 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
5032 ctrl |= IXGBE_CTRL_GIO_DIS;
5033 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
5035 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
5037 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
5038 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
5041 switch (hw->mac.type) {
5042 case ixgbe_mac_82598EB:
5043 pci_wake_from_d3(pdev, false);
5045 case ixgbe_mac_82599EB:
5046 case ixgbe_mac_X540:
5047 pci_wake_from_d3(pdev, !!wufc);
5053 *enable_wake = !!wufc;
5055 ixgbe_release_hw_control(adapter);
5057 pci_disable_device(pdev);
5063 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
5068 retval = __ixgbe_shutdown(pdev, &wake);
5073 pci_prepare_to_sleep(pdev);
5075 pci_wake_from_d3(pdev, false);
5076 pci_set_power_state(pdev, PCI_D3hot);
5081 #endif /* CONFIG_PM */
5083 static void ixgbe_shutdown(struct pci_dev *pdev)
5087 __ixgbe_shutdown(pdev, &wake);
5089 if (system_state == SYSTEM_POWER_OFF) {
5090 pci_wake_from_d3(pdev, wake);
5091 pci_set_power_state(pdev, PCI_D3hot);
5096 * ixgbe_update_stats - Update the board statistics counters.
5097 * @adapter: board private structure
5099 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
5101 struct net_device *netdev = adapter->netdev;
5102 struct ixgbe_hw *hw = &adapter->hw;
5103 struct ixgbe_hw_stats *hwstats = &adapter->stats;
5105 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
5106 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
5107 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
5108 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
5110 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5111 test_bit(__IXGBE_RESETTING, &adapter->state))
5114 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
5117 for (i = 0; i < adapter->num_rx_queues; i++) {
5118 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
5119 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
5121 adapter->rsc_total_count = rsc_count;
5122 adapter->rsc_total_flush = rsc_flush;
5125 for (i = 0; i < adapter->num_rx_queues; i++) {
5126 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
5127 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
5128 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
5129 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
5130 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
5131 bytes += rx_ring->stats.bytes;
5132 packets += rx_ring->stats.packets;
5134 adapter->non_eop_descs = non_eop_descs;
5135 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
5136 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
5137 adapter->hw_csum_rx_error = hw_csum_rx_error;
5138 netdev->stats.rx_bytes = bytes;
5139 netdev->stats.rx_packets = packets;
5143 /* gather some stats to the adapter struct that are per queue */
5144 for (i = 0; i < adapter->num_tx_queues; i++) {
5145 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
5146 restart_queue += tx_ring->tx_stats.restart_queue;
5147 tx_busy += tx_ring->tx_stats.tx_busy;
5148 bytes += tx_ring->stats.bytes;
5149 packets += tx_ring->stats.packets;
5151 adapter->restart_queue = restart_queue;
5152 adapter->tx_busy = tx_busy;
5153 netdev->stats.tx_bytes = bytes;
5154 netdev->stats.tx_packets = packets;
5156 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
5158 /* 8 register reads */
5159 for (i = 0; i < 8; i++) {
5160 /* for packet buffers not used, the register should read 0 */
5161 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
5163 hwstats->mpc[i] += mpc;
5164 total_mpc += hwstats->mpc[i];
5165 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
5166 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
5167 switch (hw->mac.type) {
5168 case ixgbe_mac_82598EB:
5169 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
5170 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
5171 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
5172 hwstats->pxonrxc[i] +=
5173 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
5175 case ixgbe_mac_82599EB:
5176 case ixgbe_mac_X540:
5177 hwstats->pxonrxc[i] +=
5178 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
5185 /*16 register reads */
5186 for (i = 0; i < 16; i++) {
5187 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
5188 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
5189 if ((hw->mac.type == ixgbe_mac_82599EB) ||
5190 (hw->mac.type == ixgbe_mac_X540)) {
5191 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
5192 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
5193 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
5194 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
5198 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
5199 /* work around hardware counting issue */
5200 hwstats->gprc -= missed_rx;
5202 ixgbe_update_xoff_received(adapter);
5204 /* 82598 hardware only has a 32 bit counter in the high register */
5205 switch (hw->mac.type) {
5206 case ixgbe_mac_82598EB:
5207 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
5208 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
5209 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
5210 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
5212 case ixgbe_mac_X540:
5213 /* OS2BMC stats are X540 only*/
5214 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
5215 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
5216 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
5217 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
5218 case ixgbe_mac_82599EB:
5219 for (i = 0; i < 16; i++)
5220 adapter->hw_rx_no_dma_resources +=
5221 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
5222 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
5223 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
5224 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
5225 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
5226 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
5227 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
5228 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
5229 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
5230 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
5232 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
5233 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
5234 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
5235 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
5236 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
5237 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
5238 /* Add up per cpu counters for total ddp aloc fail */
5239 if (adapter->fcoe.ddp_pool) {
5240 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
5241 struct ixgbe_fcoe_ddp_pool *ddp_pool;
5243 u64 noddp = 0, noddp_ext_buff = 0;
5244 for_each_possible_cpu(cpu) {
5245 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
5246 noddp += ddp_pool->noddp;
5247 noddp_ext_buff += ddp_pool->noddp_ext_buff;
5249 hwstats->fcoe_noddp = noddp;
5250 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
5252 #endif /* IXGBE_FCOE */
5257 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
5258 hwstats->bprc += bprc;
5259 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
5260 if (hw->mac.type == ixgbe_mac_82598EB)
5261 hwstats->mprc -= bprc;
5262 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
5263 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
5264 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
5265 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
5266 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
5267 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
5268 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
5269 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
5270 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
5271 hwstats->lxontxc += lxon;
5272 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
5273 hwstats->lxofftxc += lxoff;
5274 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
5275 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
5277 * 82598 errata - tx of flow control packets is included in tx counters
5279 xon_off_tot = lxon + lxoff;
5280 hwstats->gptc -= xon_off_tot;
5281 hwstats->mptc -= xon_off_tot;
5282 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
5283 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
5284 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
5285 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
5286 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
5287 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
5288 hwstats->ptc64 -= xon_off_tot;
5289 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
5290 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
5291 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
5292 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
5293 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
5294 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
5296 /* Fill out the OS statistics structure */
5297 netdev->stats.multicast = hwstats->mprc;
5300 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
5301 netdev->stats.rx_dropped = 0;
5302 netdev->stats.rx_length_errors = hwstats->rlec;
5303 netdev->stats.rx_crc_errors = hwstats->crcerrs;
5304 netdev->stats.rx_missed_errors = total_mpc;
5308 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
5309 * @adapter: pointer to the device adapter structure
5311 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
5313 struct ixgbe_hw *hw = &adapter->hw;
5316 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
5319 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5321 /* if interface is down do nothing */
5322 if (test_bit(__IXGBE_DOWN, &adapter->state))
5325 /* do nothing if we are not using signature filters */
5326 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
5329 adapter->fdir_overflow++;
5331 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
5332 for (i = 0; i < adapter->num_tx_queues; i++)
5333 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
5334 &(adapter->tx_ring[i]->state));
5335 /* re-enable flow director interrupts */
5336 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
5338 e_err(probe, "failed to finish FDIR re-initialization, "
5339 "ignored adding FDIR ATR filters\n");
5344 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
5345 * @adapter: pointer to the device adapter structure
5347 * This function serves two purposes. First it strobes the interrupt lines
5348 * in order to make certain interrupts are occurring. Secondly it sets the
5349 * bits needed to check for TX hangs. As a result we should immediately
5350 * determine if a hang has occurred.
5352 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
5354 struct ixgbe_hw *hw = &adapter->hw;
5358 /* If we're down or resetting, just bail */
5359 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5360 test_bit(__IXGBE_RESETTING, &adapter->state))
5363 /* Force detection of hung controller */
5364 if (netif_carrier_ok(adapter->netdev)) {
5365 for (i = 0; i < adapter->num_tx_queues; i++)
5366 set_check_for_tx_hang(adapter->tx_ring[i]);
5369 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
5371 * for legacy and MSI interrupts don't set any bits
5372 * that are enabled for EIAM, because this operation
5373 * would set *both* EIMS and EICS for any bit in EIAM
5375 IXGBE_WRITE_REG(hw, IXGBE_EICS,
5376 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
5378 /* get one bit for every active tx/rx interrupt vector */
5379 for (i = 0; i < adapter->num_q_vectors; i++) {
5380 struct ixgbe_q_vector *qv = adapter->q_vector[i];
5381 if (qv->rx.ring || qv->tx.ring)
5382 eics |= ((u64)1 << i);
5386 /* Cause software interrupt to ensure rings are cleaned */
5387 ixgbe_irq_rearm_queues(adapter, eics);
5392 * ixgbe_watchdog_update_link - update the link status
5393 * @adapter: pointer to the device adapter structure
5394 * @link_speed: pointer to a u32 to store the link_speed
5396 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
5398 struct ixgbe_hw *hw = &adapter->hw;
5399 u32 link_speed = adapter->link_speed;
5400 bool link_up = adapter->link_up;
5401 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
5403 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
5406 if (hw->mac.ops.check_link) {
5407 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
5409 /* always assume link is up, if no check link function */
5410 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
5414 if (adapter->ixgbe_ieee_pfc)
5415 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
5417 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
5418 hw->mac.ops.fc_enable(hw);
5419 ixgbe_set_rx_drop_en(adapter);
5423 time_after(jiffies, (adapter->link_check_timeout +
5424 IXGBE_TRY_LINK_TIMEOUT))) {
5425 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5426 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
5427 IXGBE_WRITE_FLUSH(hw);
5430 adapter->link_up = link_up;
5431 adapter->link_speed = link_speed;
5435 * ixgbe_watchdog_link_is_up - update netif_carrier status and
5436 * print link up message
5437 * @adapter: pointer to the device adapter structure
5439 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
5441 struct net_device *netdev = adapter->netdev;
5442 struct ixgbe_hw *hw = &adapter->hw;
5443 u32 link_speed = adapter->link_speed;
5444 bool flow_rx, flow_tx;
5446 /* only continue if link was previously down */
5447 if (netif_carrier_ok(netdev))
5450 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
5452 switch (hw->mac.type) {
5453 case ixgbe_mac_82598EB: {
5454 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5455 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
5456 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
5457 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
5460 case ixgbe_mac_X540:
5461 case ixgbe_mac_82599EB: {
5462 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
5463 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
5464 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
5465 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
5474 #ifdef CONFIG_IXGBE_PTP
5475 ixgbe_ptp_start_cyclecounter(adapter);
5478 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n",
5479 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
5481 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
5483 (link_speed == IXGBE_LINK_SPEED_100_FULL ?
5486 ((flow_rx && flow_tx) ? "RX/TX" :
5488 (flow_tx ? "TX" : "None"))));
5490 netif_carrier_on(netdev);
5491 ixgbe_check_vf_rate_limit(adapter);
5493 /* ping all the active vfs to let them know link has changed */
5494 ixgbe_ping_all_vfs(adapter);
5498 * ixgbe_watchdog_link_is_down - update netif_carrier status and
5499 * print link down message
5500 * @adapter: pointer to the adapter structure
5502 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
5504 struct net_device *netdev = adapter->netdev;
5505 struct ixgbe_hw *hw = &adapter->hw;
5507 adapter->link_up = false;
5508 adapter->link_speed = 0;
5510 /* only continue if link was up previously */
5511 if (!netif_carrier_ok(netdev))
5514 /* poll for SFP+ cable when link is down */
5515 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
5516 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5518 #ifdef CONFIG_IXGBE_PTP
5519 ixgbe_ptp_start_cyclecounter(adapter);
5522 e_info(drv, "NIC Link is Down\n");
5523 netif_carrier_off(netdev);
5525 /* ping all the active vfs to let them know link has changed */
5526 ixgbe_ping_all_vfs(adapter);
5530 * ixgbe_watchdog_flush_tx - flush queues on link down
5531 * @adapter: pointer to the device adapter structure
5533 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
5536 int some_tx_pending = 0;
5538 if (!netif_carrier_ok(adapter->netdev)) {
5539 for (i = 0; i < adapter->num_tx_queues; i++) {
5540 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
5541 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
5542 some_tx_pending = 1;
5547 if (some_tx_pending) {
5548 /* We've lost link, so the controller stops DMA,
5549 * but we've got queued Tx work that's never going
5550 * to get done, so reset controller to flush Tx.
5551 * (Do the reset outside of interrupt context).
5553 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
5558 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
5562 /* Do not perform spoof check for 82598 */
5563 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5566 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
5569 * ssvpc register is cleared on read, if zero then no
5570 * spoofed packets in the last interval.
5575 e_warn(drv, "%d Spoofed packets detected\n", ssvpc);
5579 * ixgbe_watchdog_subtask - check and bring link up
5580 * @adapter: pointer to the device adapter structure
5582 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
5584 /* if interface is down do nothing */
5585 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5586 test_bit(__IXGBE_RESETTING, &adapter->state))
5589 ixgbe_watchdog_update_link(adapter);
5591 if (adapter->link_up)
5592 ixgbe_watchdog_link_is_up(adapter);
5594 ixgbe_watchdog_link_is_down(adapter);
5596 ixgbe_spoof_check(adapter);
5597 ixgbe_update_stats(adapter);
5599 ixgbe_watchdog_flush_tx(adapter);
5603 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
5604 * @adapter: the ixgbe adapter structure
5606 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
5608 struct ixgbe_hw *hw = &adapter->hw;
5611 /* not searching for SFP so there is nothing to do here */
5612 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
5613 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
5616 /* someone else is in init, wait until next service event */
5617 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5620 err = hw->phy.ops.identify_sfp(hw);
5621 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
5624 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
5625 /* If no cable is present, then we need to reset
5626 * the next time we find a good cable. */
5627 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5634 /* exit if reset not needed */
5635 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
5638 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
5641 * A module may be identified correctly, but the EEPROM may not have
5642 * support for that module. setup_sfp() will fail in that case, so
5643 * we should not allow that module to load.
5645 if (hw->mac.type == ixgbe_mac_82598EB)
5646 err = hw->phy.ops.reset(hw);
5648 err = hw->mac.ops.setup_sfp(hw);
5650 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
5653 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
5654 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
5657 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5659 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
5660 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
5661 e_dev_err("failed to initialize because an unsupported "
5662 "SFP+ module type was detected.\n");
5663 e_dev_err("Reload the driver after installing a "
5664 "supported module.\n");
5665 unregister_netdev(adapter->netdev);
5670 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
5671 * @adapter: the ixgbe adapter structure
5673 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
5675 struct ixgbe_hw *hw = &adapter->hw;
5679 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
5682 /* someone else is in init, wait until next service event */
5683 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5686 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5688 autoneg = hw->phy.autoneg_advertised;
5689 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
5690 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiation);
5691 if (hw->mac.ops.setup_link)
5692 hw->mac.ops.setup_link(hw, autoneg, negotiation, true);
5694 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5695 adapter->link_check_timeout = jiffies;
5696 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5699 #ifdef CONFIG_PCI_IOV
5700 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
5703 struct ixgbe_hw *hw = &adapter->hw;
5704 struct net_device *netdev = adapter->netdev;
5708 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
5709 if (gpc) /* If incrementing then no need for the check below */
5712 * Check to see if a bad DMA write target from an errant or
5713 * malicious VF has caused a PCIe error. If so then we can
5714 * issue a VFLR to the offending VF(s) and then resume without
5715 * requesting a full slot reset.
5718 for (vf = 0; vf < adapter->num_vfs; vf++) {
5719 ciaa = (vf << 16) | 0x80000000;
5720 /* 32 bit read so align, we really want status at offset 6 */
5721 ciaa |= PCI_COMMAND;
5722 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5723 ciad = IXGBE_READ_REG(hw, IXGBE_CIAD_82599);
5725 /* disable debug mode asap after reading data */
5726 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5727 /* Get the upper 16 bits which will be the PCI status reg */
5729 if (ciad & PCI_STATUS_REC_MASTER_ABORT) {
5730 netdev_err(netdev, "VF %d Hung DMA\n", vf);
5732 ciaa = (vf << 16) | 0x80000000;
5734 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5735 ciad = 0x00008000; /* VFLR */
5736 IXGBE_WRITE_REG(hw, IXGBE_CIAD_82599, ciad);
5738 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5745 * ixgbe_service_timer - Timer Call-back
5746 * @data: pointer to adapter cast into an unsigned long
5748 static void ixgbe_service_timer(unsigned long data)
5750 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
5751 unsigned long next_event_offset;
5754 /* poll faster when waiting for link */
5755 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
5756 next_event_offset = HZ / 10;
5758 next_event_offset = HZ * 2;
5760 #ifdef CONFIG_PCI_IOV
5762 * don't bother with SR-IOV VF DMA hang check if there are
5763 * no VFs or the link is down
5765 if (!adapter->num_vfs ||
5766 (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
5767 goto normal_timer_service;
5769 /* If we have VFs allocated then we must check for DMA hangs */
5770 ixgbe_check_for_bad_vf(adapter);
5771 next_event_offset = HZ / 50;
5772 adapter->timer_event_accumulator++;
5774 if (adapter->timer_event_accumulator >= 100)
5775 adapter->timer_event_accumulator = 0;
5779 normal_timer_service:
5781 /* Reset the timer */
5782 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
5785 ixgbe_service_event_schedule(adapter);
5788 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
5790 if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
5793 adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
5795 /* If we're already down or resetting, just bail */
5796 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5797 test_bit(__IXGBE_RESETTING, &adapter->state))
5800 ixgbe_dump(adapter);
5801 netdev_err(adapter->netdev, "Reset adapter\n");
5802 adapter->tx_timeout_count++;
5804 ixgbe_reinit_locked(adapter);
5808 * ixgbe_service_task - manages and runs subtasks
5809 * @work: pointer to work_struct containing our data
5811 static void ixgbe_service_task(struct work_struct *work)
5813 struct ixgbe_adapter *adapter = container_of(work,
5814 struct ixgbe_adapter,
5817 ixgbe_reset_subtask(adapter);
5818 ixgbe_sfp_detection_subtask(adapter);
5819 ixgbe_sfp_link_config_subtask(adapter);
5820 ixgbe_check_overtemp_subtask(adapter);
5821 ixgbe_watchdog_subtask(adapter);
5822 ixgbe_fdir_reinit_subtask(adapter);
5823 ixgbe_check_hang_subtask(adapter);
5824 #ifdef CONFIG_IXGBE_PTP
5825 ixgbe_ptp_overflow_check(adapter);
5828 ixgbe_service_event_complete(adapter);
5831 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
5832 struct ixgbe_tx_buffer *first,
5835 struct sk_buff *skb = first->skb;
5836 u32 vlan_macip_lens, type_tucmd;
5837 u32 mss_l4len_idx, l4len;
5839 if (!skb_is_gso(skb))
5842 if (skb_header_cloned(skb)) {
5843 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5848 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5849 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
5851 if (first->protocol == __constant_htons(ETH_P_IP)) {
5852 struct iphdr *iph = ip_hdr(skb);
5855 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5859 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
5860 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
5861 IXGBE_TX_FLAGS_CSUM |
5862 IXGBE_TX_FLAGS_IPV4;
5863 } else if (skb_is_gso_v6(skb)) {
5864 ipv6_hdr(skb)->payload_len = 0;
5865 tcp_hdr(skb)->check =
5866 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5867 &ipv6_hdr(skb)->daddr,
5869 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
5870 IXGBE_TX_FLAGS_CSUM;
5873 /* compute header lengths */
5874 l4len = tcp_hdrlen(skb);
5875 *hdr_len = skb_transport_offset(skb) + l4len;
5877 /* update gso size and bytecount with header size */
5878 first->gso_segs = skb_shinfo(skb)->gso_segs;
5879 first->bytecount += (first->gso_segs - 1) * *hdr_len;
5881 /* mss_l4len_id: use 1 as index for TSO */
5882 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
5883 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
5884 mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
5886 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
5887 vlan_macip_lens = skb_network_header_len(skb);
5888 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
5889 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
5891 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
5897 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
5898 struct ixgbe_tx_buffer *first)
5900 struct sk_buff *skb = first->skb;
5901 u32 vlan_macip_lens = 0;
5902 u32 mss_l4len_idx = 0;
5905 if (skb->ip_summed != CHECKSUM_PARTIAL) {
5906 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN)) {
5907 if (unlikely(skb->no_fcs))
5908 first->tx_flags |= IXGBE_TX_FLAGS_NO_IFCS;
5909 if (!(first->tx_flags & IXGBE_TX_FLAGS_TXSW))
5914 switch (first->protocol) {
5915 case __constant_htons(ETH_P_IP):
5916 vlan_macip_lens |= skb_network_header_len(skb);
5917 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
5918 l4_hdr = ip_hdr(skb)->protocol;
5920 case __constant_htons(ETH_P_IPV6):
5921 vlan_macip_lens |= skb_network_header_len(skb);
5922 l4_hdr = ipv6_hdr(skb)->nexthdr;
5925 if (unlikely(net_ratelimit())) {
5926 dev_warn(tx_ring->dev,
5927 "partial checksum but proto=%x!\n",
5935 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
5936 mss_l4len_idx = tcp_hdrlen(skb) <<
5937 IXGBE_ADVTXD_L4LEN_SHIFT;
5940 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
5941 mss_l4len_idx = sizeof(struct sctphdr) <<
5942 IXGBE_ADVTXD_L4LEN_SHIFT;
5945 mss_l4len_idx = sizeof(struct udphdr) <<
5946 IXGBE_ADVTXD_L4LEN_SHIFT;
5949 if (unlikely(net_ratelimit())) {
5950 dev_warn(tx_ring->dev,
5951 "partial checksum but l4 proto=%x!\n",
5957 /* update TX checksum flag */
5958 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
5961 /* vlan_macip_lens: MACLEN, VLAN tag */
5962 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
5963 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
5965 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
5966 type_tucmd, mss_l4len_idx);
5969 static __le32 ixgbe_tx_cmd_type(u32 tx_flags)
5971 /* set type for advanced descriptor with frame checksum insertion */
5972 __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
5973 IXGBE_ADVTXD_DCMD_DEXT);
5975 /* set HW vlan bit if vlan is present */
5976 if (tx_flags & IXGBE_TX_FLAGS_HW_VLAN)
5977 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
5979 #ifdef CONFIG_IXGBE_PTP
5980 if (tx_flags & IXGBE_TX_FLAGS_TSTAMP)
5981 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_MAC_TSTAMP);
5984 /* set segmentation enable bits for TSO/FSO */
5986 if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_FSO))
5988 if (tx_flags & IXGBE_TX_FLAGS_TSO)
5990 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
5992 /* insert frame checksum */
5993 if (!(tx_flags & IXGBE_TX_FLAGS_NO_IFCS))
5994 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_IFCS);
5999 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
6000 u32 tx_flags, unsigned int paylen)
6002 __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
6004 /* enable L4 checksum for TSO and TX checksum offload */
6005 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
6006 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
6008 /* enble IPv4 checksum for TSO */
6009 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
6010 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
6012 /* use index 1 context for TSO/FSO/FCOE */
6014 if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_FCOE))
6016 if (tx_flags & IXGBE_TX_FLAGS_TSO)
6018 olinfo_status |= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT);
6021 * Check Context must be set if Tx switch is enabled, which it
6022 * always is for case where virtual functions are running
6025 if (tx_flags & (IXGBE_TX_FLAGS_TXSW | IXGBE_TX_FLAGS_FCOE))
6027 if (tx_flags & IXGBE_TX_FLAGS_TXSW)
6029 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
6031 tx_desc->read.olinfo_status = olinfo_status;
6034 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
6037 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
6038 struct ixgbe_tx_buffer *first,
6042 struct sk_buff *skb = first->skb;
6043 struct ixgbe_tx_buffer *tx_buffer;
6044 union ixgbe_adv_tx_desc *tx_desc;
6045 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
6046 unsigned int data_len = skb->data_len;
6047 unsigned int size = skb_headlen(skb);
6048 unsigned int paylen = skb->len - hdr_len;
6049 u32 tx_flags = first->tx_flags;
6051 u16 i = tx_ring->next_to_use;
6053 tx_desc = IXGBE_TX_DESC(tx_ring, i);
6055 ixgbe_tx_olinfo_status(tx_desc, tx_flags, paylen);
6056 cmd_type = ixgbe_tx_cmd_type(tx_flags);
6059 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
6060 if (data_len < sizeof(struct fcoe_crc_eof)) {
6061 size -= sizeof(struct fcoe_crc_eof) - data_len;
6064 data_len -= sizeof(struct fcoe_crc_eof);
6069 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
6070 if (dma_mapping_error(tx_ring->dev, dma))
6073 /* record length, and DMA address */
6074 dma_unmap_len_set(first, len, size);
6075 dma_unmap_addr_set(first, dma, dma);
6077 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6080 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
6081 tx_desc->read.cmd_type_len =
6082 cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
6086 if (i == tx_ring->count) {
6087 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6091 dma += IXGBE_MAX_DATA_PER_TXD;
6092 size -= IXGBE_MAX_DATA_PER_TXD;
6094 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6095 tx_desc->read.olinfo_status = 0;
6098 if (likely(!data_len))
6101 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
6105 if (i == tx_ring->count) {
6106 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6111 size = min_t(unsigned int, data_len, skb_frag_size(frag));
6113 size = skb_frag_size(frag);
6117 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
6119 if (dma_mapping_error(tx_ring->dev, dma))
6122 tx_buffer = &tx_ring->tx_buffer_info[i];
6123 dma_unmap_len_set(tx_buffer, len, size);
6124 dma_unmap_addr_set(tx_buffer, dma, dma);
6126 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6127 tx_desc->read.olinfo_status = 0;
6132 /* write last descriptor with RS and EOP bits */
6133 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
6134 tx_desc->read.cmd_type_len = cmd_type;
6136 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6138 /* set the timestamp */
6139 first->time_stamp = jiffies;
6142 * Force memory writes to complete before letting h/w know there
6143 * are new descriptors to fetch. (Only applicable for weak-ordered
6144 * memory model archs, such as IA-64).
6146 * We also need this memory barrier to make certain all of the
6147 * status bits have been updated before next_to_watch is written.
6151 /* set next_to_watch value indicating a packet is present */
6152 first->next_to_watch = tx_desc;
6155 if (i == tx_ring->count)
6158 tx_ring->next_to_use = i;
6160 /* notify HW of packet */
6161 writel(i, tx_ring->tail);
6165 dev_err(tx_ring->dev, "TX DMA map failed\n");
6167 /* clear dma mappings for failed tx_buffer_info map */
6169 tx_buffer = &tx_ring->tx_buffer_info[i];
6170 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
6171 if (tx_buffer == first)
6178 tx_ring->next_to_use = i;
6181 static void ixgbe_atr(struct ixgbe_ring *ring,
6182 struct ixgbe_tx_buffer *first)
6184 struct ixgbe_q_vector *q_vector = ring->q_vector;
6185 union ixgbe_atr_hash_dword input = { .dword = 0 };
6186 union ixgbe_atr_hash_dword common = { .dword = 0 };
6188 unsigned char *network;
6190 struct ipv6hdr *ipv6;
6195 /* if ring doesn't have a interrupt vector, cannot perform ATR */
6199 /* do nothing if sampling is disabled */
6200 if (!ring->atr_sample_rate)
6205 /* snag network header to get L4 type and address */
6206 hdr.network = skb_network_header(first->skb);
6208 /* Currently only IPv4/IPv6 with TCP is supported */
6209 if ((first->protocol != __constant_htons(ETH_P_IPV6) ||
6210 hdr.ipv6->nexthdr != IPPROTO_TCP) &&
6211 (first->protocol != __constant_htons(ETH_P_IP) ||
6212 hdr.ipv4->protocol != IPPROTO_TCP))
6215 th = tcp_hdr(first->skb);
6217 /* skip this packet since it is invalid or the socket is closing */
6221 /* sample on all syn packets or once every atr sample count */
6222 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
6225 /* reset sample count */
6226 ring->atr_count = 0;
6228 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
6231 * src and dst are inverted, think how the receiver sees them
6233 * The input is broken into two sections, a non-compressed section
6234 * containing vm_pool, vlan_id, and flow_type. The rest of the data
6235 * is XORed together and stored in the compressed dword.
6237 input.formatted.vlan_id = vlan_id;
6240 * since src port and flex bytes occupy the same word XOR them together
6241 * and write the value to source port portion of compressed dword
6243 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
6244 common.port.src ^= th->dest ^ __constant_htons(ETH_P_8021Q);
6246 common.port.src ^= th->dest ^ first->protocol;
6247 common.port.dst ^= th->source;
6249 if (first->protocol == __constant_htons(ETH_P_IP)) {
6250 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
6251 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
6253 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
6254 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
6255 hdr.ipv6->saddr.s6_addr32[1] ^
6256 hdr.ipv6->saddr.s6_addr32[2] ^
6257 hdr.ipv6->saddr.s6_addr32[3] ^
6258 hdr.ipv6->daddr.s6_addr32[0] ^
6259 hdr.ipv6->daddr.s6_addr32[1] ^
6260 hdr.ipv6->daddr.s6_addr32[2] ^
6261 hdr.ipv6->daddr.s6_addr32[3];
6264 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
6265 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
6266 input, common, ring->queue_index);
6269 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6271 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
6272 /* Herbert's original patch had:
6273 * smp_mb__after_netif_stop_queue();
6274 * but since that doesn't exist yet, just open code it. */
6277 /* We need to check again in a case another CPU has just
6278 * made room available. */
6279 if (likely(ixgbe_desc_unused(tx_ring) < size))
6282 /* A reprieve! - use start_queue because it doesn't call schedule */
6283 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
6284 ++tx_ring->tx_stats.restart_queue;
6288 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6290 if (likely(ixgbe_desc_unused(tx_ring) >= size))
6292 return __ixgbe_maybe_stop_tx(tx_ring, size);
6295 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb)
6297 struct ixgbe_adapter *adapter = netdev_priv(dev);
6298 int txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
6301 __be16 protocol = vlan_get_protocol(skb);
6303 if (((protocol == htons(ETH_P_FCOE)) ||
6304 (protocol == htons(ETH_P_FIP))) &&
6305 (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)) {
6306 struct ixgbe_ring_feature *f;
6308 f = &adapter->ring_feature[RING_F_FCOE];
6310 while (txq >= f->indices)
6312 txq += adapter->ring_feature[RING_F_FCOE].offset;
6318 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
6319 while (unlikely(txq >= dev->real_num_tx_queues))
6320 txq -= dev->real_num_tx_queues;
6324 return skb_tx_hash(dev, skb);
6327 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
6328 struct ixgbe_adapter *adapter,
6329 struct ixgbe_ring *tx_ring)
6331 struct ixgbe_tx_buffer *first;
6334 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6337 u16 count = TXD_USE_COUNT(skb_headlen(skb));
6338 __be16 protocol = skb->protocol;
6342 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
6343 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
6344 * + 2 desc gap to keep tail from touching head,
6345 * + 1 desc for context descriptor,
6346 * otherwise try next time
6348 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6349 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
6350 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
6352 count += skb_shinfo(skb)->nr_frags;
6354 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
6355 tx_ring->tx_stats.tx_busy++;
6356 return NETDEV_TX_BUSY;
6359 /* record the location of the first descriptor for this packet */
6360 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6362 first->bytecount = skb->len;
6363 first->gso_segs = 1;
6365 /* if we have a HW VLAN tag being added default to the HW one */
6366 if (vlan_tx_tag_present(skb)) {
6367 tx_flags |= vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
6368 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
6369 /* else if it is a SW VLAN check the next protocol and store the tag */
6370 } else if (protocol == __constant_htons(ETH_P_8021Q)) {
6371 struct vlan_hdr *vhdr, _vhdr;
6372 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
6376 protocol = vhdr->h_vlan_encapsulated_proto;
6377 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
6378 IXGBE_TX_FLAGS_VLAN_SHIFT;
6379 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
6382 skb_tx_timestamp(skb);
6384 #ifdef CONFIG_IXGBE_PTP
6385 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
6386 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
6387 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
6391 #ifdef CONFIG_PCI_IOV
6393 * Use the l2switch_enable flag - would be false if the DMA
6394 * Tx switch had been disabled.
6396 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6397 tx_flags |= IXGBE_TX_FLAGS_TXSW;
6400 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
6401 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
6402 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
6403 (skb->priority != TC_PRIO_CONTROL))) {
6404 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
6405 tx_flags |= (skb->priority & 0x7) <<
6406 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
6407 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
6408 struct vlan_ethhdr *vhdr;
6409 if (skb_header_cloned(skb) &&
6410 pskb_expand_head(skb, 0, 0, GFP_ATOMIC))
6412 vhdr = (struct vlan_ethhdr *)skb->data;
6413 vhdr->h_vlan_TCI = htons(tx_flags >>
6414 IXGBE_TX_FLAGS_VLAN_SHIFT);
6416 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
6420 /* record initial flags and protocol */
6421 first->tx_flags = tx_flags;
6422 first->protocol = protocol;
6425 /* setup tx offload for FCoE */
6426 if ((protocol == __constant_htons(ETH_P_FCOE)) &&
6427 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
6428 tso = ixgbe_fso(tx_ring, first, &hdr_len);
6435 #endif /* IXGBE_FCOE */
6436 tso = ixgbe_tso(tx_ring, first, &hdr_len);
6440 ixgbe_tx_csum(tx_ring, first);
6442 /* add the ATR filter if ATR is on */
6443 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
6444 ixgbe_atr(tx_ring, first);
6448 #endif /* IXGBE_FCOE */
6449 ixgbe_tx_map(tx_ring, first, hdr_len);
6451 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
6453 return NETDEV_TX_OK;
6456 dev_kfree_skb_any(first->skb);
6459 return NETDEV_TX_OK;
6462 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
6463 struct net_device *netdev)
6465 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6466 struct ixgbe_ring *tx_ring;
6469 * The minimum packet size for olinfo paylen is 17 so pad the skb
6470 * in order to meet this minimum size requirement.
6472 if (unlikely(skb->len < 17)) {
6473 if (skb_pad(skb, 17 - skb->len))
6474 return NETDEV_TX_OK;
6478 tx_ring = adapter->tx_ring[skb->queue_mapping];
6479 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
6483 * ixgbe_set_mac - Change the Ethernet Address of the NIC
6484 * @netdev: network interface device structure
6485 * @p: pointer to an address structure
6487 * Returns 0 on success, negative on failure
6489 static int ixgbe_set_mac(struct net_device *netdev, void *p)
6491 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6492 struct ixgbe_hw *hw = &adapter->hw;
6493 struct sockaddr *addr = p;
6495 if (!is_valid_ether_addr(addr->sa_data))
6496 return -EADDRNOTAVAIL;
6498 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
6499 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
6501 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, VMDQ_P(0), IXGBE_RAH_AV);
6507 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
6509 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6510 struct ixgbe_hw *hw = &adapter->hw;
6514 if (prtad != hw->phy.mdio.prtad)
6516 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
6522 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
6523 u16 addr, u16 value)
6525 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6526 struct ixgbe_hw *hw = &adapter->hw;
6528 if (prtad != hw->phy.mdio.prtad)
6530 return hw->phy.ops.write_reg(hw, addr, devad, value);
6533 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
6535 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6538 #ifdef CONFIG_IXGBE_PTP
6540 return ixgbe_ptp_hwtstamp_ioctl(adapter, req, cmd);
6543 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
6548 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
6550 * @netdev: network interface device structure
6552 * Returns non-zero on failure
6554 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
6557 struct ixgbe_adapter *adapter = netdev_priv(dev);
6558 struct ixgbe_hw *hw = &adapter->hw;
6560 if (is_valid_ether_addr(hw->mac.san_addr)) {
6562 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
6565 /* update SAN MAC vmdq pool selection */
6566 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
6572 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
6574 * @netdev: network interface device structure
6576 * Returns non-zero on failure
6578 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
6581 struct ixgbe_adapter *adapter = netdev_priv(dev);
6582 struct ixgbe_mac_info *mac = &adapter->hw.mac;
6584 if (is_valid_ether_addr(mac->san_addr)) {
6586 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
6592 #ifdef CONFIG_NET_POLL_CONTROLLER
6594 * Polling 'interrupt' - used by things like netconsole to send skbs
6595 * without having to re-enable interrupts. It's not called while
6596 * the interrupt routine is executing.
6598 static void ixgbe_netpoll(struct net_device *netdev)
6600 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6603 /* if interface is down do nothing */
6604 if (test_bit(__IXGBE_DOWN, &adapter->state))
6607 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
6608 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
6609 for (i = 0; i < adapter->num_q_vectors; i++)
6610 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
6612 ixgbe_intr(adapter->pdev->irq, netdev);
6614 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
6618 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
6619 struct rtnl_link_stats64 *stats)
6621 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6625 for (i = 0; i < adapter->num_rx_queues; i++) {
6626 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
6632 start = u64_stats_fetch_begin_bh(&ring->syncp);
6633 packets = ring->stats.packets;
6634 bytes = ring->stats.bytes;
6635 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
6636 stats->rx_packets += packets;
6637 stats->rx_bytes += bytes;
6641 for (i = 0; i < adapter->num_tx_queues; i++) {
6642 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
6648 start = u64_stats_fetch_begin_bh(&ring->syncp);
6649 packets = ring->stats.packets;
6650 bytes = ring->stats.bytes;
6651 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
6652 stats->tx_packets += packets;
6653 stats->tx_bytes += bytes;
6657 /* following stats updated by ixgbe_watchdog_task() */
6658 stats->multicast = netdev->stats.multicast;
6659 stats->rx_errors = netdev->stats.rx_errors;
6660 stats->rx_length_errors = netdev->stats.rx_length_errors;
6661 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
6662 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
6666 #ifdef CONFIG_IXGBE_DCB
6668 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
6669 * @adapter: pointer to ixgbe_adapter
6670 * @tc: number of traffic classes currently enabled
6672 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
6673 * 802.1Q priority maps to a packet buffer that exists.
6675 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
6677 struct ixgbe_hw *hw = &adapter->hw;
6681 /* 82598 have a static priority to TC mapping that can not
6682 * be changed so no validation is needed.
6684 if (hw->mac.type == ixgbe_mac_82598EB)
6687 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
6690 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
6691 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
6693 /* If up2tc is out of bounds default to zero */
6695 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
6699 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
6705 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
6706 * @adapter: Pointer to adapter struct
6708 * Populate the netdev user priority to tc map
6710 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
6712 struct net_device *dev = adapter->netdev;
6713 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
6714 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
6717 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
6720 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
6721 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
6723 tc = ets->prio_tc[prio];
6725 netdev_set_prio_tc_map(dev, prio, tc);
6730 * ixgbe_setup_tc - configure net_device for multiple traffic classes
6732 * @netdev: net device to configure
6733 * @tc: number of traffic classes to enable
6735 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
6737 struct ixgbe_adapter *adapter = netdev_priv(dev);
6738 struct ixgbe_hw *hw = &adapter->hw;
6740 /* Hardware supports up to 8 traffic classes */
6741 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs ||
6742 (hw->mac.type == ixgbe_mac_82598EB &&
6743 tc < MAX_TRAFFIC_CLASS))
6746 /* Hardware has to reinitialize queues and interrupts to
6747 * match packet buffer alignment. Unfortunately, the
6748 * hardware is not flexible enough to do this dynamically.
6750 if (netif_running(dev))
6752 ixgbe_clear_interrupt_scheme(adapter);
6755 netdev_set_num_tc(dev, tc);
6756 ixgbe_set_prio_tc_map(adapter);
6758 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
6760 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
6761 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
6762 adapter->hw.fc.requested_mode = ixgbe_fc_none;
6765 netdev_reset_tc(dev);
6767 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
6768 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
6770 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6772 adapter->temp_dcb_cfg.pfc_mode_enable = false;
6773 adapter->dcb_cfg.pfc_mode_enable = false;
6776 ixgbe_init_interrupt_scheme(adapter);
6777 ixgbe_validate_rtr(adapter, tc);
6778 if (netif_running(dev))
6784 #endif /* CONFIG_IXGBE_DCB */
6785 void ixgbe_do_reset(struct net_device *netdev)
6787 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6789 if (netif_running(netdev))
6790 ixgbe_reinit_locked(adapter);
6792 ixgbe_reset(adapter);
6795 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
6796 netdev_features_t features)
6798 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6800 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
6801 if (!(features & NETIF_F_RXCSUM))
6802 features &= ~NETIF_F_LRO;
6804 /* Turn off LRO if not RSC capable */
6805 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
6806 features &= ~NETIF_F_LRO;
6811 static int ixgbe_set_features(struct net_device *netdev,
6812 netdev_features_t features)
6814 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6815 netdev_features_t changed = netdev->features ^ features;
6816 bool need_reset = false;
6818 /* Make sure RSC matches LRO, reset if change */
6819 if (!(features & NETIF_F_LRO)) {
6820 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
6822 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
6823 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
6824 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
6825 if (adapter->rx_itr_setting == 1 ||
6826 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
6827 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
6829 } else if ((changed ^ features) & NETIF_F_LRO) {
6830 e_info(probe, "rx-usecs set too low, "
6836 * Check if Flow Director n-tuple support was enabled or disabled. If
6837 * the state changed, we need to reset.
6839 switch (features & NETIF_F_NTUPLE) {
6840 case NETIF_F_NTUPLE:
6841 /* turn off ATR, enable perfect filters and reset */
6842 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
6845 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
6846 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
6849 /* turn off perfect filters, enable ATR and reset */
6850 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
6853 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
6855 /* We cannot enable ATR if SR-IOV is enabled */
6856 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6859 /* We cannot enable ATR if we have 2 or more traffic classes */
6860 if (netdev_get_num_tc(netdev) > 1)
6863 /* We cannot enable ATR if RSS is disabled */
6864 if (adapter->ring_feature[RING_F_RSS].limit <= 1)
6867 /* A sample rate of 0 indicates ATR disabled */
6868 if (!adapter->atr_sample_rate)
6871 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
6875 if (features & NETIF_F_HW_VLAN_RX)
6876 ixgbe_vlan_strip_enable(adapter);
6878 ixgbe_vlan_strip_disable(adapter);
6880 if (changed & NETIF_F_RXALL)
6883 netdev->features = features;
6885 ixgbe_do_reset(netdev);
6890 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm,
6891 struct net_device *dev,
6892 unsigned char *addr,
6895 struct ixgbe_adapter *adapter = netdev_priv(dev);
6898 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
6901 if (ndm->ndm_state & NUD_PERMANENT) {
6902 pr_info("%s: FDB only supports static addresses\n",
6907 if (is_unicast_ether_addr(addr)) {
6908 u32 rar_uc_entries = IXGBE_MAX_PF_MACVLANS;
6910 if (netdev_uc_count(dev) < rar_uc_entries)
6911 err = dev_uc_add_excl(dev, addr);
6914 } else if (is_multicast_ether_addr(addr)) {
6915 err = dev_mc_add_excl(dev, addr);
6920 /* Only return duplicate errors if NLM_F_EXCL is set */
6921 if (err == -EEXIST && !(flags & NLM_F_EXCL))
6927 static int ixgbe_ndo_fdb_del(struct ndmsg *ndm,
6928 struct net_device *dev,
6929 unsigned char *addr)
6931 struct ixgbe_adapter *adapter = netdev_priv(dev);
6932 int err = -EOPNOTSUPP;
6934 if (ndm->ndm_state & NUD_PERMANENT) {
6935 pr_info("%s: FDB only supports static addresses\n",
6940 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
6941 if (is_unicast_ether_addr(addr))
6942 err = dev_uc_del(dev, addr);
6943 else if (is_multicast_ether_addr(addr))
6944 err = dev_mc_del(dev, addr);
6952 static int ixgbe_ndo_fdb_dump(struct sk_buff *skb,
6953 struct netlink_callback *cb,
6954 struct net_device *dev,
6957 struct ixgbe_adapter *adapter = netdev_priv(dev);
6959 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6960 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
6965 static const struct net_device_ops ixgbe_netdev_ops = {
6966 .ndo_open = ixgbe_open,
6967 .ndo_stop = ixgbe_close,
6968 .ndo_start_xmit = ixgbe_xmit_frame,
6969 .ndo_select_queue = ixgbe_select_queue,
6970 .ndo_set_rx_mode = ixgbe_set_rx_mode,
6971 .ndo_validate_addr = eth_validate_addr,
6972 .ndo_set_mac_address = ixgbe_set_mac,
6973 .ndo_change_mtu = ixgbe_change_mtu,
6974 .ndo_tx_timeout = ixgbe_tx_timeout,
6975 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
6976 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
6977 .ndo_do_ioctl = ixgbe_ioctl,
6978 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
6979 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
6980 .ndo_set_vf_tx_rate = ixgbe_ndo_set_vf_bw,
6981 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
6982 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
6983 .ndo_get_stats64 = ixgbe_get_stats64,
6984 #ifdef CONFIG_IXGBE_DCB
6985 .ndo_setup_tc = ixgbe_setup_tc,
6987 #ifdef CONFIG_NET_POLL_CONTROLLER
6988 .ndo_poll_controller = ixgbe_netpoll,
6991 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
6992 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
6993 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
6994 .ndo_fcoe_enable = ixgbe_fcoe_enable,
6995 .ndo_fcoe_disable = ixgbe_fcoe_disable,
6996 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
6997 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
6998 #endif /* IXGBE_FCOE */
6999 .ndo_set_features = ixgbe_set_features,
7000 .ndo_fix_features = ixgbe_fix_features,
7001 .ndo_fdb_add = ixgbe_ndo_fdb_add,
7002 .ndo_fdb_del = ixgbe_ndo_fdb_del,
7003 .ndo_fdb_dump = ixgbe_ndo_fdb_dump,
7007 * ixgbe_wol_supported - Check whether device supports WoL
7008 * @hw: hw specific details
7009 * @device_id: the device ID
7010 * @subdev_id: the subsystem device ID
7012 * This function is used by probe and ethtool to determine
7013 * which devices have WoL support
7016 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
7019 struct ixgbe_hw *hw = &adapter->hw;
7020 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
7021 int is_wol_supported = 0;
7023 switch (device_id) {
7024 case IXGBE_DEV_ID_82599_SFP:
7025 /* Only these subdevices could supports WOL */
7026 switch (subdevice_id) {
7027 case IXGBE_SUBDEV_ID_82599_560FLR:
7028 /* only support first port */
7029 if (hw->bus.func != 0)
7031 case IXGBE_SUBDEV_ID_82599_SFP:
7032 case IXGBE_SUBDEV_ID_82599_RNDC:
7033 is_wol_supported = 1;
7037 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
7038 /* All except this subdevice support WOL */
7039 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
7040 is_wol_supported = 1;
7042 case IXGBE_DEV_ID_82599_KX4:
7043 is_wol_supported = 1;
7045 case IXGBE_DEV_ID_X540T:
7046 /* check eeprom to see if enabled wol */
7047 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
7048 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
7049 (hw->bus.func == 0))) {
7050 is_wol_supported = 1;
7055 return is_wol_supported;
7059 * ixgbe_probe - Device Initialization Routine
7060 * @pdev: PCI device information struct
7061 * @ent: entry in ixgbe_pci_tbl
7063 * Returns 0 on success, negative on failure
7065 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
7066 * The OS initialization, configuring of the adapter private structure,
7067 * and a hardware reset occur.
7069 static int __devinit ixgbe_probe(struct pci_dev *pdev,
7070 const struct pci_device_id *ent)
7072 struct net_device *netdev;
7073 struct ixgbe_adapter *adapter = NULL;
7074 struct ixgbe_hw *hw;
7075 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
7076 static int cards_found;
7077 int i, err, pci_using_dac;
7078 u8 part_str[IXGBE_PBANUM_LENGTH];
7079 unsigned int indices = num_possible_cpus();
7080 unsigned int dcb_max = 0;
7086 /* Catch broken hardware that put the wrong VF device ID in
7087 * the PCIe SR-IOV capability.
7089 if (pdev->is_virtfn) {
7090 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
7091 pci_name(pdev), pdev->vendor, pdev->device);
7095 err = pci_enable_device_mem(pdev);
7099 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
7100 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
7103 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
7105 err = dma_set_coherent_mask(&pdev->dev,
7109 "No usable DMA configuration, aborting\n");
7116 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
7117 IORESOURCE_MEM), ixgbe_driver_name);
7120 "pci_request_selected_regions failed 0x%x\n", err);
7124 pci_enable_pcie_error_reporting(pdev);
7126 pci_set_master(pdev);
7127 pci_save_state(pdev);
7129 #ifdef CONFIG_IXGBE_DCB
7130 if (ii->mac == ixgbe_mac_82598EB)
7131 dcb_max = min_t(unsigned int, indices * MAX_TRAFFIC_CLASS,
7132 IXGBE_MAX_RSS_INDICES);
7134 dcb_max = min_t(unsigned int, indices * MAX_TRAFFIC_CLASS,
7135 IXGBE_MAX_FDIR_INDICES);
7138 if (ii->mac == ixgbe_mac_82598EB)
7139 indices = min_t(unsigned int, indices, IXGBE_MAX_RSS_INDICES);
7141 indices = min_t(unsigned int, indices, IXGBE_MAX_FDIR_INDICES);
7144 indices += min_t(unsigned int, num_possible_cpus(),
7145 IXGBE_MAX_FCOE_INDICES);
7147 indices = max_t(unsigned int, dcb_max, indices);
7148 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
7151 goto err_alloc_etherdev;
7154 SET_NETDEV_DEV(netdev, &pdev->dev);
7156 adapter = netdev_priv(netdev);
7157 pci_set_drvdata(pdev, adapter);
7159 adapter->netdev = netdev;
7160 adapter->pdev = pdev;
7163 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7165 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
7166 pci_resource_len(pdev, 0));
7172 for (i = 1; i <= 5; i++) {
7173 if (pci_resource_len(pdev, i) == 0)
7177 netdev->netdev_ops = &ixgbe_netdev_ops;
7178 ixgbe_set_ethtool_ops(netdev);
7179 netdev->watchdog_timeo = 5 * HZ;
7180 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
7182 adapter->bd_number = cards_found;
7185 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
7186 hw->mac.type = ii->mac;
7189 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
7190 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
7191 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
7192 if (!(eec & (1 << 8)))
7193 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
7196 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
7197 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
7198 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
7199 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
7200 hw->phy.mdio.mmds = 0;
7201 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
7202 hw->phy.mdio.dev = netdev;
7203 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
7204 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
7206 ii->get_invariants(hw);
7208 /* setup the private structure */
7209 err = ixgbe_sw_init(adapter);
7213 /* Make it possible the adapter to be woken up via WOL */
7214 switch (adapter->hw.mac.type) {
7215 case ixgbe_mac_82599EB:
7216 case ixgbe_mac_X540:
7217 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
7224 * If there is a fan on this device and it has failed log the
7227 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
7228 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
7229 if (esdp & IXGBE_ESDP_SDP1)
7230 e_crit(probe, "Fan has stopped, replace the adapter\n");
7233 if (allow_unsupported_sfp)
7234 hw->allow_unsupported_sfp = allow_unsupported_sfp;
7236 /* reset_hw fills in the perm_addr as well */
7237 hw->phy.reset_if_overtemp = true;
7238 err = hw->mac.ops.reset_hw(hw);
7239 hw->phy.reset_if_overtemp = false;
7240 if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
7241 hw->mac.type == ixgbe_mac_82598EB) {
7243 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
7244 e_dev_err("failed to load because an unsupported SFP+ "
7245 "module type was detected.\n");
7246 e_dev_err("Reload the driver after installing a supported "
7250 e_dev_err("HW Init failed: %d\n", err);
7254 #ifdef CONFIG_PCI_IOV
7255 ixgbe_enable_sriov(adapter, ii);
7258 netdev->features = NETIF_F_SG |
7261 NETIF_F_HW_VLAN_TX |
7262 NETIF_F_HW_VLAN_RX |
7263 NETIF_F_HW_VLAN_FILTER |
7269 netdev->hw_features = netdev->features;
7271 switch (adapter->hw.mac.type) {
7272 case ixgbe_mac_82599EB:
7273 case ixgbe_mac_X540:
7274 netdev->features |= NETIF_F_SCTP_CSUM;
7275 netdev->hw_features |= NETIF_F_SCTP_CSUM |
7282 netdev->hw_features |= NETIF_F_RXALL;
7284 netdev->vlan_features |= NETIF_F_TSO;
7285 netdev->vlan_features |= NETIF_F_TSO6;
7286 netdev->vlan_features |= NETIF_F_IP_CSUM;
7287 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
7288 netdev->vlan_features |= NETIF_F_SG;
7290 netdev->priv_flags |= IFF_UNICAST_FLT;
7291 netdev->priv_flags |= IFF_SUPP_NOFCS;
7293 #ifdef CONFIG_IXGBE_DCB
7294 netdev->dcbnl_ops = &dcbnl_ops;
7298 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
7299 if (hw->mac.ops.get_device_caps) {
7300 hw->mac.ops.get_device_caps(hw, &device_caps);
7301 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
7302 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
7305 adapter->ring_feature[RING_F_FCOE].limit = IXGBE_FCRETA_SIZE;
7307 netdev->features |= NETIF_F_FSO |
7310 netdev->vlan_features |= NETIF_F_FSO |
7314 #endif /* IXGBE_FCOE */
7315 if (pci_using_dac) {
7316 netdev->features |= NETIF_F_HIGHDMA;
7317 netdev->vlan_features |= NETIF_F_HIGHDMA;
7320 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
7321 netdev->hw_features |= NETIF_F_LRO;
7322 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
7323 netdev->features |= NETIF_F_LRO;
7325 /* make sure the EEPROM is good */
7326 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
7327 e_dev_err("The EEPROM Checksum Is Not Valid\n");
7332 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
7333 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
7335 if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
7336 e_dev_err("invalid MAC address\n");
7341 setup_timer(&adapter->service_timer, &ixgbe_service_timer,
7342 (unsigned long) adapter);
7344 INIT_WORK(&adapter->service_task, ixgbe_service_task);
7345 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
7347 err = ixgbe_init_interrupt_scheme(adapter);
7351 /* WOL not supported for all devices */
7353 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
7354 if (ixgbe_wol_supported(adapter, pdev->device, pdev->subsystem_device))
7355 adapter->wol = IXGBE_WUFC_MAG;
7357 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
7359 #ifdef CONFIG_IXGBE_PTP
7360 ixgbe_ptp_init(adapter);
7361 #endif /* CONFIG_IXGBE_PTP*/
7363 /* save off EEPROM version number */
7364 hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
7365 hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
7367 /* pick up the PCI bus settings for reporting later */
7368 hw->mac.ops.get_bus_info(hw);
7370 /* print bus type/speed/width info */
7371 e_dev_info("(PCI Express:%s:%s) %pM\n",
7372 (hw->bus.speed == ixgbe_bus_speed_5000 ? "5.0GT/s" :
7373 hw->bus.speed == ixgbe_bus_speed_2500 ? "2.5GT/s" :
7375 (hw->bus.width == ixgbe_bus_width_pcie_x8 ? "Width x8" :
7376 hw->bus.width == ixgbe_bus_width_pcie_x4 ? "Width x4" :
7377 hw->bus.width == ixgbe_bus_width_pcie_x1 ? "Width x1" :
7381 err = ixgbe_read_pba_string_generic(hw, part_str, IXGBE_PBANUM_LENGTH);
7383 strncpy(part_str, "Unknown", IXGBE_PBANUM_LENGTH);
7384 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
7385 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
7386 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
7389 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
7390 hw->mac.type, hw->phy.type, part_str);
7392 if (hw->bus.width <= ixgbe_bus_width_pcie_x4) {
7393 e_dev_warn("PCI-Express bandwidth available for this card is "
7394 "not sufficient for optimal performance.\n");
7395 e_dev_warn("For optimal performance a x8 PCI-Express slot "
7399 /* reset the hardware with the new settings */
7400 err = hw->mac.ops.start_hw(hw);
7401 if (err == IXGBE_ERR_EEPROM_VERSION) {
7402 /* We are running on a pre-production device, log a warning */
7403 e_dev_warn("This device is a pre-production adapter/LOM. "
7404 "Please be aware there may be issues associated "
7405 "with your hardware. If you are experiencing "
7406 "problems please contact your Intel or hardware "
7407 "representative who provided you with this "
7410 strcpy(netdev->name, "eth%d");
7411 err = register_netdev(netdev);
7415 /* power down the optics for multispeed fiber and 82599 SFP+ fiber */
7416 if (hw->mac.ops.disable_tx_laser &&
7417 ((hw->phy.multispeed_fiber) ||
7418 ((hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) &&
7419 (hw->mac.type == ixgbe_mac_82599EB))))
7420 hw->mac.ops.disable_tx_laser(hw);
7422 /* carrier off reporting is important to ethtool even BEFORE open */
7423 netif_carrier_off(netdev);
7425 #ifdef CONFIG_IXGBE_DCA
7426 if (dca_add_requester(&pdev->dev) == 0) {
7427 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
7428 ixgbe_setup_dca(adapter);
7431 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
7432 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
7433 for (i = 0; i < adapter->num_vfs; i++)
7434 ixgbe_vf_configuration(pdev, (i | 0x10000000));
7437 /* firmware requires driver version to be 0xFFFFFFFF
7438 * since os does not support feature
7440 if (hw->mac.ops.set_fw_drv_ver)
7441 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
7444 /* add san mac addr to netdev */
7445 ixgbe_add_sanmac_netdev(netdev);
7447 e_dev_info("%s\n", ixgbe_default_device_descr);
7450 #ifdef CONFIG_IXGBE_HWMON
7451 if (ixgbe_sysfs_init(adapter))
7452 e_err(probe, "failed to allocate sysfs resources\n");
7453 #endif /* CONFIG_IXGBE_HWMON */
7458 ixgbe_release_hw_control(adapter);
7459 ixgbe_clear_interrupt_scheme(adapter);
7461 ixgbe_disable_sriov(adapter);
7462 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7463 iounmap(hw->hw_addr);
7465 free_netdev(netdev);
7467 pci_release_selected_regions(pdev,
7468 pci_select_bars(pdev, IORESOURCE_MEM));
7471 pci_disable_device(pdev);
7476 * ixgbe_remove - Device Removal Routine
7477 * @pdev: PCI device information struct
7479 * ixgbe_remove is called by the PCI subsystem to alert the driver
7480 * that it should release a PCI device. The could be caused by a
7481 * Hot-Plug event, or because the driver is going to be removed from
7484 static void __devexit ixgbe_remove(struct pci_dev *pdev)
7486 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7487 struct net_device *netdev = adapter->netdev;
7489 set_bit(__IXGBE_DOWN, &adapter->state);
7490 cancel_work_sync(&adapter->service_task);
7492 #ifdef CONFIG_IXGBE_PTP
7493 ixgbe_ptp_stop(adapter);
7496 #ifdef CONFIG_IXGBE_DCA
7497 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
7498 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
7499 dca_remove_requester(&pdev->dev);
7500 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
7504 #ifdef CONFIG_IXGBE_HWMON
7505 ixgbe_sysfs_exit(adapter);
7506 #endif /* CONFIG_IXGBE_HWMON */
7508 /* remove the added san mac */
7509 ixgbe_del_sanmac_netdev(netdev);
7511 if (netdev->reg_state == NETREG_REGISTERED)
7512 unregister_netdev(netdev);
7514 ixgbe_disable_sriov(adapter);
7516 ixgbe_clear_interrupt_scheme(adapter);
7518 ixgbe_release_hw_control(adapter);
7521 kfree(adapter->ixgbe_ieee_pfc);
7522 kfree(adapter->ixgbe_ieee_ets);
7525 iounmap(adapter->hw.hw_addr);
7526 pci_release_selected_regions(pdev, pci_select_bars(pdev,
7529 e_dev_info("complete\n");
7531 free_netdev(netdev);
7533 pci_disable_pcie_error_reporting(pdev);
7535 pci_disable_device(pdev);
7539 * ixgbe_io_error_detected - called when PCI error is detected
7540 * @pdev: Pointer to PCI device
7541 * @state: The current pci connection state
7543 * This function is called after a PCI bus error affecting
7544 * this device has been detected.
7546 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
7547 pci_channel_state_t state)
7549 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7550 struct net_device *netdev = adapter->netdev;
7552 #ifdef CONFIG_PCI_IOV
7553 struct pci_dev *bdev, *vfdev;
7554 u32 dw0, dw1, dw2, dw3;
7556 u16 req_id, pf_func;
7558 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7559 adapter->num_vfs == 0)
7560 goto skip_bad_vf_detection;
7562 bdev = pdev->bus->self;
7563 while (bdev && (bdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT))
7564 bdev = bdev->bus->self;
7567 goto skip_bad_vf_detection;
7569 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
7571 goto skip_bad_vf_detection;
7573 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
7574 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
7575 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
7576 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
7579 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
7580 if (!(req_id & 0x0080))
7581 goto skip_bad_vf_detection;
7583 pf_func = req_id & 0x01;
7584 if ((pf_func & 1) == (pdev->devfn & 1)) {
7585 unsigned int device_id;
7587 vf = (req_id & 0x7F) >> 1;
7588 e_dev_err("VF %d has caused a PCIe error\n", vf);
7589 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
7590 "%8.8x\tdw3: %8.8x\n",
7591 dw0, dw1, dw2, dw3);
7592 switch (adapter->hw.mac.type) {
7593 case ixgbe_mac_82599EB:
7594 device_id = IXGBE_82599_VF_DEVICE_ID;
7596 case ixgbe_mac_X540:
7597 device_id = IXGBE_X540_VF_DEVICE_ID;
7604 /* Find the pci device of the offending VF */
7605 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
7607 if (vfdev->devfn == (req_id & 0xFF))
7609 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
7613 * There's a slim chance the VF could have been hot plugged,
7614 * so if it is no longer present we don't need to issue the
7615 * VFLR. Just clean up the AER in that case.
7618 e_dev_err("Issuing VFLR to VF %d\n", vf);
7619 pci_write_config_dword(vfdev, 0xA8, 0x00008000);
7622 pci_cleanup_aer_uncorrect_error_status(pdev);
7626 * Even though the error may have occurred on the other port
7627 * we still need to increment the vf error reference count for
7628 * both ports because the I/O resume function will be called
7631 adapter->vferr_refcount++;
7633 return PCI_ERS_RESULT_RECOVERED;
7635 skip_bad_vf_detection:
7636 #endif /* CONFIG_PCI_IOV */
7637 netif_device_detach(netdev);
7639 if (state == pci_channel_io_perm_failure)
7640 return PCI_ERS_RESULT_DISCONNECT;
7642 if (netif_running(netdev))
7643 ixgbe_down(adapter);
7644 pci_disable_device(pdev);
7646 /* Request a slot reset. */
7647 return PCI_ERS_RESULT_NEED_RESET;
7651 * ixgbe_io_slot_reset - called after the pci bus has been reset.
7652 * @pdev: Pointer to PCI device
7654 * Restart the card from scratch, as if from a cold-boot.
7656 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
7658 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7659 pci_ers_result_t result;
7662 if (pci_enable_device_mem(pdev)) {
7663 e_err(probe, "Cannot re-enable PCI device after reset.\n");
7664 result = PCI_ERS_RESULT_DISCONNECT;
7666 pci_set_master(pdev);
7667 pci_restore_state(pdev);
7668 pci_save_state(pdev);
7670 pci_wake_from_d3(pdev, false);
7672 ixgbe_reset(adapter);
7673 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
7674 result = PCI_ERS_RESULT_RECOVERED;
7677 err = pci_cleanup_aer_uncorrect_error_status(pdev);
7679 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
7680 "failed 0x%0x\n", err);
7681 /* non-fatal, continue */
7688 * ixgbe_io_resume - called when traffic can start flowing again.
7689 * @pdev: Pointer to PCI device
7691 * This callback is called when the error recovery driver tells us that
7692 * its OK to resume normal operation.
7694 static void ixgbe_io_resume(struct pci_dev *pdev)
7696 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7697 struct net_device *netdev = adapter->netdev;
7699 #ifdef CONFIG_PCI_IOV
7700 if (adapter->vferr_refcount) {
7701 e_info(drv, "Resuming after VF err\n");
7702 adapter->vferr_refcount--;
7707 if (netif_running(netdev))
7710 netif_device_attach(netdev);
7713 static struct pci_error_handlers ixgbe_err_handler = {
7714 .error_detected = ixgbe_io_error_detected,
7715 .slot_reset = ixgbe_io_slot_reset,
7716 .resume = ixgbe_io_resume,
7719 static struct pci_driver ixgbe_driver = {
7720 .name = ixgbe_driver_name,
7721 .id_table = ixgbe_pci_tbl,
7722 .probe = ixgbe_probe,
7723 .remove = __devexit_p(ixgbe_remove),
7725 .suspend = ixgbe_suspend,
7726 .resume = ixgbe_resume,
7728 .shutdown = ixgbe_shutdown,
7729 .err_handler = &ixgbe_err_handler
7733 * ixgbe_init_module - Driver Registration Routine
7735 * ixgbe_init_module is the first routine called when the driver is
7736 * loaded. All it does is register with the PCI subsystem.
7738 static int __init ixgbe_init_module(void)
7741 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
7742 pr_info("%s\n", ixgbe_copyright);
7744 #ifdef CONFIG_IXGBE_DCA
7745 dca_register_notify(&dca_notifier);
7748 ret = pci_register_driver(&ixgbe_driver);
7752 module_init(ixgbe_init_module);
7755 * ixgbe_exit_module - Driver Exit Cleanup Routine
7757 * ixgbe_exit_module is called just before the driver is removed
7760 static void __exit ixgbe_exit_module(void)
7762 #ifdef CONFIG_IXGBE_DCA
7763 dca_unregister_notify(&dca_notifier);
7765 pci_unregister_driver(&ixgbe_driver);
7766 rcu_barrier(); /* Wait for completion of call_rcu()'s */
7769 #ifdef CONFIG_IXGBE_DCA
7770 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
7775 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
7776 __ixgbe_notify_dca);
7778 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
7781 #endif /* CONFIG_IXGBE_DCA */
7783 module_exit(ixgbe_exit_module);