drivers/net/ethernet/mellanox/mlx5/core/cmd.c

   1 /*
   2  * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <asm-generic/kmap_types.h>
  34 #include <linux/module.h>
  35 #include <linux/errno.h>
  36 #include <linux/pci.h>
  37 #include <linux/dma-mapping.h>
  38 #include <linux/slab.h>
  39 #include <linux/delay.h>
  40 #include <linux/random.h>
  41 #include <linux/io-mapping.h>
  42 #include <linux/mlx5/driver.h>
  43 #include <linux/debugfs.h>
  44
  45 #include "mlx5_core.h"
  46
  47 enum {
  48         CMD_IF_REV = 5,
  49 };
  50
  51 enum {
  52         CMD_MODE_POLLING,
  53         CMD_MODE_EVENTS
  54 };
  55
  56 enum {
  57         NUM_LONG_LISTS    = 2,
  58         NUM_MED_LISTS     = 64,
  59         LONG_LIST_SIZE    = (2ULL * 1024 * 1024 * 1024 / PAGE_SIZE) * 8 + 16 +
  60                                 MLX5_CMD_DATA_BLOCK_SIZE,
  61         MED_LIST_SIZE     = 16 + MLX5_CMD_DATA_BLOCK_SIZE,
  62 };
  63
  64 enum {
  65         MLX5_CMD_DELIVERY_STAT_OK                       = 0x0,
  66         MLX5_CMD_DELIVERY_STAT_SIGNAT_ERR               = 0x1,
  67         MLX5_CMD_DELIVERY_STAT_TOK_ERR                  = 0x2,
  68         MLX5_CMD_DELIVERY_STAT_BAD_BLK_NUM_ERR          = 0x3,
  69         MLX5_CMD_DELIVERY_STAT_OUT_PTR_ALIGN_ERR        = 0x4,
  70         MLX5_CMD_DELIVERY_STAT_IN_PTR_ALIGN_ERR         = 0x5,
  71         MLX5_CMD_DELIVERY_STAT_FW_ERR                   = 0x6,
  72         MLX5_CMD_DELIVERY_STAT_IN_LENGTH_ERR            = 0x7,
  73         MLX5_CMD_DELIVERY_STAT_OUT_LENGTH_ERR           = 0x8,
  74         MLX5_CMD_DELIVERY_STAT_RES_FLD_NOT_CLR_ERR      = 0x9,
  75         MLX5_CMD_DELIVERY_STAT_CMD_DESCR_ERR            = 0x10,
  76 };
  77
  78 static struct mlx5_cmd_work_ent *alloc_cmd(struct mlx5_cmd *cmd,
  79                                            struct mlx5_cmd_msg *in,
  80                                            struct mlx5_cmd_msg *out,
  81                                            void *uout, int uout_size,
  82                                            mlx5_cmd_cbk_t cbk,
  83                                            void *context, int page_queue)
  84 {
  85         gfp_t alloc_flags = cbk ? GFP_ATOMIC : GFP_KERNEL;
  86         struct mlx5_cmd_work_ent *ent;
  87
  88         ent = kzalloc(sizeof(*ent), alloc_flags);
  89         if (!ent)
  90                 return ERR_PTR(-ENOMEM);
  91
  92         ent->in         = in;
  93         ent->out        = out;
  94         ent->uout       = uout;
  95         ent->uout_size  = uout_size;
  96         ent->callback   = cbk;
  97         ent->context    = context;
  98         ent->cmd        = cmd;
  99         ent->page_queue = page_queue;
 100
 101         return ent;
 102 }
 103
 104 static u8 alloc_token(struct mlx5_cmd *cmd)
 105 {
 106         u8 token;
 107
 108         spin_lock(&cmd->token_lock);
 109         cmd->token++;
 110         if (cmd->token == 0)
 111                 cmd->token++;
 112         token = cmd->token;
 113         spin_unlock(&cmd->token_lock);
 114
 115         return token;
 116 }
 117
 118 static int alloc_ent(struct mlx5_cmd *cmd)
 119 {
 120         unsigned long flags;
 121         int ret;
 122
 123         spin_lock_irqsave(&cmd->alloc_lock, flags);
 124         ret = find_first_bit(&cmd->bitmask, cmd->max_reg_cmds);
 125         if (ret < cmd->max_reg_cmds)
 126                 clear_bit(ret, &cmd->bitmask);
 127         spin_unlock_irqrestore(&cmd->alloc_lock, flags);
 128
 129         return ret < cmd->max_reg_cmds ? ret : -ENOMEM;
 130 }
 131
 132 static void free_ent(struct mlx5_cmd *cmd, int idx)
 133 {
 134         unsigned long flags;
 135
 136         spin_lock_irqsave(&cmd->alloc_lock, flags);
 137         set_bit(idx, &cmd->bitmask);
 138         spin_unlock_irqrestore(&cmd->alloc_lock, flags);
 139 }
 140
 141 static struct mlx5_cmd_layout *get_inst(struct mlx5_cmd *cmd, int idx)
 142 {
 143         return cmd->cmd_buf + (idx << cmd->log_stride);
 144 }
 145
 146 static u8 xor8_buf(void *buf, int len)
 147 {
 148         u8 *ptr = buf;
 149         u8 sum = 0;
 150         int i;
 151
 152         for (i = 0; i < len; i++)
 153                 sum ^= ptr[i];
 154
 155         return sum;
 156 }
 157
 158 static int verify_block_sig(struct mlx5_cmd_prot_block *block)
 159 {
 160         if (xor8_buf(block->rsvd0, sizeof(*block) - sizeof(block->data) - 1) != 0xff)
 161                 return -EINVAL;
 162
 163         if (xor8_buf(block, sizeof(*block)) != 0xff)
 164                 return -EINVAL;
 165
 166         return 0;
 167 }
 168
 169 static void calc_block_sig(struct mlx5_cmd_prot_block *block, u8 token,
 170                            int csum)
 171 {
 172         block->token = token;
 173         if (csum) {
 174                 block->ctrl_sig = ~xor8_buf(block->rsvd0, sizeof(*block) -
 175                                             sizeof(block->data) - 2);
 176                 block->sig = ~xor8_buf(block, sizeof(*block) - 1);
 177         }
 178 }
 179
 180 static void calc_chain_sig(struct mlx5_cmd_msg *msg, u8 token, int csum)
 181 {
 182         struct mlx5_cmd_mailbox *next = msg->next;
 183
 184         while (next) {
 185                 calc_block_sig(next->buf, token, csum);
 186                 next = next->next;
 187         }
 188 }
 189
 190 static void set_signature(struct mlx5_cmd_work_ent *ent, int csum)
 191 {
 192         ent->lay->sig = ~xor8_buf(ent->lay, sizeof(*ent->lay));
 193         calc_chain_sig(ent->in, ent->token, csum);
 194         calc_chain_sig(ent->out, ent->token, csum);
 195 }
 196
 197 static void poll_timeout(struct mlx5_cmd_work_ent *ent)
 198 {
 199         unsigned long poll_end = jiffies + msecs_to_jiffies(MLX5_CMD_TIMEOUT_MSEC + 1000);
 200         u8 own;
 201
 202         do {
 203                 own = ent->lay->status_own;
 204                 if (!(own & CMD_OWNER_HW)) {
 205                         ent->ret = 0;
 206                         return;
 207                 }
 208                 usleep_range(5000, 10000);
 209         } while (time_before(jiffies, poll_end));
 210
 211         ent->ret = -ETIMEDOUT;
 212 }
 213
 214 static void free_cmd(struct mlx5_cmd_work_ent *ent)
 215 {
 216         kfree(ent);
 217 }
 218
 219
 220 static int verify_signature(struct mlx5_cmd_work_ent *ent)
 221 {
 222         struct mlx5_cmd_mailbox *next = ent->out->next;
 223         int err;
 224         u8 sig;
 225
 226         sig = xor8_buf(ent->lay, sizeof(*ent->lay));
 227         if (sig != 0xff)
 228                 return -EINVAL;
 229
 230         while (next) {
 231                 err = verify_block_sig(next->buf);
 232                 if (err)
 233                         return err;
 234
 235                 next = next->next;
 236         }
 237
 238         return 0;
 239 }
 240
 241 static void dump_buf(void *buf, int size, int data_only, int offset)
 242 {
 243         __be32 *p = buf;
 244         int i;
 245
 246         for (i = 0; i < size; i += 16) {
 247                 pr_debug("%03x: %08x %08x %08x %08x\n", offset, be32_to_cpu(p[0]),
 248                          be32_to_cpu(p[1]), be32_to_cpu(p[2]),
 249                          be32_to_cpu(p[3]));
 250                 p += 4;
 251                 offset += 16;
 252         }
 253         if (!data_only)
 254                 pr_debug("\n");
 255 }
 256
 257 enum {
 258         MLX5_DRIVER_STATUS_ABORTED = 0xfe,
 259 };
 260
 261 const char *mlx5_command_str(int command)
 262 {
 263         switch (command) {
 264         case MLX5_CMD_OP_QUERY_HCA_CAP:
 265                 return "QUERY_HCA_CAP";
 266
 267         case MLX5_CMD_OP_SET_HCA_CAP:
 268                 return "SET_HCA_CAP";
 269
 270         case MLX5_CMD_OP_QUERY_ADAPTER:
 271                 return "QUERY_ADAPTER";
 272
 273         case MLX5_CMD_OP_INIT_HCA:
 274                 return "INIT_HCA";
 275
 276         case MLX5_CMD_OP_TEARDOWN_HCA:
 277                 return "TEARDOWN_HCA";
 278
 279         case MLX5_CMD_OP_ENABLE_HCA:
 280                 return "MLX5_CMD_OP_ENABLE_HCA";
 281
 282         case MLX5_CMD_OP_DISABLE_HCA:
 283                 return "MLX5_CMD_OP_DISABLE_HCA";
 284
 285         case MLX5_CMD_OP_QUERY_PAGES:
 286                 return "QUERY_PAGES";
 287
 288         case MLX5_CMD_OP_MANAGE_PAGES:
 289                 return "MANAGE_PAGES";
 290
 291         case MLX5_CMD_OP_CREATE_MKEY:
 292                 return "CREATE_MKEY";
 293
 294         case MLX5_CMD_OP_QUERY_MKEY:
 295                 return "QUERY_MKEY";
 296
 297         case MLX5_CMD_OP_DESTROY_MKEY:
 298                 return "DESTROY_MKEY";
 299
 300         case MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS:
 301                 return "QUERY_SPECIAL_CONTEXTS";
 302
 303         case MLX5_CMD_OP_CREATE_EQ:
 304                 return "CREATE_EQ";
 305
 306         case MLX5_CMD_OP_DESTROY_EQ:
 307                 return "DESTROY_EQ";
 308
 309         case MLX5_CMD_OP_QUERY_EQ:
 310                 return "QUERY_EQ";
 311
 312         case MLX5_CMD_OP_CREATE_CQ:
 313                 return "CREATE_CQ";
 314
 315         case MLX5_CMD_OP_DESTROY_CQ:
 316                 return "DESTROY_CQ";
 317
 318         case MLX5_CMD_OP_QUERY_CQ:
 319                 return "QUERY_CQ";
 320
 321         case MLX5_CMD_OP_MODIFY_CQ:
 322                 return "MODIFY_CQ";
 323
 324         case MLX5_CMD_OP_CREATE_QP:
 325                 return "CREATE_QP";
 326
 327         case MLX5_CMD_OP_DESTROY_QP:
 328                 return "DESTROY_QP";
 329
 330         case MLX5_CMD_OP_RST2INIT_QP:
 331                 return "RST2INIT_QP";
 332
 333         case MLX5_CMD_OP_INIT2RTR_QP:
 334                 return "INIT2RTR_QP";
 335
 336         case MLX5_CMD_OP_RTR2RTS_QP:
 337                 return "RTR2RTS_QP";
 338
 339         case MLX5_CMD_OP_RTS2RTS_QP:
 340                 return "RTS2RTS_QP";
 341
 342         case MLX5_CMD_OP_SQERR2RTS_QP:
 343                 return "SQERR2RTS_QP";
 344
 345         case MLX5_CMD_OP_2ERR_QP:
 346                 return "2ERR_QP";
 347
 348         case MLX5_CMD_OP_2RST_QP:
 349                 return "2RST_QP";
 350
 351         case MLX5_CMD_OP_QUERY_QP:
 352                 return "QUERY_QP";
 353
 354         case MLX5_CMD_OP_MAD_IFC:
 355                 return "MAD_IFC";
 356
 357         case MLX5_CMD_OP_INIT2INIT_QP:
 358                 return "INIT2INIT_QP";
 359
 360         case MLX5_CMD_OP_CREATE_PSV:
 361                 return "CREATE_PSV";
 362
 363         case MLX5_CMD_OP_DESTROY_PSV:
 364                 return "DESTROY_PSV";
 365
 366         case MLX5_CMD_OP_CREATE_SRQ:
 367                 return "CREATE_SRQ";
 368
 369         case MLX5_CMD_OP_DESTROY_SRQ:
 370                 return "DESTROY_SRQ";
 371
 372         case MLX5_CMD_OP_QUERY_SRQ:
 373                 return "QUERY_SRQ";
 374
 375         case MLX5_CMD_OP_ARM_RQ:
 376                 return "ARM_RQ";
 377
 378         case MLX5_CMD_OP_CREATE_XRC_SRQ:
 379                 return "CREATE_XRC_SRQ";
 380
 381         case MLX5_CMD_OP_DESTROY_XRC_SRQ:
 382                 return "DESTROY_XRC_SRQ";
 383
 384         case MLX5_CMD_OP_QUERY_XRC_SRQ:
 385                 return "QUERY_XRC_SRQ";
 386
 387         case MLX5_CMD_OP_ARM_XRC_SRQ:
 388                 return "ARM_XRC_SRQ";
 389
 390         case MLX5_CMD_OP_ALLOC_PD:
 391                 return "ALLOC_PD";
 392
 393         case MLX5_CMD_OP_DEALLOC_PD:
 394                 return "DEALLOC_PD";
 395
 396         case MLX5_CMD_OP_ALLOC_UAR:
 397                 return "ALLOC_UAR";
 398
 399         case MLX5_CMD_OP_DEALLOC_UAR:
 400                 return "DEALLOC_UAR";
 401
 402         case MLX5_CMD_OP_ATTACH_TO_MCG:
 403                 return "ATTACH_TO_MCG";
 404
 405         case MLX5_CMD_OP_DETTACH_FROM_MCG:
 406                 return "DETTACH_FROM_MCG";
 407
 408         case MLX5_CMD_OP_ALLOC_XRCD:
 409                 return "ALLOC_XRCD";
 410
 411         case MLX5_CMD_OP_DEALLOC_XRCD:
 412                 return "DEALLOC_XRCD";
 413
 414         case MLX5_CMD_OP_ACCESS_REG:
 415                 return "MLX5_CMD_OP_ACCESS_REG";
 416
 417         default: return "unknown command opcode";
 418         }
 419 }
 420
 421 static void dump_command(struct mlx5_core_dev *dev,
 422                          struct mlx5_cmd_work_ent *ent, int input)
 423 {
 424         u16 op = be16_to_cpu(((struct mlx5_inbox_hdr *)(ent->lay->in))->opcode);
 425         struct mlx5_cmd_msg *msg = input ? ent->in : ent->out;
 426         struct mlx5_cmd_mailbox *next = msg->next;
 427         int data_only;
 428         u32 offset = 0;
 429         int dump_len;
 430
 431         data_only = !!(mlx5_core_debug_mask & (1 << MLX5_CMD_DATA));
 432
 433         if (data_only)
 434                 mlx5_core_dbg_mask(dev, 1 << MLX5_CMD_DATA,
 435                                    "dump command data %s(0x%x) %s\n",
 436                                    mlx5_command_str(op), op,
 437                                    input ? "INPUT" : "OUTPUT");
 438         else
 439                 mlx5_core_dbg(dev, "dump command %s(0x%x) %s\n",
 440                               mlx5_command_str(op), op,
 441                               input ? "INPUT" : "OUTPUT");
 442
 443         if (data_only) {
 444                 if (input) {
 445                         dump_buf(ent->lay->in, sizeof(ent->lay->in), 1, offset);
 446                         offset += sizeof(ent->lay->in);
 447                 } else {
 448                         dump_buf(ent->lay->out, sizeof(ent->lay->out), 1, offset);
 449                         offset += sizeof(ent->lay->out);
 450                 }
 451         } else {
 452                 dump_buf(ent->lay, sizeof(*ent->lay), 0, offset);
 453                 offset += sizeof(*ent->lay);
 454         }
 455
 456         while (next && offset < msg->len) {
 457                 if (data_only) {
 458                         dump_len = min_t(int, MLX5_CMD_DATA_BLOCK_SIZE, msg->len - offset);
 459                         dump_buf(next->buf, dump_len, 1, offset);
 460                         offset += MLX5_CMD_DATA_BLOCK_SIZE;
 461                 } else {
 462                         mlx5_core_dbg(dev, "command block:\n");
 463                         dump_buf(next->buf, sizeof(struct mlx5_cmd_prot_block), 0, offset);
 464                         offset += sizeof(struct mlx5_cmd_prot_block);
 465                 }
 466                 next = next->next;
 467         }
 468
 469         if (data_only)
 470                 pr_debug("\n");
 471 }
 472
 473 static void cmd_work_handler(struct work_struct *work)
 474 {
 475         struct mlx5_cmd_work_ent *ent = container_of(work, struct mlx5_cmd_work_ent, work);
 476         struct mlx5_cmd *cmd = ent->cmd;
 477         struct mlx5_core_dev *dev = container_of(cmd, struct mlx5_core_dev, cmd);
 478         struct mlx5_cmd_layout *lay;
 479         struct semaphore *sem;
 480         unsigned long flags;
 481
 482         sem = ent->page_queue ? &cmd->pages_sem : &cmd->sem;
 483         down(sem);
 484         if (!ent->page_queue) {
 485                 ent->idx = alloc_ent(cmd);
 486                 if (ent->idx < 0) {
 487                         mlx5_core_err(dev, "failed to allocate command entry\n");
 488                         up(sem);
 489                         return;
 490                 }
 491         } else {
 492                 ent->idx = cmd->max_reg_cmds;
 493                 spin_lock_irqsave(&cmd->alloc_lock, flags);
 494                 clear_bit(ent->idx, &cmd->bitmask);
 495                 spin_unlock_irqrestore(&cmd->alloc_lock, flags);
 496         }
 497
 498         ent->token = alloc_token(cmd);
 499         cmd->ent_arr[ent->idx] = ent;
 500         lay = get_inst(cmd, ent->idx);
 501         ent->lay = lay;
 502         memset(lay, 0, sizeof(*lay));
 503         memcpy(lay->in, ent->in->first.data, sizeof(lay->in));
 504         ent->op = be32_to_cpu(lay->in[0]) >> 16;
 505         if (ent->in->next)
 506                 lay->in_ptr = cpu_to_be64(ent->in->next->dma);
 507         lay->inlen = cpu_to_be32(ent->in->len);
 508         if (ent->out->next)
 509                 lay->out_ptr = cpu_to_be64(ent->out->next->dma);
 510         lay->outlen = cpu_to_be32(ent->out->len);
 511         lay->type = MLX5_PCI_CMD_XPORT;
 512         lay->token = ent->token;
 513         lay->status_own = CMD_OWNER_HW;
 514         set_signature(ent, !cmd->checksum_disabled);
 515         dump_command(dev, ent, 1);
 516         ent->ts1 = ktime_get_ns();
 517
 518         /* ring doorbell after the descriptor is valid */
 519         mlx5_core_dbg(dev, "writing 0x%x to command doorbell\n", 1 << ent->idx);
 520         wmb();
 521         iowrite32be(1 << ent->idx, &dev->iseg->cmd_dbell);
 522         mmiowb();
 523         /* if not in polling don't use ent after this point */
 524         if (cmd->mode == CMD_MODE_POLLING) {
 525                 poll_timeout(ent);
 526                 /* make sure we read the descriptor after ownership is SW */
 527                 rmb();
 528                 mlx5_cmd_comp_handler(dev, 1UL << ent->idx);
 529         }
 530 }
 531
 532 static const char *deliv_status_to_str(u8 status)
 533 {
 534         switch (status) {
 535         case MLX5_CMD_DELIVERY_STAT_OK:
 536                 return "no errors";
 537         case MLX5_CMD_DELIVERY_STAT_SIGNAT_ERR:
 538                 return "signature error";
 539         case MLX5_CMD_DELIVERY_STAT_TOK_ERR:
 540                 return "token error";
 541         case MLX5_CMD_DELIVERY_STAT_BAD_BLK_NUM_ERR:
 542                 return "bad block number";
 543         case MLX5_CMD_DELIVERY_STAT_OUT_PTR_ALIGN_ERR:
 544                 return "output pointer not aligned to block size";
 545         case MLX5_CMD_DELIVERY_STAT_IN_PTR_ALIGN_ERR:
 546                 return "input pointer not aligned to block size";
 547         case MLX5_CMD_DELIVERY_STAT_FW_ERR:
 548                 return "firmware internal error";
 549         case MLX5_CMD_DELIVERY_STAT_IN_LENGTH_ERR:
 550                 return "command input length error";
 551         case MLX5_CMD_DELIVERY_STAT_OUT_LENGTH_ERR:
 552                 return "command ouput length error";
 553         case MLX5_CMD_DELIVERY_STAT_RES_FLD_NOT_CLR_ERR:
 554                 return "reserved fields not cleared";
 555         case MLX5_CMD_DELIVERY_STAT_CMD_DESCR_ERR:
 556                 return "bad command descriptor type";
 557         default:
 558                 return "unknown status code";
 559         }
 560 }
 561
 562 static u16 msg_to_opcode(struct mlx5_cmd_msg *in)
 563 {
 564         struct mlx5_inbox_hdr *hdr = (struct mlx5_inbox_hdr *)(in->first.data);
 565
 566         return be16_to_cpu(hdr->opcode);
 567 }
 568
 569 static int wait_func(struct mlx5_core_dev *dev, struct mlx5_cmd_work_ent *ent)
 570 {
 571         unsigned long timeout = msecs_to_jiffies(MLX5_CMD_TIMEOUT_MSEC);
 572         struct mlx5_cmd *cmd = &dev->cmd;
 573         int err;
 574
 575         if (cmd->mode == CMD_MODE_POLLING) {
 576                 wait_for_completion(&ent->done);
 577                 err = ent->ret;
 578         } else {
 579                 if (!wait_for_completion_timeout(&ent->done, timeout))
 580                         err = -ETIMEDOUT;
 581                 else
 582                         err = 0;
 583         }
 584         if (err == -ETIMEDOUT) {
 585                 mlx5_core_warn(dev, "%s(0x%x) timeout. Will cause a leak of a command resource\n",
 586                                mlx5_command_str(msg_to_opcode(ent->in)),
 587                                msg_to_opcode(ent->in));
 588         }
 589         mlx5_core_dbg(dev, "err %d, delivery status %s(%d)\n",
 590                       err, deliv_status_to_str(ent->status), ent->status);
 591
 592         return err;
 593 }
 594
 595 /*  Notes:
 596  *    1. Callback functions may not sleep
 597  *    2. page queue commands do not support asynchrous completion
 598  */
 599 static int mlx5_cmd_invoke(struct mlx5_core_dev *dev, struct mlx5_cmd_msg *in,
 600                            struct mlx5_cmd_msg *out, void *uout, int uout_size,
 601                            mlx5_cmd_cbk_t callback,
 602                            void *context, int page_queue, u8 *status)
 603 {
 604         struct mlx5_cmd *cmd = &dev->cmd;
 605         struct mlx5_cmd_work_ent *ent;
 606         struct mlx5_cmd_stats *stats;
 607         int err = 0;
 608         s64 ds;
 609         u16 op;
 610
 611         if (callback && page_queue)
 612                 return -EINVAL;
 613
 614         ent = alloc_cmd(cmd, in, out, uout, uout_size, callback, context,
 615                         page_queue);
 616         if (IS_ERR(ent))
 617                 return PTR_ERR(ent);
 618
 619         if (!callback)
 620                 init_completion(&ent->done);
 621
 622         INIT_WORK(&ent->work, cmd_work_handler);
 623         if (page_queue) {
 624                 cmd_work_handler(&ent->work);
 625         } else if (!queue_work(cmd->wq, &ent->work)) {
 626                 mlx5_core_warn(dev, "failed to queue work\n");
 627                 err = -ENOMEM;
 628                 goto out_free;
 629         }
 630
 631         if (!callback) {
 632                 err = wait_func(dev, ent);
 633                 if (err == -ETIMEDOUT)
 634                         goto out;
 635
 636                 ds = ent->ts2 - ent->ts1;
 637                 op = be16_to_cpu(((struct mlx5_inbox_hdr *)in->first.data)->opcode);
 638                 if (op < ARRAY_SIZE(cmd->stats)) {
 639                         stats = &cmd->stats[op];
 640                         spin_lock_irq(&stats->lock);
 641                         stats->sum += ds;
 642                         ++stats->n;
 643                         spin_unlock_irq(&stats->lock);
 644                 }
 645                 mlx5_core_dbg_mask(dev, 1 << MLX5_CMD_TIME,
 646                                    "fw exec time for %s is %lld nsec\n",
 647                                    mlx5_command_str(op), ds);
 648                 *status = ent->status;
 649                 free_cmd(ent);
 650         }
 651
 652         return err;
 653
 654 out_free:
 655         free_cmd(ent);
 656 out:
 657         return err;
 658 }
 659
 660 static ssize_t dbg_write(struct file *filp, const char __user *buf,
 661                          size_t count, loff_t *pos)
 662 {
 663         struct mlx5_core_dev *dev = filp->private_data;
 664         struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
 665         char lbuf[3];
 666         int err;
 667
 668         if (!dbg->in_msg || !dbg->out_msg)
 669                 return -ENOMEM;
 670
 671         if (copy_from_user(lbuf, buf, sizeof(lbuf)))
 672                 return -EFAULT;
 673
 674         lbuf[sizeof(lbuf) - 1] = 0;
 675
 676         if (strcmp(lbuf, "go"))
 677                 return -EINVAL;
 678
 679         err = mlx5_cmd_exec(dev, dbg->in_msg, dbg->inlen, dbg->out_msg, dbg->outlen);
 680
 681         return err ? err : count;
 682 }
 683
 684
 685 static const struct file_operations fops = {
 686         .owner  = THIS_MODULE,
 687         .open   = simple_open,
 688         .write  = dbg_write,
 689 };
 690
 691 static int mlx5_copy_to_msg(struct mlx5_cmd_msg *to, void *from, int size)
 692 {
 693         struct mlx5_cmd_prot_block *block;
 694         struct mlx5_cmd_mailbox *next;
 695         int copy;
 696
 697         if (!to || !from)
 698                 return -ENOMEM;
 699
 700         copy = min_t(int, size, sizeof(to->first.data));
 701         memcpy(to->first.data, from, copy);
 702         size -= copy;
 703         from += copy;
 704
 705         next = to->next;
 706         while (size) {
 707                 if (!next) {
 708                         /* this is a BUG */
 709                         return -ENOMEM;
 710                 }
 711
 712                 copy = min_t(int, size, MLX5_CMD_DATA_BLOCK_SIZE);
 713                 block = next->buf;
 714                 memcpy(block->data, from, copy);
 715                 from += copy;
 716                 size -= copy;
 717                 next = next->next;
 718         }
 719
 720         return 0;
 721 }
 722
 723 static int mlx5_copy_from_msg(void *to, struct mlx5_cmd_msg *from, int size)
 724 {
 725         struct mlx5_cmd_prot_block *block;
 726         struct mlx5_cmd_mailbox *next;
 727         int copy;
 728
 729         if (!to || !from)
 730                 return -ENOMEM;
 731
 732         copy = min_t(int, size, sizeof(from->first.data));
 733         memcpy(to, from->first.data, copy);
 734         size -= copy;
 735         to += copy;
 736
 737         next = from->next;
 738         while (size) {
 739                 if (!next) {
 740                         /* this is a BUG */
 741                         return -ENOMEM;
 742                 }
 743
 744                 copy = min_t(int, size, MLX5_CMD_DATA_BLOCK_SIZE);
 745                 block = next->buf;
 746
 747                 memcpy(to, block->data, copy);
 748                 to += copy;
 749                 size -= copy;
 750                 next = next->next;
 751         }
 752
 753         return 0;
 754 }
 755
 756 static struct mlx5_cmd_mailbox *alloc_cmd_box(struct mlx5_core_dev *dev,
 757                                               gfp_t flags)
 758 {
 759         struct mlx5_cmd_mailbox *mailbox;
 760
 761         mailbox = kmalloc(sizeof(*mailbox), flags);
 762         if (!mailbox)
 763                 return ERR_PTR(-ENOMEM);
 764
 765         mailbox->buf = pci_pool_alloc(dev->cmd.pool, flags,
 766                                       &mailbox->dma);
 767         if (!mailbox->buf) {
 768                 mlx5_core_dbg(dev, "failed allocation\n");
 769                 kfree(mailbox);
 770                 return ERR_PTR(-ENOMEM);
 771         }
 772         memset(mailbox->buf, 0, sizeof(struct mlx5_cmd_prot_block));
 773         mailbox->next = NULL;
 774
 775         return mailbox;
 776 }
 777
 778 static void free_cmd_box(struct mlx5_core_dev *dev,
 779                          struct mlx5_cmd_mailbox *mailbox)
 780 {
 781         pci_pool_free(dev->cmd.pool, mailbox->buf, mailbox->dma);
 782         kfree(mailbox);
 783 }
 784
 785 static struct mlx5_cmd_msg *mlx5_alloc_cmd_msg(struct mlx5_core_dev *dev,
 786                                                gfp_t flags, int size)
 787 {
 788         struct mlx5_cmd_mailbox *tmp, *head = NULL;
 789         struct mlx5_cmd_prot_block *block;
 790         struct mlx5_cmd_msg *msg;
 791         int blen;
 792         int err;
 793         int n;
 794         int i;
 795
 796         msg = kzalloc(sizeof(*msg), flags);
 797         if (!msg)
 798                 return ERR_PTR(-ENOMEM);
 799
 800         blen = size - min_t(int, sizeof(msg->first.data), size);
 801         n = (blen + MLX5_CMD_DATA_BLOCK_SIZE - 1) / MLX5_CMD_DATA_BLOCK_SIZE;
 802
 803         for (i = 0; i < n; i++) {
 804                 tmp = alloc_cmd_box(dev, flags);
 805                 if (IS_ERR(tmp)) {
 806                         mlx5_core_warn(dev, "failed allocating block\n");
 807                         err = PTR_ERR(tmp);
 808                         goto err_alloc;
 809                 }
 810
 811                 block = tmp->buf;
 812                 tmp->next = head;
 813                 block->next = cpu_to_be64(tmp->next ? tmp->next->dma : 0);
 814                 block->block_num = cpu_to_be32(n - i - 1);
 815                 head = tmp;
 816         }
 817         msg->next = head;
 818         msg->len = size;
 819         return msg;
 820
 821 err_alloc:
 822         while (head) {
 823                 tmp = head->next;
 824                 free_cmd_box(dev, head);
 825                 head = tmp;
 826         }
 827         kfree(msg);
 828
 829         return ERR_PTR(err);
 830 }
 831
 832 static void mlx5_free_cmd_msg(struct mlx5_core_dev *dev,
 833                                   struct mlx5_cmd_msg *msg)
 834 {
 835         struct mlx5_cmd_mailbox *head = msg->next;
 836         struct mlx5_cmd_mailbox *next;
 837
 838         while (head) {
 839                 next = head->next;
 840                 free_cmd_box(dev, head);
 841                 head = next;
 842         }
 843         kfree(msg);
 844 }
 845
 846 static ssize_t data_write(struct file *filp, const char __user *buf,
 847                           size_t count, loff_t *pos)
 848 {
 849         struct mlx5_core_dev *dev = filp->private_data;
 850         struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
 851         void *ptr;
 852         int err;
 853
 854         if (*pos != 0)
 855                 return -EINVAL;
 856
 857         kfree(dbg->in_msg);
 858         dbg->in_msg = NULL;
 859         dbg->inlen = 0;
 860
 861         ptr = kzalloc(count, GFP_KERNEL);
 862         if (!ptr)
 863                 return -ENOMEM;
 864
 865         if (copy_from_user(ptr, buf, count)) {
 866                 err = -EFAULT;
 867                 goto out;
 868         }
 869         dbg->in_msg = ptr;
 870         dbg->inlen = count;
 871
 872         *pos = count;
 873
 874         return count;
 875
 876 out:
 877         kfree(ptr);
 878         return err;
 879 }
 880
 881 static ssize_t data_read(struct file *filp, char __user *buf, size_t count,
 882                          loff_t *pos)
 883 {
 884         struct mlx5_core_dev *dev = filp->private_data;
 885         struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
 886         int copy;
 887
 888         if (*pos)
 889                 return 0;
 890
 891         if (!dbg->out_msg)
 892                 return -ENOMEM;
 893
 894         copy = min_t(int, count, dbg->outlen);
 895         if (copy_to_user(buf, dbg->out_msg, copy))
 896                 return -EFAULT;
 897
 898         *pos += copy;
 899
 900         return copy;
 901 }
 902
 903 static const struct file_operations dfops = {
 904         .owner  = THIS_MODULE,
 905         .open   = simple_open,
 906         .write  = data_write,
 907         .read   = data_read,
 908 };
 909
 910 static ssize_t outlen_read(struct file *filp, char __user *buf, size_t count,
 911                            loff_t *pos)
 912 {
 913         struct mlx5_core_dev *dev = filp->private_data;
 914         struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
 915         char outlen[8];
 916         int err;
 917
 918         if (*pos)
 919                 return 0;
 920
 921         err = snprintf(outlen, sizeof(outlen), "%d", dbg->outlen);
 922         if (err < 0)
 923                 return err;
 924
 925         if (copy_to_user(buf, &outlen, err))
 926                 return -EFAULT;
 927
 928         *pos += err;
 929
 930         return err;
 931 }
 932
 933 static ssize_t outlen_write(struct file *filp, const char __user *buf,
 934                             size_t count, loff_t *pos)
 935 {
 936         struct mlx5_core_dev *dev = filp->private_data;
 937         struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
 938         char outlen_str[8];
 939         int outlen;
 940         void *ptr;
 941         int err;
 942
 943         if (*pos != 0 || count > 6)
 944                 return -EINVAL;
 945
 946         kfree(dbg->out_msg);
 947         dbg->out_msg = NULL;
 948         dbg->outlen = 0;
 949
 950         if (copy_from_user(outlen_str, buf, count))
 951                 return -EFAULT;
 952
 953         outlen_str[7] = 0;
 954
 955         err = sscanf(outlen_str, "%d", &outlen);
 956         if (err < 0)
 957                 return err;
 958
 959         ptr = kzalloc(outlen, GFP_KERNEL);
 960         if (!ptr)
 961                 return -ENOMEM;
 962
 963         dbg->out_msg = ptr;
 964         dbg->outlen = outlen;
 965
 966         *pos = count;
 967
 968         return count;
 969 }
 970
 971 static const struct file_operations olfops = {
 972         .owner  = THIS_MODULE,
 973         .open   = simple_open,
 974         .write  = outlen_write,
 975         .read   = outlen_read,
 976 };
 977
 978 static void set_wqname(struct mlx5_core_dev *dev)
 979 {
 980         struct mlx5_cmd *cmd = &dev->cmd;
 981
 982         snprintf(cmd->wq_name, sizeof(cmd->wq_name), "mlx5_cmd_%s",
 983                  dev_name(&dev->pdev->dev));
 984 }
 985
 986 static void clean_debug_files(struct mlx5_core_dev *dev)
 987 {
 988         struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
 989
 990         if (!mlx5_debugfs_root)
 991                 return;
 992
 993         mlx5_cmdif_debugfs_cleanup(dev);
 994         debugfs_remove_recursive(dbg->dbg_root);
 995 }
 996
 997 static int create_debugfs_files(struct mlx5_core_dev *dev)
 998 {
 999         struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
1000         int err = -ENOMEM;
1001
1002         if (!mlx5_debugfs_root)
1003                 return 0;
1004
1005         dbg->dbg_root = debugfs_create_dir("cmd", dev->priv.dbg_root);
1006         if (!dbg->dbg_root)
1007                 return err;
1008
1009         dbg->dbg_in = debugfs_create_file("in", 0400, dbg->dbg_root,
1010                                           dev, &dfops);
1011         if (!dbg->dbg_in)
1012                 goto err_dbg;
1013
1014         dbg->dbg_out = debugfs_create_file("out", 0200, dbg->dbg_root,
1015                                            dev, &dfops);
1016         if (!dbg->dbg_out)
1017                 goto err_dbg;
1018
1019         dbg->dbg_outlen = debugfs_create_file("out_len", 0600, dbg->dbg_root,
1020                                               dev, &olfops);
1021         if (!dbg->dbg_outlen)
1022                 goto err_dbg;
1023
1024         dbg->dbg_status = debugfs_create_u8("status", 0600, dbg->dbg_root,
1025                                             &dbg->status);
1026         if (!dbg->dbg_status)
1027                 goto err_dbg;
1028
1029         dbg->dbg_run = debugfs_create_file("run", 0200, dbg->dbg_root, dev, &fops);
1030         if (!dbg->dbg_run)
1031                 goto err_dbg;
1032
1033         mlx5_cmdif_debugfs_init(dev);
1034
1035         return 0;
1036
1037 err_dbg:
1038         clean_debug_files(dev);
1039         return err;
1040 }
1041
1042 void mlx5_cmd_use_events(struct mlx5_core_dev *dev)
1043 {
1044         struct mlx5_cmd *cmd = &dev->cmd;
1045         int i;
1046
1047         for (i = 0; i < cmd->max_reg_cmds; i++)
1048                 down(&cmd->sem);
1049
1050         down(&cmd->pages_sem);
1051
1052         flush_workqueue(cmd->wq);
1053
1054         cmd->mode = CMD_MODE_EVENTS;
1055
1056         up(&cmd->pages_sem);
1057         for (i = 0; i < cmd->max_reg_cmds; i++)
1058                 up(&cmd->sem);
1059 }
1060
1061 void mlx5_cmd_use_polling(struct mlx5_core_dev *dev)
1062 {
1063         struct mlx5_cmd *cmd = &dev->cmd;
1064         int i;
1065
1066         for (i = 0; i < cmd->max_reg_cmds; i++)
1067                 down(&cmd->sem);
1068
1069         down(&cmd->pages_sem);
1070
1071         flush_workqueue(cmd->wq);
1072         cmd->mode = CMD_MODE_POLLING;
1073
1074         up(&cmd->pages_sem);
1075         for (i = 0; i < cmd->max_reg_cmds; i++)
1076                 up(&cmd->sem);
1077 }
1078
1079 static void free_msg(struct mlx5_core_dev *dev, struct mlx5_cmd_msg *msg)
1080 {
1081         unsigned long flags;
1082
1083         if (msg->cache) {
1084                 spin_lock_irqsave(&msg->cache->lock, flags);
1085                 list_add_tail(&msg->list, &msg->cache->head);
1086                 spin_unlock_irqrestore(&msg->cache->lock, flags);
1087         } else {
1088                 mlx5_free_cmd_msg(dev, msg);
1089         }
1090 }
1091
1092 void mlx5_cmd_comp_handler(struct mlx5_core_dev *dev, u64 vec)
1093 {
1094         struct mlx5_cmd *cmd = &dev->cmd;
1095         struct mlx5_cmd_work_ent *ent;
1096         mlx5_cmd_cbk_t callback;
1097         void *context;
1098         int err;
1099         int i;
1100         s64 ds;
1101         struct mlx5_cmd_stats *stats;
1102         unsigned long flags;
1103         unsigned long vector;
1104
1105         /* there can be at most 32 command queues */
1106         vector = vec & 0xffffffff;
1107         for (i = 0; i < (1 << cmd->log_sz); i++) {
1108                 if (test_bit(i, &vector)) {
1109                         struct semaphore *sem;
1110
1111                         ent = cmd->ent_arr[i];
1112                         if (ent->page_queue)
1113                                 sem = &cmd->pages_sem;
1114                         else
1115                                 sem = &cmd->sem;
1116                         ent->ts2 = ktime_get_ns();
1117                         memcpy(ent->out->first.data, ent->lay->out, sizeof(ent->lay->out));
1118                         dump_command(dev, ent, 0);
1119                         if (!ent->ret) {
1120                                 if (!cmd->checksum_disabled)
1121                                         ent->ret = verify_signature(ent);
1122                                 else
1123                                         ent->ret = 0;
1124                                 if (vec & MLX5_TRIGGERED_CMD_COMP)
1125                                         ent->status = MLX5_DRIVER_STATUS_ABORTED;
1126                                 else
1127                                         ent->status = ent->lay->status_own >> 1;
1128
1129                                 mlx5_core_dbg(dev, "command completed. ret 0x%x, delivery status %s(0x%x)\n",
1130                                               ent->ret, deliv_status_to_str(ent->status), ent->status);
1131                         }
1132                         free_ent(cmd, ent->idx);
1133
1134                         if (ent->callback) {
1135                                 ds = ent->ts2 - ent->ts1;
1136                                 if (ent->op < ARRAY_SIZE(cmd->stats)) {
1137                                         stats = &cmd->stats[ent->op];
1138                                         spin_lock_irqsave(&stats->lock, flags);
1139                                         stats->sum += ds;
1140                                         ++stats->n;
1141                                         spin_unlock_irqrestore(&stats->lock, flags);
1142                                 }
1143
1144                                 callback = ent->callback;
1145                                 context = ent->context;
1146                                 err = ent->ret;
1147                                 if (!err)
1148                                         err = mlx5_copy_from_msg(ent->uout,
1149                                                                  ent->out,
1150                                                                  ent->uout_size);
1151
1152                                 mlx5_free_cmd_msg(dev, ent->out);
1153                                 free_msg(dev, ent->in);
1154
1155                                 err = err ? err : ent->status;
1156                                 free_cmd(ent);
1157                                 callback(err, context);
1158                         } else {
1159                                 complete(&ent->done);
1160                         }
1161                         up(sem);
1162                 }
1163         }
1164 }
1165 EXPORT_SYMBOL(mlx5_cmd_comp_handler);
1166
1167 static int status_to_err(u8 status)
1168 {
1169         return status ? -1 : 0; /* TBD more meaningful codes */
1170 }
1171
1172 static struct mlx5_cmd_msg *alloc_msg(struct mlx5_core_dev *dev, int in_size,
1173                                       gfp_t gfp)
1174 {
1175         struct mlx5_cmd_msg *msg = ERR_PTR(-ENOMEM);
1176         struct mlx5_cmd *cmd = &dev->cmd;
1177         struct cache_ent *ent = NULL;
1178
1179         if (in_size > MED_LIST_SIZE && in_size <= LONG_LIST_SIZE)
1180                 ent = &cmd->cache.large;
1181         else if (in_size > 16 && in_size <= MED_LIST_SIZE)
1182                 ent = &cmd->cache.med;
1183
1184         if (ent) {
1185                 spin_lock_irq(&ent->lock);
1186                 if (!list_empty(&ent->head)) {
1187                         msg = list_entry(ent->head.next, typeof(*msg), list);
1188                         /* For cached lists, we must explicitly state what is
1189                          * the real size
1190                          */
1191                         msg->len = in_size;
1192                         list_del(&msg->list);
1193                 }
1194                 spin_unlock_irq(&ent->lock);
1195         }
1196
1197         if (IS_ERR(msg))
1198                 msg = mlx5_alloc_cmd_msg(dev, gfp, in_size);
1199
1200         return msg;
1201 }
1202
1203 static int is_manage_pages(struct mlx5_inbox_hdr *in)
1204 {
1205         return be16_to_cpu(in->opcode) == MLX5_CMD_OP_MANAGE_PAGES;
1206 }
1207
1208 static int cmd_exec(struct mlx5_core_dev *dev, void *in, int in_size, void *out,
1209                     int out_size, mlx5_cmd_cbk_t callback, void *context)
1210 {
1211         struct mlx5_cmd_msg *inb;
1212         struct mlx5_cmd_msg *outb;
1213         int pages_queue;
1214         gfp_t gfp;
1215         int err;
1216         u8 status = 0;
1217
1218         pages_queue = is_manage_pages(in);
1219         gfp = callback ? GFP_ATOMIC : GFP_KERNEL;
1220
1221         inb = alloc_msg(dev, in_size, gfp);
1222         if (IS_ERR(inb)) {
1223                 err = PTR_ERR(inb);
1224                 return err;
1225         }
1226
1227         err = mlx5_copy_to_msg(inb, in, in_size);
1228         if (err) {
1229                 mlx5_core_warn(dev, "err %d\n", err);
1230                 goto out_in;
1231         }
1232
1233         outb = mlx5_alloc_cmd_msg(dev, gfp, out_size);
1234         if (IS_ERR(outb)) {
1235                 err = PTR_ERR(outb);
1236                 goto out_in;
1237         }
1238
1239         err = mlx5_cmd_invoke(dev, inb, outb, out, out_size, callback, context,
1240                               pages_queue, &status);
1241         if (err)
1242                 goto out_out;
1243
1244         mlx5_core_dbg(dev, "err %d, status %d\n", err, status);
1245         if (status) {
1246                 err = status_to_err(status);
1247                 goto out_out;
1248         }
1249
1250         if (!callback)
1251                 err = mlx5_copy_from_msg(out, outb, out_size);
1252
1253 out_out:
1254         if (!callback)
1255                 mlx5_free_cmd_msg(dev, outb);
1256
1257 out_in:
1258         if (!callback)
1259                 free_msg(dev, inb);
1260         return err;
1261 }
1262
1263 int mlx5_cmd_exec(struct mlx5_core_dev *dev, void *in, int in_size, void *out,
1264                   int out_size)
1265 {
1266         return cmd_exec(dev, in, in_size, out, out_size, NULL, NULL);
1267 }
1268 EXPORT_SYMBOL(mlx5_cmd_exec);
1269
1270 int mlx5_cmd_exec_cb(struct mlx5_core_dev *dev, void *in, int in_size,
1271                      void *out, int out_size, mlx5_cmd_cbk_t callback,
1272                      void *context)
1273 {
1274         return cmd_exec(dev, in, in_size, out, out_size, callback, context);
1275 }
1276 EXPORT_SYMBOL(mlx5_cmd_exec_cb);
1277
1278 static void destroy_msg_cache(struct mlx5_core_dev *dev)
1279 {
1280         struct mlx5_cmd *cmd = &dev->cmd;
1281         struct mlx5_cmd_msg *msg;
1282         struct mlx5_cmd_msg *n;
1283
1284         list_for_each_entry_safe(msg, n, &cmd->cache.large.head, list) {
1285                 list_del(&msg->list);
1286                 mlx5_free_cmd_msg(dev, msg);
1287         }
1288
1289         list_for_each_entry_safe(msg, n, &cmd->cache.med.head, list) {
1290                 list_del(&msg->list);
1291                 mlx5_free_cmd_msg(dev, msg);
1292         }
1293 }
1294
1295 static int create_msg_cache(struct mlx5_core_dev *dev)
1296 {
1297         struct mlx5_cmd *cmd = &dev->cmd;
1298         struct mlx5_cmd_msg *msg;
1299         int err;
1300         int i;
1301
1302         spin_lock_init(&cmd->cache.large.lock);
1303         INIT_LIST_HEAD(&cmd->cache.large.head);
1304         spin_lock_init(&cmd->cache.med.lock);
1305         INIT_LIST_HEAD(&cmd->cache.med.head);
1306
1307         for (i = 0; i < NUM_LONG_LISTS; i++) {
1308                 msg = mlx5_alloc_cmd_msg(dev, GFP_KERNEL, LONG_LIST_SIZE);
1309                 if (IS_ERR(msg)) {
1310                         err = PTR_ERR(msg);
1311                         goto ex_err;
1312                 }
1313                 msg->cache = &cmd->cache.large;
1314                 list_add_tail(&msg->list, &cmd->cache.large.head);
1315         }
1316
1317         for (i = 0; i < NUM_MED_LISTS; i++) {
1318                 msg = mlx5_alloc_cmd_msg(dev, GFP_KERNEL, MED_LIST_SIZE);
1319                 if (IS_ERR(msg)) {
1320                         err = PTR_ERR(msg);
1321                         goto ex_err;
1322                 }
1323                 msg->cache = &cmd->cache.med;
1324                 list_add_tail(&msg->list, &cmd->cache.med.head);
1325         }
1326
1327         return 0;
1328
1329 ex_err:
1330         destroy_msg_cache(dev);
1331         return err;
1332 }
1333
1334 static int alloc_cmd_page(struct mlx5_core_dev *dev, struct mlx5_cmd *cmd)
1335 {
1336         struct device *ddev = &dev->pdev->dev;
1337
1338         cmd->cmd_alloc_buf = dma_zalloc_coherent(ddev, MLX5_ADAPTER_PAGE_SIZE,
1339                                                  &cmd->alloc_dma, GFP_KERNEL);
1340         if (!cmd->cmd_alloc_buf)
1341                 return -ENOMEM;
1342
1343         /* make sure it is aligned to 4K */
1344         if (!((uintptr_t)cmd->cmd_alloc_buf & (MLX5_ADAPTER_PAGE_SIZE - 1))) {
1345                 cmd->cmd_buf = cmd->cmd_alloc_buf;
1346                 cmd->dma = cmd->alloc_dma;
1347                 cmd->alloc_size = MLX5_ADAPTER_PAGE_SIZE;
1348                 return 0;
1349         }
1350
1351         dma_free_coherent(ddev, MLX5_ADAPTER_PAGE_SIZE, cmd->cmd_alloc_buf,
1352                           cmd->alloc_dma);
1353         cmd->cmd_alloc_buf = dma_zalloc_coherent(ddev,
1354                                                  2 * MLX5_ADAPTER_PAGE_SIZE - 1,
1355                                                  &cmd->alloc_dma, GFP_KERNEL);
1356         if (!cmd->cmd_alloc_buf)
1357                 return -ENOMEM;
1358
1359         cmd->cmd_buf = PTR_ALIGN(cmd->cmd_alloc_buf, MLX5_ADAPTER_PAGE_SIZE);
1360         cmd->dma = ALIGN(cmd->alloc_dma, MLX5_ADAPTER_PAGE_SIZE);
1361         cmd->alloc_size = 2 * MLX5_ADAPTER_PAGE_SIZE - 1;
1362         return 0;
1363 }
1364
1365 static void free_cmd_page(struct mlx5_core_dev *dev, struct mlx5_cmd *cmd)
1366 {
1367         struct device *ddev = &dev->pdev->dev;
1368
1369         dma_free_coherent(ddev, cmd->alloc_size, cmd->cmd_alloc_buf,
1370                           cmd->alloc_dma);
1371 }
1372
1373 int mlx5_cmd_init(struct mlx5_core_dev *dev)
1374 {
1375         int size = sizeof(struct mlx5_cmd_prot_block);
1376         int align = roundup_pow_of_two(size);
1377         struct mlx5_cmd *cmd = &dev->cmd;
1378         u32 cmd_h, cmd_l;
1379         u16 cmd_if_rev;
1380         int err;
1381         int i;
1382
1383         memset(cmd, 0, sizeof(*cmd));
1384         cmd_if_rev = cmdif_rev(dev);
1385         if (cmd_if_rev != CMD_IF_REV) {
1386                 dev_err(&dev->pdev->dev,
1387                         "Driver cmdif rev(%d) differs from firmware's(%d)\n",
1388                         CMD_IF_REV, cmd_if_rev);
1389                 return -EINVAL;
1390         }
1391
1392         cmd->pool = pci_pool_create("mlx5_cmd", dev->pdev, size, align, 0);
1393         if (!cmd->pool)
1394                 return -ENOMEM;
1395
1396         err = alloc_cmd_page(dev, cmd);
1397         if (err)
1398                 goto err_free_pool;
1399
1400         cmd_l = ioread32be(&dev->iseg->cmdq_addr_l_sz) & 0xff;
1401         cmd->log_sz = cmd_l >> 4 & 0xf;
1402         cmd->log_stride = cmd_l & 0xf;
1403         if (1 << cmd->log_sz > MLX5_MAX_COMMANDS) {
1404                 dev_err(&dev->pdev->dev, "firmware reports too many outstanding commands %d\n",
1405                         1 << cmd->log_sz);
1406                 err = -EINVAL;
1407                 goto err_free_page;
1408         }
1409
1410         if (cmd->log_sz + cmd->log_stride > MLX5_ADAPTER_PAGE_SHIFT) {
1411                 dev_err(&dev->pdev->dev, "command queue size overflow\n");
1412                 err = -EINVAL;
1413                 goto err_free_page;
1414         }
1415
1416         cmd->checksum_disabled = 1;
1417         cmd->max_reg_cmds = (1 << cmd->log_sz) - 1;
1418         cmd->bitmask = (1 << cmd->max_reg_cmds) - 1;
1419
1420         cmd->cmdif_rev = ioread32be(&dev->iseg->cmdif_rev_fw_sub) >> 16;
1421         if (cmd->cmdif_rev > CMD_IF_REV) {
1422                 dev_err(&dev->pdev->dev, "driver does not support command interface version. driver %d, firmware %d\n",
1423                         CMD_IF_REV, cmd->cmdif_rev);
1424                 err = -ENOTSUPP;
1425                 goto err_free_page;
1426         }
1427
1428         spin_lock_init(&cmd->alloc_lock);
1429         spin_lock_init(&cmd->token_lock);
1430         for (i = 0; i < ARRAY_SIZE(cmd->stats); i++)
1431                 spin_lock_init(&cmd->stats[i].lock);
1432
1433         sema_init(&cmd->sem, cmd->max_reg_cmds);
1434         sema_init(&cmd->pages_sem, 1);
1435
1436         cmd_h = (u32)((u64)(cmd->dma) >> 32);
1437         cmd_l = (u32)(cmd->dma);
1438         if (cmd_l & 0xfff) {
1439                 dev_err(&dev->pdev->dev, "invalid command queue address\n");
1440                 err = -ENOMEM;
1441                 goto err_free_page;
1442         }
1443
1444         iowrite32be(cmd_h, &dev->iseg->cmdq_addr_h);
1445         iowrite32be(cmd_l, &dev->iseg->cmdq_addr_l_sz);
1446
1447         /* Make sure firmware sees the complete address before we proceed */
1448         wmb();
1449
1450         mlx5_core_dbg(dev, "descriptor at dma 0x%llx\n", (unsigned long long)(cmd->dma));
1451
1452         cmd->mode = CMD_MODE_POLLING;
1453
1454         err = create_msg_cache(dev);
1455         if (err) {
1456                 dev_err(&dev->pdev->dev, "failed to create command cache\n");
1457                 goto err_free_page;
1458         }
1459
1460         set_wqname(dev);
1461         cmd->wq = create_singlethread_workqueue(cmd->wq_name);
1462         if (!cmd->wq) {
1463                 dev_err(&dev->pdev->dev, "failed to create command workqueue\n");
1464                 err = -ENOMEM;
1465                 goto err_cache;
1466         }
1467
1468         err = create_debugfs_files(dev);
1469         if (err) {
1470                 err = -ENOMEM;
1471                 goto err_wq;
1472         }
1473
1474         return 0;
1475
1476 err_wq:
1477         destroy_workqueue(cmd->wq);
1478
1479 err_cache:
1480         destroy_msg_cache(dev);
1481
1482 err_free_page:
1483         free_cmd_page(dev, cmd);
1484
1485 err_free_pool:
1486         pci_pool_destroy(cmd->pool);
1487
1488         return err;
1489 }
1490 EXPORT_SYMBOL(mlx5_cmd_init);
1491
1492 void mlx5_cmd_cleanup(struct mlx5_core_dev *dev)
1493 {
1494         struct mlx5_cmd *cmd = &dev->cmd;
1495
1496         clean_debug_files(dev);
1497         destroy_workqueue(cmd->wq);
1498         destroy_msg_cache(dev);
1499         free_cmd_page(dev, cmd);
1500         pci_pool_destroy(cmd->pool);
1501 }
1502 EXPORT_SYMBOL(mlx5_cmd_cleanup);
1503
1504 static const char *cmd_status_str(u8 status)
1505 {
1506         switch (status) {
1507         case MLX5_CMD_STAT_OK:
1508                 return "OK";
1509         case MLX5_CMD_STAT_INT_ERR:
1510                 return "internal error";
1511         case MLX5_CMD_STAT_BAD_OP_ERR:
1512                 return "bad operation";
1513         case MLX5_CMD_STAT_BAD_PARAM_ERR:
1514                 return "bad parameter";
1515         case MLX5_CMD_STAT_BAD_SYS_STATE_ERR:
1516                 return "bad system state";
1517         case MLX5_CMD_STAT_BAD_RES_ERR:
1518                 return "bad resource";
1519         case MLX5_CMD_STAT_RES_BUSY:
1520                 return "resource busy";
1521         case MLX5_CMD_STAT_LIM_ERR:
1522                 return "limits exceeded";
1523         case MLX5_CMD_STAT_BAD_RES_STATE_ERR:
1524                 return "bad resource state";
1525         case MLX5_CMD_STAT_IX_ERR:
1526                 return "bad index";
1527         case MLX5_CMD_STAT_NO_RES_ERR:
1528                 return "no resources";
1529         case MLX5_CMD_STAT_BAD_INP_LEN_ERR:
1530                 return "bad input length";
1531         case MLX5_CMD_STAT_BAD_OUTP_LEN_ERR:
1532                 return "bad output length";
1533         case MLX5_CMD_STAT_BAD_QP_STATE_ERR:
1534                 return "bad QP state";
1535         case MLX5_CMD_STAT_BAD_PKT_ERR:
1536                 return "bad packet (discarded)";
1537         case MLX5_CMD_STAT_BAD_SIZE_OUTS_CQES_ERR:
1538                 return "bad size too many outstanding CQEs";
1539         default:
1540                 return "unknown status";
1541         }
1542 }
1543
1544 static int cmd_status_to_err(u8 status)
1545 {
1546         switch (status) {
1547         case MLX5_CMD_STAT_OK:                          return 0;
1548         case MLX5_CMD_STAT_INT_ERR:                     return -EIO;
1549         case MLX5_CMD_STAT_BAD_OP_ERR:                  return -EINVAL;
1550         case MLX5_CMD_STAT_BAD_PARAM_ERR:               return -EINVAL;
1551         case MLX5_CMD_STAT_BAD_SYS_STATE_ERR:           return -EIO;
1552         case MLX5_CMD_STAT_BAD_RES_ERR:                 return -EINVAL;
1553         case MLX5_CMD_STAT_RES_BUSY:                    return -EBUSY;
1554         case MLX5_CMD_STAT_LIM_ERR:                     return -ENOMEM;
1555         case MLX5_CMD_STAT_BAD_RES_STATE_ERR:           return -EINVAL;
1556         case MLX5_CMD_STAT_IX_ERR:                      return -EINVAL;
1557         case MLX5_CMD_STAT_NO_RES_ERR:                  return -EAGAIN;
1558         case MLX5_CMD_STAT_BAD_INP_LEN_ERR:             return -EIO;
1559         case MLX5_CMD_STAT_BAD_OUTP_LEN_ERR:            return -EIO;
1560         case MLX5_CMD_STAT_BAD_QP_STATE_ERR:            return -EINVAL;
1561         case MLX5_CMD_STAT_BAD_PKT_ERR:                 return -EINVAL;
1562         case MLX5_CMD_STAT_BAD_SIZE_OUTS_CQES_ERR:      return -EINVAL;
1563         default:                                        return -EIO;
1564         }
1565 }
1566
1567 /* this will be available till all the commands use set/get macros */
1568 int mlx5_cmd_status_to_err(struct mlx5_outbox_hdr *hdr)
1569 {
1570         if (!hdr->status)
1571                 return 0;
1572
1573         pr_warn("command failed, status %s(0x%x), syndrome 0x%x\n",
1574                 cmd_status_str(hdr->status), hdr->status,
1575                 be32_to_cpu(hdr->syndrome));
1576
1577         return cmd_status_to_err(hdr->status);
1578 }
1579
1580 int mlx5_cmd_status_to_err_v2(void *ptr)
1581 {
1582         u32     syndrome;
1583         u8      status;
1584
1585         status = be32_to_cpu(*(__be32 *)ptr) >> 24;
1586         if (!status)
1587                 return 0;
1588
1589         syndrome = be32_to_cpu(*(__be32 *)(ptr + 4));
1590
1591         pr_warn("command failed, status %s(0x%x), syndrome 0x%x\n",
1592                 cmd_status_str(status), status, syndrome);
1593
1594         return cmd_status_to_err(status);
1595 }