2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2013 QLogic Corporation
5 * See LICENSE.qlcnic for copyright and licensing details.
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/ioport.h>
15 #include <linux/pci.h>
16 #include <linux/netdevice.h>
17 #include <linux/etherdevice.h>
20 #include <linux/tcp.h>
21 #include <linux/skbuff.h>
22 #include <linux/firmware.h>
23 #include <linux/ethtool.h>
24 #include <linux/mii.h>
25 #include <linux/timer.h>
27 #include <linux/vmalloc.h>
30 #include <asm/byteorder.h>
31 #include <linux/bitops.h>
32 #include <linux/if_vlan.h>
34 #include "qlcnic_hdr.h"
35 #include "qlcnic_hw.h"
36 #include "qlcnic_83xx_hw.h"
37 #include "qlcnic_dcb.h"
39 #define _QLCNIC_LINUX_MAJOR 5
40 #define _QLCNIC_LINUX_MINOR 3
41 #define _QLCNIC_LINUX_SUBVERSION 53
42 #define QLCNIC_LINUX_VERSIONID "5.3.53"
43 #define QLCNIC_DRV_IDC_VER 0x01
44 #define QLCNIC_DRIVER_VERSION ((_QLCNIC_LINUX_MAJOR << 16) |\
45 (_QLCNIC_LINUX_MINOR << 8) | (_QLCNIC_LINUX_SUBVERSION))
47 #define QLCNIC_VERSION_CODE(a, b, c) (((a) << 24) + ((b) << 16) + (c))
48 #define _major(v) (((v) >> 24) & 0xff)
49 #define _minor(v) (((v) >> 16) & 0xff)
50 #define _build(v) ((v) & 0xffff)
52 /* version in image has weird encoding:
55 * 31:16 - build (little endian)
57 #define QLCNIC_DECODE_VERSION(v) \
58 QLCNIC_VERSION_CODE(((v) & 0xff), (((v) >> 8) & 0xff), ((v) >> 16))
60 #define QLCNIC_MIN_FW_VERSION QLCNIC_VERSION_CODE(4, 4, 2)
61 #define QLCNIC_NUM_FLASH_SECTORS (64)
62 #define QLCNIC_FLASH_SECTOR_SIZE (64 * 1024)
63 #define QLCNIC_FLASH_TOTAL_SIZE (QLCNIC_NUM_FLASH_SECTORS \
64 * QLCNIC_FLASH_SECTOR_SIZE)
66 #define RCV_DESC_RINGSIZE(rds_ring) \
67 (sizeof(struct rcv_desc) * (rds_ring)->num_desc)
68 #define RCV_BUFF_RINGSIZE(rds_ring) \
69 (sizeof(struct qlcnic_rx_buffer) * rds_ring->num_desc)
70 #define STATUS_DESC_RINGSIZE(sds_ring) \
71 (sizeof(struct status_desc) * (sds_ring)->num_desc)
72 #define TX_BUFF_RINGSIZE(tx_ring) \
73 (sizeof(struct qlcnic_cmd_buffer) * tx_ring->num_desc)
74 #define TX_DESC_RINGSIZE(tx_ring) \
75 (sizeof(struct cmd_desc_type0) * tx_ring->num_desc)
77 #define QLCNIC_P3P_A0 0x50
78 #define QLCNIC_P3P_C0 0x58
80 #define QLCNIC_IS_REVISION_P3P(REVISION) (REVISION >= QLCNIC_P3P_A0)
82 #define FIRST_PAGE_GROUP_START 0
83 #define FIRST_PAGE_GROUP_END 0x100000
85 #define P3P_MAX_MTU (9600)
86 #define P3P_MIN_MTU (68)
87 #define QLCNIC_MAX_ETHERHDR 32 /* This contains some padding */
89 #define QLCNIC_P3P_RX_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + ETH_DATA_LEN)
90 #define QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + P3P_MAX_MTU)
91 #define QLCNIC_CT_DEFAULT_RX_BUF_LEN 2048
92 #define QLCNIC_LRO_BUFFER_EXTRA 2048
95 #define QLCNIC_MAX_FRAGS_PER_TX 14
96 #define MAX_TSO_HEADER_DESC 2
97 #define MGMT_CMD_DESC_RESV 4
98 #define TX_STOP_THRESH ((MAX_SKB_FRAGS >> 2) + MAX_TSO_HEADER_DESC \
100 #define QLCNIC_MAX_TX_TIMEOUTS 2
102 /* Driver will use 1 Tx ring in INT-x/MSI/SRIOV mode. */
103 #define QLCNIC_SINGLE_RING 1
104 #define QLCNIC_DEF_SDS_RINGS 4
105 #define QLCNIC_DEF_TX_RINGS 4
106 #define QLCNIC_MAX_VNIC_TX_RINGS 4
107 #define QLCNIC_MAX_VNIC_SDS_RINGS 4
109 enum qlcnic_queue_type {
114 /* Operational mode for driver */
115 #define QLCNIC_VNIC_MODE 0xFF
116 #define QLCNIC_DEFAULT_MODE 0x0
118 /* Virtual NIC function count */
119 #define QLC_DEFAULT_VNIC_COUNT 8
120 #define QLC_84XX_VNIC_COUNT 16
123 * Following are the states of the Phantom. Phantom will set them and
124 * Host will read to check if the fields are correct.
126 #define PHAN_INITIALIZE_FAILED 0xffff
127 #define PHAN_INITIALIZE_COMPLETE 0xff01
129 /* Host writes the following to notify that it has done the init-handshake */
130 #define PHAN_INITIALIZE_ACK 0xf00f
131 #define PHAN_PEG_RCV_INITIALIZED 0xff01
133 #define NUM_RCV_DESC_RINGS 3
135 #define RCV_RING_NORMAL 0
136 #define RCV_RING_JUMBO 1
138 #define MIN_CMD_DESCRIPTORS 64
139 #define MIN_RCV_DESCRIPTORS 64
140 #define MIN_JUMBO_DESCRIPTORS 32
142 #define MAX_CMD_DESCRIPTORS 1024
143 #define MAX_RCV_DESCRIPTORS_1G 4096
144 #define MAX_RCV_DESCRIPTORS_10G 8192
145 #define MAX_RCV_DESCRIPTORS_VF 2048
146 #define MAX_JUMBO_RCV_DESCRIPTORS_1G 512
147 #define MAX_JUMBO_RCV_DESCRIPTORS_10G 1024
149 #define DEFAULT_RCV_DESCRIPTORS_1G 2048
150 #define DEFAULT_RCV_DESCRIPTORS_10G 4096
151 #define DEFAULT_RCV_DESCRIPTORS_VF 1024
152 #define MAX_RDS_RINGS 2
154 #define get_next_index(index, length) \
155 (((index) + 1) & ((length) - 1))
158 * Following data structures describe the descriptors that will be used.
159 * Added fileds of tcpHdrSize and ipHdrSize, The driver needs to do it only when
160 * we are doing LSO (above the 1500 size packet) only.
162 struct cmd_desc_type0 {
163 u8 tcp_hdr_offset; /* For LSO only */
164 u8 ip_hdr_offset; /* For LSO only */
165 __le16 flags_opcode; /* 15:13 unused, 12:7 opcode, 6:0 flags */
166 __le32 nfrags__length; /* 31:8 total len, 7:0 frag count */
170 __le16 reference_handle;
172 u8 port_ctxid; /* 7:4 ctxid 3:0 port */
173 u8 total_hdr_length; /* LSO only : MAC+IP+TCP Hdr size */
174 __le16 conn_id; /* IPSec offoad only */
179 __le16 buffer_length[4];
183 u8 eth_addr[ETH_ALEN];
186 } __attribute__ ((aligned(64)));
188 /* Note: sizeof(rcv_desc) should always be a mutliple of 2 */
190 __le16 reference_handle;
192 __le32 buffer_length; /* allocated buffer length (usually 2K) */
197 __le64 status_desc_data[2];
198 } __attribute__ ((aligned(16)));
200 /* UNIFIED ROMIMAGE */
201 #define QLCNIC_UNI_FW_MIN_SIZE 0xc8000
202 #define QLCNIC_UNI_DIR_SECT_PRODUCT_TBL 0x0
203 #define QLCNIC_UNI_DIR_SECT_BOOTLD 0x6
204 #define QLCNIC_UNI_DIR_SECT_FW 0x7
207 #define QLCNIC_UNI_CHIP_REV_OFF 10
208 #define QLCNIC_UNI_FLAGS_OFF 11
209 #define QLCNIC_UNI_BIOS_VERSION_OFF 12
210 #define QLCNIC_UNI_BOOTLD_IDX_OFF 27
211 #define QLCNIC_UNI_FIRMWARE_IDX_OFF 29
213 struct uni_table_desc{
220 struct uni_data_desc{
226 /* Flash Defines and Structures */
227 #define QLCNIC_FLT_LOCATION 0x3F1000
228 #define QLCNIC_FDT_LOCATION 0x3F0000
229 #define QLCNIC_B0_FW_IMAGE_REGION 0x74
230 #define QLCNIC_C0_FW_IMAGE_REGION 0x97
231 #define QLCNIC_BOOTLD_REGION 0X72
232 struct qlcnic_flt_header {
239 struct qlcnic_flt_entry {
249 /* Flash Descriptor Table */
263 u8 write_enable_bits;
264 u8 write_statusreg_cmd;
265 u8 unprotected_sec_cmd;
270 u32 write_enable_data;
272 u8 write_disable_bits;
276 u8 protected_sec_cmd;
279 /* Magic number to let user know flash is programmed */
280 #define QLCNIC_BDINFO_MAGIC 0x12345678
282 #define QLCNIC_BRDTYPE_P3P_REF_QG 0x0021
283 #define QLCNIC_BRDTYPE_P3P_HMEZ 0x0022
284 #define QLCNIC_BRDTYPE_P3P_10G_CX4_LP 0x0023
285 #define QLCNIC_BRDTYPE_P3P_4_GB 0x0024
286 #define QLCNIC_BRDTYPE_P3P_IMEZ 0x0025
287 #define QLCNIC_BRDTYPE_P3P_10G_SFP_PLUS 0x0026
288 #define QLCNIC_BRDTYPE_P3P_10000_BASE_T 0x0027
289 #define QLCNIC_BRDTYPE_P3P_XG_LOM 0x0028
290 #define QLCNIC_BRDTYPE_P3P_4_GB_MM 0x0029
291 #define QLCNIC_BRDTYPE_P3P_10G_SFP_CT 0x002a
292 #define QLCNIC_BRDTYPE_P3P_10G_SFP_QT 0x002b
293 #define QLCNIC_BRDTYPE_P3P_10G_CX4 0x0031
294 #define QLCNIC_BRDTYPE_P3P_10G_XFP 0x0032
295 #define QLCNIC_BRDTYPE_P3P_10G_TP 0x0080
297 #define QLCNIC_MSIX_TABLE_OFFSET 0x44
299 /* Flash memory map */
300 #define QLCNIC_BRDCFG_START 0x4000 /* board config */
301 #define QLCNIC_BOOTLD_START 0x10000 /* bootld */
302 #define QLCNIC_IMAGE_START 0x43000 /* compressed image */
303 #define QLCNIC_USER_START 0x3E8000 /* Firmare info */
305 #define QLCNIC_FW_VERSION_OFFSET (QLCNIC_USER_START+0x408)
306 #define QLCNIC_FW_SIZE_OFFSET (QLCNIC_USER_START+0x40c)
307 #define QLCNIC_FW_SERIAL_NUM_OFFSET (QLCNIC_USER_START+0x81c)
308 #define QLCNIC_BIOS_VERSION_OFFSET (QLCNIC_USER_START+0x83c)
310 #define QLCNIC_BRDTYPE_OFFSET (QLCNIC_BRDCFG_START+0x8)
311 #define QLCNIC_FW_MAGIC_OFFSET (QLCNIC_BRDCFG_START+0x128)
313 #define QLCNIC_FW_MIN_SIZE (0x3fffff)
314 #define QLCNIC_UNIFIED_ROMIMAGE 0
315 #define QLCNIC_FLASH_ROMIMAGE 1
316 #define QLCNIC_UNKNOWN_ROMIMAGE 0xff
318 #define QLCNIC_UNIFIED_ROMIMAGE_NAME "phanfw.bin"
319 #define QLCNIC_FLASH_ROMIMAGE_NAME "flash"
321 extern char qlcnic_driver_name[];
323 extern int qlcnic_use_msi;
324 extern int qlcnic_use_msi_x;
325 extern int qlcnic_auto_fw_reset;
326 extern int qlcnic_load_fw_file;
328 /* Number of status descriptors to handle per interrupt */
329 #define MAX_STATUS_HANDLE (64)
332 * qlcnic_skb_frag{} is to contain mapping info for each SG list. This
333 * has to be freed when DMA is complete. This is part of qlcnic_tx_buffer{}.
335 struct qlcnic_skb_frag {
340 /* Following defines are for the state of the buffers */
341 #define QLCNIC_BUFFER_FREE 0
342 #define QLCNIC_BUFFER_BUSY 1
345 * There will be one qlcnic_buffer per skb packet. These will be
346 * used to save the dma info for pci_unmap_page()
348 struct qlcnic_cmd_buffer {
350 struct qlcnic_skb_frag frag_array[MAX_SKB_FRAGS + 1];
354 /* In rx_buffer, we do not need multiple fragments as is a single buffer */
355 struct qlcnic_rx_buffer {
358 struct list_head list;
363 #define QLCNIC_GBE 0x01
364 #define QLCNIC_XGBE 0x02
367 * Interrupt coalescing defaults. The defaults are for 1500 MTU. It is
368 * adjusted based on configured MTU.
370 #define QLCNIC_INTR_COAL_TYPE_RX 1
371 #define QLCNIC_INTR_COAL_TYPE_TX 2
373 #define QLCNIC_DEF_INTR_COALESCE_RX_TIME_US 3
374 #define QLCNIC_DEF_INTR_COALESCE_RX_PACKETS 256
376 #define QLCNIC_DEF_INTR_COALESCE_TX_TIME_US 64
377 #define QLCNIC_DEF_INTR_COALESCE_TX_PACKETS 64
379 #define QLCNIC_INTR_DEFAULT 0x04
380 #define QLCNIC_CONFIG_INTR_COALESCE 3
381 #define QLCNIC_DEV_INFO_SIZE 2
383 struct qlcnic_nic_intr_coalesce {
394 struct qlcnic_dump_template_hdr {
411 struct qlcnic_fw_dump {
412 u8 clr; /* flag to indicate if dump is cleared */
413 bool enable; /* enable/disable dump */
414 u32 size; /* total size of the dump */
415 void *data; /* dump data area */
416 struct qlcnic_dump_template_hdr *tmpl_hdr;
417 dma_addr_t phys_addr;
423 * One hardware_context{} per adapter
424 * contains interrupt info as well shared hardware info.
426 struct qlcnic_hardware_context {
427 void __iomem *pci_base0;
428 void __iomem *ocm_win_crb;
430 unsigned long pci_len0;
433 struct mutex mem_lock;
475 u32 extra_capability[3];
480 struct qlcnic_hardware_ops *hw_ops;
481 struct qlcnic_nic_intr_coalesce coal;
482 struct qlcnic_fw_dump fw_dump;
483 struct qlcnic_fdt fdt;
484 struct qlc_83xx_reset reset;
485 struct qlc_83xx_idc idc;
486 struct qlc_83xx_fw_info *fw_info;
487 struct qlcnic_intrpt_config *intr_tbl;
488 struct qlcnic_sriov *sriov;
491 u32 mbox_aen[QLC_83XX_MBX_AEN_CNT];
493 struct qlcnic_mailbox *mailbox;
495 u8 phys_port_id[ETH_ALEN];
499 struct qlcnic_adapter_stats {
513 u64 skb_alloc_failure;
515 u64 rx_dma_map_error;
516 u64 tx_dma_map_error;
518 u64 mac_filter_limit_overrun;
522 * Rcv Descriptor Context. One such per Rcv Descriptor. There may
523 * be one Rcv Descriptor for normal packets, one for jumbo and may be others.
525 struct qlcnic_host_rds_ring {
526 void __iomem *crb_rcv_producer;
527 struct rcv_desc *desc_head;
528 struct qlcnic_rx_buffer *rx_buf_arr;
534 struct list_head free_list;
536 dma_addr_t phys_addr;
537 } ____cacheline_internodealigned_in_smp;
539 struct qlcnic_host_sds_ring {
542 void __iomem *crb_sts_consumer;
544 struct qlcnic_host_tx_ring *tx_ring;
545 struct status_desc *desc_head;
546 struct qlcnic_adapter *adapter;
547 struct napi_struct napi;
548 struct list_head free_list[NUM_RCV_DESC_RINGS];
550 void __iomem *crb_intr_mask;
553 dma_addr_t phys_addr;
554 char name[IFNAMSIZ + 12];
555 } ____cacheline_internodealigned_in_smp;
557 struct qlcnic_tx_queue_stats {
565 struct qlcnic_host_tx_ring {
567 void __iomem *crb_intr_mask;
568 char name[IFNAMSIZ + 12];
576 struct qlcnic_tx_queue_stats tx_stats;
578 void __iomem *crb_cmd_producer;
579 struct cmd_desc_type0 *desc_head;
580 struct qlcnic_adapter *adapter;
581 struct napi_struct napi;
582 struct qlcnic_cmd_buffer *cmd_buf_arr;
585 dma_addr_t phys_addr;
586 dma_addr_t hw_cons_phys_addr;
587 struct netdev_queue *txq;
588 /* Lock to protect Tx descriptors cleanup */
589 spinlock_t tx_clean_lock;
590 } ____cacheline_internodealigned_in_smp;
593 * Receive context. There is one such structure per instance of the
594 * receive processing. Any state information that is relevant to
595 * the receive, and is must be in this structure. The global data may be
598 struct qlcnic_recv_context {
599 struct qlcnic_host_rds_ring *rds_rings;
600 struct qlcnic_host_sds_ring *sds_rings;
606 /* HW context creation */
608 #define QLCNIC_OS_CRB_RETRY_COUNT 4000
610 #define QLCNIC_CDRP_CMD_BIT 0x80000000
613 * All responses must have the QLCNIC_CDRP_CMD_BIT cleared
614 * in the crb QLCNIC_CDRP_CRB_OFFSET.
616 #define QLCNIC_CDRP_FORM_RSP(rsp) (rsp)
617 #define QLCNIC_CDRP_IS_RSP(rsp) (((rsp) & QLCNIC_CDRP_CMD_BIT) == 0)
619 #define QLCNIC_CDRP_RSP_OK 0x00000001
620 #define QLCNIC_CDRP_RSP_FAIL 0x00000002
621 #define QLCNIC_CDRP_RSP_TIMEOUT 0x00000003
624 * All commands must have the QLCNIC_CDRP_CMD_BIT set in
625 * the crb QLCNIC_CDRP_CRB_OFFSET.
627 #define QLCNIC_CDRP_FORM_CMD(cmd) (QLCNIC_CDRP_CMD_BIT | (cmd))
629 #define QLCNIC_RCODE_SUCCESS 0
630 #define QLCNIC_RCODE_INVALID_ARGS 6
631 #define QLCNIC_RCODE_NOT_SUPPORTED 9
632 #define QLCNIC_RCODE_NOT_PERMITTED 10
633 #define QLCNIC_RCODE_NOT_IMPL 15
634 #define QLCNIC_RCODE_INVALID 16
635 #define QLCNIC_RCODE_TIMEOUT 17
636 #define QLCNIC_DESTROY_CTX_RESET 0
639 * Capabilities Announced
641 #define QLCNIC_CAP0_LEGACY_CONTEXT (1)
642 #define QLCNIC_CAP0_LEGACY_MN (1 << 2)
643 #define QLCNIC_CAP0_LSO (1 << 6)
644 #define QLCNIC_CAP0_JUMBO_CONTIGUOUS (1 << 7)
645 #define QLCNIC_CAP0_LRO_CONTIGUOUS (1 << 8)
646 #define QLCNIC_CAP0_VALIDOFF (1 << 11)
647 #define QLCNIC_CAP0_LRO_MSS (1 << 21)
648 #define QLCNIC_CAP0_TX_MULTI (1 << 22)
653 #define QLCNIC_HOST_CTX_STATE_FREED 0
654 #define QLCNIC_HOST_CTX_STATE_ACTIVE 2
660 struct qlcnic_hostrq_sds_ring {
661 __le64 host_phys_addr; /* Ring base addr */
662 __le32 ring_size; /* Ring entries */
664 __le16 rsvd; /* Padding */
667 struct qlcnic_hostrq_rds_ring {
668 __le64 host_phys_addr; /* Ring base addr */
669 __le64 buff_size; /* Packet buffer size */
670 __le32 ring_size; /* Ring entries */
671 __le32 ring_kind; /* Class of ring */
674 struct qlcnic_hostrq_rx_ctx {
675 __le64 host_rsp_dma_addr; /* Response dma'd here */
676 __le32 capabilities[4]; /* Flag bit vector */
677 __le32 host_int_crb_mode; /* Interrupt crb usage */
678 __le32 host_rds_crb_mode; /* RDS crb usage */
679 /* These ring offsets are relative to data[0] below */
680 __le32 rds_ring_offset; /* Offset to RDS config */
681 __le32 sds_ring_offset; /* Offset to SDS config */
682 __le16 num_rds_rings; /* Count of RDS rings */
683 __le16 num_sds_rings; /* Count of SDS rings */
684 __le16 valid_field_offset;
687 u8 reserved[128]; /* reserve space for future expansion*/
688 /* MUST BE 64-bit aligned.
689 The following is packed:
691 - N hostrq_sds_rings */
695 struct qlcnic_cardrsp_rds_ring{
696 __le32 host_producer_crb; /* Crb to use */
697 __le32 rsvd1; /* Padding */
700 struct qlcnic_cardrsp_sds_ring {
701 __le32 host_consumer_crb; /* Crb to use */
702 __le32 interrupt_crb; /* Crb to use */
705 struct qlcnic_cardrsp_rx_ctx {
706 /* These ring offsets are relative to data[0] below */
707 __le32 rds_ring_offset; /* Offset to RDS config */
708 __le32 sds_ring_offset; /* Offset to SDS config */
709 __le32 host_ctx_state; /* Starting State */
710 __le32 num_fn_per_port; /* How many PCI fn share the port */
711 __le16 num_rds_rings; /* Count of RDS rings */
712 __le16 num_sds_rings; /* Count of SDS rings */
713 __le16 context_id; /* Handle for context */
714 u8 phys_port; /* Physical id of port */
715 u8 virt_port; /* Virtual/Logical id of port */
716 u8 reserved[128]; /* save space for future expansion */
717 /* MUST BE 64-bit aligned.
718 The following is packed:
719 - N cardrsp_rds_rings
720 - N cardrs_sds_rings */
724 #define SIZEOF_HOSTRQ_RX(HOSTRQ_RX, rds_rings, sds_rings) \
725 (sizeof(HOSTRQ_RX) + \
726 (rds_rings)*(sizeof(struct qlcnic_hostrq_rds_ring)) + \
727 (sds_rings)*(sizeof(struct qlcnic_hostrq_sds_ring)))
729 #define SIZEOF_CARDRSP_RX(CARDRSP_RX, rds_rings, sds_rings) \
730 (sizeof(CARDRSP_RX) + \
731 (rds_rings)*(sizeof(struct qlcnic_cardrsp_rds_ring)) + \
732 (sds_rings)*(sizeof(struct qlcnic_cardrsp_sds_ring)))
738 struct qlcnic_hostrq_cds_ring {
739 __le64 host_phys_addr; /* Ring base addr */
740 __le32 ring_size; /* Ring entries */
741 __le32 rsvd; /* Padding */
744 struct qlcnic_hostrq_tx_ctx {
745 __le64 host_rsp_dma_addr; /* Response dma'd here */
746 __le64 cmd_cons_dma_addr; /* */
747 __le64 dummy_dma_addr; /* */
748 __le32 capabilities[4]; /* Flag bit vector */
749 __le32 host_int_crb_mode; /* Interrupt crb usage */
750 __le32 rsvd1; /* Padding */
751 __le16 rsvd2; /* Padding */
752 __le16 interrupt_ctl;
754 __le16 rsvd3; /* Padding */
755 struct qlcnic_hostrq_cds_ring cds_ring; /* Desc of cds ring */
756 u8 reserved[128]; /* future expansion */
759 struct qlcnic_cardrsp_cds_ring {
760 __le32 host_producer_crb; /* Crb to use */
761 __le32 interrupt_crb; /* Crb to use */
764 struct qlcnic_cardrsp_tx_ctx {
765 __le32 host_ctx_state; /* Starting state */
766 __le16 context_id; /* Handle for context */
767 u8 phys_port; /* Physical id of port */
768 u8 virt_port; /* Virtual/Logical id of port */
769 struct qlcnic_cardrsp_cds_ring cds_ring; /* Card cds settings */
770 u8 reserved[128]; /* future expansion */
773 #define SIZEOF_HOSTRQ_TX(HOSTRQ_TX) (sizeof(HOSTRQ_TX))
774 #define SIZEOF_CARDRSP_TX(CARDRSP_TX) (sizeof(CARDRSP_TX))
778 #define QLCNIC_HOST_RDS_CRB_MODE_UNIQUE 0
779 #define QLCNIC_HOST_RDS_CRB_MODE_SHARED 1
780 #define QLCNIC_HOST_RDS_CRB_MODE_CUSTOM 2
781 #define QLCNIC_HOST_RDS_CRB_MODE_MAX 3
783 #define QLCNIC_HOST_INT_CRB_MODE_UNIQUE 0
784 #define QLCNIC_HOST_INT_CRB_MODE_SHARED 1
785 #define QLCNIC_HOST_INT_CRB_MODE_NORX 2
786 #define QLCNIC_HOST_INT_CRB_MODE_NOTX 3
787 #define QLCNIC_HOST_INT_CRB_MODE_NORXTX 4
792 #define MC_COUNT_P3P 38
794 #define QLCNIC_MAC_NOOP 0
795 #define QLCNIC_MAC_ADD 1
796 #define QLCNIC_MAC_DEL 2
797 #define QLCNIC_MAC_VLAN_ADD 3
798 #define QLCNIC_MAC_VLAN_DEL 4
800 struct qlcnic_mac_vlan_list {
801 struct list_head list;
802 uint8_t mac_addr[ETH_ALEN+2];
807 #define NO_MAC_LEARN 0
808 #define DRV_MAC_LEARN 1
809 #define FDB_MAC_LEARN 2
811 #define QLCNIC_HOST_REQUEST 0x13
812 #define QLCNIC_REQUEST 0x14
814 #define QLCNIC_MAC_EVENT 0x1
816 #define QLCNIC_IP_UP 2
817 #define QLCNIC_IP_DOWN 3
819 #define QLCNIC_ILB_MODE 0x1
820 #define QLCNIC_ELB_MODE 0x2
821 #define QLCNIC_LB_MODE_MASK 0x3
823 #define QLCNIC_LINKEVENT 0x1
824 #define QLCNIC_LB_RESPONSE 0x2
825 #define QLCNIC_IS_LB_CONFIGURED(VAL) \
826 (VAL == (QLCNIC_LINKEVENT | QLCNIC_LB_RESPONSE))
829 * Driver --> Firmware
831 #define QLCNIC_H2C_OPCODE_CONFIG_RSS 0x1
832 #define QLCNIC_H2C_OPCODE_CONFIG_INTR_COALESCE 0x3
833 #define QLCNIC_H2C_OPCODE_CONFIG_LED 0x4
834 #define QLCNIC_H2C_OPCODE_LRO_REQUEST 0x7
835 #define QLCNIC_H2C_OPCODE_SET_MAC_RECEIVE_MODE 0xc
836 #define QLCNIC_H2C_OPCODE_CONFIG_IPADDR 0x12
838 #define QLCNIC_H2C_OPCODE_GET_LINKEVENT 0x15
839 #define QLCNIC_H2C_OPCODE_CONFIG_BRIDGING 0x17
840 #define QLCNIC_H2C_OPCODE_CONFIG_HW_LRO 0x18
841 #define QLCNIC_H2C_OPCODE_CONFIG_LOOPBACK 0x13
844 * Firmware --> Driver
847 #define QLCNIC_C2H_OPCODE_CONFIG_LOOPBACK 0x8f
848 #define QLCNIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE 0x8D
849 #define QLCNIC_C2H_OPCODE_GET_DCB_AEN 0x90
851 #define VPORT_MISS_MODE_DROP 0 /* drop all unmatched */
852 #define VPORT_MISS_MODE_ACCEPT_ALL 1 /* accept all packets */
853 #define VPORT_MISS_MODE_ACCEPT_MULTI 2 /* accept unmatched multicast */
855 #define QLCNIC_LRO_REQUEST_CLEANUP 4
857 /* Capabilites received */
858 #define QLCNIC_FW_CAPABILITY_TSO BIT_1
859 #define QLCNIC_FW_CAPABILITY_BDG BIT_8
860 #define QLCNIC_FW_CAPABILITY_FVLANTX BIT_9
861 #define QLCNIC_FW_CAPABILITY_HW_LRO BIT_10
862 #define QLCNIC_FW_CAPABILITY_2_MULTI_TX BIT_4
863 #define QLCNIC_FW_CAPABILITY_MULTI_LOOPBACK BIT_27
864 #define QLCNIC_FW_CAPABILITY_MORE_CAPS BIT_31
866 #define QLCNIC_FW_CAPABILITY_2_LRO_MAX_TCP_SEG BIT_2
867 #define QLCNIC_FW_CAP2_HW_LRO_IPV6 BIT_3
868 #define QLCNIC_FW_CAPABILITY_SET_DRV_VER BIT_5
869 #define QLCNIC_FW_CAPABILITY_2_BEACON BIT_7
870 #define QLCNIC_FW_CAPABILITY_2_PER_PORT_ESWITCH_CFG BIT_9
873 #define LINKEVENT_MODULE_NOT_PRESENT 1
874 #define LINKEVENT_MODULE_OPTICAL_UNKNOWN 2
875 #define LINKEVENT_MODULE_OPTICAL_SRLR 3
876 #define LINKEVENT_MODULE_OPTICAL_LRM 4
877 #define LINKEVENT_MODULE_OPTICAL_SFP_1G 5
878 #define LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE 6
879 #define LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN 7
880 #define LINKEVENT_MODULE_TWINAX 8
882 #define LINKSPEED_10GBPS 10000
883 #define LINKSPEED_1GBPS 1000
884 #define LINKSPEED_100MBPS 100
885 #define LINKSPEED_10MBPS 10
887 #define LINKSPEED_ENCODED_10MBPS 0
888 #define LINKSPEED_ENCODED_100MBPS 1
889 #define LINKSPEED_ENCODED_1GBPS 2
891 #define LINKEVENT_AUTONEG_DISABLED 0
892 #define LINKEVENT_AUTONEG_ENABLED 1
894 #define LINKEVENT_HALF_DUPLEX 0
895 #define LINKEVENT_FULL_DUPLEX 1
897 #define LINKEVENT_LINKSPEED_MBPS 0
898 #define LINKEVENT_LINKSPEED_ENCODED 1
900 /* firmware response header:
901 * 63:58 - message type
905 * 47:40 - completion id
910 #define qlcnic_get_nic_msg_opcode(msg_hdr) \
911 ((msg_hdr >> 32) & 0xFF)
913 struct qlcnic_fw_msg {
923 struct qlcnic_nic_req {
929 struct qlcnic_mac_req {
935 struct qlcnic_vlan_req {
940 struct qlcnic_ipaddr {
945 #define QLCNIC_MSI_ENABLED 0x02
946 #define QLCNIC_MSIX_ENABLED 0x04
947 #define QLCNIC_LRO_ENABLED 0x01
948 #define QLCNIC_LRO_DISABLED 0x00
949 #define QLCNIC_BRIDGE_ENABLED 0X10
950 #define QLCNIC_DIAG_ENABLED 0x20
951 #define QLCNIC_ESWITCH_ENABLED 0x40
952 #define QLCNIC_ADAPTER_INITIALIZED 0x80
953 #define QLCNIC_TAGGING_ENABLED 0x100
954 #define QLCNIC_MACSPOOF 0x200
955 #define QLCNIC_MAC_OVERRIDE_DISABLED 0x400
956 #define QLCNIC_PROMISC_DISABLED 0x800
957 #define QLCNIC_NEED_FLR 0x1000
958 #define QLCNIC_FW_RESET_OWNER 0x2000
959 #define QLCNIC_FW_HANG 0x4000
960 #define QLCNIC_FW_LRO_MSS_CAP 0x8000
961 #define QLCNIC_TX_INTR_SHARED 0x10000
962 #define QLCNIC_APP_CHANGED_FLAGS 0x20000
963 #define QLCNIC_HAS_PHYS_PORT_ID 0x40000
965 #define QLCNIC_IS_MSI_FAMILY(adapter) \
966 ((adapter)->flags & (QLCNIC_MSI_ENABLED | QLCNIC_MSIX_ENABLED))
967 #define QLCNIC_IS_TSO_CAPABLE(adapter) \
968 ((adapter)->ahw->capabilities & QLCNIC_FW_CAPABILITY_TSO)
970 #define QLCNIC_BEACON_EANBLE 0xC
971 #define QLCNIC_BEACON_DISABLE 0xD
973 #define QLCNIC_MSIX_TBL_SPACE 8192
974 #define QLCNIC_PCI_REG_MSIX_TBL 0x44
975 #define QLCNIC_MSIX_TBL_PGSIZE 4096
977 #define QLCNIC_ADAPTER_UP_MAGIC 777
979 #define __QLCNIC_FW_ATTACHED 0
980 #define __QLCNIC_DEV_UP 1
981 #define __QLCNIC_RESETTING 2
982 #define __QLCNIC_START_FW 4
983 #define __QLCNIC_AER 5
984 #define __QLCNIC_DIAG_RES_ALLOC 6
985 #define __QLCNIC_LED_ENABLE 7
986 #define __QLCNIC_ELB_INPROGRESS 8
987 #define __QLCNIC_MULTI_TX_UNIQUE 9
988 #define __QLCNIC_SRIOV_ENABLE 10
989 #define __QLCNIC_SRIOV_CAPABLE 11
990 #define __QLCNIC_MBX_POLL_ENABLE 12
991 #define __QLCNIC_DIAG_MODE 13
992 #define __QLCNIC_MAINTENANCE_MODE 16
994 #define QLCNIC_INTERRUPT_TEST 1
995 #define QLCNIC_LOOPBACK_TEST 2
996 #define QLCNIC_LED_TEST 3
998 #define QLCNIC_FILTER_AGE 80
999 #define QLCNIC_READD_AGE 20
1000 #define QLCNIC_LB_MAX_FILTERS 64
1001 #define QLCNIC_LB_BUCKET_SIZE 32
1002 #define QLCNIC_ILB_MAX_RCV_LOOP 10
1004 struct qlcnic_filter {
1005 struct hlist_node fnode;
1008 unsigned long ftime;
1011 struct qlcnic_filter_hash {
1012 struct hlist_head *fhead;
1018 /* Mailbox specific data structures */
1019 struct qlcnic_mailbox {
1020 struct workqueue_struct *work_q;
1021 struct qlcnic_adapter *adapter;
1022 struct qlcnic_mbx_ops *ops;
1023 struct work_struct work;
1024 struct completion completion;
1025 struct list_head cmd_q;
1026 unsigned long status;
1027 spinlock_t queue_lock; /* Mailbox queue lock */
1028 spinlock_t aen_lock; /* Mailbox response/AEN lock */
1029 atomic_t rsp_status;
1033 struct qlcnic_adapter {
1034 struct qlcnic_hardware_context *ahw;
1035 struct qlcnic_recv_context *recv_ctx;
1036 struct qlcnic_host_tx_ring *tx_ring;
1037 struct net_device *netdev;
1038 struct pci_dev *pdev;
1040 unsigned long state;
1051 u8 max_sds_rings; /* max sds rings supported by adapter */
1052 u8 max_tx_rings; /* max tx rings supported by adapter */
1054 u8 drv_tx_rings; /* max tx rings supported by driver */
1055 u8 drv_sds_rings; /* max sds rings supported by driver */
1077 u8 mac_addr[ETH_ALEN];
1083 unsigned long vlans[BITS_TO_LONGS(VLAN_N_VID)];
1085 struct qlcnic_npar_info *npars;
1086 struct qlcnic_eswitch *eswitch;
1087 struct qlcnic_nic_template *nic_ops;
1089 struct qlcnic_adapter_stats stats;
1090 struct list_head mac_list;
1092 void __iomem *tgt_mask_reg;
1093 void __iomem *tgt_status_reg;
1094 void __iomem *crb_int_state_reg;
1095 void __iomem *isr_int_vec;
1097 struct msix_entry *msix_entries;
1098 struct workqueue_struct *qlcnic_wq;
1099 struct delayed_work fw_work;
1100 struct delayed_work idc_aen_work;
1101 struct delayed_work mbx_poll_work;
1102 struct qlcnic_dcb *dcb;
1104 struct qlcnic_filter_hash fhash;
1105 struct qlcnic_filter_hash rx_fhash;
1106 struct list_head vf_mc_list;
1108 spinlock_t mac_learn_lock;
1109 /* spinlock for catching rcv filters for eswitch traffic */
1110 spinlock_t rx_mac_learn_lock;
1111 u32 file_prd_off; /*File fw product offset*/
1114 const struct firmware *fw;
1117 struct qlcnic_info_le {
1119 __le16 op_mode; /* 1 = Priv, 2 = NP, 3 = NP passthru */
1121 __le16 switch_mode; /* 0 = disabled, 1 = int, 2 = ext */
1123 __le32 capabilities;
1133 __le16 max_bw_reg_offset;
1134 __le16 max_linkspeed_reg_offset;
1138 __le16 max_tx_mac_filters;
1139 __le16 max_rx_mcast_mac_filters;
1140 __le16 max_rx_ucast_mac_filters;
1141 __le16 max_rx_ip_addr;
1142 __le16 max_rx_lro_flow;
1143 __le16 max_rx_status_rings;
1144 __le16 max_rx_buf_rings;
1145 __le16 max_tx_vlan_keys;
1147 u8 total_rss_engines;
1149 __le16 linkstate_reg_offset;
1151 __le16 max_local_ipv6_addrs;
1152 __le16 max_remote_ipv6_addrs;
1156 struct qlcnic_info {
1169 u16 max_bw_reg_offset;
1170 u16 max_linkspeed_reg_offset;
1174 u16 max_tx_mac_filters;
1175 u16 max_rx_mcast_mac_filters;
1176 u16 max_rx_ucast_mac_filters;
1178 u16 max_rx_lro_flow;
1179 u16 max_rx_status_rings;
1180 u16 max_rx_buf_rings;
1181 u16 max_tx_vlan_keys;
1183 u8 total_rss_engines;
1185 u16 linkstate_reg_offset;
1187 u16 max_local_ipv6_addrs;
1188 u16 max_remote_ipv6_addrs;
1191 struct qlcnic_pci_info_le {
1192 __le16 id; /* pci function id */
1193 __le16 active; /* 1 = Enabled */
1194 __le16 type; /* 1 = NIC, 2 = FCoE, 3 = iSCSI */
1195 __le16 default_port; /* default port number */
1197 __le16 tx_min_bw; /* Multiple of 100mbpc */
1199 __le16 reserved1[2];
1207 struct qlcnic_pci_info {
1218 struct qlcnic_npar_info {
1219 bool eswitch_status;
1237 struct qlcnic_eswitch {
1241 u8 active_ucast_filters;
1242 u8 max_ucast_filters;
1243 u8 max_active_vlans;
1246 #define QLCNIC_SWITCH_ENABLE BIT_1
1247 #define QLCNIC_SWITCH_VLAN_FILTERING BIT_2
1248 #define QLCNIC_SWITCH_PROMISC_MODE BIT_3
1249 #define QLCNIC_SWITCH_PORT_MIRRORING BIT_4
1253 /* Return codes for Error handling */
1254 #define QL_STATUS_INVALID_PARAM -1
1256 #define MAX_BW 100 /* % of link speed */
1257 #define MAX_VLAN_ID 4095
1258 #define MIN_VLAN_ID 2
1259 #define DEFAULT_MAC_LEARN 1
1261 #define IS_VALID_VLAN(vlan) (vlan >= MIN_VLAN_ID && vlan < MAX_VLAN_ID)
1262 #define IS_VALID_BW(bw) (bw <= MAX_BW)
1264 struct qlcnic_pci_func_cfg {
1271 u8 def_mac_addr[ETH_ALEN];
1274 struct qlcnic_npar_func_cfg {
1285 struct qlcnic_pm_func_cfg {
1292 struct qlcnic_esw_func_cfg {
1306 #define QLCNIC_STATS_VERSION 1
1307 #define QLCNIC_STATS_PORT 1
1308 #define QLCNIC_STATS_ESWITCH 2
1309 #define QLCNIC_QUERY_RX_COUNTER 0
1310 #define QLCNIC_QUERY_TX_COUNTER 1
1311 #define QLCNIC_STATS_NOT_AVAIL 0xffffffffffffffffULL
1312 #define QLCNIC_FILL_STATS(VAL1) \
1313 (((VAL1) == QLCNIC_STATS_NOT_AVAIL) ? 0 : VAL1)
1314 #define QLCNIC_MAC_STATS 1
1315 #define QLCNIC_ESW_STATS 2
1317 #define QLCNIC_ADD_ESW_STATS(VAL1, VAL2)\
1319 if (((VAL1) == QLCNIC_STATS_NOT_AVAIL) && \
1320 ((VAL2) != QLCNIC_STATS_NOT_AVAIL)) \
1322 else if (((VAL1) != QLCNIC_STATS_NOT_AVAIL) && \
1323 ((VAL2) != QLCNIC_STATS_NOT_AVAIL)) \
1327 struct qlcnic_mac_statistics_le {
1328 __le64 mac_tx_frames;
1329 __le64 mac_tx_bytes;
1330 __le64 mac_tx_mcast_pkts;
1331 __le64 mac_tx_bcast_pkts;
1332 __le64 mac_tx_pause_cnt;
1333 __le64 mac_tx_ctrl_pkt;
1334 __le64 mac_tx_lt_64b_pkts;
1335 __le64 mac_tx_lt_127b_pkts;
1336 __le64 mac_tx_lt_255b_pkts;
1337 __le64 mac_tx_lt_511b_pkts;
1338 __le64 mac_tx_lt_1023b_pkts;
1339 __le64 mac_tx_lt_1518b_pkts;
1340 __le64 mac_tx_gt_1518b_pkts;
1343 __le64 mac_rx_frames;
1344 __le64 mac_rx_bytes;
1345 __le64 mac_rx_mcast_pkts;
1346 __le64 mac_rx_bcast_pkts;
1347 __le64 mac_rx_pause_cnt;
1348 __le64 mac_rx_ctrl_pkt;
1349 __le64 mac_rx_lt_64b_pkts;
1350 __le64 mac_rx_lt_127b_pkts;
1351 __le64 mac_rx_lt_255b_pkts;
1352 __le64 mac_rx_lt_511b_pkts;
1353 __le64 mac_rx_lt_1023b_pkts;
1354 __le64 mac_rx_lt_1518b_pkts;
1355 __le64 mac_rx_gt_1518b_pkts;
1358 __le64 mac_rx_length_error;
1359 __le64 mac_rx_length_small;
1360 __le64 mac_rx_length_large;
1361 __le64 mac_rx_jabber;
1362 __le64 mac_rx_dropped;
1363 __le64 mac_rx_crc_error;
1364 __le64 mac_align_error;
1367 struct qlcnic_mac_statistics {
1370 u64 mac_tx_mcast_pkts;
1371 u64 mac_tx_bcast_pkts;
1372 u64 mac_tx_pause_cnt;
1373 u64 mac_tx_ctrl_pkt;
1374 u64 mac_tx_lt_64b_pkts;
1375 u64 mac_tx_lt_127b_pkts;
1376 u64 mac_tx_lt_255b_pkts;
1377 u64 mac_tx_lt_511b_pkts;
1378 u64 mac_tx_lt_1023b_pkts;
1379 u64 mac_tx_lt_1518b_pkts;
1380 u64 mac_tx_gt_1518b_pkts;
1384 u64 mac_rx_mcast_pkts;
1385 u64 mac_rx_bcast_pkts;
1386 u64 mac_rx_pause_cnt;
1387 u64 mac_rx_ctrl_pkt;
1388 u64 mac_rx_lt_64b_pkts;
1389 u64 mac_rx_lt_127b_pkts;
1390 u64 mac_rx_lt_255b_pkts;
1391 u64 mac_rx_lt_511b_pkts;
1392 u64 mac_rx_lt_1023b_pkts;
1393 u64 mac_rx_lt_1518b_pkts;
1394 u64 mac_rx_gt_1518b_pkts;
1396 u64 mac_rx_length_error;
1397 u64 mac_rx_length_small;
1398 u64 mac_rx_length_large;
1401 u64 mac_rx_crc_error;
1402 u64 mac_align_error;
1405 struct qlcnic_esw_stats_le {
1410 __le64 unicast_frames;
1411 __le64 multicast_frames;
1412 __le64 broadcast_frames;
1413 __le64 dropped_frames;
1415 __le64 local_frames;
1420 struct __qlcnic_esw_statistics {
1426 u64 multicast_frames;
1427 u64 broadcast_frames;
1435 struct qlcnic_esw_statistics {
1436 struct __qlcnic_esw_statistics rx;
1437 struct __qlcnic_esw_statistics tx;
1440 #define QLCNIC_FORCE_FW_DUMP_KEY 0xdeadfeed
1441 #define QLCNIC_ENABLE_FW_DUMP 0xaddfeed
1442 #define QLCNIC_DISABLE_FW_DUMP 0xbadfeed
1443 #define QLCNIC_FORCE_FW_RESET 0xdeaddead
1444 #define QLCNIC_SET_QUIESCENT 0xadd00010
1445 #define QLCNIC_RESET_QUIESCENT 0xadd00020
1452 struct qlcnic_cmd_args {
1453 struct completion completion;
1454 struct list_head list;
1455 struct _cdrp_cmd req;
1456 struct _cdrp_cmd rsp;
1457 atomic_t rsp_status;
1464 u32 *hdr; /* Back channel message header */
1465 u32 *pay; /* Back channel message payload */
1469 int qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter);
1470 int qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config);
1471 int qlcnic_pci_mem_write_2M(struct qlcnic_adapter *, u64 off, u64 data);
1472 int qlcnic_pci_mem_read_2M(struct qlcnic_adapter *, u64 off, u64 *data);
1473 void qlcnic_pci_camqm_read_2M(struct qlcnic_adapter *, u64, u64 *);
1474 void qlcnic_pci_camqm_write_2M(struct qlcnic_adapter *, u64, u64);
1476 #define ADDR_IN_RANGE(addr, low, high) \
1477 (((addr) < (high)) && ((addr) >= (low)))
1479 #define QLCRD32(adapter, off, err) \
1480 (adapter->ahw->hw_ops->read_reg)(adapter, off, err)
1482 #define QLCWR32(adapter, off, val) \
1483 adapter->ahw->hw_ops->write_reg(adapter, off, val)
1485 int qlcnic_pcie_sem_lock(struct qlcnic_adapter *, int, u32);
1486 void qlcnic_pcie_sem_unlock(struct qlcnic_adapter *, int);
1488 #define qlcnic_rom_lock(a) \
1489 qlcnic_pcie_sem_lock((a), 2, QLCNIC_ROM_LOCK_ID)
1490 #define qlcnic_rom_unlock(a) \
1491 qlcnic_pcie_sem_unlock((a), 2)
1492 #define qlcnic_phy_lock(a) \
1493 qlcnic_pcie_sem_lock((a), 3, QLCNIC_PHY_LOCK_ID)
1494 #define qlcnic_phy_unlock(a) \
1495 qlcnic_pcie_sem_unlock((a), 3)
1496 #define qlcnic_sw_lock(a) \
1497 qlcnic_pcie_sem_lock((a), 6, 0)
1498 #define qlcnic_sw_unlock(a) \
1499 qlcnic_pcie_sem_unlock((a), 6)
1500 #define crb_win_lock(a) \
1501 qlcnic_pcie_sem_lock((a), 7, QLCNIC_CRB_WIN_LOCK_ID)
1502 #define crb_win_unlock(a) \
1503 qlcnic_pcie_sem_unlock((a), 7)
1505 #define __QLCNIC_MAX_LED_RATE 0xf
1506 #define __QLCNIC_MAX_LED_STATE 0x2
1508 #define MAX_CTL_CHECK 1000
1510 int qlcnic_wol_supported(struct qlcnic_adapter *adapter);
1511 void qlcnic_prune_lb_filters(struct qlcnic_adapter *adapter);
1512 void qlcnic_delete_lb_filters(struct qlcnic_adapter *adapter);
1513 int qlcnic_dump_fw(struct qlcnic_adapter *);
1514 int qlcnic_enable_fw_dump_state(struct qlcnic_adapter *);
1515 bool qlcnic_check_fw_dump_state(struct qlcnic_adapter *);
1516 pci_ers_result_t qlcnic_82xx_io_error_detected(struct pci_dev *,
1517 pci_channel_state_t);
1518 pci_ers_result_t qlcnic_82xx_io_slot_reset(struct pci_dev *);
1519 void qlcnic_82xx_io_resume(struct pci_dev *);
1521 /* Functions from qlcnic_init.c */
1522 void qlcnic_schedule_work(struct qlcnic_adapter *, work_func_t, int);
1523 int qlcnic_load_firmware(struct qlcnic_adapter *adapter);
1524 int qlcnic_need_fw_reset(struct qlcnic_adapter *adapter);
1525 void qlcnic_request_firmware(struct qlcnic_adapter *adapter);
1526 void qlcnic_release_firmware(struct qlcnic_adapter *adapter);
1527 int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter);
1528 int qlcnic_setup_idc_param(struct qlcnic_adapter *adapter);
1529 int qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter);
1531 int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp);
1532 int qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
1533 u8 *bytes, size_t size);
1534 int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter);
1535 void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter);
1537 void __iomem *qlcnic_get_ioaddr(struct qlcnic_hardware_context *, u32);
1539 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter);
1540 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter);
1542 int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter);
1543 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter);
1545 void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter);
1546 void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter);
1547 void qlcnic_release_tx_buffers(struct qlcnic_adapter *,
1548 struct qlcnic_host_tx_ring *);
1550 int qlcnic_check_fw_status(struct qlcnic_adapter *adapter);
1551 void qlcnic_watchdog_task(struct work_struct *work);
1552 void qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter,
1553 struct qlcnic_host_rds_ring *rds_ring, u8 ring_id);
1554 int qlcnic_process_rcv_ring(struct qlcnic_host_sds_ring *sds_ring, int max);
1555 void qlcnic_set_multi(struct net_device *netdev);
1556 void __qlcnic_set_multi(struct net_device *, u16);
1557 int qlcnic_nic_add_mac(struct qlcnic_adapter *, const u8 *, u16);
1558 int qlcnic_nic_del_mac(struct qlcnic_adapter *, const u8 *);
1559 void qlcnic_82xx_free_mac_list(struct qlcnic_adapter *adapter);
1560 int qlcnic_82xx_read_phys_port_id(struct qlcnic_adapter *);
1562 int qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu);
1563 int qlcnic_fw_cmd_set_drv_version(struct qlcnic_adapter *, u32);
1564 int qlcnic_change_mtu(struct net_device *netdev, int new_mtu);
1565 netdev_features_t qlcnic_fix_features(struct net_device *netdev,
1566 netdev_features_t features);
1567 int qlcnic_set_features(struct net_device *netdev, netdev_features_t features);
1568 int qlcnic_config_bridged_mode(struct qlcnic_adapter *adapter, u32 enable);
1569 int qlcnic_send_lro_cleanup(struct qlcnic_adapter *adapter);
1570 void qlcnic_update_cmd_producer(struct qlcnic_host_tx_ring *);
1572 /* Functions from qlcnic_ethtool.c */
1573 int qlcnic_check_loopback_buff(unsigned char *, u8 []);
1574 int qlcnic_do_lb_test(struct qlcnic_adapter *, u8);
1575 int qlcnic_loopback_test(struct net_device *, u8);
1577 /* Functions from qlcnic_main.c */
1578 int qlcnic_reset_context(struct qlcnic_adapter *);
1579 void qlcnic_diag_free_res(struct net_device *netdev, int);
1580 int qlcnic_diag_alloc_res(struct net_device *netdev, int);
1581 netdev_tx_t qlcnic_xmit_frame(struct sk_buff *, struct net_device *);
1582 void qlcnic_set_tx_ring_count(struct qlcnic_adapter *, u8);
1583 void qlcnic_set_sds_ring_count(struct qlcnic_adapter *, u8);
1584 int qlcnic_setup_rings(struct qlcnic_adapter *, u8, u8);
1585 int qlcnic_validate_rings(struct qlcnic_adapter *, __u32, int);
1586 void qlcnic_alloc_lb_filters_mem(struct qlcnic_adapter *adapter);
1587 void qlcnic_82xx_set_mac_filter_count(struct qlcnic_adapter *);
1588 int qlcnic_enable_msix(struct qlcnic_adapter *, u32);
1589 void qlcnic_set_drv_version(struct qlcnic_adapter *);
1591 /* eSwitch management functions */
1592 int qlcnic_config_switch_port(struct qlcnic_adapter *,
1593 struct qlcnic_esw_func_cfg *);
1595 int qlcnic_get_eswitch_port_config(struct qlcnic_adapter *,
1596 struct qlcnic_esw_func_cfg *);
1597 int qlcnic_config_port_mirroring(struct qlcnic_adapter *, u8, u8, u8);
1598 int qlcnic_get_port_stats(struct qlcnic_adapter *, const u8, const u8,
1599 struct __qlcnic_esw_statistics *);
1600 int qlcnic_get_eswitch_stats(struct qlcnic_adapter *, const u8, u8,
1601 struct __qlcnic_esw_statistics *);
1602 int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, u8, u8, u8);
1603 int qlcnic_get_mac_stats(struct qlcnic_adapter *, struct qlcnic_mac_statistics *);
1605 void qlcnic_free_mbx_args(struct qlcnic_cmd_args *cmd);
1607 int qlcnic_alloc_sds_rings(struct qlcnic_recv_context *, int);
1608 void qlcnic_free_sds_rings(struct qlcnic_recv_context *);
1609 void qlcnic_advert_link_change(struct qlcnic_adapter *, int);
1610 void qlcnic_free_tx_rings(struct qlcnic_adapter *);
1611 int qlcnic_alloc_tx_rings(struct qlcnic_adapter *, struct net_device *);
1612 void qlcnic_dump_mbx(struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1614 void qlcnic_create_sysfs_entries(struct qlcnic_adapter *adapter);
1615 void qlcnic_remove_sysfs_entries(struct qlcnic_adapter *adapter);
1616 void qlcnic_create_diag_entries(struct qlcnic_adapter *adapter);
1617 void qlcnic_remove_diag_entries(struct qlcnic_adapter *adapter);
1618 void qlcnic_82xx_add_sysfs(struct qlcnic_adapter *adapter);
1619 void qlcnic_82xx_remove_sysfs(struct qlcnic_adapter *adapter);
1620 int qlcnic_82xx_get_settings(struct qlcnic_adapter *, struct ethtool_cmd *);
1622 int qlcnicvf_config_bridged_mode(struct qlcnic_adapter *, u32);
1623 int qlcnicvf_config_led(struct qlcnic_adapter *, u32, u32);
1624 void qlcnic_set_vlan_config(struct qlcnic_adapter *,
1625 struct qlcnic_esw_func_cfg *);
1626 void qlcnic_set_eswitch_port_features(struct qlcnic_adapter *,
1627 struct qlcnic_esw_func_cfg *);
1629 void qlcnic_down(struct qlcnic_adapter *, struct net_device *);
1630 int qlcnic_up(struct qlcnic_adapter *, struct net_device *);
1631 void __qlcnic_down(struct qlcnic_adapter *, struct net_device *);
1632 void qlcnic_detach(struct qlcnic_adapter *);
1633 void qlcnic_teardown_intr(struct qlcnic_adapter *);
1634 int qlcnic_attach(struct qlcnic_adapter *);
1635 int __qlcnic_up(struct qlcnic_adapter *, struct net_device *);
1636 void qlcnic_restore_indev_addr(struct net_device *, unsigned long);
1638 int qlcnic_check_temp(struct qlcnic_adapter *);
1639 int qlcnic_init_pci_info(struct qlcnic_adapter *);
1640 int qlcnic_set_default_offload_settings(struct qlcnic_adapter *);
1641 int qlcnic_reset_npar_config(struct qlcnic_adapter *);
1642 int qlcnic_set_eswitch_port_config(struct qlcnic_adapter *);
1643 void qlcnic_add_lb_filter(struct qlcnic_adapter *, struct sk_buff *, int, u16);
1644 int qlcnic_get_beacon_state(struct qlcnic_adapter *, u8 *);
1645 int qlcnic_83xx_configure_opmode(struct qlcnic_adapter *adapter);
1646 int qlcnic_read_mac_addr(struct qlcnic_adapter *);
1647 int qlcnic_setup_netdev(struct qlcnic_adapter *, struct net_device *, int);
1648 void qlcnic_set_netdev_features(struct qlcnic_adapter *,
1649 struct qlcnic_esw_func_cfg *);
1650 void qlcnic_sriov_vf_schedule_multi(struct net_device *);
1651 int qlcnic_is_valid_nic_func(struct qlcnic_adapter *, u8);
1652 int qlcnic_get_pci_func_type(struct qlcnic_adapter *, u16, u16 *, u16 *,
1656 * QLOGIC Board information
1659 #define QLCNIC_MAX_BOARD_NAME_LEN 100
1660 struct qlcnic_board_info {
1661 unsigned short vendor;
1662 unsigned short device;
1663 unsigned short sub_vendor;
1664 unsigned short sub_device;
1665 char short_name[QLCNIC_MAX_BOARD_NAME_LEN];
1668 static inline u32 qlcnic_tx_avail(struct qlcnic_host_tx_ring *tx_ring)
1670 if (likely(tx_ring->producer < tx_ring->sw_consumer))
1671 return tx_ring->sw_consumer - tx_ring->producer;
1673 return tx_ring->sw_consumer + tx_ring->num_desc -
1677 static inline int qlcnic_set_real_num_queues(struct qlcnic_adapter *adapter,
1678 struct net_device *netdev)
1682 netdev->num_tx_queues = adapter->drv_tx_rings;
1683 netdev->real_num_tx_queues = adapter->drv_tx_rings;
1685 err = netif_set_real_num_tx_queues(netdev, adapter->drv_tx_rings);
1687 dev_err(&adapter->pdev->dev, "failed to set %d Tx queues\n",
1688 adapter->drv_tx_rings);
1690 dev_info(&adapter->pdev->dev, "Set %d Tx queues\n",
1691 adapter->drv_tx_rings);
1696 struct qlcnic_nic_template {
1697 int (*config_bridged_mode) (struct qlcnic_adapter *, u32);
1698 int (*config_led) (struct qlcnic_adapter *, u32, u32);
1699 int (*start_firmware) (struct qlcnic_adapter *);
1700 int (*init_driver) (struct qlcnic_adapter *);
1701 void (*request_reset) (struct qlcnic_adapter *, u32);
1702 void (*cancel_idc_work) (struct qlcnic_adapter *);
1703 int (*napi_add)(struct qlcnic_adapter *, struct net_device *);
1704 void (*napi_del)(struct qlcnic_adapter *);
1705 void (*config_ipaddr)(struct qlcnic_adapter *, __be32, int);
1706 irqreturn_t (*clear_legacy_intr)(struct qlcnic_adapter *);
1707 int (*shutdown)(struct pci_dev *);
1708 int (*resume)(struct qlcnic_adapter *);
1711 struct qlcnic_mbx_ops {
1712 int (*enqueue_cmd) (struct qlcnic_adapter *,
1713 struct qlcnic_cmd_args *, unsigned long *);
1714 void (*dequeue_cmd) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1715 void (*decode_resp) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1716 void (*encode_cmd) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1717 void (*nofity_fw) (struct qlcnic_adapter *, u8);
1720 int qlcnic_83xx_init_mailbox_work(struct qlcnic_adapter *);
1721 void qlcnic_83xx_detach_mailbox_work(struct qlcnic_adapter *);
1722 void qlcnic_83xx_reinit_mbx_work(struct qlcnic_mailbox *mbx);
1723 void qlcnic_83xx_free_mailbox(struct qlcnic_mailbox *mbx);
1725 /* Adapter hardware abstraction */
1726 struct qlcnic_hardware_ops {
1727 void (*read_crb) (struct qlcnic_adapter *, char *, loff_t, size_t);
1728 void (*write_crb) (struct qlcnic_adapter *, char *, loff_t, size_t);
1729 int (*read_reg) (struct qlcnic_adapter *, ulong, int *);
1730 int (*write_reg) (struct qlcnic_adapter *, ulong, u32);
1731 void (*get_ocm_win) (struct qlcnic_hardware_context *);
1732 int (*get_mac_address) (struct qlcnic_adapter *, u8 *, u8);
1733 int (*setup_intr) (struct qlcnic_adapter *);
1734 int (*alloc_mbx_args)(struct qlcnic_cmd_args *,
1735 struct qlcnic_adapter *, u32);
1736 int (*mbx_cmd) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1737 void (*get_func_no) (struct qlcnic_adapter *);
1738 int (*api_lock) (struct qlcnic_adapter *);
1739 void (*api_unlock) (struct qlcnic_adapter *);
1740 void (*add_sysfs) (struct qlcnic_adapter *);
1741 void (*remove_sysfs) (struct qlcnic_adapter *);
1742 void (*process_lb_rcv_ring_diag) (struct qlcnic_host_sds_ring *);
1743 int (*create_rx_ctx) (struct qlcnic_adapter *);
1744 int (*create_tx_ctx) (struct qlcnic_adapter *,
1745 struct qlcnic_host_tx_ring *, int);
1746 void (*del_rx_ctx) (struct qlcnic_adapter *);
1747 void (*del_tx_ctx) (struct qlcnic_adapter *,
1748 struct qlcnic_host_tx_ring *);
1749 int (*setup_link_event) (struct qlcnic_adapter *, int);
1750 int (*get_nic_info) (struct qlcnic_adapter *, struct qlcnic_info *, u8);
1751 int (*get_pci_info) (struct qlcnic_adapter *, struct qlcnic_pci_info *);
1752 int (*set_nic_info) (struct qlcnic_adapter *, struct qlcnic_info *);
1753 int (*change_macvlan) (struct qlcnic_adapter *, u8*, u16, u8);
1754 void (*napi_enable) (struct qlcnic_adapter *);
1755 void (*napi_disable) (struct qlcnic_adapter *);
1756 void (*config_intr_coal) (struct qlcnic_adapter *);
1757 int (*config_rss) (struct qlcnic_adapter *, int);
1758 int (*config_hw_lro) (struct qlcnic_adapter *, int);
1759 int (*config_loopback) (struct qlcnic_adapter *, u8);
1760 int (*clear_loopback) (struct qlcnic_adapter *, u8);
1761 int (*config_promisc_mode) (struct qlcnic_adapter *, u32);
1762 void (*change_l2_filter) (struct qlcnic_adapter *, u64 *, u16);
1763 int (*get_board_info) (struct qlcnic_adapter *);
1764 void (*set_mac_filter_count) (struct qlcnic_adapter *);
1765 void (*free_mac_list) (struct qlcnic_adapter *);
1766 int (*read_phys_port_id) (struct qlcnic_adapter *);
1767 pci_ers_result_t (*io_error_detected) (struct pci_dev *,
1768 pci_channel_state_t);
1769 pci_ers_result_t (*io_slot_reset) (struct pci_dev *);
1770 void (*io_resume) (struct pci_dev *);
1773 extern struct qlcnic_nic_template qlcnic_vf_ops;
1775 static inline int qlcnic_start_firmware(struct qlcnic_adapter *adapter)
1777 return adapter->nic_ops->start_firmware(adapter);
1780 static inline void qlcnic_read_crb(struct qlcnic_adapter *adapter, char *buf,
1781 loff_t offset, size_t size)
1783 adapter->ahw->hw_ops->read_crb(adapter, buf, offset, size);
1786 static inline void qlcnic_write_crb(struct qlcnic_adapter *adapter, char *buf,
1787 loff_t offset, size_t size)
1789 adapter->ahw->hw_ops->write_crb(adapter, buf, offset, size);
1792 static inline int qlcnic_hw_write_wx_2M(struct qlcnic_adapter *adapter,
1793 ulong off, u32 data)
1795 return adapter->ahw->hw_ops->write_reg(adapter, off, data);
1798 static inline int qlcnic_get_mac_address(struct qlcnic_adapter *adapter,
1799 u8 *mac, u8 function)
1801 return adapter->ahw->hw_ops->get_mac_address(adapter, mac, function);
1804 static inline int qlcnic_setup_intr(struct qlcnic_adapter *adapter)
1806 return adapter->ahw->hw_ops->setup_intr(adapter);
1809 static inline int qlcnic_alloc_mbx_args(struct qlcnic_cmd_args *mbx,
1810 struct qlcnic_adapter *adapter, u32 arg)
1812 return adapter->ahw->hw_ops->alloc_mbx_args(mbx, adapter, arg);
1815 static inline int qlcnic_issue_cmd(struct qlcnic_adapter *adapter,
1816 struct qlcnic_cmd_args *cmd)
1818 if (adapter->ahw->hw_ops->mbx_cmd)
1819 return adapter->ahw->hw_ops->mbx_cmd(adapter, cmd);
1824 static inline void qlcnic_get_func_no(struct qlcnic_adapter *adapter)
1826 adapter->ahw->hw_ops->get_func_no(adapter);
1829 static inline int qlcnic_api_lock(struct qlcnic_adapter *adapter)
1831 return adapter->ahw->hw_ops->api_lock(adapter);
1834 static inline void qlcnic_api_unlock(struct qlcnic_adapter *adapter)
1836 adapter->ahw->hw_ops->api_unlock(adapter);
1839 static inline void qlcnic_add_sysfs(struct qlcnic_adapter *adapter)
1841 if (adapter->ahw->hw_ops->add_sysfs)
1842 adapter->ahw->hw_ops->add_sysfs(adapter);
1845 static inline void qlcnic_remove_sysfs(struct qlcnic_adapter *adapter)
1847 if (adapter->ahw->hw_ops->remove_sysfs)
1848 adapter->ahw->hw_ops->remove_sysfs(adapter);
1852 qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring)
1854 sds_ring->adapter->ahw->hw_ops->process_lb_rcv_ring_diag(sds_ring);
1857 static inline int qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
1859 return adapter->ahw->hw_ops->create_rx_ctx(adapter);
1862 static inline int qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter,
1863 struct qlcnic_host_tx_ring *ptr,
1866 return adapter->ahw->hw_ops->create_tx_ctx(adapter, ptr, ring);
1869 static inline void qlcnic_fw_cmd_del_rx_ctx(struct qlcnic_adapter *adapter)
1871 return adapter->ahw->hw_ops->del_rx_ctx(adapter);
1874 static inline void qlcnic_fw_cmd_del_tx_ctx(struct qlcnic_adapter *adapter,
1875 struct qlcnic_host_tx_ring *ptr)
1877 return adapter->ahw->hw_ops->del_tx_ctx(adapter, ptr);
1880 static inline int qlcnic_linkevent_request(struct qlcnic_adapter *adapter,
1883 return adapter->ahw->hw_ops->setup_link_event(adapter, enable);
1886 static inline int qlcnic_get_nic_info(struct qlcnic_adapter *adapter,
1887 struct qlcnic_info *info, u8 id)
1889 return adapter->ahw->hw_ops->get_nic_info(adapter, info, id);
1892 static inline int qlcnic_get_pci_info(struct qlcnic_adapter *adapter,
1893 struct qlcnic_pci_info *info)
1895 return adapter->ahw->hw_ops->get_pci_info(adapter, info);
1898 static inline int qlcnic_set_nic_info(struct qlcnic_adapter *adapter,
1899 struct qlcnic_info *info)
1901 return adapter->ahw->hw_ops->set_nic_info(adapter, info);
1904 static inline int qlcnic_sre_macaddr_change(struct qlcnic_adapter *adapter,
1905 u8 *addr, u16 id, u8 cmd)
1907 return adapter->ahw->hw_ops->change_macvlan(adapter, addr, id, cmd);
1910 static inline int qlcnic_napi_add(struct qlcnic_adapter *adapter,
1911 struct net_device *netdev)
1913 return adapter->nic_ops->napi_add(adapter, netdev);
1916 static inline void qlcnic_napi_del(struct qlcnic_adapter *adapter)
1918 adapter->nic_ops->napi_del(adapter);
1921 static inline void qlcnic_napi_enable(struct qlcnic_adapter *adapter)
1923 adapter->ahw->hw_ops->napi_enable(adapter);
1926 static inline int __qlcnic_shutdown(struct pci_dev *pdev)
1928 struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
1930 return adapter->nic_ops->shutdown(pdev);
1933 static inline int __qlcnic_resume(struct qlcnic_adapter *adapter)
1935 return adapter->nic_ops->resume(adapter);
1938 static inline void qlcnic_napi_disable(struct qlcnic_adapter *adapter)
1940 adapter->ahw->hw_ops->napi_disable(adapter);
1943 static inline void qlcnic_config_intr_coalesce(struct qlcnic_adapter *adapter)
1945 adapter->ahw->hw_ops->config_intr_coal(adapter);
1948 static inline int qlcnic_config_rss(struct qlcnic_adapter *adapter, int enable)
1950 return adapter->ahw->hw_ops->config_rss(adapter, enable);
1953 static inline int qlcnic_config_hw_lro(struct qlcnic_adapter *adapter,
1956 return adapter->ahw->hw_ops->config_hw_lro(adapter, enable);
1959 static inline int qlcnic_set_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
1961 return adapter->ahw->hw_ops->config_loopback(adapter, mode);
1964 static inline int qlcnic_clear_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
1966 return adapter->ahw->hw_ops->clear_loopback(adapter, mode);
1969 static inline int qlcnic_nic_set_promisc(struct qlcnic_adapter *adapter,
1972 return adapter->ahw->hw_ops->config_promisc_mode(adapter, mode);
1975 static inline void qlcnic_change_filter(struct qlcnic_adapter *adapter,
1978 adapter->ahw->hw_ops->change_l2_filter(adapter, addr, id);
1981 static inline int qlcnic_get_board_info(struct qlcnic_adapter *adapter)
1983 return adapter->ahw->hw_ops->get_board_info(adapter);
1986 static inline void qlcnic_free_mac_list(struct qlcnic_adapter *adapter)
1988 return adapter->ahw->hw_ops->free_mac_list(adapter);
1991 static inline void qlcnic_set_mac_filter_count(struct qlcnic_adapter *adapter)
1993 if (adapter->ahw->hw_ops->set_mac_filter_count)
1994 adapter->ahw->hw_ops->set_mac_filter_count(adapter);
1997 static inline void qlcnic_read_phys_port_id(struct qlcnic_adapter *adapter)
1999 if (adapter->ahw->hw_ops->read_phys_port_id)
2000 adapter->ahw->hw_ops->read_phys_port_id(adapter);
2003 static inline void qlcnic_dev_request_reset(struct qlcnic_adapter *adapter,
2006 if (adapter->nic_ops->request_reset)
2007 adapter->nic_ops->request_reset(adapter, key);
2010 static inline void qlcnic_cancel_idc_work(struct qlcnic_adapter *adapter)
2012 if (adapter->nic_ops->cancel_idc_work)
2013 adapter->nic_ops->cancel_idc_work(adapter);
2016 static inline irqreturn_t
2017 qlcnic_clear_legacy_intr(struct qlcnic_adapter *adapter)
2019 return adapter->nic_ops->clear_legacy_intr(adapter);
2022 static inline int qlcnic_config_led(struct qlcnic_adapter *adapter, u32 state,
2025 return adapter->nic_ops->config_led(adapter, state, rate);
2028 static inline void qlcnic_config_ipaddr(struct qlcnic_adapter *adapter,
2031 adapter->nic_ops->config_ipaddr(adapter, ip, cmd);
2034 static inline bool qlcnic_check_multi_tx(struct qlcnic_adapter *adapter)
2036 return test_bit(__QLCNIC_MULTI_TX_UNIQUE, &adapter->state);
2039 static inline void qlcnic_disable_multi_tx(struct qlcnic_adapter *adapter)
2041 test_and_clear_bit(__QLCNIC_MULTI_TX_UNIQUE, &adapter->state);
2042 adapter->drv_tx_rings = QLCNIC_SINGLE_RING;
2045 /* When operating in a muti tx mode, driver needs to write 0x1
2046 * to src register, instead of 0x0 to disable receiving interrupt.
2048 static inline void qlcnic_disable_int(struct qlcnic_host_sds_ring *sds_ring)
2050 struct qlcnic_adapter *adapter = sds_ring->adapter;
2052 if (qlcnic_check_multi_tx(adapter) &&
2053 !adapter->ahw->diag_test &&
2054 (adapter->flags & QLCNIC_MSIX_ENABLED))
2055 writel(0x1, sds_ring->crb_intr_mask);
2057 writel(0, sds_ring->crb_intr_mask);
2060 /* When operating in a muti tx mode, driver needs to write 0x0
2061 * to src register, instead of 0x1 to enable receiving interrupts.
2063 static inline void qlcnic_enable_int(struct qlcnic_host_sds_ring *sds_ring)
2065 struct qlcnic_adapter *adapter = sds_ring->adapter;
2067 if (qlcnic_check_multi_tx(adapter) &&
2068 !adapter->ahw->diag_test &&
2069 (adapter->flags & QLCNIC_MSIX_ENABLED))
2070 writel(0, sds_ring->crb_intr_mask);
2072 writel(0x1, sds_ring->crb_intr_mask);
2074 if (!QLCNIC_IS_MSI_FAMILY(adapter))
2075 writel(0xfbff, adapter->tgt_mask_reg);
2078 static inline int qlcnic_get_diag_lock(struct qlcnic_adapter *adapter)
2080 return test_and_set_bit(__QLCNIC_DIAG_MODE, &adapter->state);
2083 static inline void qlcnic_release_diag_lock(struct qlcnic_adapter *adapter)
2085 clear_bit(__QLCNIC_DIAG_MODE, &adapter->state);
2088 static inline int qlcnic_check_diag_status(struct qlcnic_adapter *adapter)
2090 return test_bit(__QLCNIC_DIAG_MODE, &adapter->state);
2093 extern const struct ethtool_ops qlcnic_sriov_vf_ethtool_ops;
2094 extern const struct ethtool_ops qlcnic_ethtool_ops;
2095 extern const struct ethtool_ops qlcnic_ethtool_failed_ops;
2097 #define QLCDB(adapter, lvl, _fmt, _args...) do { \
2098 if (NETIF_MSG_##lvl & adapter->ahw->msg_enable) \
2099 printk(KERN_INFO "%s: %s: " _fmt, \
2100 dev_name(&adapter->pdev->dev), \
2101 __func__, ##_args); \
2104 #define PCI_DEVICE_ID_QLOGIC_QLE824X 0x8020
2105 #define PCI_DEVICE_ID_QLOGIC_QLE834X 0x8030
2106 #define PCI_DEVICE_ID_QLOGIC_VF_QLE834X 0x8430
2107 #define PCI_DEVICE_ID_QLOGIC_QLE844X 0x8040
2108 #define PCI_DEVICE_ID_QLOGIC_VF_QLE844X 0x8440
2110 static inline bool qlcnic_82xx_check(struct qlcnic_adapter *adapter)
2112 unsigned short device = adapter->pdev->device;
2113 return (device == PCI_DEVICE_ID_QLOGIC_QLE824X) ? true : false;
2116 static inline bool qlcnic_84xx_check(struct qlcnic_adapter *adapter)
2118 unsigned short device = adapter->pdev->device;
2120 return ((device == PCI_DEVICE_ID_QLOGIC_QLE844X) ||
2121 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE844X)) ? true : false;
2124 static inline bool qlcnic_83xx_check(struct qlcnic_adapter *adapter)
2126 unsigned short device = adapter->pdev->device;
2129 status = ((device == PCI_DEVICE_ID_QLOGIC_QLE834X) ||
2130 (device == PCI_DEVICE_ID_QLOGIC_QLE844X) ||
2131 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE844X) ||
2132 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE834X)) ? true : false;
2137 static inline bool qlcnic_sriov_pf_check(struct qlcnic_adapter *adapter)
2139 return (adapter->ahw->op_mode == QLCNIC_SRIOV_PF_FUNC) ? true : false;
2142 static inline bool qlcnic_sriov_vf_check(struct qlcnic_adapter *adapter)
2144 unsigned short device = adapter->pdev->device;
2147 status = ((device == PCI_DEVICE_ID_QLOGIC_VF_QLE834X) ||
2148 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE844X)) ? true : false;
2153 static inline bool qlcnic_83xx_pf_check(struct qlcnic_adapter *adapter)
2155 unsigned short device = adapter->pdev->device;
2157 return (device == PCI_DEVICE_ID_QLOGIC_QLE834X) ? true : false;
2160 static inline bool qlcnic_83xx_vf_check(struct qlcnic_adapter *adapter)
2162 unsigned short device = adapter->pdev->device;
2164 return (device == PCI_DEVICE_ID_QLOGIC_VF_QLE834X) ? true : false;
2167 static inline u32 qlcnic_get_vnic_func_count(struct qlcnic_adapter *adapter)
2169 if (qlcnic_84xx_check(adapter))
2170 return QLC_84XX_VNIC_COUNT;
2172 return QLC_DEFAULT_VNIC_COUNT;
2174 #endif /* __QLCNIC_H_ */