drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c

   1 /*
   2  * QLogic qlcnic NIC Driver
   3  * Copyright (c) 2009-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qlcnic for copyright and licensing details.
   6  */
   7
   8 #include "qlcnic_sriov.h"
   9 #include "qlcnic.h"
  10 #include "qlcnic_83xx_hw.h"
  11 #include <linux/types.h>
  12
  13 #define QLC_BC_COMMAND  0
  14 #define QLC_BC_RESPONSE 1
  15
  16 #define QLC_MBOX_RESP_TIMEOUT           (10 * HZ)
  17 #define QLC_MBOX_CH_FREE_TIMEOUT        (10 * HZ)
  18
  19 #define QLC_BC_MSG              0
  20 #define QLC_BC_CFREE            1
  21 #define QLC_BC_FLR              2
  22 #define QLC_BC_HDR_SZ           16
  23 #define QLC_BC_PAYLOAD_SZ       (1024 - QLC_BC_HDR_SZ)
  24
  25 #define QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF            2048
  26 #define QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF      512
  27
  28 #define QLC_83XX_VF_RESET_FAIL_THRESH   8
  29 #define QLC_BC_CMD_MAX_RETRY_CNT        5
  30
  31 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *);
  32 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *);
  33 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *);
  34 static int qlcnic_sriov_vf_mbx_op(struct qlcnic_adapter *,
  35                                   struct qlcnic_cmd_args *);
  36
  37 static struct qlcnic_hardware_ops qlcnic_sriov_vf_hw_ops = {
  38         .read_crb                       = qlcnic_83xx_read_crb,
  39         .write_crb                      = qlcnic_83xx_write_crb,
  40         .read_reg                       = qlcnic_83xx_rd_reg_indirect,
  41         .write_reg                      = qlcnic_83xx_wrt_reg_indirect,
  42         .get_mac_address                = qlcnic_83xx_get_mac_address,
  43         .setup_intr                     = qlcnic_83xx_setup_intr,
  44         .alloc_mbx_args                 = qlcnic_83xx_alloc_mbx_args,
  45         .mbx_cmd                        = qlcnic_sriov_vf_mbx_op,
  46         .get_func_no                    = qlcnic_83xx_get_func_no,
  47         .api_lock                       = qlcnic_83xx_cam_lock,
  48         .api_unlock                     = qlcnic_83xx_cam_unlock,
  49         .process_lb_rcv_ring_diag       = qlcnic_83xx_process_rcv_ring_diag,
  50         .create_rx_ctx                  = qlcnic_83xx_create_rx_ctx,
  51         .create_tx_ctx                  = qlcnic_83xx_create_tx_ctx,
  52         .del_rx_ctx                     = qlcnic_83xx_del_rx_ctx,
  53         .del_tx_ctx                     = qlcnic_83xx_del_tx_ctx,
  54         .setup_link_event               = qlcnic_83xx_setup_link_event,
  55         .get_nic_info                   = qlcnic_83xx_get_nic_info,
  56         .get_pci_info                   = qlcnic_83xx_get_pci_info,
  57         .set_nic_info                   = qlcnic_83xx_set_nic_info,
  58         .change_macvlan                 = qlcnic_83xx_sre_macaddr_change,
  59         .napi_enable                    = qlcnic_83xx_napi_enable,
  60         .napi_disable                   = qlcnic_83xx_napi_disable,
  61         .config_intr_coal               = qlcnic_83xx_config_intr_coal,
  62         .config_rss                     = qlcnic_83xx_config_rss,
  63         .config_hw_lro                  = qlcnic_83xx_config_hw_lro,
  64         .config_promisc_mode            = qlcnic_83xx_nic_set_promisc,
  65         .change_l2_filter               = qlcnic_83xx_change_l2_filter,
  66         .get_board_info                 = qlcnic_83xx_get_port_info,
  67 };
  68
  69 static struct qlcnic_nic_template qlcnic_sriov_vf_ops = {
  70         .config_bridged_mode    = qlcnic_config_bridged_mode,
  71         .config_led             = qlcnic_config_led,
  72         .cancel_idc_work        = qlcnic_sriov_vf_cancel_fw_work,
  73         .napi_add               = qlcnic_83xx_napi_add,
  74         .napi_del               = qlcnic_83xx_napi_del,
  75         .config_ipaddr          = qlcnic_83xx_config_ipaddr,
  76         .clear_legacy_intr      = qlcnic_83xx_clear_legacy_intr,
  77 };
  78
  79 static const struct qlcnic_mailbox_metadata qlcnic_sriov_bc_mbx_tbl[] = {
  80         {QLCNIC_BC_CMD_CHANNEL_INIT, 2, 2},
  81         {QLCNIC_BC_CMD_CHANNEL_TERM, 2, 2},
  82 };
  83
  84 static inline bool qlcnic_sriov_bc_msg_check(u32 val)
  85 {
  86         return (val & (1 << QLC_BC_MSG)) ? true : false;
  87 }
  88
  89 static inline bool qlcnic_sriov_channel_free_check(u32 val)
  90 {
  91         return (val & (1 << QLC_BC_CFREE)) ? true : false;
  92 }
  93
  94 static inline bool qlcnic_sriov_flr_check(u32 val)
  95 {
  96         return (val & (1 << QLC_BC_FLR)) ? true : false;
  97 }
  98
  99 static inline u8 qlcnic_sriov_target_func_id(u32 val)
 100 {
 101         return (val >> 4) & 0xff;
 102 }
 103
 104 static int qlcnic_sriov_virtid_fn(struct qlcnic_adapter *adapter, int vf_id)
 105 {
 106         struct pci_dev *dev = adapter->pdev;
 107         int pos;
 108         u16 stride, offset;
 109
 110         if (qlcnic_sriov_vf_check(adapter))
 111                 return 0;
 112
 113         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
 114         pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
 115         pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
 116
 117         return (dev->devfn + offset + stride * vf_id) & 0xff;
 118 }
 119
 120 int qlcnic_sriov_init(struct qlcnic_adapter *adapter, int num_vfs)
 121 {
 122         struct qlcnic_sriov *sriov;
 123         struct qlcnic_back_channel *bc;
 124         struct workqueue_struct *wq;
 125         struct qlcnic_vport *vp;
 126         struct qlcnic_vf_info *vf;
 127         int err, i;
 128
 129         if (!qlcnic_sriov_enable_check(adapter))
 130                 return -EIO;
 131
 132         sriov  = kzalloc(sizeof(struct qlcnic_sriov), GFP_KERNEL);
 133         if (!sriov)
 134                 return -ENOMEM;
 135
 136         adapter->ahw->sriov = sriov;
 137         sriov->num_vfs = num_vfs;
 138         bc = &sriov->bc;
 139         sriov->vf_info = kzalloc(sizeof(struct qlcnic_vf_info) *
 140                                  num_vfs, GFP_KERNEL);
 141         if (!sriov->vf_info) {
 142                 err = -ENOMEM;
 143                 goto qlcnic_free_sriov;
 144         }
 145
 146         wq = create_singlethread_workqueue("bc-trans");
 147         if (wq == NULL) {
 148                 err = -ENOMEM;
 149                 dev_err(&adapter->pdev->dev,
 150                         "Cannot create bc-trans workqueue\n");
 151                 goto qlcnic_free_vf_info;
 152         }
 153
 154         bc->bc_trans_wq = wq;
 155
 156         wq = create_singlethread_workqueue("async");
 157         if (wq == NULL) {
 158                 err = -ENOMEM;
 159                 dev_err(&adapter->pdev->dev, "Cannot create async workqueue\n");
 160                 goto qlcnic_destroy_trans_wq;
 161         }
 162
 163         bc->bc_async_wq =  wq;
 164         INIT_LIST_HEAD(&bc->async_list);
 165
 166         for (i = 0; i < num_vfs; i++) {
 167                 vf = &sriov->vf_info[i];
 168                 vf->adapter = adapter;
 169                 vf->pci_func = qlcnic_sriov_virtid_fn(adapter, i);
 170                 mutex_init(&vf->send_cmd_lock);
 171                 INIT_LIST_HEAD(&vf->rcv_act.wait_list);
 172                 INIT_LIST_HEAD(&vf->rcv_pend.wait_list);
 173                 spin_lock_init(&vf->rcv_act.lock);
 174                 spin_lock_init(&vf->rcv_pend.lock);
 175                 init_completion(&vf->ch_free_cmpl);
 176
 177                 if (qlcnic_sriov_pf_check(adapter)) {
 178                         vp = kzalloc(sizeof(struct qlcnic_vport), GFP_KERNEL);
 179                         if (!vp) {
 180                                 err = -ENOMEM;
 181                                 goto qlcnic_destroy_async_wq;
 182                         }
 183                         sriov->vf_info[i].vp = vp;
 184                         random_ether_addr(vp->mac);
 185                         dev_info(&adapter->pdev->dev,
 186                                  "MAC Address %pM is configured for VF %d\n",
 187                                  vp->mac, i);
 188                 }
 189         }
 190
 191         return 0;
 192
 193 qlcnic_destroy_async_wq:
 194         destroy_workqueue(bc->bc_async_wq);
 195
 196 qlcnic_destroy_trans_wq:
 197         destroy_workqueue(bc->bc_trans_wq);
 198
 199 qlcnic_free_vf_info:
 200         kfree(sriov->vf_info);
 201
 202 qlcnic_free_sriov:
 203         kfree(adapter->ahw->sriov);
 204         return err;
 205 }
 206
 207 void qlcnic_sriov_cleanup_list(struct qlcnic_trans_list *t_list)
 208 {
 209         struct qlcnic_bc_trans *trans;
 210         struct qlcnic_cmd_args cmd;
 211         unsigned long flags;
 212
 213         spin_lock_irqsave(&t_list->lock, flags);
 214
 215         while (!list_empty(&t_list->wait_list)) {
 216                 trans = list_first_entry(&t_list->wait_list,
 217                                          struct qlcnic_bc_trans, list);
 218                 list_del(&trans->list);
 219                 t_list->count--;
 220                 cmd.req.arg = (u32 *)trans->req_pay;
 221                 cmd.rsp.arg = (u32 *)trans->rsp_pay;
 222                 qlcnic_free_mbx_args(&cmd);
 223                 qlcnic_sriov_cleanup_transaction(trans);
 224         }
 225
 226         spin_unlock_irqrestore(&t_list->lock, flags);
 227 }
 228
 229 void __qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 230 {
 231         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 232         struct qlcnic_back_channel *bc = &sriov->bc;
 233         struct qlcnic_vf_info *vf;
 234         int i;
 235
 236         if (!qlcnic_sriov_enable_check(adapter))
 237                 return;
 238
 239         qlcnic_sriov_cleanup_async_list(bc);
 240         destroy_workqueue(bc->bc_async_wq);
 241
 242         for (i = 0; i < sriov->num_vfs; i++) {
 243                 vf = &sriov->vf_info[i];
 244                 qlcnic_sriov_cleanup_list(&vf->rcv_pend);
 245                 cancel_work_sync(&vf->trans_work);
 246                 qlcnic_sriov_cleanup_list(&vf->rcv_act);
 247         }
 248
 249         destroy_workqueue(bc->bc_trans_wq);
 250
 251         for (i = 0; i < sriov->num_vfs; i++)
 252                 kfree(sriov->vf_info[i].vp);
 253
 254         kfree(sriov->vf_info);
 255         kfree(adapter->ahw->sriov);
 256 }
 257
 258 static void qlcnic_sriov_vf_cleanup(struct qlcnic_adapter *adapter)
 259 {
 260         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 261         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 262         __qlcnic_sriov_cleanup(adapter);
 263 }
 264
 265 void qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 266 {
 267         if (qlcnic_sriov_pf_check(adapter))
 268                 qlcnic_sriov_pf_cleanup(adapter);
 269
 270         if (qlcnic_sriov_vf_check(adapter))
 271                 qlcnic_sriov_vf_cleanup(adapter);
 272 }
 273
 274 static int qlcnic_sriov_post_bc_msg(struct qlcnic_adapter *adapter, u32 *hdr,
 275                                     u32 *pay, u8 pci_func, u8 size)
 276 {
 277         struct qlcnic_hardware_context *ahw = adapter->ahw;
 278         unsigned long flags;
 279         u32 rsp, mbx_val, fw_data, rsp_num, mbx_cmd, val;
 280         u16 opcode;
 281         u8 mbx_err_code;
 282         int i, j;
 283
 284         opcode = ((struct qlcnic_bc_hdr *)hdr)->cmd_op;
 285
 286         if (!test_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status)) {
 287                 dev_info(&adapter->pdev->dev,
 288                          "Mailbox cmd attempted, 0x%x\n", opcode);
 289                 dev_info(&adapter->pdev->dev, "Mailbox detached\n");
 290                 return 0;
 291         }
 292
 293         spin_lock_irqsave(&ahw->mbx_lock, flags);
 294
 295         mbx_val = QLCRDX(ahw, QLCNIC_HOST_MBX_CTRL);
 296         if (mbx_val) {
 297                 QLCDB(adapter, DRV, "Mailbox cmd attempted, 0x%x\n", opcode);
 298                 spin_unlock_irqrestore(&ahw->mbx_lock, flags);
 299                 return QLCNIC_RCODE_TIMEOUT;
 300         }
 301         /* Fill in mailbox registers */
 302         val = size + (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 303         mbx_cmd = 0x31 | (val << 16) | (adapter->ahw->fw_hal_version << 29);
 304
 305         writel(mbx_cmd, QLCNIC_MBX_HOST(ahw, 0));
 306         mbx_cmd = 0x1 | (1 << 4);
 307
 308         if (qlcnic_sriov_pf_check(adapter))
 309                 mbx_cmd |= (pci_func << 5);
 310
 311         writel(mbx_cmd, QLCNIC_MBX_HOST(ahw, 1));
 312         for (i = 2, j = 0; j < (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 313                         i++, j++) {
 314                 writel(*(hdr++), QLCNIC_MBX_HOST(ahw, i));
 315         }
 316         for (j = 0; j < size; j++, i++)
 317                 writel(*(pay++), QLCNIC_MBX_HOST(ahw, i));
 318
 319         /* Signal FW about the impending command */
 320         QLCWRX(ahw, QLCNIC_HOST_MBX_CTRL, QLCNIC_SET_OWNER);
 321
 322         /* Waiting for the mailbox cmd to complete and while waiting here
 323          * some AEN might arrive. If more than 5 seconds expire we can
 324          * assume something is wrong.
 325          */
 326 poll:
 327         rsp = qlcnic_83xx_mbx_poll(adapter);
 328         if (rsp != QLCNIC_RCODE_TIMEOUT) {
 329                 /* Get the FW response data */
 330                 fw_data = readl(QLCNIC_MBX_FW(ahw, 0));
 331                 if (fw_data &  QLCNIC_MBX_ASYNC_EVENT) {
 332                         qlcnic_83xx_process_aen(adapter);
 333                         mbx_val = QLCRDX(ahw, QLCNIC_HOST_MBX_CTRL);
 334                         if (mbx_val)
 335                                 goto poll;
 336                 }
 337                 mbx_err_code = QLCNIC_MBX_STATUS(fw_data);
 338                 rsp_num = QLCNIC_MBX_NUM_REGS(fw_data);
 339                 opcode = QLCNIC_MBX_RSP(fw_data);
 340
 341                 switch (mbx_err_code) {
 342                 case QLCNIC_MBX_RSP_OK:
 343                 case QLCNIC_MBX_PORT_RSP_OK:
 344                         rsp = QLCNIC_RCODE_SUCCESS;
 345                         break;
 346                 default:
 347                         if (opcode == QLCNIC_CMD_CONFIG_MAC_VLAN) {
 348                                 rsp = qlcnic_83xx_mac_rcode(adapter);
 349                                 if (!rsp)
 350                                         goto out;
 351                         }
 352                         dev_err(&adapter->pdev->dev,
 353                                 "MBX command 0x%x failed with err:0x%x\n",
 354                                 opcode, mbx_err_code);
 355                         rsp = mbx_err_code;
 356                         break;
 357                 }
 358                 goto out;
 359         }
 360
 361         dev_err(&adapter->pdev->dev, "MBX command 0x%x timed out\n",
 362                 QLCNIC_MBX_RSP(mbx_cmd));
 363         rsp = QLCNIC_RCODE_TIMEOUT;
 364 out:
 365         /* clear fw mbx control register */
 366         QLCWRX(ahw, QLCNIC_FW_MBX_CTRL, QLCNIC_CLR_OWNER);
 367         spin_unlock_irqrestore(&adapter->ahw->mbx_lock, flags);
 368         return rsp;
 369 }
 370
 371 static void qlcnic_sriov_vf_cfg_buff_desc(struct qlcnic_adapter *adapter)
 372 {
 373         adapter->num_rxd = QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF;
 374         adapter->max_rxd = MAX_RCV_DESCRIPTORS_10G;
 375         adapter->num_jumbo_rxd = QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF;
 376         adapter->max_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_10G;
 377         adapter->num_txd = MAX_CMD_DESCRIPTORS;
 378         adapter->max_rds_rings = MAX_RDS_RINGS;
 379 }
 380
 381 static int qlcnic_sriov_vf_init_driver(struct qlcnic_adapter *adapter)
 382 {
 383         struct qlcnic_info nic_info;
 384         struct qlcnic_hardware_context *ahw = adapter->ahw;
 385         int err;
 386
 387         err = qlcnic_get_nic_info(adapter, &nic_info, ahw->pci_func);
 388         if (err)
 389                 return -EIO;
 390
 391         if (qlcnic_83xx_get_port_info(adapter))
 392                 return -EIO;
 393
 394         qlcnic_sriov_vf_cfg_buff_desc(adapter);
 395         adapter->flags |= QLCNIC_ADAPTER_INITIALIZED;
 396         dev_info(&adapter->pdev->dev, "HAL Version: %d\n",
 397                  adapter->ahw->fw_hal_version);
 398
 399         ahw->physical_port = (u8) nic_info.phys_port;
 400         ahw->switch_mode = nic_info.switch_mode;
 401         ahw->max_mtu = nic_info.max_mtu;
 402         ahw->op_mode = nic_info.op_mode;
 403         ahw->capabilities = nic_info.capabilities;
 404         return 0;
 405 }
 406
 407 static int qlcnic_sriov_setup_vf(struct qlcnic_adapter *adapter,
 408                                  int pci_using_dac)
 409 {
 410         int err;
 411
 412         INIT_LIST_HEAD(&adapter->vf_mc_list);
 413         if (!qlcnic_use_msi_x && !!qlcnic_use_msi)
 414                 dev_warn(&adapter->pdev->dev,
 415                          "83xx adapter do not support MSI interrupts\n");
 416
 417         err = qlcnic_setup_intr(adapter, 1);
 418         if (err) {
 419                 dev_err(&adapter->pdev->dev, "Failed to setup interrupt\n");
 420                 goto err_out_disable_msi;
 421         }
 422
 423         err = qlcnic_83xx_setup_mbx_intr(adapter);
 424         if (err)
 425                 goto err_out_disable_msi;
 426
 427         err = qlcnic_sriov_init(adapter, 1);
 428         if (err)
 429                 goto err_out_disable_mbx_intr;
 430
 431         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
 432         if (err)
 433                 goto err_out_cleanup_sriov;
 434
 435         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
 436         if (err)
 437                 goto err_out_disable_bc_intr;
 438
 439         err = qlcnic_sriov_vf_init_driver(adapter);
 440         if (err)
 441                 goto err_out_send_channel_term;
 442
 443         err = qlcnic_setup_netdev(adapter, adapter->netdev, pci_using_dac);
 444         if (err)
 445                 goto err_out_send_channel_term;
 446
 447         pci_set_drvdata(adapter->pdev, adapter);
 448         dev_info(&adapter->pdev->dev, "%s: XGbE port initialized\n",
 449                  adapter->netdev->name);
 450         qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
 451                              adapter->ahw->idc.delay);
 452         return 0;
 453
 454 err_out_send_channel_term:
 455         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 456
 457 err_out_disable_bc_intr:
 458         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 459
 460 err_out_cleanup_sriov:
 461         __qlcnic_sriov_cleanup(adapter);
 462
 463 err_out_disable_mbx_intr:
 464         qlcnic_83xx_free_mbx_intr(adapter);
 465
 466 err_out_disable_msi:
 467         qlcnic_teardown_intr(adapter);
 468         return err;
 469 }
 470
 471 static int qlcnic_sriov_check_dev_ready(struct qlcnic_adapter *adapter)
 472 {
 473         u32 state;
 474
 475         do {
 476                 msleep(20);
 477                 if (++adapter->fw_fail_cnt > QLC_BC_CMD_MAX_RETRY_CNT)
 478                         return -EIO;
 479                 state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
 480         } while (state != QLC_83XX_IDC_DEV_READY);
 481
 482         return 0;
 483 }
 484
 485 int qlcnic_sriov_vf_init(struct qlcnic_adapter *adapter, int pci_using_dac)
 486 {
 487         struct qlcnic_hardware_context *ahw = adapter->ahw;
 488         int err;
 489
 490         spin_lock_init(&ahw->mbx_lock);
 491         set_bit(QLC_83XX_MBX_READY, &ahw->idc.status);
 492         set_bit(QLC_83XX_MODULE_LOADED, &ahw->idc.status);
 493         ahw->idc.delay = QLC_83XX_IDC_FW_POLL_DELAY;
 494         ahw->reset_context = 0;
 495         adapter->fw_fail_cnt = 0;
 496         ahw->msix_supported = 1;
 497         adapter->need_fw_reset = 0;
 498         adapter->flags |= QLCNIC_TX_INTR_SHARED;
 499
 500         err = qlcnic_sriov_check_dev_ready(adapter);
 501         if (err)
 502                 return err;
 503
 504         err = qlcnic_sriov_setup_vf(adapter, pci_using_dac);
 505         if (err)
 506                 return err;
 507
 508         if (qlcnic_read_mac_addr(adapter))
 509                 dev_warn(&adapter->pdev->dev, "failed to read mac addr\n");
 510
 511         clear_bit(__QLCNIC_RESETTING, &adapter->state);
 512         return 0;
 513 }
 514
 515 void qlcnic_sriov_vf_set_ops(struct qlcnic_adapter *adapter)
 516 {
 517         struct qlcnic_hardware_context *ahw = adapter->ahw;
 518
 519         ahw->op_mode = QLCNIC_SRIOV_VF_FUNC;
 520         dev_info(&adapter->pdev->dev,
 521                  "HAL Version: %d Non Privileged SRIOV function\n",
 522                  ahw->fw_hal_version);
 523         adapter->nic_ops = &qlcnic_sriov_vf_ops;
 524         set_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state);
 525         return;
 526 }
 527
 528 void qlcnic_sriov_vf_register_map(struct qlcnic_hardware_context *ahw)
 529 {
 530         ahw->hw_ops             = &qlcnic_sriov_vf_hw_ops;
 531         ahw->reg_tbl            = (u32 *)qlcnic_83xx_reg_tbl;
 532         ahw->ext_reg_tbl        = (u32 *)qlcnic_83xx_ext_reg_tbl;
 533 }
 534
 535 static u32 qlcnic_sriov_get_bc_paysize(u32 real_pay_size, u8 curr_frag)
 536 {
 537         u32 pay_size;
 538
 539         pay_size = real_pay_size / ((curr_frag + 1) * QLC_BC_PAYLOAD_SZ);
 540
 541         if (pay_size)
 542                 pay_size = QLC_BC_PAYLOAD_SZ;
 543         else
 544                 pay_size = real_pay_size % QLC_BC_PAYLOAD_SZ;
 545
 546         return pay_size;
 547 }
 548
 549 int qlcnic_sriov_func_to_index(struct qlcnic_adapter *adapter, u8 pci_func)
 550 {
 551         struct qlcnic_vf_info *vf_info = adapter->ahw->sriov->vf_info;
 552         u8 i;
 553
 554         if (qlcnic_sriov_vf_check(adapter))
 555                 return 0;
 556
 557         for (i = 0; i < adapter->ahw->sriov->num_vfs; i++) {
 558                 if (vf_info[i].pci_func == pci_func)
 559                         return i;
 560         }
 561
 562         return -EINVAL;
 563 }
 564
 565 static inline int qlcnic_sriov_alloc_bc_trans(struct qlcnic_bc_trans **trans)
 566 {
 567         *trans = kzalloc(sizeof(struct qlcnic_bc_trans), GFP_ATOMIC);
 568         if (!*trans)
 569                 return -ENOMEM;
 570
 571         init_completion(&(*trans)->resp_cmpl);
 572         return 0;
 573 }
 574
 575 static inline int qlcnic_sriov_alloc_bc_msg(struct qlcnic_bc_hdr **hdr,
 576                                             u32 size)
 577 {
 578         *hdr = kzalloc(sizeof(struct qlcnic_bc_hdr) * size, GFP_ATOMIC);
 579         if (!*hdr)
 580                 return -ENOMEM;
 581
 582         return 0;
 583 }
 584
 585 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *mbx, u32 type)
 586 {
 587         const struct qlcnic_mailbox_metadata *mbx_tbl;
 588         int i, size;
 589
 590         mbx_tbl = qlcnic_sriov_bc_mbx_tbl;
 591         size = ARRAY_SIZE(qlcnic_sriov_bc_mbx_tbl);
 592
 593         for (i = 0; i < size; i++) {
 594                 if (type == mbx_tbl[i].cmd) {
 595                         mbx->op_type = QLC_BC_CMD;
 596                         mbx->req.num = mbx_tbl[i].in_args;
 597                         mbx->rsp.num = mbx_tbl[i].out_args;
 598                         mbx->req.arg = kcalloc(mbx->req.num, sizeof(u32),
 599                                                GFP_ATOMIC);
 600                         if (!mbx->req.arg)
 601                                 return -ENOMEM;
 602                         mbx->rsp.arg = kcalloc(mbx->rsp.num, sizeof(u32),
 603                                                GFP_ATOMIC);
 604                         if (!mbx->rsp.arg) {
 605                                 kfree(mbx->req.arg);
 606                                 mbx->req.arg = NULL;
 607                                 return -ENOMEM;
 608                         }
 609                         memset(mbx->req.arg, 0, sizeof(u32) * mbx->req.num);
 610                         memset(mbx->rsp.arg, 0, sizeof(u32) * mbx->rsp.num);
 611                         mbx->req.arg[0] = (type | (mbx->req.num << 16) |
 612                                            (3 << 29));
 613                         return 0;
 614                 }
 615         }
 616         return -EINVAL;
 617 }
 618
 619 static int qlcnic_sriov_prepare_bc_hdr(struct qlcnic_bc_trans *trans,
 620                                        struct qlcnic_cmd_args *cmd,
 621                                        u16 seq, u8 msg_type)
 622 {
 623         struct qlcnic_bc_hdr *hdr;
 624         int i;
 625         u32 num_regs, bc_pay_sz;
 626         u16 remainder;
 627         u8 cmd_op, num_frags, t_num_frags;
 628
 629         bc_pay_sz = QLC_BC_PAYLOAD_SZ;
 630         if (msg_type == QLC_BC_COMMAND) {
 631                 trans->req_pay = (struct qlcnic_bc_payload *)cmd->req.arg;
 632                 trans->rsp_pay = (struct qlcnic_bc_payload *)cmd->rsp.arg;
 633                 num_regs = cmd->req.num;
 634                 trans->req_pay_size = (num_regs * 4);
 635                 num_regs = cmd->rsp.num;
 636                 trans->rsp_pay_size = (num_regs * 4);
 637                 cmd_op = cmd->req.arg[0] & 0xff;
 638                 remainder = (trans->req_pay_size) % (bc_pay_sz);
 639                 num_frags = (trans->req_pay_size) / (bc_pay_sz);
 640                 if (remainder)
 641                         num_frags++;
 642                 t_num_frags = num_frags;
 643                 if (qlcnic_sriov_alloc_bc_msg(&trans->req_hdr, num_frags))
 644                         return -ENOMEM;
 645                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 646                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 647                 if (remainder)
 648                         num_frags++;
 649                 if (qlcnic_sriov_alloc_bc_msg(&trans->rsp_hdr, num_frags))
 650                         return -ENOMEM;
 651                 num_frags  = t_num_frags;
 652                 hdr = trans->req_hdr;
 653         }  else {
 654                 cmd->req.arg = (u32 *)trans->req_pay;
 655                 cmd->rsp.arg = (u32 *)trans->rsp_pay;
 656                 cmd_op = cmd->req.arg[0] & 0xff;
 657                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 658                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 659                 if (remainder)
 660                         num_frags++;
 661                 cmd->req.num = trans->req_pay_size / 4;
 662                 cmd->rsp.num = trans->rsp_pay_size / 4;
 663                 hdr = trans->rsp_hdr;
 664         }
 665
 666         trans->trans_id = seq;
 667         trans->cmd_id = cmd_op;
 668         for (i = 0; i < num_frags; i++) {
 669                 hdr[i].version = 2;
 670                 hdr[i].msg_type = msg_type;
 671                 hdr[i].op_type = cmd->op_type;
 672                 hdr[i].num_cmds = 1;
 673                 hdr[i].num_frags = num_frags;
 674                 hdr[i].frag_num = i + 1;
 675                 hdr[i].cmd_op = cmd_op;
 676                 hdr[i].seq_id = seq;
 677         }
 678         return 0;
 679 }
 680
 681 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *trans)
 682 {
 683         if (!trans)
 684                 return;
 685         kfree(trans->req_hdr);
 686         kfree(trans->rsp_hdr);
 687         kfree(trans);
 688 }
 689
 690 static int qlcnic_sriov_clear_trans(struct qlcnic_vf_info *vf,
 691                                     struct qlcnic_bc_trans *trans, u8 type)
 692 {
 693         struct qlcnic_trans_list *t_list;
 694         unsigned long flags;
 695         int ret = 0;
 696
 697         if (type == QLC_BC_RESPONSE) {
 698                 t_list = &vf->rcv_act;
 699                 spin_lock_irqsave(&t_list->lock, flags);
 700                 t_list->count--;
 701                 list_del(&trans->list);
 702                 if (t_list->count > 0)
 703                         ret = 1;
 704                 spin_unlock_irqrestore(&t_list->lock, flags);
 705         }
 706         if (type == QLC_BC_COMMAND) {
 707                 while (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
 708                         msleep(100);
 709                 vf->send_cmd = NULL;
 710                 clear_bit(QLC_BC_VF_SEND, &vf->state);
 711         }
 712         return ret;
 713 }
 714
 715 static void qlcnic_sriov_schedule_bc_cmd(struct qlcnic_sriov *sriov,
 716                                          struct qlcnic_vf_info *vf,
 717                                          work_func_t func)
 718 {
 719         if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 720             vf->adapter->need_fw_reset)
 721                 return;
 722
 723         INIT_WORK(&vf->trans_work, func);
 724         queue_work(sriov->bc.bc_trans_wq, &vf->trans_work);
 725 }
 726
 727 static inline void qlcnic_sriov_wait_for_resp(struct qlcnic_bc_trans *trans)
 728 {
 729         struct completion *cmpl = &trans->resp_cmpl;
 730
 731         if (wait_for_completion_timeout(cmpl, QLC_MBOX_RESP_TIMEOUT))
 732                 trans->trans_state = QLC_END;
 733         else
 734                 trans->trans_state = QLC_ABORT;
 735
 736         return;
 737 }
 738
 739 static void qlcnic_sriov_handle_multi_frags(struct qlcnic_bc_trans *trans,
 740                                             u8 type)
 741 {
 742         if (type == QLC_BC_RESPONSE) {
 743                 trans->curr_rsp_frag++;
 744                 if (trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
 745                         trans->trans_state = QLC_INIT;
 746                 else
 747                         trans->trans_state = QLC_END;
 748         } else {
 749                 trans->curr_req_frag++;
 750                 if (trans->curr_req_frag < trans->req_hdr->num_frags)
 751                         trans->trans_state = QLC_INIT;
 752                 else
 753                         trans->trans_state = QLC_WAIT_FOR_RESP;
 754         }
 755 }
 756
 757 static void qlcnic_sriov_wait_for_channel_free(struct qlcnic_bc_trans *trans,
 758                                                u8 type)
 759 {
 760         struct qlcnic_vf_info *vf = trans->vf;
 761         struct completion *cmpl = &vf->ch_free_cmpl;
 762
 763         if (!wait_for_completion_timeout(cmpl, QLC_MBOX_CH_FREE_TIMEOUT)) {
 764                 trans->trans_state = QLC_ABORT;
 765                 return;
 766         }
 767
 768         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
 769         qlcnic_sriov_handle_multi_frags(trans, type);
 770 }
 771
 772 static void qlcnic_sriov_pull_bc_msg(struct qlcnic_adapter *adapter,
 773                                      u32 *hdr, u32 *pay, u32 size)
 774 {
 775         struct qlcnic_hardware_context *ahw = adapter->ahw;
 776         u32 fw_mbx;
 777         u8 i, max = 2, hdr_size, j;
 778
 779         hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 780         max = (size / sizeof(u32)) + hdr_size;
 781
 782         fw_mbx = readl(QLCNIC_MBX_FW(ahw, 0));
 783         for (i = 2, j = 0; j < hdr_size; i++, j++)
 784                 *(hdr++) = readl(QLCNIC_MBX_FW(ahw, i));
 785         for (; j < max; i++, j++)
 786                 *(pay++) = readl(QLCNIC_MBX_FW(ahw, i));
 787 }
 788
 789 static int __qlcnic_sriov_issue_bc_post(struct qlcnic_vf_info *vf)
 790 {
 791         int ret = -EBUSY;
 792         u32 timeout = 10000;
 793
 794         do {
 795                 if (!test_and_set_bit(QLC_BC_VF_CHANNEL, &vf->state)) {
 796                         ret = 0;
 797                         break;
 798                 }
 799                 mdelay(1);
 800         } while (--timeout);
 801
 802         return ret;
 803 }
 804
 805 static int qlcnic_sriov_issue_bc_post(struct qlcnic_bc_trans *trans, u8 type)
 806 {
 807         struct qlcnic_vf_info *vf = trans->vf;
 808         u32 pay_size, hdr_size;
 809         u32 *hdr, *pay;
 810         int ret;
 811         u8 pci_func = trans->func_id;
 812
 813         if (__qlcnic_sriov_issue_bc_post(vf))
 814                 return -EBUSY;
 815
 816         if (type == QLC_BC_COMMAND) {
 817                 hdr = (u32 *)(trans->req_hdr + trans->curr_req_frag);
 818                 pay = (u32 *)(trans->req_pay + trans->curr_req_frag);
 819                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 820                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
 821                                                        trans->curr_req_frag);
 822                 pay_size = (pay_size / sizeof(u32));
 823         } else {
 824                 hdr = (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag);
 825                 pay = (u32 *)(trans->rsp_pay + trans->curr_rsp_frag);
 826                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 827                 pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
 828                                                        trans->curr_rsp_frag);
 829                 pay_size = (pay_size / sizeof(u32));
 830         }
 831
 832         ret = qlcnic_sriov_post_bc_msg(vf->adapter, hdr, pay,
 833                                        pci_func, pay_size);
 834         return ret;
 835 }
 836
 837 static int __qlcnic_sriov_send_bc_msg(struct qlcnic_bc_trans *trans,
 838                                       struct qlcnic_vf_info *vf, u8 type)
 839 {
 840         bool flag = true;
 841         int err = -EIO;
 842
 843         while (flag) {
 844                 if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 845                     vf->adapter->need_fw_reset)
 846                         trans->trans_state = QLC_ABORT;
 847
 848                 switch (trans->trans_state) {
 849                 case QLC_INIT:
 850                         trans->trans_state = QLC_WAIT_FOR_CHANNEL_FREE;
 851                         if (qlcnic_sriov_issue_bc_post(trans, type))
 852                                 trans->trans_state = QLC_ABORT;
 853                         break;
 854                 case QLC_WAIT_FOR_CHANNEL_FREE:
 855                         qlcnic_sriov_wait_for_channel_free(trans, type);
 856                         break;
 857                 case QLC_WAIT_FOR_RESP:
 858                         qlcnic_sriov_wait_for_resp(trans);
 859                         break;
 860                 case QLC_END:
 861                         err = 0;
 862                         flag = false;
 863                         break;
 864                 case QLC_ABORT:
 865                         err = -EIO;
 866                         flag = false;
 867                         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
 868                         break;
 869                 default:
 870                         err = -EIO;
 871                         flag = false;
 872                 }
 873         }
 874         return err;
 875 }
 876
 877 static int qlcnic_sriov_send_bc_cmd(struct qlcnic_adapter *adapter,
 878                                     struct qlcnic_bc_trans *trans, int pci_func)
 879 {
 880         struct qlcnic_vf_info *vf;
 881         int err, index = qlcnic_sriov_func_to_index(adapter, pci_func);
 882
 883         if (index < 0)
 884                 return -EIO;
 885
 886         vf = &adapter->ahw->sriov->vf_info[index];
 887         trans->vf = vf;
 888         trans->func_id = pci_func;
 889
 890         if (!test_bit(QLC_BC_VF_STATE, &vf->state)) {
 891                 if (qlcnic_sriov_pf_check(adapter))
 892                         return -EIO;
 893                 if (qlcnic_sriov_vf_check(adapter) &&
 894                     trans->cmd_id != QLCNIC_BC_CMD_CHANNEL_INIT)
 895                         return -EIO;
 896         }
 897
 898         mutex_lock(&vf->send_cmd_lock);
 899         vf->send_cmd = trans;
 900         err = __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_COMMAND);
 901         qlcnic_sriov_clear_trans(vf, trans, QLC_BC_COMMAND);
 902         mutex_unlock(&vf->send_cmd_lock);
 903         return err;
 904 }
 905
 906 static void __qlcnic_sriov_process_bc_cmd(struct qlcnic_adapter *adapter,
 907                                           struct qlcnic_bc_trans *trans,
 908                                           struct qlcnic_cmd_args *cmd)
 909 {
 910 #ifdef CONFIG_QLCNIC_SRIOV
 911         if (qlcnic_sriov_pf_check(adapter)) {
 912                 qlcnic_sriov_pf_process_bc_cmd(adapter, trans, cmd);
 913                 return;
 914         }
 915 #endif
 916         cmd->rsp.arg[0] |= (0x9 << 25);
 917         return;
 918 }
 919
 920 static void qlcnic_sriov_process_bc_cmd(struct work_struct *work)
 921 {
 922         struct qlcnic_vf_info *vf = container_of(work, struct qlcnic_vf_info,
 923                                                  trans_work);
 924         struct qlcnic_bc_trans *trans = NULL;
 925         struct qlcnic_adapter *adapter  = vf->adapter;
 926         struct qlcnic_cmd_args cmd;
 927         u8 req;
 928
 929         if (adapter->need_fw_reset)
 930                 return;
 931
 932         if (test_bit(QLC_BC_VF_FLR, &vf->state))
 933                 return;
 934
 935         trans = list_first_entry(&vf->rcv_act.wait_list,
 936                                  struct qlcnic_bc_trans, list);
 937         adapter = vf->adapter;
 938
 939         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, trans->req_hdr->seq_id,
 940                                         QLC_BC_RESPONSE))
 941                 goto cleanup_trans;
 942
 943         __qlcnic_sriov_process_bc_cmd(adapter, trans, &cmd);
 944         trans->trans_state = QLC_INIT;
 945         __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_RESPONSE);
 946
 947 cleanup_trans:
 948         qlcnic_free_mbx_args(&cmd);
 949         req = qlcnic_sriov_clear_trans(vf, trans, QLC_BC_RESPONSE);
 950         qlcnic_sriov_cleanup_transaction(trans);
 951         if (req)
 952                 qlcnic_sriov_schedule_bc_cmd(adapter->ahw->sriov, vf,
 953                                              qlcnic_sriov_process_bc_cmd);
 954 }
 955
 956 static void qlcnic_sriov_handle_bc_resp(struct qlcnic_bc_hdr *hdr,
 957                                         struct qlcnic_vf_info *vf)
 958 {
 959         struct qlcnic_bc_trans *trans;
 960         u32 pay_size;
 961
 962         if (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
 963                 return;
 964
 965         trans = vf->send_cmd;
 966
 967         if (trans == NULL)
 968                 goto clear_send;
 969
 970         if (trans->trans_id != hdr->seq_id)
 971                 goto clear_send;
 972
 973         pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
 974                                                trans->curr_rsp_frag);
 975         qlcnic_sriov_pull_bc_msg(vf->adapter,
 976                                  (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag),
 977                                  (u32 *)(trans->rsp_pay + trans->curr_rsp_frag),
 978                                  pay_size);
 979         if (++trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
 980                 goto clear_send;
 981
 982         complete(&trans->resp_cmpl);
 983
 984 clear_send:
 985         clear_bit(QLC_BC_VF_SEND, &vf->state);
 986 }
 987
 988 int __qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
 989                                 struct qlcnic_vf_info *vf,
 990                                 struct qlcnic_bc_trans *trans)
 991 {
 992         struct qlcnic_trans_list *t_list = &vf->rcv_act;
 993
 994         t_list->count++;
 995         list_add_tail(&trans->list, &t_list->wait_list);
 996         if (t_list->count == 1)
 997                 qlcnic_sriov_schedule_bc_cmd(sriov, vf,
 998                                              qlcnic_sriov_process_bc_cmd);
 999         return 0;
1000 }
1001
1002 static int qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1003                                      struct qlcnic_vf_info *vf,
1004                                      struct qlcnic_bc_trans *trans)
1005 {
1006         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1007
1008         spin_lock(&t_list->lock);
1009
1010         __qlcnic_sriov_add_act_list(sriov, vf, trans);
1011
1012         spin_unlock(&t_list->lock);
1013         return 0;
1014 }
1015
1016 static void qlcnic_sriov_handle_pending_trans(struct qlcnic_sriov *sriov,
1017                                               struct qlcnic_vf_info *vf,
1018                                               struct qlcnic_bc_hdr *hdr)
1019 {
1020         struct qlcnic_bc_trans *trans = NULL;
1021         struct list_head *node;
1022         u32 pay_size, curr_frag;
1023         u8 found = 0, active = 0;
1024
1025         spin_lock(&vf->rcv_pend.lock);
1026         if (vf->rcv_pend.count > 0) {
1027                 list_for_each(node, &vf->rcv_pend.wait_list) {
1028                         trans = list_entry(node, struct qlcnic_bc_trans, list);
1029                         if (trans->trans_id == hdr->seq_id) {
1030                                 found = 1;
1031                                 break;
1032                         }
1033                 }
1034         }
1035
1036         if (found) {
1037                 curr_frag = trans->curr_req_frag;
1038                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1039                                                        curr_frag);
1040                 qlcnic_sriov_pull_bc_msg(vf->adapter,
1041                                          (u32 *)(trans->req_hdr + curr_frag),
1042                                          (u32 *)(trans->req_pay + curr_frag),
1043                                          pay_size);
1044                 trans->curr_req_frag++;
1045                 if (trans->curr_req_frag >= hdr->num_frags) {
1046                         vf->rcv_pend.count--;
1047                         list_del(&trans->list);
1048                         active = 1;
1049                 }
1050         }
1051         spin_unlock(&vf->rcv_pend.lock);
1052
1053         if (active)
1054                 if (qlcnic_sriov_add_act_list(sriov, vf, trans))
1055                         qlcnic_sriov_cleanup_transaction(trans);
1056
1057         return;
1058 }
1059
1060 static void qlcnic_sriov_handle_bc_cmd(struct qlcnic_sriov *sriov,
1061                                        struct qlcnic_bc_hdr *hdr,
1062                                        struct qlcnic_vf_info *vf)
1063 {
1064         struct qlcnic_bc_trans *trans;
1065         struct qlcnic_adapter *adapter = vf->adapter;
1066         struct qlcnic_cmd_args cmd;
1067         u32 pay_size;
1068         int err;
1069         u8 cmd_op;
1070
1071         if (adapter->need_fw_reset)
1072                 return;
1073
1074         if (!test_bit(QLC_BC_VF_STATE, &vf->state) &&
1075             hdr->op_type != QLC_BC_CMD &&
1076             hdr->cmd_op != QLCNIC_BC_CMD_CHANNEL_INIT)
1077                 return;
1078
1079         if (hdr->frag_num > 1) {
1080                 qlcnic_sriov_handle_pending_trans(sriov, vf, hdr);
1081                 return;
1082         }
1083
1084         cmd_op = hdr->cmd_op;
1085         if (qlcnic_sriov_alloc_bc_trans(&trans))
1086                 return;
1087
1088         if (hdr->op_type == QLC_BC_CMD)
1089                 err = qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op);
1090         else
1091                 err = qlcnic_alloc_mbx_args(&cmd, adapter, cmd_op);
1092
1093         if (err) {
1094                 qlcnic_sriov_cleanup_transaction(trans);
1095                 return;
1096         }
1097
1098         cmd.op_type = hdr->op_type;
1099         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, hdr->seq_id,
1100                                         QLC_BC_COMMAND)) {
1101                 qlcnic_free_mbx_args(&cmd);
1102                 qlcnic_sriov_cleanup_transaction(trans);
1103                 return;
1104         }
1105
1106         pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1107                                          trans->curr_req_frag);
1108         qlcnic_sriov_pull_bc_msg(vf->adapter,
1109                                  (u32 *)(trans->req_hdr + trans->curr_req_frag),
1110                                  (u32 *)(trans->req_pay + trans->curr_req_frag),
1111                                  pay_size);
1112         trans->func_id = vf->pci_func;
1113         trans->vf = vf;
1114         trans->trans_id = hdr->seq_id;
1115         trans->curr_req_frag++;
1116
1117         if (qlcnic_sriov_soft_flr_check(adapter, trans, vf))
1118                 return;
1119
1120         if (trans->curr_req_frag == trans->req_hdr->num_frags) {
1121                 if (qlcnic_sriov_add_act_list(sriov, vf, trans)) {
1122                         qlcnic_free_mbx_args(&cmd);
1123                         qlcnic_sriov_cleanup_transaction(trans);
1124                 }
1125         } else {
1126                 spin_lock(&vf->rcv_pend.lock);
1127                 list_add_tail(&trans->list, &vf->rcv_pend.wait_list);
1128                 vf->rcv_pend.count++;
1129                 spin_unlock(&vf->rcv_pend.lock);
1130         }
1131 }
1132
1133 static void qlcnic_sriov_handle_msg_event(struct qlcnic_sriov *sriov,
1134                                           struct qlcnic_vf_info *vf)
1135 {
1136         struct qlcnic_bc_hdr hdr;
1137         u32 *ptr = (u32 *)&hdr;
1138         u8 msg_type, i;
1139
1140         for (i = 2; i < 6; i++)
1141                 ptr[i - 2] = readl(QLCNIC_MBX_FW(vf->adapter->ahw, i));
1142         msg_type = hdr.msg_type;
1143
1144         switch (msg_type) {
1145         case QLC_BC_COMMAND:
1146                 qlcnic_sriov_handle_bc_cmd(sriov, &hdr, vf);
1147                 break;
1148         case QLC_BC_RESPONSE:
1149                 qlcnic_sriov_handle_bc_resp(&hdr, vf);
1150                 break;
1151         }
1152 }
1153
1154 static void qlcnic_sriov_handle_flr_event(struct qlcnic_sriov *sriov,
1155                                           struct qlcnic_vf_info *vf)
1156 {
1157         struct qlcnic_adapter *adapter = vf->adapter;
1158
1159         if (qlcnic_sriov_pf_check(adapter))
1160                 qlcnic_sriov_pf_handle_flr(sriov, vf);
1161         else
1162                 dev_err(&adapter->pdev->dev,
1163                         "Invalid event to VF. VF should not get FLR event\n");
1164 }
1165
1166 void qlcnic_sriov_handle_bc_event(struct qlcnic_adapter *adapter, u32 event)
1167 {
1168         struct qlcnic_vf_info *vf;
1169         struct qlcnic_sriov *sriov;
1170         int index;
1171         u8 pci_func;
1172
1173         sriov = adapter->ahw->sriov;
1174         pci_func = qlcnic_sriov_target_func_id(event);
1175         index = qlcnic_sriov_func_to_index(adapter, pci_func);
1176
1177         if (index < 0)
1178                 return;
1179
1180         vf = &sriov->vf_info[index];
1181         vf->pci_func = pci_func;
1182
1183         if (qlcnic_sriov_channel_free_check(event))
1184                 complete(&vf->ch_free_cmpl);
1185
1186         if (qlcnic_sriov_flr_check(event)) {
1187                 qlcnic_sriov_handle_flr_event(sriov, vf);
1188                 return;
1189         }
1190
1191         if (qlcnic_sriov_bc_msg_check(event))
1192                 qlcnic_sriov_handle_msg_event(sriov, vf);
1193 }
1194
1195 int qlcnic_sriov_cfg_bc_intr(struct qlcnic_adapter *adapter, u8 enable)
1196 {
1197         struct qlcnic_cmd_args cmd;
1198         int err;
1199
1200         if (!test_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state))
1201                 return 0;
1202
1203         if (qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_BC_EVENT_SETUP))
1204                 return -ENOMEM;
1205
1206         if (enable)
1207                 cmd.req.arg[1] = (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7);
1208
1209         err = qlcnic_83xx_mbx_op(adapter, &cmd);
1210
1211         if (err != QLCNIC_RCODE_SUCCESS) {
1212                 dev_err(&adapter->pdev->dev,
1213                         "Failed to %s bc events, err=%d\n",
1214                         (enable ? "enable" : "disable"), err);
1215         }
1216
1217         qlcnic_free_mbx_args(&cmd);
1218         return err;
1219 }
1220
1221 static int qlcnic_sriov_retry_bc_cmd(struct qlcnic_adapter *adapter,
1222                                      struct qlcnic_bc_trans *trans)
1223 {
1224         u8 max = QLC_BC_CMD_MAX_RETRY_CNT;
1225         u32 state;
1226
1227         state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1228         if (state == QLC_83XX_IDC_DEV_READY) {
1229                 msleep(20);
1230                 clear_bit(QLC_BC_VF_CHANNEL, &trans->vf->state);
1231                 trans->trans_state = QLC_INIT;
1232                 if (++adapter->fw_fail_cnt > max)
1233                         return -EIO;
1234                 else
1235                         return 0;
1236         }
1237
1238         return -EIO;
1239 }
1240
1241 static int qlcnic_sriov_vf_mbx_op(struct qlcnic_adapter *adapter,
1242                                   struct qlcnic_cmd_args *cmd)
1243 {
1244         struct qlcnic_hardware_context *ahw = adapter->ahw;
1245         struct device *dev = &adapter->pdev->dev;
1246         struct qlcnic_bc_trans *trans;
1247         int err;
1248         u32 rsp_data, opcode, mbx_err_code, rsp;
1249         u16 seq = ++adapter->ahw->sriov->bc.trans_counter;
1250         u8 func = ahw->pci_func;
1251
1252         rsp = qlcnic_sriov_alloc_bc_trans(&trans);
1253         if (rsp)
1254                 return rsp;
1255
1256         rsp = qlcnic_sriov_prepare_bc_hdr(trans, cmd, seq, QLC_BC_COMMAND);
1257         if (rsp)
1258                 goto cleanup_transaction;
1259
1260 retry:
1261         if (!test_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status)) {
1262                 rsp = -EIO;
1263                 QLCDB(adapter, DRV, "MBX not Ready!(cmd 0x%x) for VF 0x%x\n",
1264                       QLCNIC_MBX_RSP(cmd->req.arg[0]), func);
1265                 goto err_out;
1266         }
1267
1268         err = qlcnic_sriov_send_bc_cmd(adapter, trans, func);
1269         if (err) {
1270                 dev_err(dev, "MBX command 0x%x timed out for VF %d\n",
1271                         (cmd->req.arg[0] & 0xffff), func);
1272                 rsp = QLCNIC_RCODE_TIMEOUT;
1273
1274                 /* After adapter reset PF driver may take some time to
1275                  * respond to VF's request. Retry request till maximum retries.
1276                  */
1277                 if ((trans->req_hdr->cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT) &&
1278                     !qlcnic_sriov_retry_bc_cmd(adapter, trans))
1279                         goto retry;
1280
1281                 goto err_out;
1282         }
1283
1284         rsp_data = cmd->rsp.arg[0];
1285         mbx_err_code = QLCNIC_MBX_STATUS(rsp_data);
1286         opcode = QLCNIC_MBX_RSP(cmd->req.arg[0]);
1287
1288         if ((mbx_err_code == QLCNIC_MBX_RSP_OK) ||
1289             (mbx_err_code == QLCNIC_MBX_PORT_RSP_OK)) {
1290                 rsp = QLCNIC_RCODE_SUCCESS;
1291         } else {
1292                 rsp = mbx_err_code;
1293                 if (!rsp)
1294                         rsp = 1;
1295                 dev_err(dev,
1296                         "MBX command 0x%x failed with err:0x%x for VF %d\n",
1297                         opcode, mbx_err_code, func);
1298         }
1299
1300 err_out:
1301         if (rsp == QLCNIC_RCODE_TIMEOUT) {
1302                 ahw->reset_context = 1;
1303                 adapter->need_fw_reset = 1;
1304                 clear_bit(QLC_83XX_MBX_READY, &ahw->idc.status);
1305         }
1306
1307 cleanup_transaction:
1308         qlcnic_sriov_cleanup_transaction(trans);
1309         return rsp;
1310 }
1311
1312 int qlcnic_sriov_channel_cfg_cmd(struct qlcnic_adapter *adapter, u8 cmd_op)
1313 {
1314         struct qlcnic_cmd_args cmd;
1315         struct qlcnic_vf_info *vf = &adapter->ahw->sriov->vf_info[0];
1316         int ret;
1317
1318         if (qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op))
1319                 return -ENOMEM;
1320
1321         ret = qlcnic_issue_cmd(adapter, &cmd);
1322         if (ret) {
1323                 dev_err(&adapter->pdev->dev,
1324                         "Failed bc channel %s %d\n", cmd_op ? "term" : "init",
1325                         ret);
1326                 goto out;
1327         }
1328
1329         cmd_op = (cmd.rsp.arg[0] & 0xff);
1330         if (cmd.rsp.arg[0] >> 25 == 2)
1331                 return 2;
1332         if (cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT)
1333                 set_bit(QLC_BC_VF_STATE, &vf->state);
1334         else
1335                 clear_bit(QLC_BC_VF_STATE, &vf->state);
1336
1337 out:
1338         qlcnic_free_mbx_args(&cmd);
1339         return ret;
1340 }
1341
1342 void qlcnic_vf_add_mc_list(struct net_device *netdev)
1343 {
1344         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1345         struct qlcnic_mac_list_s *cur;
1346         struct list_head *head, tmp_list;
1347
1348         INIT_LIST_HEAD(&tmp_list);
1349         head = &adapter->vf_mc_list;
1350         netif_addr_lock_bh(netdev);
1351
1352         while (!list_empty(head)) {
1353                 cur = list_entry(head->next, struct qlcnic_mac_list_s, list);
1354                 list_move(&cur->list, &tmp_list);
1355         }
1356
1357         netif_addr_unlock_bh(netdev);
1358
1359         while (!list_empty(&tmp_list)) {
1360                 cur = list_entry((&tmp_list)->next,
1361                                  struct qlcnic_mac_list_s, list);
1362                 qlcnic_nic_add_mac(adapter, cur->mac_addr);
1363                 list_del(&cur->list);
1364                 kfree(cur);
1365         }
1366 }
1367
1368 void qlcnic_sriov_cleanup_async_list(struct qlcnic_back_channel *bc)
1369 {
1370         struct list_head *head = &bc->async_list;
1371         struct qlcnic_async_work_list *entry;
1372
1373         while (!list_empty(head)) {
1374                 entry = list_entry(head->next, struct qlcnic_async_work_list,
1375                                    list);
1376                 cancel_work_sync(&entry->work);
1377                 list_del(&entry->list);
1378                 kfree(entry);
1379         }
1380 }
1381
1382 static void qlcnic_sriov_vf_set_multi(struct net_device *netdev)
1383 {
1384         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1385
1386         if (!test_bit(__QLCNIC_FW_ATTACHED, &adapter->state))
1387                 return;
1388
1389         __qlcnic_set_multi(netdev);
1390 }
1391
1392 static void qlcnic_sriov_handle_async_multi(struct work_struct *work)
1393 {
1394         struct qlcnic_async_work_list *entry;
1395         struct net_device *netdev;
1396
1397         entry = container_of(work, struct qlcnic_async_work_list, work);
1398         netdev = (struct net_device *)entry->ptr;
1399
1400         qlcnic_sriov_vf_set_multi(netdev);
1401         return;
1402 }
1403
1404 static struct qlcnic_async_work_list *
1405 qlcnic_sriov_get_free_node_async_work(struct qlcnic_back_channel *bc)
1406 {
1407         struct list_head *node;
1408         struct qlcnic_async_work_list *entry = NULL;
1409         u8 empty = 0;
1410
1411         list_for_each(node, &bc->async_list) {
1412                 entry = list_entry(node, struct qlcnic_async_work_list, list);
1413                 if (!work_pending(&entry->work)) {
1414                         empty = 1;
1415                         break;
1416                 }
1417         }
1418
1419         if (!empty) {
1420                 entry = kzalloc(sizeof(struct qlcnic_async_work_list),
1421                                 GFP_ATOMIC);
1422                 if (entry == NULL)
1423                         return NULL;
1424                 list_add_tail(&entry->list, &bc->async_list);
1425         }
1426
1427         return entry;
1428 }
1429
1430 static void qlcnic_sriov_schedule_bc_async_work(struct qlcnic_back_channel *bc,
1431                                                 work_func_t func, void *data)
1432 {
1433         struct qlcnic_async_work_list *entry = NULL;
1434
1435         entry = qlcnic_sriov_get_free_node_async_work(bc);
1436         if (!entry)
1437                 return;
1438
1439         entry->ptr = data;
1440         INIT_WORK(&entry->work, func);
1441         queue_work(bc->bc_async_wq, &entry->work);
1442 }
1443
1444 void qlcnic_sriov_vf_schedule_multi(struct net_device *netdev)
1445 {
1446
1447         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1448         struct qlcnic_back_channel *bc = &adapter->ahw->sriov->bc;
1449
1450         if (adapter->need_fw_reset)
1451                 return;
1452
1453         qlcnic_sriov_schedule_bc_async_work(bc, qlcnic_sriov_handle_async_multi,
1454                                             netdev);
1455 }
1456
1457 static int qlcnic_sriov_vf_reinit_driver(struct qlcnic_adapter *adapter)
1458 {
1459         int err;
1460
1461         set_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status);
1462         qlcnic_83xx_enable_mbx_intrpt(adapter);
1463
1464         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
1465         if (err)
1466                 return err;
1467
1468         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
1469         if (err)
1470                 goto err_out_cleanup_bc_intr;
1471
1472         err = qlcnic_sriov_vf_init_driver(adapter);
1473         if (err)
1474                 goto err_out_term_channel;
1475
1476         return 0;
1477
1478 err_out_term_channel:
1479         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
1480
1481 err_out_cleanup_bc_intr:
1482         qlcnic_sriov_cfg_bc_intr(adapter, 0);
1483         return err;
1484 }
1485
1486 static void qlcnic_sriov_vf_attach(struct qlcnic_adapter *adapter)
1487 {
1488         struct net_device *netdev = adapter->netdev;
1489
1490         if (netif_running(netdev)) {
1491                 if (!qlcnic_up(adapter, netdev))
1492                         qlcnic_restore_indev_addr(netdev, NETDEV_UP);
1493         }
1494
1495         netif_device_attach(netdev);
1496 }
1497
1498 static void qlcnic_sriov_vf_detach(struct qlcnic_adapter *adapter)
1499 {
1500         struct qlcnic_hardware_context *ahw = adapter->ahw;
1501         struct qlcnic_intrpt_config *intr_tbl = ahw->intr_tbl;
1502         struct net_device *netdev = adapter->netdev;
1503         u8 i, max_ints = ahw->num_msix - 1;
1504
1505         qlcnic_83xx_disable_mbx_intr(adapter);
1506         netif_device_detach(netdev);
1507         if (netif_running(netdev))
1508                 qlcnic_down(adapter, netdev);
1509
1510         for (i = 0; i < max_ints; i++) {
1511                 intr_tbl[i].id = i;
1512                 intr_tbl[i].enabled = 0;
1513                 intr_tbl[i].src = 0;
1514         }
1515         ahw->reset_context = 0;
1516 }
1517
1518 static int qlcnic_sriov_vf_handle_dev_ready(struct qlcnic_adapter *adapter)
1519 {
1520         struct qlcnic_hardware_context *ahw = adapter->ahw;
1521         struct device *dev = &adapter->pdev->dev;
1522         struct qlc_83xx_idc *idc = &ahw->idc;
1523         u8 func = ahw->pci_func;
1524         u32 state;
1525
1526         if ((idc->prev_state == QLC_83XX_IDC_DEV_NEED_RESET) ||
1527             (idc->prev_state == QLC_83XX_IDC_DEV_INIT)) {
1528                 if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1529                         qlcnic_sriov_vf_attach(adapter);
1530                         adapter->fw_fail_cnt = 0;
1531                         dev_info(dev,
1532                                  "%s: Reinitalization of VF 0x%x done after FW reset\n",
1533                                  __func__, func);
1534                 } else {
1535                         dev_err(dev,
1536                                 "%s: Reinitialization of VF 0x%x failed after FW reset\n",
1537                                 __func__, func);
1538                         state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1539                         dev_info(dev, "Current state 0x%x after FW reset\n",
1540                                  state);
1541                 }
1542         }
1543
1544         return 0;
1545 }
1546
1547 static int qlcnic_sriov_vf_handle_context_reset(struct qlcnic_adapter *adapter)
1548 {
1549         struct qlcnic_hardware_context *ahw = adapter->ahw;
1550         struct device *dev = &adapter->pdev->dev;
1551         struct qlc_83xx_idc *idc = &ahw->idc;
1552         u8 func = ahw->pci_func;
1553         u32 state;
1554
1555         adapter->reset_ctx_cnt++;
1556
1557         /* Skip the context reset and check if FW is hung */
1558         if (adapter->reset_ctx_cnt < 3) {
1559                 adapter->need_fw_reset = 1;
1560                 clear_bit(QLC_83XX_MBX_READY, &idc->status);
1561                 dev_info(dev,
1562                          "Resetting context, wait here to check if FW is in failed state\n");
1563                 return 0;
1564         }
1565
1566         /* Check if number of resets exceed the threshold.
1567          * If it exceeds the threshold just fail the VF.
1568          */
1569         if (adapter->reset_ctx_cnt > QLC_83XX_VF_RESET_FAIL_THRESH) {
1570                 clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1571                 adapter->tx_timeo_cnt = 0;
1572                 adapter->fw_fail_cnt = 0;
1573                 adapter->reset_ctx_cnt = 0;
1574                 qlcnic_sriov_vf_detach(adapter);
1575                 dev_err(dev,
1576                         "Device context resets have exceeded the threshold, device interface will be shutdown\n");
1577                 return -EIO;
1578         }
1579
1580         dev_info(dev, "Resetting context of VF 0x%x\n", func);
1581         dev_info(dev, "%s: Context reset count %d for VF 0x%x\n",
1582                  __func__, adapter->reset_ctx_cnt, func);
1583         set_bit(__QLCNIC_RESETTING, &adapter->state);
1584         adapter->need_fw_reset = 1;
1585         clear_bit(QLC_83XX_MBX_READY, &idc->status);
1586         qlcnic_sriov_vf_detach(adapter);
1587         adapter->need_fw_reset = 0;
1588
1589         if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1590                 qlcnic_sriov_vf_attach(adapter);
1591                 adapter->netdev->trans_start = jiffies;
1592                 adapter->tx_timeo_cnt = 0;
1593                 adapter->reset_ctx_cnt = 0;
1594                 adapter->fw_fail_cnt = 0;
1595                 dev_info(dev, "Done resetting context for VF 0x%x\n", func);
1596         } else {
1597                 dev_err(dev, "%s: Reinitialization of VF 0x%x failed\n",
1598                         __func__, func);
1599                 state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1600                 dev_info(dev, "%s: Current state 0x%x\n", __func__, state);
1601         }
1602
1603         return 0;
1604 }
1605
1606 static int qlcnic_sriov_vf_idc_ready_state(struct qlcnic_adapter *adapter)
1607 {
1608         struct qlcnic_hardware_context *ahw = adapter->ahw;
1609         int ret = 0;
1610
1611         if (ahw->idc.prev_state != QLC_83XX_IDC_DEV_READY)
1612                 ret = qlcnic_sriov_vf_handle_dev_ready(adapter);
1613         else if (ahw->reset_context)
1614                 ret = qlcnic_sriov_vf_handle_context_reset(adapter);
1615
1616         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1617         return ret;
1618 }
1619
1620 static int qlcnic_sriov_vf_idc_failed_state(struct qlcnic_adapter *adapter)
1621 {
1622         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1623
1624         dev_err(&adapter->pdev->dev, "Device is in failed state\n");
1625         if (idc->prev_state == QLC_83XX_IDC_DEV_READY)
1626                 qlcnic_sriov_vf_detach(adapter);
1627
1628         clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1629         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1630         return -EIO;
1631 }
1632
1633 static int
1634 qlcnic_sriov_vf_idc_need_quiescent_state(struct qlcnic_adapter *adapter)
1635 {
1636         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1637
1638         dev_info(&adapter->pdev->dev, "Device is in quiescent state\n");
1639         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1640                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1641                 adapter->tx_timeo_cnt = 0;
1642                 adapter->reset_ctx_cnt = 0;
1643                 clear_bit(QLC_83XX_MBX_READY, &idc->status);
1644                 qlcnic_sriov_vf_detach(adapter);
1645         }
1646
1647         return 0;
1648 }
1649
1650 static int qlcnic_sriov_vf_idc_init_reset_state(struct qlcnic_adapter *adapter)
1651 {
1652         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1653         u8 func = adapter->ahw->pci_func;
1654
1655         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1656                 dev_err(&adapter->pdev->dev,
1657                         "Firmware hang detected by VF 0x%x\n", func);
1658                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1659                 adapter->tx_timeo_cnt = 0;
1660                 adapter->reset_ctx_cnt = 0;
1661                 clear_bit(QLC_83XX_MBX_READY, &idc->status);
1662                 qlcnic_sriov_vf_detach(adapter);
1663         }
1664         return 0;
1665 }
1666
1667 static int qlcnic_sriov_vf_idc_unknown_state(struct qlcnic_adapter *adapter)
1668 {
1669         dev_err(&adapter->pdev->dev, "%s: Device in unknown state\n", __func__);
1670         return 0;
1671 }
1672
1673 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *work)
1674 {
1675         struct qlcnic_adapter *adapter;
1676         struct qlc_83xx_idc *idc;
1677         int ret = 0;
1678
1679         adapter = container_of(work, struct qlcnic_adapter, fw_work.work);
1680         idc = &adapter->ahw->idc;
1681         idc->curr_state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1682
1683         switch (idc->curr_state) {
1684         case QLC_83XX_IDC_DEV_READY:
1685                 ret = qlcnic_sriov_vf_idc_ready_state(adapter);
1686                 break;
1687         case QLC_83XX_IDC_DEV_NEED_RESET:
1688         case QLC_83XX_IDC_DEV_INIT:
1689                 ret = qlcnic_sriov_vf_idc_init_reset_state(adapter);
1690                 break;
1691         case QLC_83XX_IDC_DEV_NEED_QUISCENT:
1692                 ret = qlcnic_sriov_vf_idc_need_quiescent_state(adapter);
1693                 break;
1694         case QLC_83XX_IDC_DEV_FAILED:
1695                 ret = qlcnic_sriov_vf_idc_failed_state(adapter);
1696                 break;
1697         case QLC_83XX_IDC_DEV_QUISCENT:
1698                 break;
1699         default:
1700                 ret = qlcnic_sriov_vf_idc_unknown_state(adapter);
1701         }
1702
1703         idc->prev_state = idc->curr_state;
1704         if (!ret && test_bit(QLC_83XX_MODULE_LOADED, &idc->status))
1705                 qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
1706                                      idc->delay);
1707 }
1708
1709 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *adapter)
1710 {
1711         while (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
1712                 msleep(20);
1713
1714         clear_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status);
1715         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1716         cancel_delayed_work_sync(&adapter->fw_work);
1717 }