1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/ethtool.h>
21 #include <linux/topology.h>
22 #include <linux/gfp.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include "net_driver.h"
31 #include "workarounds.h"
33 /**************************************************************************
37 **************************************************************************
40 /* Loopback mode names (see LOOPBACK_MODE()) */
41 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
42 const char *const efx_loopback_mode_names[] = {
43 [LOOPBACK_NONE] = "NONE",
44 [LOOPBACK_DATA] = "DATAPATH",
45 [LOOPBACK_GMAC] = "GMAC",
46 [LOOPBACK_XGMII] = "XGMII",
47 [LOOPBACK_XGXS] = "XGXS",
48 [LOOPBACK_XAUI] = "XAUI",
49 [LOOPBACK_GMII] = "GMII",
50 [LOOPBACK_SGMII] = "SGMII",
51 [LOOPBACK_XGBR] = "XGBR",
52 [LOOPBACK_XFI] = "XFI",
53 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
54 [LOOPBACK_GMII_FAR] = "GMII_FAR",
55 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
56 [LOOPBACK_XFI_FAR] = "XFI_FAR",
57 [LOOPBACK_GPHY] = "GPHY",
58 [LOOPBACK_PHYXS] = "PHYXS",
59 [LOOPBACK_PCS] = "PCS",
60 [LOOPBACK_PMAPMD] = "PMA/PMD",
61 [LOOPBACK_XPORT] = "XPORT",
62 [LOOPBACK_XGMII_WS] = "XGMII_WS",
63 [LOOPBACK_XAUI_WS] = "XAUI_WS",
64 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
65 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
66 [LOOPBACK_GMII_WS] = "GMII_WS",
67 [LOOPBACK_XFI_WS] = "XFI_WS",
68 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
69 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
72 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
73 const char *const efx_reset_type_names[] = {
74 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
75 [RESET_TYPE_ALL] = "ALL",
76 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
77 [RESET_TYPE_WORLD] = "WORLD",
78 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
79 [RESET_TYPE_DISABLE] = "DISABLE",
80 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
81 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
82 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
83 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
84 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
85 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
86 [RESET_TYPE_MC_BIST] = "MC_BIST",
89 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
90 * queued onto this work queue. This is not a per-nic work queue, because
91 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
93 static struct workqueue_struct *reset_workqueue;
95 /* How often and how many times to poll for a reset while waiting for a
96 * BIST that another function started to complete.
98 #define BIST_WAIT_DELAY_MS 100
99 #define BIST_WAIT_DELAY_COUNT 100
101 /**************************************************************************
103 * Configurable values
105 *************************************************************************/
108 * Use separate channels for TX and RX events
110 * Set this to 1 to use separate channels for TX and RX. It allows us
111 * to control interrupt affinity separately for TX and RX.
113 * This is only used in MSI-X interrupt mode
115 static bool separate_tx_channels;
116 module_param(separate_tx_channels, bool, 0444);
117 MODULE_PARM_DESC(separate_tx_channels,
118 "Use separate channels for TX and RX");
120 /* This is the weight assigned to each of the (per-channel) virtual
123 static int napi_weight = 64;
125 /* This is the time (in jiffies) between invocations of the hardware
127 * On Falcon-based NICs, this will:
128 * - Check the on-board hardware monitor;
129 * - Poll the link state and reconfigure the hardware as necessary.
130 * On Siena-based NICs for power systems with EEH support, this will give EEH a
133 static unsigned int efx_monitor_interval = 1 * HZ;
135 /* Initial interrupt moderation settings. They can be modified after
136 * module load with ethtool.
138 * The default for RX should strike a balance between increasing the
139 * round-trip latency and reducing overhead.
141 static unsigned int rx_irq_mod_usec = 60;
143 /* Initial interrupt moderation settings. They can be modified after
144 * module load with ethtool.
146 * This default is chosen to ensure that a 10G link does not go idle
147 * while a TX queue is stopped after it has become full. A queue is
148 * restarted when it drops below half full. The time this takes (assuming
149 * worst case 3 descriptors per packet and 1024 descriptors) is
150 * 512 / 3 * 1.2 = 205 usec.
152 static unsigned int tx_irq_mod_usec = 150;
154 /* This is the first interrupt mode to try out of:
159 static unsigned int interrupt_mode;
161 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
162 * i.e. the number of CPUs among which we may distribute simultaneous
163 * interrupt handling.
165 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
166 * The default (0) means to assign an interrupt to each core.
168 static unsigned int rss_cpus;
169 module_param(rss_cpus, uint, 0444);
170 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
172 static bool phy_flash_cfg;
173 module_param(phy_flash_cfg, bool, 0644);
174 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
176 static unsigned irq_adapt_low_thresh = 8000;
177 module_param(irq_adapt_low_thresh, uint, 0644);
178 MODULE_PARM_DESC(irq_adapt_low_thresh,
179 "Threshold score for reducing IRQ moderation");
181 static unsigned irq_adapt_high_thresh = 16000;
182 module_param(irq_adapt_high_thresh, uint, 0644);
183 MODULE_PARM_DESC(irq_adapt_high_thresh,
184 "Threshold score for increasing IRQ moderation");
186 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
187 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
188 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
189 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
190 module_param(debug, uint, 0);
191 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
193 /**************************************************************************
195 * Utility functions and prototypes
197 *************************************************************************/
199 static int efx_soft_enable_interrupts(struct efx_nic *efx);
200 static void efx_soft_disable_interrupts(struct efx_nic *efx);
201 static void efx_remove_channel(struct efx_channel *channel);
202 static void efx_remove_channels(struct efx_nic *efx);
203 static const struct efx_channel_type efx_default_channel_type;
204 static void efx_remove_port(struct efx_nic *efx);
205 static void efx_init_napi_channel(struct efx_channel *channel);
206 static void efx_fini_napi(struct efx_nic *efx);
207 static void efx_fini_napi_channel(struct efx_channel *channel);
208 static void efx_fini_struct(struct efx_nic *efx);
209 static void efx_start_all(struct efx_nic *efx);
210 static void efx_stop_all(struct efx_nic *efx);
212 #define EFX_ASSERT_RESET_SERIALISED(efx) \
214 if ((efx->state == STATE_READY) || \
215 (efx->state == STATE_RECOVERY) || \
216 (efx->state == STATE_DISABLED)) \
220 static int efx_check_disabled(struct efx_nic *efx)
222 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
223 netif_err(efx, drv, efx->net_dev,
224 "device is disabled due to earlier errors\n");
230 /**************************************************************************
232 * Event queue processing
234 *************************************************************************/
236 /* Process channel's event queue
238 * This function is responsible for processing the event queue of a
239 * single channel. The caller must guarantee that this function will
240 * never be concurrently called more than once on the same channel,
241 * though different channels may be being processed concurrently.
243 static int efx_process_channel(struct efx_channel *channel, int budget)
247 if (unlikely(!channel->enabled))
250 spent = efx_nic_process_eventq(channel, budget);
251 if (spent && efx_channel_has_rx_queue(channel)) {
252 struct efx_rx_queue *rx_queue =
253 efx_channel_get_rx_queue(channel);
255 efx_rx_flush_packet(channel);
256 efx_fast_push_rx_descriptors(rx_queue, true);
264 * NAPI guarantees serialisation of polls of the same device, which
265 * provides the guarantee required by efx_process_channel().
267 static int efx_poll(struct napi_struct *napi, int budget)
269 struct efx_channel *channel =
270 container_of(napi, struct efx_channel, napi_str);
271 struct efx_nic *efx = channel->efx;
274 netif_vdbg(efx, intr, efx->net_dev,
275 "channel %d NAPI poll executing on CPU %d\n",
276 channel->channel, raw_smp_processor_id());
278 spent = efx_process_channel(channel, budget);
280 if (spent < budget) {
281 if (efx_channel_has_rx_queue(channel) &&
282 efx->irq_rx_adaptive &&
283 unlikely(++channel->irq_count == 1000)) {
284 if (unlikely(channel->irq_mod_score <
285 irq_adapt_low_thresh)) {
286 if (channel->irq_moderation > 1) {
287 channel->irq_moderation -= 1;
288 efx->type->push_irq_moderation(channel);
290 } else if (unlikely(channel->irq_mod_score >
291 irq_adapt_high_thresh)) {
292 if (channel->irq_moderation <
293 efx->irq_rx_moderation) {
294 channel->irq_moderation += 1;
295 efx->type->push_irq_moderation(channel);
298 channel->irq_count = 0;
299 channel->irq_mod_score = 0;
302 efx_filter_rfs_expire(channel);
304 /* There is no race here; although napi_disable() will
305 * only wait for napi_complete(), this isn't a problem
306 * since efx_nic_eventq_read_ack() will have no effect if
307 * interrupts have already been disabled.
310 efx_nic_eventq_read_ack(channel);
316 /* Create event queue
317 * Event queue memory allocations are done only once. If the channel
318 * is reset, the memory buffer will be reused; this guards against
319 * errors during channel reset and also simplifies interrupt handling.
321 static int efx_probe_eventq(struct efx_channel *channel)
323 struct efx_nic *efx = channel->efx;
324 unsigned long entries;
326 netif_dbg(efx, probe, efx->net_dev,
327 "chan %d create event queue\n", channel->channel);
329 /* Build an event queue with room for one event per tx and rx buffer,
330 * plus some extra for link state events and MCDI completions. */
331 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
332 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
333 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
335 return efx_nic_probe_eventq(channel);
338 /* Prepare channel's event queue */
339 static int efx_init_eventq(struct efx_channel *channel)
341 struct efx_nic *efx = channel->efx;
344 EFX_WARN_ON_PARANOID(channel->eventq_init);
346 netif_dbg(efx, drv, efx->net_dev,
347 "chan %d init event queue\n", channel->channel);
349 rc = efx_nic_init_eventq(channel);
351 efx->type->push_irq_moderation(channel);
352 channel->eventq_read_ptr = 0;
353 channel->eventq_init = true;
358 /* Enable event queue processing and NAPI */
359 static void efx_start_eventq(struct efx_channel *channel)
361 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
362 "chan %d start event queue\n", channel->channel);
364 /* Make sure the NAPI handler sees the enabled flag set */
365 channel->enabled = true;
368 napi_enable(&channel->napi_str);
369 efx_nic_eventq_read_ack(channel);
372 /* Disable event queue processing and NAPI */
373 static void efx_stop_eventq(struct efx_channel *channel)
375 if (!channel->enabled)
378 napi_disable(&channel->napi_str);
379 channel->enabled = false;
382 static void efx_fini_eventq(struct efx_channel *channel)
384 if (!channel->eventq_init)
387 netif_dbg(channel->efx, drv, channel->efx->net_dev,
388 "chan %d fini event queue\n", channel->channel);
390 efx_nic_fini_eventq(channel);
391 channel->eventq_init = false;
394 static void efx_remove_eventq(struct efx_channel *channel)
396 netif_dbg(channel->efx, drv, channel->efx->net_dev,
397 "chan %d remove event queue\n", channel->channel);
399 efx_nic_remove_eventq(channel);
402 /**************************************************************************
406 *************************************************************************/
408 /* Allocate and initialise a channel structure. */
409 static struct efx_channel *
410 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
412 struct efx_channel *channel;
413 struct efx_rx_queue *rx_queue;
414 struct efx_tx_queue *tx_queue;
417 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
422 channel->channel = i;
423 channel->type = &efx_default_channel_type;
425 for (j = 0; j < EFX_TXQ_TYPES; j++) {
426 tx_queue = &channel->tx_queue[j];
428 tx_queue->queue = i * EFX_TXQ_TYPES + j;
429 tx_queue->channel = channel;
432 rx_queue = &channel->rx_queue;
434 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
435 (unsigned long)rx_queue);
440 /* Allocate and initialise a channel structure, copying parameters
441 * (but not resources) from an old channel structure.
443 static struct efx_channel *
444 efx_copy_channel(const struct efx_channel *old_channel)
446 struct efx_channel *channel;
447 struct efx_rx_queue *rx_queue;
448 struct efx_tx_queue *tx_queue;
451 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
455 *channel = *old_channel;
457 channel->napi_dev = NULL;
458 memset(&channel->eventq, 0, sizeof(channel->eventq));
460 for (j = 0; j < EFX_TXQ_TYPES; j++) {
461 tx_queue = &channel->tx_queue[j];
462 if (tx_queue->channel)
463 tx_queue->channel = channel;
464 tx_queue->buffer = NULL;
465 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
468 rx_queue = &channel->rx_queue;
469 rx_queue->buffer = NULL;
470 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
471 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
472 (unsigned long)rx_queue);
477 static int efx_probe_channel(struct efx_channel *channel)
479 struct efx_tx_queue *tx_queue;
480 struct efx_rx_queue *rx_queue;
483 netif_dbg(channel->efx, probe, channel->efx->net_dev,
484 "creating channel %d\n", channel->channel);
486 rc = channel->type->pre_probe(channel);
490 rc = efx_probe_eventq(channel);
494 efx_for_each_channel_tx_queue(tx_queue, channel) {
495 rc = efx_probe_tx_queue(tx_queue);
500 efx_for_each_channel_rx_queue(rx_queue, channel) {
501 rc = efx_probe_rx_queue(rx_queue);
506 channel->n_rx_frm_trunc = 0;
511 efx_remove_channel(channel);
516 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
518 struct efx_nic *efx = channel->efx;
522 number = channel->channel;
523 if (efx->tx_channel_offset == 0) {
525 } else if (channel->channel < efx->tx_channel_offset) {
529 number -= efx->tx_channel_offset;
531 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
534 static void efx_set_channel_names(struct efx_nic *efx)
536 struct efx_channel *channel;
538 efx_for_each_channel(channel, efx)
539 channel->type->get_name(channel,
540 efx->msi_context[channel->channel].name,
541 sizeof(efx->msi_context[0].name));
544 static int efx_probe_channels(struct efx_nic *efx)
546 struct efx_channel *channel;
549 /* Restart special buffer allocation */
550 efx->next_buffer_table = 0;
552 /* Probe channels in reverse, so that any 'extra' channels
553 * use the start of the buffer table. This allows the traffic
554 * channels to be resized without moving them or wasting the
555 * entries before them.
557 efx_for_each_channel_rev(channel, efx) {
558 rc = efx_probe_channel(channel);
560 netif_err(efx, probe, efx->net_dev,
561 "failed to create channel %d\n",
566 efx_set_channel_names(efx);
571 efx_remove_channels(efx);
575 /* Channels are shutdown and reinitialised whilst the NIC is running
576 * to propagate configuration changes (mtu, checksum offload), or
577 * to clear hardware error conditions
579 static void efx_start_datapath(struct efx_nic *efx)
581 bool old_rx_scatter = efx->rx_scatter;
582 struct efx_tx_queue *tx_queue;
583 struct efx_rx_queue *rx_queue;
584 struct efx_channel *channel;
587 /* Calculate the rx buffer allocation parameters required to
588 * support the current MTU, including padding for header
589 * alignment and overruns.
591 efx->rx_dma_len = (efx->rx_prefix_size +
592 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
593 efx->type->rx_buffer_padding);
594 rx_buf_len = (sizeof(struct efx_rx_page_state) +
595 efx->rx_ip_align + efx->rx_dma_len);
596 if (rx_buf_len <= PAGE_SIZE) {
597 efx->rx_scatter = efx->type->always_rx_scatter;
598 efx->rx_buffer_order = 0;
599 } else if (efx->type->can_rx_scatter) {
600 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
601 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
602 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
603 EFX_RX_BUF_ALIGNMENT) >
605 efx->rx_scatter = true;
606 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
607 efx->rx_buffer_order = 0;
609 efx->rx_scatter = false;
610 efx->rx_buffer_order = get_order(rx_buf_len);
613 efx_rx_config_page_split(efx);
614 if (efx->rx_buffer_order)
615 netif_dbg(efx, drv, efx->net_dev,
616 "RX buf len=%u; page order=%u batch=%u\n",
617 efx->rx_dma_len, efx->rx_buffer_order,
618 efx->rx_pages_per_batch);
620 netif_dbg(efx, drv, efx->net_dev,
621 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
622 efx->rx_dma_len, efx->rx_page_buf_step,
623 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
625 /* RX filters may also have scatter-enabled flags */
626 if (efx->rx_scatter != old_rx_scatter)
627 efx->type->filter_update_rx_scatter(efx);
629 /* We must keep at least one descriptor in a TX ring empty.
630 * We could avoid this when the queue size does not exactly
631 * match the hardware ring size, but it's not that important.
632 * Therefore we stop the queue when one more skb might fill
633 * the ring completely. We wake it when half way back to
636 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
637 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
639 /* Initialise the channels */
640 efx_for_each_channel(channel, efx) {
641 efx_for_each_channel_tx_queue(tx_queue, channel) {
642 efx_init_tx_queue(tx_queue);
643 atomic_inc(&efx->active_queues);
646 efx_for_each_channel_rx_queue(rx_queue, channel) {
647 efx_init_rx_queue(rx_queue);
648 atomic_inc(&efx->active_queues);
649 efx_stop_eventq(channel);
650 efx_fast_push_rx_descriptors(rx_queue, false);
651 efx_start_eventq(channel);
654 WARN_ON(channel->rx_pkt_n_frags);
657 efx_ptp_start_datapath(efx);
659 if (netif_device_present(efx->net_dev))
660 netif_tx_wake_all_queues(efx->net_dev);
663 static void efx_stop_datapath(struct efx_nic *efx)
665 struct efx_channel *channel;
666 struct efx_tx_queue *tx_queue;
667 struct efx_rx_queue *rx_queue;
670 EFX_ASSERT_RESET_SERIALISED(efx);
671 BUG_ON(efx->port_enabled);
673 efx_ptp_stop_datapath(efx);
676 efx_for_each_channel(channel, efx) {
677 efx_for_each_channel_rx_queue(rx_queue, channel)
678 rx_queue->refill_enabled = false;
681 efx_for_each_channel(channel, efx) {
682 /* RX packet processing is pipelined, so wait for the
683 * NAPI handler to complete. At least event queue 0
684 * might be kept active by non-data events, so don't
685 * use napi_synchronize() but actually disable NAPI
688 if (efx_channel_has_rx_queue(channel)) {
689 efx_stop_eventq(channel);
690 efx_start_eventq(channel);
694 rc = efx->type->fini_dmaq(efx);
695 if (rc && EFX_WORKAROUND_7803(efx)) {
696 /* Schedule a reset to recover from the flush failure. The
697 * descriptor caches reference memory we're about to free,
698 * but falcon_reconfigure_mac_wrapper() won't reconnect
699 * the MACs because of the pending reset.
701 netif_err(efx, drv, efx->net_dev,
702 "Resetting to recover from flush failure\n");
703 efx_schedule_reset(efx, RESET_TYPE_ALL);
705 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
707 netif_dbg(efx, drv, efx->net_dev,
708 "successfully flushed all queues\n");
711 efx_for_each_channel(channel, efx) {
712 efx_for_each_channel_rx_queue(rx_queue, channel)
713 efx_fini_rx_queue(rx_queue);
714 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
715 efx_fini_tx_queue(tx_queue);
719 static void efx_remove_channel(struct efx_channel *channel)
721 struct efx_tx_queue *tx_queue;
722 struct efx_rx_queue *rx_queue;
724 netif_dbg(channel->efx, drv, channel->efx->net_dev,
725 "destroy chan %d\n", channel->channel);
727 efx_for_each_channel_rx_queue(rx_queue, channel)
728 efx_remove_rx_queue(rx_queue);
729 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
730 efx_remove_tx_queue(tx_queue);
731 efx_remove_eventq(channel);
732 channel->type->post_remove(channel);
735 static void efx_remove_channels(struct efx_nic *efx)
737 struct efx_channel *channel;
739 efx_for_each_channel(channel, efx)
740 efx_remove_channel(channel);
744 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
746 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
747 u32 old_rxq_entries, old_txq_entries;
748 unsigned i, next_buffer_table = 0;
751 rc = efx_check_disabled(efx);
755 /* Not all channels should be reallocated. We must avoid
756 * reallocating their buffer table entries.
758 efx_for_each_channel(channel, efx) {
759 struct efx_rx_queue *rx_queue;
760 struct efx_tx_queue *tx_queue;
762 if (channel->type->copy)
764 next_buffer_table = max(next_buffer_table,
765 channel->eventq.index +
766 channel->eventq.entries);
767 efx_for_each_channel_rx_queue(rx_queue, channel)
768 next_buffer_table = max(next_buffer_table,
769 rx_queue->rxd.index +
770 rx_queue->rxd.entries);
771 efx_for_each_channel_tx_queue(tx_queue, channel)
772 next_buffer_table = max(next_buffer_table,
773 tx_queue->txd.index +
774 tx_queue->txd.entries);
777 efx_device_detach_sync(efx);
779 efx_soft_disable_interrupts(efx);
781 /* Clone channels (where possible) */
782 memset(other_channel, 0, sizeof(other_channel));
783 for (i = 0; i < efx->n_channels; i++) {
784 channel = efx->channel[i];
785 if (channel->type->copy)
786 channel = channel->type->copy(channel);
791 other_channel[i] = channel;
794 /* Swap entry counts and channel pointers */
795 old_rxq_entries = efx->rxq_entries;
796 old_txq_entries = efx->txq_entries;
797 efx->rxq_entries = rxq_entries;
798 efx->txq_entries = txq_entries;
799 for (i = 0; i < efx->n_channels; i++) {
800 channel = efx->channel[i];
801 efx->channel[i] = other_channel[i];
802 other_channel[i] = channel;
805 /* Restart buffer table allocation */
806 efx->next_buffer_table = next_buffer_table;
808 for (i = 0; i < efx->n_channels; i++) {
809 channel = efx->channel[i];
810 if (!channel->type->copy)
812 rc = efx_probe_channel(channel);
815 efx_init_napi_channel(efx->channel[i]);
819 /* Destroy unused channel structures */
820 for (i = 0; i < efx->n_channels; i++) {
821 channel = other_channel[i];
822 if (channel && channel->type->copy) {
823 efx_fini_napi_channel(channel);
824 efx_remove_channel(channel);
829 rc2 = efx_soft_enable_interrupts(efx);
832 netif_err(efx, drv, efx->net_dev,
833 "unable to restart interrupts on channel reallocation\n");
834 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
837 netif_device_attach(efx->net_dev);
843 efx->rxq_entries = old_rxq_entries;
844 efx->txq_entries = old_txq_entries;
845 for (i = 0; i < efx->n_channels; i++) {
846 channel = efx->channel[i];
847 efx->channel[i] = other_channel[i];
848 other_channel[i] = channel;
853 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
855 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
858 static const struct efx_channel_type efx_default_channel_type = {
859 .pre_probe = efx_channel_dummy_op_int,
860 .post_remove = efx_channel_dummy_op_void,
861 .get_name = efx_get_channel_name,
862 .copy = efx_copy_channel,
863 .keep_eventq = false,
866 int efx_channel_dummy_op_int(struct efx_channel *channel)
871 void efx_channel_dummy_op_void(struct efx_channel *channel)
875 /**************************************************************************
879 **************************************************************************/
881 /* This ensures that the kernel is kept informed (via
882 * netif_carrier_on/off) of the link status, and also maintains the
883 * link status's stop on the port's TX queue.
885 void efx_link_status_changed(struct efx_nic *efx)
887 struct efx_link_state *link_state = &efx->link_state;
889 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
890 * that no events are triggered between unregister_netdev() and the
891 * driver unloading. A more general condition is that NETDEV_CHANGE
892 * can only be generated between NETDEV_UP and NETDEV_DOWN */
893 if (!netif_running(efx->net_dev))
896 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
897 efx->n_link_state_changes++;
900 netif_carrier_on(efx->net_dev);
902 netif_carrier_off(efx->net_dev);
905 /* Status message for kernel log */
907 netif_info(efx, link, efx->net_dev,
908 "link up at %uMbps %s-duplex (MTU %d)\n",
909 link_state->speed, link_state->fd ? "full" : "half",
912 netif_info(efx, link, efx->net_dev, "link down\n");
915 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
917 efx->link_advertising = advertising;
919 if (advertising & ADVERTISED_Pause)
920 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
922 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
923 if (advertising & ADVERTISED_Asym_Pause)
924 efx->wanted_fc ^= EFX_FC_TX;
928 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
930 efx->wanted_fc = wanted_fc;
931 if (efx->link_advertising) {
932 if (wanted_fc & EFX_FC_RX)
933 efx->link_advertising |= (ADVERTISED_Pause |
934 ADVERTISED_Asym_Pause);
936 efx->link_advertising &= ~(ADVERTISED_Pause |
937 ADVERTISED_Asym_Pause);
938 if (wanted_fc & EFX_FC_TX)
939 efx->link_advertising ^= ADVERTISED_Asym_Pause;
943 static void efx_fini_port(struct efx_nic *efx);
945 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
946 * the MAC appropriately. All other PHY configuration changes are pushed
947 * through phy_op->set_settings(), and pushed asynchronously to the MAC
948 * through efx_monitor().
950 * Callers must hold the mac_lock
952 int __efx_reconfigure_port(struct efx_nic *efx)
954 enum efx_phy_mode phy_mode;
957 WARN_ON(!mutex_is_locked(&efx->mac_lock));
959 /* Disable PHY transmit in mac level loopbacks */
960 phy_mode = efx->phy_mode;
961 if (LOOPBACK_INTERNAL(efx))
962 efx->phy_mode |= PHY_MODE_TX_DISABLED;
964 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
966 rc = efx->type->reconfigure_port(efx);
969 efx->phy_mode = phy_mode;
974 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
976 int efx_reconfigure_port(struct efx_nic *efx)
980 EFX_ASSERT_RESET_SERIALISED(efx);
982 mutex_lock(&efx->mac_lock);
983 rc = __efx_reconfigure_port(efx);
984 mutex_unlock(&efx->mac_lock);
989 /* Asynchronous work item for changing MAC promiscuity and multicast
990 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
992 static void efx_mac_work(struct work_struct *data)
994 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
996 mutex_lock(&efx->mac_lock);
997 if (efx->port_enabled)
998 efx->type->reconfigure_mac(efx);
999 mutex_unlock(&efx->mac_lock);
1002 static int efx_probe_port(struct efx_nic *efx)
1006 netif_dbg(efx, probe, efx->net_dev, "create port\n");
1009 efx->phy_mode = PHY_MODE_SPECIAL;
1011 /* Connect up MAC/PHY operations table */
1012 rc = efx->type->probe_port(efx);
1016 /* Initialise MAC address to permanent address */
1017 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN);
1022 static int efx_init_port(struct efx_nic *efx)
1026 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1028 mutex_lock(&efx->mac_lock);
1030 rc = efx->phy_op->init(efx);
1034 efx->port_initialized = true;
1036 /* Reconfigure the MAC before creating dma queues (required for
1037 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1038 efx->type->reconfigure_mac(efx);
1040 /* Ensure the PHY advertises the correct flow control settings */
1041 rc = efx->phy_op->reconfigure(efx);
1045 mutex_unlock(&efx->mac_lock);
1049 efx->phy_op->fini(efx);
1051 mutex_unlock(&efx->mac_lock);
1055 static void efx_start_port(struct efx_nic *efx)
1057 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1058 BUG_ON(efx->port_enabled);
1060 mutex_lock(&efx->mac_lock);
1061 efx->port_enabled = true;
1063 /* Ensure MAC ingress/egress is enabled */
1064 efx->type->reconfigure_mac(efx);
1066 mutex_unlock(&efx->mac_lock);
1069 /* Cancel work for MAC reconfiguration, periodic hardware monitoring
1070 * and the async self-test, wait for them to finish and prevent them
1071 * being scheduled again. This doesn't cover online resets, which
1072 * should only be cancelled when removing the device.
1074 static void efx_stop_port(struct efx_nic *efx)
1076 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1078 EFX_ASSERT_RESET_SERIALISED(efx);
1080 mutex_lock(&efx->mac_lock);
1081 efx->port_enabled = false;
1082 mutex_unlock(&efx->mac_lock);
1084 /* Serialise against efx_set_multicast_list() */
1085 netif_addr_lock_bh(efx->net_dev);
1086 netif_addr_unlock_bh(efx->net_dev);
1088 cancel_delayed_work_sync(&efx->monitor_work);
1089 efx_selftest_async_cancel(efx);
1090 cancel_work_sync(&efx->mac_work);
1093 static void efx_fini_port(struct efx_nic *efx)
1095 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1097 if (!efx->port_initialized)
1100 efx->phy_op->fini(efx);
1101 efx->port_initialized = false;
1103 efx->link_state.up = false;
1104 efx_link_status_changed(efx);
1107 static void efx_remove_port(struct efx_nic *efx)
1109 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1111 efx->type->remove_port(efx);
1114 /**************************************************************************
1118 **************************************************************************/
1120 /* This configures the PCI device to enable I/O and DMA. */
1121 static int efx_init_io(struct efx_nic *efx)
1123 struct pci_dev *pci_dev = efx->pci_dev;
1124 dma_addr_t dma_mask = efx->type->max_dma_mask;
1125 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1128 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1130 rc = pci_enable_device(pci_dev);
1132 netif_err(efx, probe, efx->net_dev,
1133 "failed to enable PCI device\n");
1137 pci_set_master(pci_dev);
1139 /* Set the PCI DMA mask. Try all possibilities from our
1140 * genuine mask down to 32 bits, because some architectures
1141 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1142 * masks event though they reject 46 bit masks.
1144 while (dma_mask > 0x7fffffffUL) {
1145 if (dma_supported(&pci_dev->dev, dma_mask)) {
1146 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask);
1153 netif_err(efx, probe, efx->net_dev,
1154 "could not find a suitable DMA mask\n");
1157 netif_dbg(efx, probe, efx->net_dev,
1158 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1160 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1161 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1163 netif_err(efx, probe, efx->net_dev,
1164 "request for memory BAR failed\n");
1168 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1169 if (!efx->membase) {
1170 netif_err(efx, probe, efx->net_dev,
1171 "could not map memory BAR at %llx+%x\n",
1172 (unsigned long long)efx->membase_phys, mem_map_size);
1176 netif_dbg(efx, probe, efx->net_dev,
1177 "memory BAR at %llx+%x (virtual %p)\n",
1178 (unsigned long long)efx->membase_phys, mem_map_size,
1184 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1186 efx->membase_phys = 0;
1188 pci_disable_device(efx->pci_dev);
1193 static void efx_fini_io(struct efx_nic *efx)
1195 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1198 iounmap(efx->membase);
1199 efx->membase = NULL;
1202 if (efx->membase_phys) {
1203 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1204 efx->membase_phys = 0;
1207 pci_disable_device(efx->pci_dev);
1210 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1212 cpumask_var_t thread_mask;
1219 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1220 netif_warn(efx, probe, efx->net_dev,
1221 "RSS disabled due to allocation failure\n");
1226 for_each_online_cpu(cpu) {
1227 if (!cpumask_test_cpu(cpu, thread_mask)) {
1229 cpumask_or(thread_mask, thread_mask,
1230 topology_thread_cpumask(cpu));
1234 free_cpumask_var(thread_mask);
1237 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1238 * table entries that are inaccessible to VFs
1240 if (efx_sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1241 count > efx_vf_size(efx)) {
1242 netif_warn(efx, probe, efx->net_dev,
1243 "Reducing number of RSS channels from %u to %u for "
1244 "VF support. Increase vf-msix-limit to use more "
1245 "channels on the PF.\n",
1246 count, efx_vf_size(efx));
1247 count = efx_vf_size(efx);
1253 /* Probe the number and type of interrupts we are able to obtain, and
1254 * the resulting numbers of channels and RX queues.
1256 static int efx_probe_interrupts(struct efx_nic *efx)
1258 unsigned int extra_channels = 0;
1262 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1263 if (efx->extra_channel_type[i])
1266 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1267 struct msix_entry xentries[EFX_MAX_CHANNELS];
1268 unsigned int n_channels;
1270 n_channels = efx_wanted_parallelism(efx);
1271 if (separate_tx_channels)
1273 n_channels += extra_channels;
1274 n_channels = min(n_channels, efx->max_channels);
1276 for (i = 0; i < n_channels; i++)
1277 xentries[i].entry = i;
1278 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1280 netif_err(efx, drv, efx->net_dev,
1281 "WARNING: Insufficient MSI-X vectors"
1282 " available (%d < %u).\n", rc, n_channels);
1283 netif_err(efx, drv, efx->net_dev,
1284 "WARNING: Performance may be reduced.\n");
1285 EFX_BUG_ON_PARANOID(rc >= n_channels);
1287 rc = pci_enable_msix(efx->pci_dev, xentries,
1292 efx->n_channels = n_channels;
1293 if (n_channels > extra_channels)
1294 n_channels -= extra_channels;
1295 if (separate_tx_channels) {
1296 efx->n_tx_channels = max(n_channels / 2, 1U);
1297 efx->n_rx_channels = max(n_channels -
1301 efx->n_tx_channels = n_channels;
1302 efx->n_rx_channels = n_channels;
1304 for (i = 0; i < efx->n_channels; i++)
1305 efx_get_channel(efx, i)->irq =
1308 /* Fall back to single channel MSI */
1309 efx->interrupt_mode = EFX_INT_MODE_MSI;
1310 netif_err(efx, drv, efx->net_dev,
1311 "could not enable MSI-X\n");
1315 /* Try single interrupt MSI */
1316 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1317 efx->n_channels = 1;
1318 efx->n_rx_channels = 1;
1319 efx->n_tx_channels = 1;
1320 rc = pci_enable_msi(efx->pci_dev);
1322 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1324 netif_err(efx, drv, efx->net_dev,
1325 "could not enable MSI\n");
1326 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1330 /* Assume legacy interrupts */
1331 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1332 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1333 efx->n_rx_channels = 1;
1334 efx->n_tx_channels = 1;
1335 efx->legacy_irq = efx->pci_dev->irq;
1338 /* Assign extra channels if possible */
1339 j = efx->n_channels;
1340 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1341 if (!efx->extra_channel_type[i])
1343 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1344 efx->n_channels <= extra_channels) {
1345 efx->extra_channel_type[i]->handle_no_channel(efx);
1348 efx_get_channel(efx, j)->type =
1349 efx->extra_channel_type[i];
1353 /* RSS might be usable on VFs even if it is disabled on the PF */
1354 efx->rss_spread = ((efx->n_rx_channels > 1 || !efx_sriov_wanted(efx)) ?
1355 efx->n_rx_channels : efx_vf_size(efx));
1360 static int efx_soft_enable_interrupts(struct efx_nic *efx)
1362 struct efx_channel *channel, *end_channel;
1365 BUG_ON(efx->state == STATE_DISABLED);
1367 efx->irq_soft_enabled = true;
1370 efx_for_each_channel(channel, efx) {
1371 if (!channel->type->keep_eventq) {
1372 rc = efx_init_eventq(channel);
1376 efx_start_eventq(channel);
1379 efx_mcdi_mode_event(efx);
1383 end_channel = channel;
1384 efx_for_each_channel(channel, efx) {
1385 if (channel == end_channel)
1387 efx_stop_eventq(channel);
1388 if (!channel->type->keep_eventq)
1389 efx_fini_eventq(channel);
1395 static void efx_soft_disable_interrupts(struct efx_nic *efx)
1397 struct efx_channel *channel;
1399 if (efx->state == STATE_DISABLED)
1402 efx_mcdi_mode_poll(efx);
1404 efx->irq_soft_enabled = false;
1407 if (efx->legacy_irq)
1408 synchronize_irq(efx->legacy_irq);
1410 efx_for_each_channel(channel, efx) {
1412 synchronize_irq(channel->irq);
1414 efx_stop_eventq(channel);
1415 if (!channel->type->keep_eventq)
1416 efx_fini_eventq(channel);
1419 /* Flush the asynchronous MCDI request queue */
1420 efx_mcdi_flush_async(efx);
1423 static int efx_enable_interrupts(struct efx_nic *efx)
1425 struct efx_channel *channel, *end_channel;
1428 BUG_ON(efx->state == STATE_DISABLED);
1430 if (efx->eeh_disabled_legacy_irq) {
1431 enable_irq(efx->legacy_irq);
1432 efx->eeh_disabled_legacy_irq = false;
1435 efx->type->irq_enable_master(efx);
1437 efx_for_each_channel(channel, efx) {
1438 if (channel->type->keep_eventq) {
1439 rc = efx_init_eventq(channel);
1445 rc = efx_soft_enable_interrupts(efx);
1452 end_channel = channel;
1453 efx_for_each_channel(channel, efx) {
1454 if (channel == end_channel)
1456 if (channel->type->keep_eventq)
1457 efx_fini_eventq(channel);
1460 efx->type->irq_disable_non_ev(efx);
1465 static void efx_disable_interrupts(struct efx_nic *efx)
1467 struct efx_channel *channel;
1469 efx_soft_disable_interrupts(efx);
1471 efx_for_each_channel(channel, efx) {
1472 if (channel->type->keep_eventq)
1473 efx_fini_eventq(channel);
1476 efx->type->irq_disable_non_ev(efx);
1479 static void efx_remove_interrupts(struct efx_nic *efx)
1481 struct efx_channel *channel;
1483 /* Remove MSI/MSI-X interrupts */
1484 efx_for_each_channel(channel, efx)
1486 pci_disable_msi(efx->pci_dev);
1487 pci_disable_msix(efx->pci_dev);
1489 /* Remove legacy interrupt */
1490 efx->legacy_irq = 0;
1493 static void efx_set_channels(struct efx_nic *efx)
1495 struct efx_channel *channel;
1496 struct efx_tx_queue *tx_queue;
1498 efx->tx_channel_offset =
1499 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1501 /* We need to mark which channels really have RX and TX
1502 * queues, and adjust the TX queue numbers if we have separate
1503 * RX-only and TX-only channels.
1505 efx_for_each_channel(channel, efx) {
1506 if (channel->channel < efx->n_rx_channels)
1507 channel->rx_queue.core_index = channel->channel;
1509 channel->rx_queue.core_index = -1;
1511 efx_for_each_channel_tx_queue(tx_queue, channel)
1512 tx_queue->queue -= (efx->tx_channel_offset *
1517 static int efx_probe_nic(struct efx_nic *efx)
1522 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1524 /* Carry out hardware-type specific initialisation */
1525 rc = efx->type->probe(efx);
1529 /* Determine the number of channels and queues by trying to hook
1530 * in MSI-X interrupts. */
1531 rc = efx_probe_interrupts(efx);
1535 rc = efx->type->dimension_resources(efx);
1539 if (efx->n_channels > 1)
1540 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1541 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1542 efx->rx_indir_table[i] =
1543 ethtool_rxfh_indir_default(i, efx->rss_spread);
1545 efx_set_channels(efx);
1546 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1547 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1549 /* Initialise the interrupt moderation settings */
1550 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1556 efx_remove_interrupts(efx);
1558 efx->type->remove(efx);
1562 static void efx_remove_nic(struct efx_nic *efx)
1564 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1566 efx_remove_interrupts(efx);
1567 efx->type->remove(efx);
1570 static int efx_probe_filters(struct efx_nic *efx)
1574 spin_lock_init(&efx->filter_lock);
1576 rc = efx->type->filter_table_probe(efx);
1580 #ifdef CONFIG_RFS_ACCEL
1581 if (efx->type->offload_features & NETIF_F_NTUPLE) {
1582 efx->rps_flow_id = kcalloc(efx->type->max_rx_ip_filters,
1583 sizeof(*efx->rps_flow_id),
1585 if (!efx->rps_flow_id) {
1586 efx->type->filter_table_remove(efx);
1595 static void efx_remove_filters(struct efx_nic *efx)
1597 #ifdef CONFIG_RFS_ACCEL
1598 kfree(efx->rps_flow_id);
1600 efx->type->filter_table_remove(efx);
1603 static void efx_restore_filters(struct efx_nic *efx)
1605 efx->type->filter_table_restore(efx);
1608 /**************************************************************************
1610 * NIC startup/shutdown
1612 *************************************************************************/
1614 static int efx_probe_all(struct efx_nic *efx)
1618 rc = efx_probe_nic(efx);
1620 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1624 rc = efx_probe_port(efx);
1626 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1630 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1631 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1635 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1637 rc = efx_probe_filters(efx);
1639 netif_err(efx, probe, efx->net_dev,
1640 "failed to create filter tables\n");
1644 rc = efx_probe_channels(efx);
1651 efx_remove_filters(efx);
1653 efx_remove_port(efx);
1655 efx_remove_nic(efx);
1660 /* If the interface is supposed to be running but is not, start
1661 * the hardware and software data path, regular activity for the port
1662 * (MAC statistics, link polling, etc.) and schedule the port to be
1663 * reconfigured. Interrupts must already be enabled. This function
1664 * is safe to call multiple times, so long as the NIC is not disabled.
1665 * Requires the RTNL lock.
1667 static void efx_start_all(struct efx_nic *efx)
1669 EFX_ASSERT_RESET_SERIALISED(efx);
1670 BUG_ON(efx->state == STATE_DISABLED);
1672 /* Check that it is appropriate to restart the interface. All
1673 * of these flags are safe to read under just the rtnl lock */
1674 if (efx->port_enabled || !netif_running(efx->net_dev))
1677 efx_start_port(efx);
1678 efx_start_datapath(efx);
1680 /* Start the hardware monitor if there is one */
1681 if (efx->type->monitor != NULL)
1682 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1683 efx_monitor_interval);
1685 /* If link state detection is normally event-driven, we have
1686 * to poll now because we could have missed a change
1688 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) {
1689 mutex_lock(&efx->mac_lock);
1690 if (efx->phy_op->poll(efx))
1691 efx_link_status_changed(efx);
1692 mutex_unlock(&efx->mac_lock);
1695 efx->type->start_stats(efx);
1696 efx->type->pull_stats(efx);
1697 spin_lock_bh(&efx->stats_lock);
1698 efx->type->update_stats(efx, NULL, NULL);
1699 spin_unlock_bh(&efx->stats_lock);
1702 /* Quiesce the hardware and software data path, and regular activity
1703 * for the port without bringing the link down. Safe to call multiple
1704 * times with the NIC in almost any state, but interrupts should be
1705 * enabled. Requires the RTNL lock.
1707 static void efx_stop_all(struct efx_nic *efx)
1709 EFX_ASSERT_RESET_SERIALISED(efx);
1711 /* port_enabled can be read safely under the rtnl lock */
1712 if (!efx->port_enabled)
1715 /* update stats before we go down so we can accurately count
1718 efx->type->pull_stats(efx);
1719 spin_lock_bh(&efx->stats_lock);
1720 efx->type->update_stats(efx, NULL, NULL);
1721 spin_unlock_bh(&efx->stats_lock);
1722 efx->type->stop_stats(efx);
1725 /* Stop the kernel transmit interface. This is only valid if
1726 * the device is stopped or detached; otherwise the watchdog
1727 * may fire immediately.
1729 WARN_ON(netif_running(efx->net_dev) &&
1730 netif_device_present(efx->net_dev));
1731 netif_tx_disable(efx->net_dev);
1733 efx_stop_datapath(efx);
1736 static void efx_remove_all(struct efx_nic *efx)
1738 efx_remove_channels(efx);
1739 efx_remove_filters(efx);
1740 efx_remove_port(efx);
1741 efx_remove_nic(efx);
1744 /**************************************************************************
1746 * Interrupt moderation
1748 **************************************************************************/
1750 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1754 if (usecs * 1000 < quantum_ns)
1755 return 1; /* never round down to 0 */
1756 return usecs * 1000 / quantum_ns;
1759 /* Set interrupt moderation parameters */
1760 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1761 unsigned int rx_usecs, bool rx_adaptive,
1762 bool rx_may_override_tx)
1764 struct efx_channel *channel;
1765 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1766 efx->timer_quantum_ns,
1768 unsigned int tx_ticks;
1769 unsigned int rx_ticks;
1771 EFX_ASSERT_RESET_SERIALISED(efx);
1773 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1776 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1777 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1779 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1780 !rx_may_override_tx) {
1781 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1782 "RX and TX IRQ moderation must be equal\n");
1786 efx->irq_rx_adaptive = rx_adaptive;
1787 efx->irq_rx_moderation = rx_ticks;
1788 efx_for_each_channel(channel, efx) {
1789 if (efx_channel_has_rx_queue(channel))
1790 channel->irq_moderation = rx_ticks;
1791 else if (efx_channel_has_tx_queues(channel))
1792 channel->irq_moderation = tx_ticks;
1798 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1799 unsigned int *rx_usecs, bool *rx_adaptive)
1801 /* We must round up when converting ticks to microseconds
1802 * because we round down when converting the other way.
1805 *rx_adaptive = efx->irq_rx_adaptive;
1806 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1807 efx->timer_quantum_ns,
1810 /* If channels are shared between RX and TX, so is IRQ
1811 * moderation. Otherwise, IRQ moderation is the same for all
1812 * TX channels and is not adaptive.
1814 if (efx->tx_channel_offset == 0)
1815 *tx_usecs = *rx_usecs;
1817 *tx_usecs = DIV_ROUND_UP(
1818 efx->channel[efx->tx_channel_offset]->irq_moderation *
1819 efx->timer_quantum_ns,
1823 /**************************************************************************
1827 **************************************************************************/
1829 /* Run periodically off the general workqueue */
1830 static void efx_monitor(struct work_struct *data)
1832 struct efx_nic *efx = container_of(data, struct efx_nic,
1835 netif_vdbg(efx, timer, efx->net_dev,
1836 "hardware monitor executing on CPU %d\n",
1837 raw_smp_processor_id());
1838 BUG_ON(efx->type->monitor == NULL);
1840 /* If the mac_lock is already held then it is likely a port
1841 * reconfiguration is already in place, which will likely do
1842 * most of the work of monitor() anyway. */
1843 if (mutex_trylock(&efx->mac_lock)) {
1844 if (efx->port_enabled)
1845 efx->type->monitor(efx);
1846 mutex_unlock(&efx->mac_lock);
1849 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1850 efx_monitor_interval);
1853 /**************************************************************************
1857 *************************************************************************/
1860 * Context: process, rtnl_lock() held.
1862 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1864 struct efx_nic *efx = netdev_priv(net_dev);
1865 struct mii_ioctl_data *data = if_mii(ifr);
1867 if (cmd == SIOCSHWTSTAMP)
1868 return efx_ptp_set_ts_config(efx, ifr);
1869 if (cmd == SIOCGHWTSTAMP)
1870 return efx_ptp_get_ts_config(efx, ifr);
1872 /* Convert phy_id from older PRTAD/DEVAD format */
1873 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1874 (data->phy_id & 0xfc00) == 0x0400)
1875 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1877 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1880 /**************************************************************************
1884 **************************************************************************/
1886 static void efx_init_napi_channel(struct efx_channel *channel)
1888 struct efx_nic *efx = channel->efx;
1890 channel->napi_dev = efx->net_dev;
1891 netif_napi_add(channel->napi_dev, &channel->napi_str,
1892 efx_poll, napi_weight);
1895 static void efx_init_napi(struct efx_nic *efx)
1897 struct efx_channel *channel;
1899 efx_for_each_channel(channel, efx)
1900 efx_init_napi_channel(channel);
1903 static void efx_fini_napi_channel(struct efx_channel *channel)
1905 if (channel->napi_dev)
1906 netif_napi_del(&channel->napi_str);
1907 channel->napi_dev = NULL;
1910 static void efx_fini_napi(struct efx_nic *efx)
1912 struct efx_channel *channel;
1914 efx_for_each_channel(channel, efx)
1915 efx_fini_napi_channel(channel);
1918 /**************************************************************************
1920 * Kernel netpoll interface
1922 *************************************************************************/
1924 #ifdef CONFIG_NET_POLL_CONTROLLER
1926 /* Although in the common case interrupts will be disabled, this is not
1927 * guaranteed. However, all our work happens inside the NAPI callback,
1928 * so no locking is required.
1930 static void efx_netpoll(struct net_device *net_dev)
1932 struct efx_nic *efx = netdev_priv(net_dev);
1933 struct efx_channel *channel;
1935 efx_for_each_channel(channel, efx)
1936 efx_schedule_channel(channel);
1941 /**************************************************************************
1943 * Kernel net device interface
1945 *************************************************************************/
1947 /* Context: process, rtnl_lock() held. */
1948 static int efx_net_open(struct net_device *net_dev)
1950 struct efx_nic *efx = netdev_priv(net_dev);
1953 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1954 raw_smp_processor_id());
1956 rc = efx_check_disabled(efx);
1959 if (efx->phy_mode & PHY_MODE_SPECIAL)
1961 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1964 /* Notify the kernel of the link state polled during driver load,
1965 * before the monitor starts running */
1966 efx_link_status_changed(efx);
1969 efx_selftest_async_start(efx);
1973 /* Context: process, rtnl_lock() held.
1974 * Note that the kernel will ignore our return code; this method
1975 * should really be a void.
1977 static int efx_net_stop(struct net_device *net_dev)
1979 struct efx_nic *efx = netdev_priv(net_dev);
1981 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1982 raw_smp_processor_id());
1984 /* Stop the device and flush all the channels */
1990 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1991 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
1992 struct rtnl_link_stats64 *stats)
1994 struct efx_nic *efx = netdev_priv(net_dev);
1996 spin_lock_bh(&efx->stats_lock);
1997 efx->type->update_stats(efx, NULL, stats);
1998 spin_unlock_bh(&efx->stats_lock);
2003 /* Context: netif_tx_lock held, BHs disabled. */
2004 static void efx_watchdog(struct net_device *net_dev)
2006 struct efx_nic *efx = netdev_priv(net_dev);
2008 netif_err(efx, tx_err, efx->net_dev,
2009 "TX stuck with port_enabled=%d: resetting channels\n",
2012 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
2016 /* Context: process, rtnl_lock() held. */
2017 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
2019 struct efx_nic *efx = netdev_priv(net_dev);
2022 rc = efx_check_disabled(efx);
2025 if (new_mtu > EFX_MAX_MTU)
2028 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
2030 efx_device_detach_sync(efx);
2033 mutex_lock(&efx->mac_lock);
2034 net_dev->mtu = new_mtu;
2035 efx->type->reconfigure_mac(efx);
2036 mutex_unlock(&efx->mac_lock);
2039 netif_device_attach(efx->net_dev);
2043 static int efx_set_mac_address(struct net_device *net_dev, void *data)
2045 struct efx_nic *efx = netdev_priv(net_dev);
2046 struct sockaddr *addr = data;
2047 char *new_addr = addr->sa_data;
2049 if (!is_valid_ether_addr(new_addr)) {
2050 netif_err(efx, drv, efx->net_dev,
2051 "invalid ethernet MAC address requested: %pM\n",
2053 return -EADDRNOTAVAIL;
2056 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
2057 efx_sriov_mac_address_changed(efx);
2059 /* Reconfigure the MAC */
2060 mutex_lock(&efx->mac_lock);
2061 efx->type->reconfigure_mac(efx);
2062 mutex_unlock(&efx->mac_lock);
2067 /* Context: netif_addr_lock held, BHs disabled. */
2068 static void efx_set_rx_mode(struct net_device *net_dev)
2070 struct efx_nic *efx = netdev_priv(net_dev);
2072 if (efx->port_enabled)
2073 queue_work(efx->workqueue, &efx->mac_work);
2074 /* Otherwise efx_start_port() will do this */
2077 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2079 struct efx_nic *efx = netdev_priv(net_dev);
2081 /* If disabling RX n-tuple filtering, clear existing filters */
2082 if (net_dev->features & ~data & NETIF_F_NTUPLE)
2083 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2088 static const struct net_device_ops efx_farch_netdev_ops = {
2089 .ndo_open = efx_net_open,
2090 .ndo_stop = efx_net_stop,
2091 .ndo_get_stats64 = efx_net_stats,
2092 .ndo_tx_timeout = efx_watchdog,
2093 .ndo_start_xmit = efx_hard_start_xmit,
2094 .ndo_validate_addr = eth_validate_addr,
2095 .ndo_do_ioctl = efx_ioctl,
2096 .ndo_change_mtu = efx_change_mtu,
2097 .ndo_set_mac_address = efx_set_mac_address,
2098 .ndo_set_rx_mode = efx_set_rx_mode,
2099 .ndo_set_features = efx_set_features,
2100 #ifdef CONFIG_SFC_SRIOV
2101 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2102 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2103 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2104 .ndo_get_vf_config = efx_sriov_get_vf_config,
2106 #ifdef CONFIG_NET_POLL_CONTROLLER
2107 .ndo_poll_controller = efx_netpoll,
2109 .ndo_setup_tc = efx_setup_tc,
2110 #ifdef CONFIG_RFS_ACCEL
2111 .ndo_rx_flow_steer = efx_filter_rfs,
2115 static const struct net_device_ops efx_ef10_netdev_ops = {
2116 .ndo_open = efx_net_open,
2117 .ndo_stop = efx_net_stop,
2118 .ndo_get_stats64 = efx_net_stats,
2119 .ndo_tx_timeout = efx_watchdog,
2120 .ndo_start_xmit = efx_hard_start_xmit,
2121 .ndo_validate_addr = eth_validate_addr,
2122 .ndo_do_ioctl = efx_ioctl,
2123 .ndo_change_mtu = efx_change_mtu,
2124 .ndo_set_mac_address = efx_set_mac_address,
2125 .ndo_set_rx_mode = efx_set_rx_mode,
2126 .ndo_set_features = efx_set_features,
2127 #ifdef CONFIG_NET_POLL_CONTROLLER
2128 .ndo_poll_controller = efx_netpoll,
2130 #ifdef CONFIG_RFS_ACCEL
2131 .ndo_rx_flow_steer = efx_filter_rfs,
2135 static void efx_update_name(struct efx_nic *efx)
2137 strcpy(efx->name, efx->net_dev->name);
2138 efx_mtd_rename(efx);
2139 efx_set_channel_names(efx);
2142 static int efx_netdev_event(struct notifier_block *this,
2143 unsigned long event, void *ptr)
2145 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2147 if ((net_dev->netdev_ops == &efx_farch_netdev_ops ||
2148 net_dev->netdev_ops == &efx_ef10_netdev_ops) &&
2149 event == NETDEV_CHANGENAME)
2150 efx_update_name(netdev_priv(net_dev));
2155 static struct notifier_block efx_netdev_notifier = {
2156 .notifier_call = efx_netdev_event,
2160 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2162 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2163 return sprintf(buf, "%d\n", efx->phy_type);
2165 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2167 static int efx_register_netdev(struct efx_nic *efx)
2169 struct net_device *net_dev = efx->net_dev;
2170 struct efx_channel *channel;
2173 net_dev->watchdog_timeo = 5 * HZ;
2174 net_dev->irq = efx->pci_dev->irq;
2175 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
2176 net_dev->netdev_ops = &efx_ef10_netdev_ops;
2177 net_dev->priv_flags |= IFF_UNICAST_FLT;
2179 net_dev->netdev_ops = &efx_farch_netdev_ops;
2181 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
2182 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2186 /* Enable resets to be scheduled and check whether any were
2187 * already requested. If so, the NIC is probably hosed so we
2190 efx->state = STATE_READY;
2191 smp_mb(); /* ensure we change state before checking reset_pending */
2192 if (efx->reset_pending) {
2193 netif_err(efx, probe, efx->net_dev,
2194 "aborting probe due to scheduled reset\n");
2199 rc = dev_alloc_name(net_dev, net_dev->name);
2202 efx_update_name(efx);
2204 /* Always start with carrier off; PHY events will detect the link */
2205 netif_carrier_off(net_dev);
2207 rc = register_netdevice(net_dev);
2211 efx_for_each_channel(channel, efx) {
2212 struct efx_tx_queue *tx_queue;
2213 efx_for_each_channel_tx_queue(tx_queue, channel)
2214 efx_init_tx_queue_core_txq(tx_queue);
2219 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2221 netif_err(efx, drv, efx->net_dev,
2222 "failed to init net dev attributes\n");
2223 goto fail_registered;
2230 unregister_netdevice(net_dev);
2232 efx->state = STATE_UNINIT;
2234 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2238 static void efx_unregister_netdev(struct efx_nic *efx)
2243 BUG_ON(netdev_priv(efx->net_dev) != efx);
2245 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2246 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2249 unregister_netdevice(efx->net_dev);
2250 efx->state = STATE_UNINIT;
2254 /**************************************************************************
2256 * Device reset and suspend
2258 **************************************************************************/
2260 /* Tears down the entire software state and most of the hardware state
2262 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2264 EFX_ASSERT_RESET_SERIALISED(efx);
2267 efx_disable_interrupts(efx);
2269 mutex_lock(&efx->mac_lock);
2270 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2271 efx->phy_op->fini(efx);
2272 efx->type->fini(efx);
2275 /* This function will always ensure that the locks acquired in
2276 * efx_reset_down() are released. A failure return code indicates
2277 * that we were unable to reinitialise the hardware, and the
2278 * driver should be disabled. If ok is false, then the rx and tx
2279 * engines are not restarted, pending a RESET_DISABLE. */
2280 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2284 EFX_ASSERT_RESET_SERIALISED(efx);
2286 rc = efx->type->init(efx);
2288 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2295 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2296 rc = efx->phy_op->init(efx);
2299 if (efx->phy_op->reconfigure(efx))
2300 netif_err(efx, drv, efx->net_dev,
2301 "could not restore PHY settings\n");
2304 rc = efx_enable_interrupts(efx);
2307 efx_restore_filters(efx);
2308 efx_sriov_reset(efx);
2310 mutex_unlock(&efx->mac_lock);
2317 efx->port_initialized = false;
2319 mutex_unlock(&efx->mac_lock);
2324 /* Reset the NIC using the specified method. Note that the reset may
2325 * fail, in which case the card will be left in an unusable state.
2327 * Caller must hold the rtnl_lock.
2329 int efx_reset(struct efx_nic *efx, enum reset_type method)
2334 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2335 RESET_TYPE(method));
2337 efx_device_detach_sync(efx);
2338 efx_reset_down(efx, method);
2340 rc = efx->type->reset(efx, method);
2342 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2346 /* Clear flags for the scopes we covered. We assume the NIC and
2347 * driver are now quiescent so that there is no race here.
2349 efx->reset_pending &= -(1 << (method + 1));
2351 /* Reinitialise bus-mastering, which may have been turned off before
2352 * the reset was scheduled. This is still appropriate, even in the
2353 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2354 * can respond to requests. */
2355 pci_set_master(efx->pci_dev);
2358 /* Leave device stopped if necessary */
2360 method == RESET_TYPE_DISABLE ||
2361 method == RESET_TYPE_RECOVER_OR_DISABLE;
2362 rc2 = efx_reset_up(efx, method, !disabled);
2370 dev_close(efx->net_dev);
2371 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2372 efx->state = STATE_DISABLED;
2374 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2375 netif_device_attach(efx->net_dev);
2380 /* Try recovery mechanisms.
2381 * For now only EEH is supported.
2382 * Returns 0 if the recovery mechanisms are unsuccessful.
2383 * Returns a non-zero value otherwise.
2385 int efx_try_recovery(struct efx_nic *efx)
2388 /* A PCI error can occur and not be seen by EEH because nothing
2389 * happens on the PCI bus. In this case the driver may fail and
2390 * schedule a 'recover or reset', leading to this recovery handler.
2391 * Manually call the eeh failure check function.
2393 struct eeh_dev *eehdev =
2394 of_node_to_eeh_dev(pci_device_to_OF_node(efx->pci_dev));
2396 if (eeh_dev_check_failure(eehdev)) {
2397 /* The EEH mechanisms will handle the error and reset the
2398 * device if necessary.
2406 static void efx_wait_for_bist_end(struct efx_nic *efx)
2410 for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) {
2411 if (efx_mcdi_poll_reboot(efx))
2413 msleep(BIST_WAIT_DELAY_MS);
2416 netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n");
2418 /* Either way unset the BIST flag. If we found no reboot we probably
2419 * won't recover, but we should try.
2421 efx->mc_bist_for_other_fn = false;
2424 /* The worker thread exists so that code that cannot sleep can
2425 * schedule a reset for later.
2427 static void efx_reset_work(struct work_struct *data)
2429 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2430 unsigned long pending;
2431 enum reset_type method;
2433 pending = ACCESS_ONCE(efx->reset_pending);
2434 method = fls(pending) - 1;
2436 if (method == RESET_TYPE_MC_BIST)
2437 efx_wait_for_bist_end(efx);
2439 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2440 method == RESET_TYPE_RECOVER_OR_ALL) &&
2441 efx_try_recovery(efx))
2449 /* We checked the state in efx_schedule_reset() but it may
2450 * have changed by now. Now that we have the RTNL lock,
2451 * it cannot change again.
2453 if (efx->state == STATE_READY)
2454 (void)efx_reset(efx, method);
2459 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2461 enum reset_type method;
2463 if (efx->state == STATE_RECOVERY) {
2464 netif_dbg(efx, drv, efx->net_dev,
2465 "recovering: skip scheduling %s reset\n",
2471 case RESET_TYPE_INVISIBLE:
2472 case RESET_TYPE_ALL:
2473 case RESET_TYPE_RECOVER_OR_ALL:
2474 case RESET_TYPE_WORLD:
2475 case RESET_TYPE_DISABLE:
2476 case RESET_TYPE_RECOVER_OR_DISABLE:
2477 case RESET_TYPE_MC_BIST:
2479 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2480 RESET_TYPE(method));
2483 method = efx->type->map_reset_reason(type);
2484 netif_dbg(efx, drv, efx->net_dev,
2485 "scheduling %s reset for %s\n",
2486 RESET_TYPE(method), RESET_TYPE(type));
2490 set_bit(method, &efx->reset_pending);
2491 smp_mb(); /* ensure we change reset_pending before checking state */
2493 /* If we're not READY then just leave the flags set as the cue
2494 * to abort probing or reschedule the reset later.
2496 if (ACCESS_ONCE(efx->state) != STATE_READY)
2499 /* efx_process_channel() will no longer read events once a
2500 * reset is scheduled. So switch back to poll'd MCDI completions. */
2501 efx_mcdi_mode_poll(efx);
2503 queue_work(reset_workqueue, &efx->reset_work);
2506 /**************************************************************************
2508 * List of NICs we support
2510 **************************************************************************/
2512 /* PCI device ID table */
2513 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2514 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2515 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2516 .driver_data = (unsigned long) &falcon_a1_nic_type},
2517 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2518 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2519 .driver_data = (unsigned long) &falcon_b0_nic_type},
2520 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2521 .driver_data = (unsigned long) &siena_a0_nic_type},
2522 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2523 .driver_data = (unsigned long) &siena_a0_nic_type},
2524 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */
2525 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2526 {0} /* end of list */
2529 /**************************************************************************
2531 * Dummy PHY/MAC operations
2533 * Can be used for some unimplemented operations
2534 * Needed so all function pointers are valid and do not have to be tested
2537 **************************************************************************/
2538 int efx_port_dummy_op_int(struct efx_nic *efx)
2542 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2544 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2549 static const struct efx_phy_operations efx_dummy_phy_operations = {
2550 .init = efx_port_dummy_op_int,
2551 .reconfigure = efx_port_dummy_op_int,
2552 .poll = efx_port_dummy_op_poll,
2553 .fini = efx_port_dummy_op_void,
2556 /**************************************************************************
2560 **************************************************************************/
2562 /* This zeroes out and then fills in the invariants in a struct
2563 * efx_nic (including all sub-structures).
2565 static int efx_init_struct(struct efx_nic *efx,
2566 struct pci_dev *pci_dev, struct net_device *net_dev)
2570 /* Initialise common structures */
2571 spin_lock_init(&efx->biu_lock);
2572 #ifdef CONFIG_SFC_MTD
2573 INIT_LIST_HEAD(&efx->mtd_list);
2575 INIT_WORK(&efx->reset_work, efx_reset_work);
2576 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2577 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2578 efx->pci_dev = pci_dev;
2579 efx->msg_enable = debug;
2580 efx->state = STATE_UNINIT;
2581 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2583 efx->net_dev = net_dev;
2584 efx->rx_prefix_size = efx->type->rx_prefix_size;
2586 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
2587 efx->rx_packet_hash_offset =
2588 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
2589 spin_lock_init(&efx->stats_lock);
2590 mutex_init(&efx->mac_lock);
2591 efx->phy_op = &efx_dummy_phy_operations;
2592 efx->mdio.dev = net_dev;
2593 INIT_WORK(&efx->mac_work, efx_mac_work);
2594 init_waitqueue_head(&efx->flush_wq);
2596 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2597 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2598 if (!efx->channel[i])
2600 efx->msi_context[i].efx = efx;
2601 efx->msi_context[i].index = i;
2604 /* Higher numbered interrupt modes are less capable! */
2605 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2608 /* Would be good to use the net_dev name, but we're too early */
2609 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2611 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2612 if (!efx->workqueue)
2618 efx_fini_struct(efx);
2622 static void efx_fini_struct(struct efx_nic *efx)
2626 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2627 kfree(efx->channel[i]);
2629 if (efx->workqueue) {
2630 destroy_workqueue(efx->workqueue);
2631 efx->workqueue = NULL;
2635 /**************************************************************************
2639 **************************************************************************/
2641 /* Main body of final NIC shutdown code
2642 * This is called only at module unload (or hotplug removal).
2644 static void efx_pci_remove_main(struct efx_nic *efx)
2646 /* Flush reset_work. It can no longer be scheduled since we
2649 BUG_ON(efx->state == STATE_READY);
2650 cancel_work_sync(&efx->reset_work);
2652 efx_disable_interrupts(efx);
2653 efx_nic_fini_interrupt(efx);
2655 efx->type->fini(efx);
2657 efx_remove_all(efx);
2660 /* Final NIC shutdown
2661 * This is called only at module unload (or hotplug removal).
2663 static void efx_pci_remove(struct pci_dev *pci_dev)
2665 struct efx_nic *efx;
2667 efx = pci_get_drvdata(pci_dev);
2671 /* Mark the NIC as fini, then stop the interface */
2673 dev_close(efx->net_dev);
2674 efx_disable_interrupts(efx);
2677 efx_sriov_fini(efx);
2678 efx_unregister_netdev(efx);
2680 efx_mtd_remove(efx);
2682 efx_pci_remove_main(efx);
2685 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2687 efx_fini_struct(efx);
2688 free_netdev(efx->net_dev);
2690 pci_disable_pcie_error_reporting(pci_dev);
2693 /* NIC VPD information
2694 * Called during probe to display the part number of the
2695 * installed NIC. VPD is potentially very large but this should
2696 * always appear within the first 512 bytes.
2698 #define SFC_VPD_LEN 512
2699 static void efx_print_product_vpd(struct efx_nic *efx)
2701 struct pci_dev *dev = efx->pci_dev;
2702 char vpd_data[SFC_VPD_LEN];
2706 /* Get the vpd data from the device */
2707 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2708 if (vpd_size <= 0) {
2709 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2713 /* Get the Read only section */
2714 i = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
2716 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
2720 j = pci_vpd_lrdt_size(&vpd_data[i]);
2721 i += PCI_VPD_LRDT_TAG_SIZE;
2722 if (i + j > vpd_size)
2725 /* Get the Part number */
2726 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
2728 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
2732 j = pci_vpd_info_field_size(&vpd_data[i]);
2733 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2734 if (i + j > vpd_size) {
2735 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
2739 netif_info(efx, drv, efx->net_dev,
2740 "Part Number : %.*s\n", j, &vpd_data[i]);
2744 /* Main body of NIC initialisation
2745 * This is called at module load (or hotplug insertion, theoretically).
2747 static int efx_pci_probe_main(struct efx_nic *efx)
2751 /* Do start-of-day initialisation */
2752 rc = efx_probe_all(efx);
2758 rc = efx->type->init(efx);
2760 netif_err(efx, probe, efx->net_dev,
2761 "failed to initialise NIC\n");
2765 rc = efx_init_port(efx);
2767 netif_err(efx, probe, efx->net_dev,
2768 "failed to initialise port\n");
2772 rc = efx_nic_init_interrupt(efx);
2775 rc = efx_enable_interrupts(efx);
2782 efx_nic_fini_interrupt(efx);
2786 efx->type->fini(efx);
2789 efx_remove_all(efx);
2794 /* NIC initialisation
2796 * This is called at module load (or hotplug insertion,
2797 * theoretically). It sets up PCI mappings, resets the NIC,
2798 * sets up and registers the network devices with the kernel and hooks
2799 * the interrupt service routine. It does not prepare the device for
2800 * transmission; this is left to the first time one of the network
2801 * interfaces is brought up (i.e. efx_net_open).
2803 static int efx_pci_probe(struct pci_dev *pci_dev,
2804 const struct pci_device_id *entry)
2806 struct net_device *net_dev;
2807 struct efx_nic *efx;
2810 /* Allocate and initialise a struct net_device and struct efx_nic */
2811 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2815 efx = netdev_priv(net_dev);
2816 efx->type = (const struct efx_nic_type *) entry->driver_data;
2817 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
2818 NETIF_F_HIGHDMA | NETIF_F_TSO |
2820 if (efx->type->offload_features & NETIF_F_V6_CSUM)
2821 net_dev->features |= NETIF_F_TSO6;
2822 /* Mask for features that also apply to VLAN devices */
2823 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2824 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2826 /* All offloads can be toggled */
2827 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2828 pci_set_drvdata(pci_dev, efx);
2829 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2830 rc = efx_init_struct(efx, pci_dev, net_dev);
2834 netif_info(efx, probe, efx->net_dev,
2835 "Solarflare NIC detected\n");
2837 efx_print_product_vpd(efx);
2839 /* Set up basic I/O (BAR mappings etc) */
2840 rc = efx_init_io(efx);
2844 rc = efx_pci_probe_main(efx);
2848 rc = efx_register_netdev(efx);
2852 rc = efx_sriov_init(efx);
2854 netif_err(efx, probe, efx->net_dev,
2855 "SR-IOV can't be enabled rc %d\n", rc);
2857 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2859 /* Try to create MTDs, but allow this to fail */
2861 rc = efx_mtd_probe(efx);
2864 netif_warn(efx, probe, efx->net_dev,
2865 "failed to create MTDs (%d)\n", rc);
2867 rc = pci_enable_pcie_error_reporting(pci_dev);
2868 if (rc && rc != -EINVAL)
2869 netif_warn(efx, probe, efx->net_dev,
2870 "pci_enable_pcie_error_reporting failed (%d)\n", rc);
2875 efx_pci_remove_main(efx);
2879 efx_fini_struct(efx);
2882 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2883 free_netdev(net_dev);
2887 static int efx_pm_freeze(struct device *dev)
2889 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2893 if (efx->state != STATE_DISABLED) {
2894 efx->state = STATE_UNINIT;
2896 efx_device_detach_sync(efx);
2899 efx_disable_interrupts(efx);
2907 static int efx_pm_thaw(struct device *dev)
2910 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2914 if (efx->state != STATE_DISABLED) {
2915 rc = efx_enable_interrupts(efx);
2919 mutex_lock(&efx->mac_lock);
2920 efx->phy_op->reconfigure(efx);
2921 mutex_unlock(&efx->mac_lock);
2925 netif_device_attach(efx->net_dev);
2927 efx->state = STATE_READY;
2929 efx->type->resume_wol(efx);
2934 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2935 queue_work(reset_workqueue, &efx->reset_work);
2945 static int efx_pm_poweroff(struct device *dev)
2947 struct pci_dev *pci_dev = to_pci_dev(dev);
2948 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2950 efx->type->fini(efx);
2952 efx->reset_pending = 0;
2954 pci_save_state(pci_dev);
2955 return pci_set_power_state(pci_dev, PCI_D3hot);
2958 /* Used for both resume and restore */
2959 static int efx_pm_resume(struct device *dev)
2961 struct pci_dev *pci_dev = to_pci_dev(dev);
2962 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2965 rc = pci_set_power_state(pci_dev, PCI_D0);
2968 pci_restore_state(pci_dev);
2969 rc = pci_enable_device(pci_dev);
2972 pci_set_master(efx->pci_dev);
2973 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2976 rc = efx->type->init(efx);
2979 rc = efx_pm_thaw(dev);
2983 static int efx_pm_suspend(struct device *dev)
2988 rc = efx_pm_poweroff(dev);
2994 static const struct dev_pm_ops efx_pm_ops = {
2995 .suspend = efx_pm_suspend,
2996 .resume = efx_pm_resume,
2997 .freeze = efx_pm_freeze,
2998 .thaw = efx_pm_thaw,
2999 .poweroff = efx_pm_poweroff,
3000 .restore = efx_pm_resume,
3003 /* A PCI error affecting this device was detected.
3004 * At this point MMIO and DMA may be disabled.
3005 * Stop the software path and request a slot reset.
3007 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
3008 enum pci_channel_state state)
3010 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3011 struct efx_nic *efx = pci_get_drvdata(pdev);
3013 if (state == pci_channel_io_perm_failure)
3014 return PCI_ERS_RESULT_DISCONNECT;
3018 if (efx->state != STATE_DISABLED) {
3019 efx->state = STATE_RECOVERY;
3020 efx->reset_pending = 0;
3022 efx_device_detach_sync(efx);
3025 efx_disable_interrupts(efx);
3027 status = PCI_ERS_RESULT_NEED_RESET;
3029 /* If the interface is disabled we don't want to do anything
3032 status = PCI_ERS_RESULT_RECOVERED;
3037 pci_disable_device(pdev);
3042 /* Fake a successfull reset, which will be performed later in efx_io_resume. */
3043 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
3045 struct efx_nic *efx = pci_get_drvdata(pdev);
3046 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3049 if (pci_enable_device(pdev)) {
3050 netif_err(efx, hw, efx->net_dev,
3051 "Cannot re-enable PCI device after reset.\n");
3052 status = PCI_ERS_RESULT_DISCONNECT;
3055 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
3057 netif_err(efx, hw, efx->net_dev,
3058 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
3059 /* Non-fatal error. Continue. */
3065 /* Perform the actual reset and resume I/O operations. */
3066 static void efx_io_resume(struct pci_dev *pdev)
3068 struct efx_nic *efx = pci_get_drvdata(pdev);
3073 if (efx->state == STATE_DISABLED)
3076 rc = efx_reset(efx, RESET_TYPE_ALL);
3078 netif_err(efx, hw, efx->net_dev,
3079 "efx_reset failed after PCI error (%d)\n", rc);
3081 efx->state = STATE_READY;
3082 netif_dbg(efx, hw, efx->net_dev,
3083 "Done resetting and resuming IO after PCI error.\n");
3090 /* For simplicity and reliability, we always require a slot reset and try to
3091 * reset the hardware when a pci error affecting the device is detected.
3092 * We leave both the link_reset and mmio_enabled callback unimplemented:
3093 * with our request for slot reset the mmio_enabled callback will never be
3094 * called, and the link_reset callback is not used by AER or EEH mechanisms.
3096 static struct pci_error_handlers efx_err_handlers = {
3097 .error_detected = efx_io_error_detected,
3098 .slot_reset = efx_io_slot_reset,
3099 .resume = efx_io_resume,
3102 static struct pci_driver efx_pci_driver = {
3103 .name = KBUILD_MODNAME,
3104 .id_table = efx_pci_table,
3105 .probe = efx_pci_probe,
3106 .remove = efx_pci_remove,
3107 .driver.pm = &efx_pm_ops,
3108 .err_handler = &efx_err_handlers,
3111 /**************************************************************************
3113 * Kernel module interface
3115 *************************************************************************/
3117 module_param(interrupt_mode, uint, 0444);
3118 MODULE_PARM_DESC(interrupt_mode,
3119 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
3121 static int __init efx_init_module(void)
3125 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
3127 rc = register_netdevice_notifier(&efx_netdev_notifier);
3131 rc = efx_init_sriov();
3135 reset_workqueue = create_singlethread_workqueue("sfc_reset");
3136 if (!reset_workqueue) {
3141 rc = pci_register_driver(&efx_pci_driver);
3148 destroy_workqueue(reset_workqueue);
3152 unregister_netdevice_notifier(&efx_netdev_notifier);
3157 static void __exit efx_exit_module(void)
3159 printk(KERN_INFO "Solarflare NET driver unloading\n");
3161 pci_unregister_driver(&efx_pci_driver);
3162 destroy_workqueue(reset_workqueue);
3164 unregister_netdevice_notifier(&efx_netdev_notifier);
3168 module_init(efx_init_module);
3169 module_exit(efx_exit_module);
3171 MODULE_AUTHOR("Solarflare Communications and "
3172 "Michael Brown <mbrown@fensystems.co.uk>");
3173 MODULE_DESCRIPTION("Solarflare Communications network driver");
3174 MODULE_LICENSE("GPL");
3175 MODULE_DEVICE_TABLE(pci, efx_pci_table);