1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/ethtool.h>
21 #include <linux/topology.h>
22 #include <linux/gfp.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include "net_driver.h"
31 #include "workarounds.h"
33 /**************************************************************************
37 **************************************************************************
40 /* Loopback mode names (see LOOPBACK_MODE()) */
41 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
42 const char *const efx_loopback_mode_names[] = {
43 [LOOPBACK_NONE] = "NONE",
44 [LOOPBACK_DATA] = "DATAPATH",
45 [LOOPBACK_GMAC] = "GMAC",
46 [LOOPBACK_XGMII] = "XGMII",
47 [LOOPBACK_XGXS] = "XGXS",
48 [LOOPBACK_XAUI] = "XAUI",
49 [LOOPBACK_GMII] = "GMII",
50 [LOOPBACK_SGMII] = "SGMII",
51 [LOOPBACK_XGBR] = "XGBR",
52 [LOOPBACK_XFI] = "XFI",
53 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
54 [LOOPBACK_GMII_FAR] = "GMII_FAR",
55 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
56 [LOOPBACK_XFI_FAR] = "XFI_FAR",
57 [LOOPBACK_GPHY] = "GPHY",
58 [LOOPBACK_PHYXS] = "PHYXS",
59 [LOOPBACK_PCS] = "PCS",
60 [LOOPBACK_PMAPMD] = "PMA/PMD",
61 [LOOPBACK_XPORT] = "XPORT",
62 [LOOPBACK_XGMII_WS] = "XGMII_WS",
63 [LOOPBACK_XAUI_WS] = "XAUI_WS",
64 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
65 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
66 [LOOPBACK_GMII_WS] = "GMII_WS",
67 [LOOPBACK_XFI_WS] = "XFI_WS",
68 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
69 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
72 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
73 const char *const efx_reset_type_names[] = {
74 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
75 [RESET_TYPE_ALL] = "ALL",
76 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
77 [RESET_TYPE_WORLD] = "WORLD",
78 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
79 [RESET_TYPE_DISABLE] = "DISABLE",
80 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
81 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
82 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
83 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
84 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
85 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
88 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
89 * queued onto this work queue. This is not a per-nic work queue, because
90 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
92 static struct workqueue_struct *reset_workqueue;
94 /**************************************************************************
98 *************************************************************************/
101 * Use separate channels for TX and RX events
103 * Set this to 1 to use separate channels for TX and RX. It allows us
104 * to control interrupt affinity separately for TX and RX.
106 * This is only used in MSI-X interrupt mode
108 static bool separate_tx_channels;
109 module_param(separate_tx_channels, bool, 0444);
110 MODULE_PARM_DESC(separate_tx_channels,
111 "Use separate channels for TX and RX");
113 /* This is the weight assigned to each of the (per-channel) virtual
116 static int napi_weight = 64;
118 /* This is the time (in jiffies) between invocations of the hardware
120 * On Falcon-based NICs, this will:
121 * - Check the on-board hardware monitor;
122 * - Poll the link state and reconfigure the hardware as necessary.
123 * On Siena-based NICs for power systems with EEH support, this will give EEH a
126 static unsigned int efx_monitor_interval = 1 * HZ;
128 /* Initial interrupt moderation settings. They can be modified after
129 * module load with ethtool.
131 * The default for RX should strike a balance between increasing the
132 * round-trip latency and reducing overhead.
134 static unsigned int rx_irq_mod_usec = 60;
136 /* Initial interrupt moderation settings. They can be modified after
137 * module load with ethtool.
139 * This default is chosen to ensure that a 10G link does not go idle
140 * while a TX queue is stopped after it has become full. A queue is
141 * restarted when it drops below half full. The time this takes (assuming
142 * worst case 3 descriptors per packet and 1024 descriptors) is
143 * 512 / 3 * 1.2 = 205 usec.
145 static unsigned int tx_irq_mod_usec = 150;
147 /* This is the first interrupt mode to try out of:
152 static unsigned int interrupt_mode;
154 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
155 * i.e. the number of CPUs among which we may distribute simultaneous
156 * interrupt handling.
158 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
159 * The default (0) means to assign an interrupt to each core.
161 static unsigned int rss_cpus;
162 module_param(rss_cpus, uint, 0444);
163 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
165 static bool phy_flash_cfg;
166 module_param(phy_flash_cfg, bool, 0644);
167 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
169 static unsigned irq_adapt_low_thresh = 8000;
170 module_param(irq_adapt_low_thresh, uint, 0644);
171 MODULE_PARM_DESC(irq_adapt_low_thresh,
172 "Threshold score for reducing IRQ moderation");
174 static unsigned irq_adapt_high_thresh = 16000;
175 module_param(irq_adapt_high_thresh, uint, 0644);
176 MODULE_PARM_DESC(irq_adapt_high_thresh,
177 "Threshold score for increasing IRQ moderation");
179 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
180 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
181 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
182 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
183 module_param(debug, uint, 0);
184 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
186 /**************************************************************************
188 * Utility functions and prototypes
190 *************************************************************************/
192 static void efx_soft_enable_interrupts(struct efx_nic *efx);
193 static void efx_soft_disable_interrupts(struct efx_nic *efx);
194 static void efx_remove_channel(struct efx_channel *channel);
195 static void efx_remove_channels(struct efx_nic *efx);
196 static const struct efx_channel_type efx_default_channel_type;
197 static void efx_remove_port(struct efx_nic *efx);
198 static void efx_init_napi_channel(struct efx_channel *channel);
199 static void efx_fini_napi(struct efx_nic *efx);
200 static void efx_fini_napi_channel(struct efx_channel *channel);
201 static void efx_fini_struct(struct efx_nic *efx);
202 static void efx_start_all(struct efx_nic *efx);
203 static void efx_stop_all(struct efx_nic *efx);
205 #define EFX_ASSERT_RESET_SERIALISED(efx) \
207 if ((efx->state == STATE_READY) || \
208 (efx->state == STATE_RECOVERY) || \
209 (efx->state == STATE_DISABLED)) \
213 static int efx_check_disabled(struct efx_nic *efx)
215 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
216 netif_err(efx, drv, efx->net_dev,
217 "device is disabled due to earlier errors\n");
223 /**************************************************************************
225 * Event queue processing
227 *************************************************************************/
229 /* Process channel's event queue
231 * This function is responsible for processing the event queue of a
232 * single channel. The caller must guarantee that this function will
233 * never be concurrently called more than once on the same channel,
234 * though different channels may be being processed concurrently.
236 static int efx_process_channel(struct efx_channel *channel, int budget)
240 if (unlikely(!channel->enabled))
243 spent = efx_nic_process_eventq(channel, budget);
244 if (spent && efx_channel_has_rx_queue(channel)) {
245 struct efx_rx_queue *rx_queue =
246 efx_channel_get_rx_queue(channel);
248 efx_rx_flush_packet(channel);
249 efx_fast_push_rx_descriptors(rx_queue);
257 * NAPI guarantees serialisation of polls of the same device, which
258 * provides the guarantee required by efx_process_channel().
260 static int efx_poll(struct napi_struct *napi, int budget)
262 struct efx_channel *channel =
263 container_of(napi, struct efx_channel, napi_str);
264 struct efx_nic *efx = channel->efx;
267 netif_vdbg(efx, intr, efx->net_dev,
268 "channel %d NAPI poll executing on CPU %d\n",
269 channel->channel, raw_smp_processor_id());
271 spent = efx_process_channel(channel, budget);
273 if (spent < budget) {
274 if (efx_channel_has_rx_queue(channel) &&
275 efx->irq_rx_adaptive &&
276 unlikely(++channel->irq_count == 1000)) {
277 if (unlikely(channel->irq_mod_score <
278 irq_adapt_low_thresh)) {
279 if (channel->irq_moderation > 1) {
280 channel->irq_moderation -= 1;
281 efx->type->push_irq_moderation(channel);
283 } else if (unlikely(channel->irq_mod_score >
284 irq_adapt_high_thresh)) {
285 if (channel->irq_moderation <
286 efx->irq_rx_moderation) {
287 channel->irq_moderation += 1;
288 efx->type->push_irq_moderation(channel);
291 channel->irq_count = 0;
292 channel->irq_mod_score = 0;
295 efx_filter_rfs_expire(channel);
297 /* There is no race here; although napi_disable() will
298 * only wait for napi_complete(), this isn't a problem
299 * since efx_nic_eventq_read_ack() will have no effect if
300 * interrupts have already been disabled.
303 efx_nic_eventq_read_ack(channel);
309 /* Create event queue
310 * Event queue memory allocations are done only once. If the channel
311 * is reset, the memory buffer will be reused; this guards against
312 * errors during channel reset and also simplifies interrupt handling.
314 static int efx_probe_eventq(struct efx_channel *channel)
316 struct efx_nic *efx = channel->efx;
317 unsigned long entries;
319 netif_dbg(efx, probe, efx->net_dev,
320 "chan %d create event queue\n", channel->channel);
322 /* Build an event queue with room for one event per tx and rx buffer,
323 * plus some extra for link state events and MCDI completions. */
324 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
325 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
326 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
328 return efx_nic_probe_eventq(channel);
331 /* Prepare channel's event queue */
332 static void efx_init_eventq(struct efx_channel *channel)
334 netif_dbg(channel->efx, drv, channel->efx->net_dev,
335 "chan %d init event queue\n", channel->channel);
337 channel->eventq_read_ptr = 0;
339 efx_nic_init_eventq(channel);
340 channel->eventq_init = true;
343 /* Enable event queue processing and NAPI */
344 static void efx_start_eventq(struct efx_channel *channel)
346 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
347 "chan %d start event queue\n", channel->channel);
349 /* Make sure the NAPI handler sees the enabled flag set */
350 channel->enabled = true;
353 napi_enable(&channel->napi_str);
354 efx_nic_eventq_read_ack(channel);
357 /* Disable event queue processing and NAPI */
358 static void efx_stop_eventq(struct efx_channel *channel)
360 if (!channel->enabled)
363 napi_disable(&channel->napi_str);
364 channel->enabled = false;
367 static void efx_fini_eventq(struct efx_channel *channel)
369 if (!channel->eventq_init)
372 netif_dbg(channel->efx, drv, channel->efx->net_dev,
373 "chan %d fini event queue\n", channel->channel);
375 efx_nic_fini_eventq(channel);
376 channel->eventq_init = false;
379 static void efx_remove_eventq(struct efx_channel *channel)
381 netif_dbg(channel->efx, drv, channel->efx->net_dev,
382 "chan %d remove event queue\n", channel->channel);
384 efx_nic_remove_eventq(channel);
387 /**************************************************************************
391 *************************************************************************/
393 /* Allocate and initialise a channel structure. */
394 static struct efx_channel *
395 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
397 struct efx_channel *channel;
398 struct efx_rx_queue *rx_queue;
399 struct efx_tx_queue *tx_queue;
402 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
407 channel->channel = i;
408 channel->type = &efx_default_channel_type;
410 for (j = 0; j < EFX_TXQ_TYPES; j++) {
411 tx_queue = &channel->tx_queue[j];
413 tx_queue->queue = i * EFX_TXQ_TYPES + j;
414 tx_queue->channel = channel;
417 rx_queue = &channel->rx_queue;
419 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
420 (unsigned long)rx_queue);
425 /* Allocate and initialise a channel structure, copying parameters
426 * (but not resources) from an old channel structure.
428 static struct efx_channel *
429 efx_copy_channel(const struct efx_channel *old_channel)
431 struct efx_channel *channel;
432 struct efx_rx_queue *rx_queue;
433 struct efx_tx_queue *tx_queue;
436 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
440 *channel = *old_channel;
442 channel->napi_dev = NULL;
443 memset(&channel->eventq, 0, sizeof(channel->eventq));
445 for (j = 0; j < EFX_TXQ_TYPES; j++) {
446 tx_queue = &channel->tx_queue[j];
447 if (tx_queue->channel)
448 tx_queue->channel = channel;
449 tx_queue->buffer = NULL;
450 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
453 rx_queue = &channel->rx_queue;
454 rx_queue->buffer = NULL;
455 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
456 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
457 (unsigned long)rx_queue);
462 static int efx_probe_channel(struct efx_channel *channel)
464 struct efx_tx_queue *tx_queue;
465 struct efx_rx_queue *rx_queue;
468 netif_dbg(channel->efx, probe, channel->efx->net_dev,
469 "creating channel %d\n", channel->channel);
471 rc = channel->type->pre_probe(channel);
475 rc = efx_probe_eventq(channel);
479 efx_for_each_channel_tx_queue(tx_queue, channel) {
480 rc = efx_probe_tx_queue(tx_queue);
485 efx_for_each_channel_rx_queue(rx_queue, channel) {
486 rc = efx_probe_rx_queue(rx_queue);
491 channel->n_rx_frm_trunc = 0;
496 efx_remove_channel(channel);
501 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
503 struct efx_nic *efx = channel->efx;
507 number = channel->channel;
508 if (efx->tx_channel_offset == 0) {
510 } else if (channel->channel < efx->tx_channel_offset) {
514 number -= efx->tx_channel_offset;
516 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
519 static void efx_set_channel_names(struct efx_nic *efx)
521 struct efx_channel *channel;
523 efx_for_each_channel(channel, efx)
524 channel->type->get_name(channel,
525 efx->msi_context[channel->channel].name,
526 sizeof(efx->msi_context[0].name));
529 static int efx_probe_channels(struct efx_nic *efx)
531 struct efx_channel *channel;
534 /* Restart special buffer allocation */
535 efx->next_buffer_table = 0;
537 /* Probe channels in reverse, so that any 'extra' channels
538 * use the start of the buffer table. This allows the traffic
539 * channels to be resized without moving them or wasting the
540 * entries before them.
542 efx_for_each_channel_rev(channel, efx) {
543 rc = efx_probe_channel(channel);
545 netif_err(efx, probe, efx->net_dev,
546 "failed to create channel %d\n",
551 efx_set_channel_names(efx);
556 efx_remove_channels(efx);
560 /* Channels are shutdown and reinitialised whilst the NIC is running
561 * to propagate configuration changes (mtu, checksum offload), or
562 * to clear hardware error conditions
564 static void efx_start_datapath(struct efx_nic *efx)
566 bool old_rx_scatter = efx->rx_scatter;
567 struct efx_tx_queue *tx_queue;
568 struct efx_rx_queue *rx_queue;
569 struct efx_channel *channel;
572 /* Calculate the rx buffer allocation parameters required to
573 * support the current MTU, including padding for header
574 * alignment and overruns.
576 efx->rx_dma_len = (efx->rx_prefix_size +
577 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
578 efx->type->rx_buffer_padding);
579 rx_buf_len = (sizeof(struct efx_rx_page_state) +
580 NET_IP_ALIGN + efx->rx_dma_len);
581 if (rx_buf_len <= PAGE_SIZE) {
582 efx->rx_scatter = false;
583 efx->rx_buffer_order = 0;
584 } else if (efx->type->can_rx_scatter) {
585 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
586 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
587 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
588 EFX_RX_BUF_ALIGNMENT) >
590 efx->rx_scatter = true;
591 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
592 efx->rx_buffer_order = 0;
594 efx->rx_scatter = false;
595 efx->rx_buffer_order = get_order(rx_buf_len);
598 efx_rx_config_page_split(efx);
599 if (efx->rx_buffer_order)
600 netif_dbg(efx, drv, efx->net_dev,
601 "RX buf len=%u; page order=%u batch=%u\n",
602 efx->rx_dma_len, efx->rx_buffer_order,
603 efx->rx_pages_per_batch);
605 netif_dbg(efx, drv, efx->net_dev,
606 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
607 efx->rx_dma_len, efx->rx_page_buf_step,
608 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
610 /* RX filters also have scatter-enabled flags */
611 if (efx->rx_scatter != old_rx_scatter)
612 efx->type->filter_update_rx_scatter(efx);
614 /* We must keep at least one descriptor in a TX ring empty.
615 * We could avoid this when the queue size does not exactly
616 * match the hardware ring size, but it's not that important.
617 * Therefore we stop the queue when one more skb might fill
618 * the ring completely. We wake it when half way back to
621 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
622 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
624 /* Initialise the channels */
625 efx_for_each_channel(channel, efx) {
626 efx_for_each_channel_tx_queue(tx_queue, channel)
627 efx_init_tx_queue(tx_queue);
629 efx_for_each_channel_rx_queue(rx_queue, channel) {
630 efx_init_rx_queue(rx_queue);
631 efx_nic_generate_fill_event(rx_queue);
634 WARN_ON(channel->rx_pkt_n_frags);
637 if (netif_device_present(efx->net_dev))
638 netif_tx_wake_all_queues(efx->net_dev);
641 static void efx_stop_datapath(struct efx_nic *efx)
643 struct efx_channel *channel;
644 struct efx_tx_queue *tx_queue;
645 struct efx_rx_queue *rx_queue;
648 EFX_ASSERT_RESET_SERIALISED(efx);
649 BUG_ON(efx->port_enabled);
652 efx_for_each_channel(channel, efx) {
653 efx_for_each_channel_rx_queue(rx_queue, channel)
654 rx_queue->refill_enabled = false;
657 efx_for_each_channel(channel, efx) {
658 /* RX packet processing is pipelined, so wait for the
659 * NAPI handler to complete. At least event queue 0
660 * might be kept active by non-data events, so don't
661 * use napi_synchronize() but actually disable NAPI
664 if (efx_channel_has_rx_queue(channel)) {
665 efx_stop_eventq(channel);
666 efx_start_eventq(channel);
670 rc = efx->type->fini_dmaq(efx);
671 if (rc && EFX_WORKAROUND_7803(efx)) {
672 /* Schedule a reset to recover from the flush failure. The
673 * descriptor caches reference memory we're about to free,
674 * but falcon_reconfigure_mac_wrapper() won't reconnect
675 * the MACs because of the pending reset.
677 netif_err(efx, drv, efx->net_dev,
678 "Resetting to recover from flush failure\n");
679 efx_schedule_reset(efx, RESET_TYPE_ALL);
681 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
683 netif_dbg(efx, drv, efx->net_dev,
684 "successfully flushed all queues\n");
687 efx_for_each_channel(channel, efx) {
688 efx_for_each_channel_rx_queue(rx_queue, channel)
689 efx_fini_rx_queue(rx_queue);
690 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
691 efx_fini_tx_queue(tx_queue);
695 static void efx_remove_channel(struct efx_channel *channel)
697 struct efx_tx_queue *tx_queue;
698 struct efx_rx_queue *rx_queue;
700 netif_dbg(channel->efx, drv, channel->efx->net_dev,
701 "destroy chan %d\n", channel->channel);
703 efx_for_each_channel_rx_queue(rx_queue, channel)
704 efx_remove_rx_queue(rx_queue);
705 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
706 efx_remove_tx_queue(tx_queue);
707 efx_remove_eventq(channel);
708 channel->type->post_remove(channel);
711 static void efx_remove_channels(struct efx_nic *efx)
713 struct efx_channel *channel;
715 efx_for_each_channel(channel, efx)
716 efx_remove_channel(channel);
720 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
722 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
723 u32 old_rxq_entries, old_txq_entries;
724 unsigned i, next_buffer_table = 0;
727 rc = efx_check_disabled(efx);
731 /* Not all channels should be reallocated. We must avoid
732 * reallocating their buffer table entries.
734 efx_for_each_channel(channel, efx) {
735 struct efx_rx_queue *rx_queue;
736 struct efx_tx_queue *tx_queue;
738 if (channel->type->copy)
740 next_buffer_table = max(next_buffer_table,
741 channel->eventq.index +
742 channel->eventq.entries);
743 efx_for_each_channel_rx_queue(rx_queue, channel)
744 next_buffer_table = max(next_buffer_table,
745 rx_queue->rxd.index +
746 rx_queue->rxd.entries);
747 efx_for_each_channel_tx_queue(tx_queue, channel)
748 next_buffer_table = max(next_buffer_table,
749 tx_queue->txd.index +
750 tx_queue->txd.entries);
753 efx_device_detach_sync(efx);
755 efx_soft_disable_interrupts(efx);
757 /* Clone channels (where possible) */
758 memset(other_channel, 0, sizeof(other_channel));
759 for (i = 0; i < efx->n_channels; i++) {
760 channel = efx->channel[i];
761 if (channel->type->copy)
762 channel = channel->type->copy(channel);
767 other_channel[i] = channel;
770 /* Swap entry counts and channel pointers */
771 old_rxq_entries = efx->rxq_entries;
772 old_txq_entries = efx->txq_entries;
773 efx->rxq_entries = rxq_entries;
774 efx->txq_entries = txq_entries;
775 for (i = 0; i < efx->n_channels; i++) {
776 channel = efx->channel[i];
777 efx->channel[i] = other_channel[i];
778 other_channel[i] = channel;
781 /* Restart buffer table allocation */
782 efx->next_buffer_table = next_buffer_table;
784 for (i = 0; i < efx->n_channels; i++) {
785 channel = efx->channel[i];
786 if (!channel->type->copy)
788 rc = efx_probe_channel(channel);
791 efx_init_napi_channel(efx->channel[i]);
795 /* Destroy unused channel structures */
796 for (i = 0; i < efx->n_channels; i++) {
797 channel = other_channel[i];
798 if (channel && channel->type->copy) {
799 efx_fini_napi_channel(channel);
800 efx_remove_channel(channel);
805 efx_soft_enable_interrupts(efx);
807 netif_device_attach(efx->net_dev);
812 efx->rxq_entries = old_rxq_entries;
813 efx->txq_entries = old_txq_entries;
814 for (i = 0; i < efx->n_channels; i++) {
815 channel = efx->channel[i];
816 efx->channel[i] = other_channel[i];
817 other_channel[i] = channel;
822 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
824 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
827 static const struct efx_channel_type efx_default_channel_type = {
828 .pre_probe = efx_channel_dummy_op_int,
829 .post_remove = efx_channel_dummy_op_void,
830 .get_name = efx_get_channel_name,
831 .copy = efx_copy_channel,
832 .keep_eventq = false,
835 int efx_channel_dummy_op_int(struct efx_channel *channel)
840 void efx_channel_dummy_op_void(struct efx_channel *channel)
844 /**************************************************************************
848 **************************************************************************/
850 /* This ensures that the kernel is kept informed (via
851 * netif_carrier_on/off) of the link status, and also maintains the
852 * link status's stop on the port's TX queue.
854 void efx_link_status_changed(struct efx_nic *efx)
856 struct efx_link_state *link_state = &efx->link_state;
858 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
859 * that no events are triggered between unregister_netdev() and the
860 * driver unloading. A more general condition is that NETDEV_CHANGE
861 * can only be generated between NETDEV_UP and NETDEV_DOWN */
862 if (!netif_running(efx->net_dev))
865 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
866 efx->n_link_state_changes++;
869 netif_carrier_on(efx->net_dev);
871 netif_carrier_off(efx->net_dev);
874 /* Status message for kernel log */
876 netif_info(efx, link, efx->net_dev,
877 "link up at %uMbps %s-duplex (MTU %d)\n",
878 link_state->speed, link_state->fd ? "full" : "half",
881 netif_info(efx, link, efx->net_dev, "link down\n");
884 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
886 efx->link_advertising = advertising;
888 if (advertising & ADVERTISED_Pause)
889 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
891 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
892 if (advertising & ADVERTISED_Asym_Pause)
893 efx->wanted_fc ^= EFX_FC_TX;
897 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
899 efx->wanted_fc = wanted_fc;
900 if (efx->link_advertising) {
901 if (wanted_fc & EFX_FC_RX)
902 efx->link_advertising |= (ADVERTISED_Pause |
903 ADVERTISED_Asym_Pause);
905 efx->link_advertising &= ~(ADVERTISED_Pause |
906 ADVERTISED_Asym_Pause);
907 if (wanted_fc & EFX_FC_TX)
908 efx->link_advertising ^= ADVERTISED_Asym_Pause;
912 static void efx_fini_port(struct efx_nic *efx);
914 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
915 * the MAC appropriately. All other PHY configuration changes are pushed
916 * through phy_op->set_settings(), and pushed asynchronously to the MAC
917 * through efx_monitor().
919 * Callers must hold the mac_lock
921 int __efx_reconfigure_port(struct efx_nic *efx)
923 enum efx_phy_mode phy_mode;
926 WARN_ON(!mutex_is_locked(&efx->mac_lock));
928 /* Disable PHY transmit in mac level loopbacks */
929 phy_mode = efx->phy_mode;
930 if (LOOPBACK_INTERNAL(efx))
931 efx->phy_mode |= PHY_MODE_TX_DISABLED;
933 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
935 rc = efx->type->reconfigure_port(efx);
938 efx->phy_mode = phy_mode;
943 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
945 int efx_reconfigure_port(struct efx_nic *efx)
949 EFX_ASSERT_RESET_SERIALISED(efx);
951 mutex_lock(&efx->mac_lock);
952 rc = __efx_reconfigure_port(efx);
953 mutex_unlock(&efx->mac_lock);
958 /* Asynchronous work item for changing MAC promiscuity and multicast
959 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
961 static void efx_mac_work(struct work_struct *data)
963 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
965 mutex_lock(&efx->mac_lock);
966 if (efx->port_enabled)
967 efx->type->reconfigure_mac(efx);
968 mutex_unlock(&efx->mac_lock);
971 static int efx_probe_port(struct efx_nic *efx)
975 netif_dbg(efx, probe, efx->net_dev, "create port\n");
978 efx->phy_mode = PHY_MODE_SPECIAL;
980 /* Connect up MAC/PHY operations table */
981 rc = efx->type->probe_port(efx);
985 /* Initialise MAC address to permanent address */
986 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN);
991 static int efx_init_port(struct efx_nic *efx)
995 netif_dbg(efx, drv, efx->net_dev, "init port\n");
997 mutex_lock(&efx->mac_lock);
999 rc = efx->phy_op->init(efx);
1003 efx->port_initialized = true;
1005 /* Reconfigure the MAC before creating dma queues (required for
1006 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1007 efx->type->reconfigure_mac(efx);
1009 /* Ensure the PHY advertises the correct flow control settings */
1010 rc = efx->phy_op->reconfigure(efx);
1014 mutex_unlock(&efx->mac_lock);
1018 efx->phy_op->fini(efx);
1020 mutex_unlock(&efx->mac_lock);
1024 static void efx_start_port(struct efx_nic *efx)
1026 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1027 BUG_ON(efx->port_enabled);
1029 mutex_lock(&efx->mac_lock);
1030 efx->port_enabled = true;
1032 /* efx_mac_work() might have been scheduled after efx_stop_port(),
1033 * and then cancelled by efx_flush_all() */
1034 efx->type->reconfigure_mac(efx);
1036 mutex_unlock(&efx->mac_lock);
1039 /* Prevent efx_mac_work() and efx_monitor() from working */
1040 static void efx_stop_port(struct efx_nic *efx)
1042 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1044 mutex_lock(&efx->mac_lock);
1045 efx->port_enabled = false;
1046 mutex_unlock(&efx->mac_lock);
1048 /* Serialise against efx_set_multicast_list() */
1049 netif_addr_lock_bh(efx->net_dev);
1050 netif_addr_unlock_bh(efx->net_dev);
1053 static void efx_fini_port(struct efx_nic *efx)
1055 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1057 if (!efx->port_initialized)
1060 efx->phy_op->fini(efx);
1061 efx->port_initialized = false;
1063 efx->link_state.up = false;
1064 efx_link_status_changed(efx);
1067 static void efx_remove_port(struct efx_nic *efx)
1069 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1071 efx->type->remove_port(efx);
1074 /**************************************************************************
1078 **************************************************************************/
1080 /* This configures the PCI device to enable I/O and DMA. */
1081 static int efx_init_io(struct efx_nic *efx)
1083 struct pci_dev *pci_dev = efx->pci_dev;
1084 dma_addr_t dma_mask = efx->type->max_dma_mask;
1085 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1088 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1090 rc = pci_enable_device(pci_dev);
1092 netif_err(efx, probe, efx->net_dev,
1093 "failed to enable PCI device\n");
1097 pci_set_master(pci_dev);
1099 /* Set the PCI DMA mask. Try all possibilities from our
1100 * genuine mask down to 32 bits, because some architectures
1101 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1102 * masks event though they reject 46 bit masks.
1104 while (dma_mask > 0x7fffffffUL) {
1105 if (dma_supported(&pci_dev->dev, dma_mask)) {
1106 rc = dma_set_mask(&pci_dev->dev, dma_mask);
1113 netif_err(efx, probe, efx->net_dev,
1114 "could not find a suitable DMA mask\n");
1117 netif_dbg(efx, probe, efx->net_dev,
1118 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1119 rc = dma_set_coherent_mask(&pci_dev->dev, dma_mask);
1121 /* dma_set_coherent_mask() is not *allowed* to
1122 * fail with a mask that dma_set_mask() accepted,
1123 * but just in case...
1125 netif_err(efx, probe, efx->net_dev,
1126 "failed to set consistent DMA mask\n");
1130 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1131 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1133 netif_err(efx, probe, efx->net_dev,
1134 "request for memory BAR failed\n");
1138 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1139 if (!efx->membase) {
1140 netif_err(efx, probe, efx->net_dev,
1141 "could not map memory BAR at %llx+%x\n",
1142 (unsigned long long)efx->membase_phys, mem_map_size);
1146 netif_dbg(efx, probe, efx->net_dev,
1147 "memory BAR at %llx+%x (virtual %p)\n",
1148 (unsigned long long)efx->membase_phys, mem_map_size,
1154 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1156 efx->membase_phys = 0;
1158 pci_disable_device(efx->pci_dev);
1163 static void efx_fini_io(struct efx_nic *efx)
1165 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1168 iounmap(efx->membase);
1169 efx->membase = NULL;
1172 if (efx->membase_phys) {
1173 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1174 efx->membase_phys = 0;
1177 pci_disable_device(efx->pci_dev);
1180 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1182 cpumask_var_t thread_mask;
1189 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1190 netif_warn(efx, probe, efx->net_dev,
1191 "RSS disabled due to allocation failure\n");
1196 for_each_online_cpu(cpu) {
1197 if (!cpumask_test_cpu(cpu, thread_mask)) {
1199 cpumask_or(thread_mask, thread_mask,
1200 topology_thread_cpumask(cpu));
1204 free_cpumask_var(thread_mask);
1207 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1208 * table entries that are inaccessible to VFs
1210 if (efx_sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1211 count > efx_vf_size(efx)) {
1212 netif_warn(efx, probe, efx->net_dev,
1213 "Reducing number of RSS channels from %u to %u for "
1214 "VF support. Increase vf-msix-limit to use more "
1215 "channels on the PF.\n",
1216 count, efx_vf_size(efx));
1217 count = efx_vf_size(efx);
1223 /* Probe the number and type of interrupts we are able to obtain, and
1224 * the resulting numbers of channels and RX queues.
1226 static int efx_probe_interrupts(struct efx_nic *efx)
1228 unsigned int extra_channels = 0;
1232 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1233 if (efx->extra_channel_type[i])
1236 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1237 struct msix_entry xentries[EFX_MAX_CHANNELS];
1238 unsigned int n_channels;
1240 n_channels = efx_wanted_parallelism(efx);
1241 if (separate_tx_channels)
1243 n_channels += extra_channels;
1244 n_channels = min(n_channels, efx->max_channels);
1246 for (i = 0; i < n_channels; i++)
1247 xentries[i].entry = i;
1248 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1250 netif_err(efx, drv, efx->net_dev,
1251 "WARNING: Insufficient MSI-X vectors"
1252 " available (%d < %u).\n", rc, n_channels);
1253 netif_err(efx, drv, efx->net_dev,
1254 "WARNING: Performance may be reduced.\n");
1255 EFX_BUG_ON_PARANOID(rc >= n_channels);
1257 rc = pci_enable_msix(efx->pci_dev, xentries,
1262 efx->n_channels = n_channels;
1263 if (n_channels > extra_channels)
1264 n_channels -= extra_channels;
1265 if (separate_tx_channels) {
1266 efx->n_tx_channels = max(n_channels / 2, 1U);
1267 efx->n_rx_channels = max(n_channels -
1271 efx->n_tx_channels = n_channels;
1272 efx->n_rx_channels = n_channels;
1274 for (i = 0; i < efx->n_channels; i++)
1275 efx_get_channel(efx, i)->irq =
1278 /* Fall back to single channel MSI */
1279 efx->interrupt_mode = EFX_INT_MODE_MSI;
1280 netif_err(efx, drv, efx->net_dev,
1281 "could not enable MSI-X\n");
1285 /* Try single interrupt MSI */
1286 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1287 efx->n_channels = 1;
1288 efx->n_rx_channels = 1;
1289 efx->n_tx_channels = 1;
1290 rc = pci_enable_msi(efx->pci_dev);
1292 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1294 netif_err(efx, drv, efx->net_dev,
1295 "could not enable MSI\n");
1296 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1300 /* Assume legacy interrupts */
1301 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1302 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1303 efx->n_rx_channels = 1;
1304 efx->n_tx_channels = 1;
1305 efx->legacy_irq = efx->pci_dev->irq;
1308 /* Assign extra channels if possible */
1309 j = efx->n_channels;
1310 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1311 if (!efx->extra_channel_type[i])
1313 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1314 efx->n_channels <= extra_channels) {
1315 efx->extra_channel_type[i]->handle_no_channel(efx);
1318 efx_get_channel(efx, j)->type =
1319 efx->extra_channel_type[i];
1323 /* RSS might be usable on VFs even if it is disabled on the PF */
1324 efx->rss_spread = ((efx->n_rx_channels > 1 || !efx_sriov_wanted(efx)) ?
1325 efx->n_rx_channels : efx_vf_size(efx));
1330 static void efx_soft_enable_interrupts(struct efx_nic *efx)
1332 struct efx_channel *channel;
1334 BUG_ON(efx->state == STATE_DISABLED);
1336 efx->irq_soft_enabled = true;
1339 efx_for_each_channel(channel, efx) {
1340 if (!channel->type->keep_eventq)
1341 efx_init_eventq(channel);
1342 efx_start_eventq(channel);
1345 efx_mcdi_mode_event(efx);
1348 static void efx_soft_disable_interrupts(struct efx_nic *efx)
1350 struct efx_channel *channel;
1352 if (efx->state == STATE_DISABLED)
1355 efx_mcdi_mode_poll(efx);
1357 efx->irq_soft_enabled = false;
1360 if (efx->legacy_irq)
1361 synchronize_irq(efx->legacy_irq);
1363 efx_for_each_channel(channel, efx) {
1365 synchronize_irq(channel->irq);
1367 efx_stop_eventq(channel);
1368 if (!channel->type->keep_eventq)
1369 efx_fini_eventq(channel);
1373 static void efx_enable_interrupts(struct efx_nic *efx)
1375 struct efx_channel *channel;
1377 BUG_ON(efx->state == STATE_DISABLED);
1379 if (efx->eeh_disabled_legacy_irq) {
1380 enable_irq(efx->legacy_irq);
1381 efx->eeh_disabled_legacy_irq = false;
1384 efx->type->irq_enable_master(efx);
1386 efx_for_each_channel(channel, efx) {
1387 if (channel->type->keep_eventq)
1388 efx_init_eventq(channel);
1391 efx_soft_enable_interrupts(efx);
1394 static void efx_disable_interrupts(struct efx_nic *efx)
1396 struct efx_channel *channel;
1398 efx_soft_disable_interrupts(efx);
1400 efx_for_each_channel(channel, efx) {
1401 if (channel->type->keep_eventq)
1402 efx_fini_eventq(channel);
1405 efx->type->irq_disable_non_ev(efx);
1408 static void efx_remove_interrupts(struct efx_nic *efx)
1410 struct efx_channel *channel;
1412 /* Remove MSI/MSI-X interrupts */
1413 efx_for_each_channel(channel, efx)
1415 pci_disable_msi(efx->pci_dev);
1416 pci_disable_msix(efx->pci_dev);
1418 /* Remove legacy interrupt */
1419 efx->legacy_irq = 0;
1422 static void efx_set_channels(struct efx_nic *efx)
1424 struct efx_channel *channel;
1425 struct efx_tx_queue *tx_queue;
1427 efx->tx_channel_offset =
1428 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1430 /* We need to mark which channels really have RX and TX
1431 * queues, and adjust the TX queue numbers if we have separate
1432 * RX-only and TX-only channels.
1434 efx_for_each_channel(channel, efx) {
1435 if (channel->channel < efx->n_rx_channels)
1436 channel->rx_queue.core_index = channel->channel;
1438 channel->rx_queue.core_index = -1;
1440 efx_for_each_channel_tx_queue(tx_queue, channel)
1441 tx_queue->queue -= (efx->tx_channel_offset *
1446 static int efx_probe_nic(struct efx_nic *efx)
1451 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1453 /* Carry out hardware-type specific initialisation */
1454 rc = efx->type->probe(efx);
1458 /* Determine the number of channels and queues by trying to hook
1459 * in MSI-X interrupts. */
1460 rc = efx_probe_interrupts(efx);
1464 efx->type->dimension_resources(efx);
1466 if (efx->n_channels > 1)
1467 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1468 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1469 efx->rx_indir_table[i] =
1470 ethtool_rxfh_indir_default(i, efx->rss_spread);
1472 efx_set_channels(efx);
1473 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1474 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1476 /* Initialise the interrupt moderation settings */
1477 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1483 efx->type->remove(efx);
1487 static void efx_remove_nic(struct efx_nic *efx)
1489 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1491 efx_remove_interrupts(efx);
1492 efx->type->remove(efx);
1495 static int efx_probe_filters(struct efx_nic *efx)
1499 spin_lock_init(&efx->filter_lock);
1501 rc = efx->type->filter_table_probe(efx);
1505 #ifdef CONFIG_RFS_ACCEL
1506 if (efx->type->offload_features & NETIF_F_NTUPLE) {
1507 efx->rps_flow_id = kcalloc(efx->type->max_rx_ip_filters,
1508 sizeof(*efx->rps_flow_id),
1510 if (!efx->rps_flow_id) {
1511 efx->type->filter_table_remove(efx);
1520 static void efx_remove_filters(struct efx_nic *efx)
1522 #ifdef CONFIG_RFS_ACCEL
1523 kfree(efx->rps_flow_id);
1525 efx->type->filter_table_remove(efx);
1528 static void efx_restore_filters(struct efx_nic *efx)
1530 efx->type->filter_table_restore(efx);
1533 /**************************************************************************
1535 * NIC startup/shutdown
1537 *************************************************************************/
1539 static int efx_probe_all(struct efx_nic *efx)
1543 rc = efx_probe_nic(efx);
1545 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1549 rc = efx_probe_port(efx);
1551 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1555 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1556 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1560 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1562 rc = efx_probe_filters(efx);
1564 netif_err(efx, probe, efx->net_dev,
1565 "failed to create filter tables\n");
1569 rc = efx_probe_channels(efx);
1576 efx_remove_filters(efx);
1578 efx_remove_port(efx);
1580 efx_remove_nic(efx);
1585 /* If the interface is supposed to be running but is not, start
1586 * the hardware and software data path, regular activity for the port
1587 * (MAC statistics, link polling, etc.) and schedule the port to be
1588 * reconfigured. Interrupts must already be enabled. This function
1589 * is safe to call multiple times, so long as the NIC is not disabled.
1590 * Requires the RTNL lock.
1592 static void efx_start_all(struct efx_nic *efx)
1594 EFX_ASSERT_RESET_SERIALISED(efx);
1595 BUG_ON(efx->state == STATE_DISABLED);
1597 /* Check that it is appropriate to restart the interface. All
1598 * of these flags are safe to read under just the rtnl lock */
1599 if (efx->port_enabled || !netif_running(efx->net_dev))
1602 efx_start_port(efx);
1603 efx_start_datapath(efx);
1605 /* Start the hardware monitor if there is one */
1606 if (efx->type->monitor != NULL)
1607 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1608 efx_monitor_interval);
1610 /* If link state detection is normally event-driven, we have
1611 * to poll now because we could have missed a change
1613 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) {
1614 mutex_lock(&efx->mac_lock);
1615 if (efx->phy_op->poll(efx))
1616 efx_link_status_changed(efx);
1617 mutex_unlock(&efx->mac_lock);
1620 efx->type->start_stats(efx);
1623 /* Flush all delayed work. Should only be called when no more delayed work
1624 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1625 * since we're holding the rtnl_lock at this point. */
1626 static void efx_flush_all(struct efx_nic *efx)
1628 /* Make sure the hardware monitor and event self-test are stopped */
1629 cancel_delayed_work_sync(&efx->monitor_work);
1630 efx_selftest_async_cancel(efx);
1631 /* Stop scheduled port reconfigurations */
1632 cancel_work_sync(&efx->mac_work);
1635 /* Quiesce the hardware and software data path, and regular activity
1636 * for the port without bringing the link down. Safe to call multiple
1637 * times with the NIC in almost any state, but interrupts should be
1638 * enabled. Requires the RTNL lock.
1640 static void efx_stop_all(struct efx_nic *efx)
1642 EFX_ASSERT_RESET_SERIALISED(efx);
1644 /* port_enabled can be read safely under the rtnl lock */
1645 if (!efx->port_enabled)
1648 efx->type->stop_stats(efx);
1651 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1654 /* Stop the kernel transmit interface. This is only valid if
1655 * the device is stopped or detached; otherwise the watchdog
1656 * may fire immediately.
1658 WARN_ON(netif_running(efx->net_dev) &&
1659 netif_device_present(efx->net_dev));
1660 netif_tx_disable(efx->net_dev);
1662 efx_stop_datapath(efx);
1665 static void efx_remove_all(struct efx_nic *efx)
1667 efx_remove_channels(efx);
1668 efx_remove_filters(efx);
1669 efx_remove_port(efx);
1670 efx_remove_nic(efx);
1673 /**************************************************************************
1675 * Interrupt moderation
1677 **************************************************************************/
1679 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1683 if (usecs * 1000 < quantum_ns)
1684 return 1; /* never round down to 0 */
1685 return usecs * 1000 / quantum_ns;
1688 /* Set interrupt moderation parameters */
1689 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1690 unsigned int rx_usecs, bool rx_adaptive,
1691 bool rx_may_override_tx)
1693 struct efx_channel *channel;
1694 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1695 efx->timer_quantum_ns,
1697 unsigned int tx_ticks;
1698 unsigned int rx_ticks;
1700 EFX_ASSERT_RESET_SERIALISED(efx);
1702 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1705 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1706 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1708 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1709 !rx_may_override_tx) {
1710 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1711 "RX and TX IRQ moderation must be equal\n");
1715 efx->irq_rx_adaptive = rx_adaptive;
1716 efx->irq_rx_moderation = rx_ticks;
1717 efx_for_each_channel(channel, efx) {
1718 if (efx_channel_has_rx_queue(channel))
1719 channel->irq_moderation = rx_ticks;
1720 else if (efx_channel_has_tx_queues(channel))
1721 channel->irq_moderation = tx_ticks;
1727 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1728 unsigned int *rx_usecs, bool *rx_adaptive)
1730 /* We must round up when converting ticks to microseconds
1731 * because we round down when converting the other way.
1734 *rx_adaptive = efx->irq_rx_adaptive;
1735 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1736 efx->timer_quantum_ns,
1739 /* If channels are shared between RX and TX, so is IRQ
1740 * moderation. Otherwise, IRQ moderation is the same for all
1741 * TX channels and is not adaptive.
1743 if (efx->tx_channel_offset == 0)
1744 *tx_usecs = *rx_usecs;
1746 *tx_usecs = DIV_ROUND_UP(
1747 efx->channel[efx->tx_channel_offset]->irq_moderation *
1748 efx->timer_quantum_ns,
1752 /**************************************************************************
1756 **************************************************************************/
1758 /* Run periodically off the general workqueue */
1759 static void efx_monitor(struct work_struct *data)
1761 struct efx_nic *efx = container_of(data, struct efx_nic,
1764 netif_vdbg(efx, timer, efx->net_dev,
1765 "hardware monitor executing on CPU %d\n",
1766 raw_smp_processor_id());
1767 BUG_ON(efx->type->monitor == NULL);
1769 /* If the mac_lock is already held then it is likely a port
1770 * reconfiguration is already in place, which will likely do
1771 * most of the work of monitor() anyway. */
1772 if (mutex_trylock(&efx->mac_lock)) {
1773 if (efx->port_enabled)
1774 efx->type->monitor(efx);
1775 mutex_unlock(&efx->mac_lock);
1778 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1779 efx_monitor_interval);
1782 /**************************************************************************
1786 *************************************************************************/
1789 * Context: process, rtnl_lock() held.
1791 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1793 struct efx_nic *efx = netdev_priv(net_dev);
1794 struct mii_ioctl_data *data = if_mii(ifr);
1796 if (cmd == SIOCSHWTSTAMP)
1797 return efx_ptp_ioctl(efx, ifr, cmd);
1799 /* Convert phy_id from older PRTAD/DEVAD format */
1800 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1801 (data->phy_id & 0xfc00) == 0x0400)
1802 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1804 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1807 /**************************************************************************
1811 **************************************************************************/
1813 static void efx_init_napi_channel(struct efx_channel *channel)
1815 struct efx_nic *efx = channel->efx;
1817 channel->napi_dev = efx->net_dev;
1818 netif_napi_add(channel->napi_dev, &channel->napi_str,
1819 efx_poll, napi_weight);
1822 static void efx_init_napi(struct efx_nic *efx)
1824 struct efx_channel *channel;
1826 efx_for_each_channel(channel, efx)
1827 efx_init_napi_channel(channel);
1830 static void efx_fini_napi_channel(struct efx_channel *channel)
1832 if (channel->napi_dev)
1833 netif_napi_del(&channel->napi_str);
1834 channel->napi_dev = NULL;
1837 static void efx_fini_napi(struct efx_nic *efx)
1839 struct efx_channel *channel;
1841 efx_for_each_channel(channel, efx)
1842 efx_fini_napi_channel(channel);
1845 /**************************************************************************
1847 * Kernel netpoll interface
1849 *************************************************************************/
1851 #ifdef CONFIG_NET_POLL_CONTROLLER
1853 /* Although in the common case interrupts will be disabled, this is not
1854 * guaranteed. However, all our work happens inside the NAPI callback,
1855 * so no locking is required.
1857 static void efx_netpoll(struct net_device *net_dev)
1859 struct efx_nic *efx = netdev_priv(net_dev);
1860 struct efx_channel *channel;
1862 efx_for_each_channel(channel, efx)
1863 efx_schedule_channel(channel);
1868 /**************************************************************************
1870 * Kernel net device interface
1872 *************************************************************************/
1874 /* Context: process, rtnl_lock() held. */
1875 static int efx_net_open(struct net_device *net_dev)
1877 struct efx_nic *efx = netdev_priv(net_dev);
1880 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1881 raw_smp_processor_id());
1883 rc = efx_check_disabled(efx);
1886 if (efx->phy_mode & PHY_MODE_SPECIAL)
1888 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1891 /* Notify the kernel of the link state polled during driver load,
1892 * before the monitor starts running */
1893 efx_link_status_changed(efx);
1896 efx_selftest_async_start(efx);
1900 /* Context: process, rtnl_lock() held.
1901 * Note that the kernel will ignore our return code; this method
1902 * should really be a void.
1904 static int efx_net_stop(struct net_device *net_dev)
1906 struct efx_nic *efx = netdev_priv(net_dev);
1908 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1909 raw_smp_processor_id());
1911 /* Stop the device and flush all the channels */
1917 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1918 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
1919 struct rtnl_link_stats64 *stats)
1921 struct efx_nic *efx = netdev_priv(net_dev);
1923 spin_lock_bh(&efx->stats_lock);
1924 efx->type->update_stats(efx, NULL, stats);
1925 spin_unlock_bh(&efx->stats_lock);
1930 /* Context: netif_tx_lock held, BHs disabled. */
1931 static void efx_watchdog(struct net_device *net_dev)
1933 struct efx_nic *efx = netdev_priv(net_dev);
1935 netif_err(efx, tx_err, efx->net_dev,
1936 "TX stuck with port_enabled=%d: resetting channels\n",
1939 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1943 /* Context: process, rtnl_lock() held. */
1944 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1946 struct efx_nic *efx = netdev_priv(net_dev);
1949 rc = efx_check_disabled(efx);
1952 if (new_mtu > EFX_MAX_MTU)
1955 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1957 efx_device_detach_sync(efx);
1960 mutex_lock(&efx->mac_lock);
1961 net_dev->mtu = new_mtu;
1962 efx->type->reconfigure_mac(efx);
1963 mutex_unlock(&efx->mac_lock);
1966 netif_device_attach(efx->net_dev);
1970 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1972 struct efx_nic *efx = netdev_priv(net_dev);
1973 struct sockaddr *addr = data;
1974 char *new_addr = addr->sa_data;
1976 if (!is_valid_ether_addr(new_addr)) {
1977 netif_err(efx, drv, efx->net_dev,
1978 "invalid ethernet MAC address requested: %pM\n",
1980 return -EADDRNOTAVAIL;
1983 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1984 efx_sriov_mac_address_changed(efx);
1986 /* Reconfigure the MAC */
1987 mutex_lock(&efx->mac_lock);
1988 efx->type->reconfigure_mac(efx);
1989 mutex_unlock(&efx->mac_lock);
1994 /* Context: netif_addr_lock held, BHs disabled. */
1995 static void efx_set_rx_mode(struct net_device *net_dev)
1997 struct efx_nic *efx = netdev_priv(net_dev);
1999 if (efx->port_enabled)
2000 queue_work(efx->workqueue, &efx->mac_work);
2001 /* Otherwise efx_start_port() will do this */
2004 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2006 struct efx_nic *efx = netdev_priv(net_dev);
2008 /* If disabling RX n-tuple filtering, clear existing filters */
2009 if (net_dev->features & ~data & NETIF_F_NTUPLE)
2010 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2015 static const struct net_device_ops efx_netdev_ops = {
2016 .ndo_open = efx_net_open,
2017 .ndo_stop = efx_net_stop,
2018 .ndo_get_stats64 = efx_net_stats,
2019 .ndo_tx_timeout = efx_watchdog,
2020 .ndo_start_xmit = efx_hard_start_xmit,
2021 .ndo_validate_addr = eth_validate_addr,
2022 .ndo_do_ioctl = efx_ioctl,
2023 .ndo_change_mtu = efx_change_mtu,
2024 .ndo_set_mac_address = efx_set_mac_address,
2025 .ndo_set_rx_mode = efx_set_rx_mode,
2026 .ndo_set_features = efx_set_features,
2027 #ifdef CONFIG_SFC_SRIOV
2028 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2029 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2030 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2031 .ndo_get_vf_config = efx_sriov_get_vf_config,
2033 #ifdef CONFIG_NET_POLL_CONTROLLER
2034 .ndo_poll_controller = efx_netpoll,
2036 .ndo_setup_tc = efx_setup_tc,
2037 #ifdef CONFIG_RFS_ACCEL
2038 .ndo_rx_flow_steer = efx_filter_rfs,
2042 static void efx_update_name(struct efx_nic *efx)
2044 strcpy(efx->name, efx->net_dev->name);
2045 efx_mtd_rename(efx);
2046 efx_set_channel_names(efx);
2049 static int efx_netdev_event(struct notifier_block *this,
2050 unsigned long event, void *ptr)
2052 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2054 if (net_dev->netdev_ops == &efx_netdev_ops &&
2055 event == NETDEV_CHANGENAME)
2056 efx_update_name(netdev_priv(net_dev));
2061 static struct notifier_block efx_netdev_notifier = {
2062 .notifier_call = efx_netdev_event,
2066 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2068 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2069 return sprintf(buf, "%d\n", efx->phy_type);
2071 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2073 static int efx_register_netdev(struct efx_nic *efx)
2075 struct net_device *net_dev = efx->net_dev;
2076 struct efx_channel *channel;
2079 net_dev->watchdog_timeo = 5 * HZ;
2080 net_dev->irq = efx->pci_dev->irq;
2081 net_dev->netdev_ops = &efx_netdev_ops;
2082 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
2083 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2087 /* Enable resets to be scheduled and check whether any were
2088 * already requested. If so, the NIC is probably hosed so we
2091 efx->state = STATE_READY;
2092 smp_mb(); /* ensure we change state before checking reset_pending */
2093 if (efx->reset_pending) {
2094 netif_err(efx, probe, efx->net_dev,
2095 "aborting probe due to scheduled reset\n");
2100 rc = dev_alloc_name(net_dev, net_dev->name);
2103 efx_update_name(efx);
2105 /* Always start with carrier off; PHY events will detect the link */
2106 netif_carrier_off(net_dev);
2108 rc = register_netdevice(net_dev);
2112 efx_for_each_channel(channel, efx) {
2113 struct efx_tx_queue *tx_queue;
2114 efx_for_each_channel_tx_queue(tx_queue, channel)
2115 efx_init_tx_queue_core_txq(tx_queue);
2120 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2122 netif_err(efx, drv, efx->net_dev,
2123 "failed to init net dev attributes\n");
2124 goto fail_registered;
2131 unregister_netdevice(net_dev);
2133 efx->state = STATE_UNINIT;
2135 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2139 static void efx_unregister_netdev(struct efx_nic *efx)
2144 BUG_ON(netdev_priv(efx->net_dev) != efx);
2146 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2147 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2150 unregister_netdevice(efx->net_dev);
2151 efx->state = STATE_UNINIT;
2155 /**************************************************************************
2157 * Device reset and suspend
2159 **************************************************************************/
2161 /* Tears down the entire software state and most of the hardware state
2163 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2165 EFX_ASSERT_RESET_SERIALISED(efx);
2168 efx_disable_interrupts(efx);
2170 mutex_lock(&efx->mac_lock);
2171 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2172 efx->phy_op->fini(efx);
2173 efx->type->fini(efx);
2176 /* This function will always ensure that the locks acquired in
2177 * efx_reset_down() are released. A failure return code indicates
2178 * that we were unable to reinitialise the hardware, and the
2179 * driver should be disabled. If ok is false, then the rx and tx
2180 * engines are not restarted, pending a RESET_DISABLE. */
2181 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2185 EFX_ASSERT_RESET_SERIALISED(efx);
2187 rc = efx->type->init(efx);
2189 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2196 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2197 rc = efx->phy_op->init(efx);
2200 if (efx->phy_op->reconfigure(efx))
2201 netif_err(efx, drv, efx->net_dev,
2202 "could not restore PHY settings\n");
2205 efx_enable_interrupts(efx);
2206 efx_restore_filters(efx);
2207 efx_sriov_reset(efx);
2209 mutex_unlock(&efx->mac_lock);
2216 efx->port_initialized = false;
2218 mutex_unlock(&efx->mac_lock);
2223 /* Reset the NIC using the specified method. Note that the reset may
2224 * fail, in which case the card will be left in an unusable state.
2226 * Caller must hold the rtnl_lock.
2228 int efx_reset(struct efx_nic *efx, enum reset_type method)
2233 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2234 RESET_TYPE(method));
2236 efx_device_detach_sync(efx);
2237 efx_reset_down(efx, method);
2239 rc = efx->type->reset(efx, method);
2241 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2245 /* Clear flags for the scopes we covered. We assume the NIC and
2246 * driver are now quiescent so that there is no race here.
2248 efx->reset_pending &= -(1 << (method + 1));
2250 /* Reinitialise bus-mastering, which may have been turned off before
2251 * the reset was scheduled. This is still appropriate, even in the
2252 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2253 * can respond to requests. */
2254 pci_set_master(efx->pci_dev);
2257 /* Leave device stopped if necessary */
2259 method == RESET_TYPE_DISABLE ||
2260 method == RESET_TYPE_RECOVER_OR_DISABLE;
2261 rc2 = efx_reset_up(efx, method, !disabled);
2269 dev_close(efx->net_dev);
2270 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2271 efx->state = STATE_DISABLED;
2273 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2274 netif_device_attach(efx->net_dev);
2279 /* Try recovery mechanisms.
2280 * For now only EEH is supported.
2281 * Returns 0 if the recovery mechanisms are unsuccessful.
2282 * Returns a non-zero value otherwise.
2284 int efx_try_recovery(struct efx_nic *efx)
2287 /* A PCI error can occur and not be seen by EEH because nothing
2288 * happens on the PCI bus. In this case the driver may fail and
2289 * schedule a 'recover or reset', leading to this recovery handler.
2290 * Manually call the eeh failure check function.
2292 struct eeh_dev *eehdev =
2293 of_node_to_eeh_dev(pci_device_to_OF_node(efx->pci_dev));
2295 if (eeh_dev_check_failure(eehdev)) {
2296 /* The EEH mechanisms will handle the error and reset the
2297 * device if necessary.
2305 /* The worker thread exists so that code that cannot sleep can
2306 * schedule a reset for later.
2308 static void efx_reset_work(struct work_struct *data)
2310 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2311 unsigned long pending;
2312 enum reset_type method;
2314 pending = ACCESS_ONCE(efx->reset_pending);
2315 method = fls(pending) - 1;
2317 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2318 method == RESET_TYPE_RECOVER_OR_ALL) &&
2319 efx_try_recovery(efx))
2327 /* We checked the state in efx_schedule_reset() but it may
2328 * have changed by now. Now that we have the RTNL lock,
2329 * it cannot change again.
2331 if (efx->state == STATE_READY)
2332 (void)efx_reset(efx, method);
2337 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2339 enum reset_type method;
2341 if (efx->state == STATE_RECOVERY) {
2342 netif_dbg(efx, drv, efx->net_dev,
2343 "recovering: skip scheduling %s reset\n",
2349 case RESET_TYPE_INVISIBLE:
2350 case RESET_TYPE_ALL:
2351 case RESET_TYPE_RECOVER_OR_ALL:
2352 case RESET_TYPE_WORLD:
2353 case RESET_TYPE_DISABLE:
2354 case RESET_TYPE_RECOVER_OR_DISABLE:
2356 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2357 RESET_TYPE(method));
2360 method = efx->type->map_reset_reason(type);
2361 netif_dbg(efx, drv, efx->net_dev,
2362 "scheduling %s reset for %s\n",
2363 RESET_TYPE(method), RESET_TYPE(type));
2367 set_bit(method, &efx->reset_pending);
2368 smp_mb(); /* ensure we change reset_pending before checking state */
2370 /* If we're not READY then just leave the flags set as the cue
2371 * to abort probing or reschedule the reset later.
2373 if (ACCESS_ONCE(efx->state) != STATE_READY)
2376 /* efx_process_channel() will no longer read events once a
2377 * reset is scheduled. So switch back to poll'd MCDI completions. */
2378 efx_mcdi_mode_poll(efx);
2380 queue_work(reset_workqueue, &efx->reset_work);
2383 /**************************************************************************
2385 * List of NICs we support
2387 **************************************************************************/
2389 /* PCI device ID table */
2390 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2391 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2392 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2393 .driver_data = (unsigned long) &falcon_a1_nic_type},
2394 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2395 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2396 .driver_data = (unsigned long) &falcon_b0_nic_type},
2397 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2398 .driver_data = (unsigned long) &siena_a0_nic_type},
2399 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2400 .driver_data = (unsigned long) &siena_a0_nic_type},
2401 {0} /* end of list */
2404 /**************************************************************************
2406 * Dummy PHY/MAC operations
2408 * Can be used for some unimplemented operations
2409 * Needed so all function pointers are valid and do not have to be tested
2412 **************************************************************************/
2413 int efx_port_dummy_op_int(struct efx_nic *efx)
2417 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2419 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2424 static const struct efx_phy_operations efx_dummy_phy_operations = {
2425 .init = efx_port_dummy_op_int,
2426 .reconfigure = efx_port_dummy_op_int,
2427 .poll = efx_port_dummy_op_poll,
2428 .fini = efx_port_dummy_op_void,
2431 /**************************************************************************
2435 **************************************************************************/
2437 /* This zeroes out and then fills in the invariants in a struct
2438 * efx_nic (including all sub-structures).
2440 static int efx_init_struct(struct efx_nic *efx,
2441 struct pci_dev *pci_dev, struct net_device *net_dev)
2445 /* Initialise common structures */
2446 spin_lock_init(&efx->biu_lock);
2447 #ifdef CONFIG_SFC_MTD
2448 INIT_LIST_HEAD(&efx->mtd_list);
2450 INIT_WORK(&efx->reset_work, efx_reset_work);
2451 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2452 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2453 efx->pci_dev = pci_dev;
2454 efx->msg_enable = debug;
2455 efx->state = STATE_UNINIT;
2456 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2458 efx->net_dev = net_dev;
2459 efx->rx_prefix_size = efx->type->rx_prefix_size;
2460 efx->rx_packet_hash_offset =
2461 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
2462 spin_lock_init(&efx->stats_lock);
2463 mutex_init(&efx->mac_lock);
2464 efx->phy_op = &efx_dummy_phy_operations;
2465 efx->mdio.dev = net_dev;
2466 INIT_WORK(&efx->mac_work, efx_mac_work);
2467 init_waitqueue_head(&efx->flush_wq);
2469 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2470 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2471 if (!efx->channel[i])
2473 efx->msi_context[i].efx = efx;
2474 efx->msi_context[i].index = i;
2477 /* Higher numbered interrupt modes are less capable! */
2478 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2481 /* Would be good to use the net_dev name, but we're too early */
2482 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2484 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2485 if (!efx->workqueue)
2491 efx_fini_struct(efx);
2495 static void efx_fini_struct(struct efx_nic *efx)
2499 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2500 kfree(efx->channel[i]);
2502 if (efx->workqueue) {
2503 destroy_workqueue(efx->workqueue);
2504 efx->workqueue = NULL;
2508 /**************************************************************************
2512 **************************************************************************/
2514 /* Main body of final NIC shutdown code
2515 * This is called only at module unload (or hotplug removal).
2517 static void efx_pci_remove_main(struct efx_nic *efx)
2519 /* Flush reset_work. It can no longer be scheduled since we
2522 BUG_ON(efx->state == STATE_READY);
2523 cancel_work_sync(&efx->reset_work);
2525 efx_disable_interrupts(efx);
2526 efx_nic_fini_interrupt(efx);
2528 efx->type->fini(efx);
2530 efx_remove_all(efx);
2533 /* Final NIC shutdown
2534 * This is called only at module unload (or hotplug removal).
2536 static void efx_pci_remove(struct pci_dev *pci_dev)
2538 struct efx_nic *efx;
2540 efx = pci_get_drvdata(pci_dev);
2544 /* Mark the NIC as fini, then stop the interface */
2546 dev_close(efx->net_dev);
2547 efx_disable_interrupts(efx);
2550 efx_sriov_fini(efx);
2551 efx_unregister_netdev(efx);
2553 efx_mtd_remove(efx);
2555 efx_pci_remove_main(efx);
2558 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2560 efx_fini_struct(efx);
2561 pci_set_drvdata(pci_dev, NULL);
2562 free_netdev(efx->net_dev);
2564 pci_disable_pcie_error_reporting(pci_dev);
2567 /* NIC VPD information
2568 * Called during probe to display the part number of the
2569 * installed NIC. VPD is potentially very large but this should
2570 * always appear within the first 512 bytes.
2572 #define SFC_VPD_LEN 512
2573 static void efx_print_product_vpd(struct efx_nic *efx)
2575 struct pci_dev *dev = efx->pci_dev;
2576 char vpd_data[SFC_VPD_LEN];
2580 /* Get the vpd data from the device */
2581 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2582 if (vpd_size <= 0) {
2583 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2587 /* Get the Read only section */
2588 i = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
2590 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
2594 j = pci_vpd_lrdt_size(&vpd_data[i]);
2595 i += PCI_VPD_LRDT_TAG_SIZE;
2596 if (i + j > vpd_size)
2599 /* Get the Part number */
2600 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
2602 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
2606 j = pci_vpd_info_field_size(&vpd_data[i]);
2607 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2608 if (i + j > vpd_size) {
2609 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
2613 netif_info(efx, drv, efx->net_dev,
2614 "Part Number : %.*s\n", j, &vpd_data[i]);
2618 /* Main body of NIC initialisation
2619 * This is called at module load (or hotplug insertion, theoretically).
2621 static int efx_pci_probe_main(struct efx_nic *efx)
2625 /* Do start-of-day initialisation */
2626 rc = efx_probe_all(efx);
2632 rc = efx->type->init(efx);
2634 netif_err(efx, probe, efx->net_dev,
2635 "failed to initialise NIC\n");
2639 rc = efx_init_port(efx);
2641 netif_err(efx, probe, efx->net_dev,
2642 "failed to initialise port\n");
2646 rc = efx_nic_init_interrupt(efx);
2649 efx_enable_interrupts(efx);
2656 efx->type->fini(efx);
2659 efx_remove_all(efx);
2664 /* NIC initialisation
2666 * This is called at module load (or hotplug insertion,
2667 * theoretically). It sets up PCI mappings, resets the NIC,
2668 * sets up and registers the network devices with the kernel and hooks
2669 * the interrupt service routine. It does not prepare the device for
2670 * transmission; this is left to the first time one of the network
2671 * interfaces is brought up (i.e. efx_net_open).
2673 static int efx_pci_probe(struct pci_dev *pci_dev,
2674 const struct pci_device_id *entry)
2676 struct net_device *net_dev;
2677 struct efx_nic *efx;
2680 /* Allocate and initialise a struct net_device and struct efx_nic */
2681 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2685 efx = netdev_priv(net_dev);
2686 efx->type = (const struct efx_nic_type *) entry->driver_data;
2687 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
2688 NETIF_F_HIGHDMA | NETIF_F_TSO |
2690 if (efx->type->offload_features & NETIF_F_V6_CSUM)
2691 net_dev->features |= NETIF_F_TSO6;
2692 /* Mask for features that also apply to VLAN devices */
2693 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2694 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2696 /* All offloads can be toggled */
2697 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2698 pci_set_drvdata(pci_dev, efx);
2699 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2700 rc = efx_init_struct(efx, pci_dev, net_dev);
2704 netif_info(efx, probe, efx->net_dev,
2705 "Solarflare NIC detected\n");
2707 efx_print_product_vpd(efx);
2709 /* Set up basic I/O (BAR mappings etc) */
2710 rc = efx_init_io(efx);
2714 rc = efx_pci_probe_main(efx);
2718 rc = efx_register_netdev(efx);
2722 rc = efx_sriov_init(efx);
2724 netif_err(efx, probe, efx->net_dev,
2725 "SR-IOV can't be enabled rc %d\n", rc);
2727 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2729 /* Try to create MTDs, but allow this to fail */
2731 rc = efx_mtd_probe(efx);
2734 netif_warn(efx, probe, efx->net_dev,
2735 "failed to create MTDs (%d)\n", rc);
2737 rc = pci_enable_pcie_error_reporting(pci_dev);
2738 if (rc && rc != -EINVAL)
2739 netif_warn(efx, probe, efx->net_dev,
2740 "pci_enable_pcie_error_reporting failed (%d)\n", rc);
2745 efx_pci_remove_main(efx);
2749 efx_fini_struct(efx);
2751 pci_set_drvdata(pci_dev, NULL);
2753 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2754 free_netdev(net_dev);
2758 static int efx_pm_freeze(struct device *dev)
2760 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2764 if (efx->state != STATE_DISABLED) {
2765 efx->state = STATE_UNINIT;
2767 efx_device_detach_sync(efx);
2770 efx_disable_interrupts(efx);
2778 static int efx_pm_thaw(struct device *dev)
2780 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2784 if (efx->state != STATE_DISABLED) {
2785 efx_enable_interrupts(efx);
2787 mutex_lock(&efx->mac_lock);
2788 efx->phy_op->reconfigure(efx);
2789 mutex_unlock(&efx->mac_lock);
2793 netif_device_attach(efx->net_dev);
2795 efx->state = STATE_READY;
2797 efx->type->resume_wol(efx);
2802 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2803 queue_work(reset_workqueue, &efx->reset_work);
2808 static int efx_pm_poweroff(struct device *dev)
2810 struct pci_dev *pci_dev = to_pci_dev(dev);
2811 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2813 efx->type->fini(efx);
2815 efx->reset_pending = 0;
2817 pci_save_state(pci_dev);
2818 return pci_set_power_state(pci_dev, PCI_D3hot);
2821 /* Used for both resume and restore */
2822 static int efx_pm_resume(struct device *dev)
2824 struct pci_dev *pci_dev = to_pci_dev(dev);
2825 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2828 rc = pci_set_power_state(pci_dev, PCI_D0);
2831 pci_restore_state(pci_dev);
2832 rc = pci_enable_device(pci_dev);
2835 pci_set_master(efx->pci_dev);
2836 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2839 rc = efx->type->init(efx);
2846 static int efx_pm_suspend(struct device *dev)
2851 rc = efx_pm_poweroff(dev);
2857 static const struct dev_pm_ops efx_pm_ops = {
2858 .suspend = efx_pm_suspend,
2859 .resume = efx_pm_resume,
2860 .freeze = efx_pm_freeze,
2861 .thaw = efx_pm_thaw,
2862 .poweroff = efx_pm_poweroff,
2863 .restore = efx_pm_resume,
2866 /* A PCI error affecting this device was detected.
2867 * At this point MMIO and DMA may be disabled.
2868 * Stop the software path and request a slot reset.
2870 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
2871 enum pci_channel_state state)
2873 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
2874 struct efx_nic *efx = pci_get_drvdata(pdev);
2876 if (state == pci_channel_io_perm_failure)
2877 return PCI_ERS_RESULT_DISCONNECT;
2881 if (efx->state != STATE_DISABLED) {
2882 efx->state = STATE_RECOVERY;
2883 efx->reset_pending = 0;
2885 efx_device_detach_sync(efx);
2888 efx_disable_interrupts(efx);
2890 status = PCI_ERS_RESULT_NEED_RESET;
2892 /* If the interface is disabled we don't want to do anything
2895 status = PCI_ERS_RESULT_RECOVERED;
2900 pci_disable_device(pdev);
2905 /* Fake a successfull reset, which will be performed later in efx_io_resume. */
2906 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
2908 struct efx_nic *efx = pci_get_drvdata(pdev);
2909 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
2912 if (pci_enable_device(pdev)) {
2913 netif_err(efx, hw, efx->net_dev,
2914 "Cannot re-enable PCI device after reset.\n");
2915 status = PCI_ERS_RESULT_DISCONNECT;
2918 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
2920 netif_err(efx, hw, efx->net_dev,
2921 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
2922 /* Non-fatal error. Continue. */
2928 /* Perform the actual reset and resume I/O operations. */
2929 static void efx_io_resume(struct pci_dev *pdev)
2931 struct efx_nic *efx = pci_get_drvdata(pdev);
2936 if (efx->state == STATE_DISABLED)
2939 rc = efx_reset(efx, RESET_TYPE_ALL);
2941 netif_err(efx, hw, efx->net_dev,
2942 "efx_reset failed after PCI error (%d)\n", rc);
2944 efx->state = STATE_READY;
2945 netif_dbg(efx, hw, efx->net_dev,
2946 "Done resetting and resuming IO after PCI error.\n");
2953 /* For simplicity and reliability, we always require a slot reset and try to
2954 * reset the hardware when a pci error affecting the device is detected.
2955 * We leave both the link_reset and mmio_enabled callback unimplemented:
2956 * with our request for slot reset the mmio_enabled callback will never be
2957 * called, and the link_reset callback is not used by AER or EEH mechanisms.
2959 static struct pci_error_handlers efx_err_handlers = {
2960 .error_detected = efx_io_error_detected,
2961 .slot_reset = efx_io_slot_reset,
2962 .resume = efx_io_resume,
2965 static struct pci_driver efx_pci_driver = {
2966 .name = KBUILD_MODNAME,
2967 .id_table = efx_pci_table,
2968 .probe = efx_pci_probe,
2969 .remove = efx_pci_remove,
2970 .driver.pm = &efx_pm_ops,
2971 .err_handler = &efx_err_handlers,
2974 /**************************************************************************
2976 * Kernel module interface
2978 *************************************************************************/
2980 module_param(interrupt_mode, uint, 0444);
2981 MODULE_PARM_DESC(interrupt_mode,
2982 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2984 static int __init efx_init_module(void)
2988 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2990 rc = register_netdevice_notifier(&efx_netdev_notifier);
2994 rc = efx_init_sriov();
2998 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2999 if (!reset_workqueue) {
3004 rc = pci_register_driver(&efx_pci_driver);
3011 destroy_workqueue(reset_workqueue);
3015 unregister_netdevice_notifier(&efx_netdev_notifier);
3020 static void __exit efx_exit_module(void)
3022 printk(KERN_INFO "Solarflare NET driver unloading\n");
3024 pci_unregister_driver(&efx_pci_driver);
3025 destroy_workqueue(reset_workqueue);
3027 unregister_netdevice_notifier(&efx_netdev_notifier);
3031 module_init(efx_init_module);
3032 module_exit(efx_exit_module);
3034 MODULE_AUTHOR("Solarflare Communications and "
3035 "Michael Brown <mbrown@fensystems.co.uk>");
3036 MODULE_DESCRIPTION("Solarflare Communications network driver");
3037 MODULE_LICENSE("GPL");
3038 MODULE_DEVICE_TABLE(pci, efx_pci_table);