1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/ethtool.h>
21 #include <linux/topology.h>
22 #include <linux/gfp.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include "net_driver.h"
32 #include "workarounds.h"
34 /**************************************************************************
38 **************************************************************************
41 /* Loopback mode names (see LOOPBACK_MODE()) */
42 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
43 const char *const efx_loopback_mode_names[] = {
44 [LOOPBACK_NONE] = "NONE",
45 [LOOPBACK_DATA] = "DATAPATH",
46 [LOOPBACK_GMAC] = "GMAC",
47 [LOOPBACK_XGMII] = "XGMII",
48 [LOOPBACK_XGXS] = "XGXS",
49 [LOOPBACK_XAUI] = "XAUI",
50 [LOOPBACK_GMII] = "GMII",
51 [LOOPBACK_SGMII] = "SGMII",
52 [LOOPBACK_XGBR] = "XGBR",
53 [LOOPBACK_XFI] = "XFI",
54 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
55 [LOOPBACK_GMII_FAR] = "GMII_FAR",
56 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
57 [LOOPBACK_XFI_FAR] = "XFI_FAR",
58 [LOOPBACK_GPHY] = "GPHY",
59 [LOOPBACK_PHYXS] = "PHYXS",
60 [LOOPBACK_PCS] = "PCS",
61 [LOOPBACK_PMAPMD] = "PMA/PMD",
62 [LOOPBACK_XPORT] = "XPORT",
63 [LOOPBACK_XGMII_WS] = "XGMII_WS",
64 [LOOPBACK_XAUI_WS] = "XAUI_WS",
65 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
66 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
67 [LOOPBACK_GMII_WS] = "GMII_WS",
68 [LOOPBACK_XFI_WS] = "XFI_WS",
69 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
70 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
73 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
74 const char *const efx_reset_type_names[] = {
75 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
76 [RESET_TYPE_ALL] = "ALL",
77 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
78 [RESET_TYPE_WORLD] = "WORLD",
79 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
80 [RESET_TYPE_MC_BIST] = "MC_BIST",
81 [RESET_TYPE_DISABLE] = "DISABLE",
82 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
83 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
84 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
85 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
86 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
87 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
88 [RESET_TYPE_MCDI_TIMEOUT] = "MCDI_TIMEOUT (FLR)",
91 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
92 * queued onto this work queue. This is not a per-nic work queue, because
93 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
95 static struct workqueue_struct *reset_workqueue;
97 /* How often and how many times to poll for a reset while waiting for a
98 * BIST that another function started to complete.
100 #define BIST_WAIT_DELAY_MS 100
101 #define BIST_WAIT_DELAY_COUNT 100
103 /**************************************************************************
105 * Configurable values
107 *************************************************************************/
110 * Use separate channels for TX and RX events
112 * Set this to 1 to use separate channels for TX and RX. It allows us
113 * to control interrupt affinity separately for TX and RX.
115 * This is only used in MSI-X interrupt mode
117 static bool separate_tx_channels;
118 module_param(separate_tx_channels, bool, 0444);
119 MODULE_PARM_DESC(separate_tx_channels,
120 "Use separate channels for TX and RX");
122 /* This is the weight assigned to each of the (per-channel) virtual
125 static int napi_weight = 64;
127 /* This is the time (in jiffies) between invocations of the hardware
129 * On Falcon-based NICs, this will:
130 * - Check the on-board hardware monitor;
131 * - Poll the link state and reconfigure the hardware as necessary.
132 * On Siena-based NICs for power systems with EEH support, this will give EEH a
135 static unsigned int efx_monitor_interval = 1 * HZ;
137 /* Initial interrupt moderation settings. They can be modified after
138 * module load with ethtool.
140 * The default for RX should strike a balance between increasing the
141 * round-trip latency and reducing overhead.
143 static unsigned int rx_irq_mod_usec = 60;
145 /* Initial interrupt moderation settings. They can be modified after
146 * module load with ethtool.
148 * This default is chosen to ensure that a 10G link does not go idle
149 * while a TX queue is stopped after it has become full. A queue is
150 * restarted when it drops below half full. The time this takes (assuming
151 * worst case 3 descriptors per packet and 1024 descriptors) is
152 * 512 / 3 * 1.2 = 205 usec.
154 static unsigned int tx_irq_mod_usec = 150;
156 /* This is the first interrupt mode to try out of:
161 static unsigned int interrupt_mode;
163 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
164 * i.e. the number of CPUs among which we may distribute simultaneous
165 * interrupt handling.
167 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
168 * The default (0) means to assign an interrupt to each core.
170 static unsigned int rss_cpus;
171 module_param(rss_cpus, uint, 0444);
172 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
174 static bool phy_flash_cfg;
175 module_param(phy_flash_cfg, bool, 0644);
176 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
178 static unsigned irq_adapt_low_thresh = 8000;
179 module_param(irq_adapt_low_thresh, uint, 0644);
180 MODULE_PARM_DESC(irq_adapt_low_thresh,
181 "Threshold score for reducing IRQ moderation");
183 static unsigned irq_adapt_high_thresh = 16000;
184 module_param(irq_adapt_high_thresh, uint, 0644);
185 MODULE_PARM_DESC(irq_adapt_high_thresh,
186 "Threshold score for increasing IRQ moderation");
188 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
189 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
190 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
191 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
192 module_param(debug, uint, 0);
193 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
195 /**************************************************************************
197 * Utility functions and prototypes
199 *************************************************************************/
201 static int efx_soft_enable_interrupts(struct efx_nic *efx);
202 static void efx_soft_disable_interrupts(struct efx_nic *efx);
203 static void efx_remove_channel(struct efx_channel *channel);
204 static void efx_remove_channels(struct efx_nic *efx);
205 static const struct efx_channel_type efx_default_channel_type;
206 static void efx_remove_port(struct efx_nic *efx);
207 static void efx_init_napi_channel(struct efx_channel *channel);
208 static void efx_fini_napi(struct efx_nic *efx);
209 static void efx_fini_napi_channel(struct efx_channel *channel);
210 static void efx_fini_struct(struct efx_nic *efx);
211 static void efx_start_all(struct efx_nic *efx);
212 static void efx_stop_all(struct efx_nic *efx);
214 #define EFX_ASSERT_RESET_SERIALISED(efx) \
216 if ((efx->state == STATE_READY) || \
217 (efx->state == STATE_RECOVERY) || \
218 (efx->state == STATE_DISABLED)) \
222 static int efx_check_disabled(struct efx_nic *efx)
224 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
225 netif_err(efx, drv, efx->net_dev,
226 "device is disabled due to earlier errors\n");
232 /**************************************************************************
234 * Event queue processing
236 *************************************************************************/
238 /* Process channel's event queue
240 * This function is responsible for processing the event queue of a
241 * single channel. The caller must guarantee that this function will
242 * never be concurrently called more than once on the same channel,
243 * though different channels may be being processed concurrently.
245 static int efx_process_channel(struct efx_channel *channel, int budget)
249 if (unlikely(!channel->enabled))
252 spent = efx_nic_process_eventq(channel, budget);
253 if (spent && efx_channel_has_rx_queue(channel)) {
254 struct efx_rx_queue *rx_queue =
255 efx_channel_get_rx_queue(channel);
257 efx_rx_flush_packet(channel);
258 efx_fast_push_rx_descriptors(rx_queue, true);
266 * NAPI guarantees serialisation of polls of the same device, which
267 * provides the guarantee required by efx_process_channel().
269 static int efx_poll(struct napi_struct *napi, int budget)
271 struct efx_channel *channel =
272 container_of(napi, struct efx_channel, napi_str);
273 struct efx_nic *efx = channel->efx;
276 if (!efx_channel_lock_napi(channel))
279 netif_vdbg(efx, intr, efx->net_dev,
280 "channel %d NAPI poll executing on CPU %d\n",
281 channel->channel, raw_smp_processor_id());
283 spent = efx_process_channel(channel, budget);
285 if (spent < budget) {
286 if (efx_channel_has_rx_queue(channel) &&
287 efx->irq_rx_adaptive &&
288 unlikely(++channel->irq_count == 1000)) {
289 if (unlikely(channel->irq_mod_score <
290 irq_adapt_low_thresh)) {
291 if (channel->irq_moderation > 1) {
292 channel->irq_moderation -= 1;
293 efx->type->push_irq_moderation(channel);
295 } else if (unlikely(channel->irq_mod_score >
296 irq_adapt_high_thresh)) {
297 if (channel->irq_moderation <
298 efx->irq_rx_moderation) {
299 channel->irq_moderation += 1;
300 efx->type->push_irq_moderation(channel);
303 channel->irq_count = 0;
304 channel->irq_mod_score = 0;
307 efx_filter_rfs_expire(channel);
309 /* There is no race here; although napi_disable() will
310 * only wait for napi_complete(), this isn't a problem
311 * since efx_nic_eventq_read_ack() will have no effect if
312 * interrupts have already been disabled.
315 efx_nic_eventq_read_ack(channel);
318 efx_channel_unlock_napi(channel);
322 /* Create event queue
323 * Event queue memory allocations are done only once. If the channel
324 * is reset, the memory buffer will be reused; this guards against
325 * errors during channel reset and also simplifies interrupt handling.
327 static int efx_probe_eventq(struct efx_channel *channel)
329 struct efx_nic *efx = channel->efx;
330 unsigned long entries;
332 netif_dbg(efx, probe, efx->net_dev,
333 "chan %d create event queue\n", channel->channel);
335 /* Build an event queue with room for one event per tx and rx buffer,
336 * plus some extra for link state events and MCDI completions. */
337 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
338 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
339 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
341 return efx_nic_probe_eventq(channel);
344 /* Prepare channel's event queue */
345 static int efx_init_eventq(struct efx_channel *channel)
347 struct efx_nic *efx = channel->efx;
350 EFX_WARN_ON_PARANOID(channel->eventq_init);
352 netif_dbg(efx, drv, efx->net_dev,
353 "chan %d init event queue\n", channel->channel);
355 rc = efx_nic_init_eventq(channel);
357 efx->type->push_irq_moderation(channel);
358 channel->eventq_read_ptr = 0;
359 channel->eventq_init = true;
364 /* Enable event queue processing and NAPI */
365 void efx_start_eventq(struct efx_channel *channel)
367 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
368 "chan %d start event queue\n", channel->channel);
370 /* Make sure the NAPI handler sees the enabled flag set */
371 channel->enabled = true;
374 efx_channel_enable(channel);
375 napi_enable(&channel->napi_str);
376 efx_nic_eventq_read_ack(channel);
379 /* Disable event queue processing and NAPI */
380 void efx_stop_eventq(struct efx_channel *channel)
382 if (!channel->enabled)
385 napi_disable(&channel->napi_str);
386 while (!efx_channel_disable(channel))
387 usleep_range(1000, 20000);
388 channel->enabled = false;
391 static void efx_fini_eventq(struct efx_channel *channel)
393 if (!channel->eventq_init)
396 netif_dbg(channel->efx, drv, channel->efx->net_dev,
397 "chan %d fini event queue\n", channel->channel);
399 efx_nic_fini_eventq(channel);
400 channel->eventq_init = false;
403 static void efx_remove_eventq(struct efx_channel *channel)
405 netif_dbg(channel->efx, drv, channel->efx->net_dev,
406 "chan %d remove event queue\n", channel->channel);
408 efx_nic_remove_eventq(channel);
411 /**************************************************************************
415 *************************************************************************/
417 /* Allocate and initialise a channel structure. */
418 static struct efx_channel *
419 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
421 struct efx_channel *channel;
422 struct efx_rx_queue *rx_queue;
423 struct efx_tx_queue *tx_queue;
426 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
431 channel->channel = i;
432 channel->type = &efx_default_channel_type;
434 for (j = 0; j < EFX_TXQ_TYPES; j++) {
435 tx_queue = &channel->tx_queue[j];
437 tx_queue->queue = i * EFX_TXQ_TYPES + j;
438 tx_queue->channel = channel;
441 rx_queue = &channel->rx_queue;
443 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
444 (unsigned long)rx_queue);
449 /* Allocate and initialise a channel structure, copying parameters
450 * (but not resources) from an old channel structure.
452 static struct efx_channel *
453 efx_copy_channel(const struct efx_channel *old_channel)
455 struct efx_channel *channel;
456 struct efx_rx_queue *rx_queue;
457 struct efx_tx_queue *tx_queue;
460 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
464 *channel = *old_channel;
466 channel->napi_dev = NULL;
467 memset(&channel->eventq, 0, sizeof(channel->eventq));
469 for (j = 0; j < EFX_TXQ_TYPES; j++) {
470 tx_queue = &channel->tx_queue[j];
471 if (tx_queue->channel)
472 tx_queue->channel = channel;
473 tx_queue->buffer = NULL;
474 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
477 rx_queue = &channel->rx_queue;
478 rx_queue->buffer = NULL;
479 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
480 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
481 (unsigned long)rx_queue);
486 static int efx_probe_channel(struct efx_channel *channel)
488 struct efx_tx_queue *tx_queue;
489 struct efx_rx_queue *rx_queue;
492 netif_dbg(channel->efx, probe, channel->efx->net_dev,
493 "creating channel %d\n", channel->channel);
495 rc = channel->type->pre_probe(channel);
499 rc = efx_probe_eventq(channel);
503 efx_for_each_channel_tx_queue(tx_queue, channel) {
504 rc = efx_probe_tx_queue(tx_queue);
509 efx_for_each_channel_rx_queue(rx_queue, channel) {
510 rc = efx_probe_rx_queue(rx_queue);
518 efx_remove_channel(channel);
523 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
525 struct efx_nic *efx = channel->efx;
529 number = channel->channel;
530 if (efx->tx_channel_offset == 0) {
532 } else if (channel->channel < efx->tx_channel_offset) {
536 number -= efx->tx_channel_offset;
538 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
541 static void efx_set_channel_names(struct efx_nic *efx)
543 struct efx_channel *channel;
545 efx_for_each_channel(channel, efx)
546 channel->type->get_name(channel,
547 efx->msi_context[channel->channel].name,
548 sizeof(efx->msi_context[0].name));
551 static int efx_probe_channels(struct efx_nic *efx)
553 struct efx_channel *channel;
556 /* Restart special buffer allocation */
557 efx->next_buffer_table = 0;
559 /* Probe channels in reverse, so that any 'extra' channels
560 * use the start of the buffer table. This allows the traffic
561 * channels to be resized without moving them or wasting the
562 * entries before them.
564 efx_for_each_channel_rev(channel, efx) {
565 rc = efx_probe_channel(channel);
567 netif_err(efx, probe, efx->net_dev,
568 "failed to create channel %d\n",
573 efx_set_channel_names(efx);
578 efx_remove_channels(efx);
582 /* Channels are shutdown and reinitialised whilst the NIC is running
583 * to propagate configuration changes (mtu, checksum offload), or
584 * to clear hardware error conditions
586 static void efx_start_datapath(struct efx_nic *efx)
588 bool old_rx_scatter = efx->rx_scatter;
589 struct efx_tx_queue *tx_queue;
590 struct efx_rx_queue *rx_queue;
591 struct efx_channel *channel;
594 /* Calculate the rx buffer allocation parameters required to
595 * support the current MTU, including padding for header
596 * alignment and overruns.
598 efx->rx_dma_len = (efx->rx_prefix_size +
599 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
600 efx->type->rx_buffer_padding);
601 rx_buf_len = (sizeof(struct efx_rx_page_state) +
602 efx->rx_ip_align + efx->rx_dma_len);
603 if (rx_buf_len <= PAGE_SIZE) {
604 efx->rx_scatter = efx->type->always_rx_scatter;
605 efx->rx_buffer_order = 0;
606 } else if (efx->type->can_rx_scatter) {
607 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
608 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
609 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
610 EFX_RX_BUF_ALIGNMENT) >
612 efx->rx_scatter = true;
613 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
614 efx->rx_buffer_order = 0;
616 efx->rx_scatter = false;
617 efx->rx_buffer_order = get_order(rx_buf_len);
620 efx_rx_config_page_split(efx);
621 if (efx->rx_buffer_order)
622 netif_dbg(efx, drv, efx->net_dev,
623 "RX buf len=%u; page order=%u batch=%u\n",
624 efx->rx_dma_len, efx->rx_buffer_order,
625 efx->rx_pages_per_batch);
627 netif_dbg(efx, drv, efx->net_dev,
628 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
629 efx->rx_dma_len, efx->rx_page_buf_step,
630 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
632 /* RX filters may also have scatter-enabled flags */
633 if (efx->rx_scatter != old_rx_scatter)
634 efx->type->filter_update_rx_scatter(efx);
636 /* We must keep at least one descriptor in a TX ring empty.
637 * We could avoid this when the queue size does not exactly
638 * match the hardware ring size, but it's not that important.
639 * Therefore we stop the queue when one more skb might fill
640 * the ring completely. We wake it when half way back to
643 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
644 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
646 /* Initialise the channels */
647 efx_for_each_channel(channel, efx) {
648 efx_for_each_channel_tx_queue(tx_queue, channel) {
649 efx_init_tx_queue(tx_queue);
650 atomic_inc(&efx->active_queues);
653 efx_for_each_channel_rx_queue(rx_queue, channel) {
654 efx_init_rx_queue(rx_queue);
655 atomic_inc(&efx->active_queues);
656 efx_stop_eventq(channel);
657 efx_fast_push_rx_descriptors(rx_queue, false);
658 efx_start_eventq(channel);
661 WARN_ON(channel->rx_pkt_n_frags);
664 efx_ptp_start_datapath(efx);
666 if (netif_device_present(efx->net_dev))
667 netif_tx_wake_all_queues(efx->net_dev);
670 static void efx_stop_datapath(struct efx_nic *efx)
672 struct efx_channel *channel;
673 struct efx_tx_queue *tx_queue;
674 struct efx_rx_queue *rx_queue;
677 EFX_ASSERT_RESET_SERIALISED(efx);
678 BUG_ON(efx->port_enabled);
680 efx_ptp_stop_datapath(efx);
683 efx_for_each_channel(channel, efx) {
684 efx_for_each_channel_rx_queue(rx_queue, channel)
685 rx_queue->refill_enabled = false;
688 efx_for_each_channel(channel, efx) {
689 /* RX packet processing is pipelined, so wait for the
690 * NAPI handler to complete. At least event queue 0
691 * might be kept active by non-data events, so don't
692 * use napi_synchronize() but actually disable NAPI
695 if (efx_channel_has_rx_queue(channel)) {
696 efx_stop_eventq(channel);
697 efx_start_eventq(channel);
701 rc = efx->type->fini_dmaq(efx);
702 if (rc && EFX_WORKAROUND_7803(efx)) {
703 /* Schedule a reset to recover from the flush failure. The
704 * descriptor caches reference memory we're about to free,
705 * but falcon_reconfigure_mac_wrapper() won't reconnect
706 * the MACs because of the pending reset.
708 netif_err(efx, drv, efx->net_dev,
709 "Resetting to recover from flush failure\n");
710 efx_schedule_reset(efx, RESET_TYPE_ALL);
712 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
714 netif_dbg(efx, drv, efx->net_dev,
715 "successfully flushed all queues\n");
718 efx_for_each_channel(channel, efx) {
719 efx_for_each_channel_rx_queue(rx_queue, channel)
720 efx_fini_rx_queue(rx_queue);
721 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
722 efx_fini_tx_queue(tx_queue);
726 static void efx_remove_channel(struct efx_channel *channel)
728 struct efx_tx_queue *tx_queue;
729 struct efx_rx_queue *rx_queue;
731 netif_dbg(channel->efx, drv, channel->efx->net_dev,
732 "destroy chan %d\n", channel->channel);
734 efx_for_each_channel_rx_queue(rx_queue, channel)
735 efx_remove_rx_queue(rx_queue);
736 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
737 efx_remove_tx_queue(tx_queue);
738 efx_remove_eventq(channel);
739 channel->type->post_remove(channel);
742 static void efx_remove_channels(struct efx_nic *efx)
744 struct efx_channel *channel;
746 efx_for_each_channel(channel, efx)
747 efx_remove_channel(channel);
751 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
753 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
754 u32 old_rxq_entries, old_txq_entries;
755 unsigned i, next_buffer_table = 0;
758 rc = efx_check_disabled(efx);
762 /* Not all channels should be reallocated. We must avoid
763 * reallocating their buffer table entries.
765 efx_for_each_channel(channel, efx) {
766 struct efx_rx_queue *rx_queue;
767 struct efx_tx_queue *tx_queue;
769 if (channel->type->copy)
771 next_buffer_table = max(next_buffer_table,
772 channel->eventq.index +
773 channel->eventq.entries);
774 efx_for_each_channel_rx_queue(rx_queue, channel)
775 next_buffer_table = max(next_buffer_table,
776 rx_queue->rxd.index +
777 rx_queue->rxd.entries);
778 efx_for_each_channel_tx_queue(tx_queue, channel)
779 next_buffer_table = max(next_buffer_table,
780 tx_queue->txd.index +
781 tx_queue->txd.entries);
784 efx_device_detach_sync(efx);
786 efx_soft_disable_interrupts(efx);
788 /* Clone channels (where possible) */
789 memset(other_channel, 0, sizeof(other_channel));
790 for (i = 0; i < efx->n_channels; i++) {
791 channel = efx->channel[i];
792 if (channel->type->copy)
793 channel = channel->type->copy(channel);
798 other_channel[i] = channel;
801 /* Swap entry counts and channel pointers */
802 old_rxq_entries = efx->rxq_entries;
803 old_txq_entries = efx->txq_entries;
804 efx->rxq_entries = rxq_entries;
805 efx->txq_entries = txq_entries;
806 for (i = 0; i < efx->n_channels; i++) {
807 channel = efx->channel[i];
808 efx->channel[i] = other_channel[i];
809 other_channel[i] = channel;
812 /* Restart buffer table allocation */
813 efx->next_buffer_table = next_buffer_table;
815 for (i = 0; i < efx->n_channels; i++) {
816 channel = efx->channel[i];
817 if (!channel->type->copy)
819 rc = efx_probe_channel(channel);
822 efx_init_napi_channel(efx->channel[i]);
826 /* Destroy unused channel structures */
827 for (i = 0; i < efx->n_channels; i++) {
828 channel = other_channel[i];
829 if (channel && channel->type->copy) {
830 efx_fini_napi_channel(channel);
831 efx_remove_channel(channel);
836 rc2 = efx_soft_enable_interrupts(efx);
839 netif_err(efx, drv, efx->net_dev,
840 "unable to restart interrupts on channel reallocation\n");
841 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
844 netif_device_attach(efx->net_dev);
850 efx->rxq_entries = old_rxq_entries;
851 efx->txq_entries = old_txq_entries;
852 for (i = 0; i < efx->n_channels; i++) {
853 channel = efx->channel[i];
854 efx->channel[i] = other_channel[i];
855 other_channel[i] = channel;
860 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
862 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
865 static const struct efx_channel_type efx_default_channel_type = {
866 .pre_probe = efx_channel_dummy_op_int,
867 .post_remove = efx_channel_dummy_op_void,
868 .get_name = efx_get_channel_name,
869 .copy = efx_copy_channel,
870 .keep_eventq = false,
873 int efx_channel_dummy_op_int(struct efx_channel *channel)
878 void efx_channel_dummy_op_void(struct efx_channel *channel)
882 /**************************************************************************
886 **************************************************************************/
888 /* This ensures that the kernel is kept informed (via
889 * netif_carrier_on/off) of the link status, and also maintains the
890 * link status's stop on the port's TX queue.
892 void efx_link_status_changed(struct efx_nic *efx)
894 struct efx_link_state *link_state = &efx->link_state;
896 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
897 * that no events are triggered between unregister_netdev() and the
898 * driver unloading. A more general condition is that NETDEV_CHANGE
899 * can only be generated between NETDEV_UP and NETDEV_DOWN */
900 if (!netif_running(efx->net_dev))
903 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
904 efx->n_link_state_changes++;
907 netif_carrier_on(efx->net_dev);
909 netif_carrier_off(efx->net_dev);
912 /* Status message for kernel log */
914 netif_info(efx, link, efx->net_dev,
915 "link up at %uMbps %s-duplex (MTU %d)\n",
916 link_state->speed, link_state->fd ? "full" : "half",
919 netif_info(efx, link, efx->net_dev, "link down\n");
922 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
924 efx->link_advertising = advertising;
926 if (advertising & ADVERTISED_Pause)
927 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
929 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
930 if (advertising & ADVERTISED_Asym_Pause)
931 efx->wanted_fc ^= EFX_FC_TX;
935 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
937 efx->wanted_fc = wanted_fc;
938 if (efx->link_advertising) {
939 if (wanted_fc & EFX_FC_RX)
940 efx->link_advertising |= (ADVERTISED_Pause |
941 ADVERTISED_Asym_Pause);
943 efx->link_advertising &= ~(ADVERTISED_Pause |
944 ADVERTISED_Asym_Pause);
945 if (wanted_fc & EFX_FC_TX)
946 efx->link_advertising ^= ADVERTISED_Asym_Pause;
950 static void efx_fini_port(struct efx_nic *efx);
952 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
953 * the MAC appropriately. All other PHY configuration changes are pushed
954 * through phy_op->set_settings(), and pushed asynchronously to the MAC
955 * through efx_monitor().
957 * Callers must hold the mac_lock
959 int __efx_reconfigure_port(struct efx_nic *efx)
961 enum efx_phy_mode phy_mode;
964 WARN_ON(!mutex_is_locked(&efx->mac_lock));
966 /* Disable PHY transmit in mac level loopbacks */
967 phy_mode = efx->phy_mode;
968 if (LOOPBACK_INTERNAL(efx))
969 efx->phy_mode |= PHY_MODE_TX_DISABLED;
971 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
973 rc = efx->type->reconfigure_port(efx);
976 efx->phy_mode = phy_mode;
981 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
983 int efx_reconfigure_port(struct efx_nic *efx)
987 EFX_ASSERT_RESET_SERIALISED(efx);
989 mutex_lock(&efx->mac_lock);
990 rc = __efx_reconfigure_port(efx);
991 mutex_unlock(&efx->mac_lock);
996 /* Asynchronous work item for changing MAC promiscuity and multicast
997 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
999 static void efx_mac_work(struct work_struct *data)
1001 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
1003 mutex_lock(&efx->mac_lock);
1004 if (efx->port_enabled)
1005 efx->type->reconfigure_mac(efx);
1006 mutex_unlock(&efx->mac_lock);
1009 static int efx_probe_port(struct efx_nic *efx)
1013 netif_dbg(efx, probe, efx->net_dev, "create port\n");
1016 efx->phy_mode = PHY_MODE_SPECIAL;
1018 /* Connect up MAC/PHY operations table */
1019 rc = efx->type->probe_port(efx);
1023 /* Initialise MAC address to permanent address */
1024 ether_addr_copy(efx->net_dev->dev_addr, efx->net_dev->perm_addr);
1029 static int efx_init_port(struct efx_nic *efx)
1033 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1035 mutex_lock(&efx->mac_lock);
1037 rc = efx->phy_op->init(efx);
1041 efx->port_initialized = true;
1043 /* Reconfigure the MAC before creating dma queues (required for
1044 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1045 efx->type->reconfigure_mac(efx);
1047 /* Ensure the PHY advertises the correct flow control settings */
1048 rc = efx->phy_op->reconfigure(efx);
1049 if (rc && rc != -EPERM)
1052 mutex_unlock(&efx->mac_lock);
1056 efx->phy_op->fini(efx);
1058 mutex_unlock(&efx->mac_lock);
1062 static void efx_start_port(struct efx_nic *efx)
1064 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1065 BUG_ON(efx->port_enabled);
1067 mutex_lock(&efx->mac_lock);
1068 efx->port_enabled = true;
1070 /* Ensure MAC ingress/egress is enabled */
1071 efx->type->reconfigure_mac(efx);
1073 mutex_unlock(&efx->mac_lock);
1076 /* Cancel work for MAC reconfiguration, periodic hardware monitoring
1077 * and the async self-test, wait for them to finish and prevent them
1078 * being scheduled again. This doesn't cover online resets, which
1079 * should only be cancelled when removing the device.
1081 static void efx_stop_port(struct efx_nic *efx)
1083 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1085 EFX_ASSERT_RESET_SERIALISED(efx);
1087 mutex_lock(&efx->mac_lock);
1088 efx->port_enabled = false;
1089 mutex_unlock(&efx->mac_lock);
1091 /* Serialise against efx_set_multicast_list() */
1092 netif_addr_lock_bh(efx->net_dev);
1093 netif_addr_unlock_bh(efx->net_dev);
1095 cancel_delayed_work_sync(&efx->monitor_work);
1096 efx_selftest_async_cancel(efx);
1097 cancel_work_sync(&efx->mac_work);
1100 static void efx_fini_port(struct efx_nic *efx)
1102 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1104 if (!efx->port_initialized)
1107 efx->phy_op->fini(efx);
1108 efx->port_initialized = false;
1110 efx->link_state.up = false;
1111 efx_link_status_changed(efx);
1114 static void efx_remove_port(struct efx_nic *efx)
1116 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1118 efx->type->remove_port(efx);
1121 /**************************************************************************
1125 **************************************************************************/
1127 static LIST_HEAD(efx_primary_list);
1128 static LIST_HEAD(efx_unassociated_list);
1130 static bool efx_same_controller(struct efx_nic *left, struct efx_nic *right)
1132 return left->type == right->type &&
1133 left->vpd_sn && right->vpd_sn &&
1134 !strcmp(left->vpd_sn, right->vpd_sn);
1137 static void efx_associate(struct efx_nic *efx)
1139 struct efx_nic *other, *next;
1141 if (efx->primary == efx) {
1142 /* Adding primary function; look for secondaries */
1144 netif_dbg(efx, probe, efx->net_dev, "adding to primary list\n");
1145 list_add_tail(&efx->node, &efx_primary_list);
1147 list_for_each_entry_safe(other, next, &efx_unassociated_list,
1149 if (efx_same_controller(efx, other)) {
1150 list_del(&other->node);
1151 netif_dbg(other, probe, other->net_dev,
1152 "moving to secondary list of %s %s\n",
1153 pci_name(efx->pci_dev),
1154 efx->net_dev->name);
1155 list_add_tail(&other->node,
1156 &efx->secondary_list);
1157 other->primary = efx;
1161 /* Adding secondary function; look for primary */
1163 list_for_each_entry(other, &efx_primary_list, node) {
1164 if (efx_same_controller(efx, other)) {
1165 netif_dbg(efx, probe, efx->net_dev,
1166 "adding to secondary list of %s %s\n",
1167 pci_name(other->pci_dev),
1168 other->net_dev->name);
1169 list_add_tail(&efx->node,
1170 &other->secondary_list);
1171 efx->primary = other;
1176 netif_dbg(efx, probe, efx->net_dev,
1177 "adding to unassociated list\n");
1178 list_add_tail(&efx->node, &efx_unassociated_list);
1182 static void efx_dissociate(struct efx_nic *efx)
1184 struct efx_nic *other, *next;
1186 list_del(&efx->node);
1187 efx->primary = NULL;
1189 list_for_each_entry_safe(other, next, &efx->secondary_list, node) {
1190 list_del(&other->node);
1191 netif_dbg(other, probe, other->net_dev,
1192 "moving to unassociated list\n");
1193 list_add_tail(&other->node, &efx_unassociated_list);
1194 other->primary = NULL;
1198 /* This configures the PCI device to enable I/O and DMA. */
1199 static int efx_init_io(struct efx_nic *efx)
1201 struct pci_dev *pci_dev = efx->pci_dev;
1202 dma_addr_t dma_mask = efx->type->max_dma_mask;
1203 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1206 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1208 bar = efx->type->mem_bar;
1210 rc = pci_enable_device(pci_dev);
1212 netif_err(efx, probe, efx->net_dev,
1213 "failed to enable PCI device\n");
1217 pci_set_master(pci_dev);
1219 /* Set the PCI DMA mask. Try all possibilities from our
1220 * genuine mask down to 32 bits, because some architectures
1221 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1222 * masks event though they reject 46 bit masks.
1224 while (dma_mask > 0x7fffffffUL) {
1225 if (dma_supported(&pci_dev->dev, dma_mask)) {
1226 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask);
1233 netif_err(efx, probe, efx->net_dev,
1234 "could not find a suitable DMA mask\n");
1237 netif_dbg(efx, probe, efx->net_dev,
1238 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1240 efx->membase_phys = pci_resource_start(efx->pci_dev, bar);
1241 rc = pci_request_region(pci_dev, bar, "sfc");
1243 netif_err(efx, probe, efx->net_dev,
1244 "request for memory BAR failed\n");
1248 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1249 if (!efx->membase) {
1250 netif_err(efx, probe, efx->net_dev,
1251 "could not map memory BAR at %llx+%x\n",
1252 (unsigned long long)efx->membase_phys, mem_map_size);
1256 netif_dbg(efx, probe, efx->net_dev,
1257 "memory BAR at %llx+%x (virtual %p)\n",
1258 (unsigned long long)efx->membase_phys, mem_map_size,
1264 pci_release_region(efx->pci_dev, bar);
1266 efx->membase_phys = 0;
1268 pci_disable_device(efx->pci_dev);
1273 static void efx_fini_io(struct efx_nic *efx)
1277 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1280 iounmap(efx->membase);
1281 efx->membase = NULL;
1284 if (efx->membase_phys) {
1285 bar = efx->type->mem_bar;
1286 pci_release_region(efx->pci_dev, bar);
1287 efx->membase_phys = 0;
1290 pci_disable_device(efx->pci_dev);
1293 void efx_set_default_rx_indir_table(struct efx_nic *efx)
1297 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1298 efx->rx_indir_table[i] =
1299 ethtool_rxfh_indir_default(i, efx->rss_spread);
1302 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1304 cpumask_var_t thread_mask;
1311 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1312 netif_warn(efx, probe, efx->net_dev,
1313 "RSS disabled due to allocation failure\n");
1318 for_each_online_cpu(cpu) {
1319 if (!cpumask_test_cpu(cpu, thread_mask)) {
1321 cpumask_or(thread_mask, thread_mask,
1322 topology_thread_cpumask(cpu));
1326 free_cpumask_var(thread_mask);
1329 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1330 * table entries that are inaccessible to VFs
1332 #ifdef CONFIG_SFC_SRIOV
1333 if (efx->type->sriov_wanted) {
1334 if (efx->type->sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1335 count > efx_vf_size(efx)) {
1336 netif_warn(efx, probe, efx->net_dev,
1337 "Reducing number of RSS channels from %u to %u for "
1338 "VF support. Increase vf-msix-limit to use more "
1339 "channels on the PF.\n",
1340 count, efx_vf_size(efx));
1341 count = efx_vf_size(efx);
1349 /* Probe the number and type of interrupts we are able to obtain, and
1350 * the resulting numbers of channels and RX queues.
1352 static int efx_probe_interrupts(struct efx_nic *efx)
1354 unsigned int extra_channels = 0;
1358 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1359 if (efx->extra_channel_type[i])
1362 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1363 struct msix_entry xentries[EFX_MAX_CHANNELS];
1364 unsigned int n_channels;
1366 n_channels = efx_wanted_parallelism(efx);
1367 if (separate_tx_channels)
1369 n_channels += extra_channels;
1370 n_channels = min(n_channels, efx->max_channels);
1372 for (i = 0; i < n_channels; i++)
1373 xentries[i].entry = i;
1374 rc = pci_enable_msix_range(efx->pci_dev,
1375 xentries, 1, n_channels);
1377 /* Fall back to single channel MSI */
1378 efx->interrupt_mode = EFX_INT_MODE_MSI;
1379 netif_err(efx, drv, efx->net_dev,
1380 "could not enable MSI-X\n");
1381 } else if (rc < n_channels) {
1382 netif_err(efx, drv, efx->net_dev,
1383 "WARNING: Insufficient MSI-X vectors"
1384 " available (%d < %u).\n", rc, n_channels);
1385 netif_err(efx, drv, efx->net_dev,
1386 "WARNING: Performance may be reduced.\n");
1391 efx->n_channels = n_channels;
1392 if (n_channels > extra_channels)
1393 n_channels -= extra_channels;
1394 if (separate_tx_channels) {
1395 efx->n_tx_channels = max(n_channels / 2, 1U);
1396 efx->n_rx_channels = max(n_channels -
1400 efx->n_tx_channels = n_channels;
1401 efx->n_rx_channels = n_channels;
1403 for (i = 0; i < efx->n_channels; i++)
1404 efx_get_channel(efx, i)->irq =
1409 /* Try single interrupt MSI */
1410 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1411 efx->n_channels = 1;
1412 efx->n_rx_channels = 1;
1413 efx->n_tx_channels = 1;
1414 rc = pci_enable_msi(efx->pci_dev);
1416 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1418 netif_err(efx, drv, efx->net_dev,
1419 "could not enable MSI\n");
1420 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1424 /* Assume legacy interrupts */
1425 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1426 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1427 efx->n_rx_channels = 1;
1428 efx->n_tx_channels = 1;
1429 efx->legacy_irq = efx->pci_dev->irq;
1432 /* Assign extra channels if possible */
1433 j = efx->n_channels;
1434 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1435 if (!efx->extra_channel_type[i])
1437 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1438 efx->n_channels <= extra_channels) {
1439 efx->extra_channel_type[i]->handle_no_channel(efx);
1442 efx_get_channel(efx, j)->type =
1443 efx->extra_channel_type[i];
1447 /* RSS might be usable on VFs even if it is disabled on the PF */
1448 #ifdef CONFIG_SFC_SRIOV
1449 if (efx->type->sriov_wanted) {
1450 efx->rss_spread = ((efx->n_rx_channels > 1 ||
1451 !efx->type->sriov_wanted(efx)) ?
1452 efx->n_rx_channels : efx_vf_size(efx));
1456 efx->rss_spread = efx->n_rx_channels;
1461 static int efx_soft_enable_interrupts(struct efx_nic *efx)
1463 struct efx_channel *channel, *end_channel;
1466 BUG_ON(efx->state == STATE_DISABLED);
1468 efx->irq_soft_enabled = true;
1471 efx_for_each_channel(channel, efx) {
1472 if (!channel->type->keep_eventq) {
1473 rc = efx_init_eventq(channel);
1477 efx_start_eventq(channel);
1480 efx_mcdi_mode_event(efx);
1484 end_channel = channel;
1485 efx_for_each_channel(channel, efx) {
1486 if (channel == end_channel)
1488 efx_stop_eventq(channel);
1489 if (!channel->type->keep_eventq)
1490 efx_fini_eventq(channel);
1496 static void efx_soft_disable_interrupts(struct efx_nic *efx)
1498 struct efx_channel *channel;
1500 if (efx->state == STATE_DISABLED)
1503 efx_mcdi_mode_poll(efx);
1505 efx->irq_soft_enabled = false;
1508 if (efx->legacy_irq)
1509 synchronize_irq(efx->legacy_irq);
1511 efx_for_each_channel(channel, efx) {
1513 synchronize_irq(channel->irq);
1515 efx_stop_eventq(channel);
1516 if (!channel->type->keep_eventq)
1517 efx_fini_eventq(channel);
1520 /* Flush the asynchronous MCDI request queue */
1521 efx_mcdi_flush_async(efx);
1524 static int efx_enable_interrupts(struct efx_nic *efx)
1526 struct efx_channel *channel, *end_channel;
1529 BUG_ON(efx->state == STATE_DISABLED);
1531 if (efx->eeh_disabled_legacy_irq) {
1532 enable_irq(efx->legacy_irq);
1533 efx->eeh_disabled_legacy_irq = false;
1536 efx->type->irq_enable_master(efx);
1538 efx_for_each_channel(channel, efx) {
1539 if (channel->type->keep_eventq) {
1540 rc = efx_init_eventq(channel);
1546 rc = efx_soft_enable_interrupts(efx);
1553 end_channel = channel;
1554 efx_for_each_channel(channel, efx) {
1555 if (channel == end_channel)
1557 if (channel->type->keep_eventq)
1558 efx_fini_eventq(channel);
1561 efx->type->irq_disable_non_ev(efx);
1566 static void efx_disable_interrupts(struct efx_nic *efx)
1568 struct efx_channel *channel;
1570 efx_soft_disable_interrupts(efx);
1572 efx_for_each_channel(channel, efx) {
1573 if (channel->type->keep_eventq)
1574 efx_fini_eventq(channel);
1577 efx->type->irq_disable_non_ev(efx);
1580 static void efx_remove_interrupts(struct efx_nic *efx)
1582 struct efx_channel *channel;
1584 /* Remove MSI/MSI-X interrupts */
1585 efx_for_each_channel(channel, efx)
1587 pci_disable_msi(efx->pci_dev);
1588 pci_disable_msix(efx->pci_dev);
1590 /* Remove legacy interrupt */
1591 efx->legacy_irq = 0;
1594 static void efx_set_channels(struct efx_nic *efx)
1596 struct efx_channel *channel;
1597 struct efx_tx_queue *tx_queue;
1599 efx->tx_channel_offset =
1600 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1602 /* We need to mark which channels really have RX and TX
1603 * queues, and adjust the TX queue numbers if we have separate
1604 * RX-only and TX-only channels.
1606 efx_for_each_channel(channel, efx) {
1607 if (channel->channel < efx->n_rx_channels)
1608 channel->rx_queue.core_index = channel->channel;
1610 channel->rx_queue.core_index = -1;
1612 efx_for_each_channel_tx_queue(tx_queue, channel)
1613 tx_queue->queue -= (efx->tx_channel_offset *
1618 static int efx_probe_nic(struct efx_nic *efx)
1622 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1624 /* Carry out hardware-type specific initialisation */
1625 rc = efx->type->probe(efx);
1629 /* Determine the number of channels and queues by trying to hook
1630 * in MSI-X interrupts. */
1631 rc = efx_probe_interrupts(efx);
1635 efx_set_channels(efx);
1637 rc = efx->type->dimension_resources(efx);
1641 if (efx->n_channels > 1)
1642 netdev_rss_key_fill(&efx->rx_hash_key,
1643 sizeof(efx->rx_hash_key));
1644 efx_set_default_rx_indir_table(efx);
1646 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1647 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1649 /* Initialise the interrupt moderation settings */
1650 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1656 efx_remove_interrupts(efx);
1658 efx->type->remove(efx);
1662 static void efx_remove_nic(struct efx_nic *efx)
1664 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1666 efx_remove_interrupts(efx);
1667 efx->type->remove(efx);
1670 static int efx_probe_filters(struct efx_nic *efx)
1674 spin_lock_init(&efx->filter_lock);
1676 rc = efx->type->filter_table_probe(efx);
1680 #ifdef CONFIG_RFS_ACCEL
1681 if (efx->type->offload_features & NETIF_F_NTUPLE) {
1682 efx->rps_flow_id = kcalloc(efx->type->max_rx_ip_filters,
1683 sizeof(*efx->rps_flow_id),
1685 if (!efx->rps_flow_id) {
1686 efx->type->filter_table_remove(efx);
1695 static void efx_remove_filters(struct efx_nic *efx)
1697 #ifdef CONFIG_RFS_ACCEL
1698 kfree(efx->rps_flow_id);
1700 efx->type->filter_table_remove(efx);
1703 static void efx_restore_filters(struct efx_nic *efx)
1705 efx->type->filter_table_restore(efx);
1708 /**************************************************************************
1710 * NIC startup/shutdown
1712 *************************************************************************/
1714 static int efx_probe_all(struct efx_nic *efx)
1718 rc = efx_probe_nic(efx);
1720 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1724 rc = efx_probe_port(efx);
1726 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1730 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1731 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1735 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1737 #ifdef CONFIG_SFC_SRIOV
1738 rc = efx->type->vswitching_probe(efx);
1739 if (rc) /* not fatal; the PF will still work fine */
1740 netif_warn(efx, probe, efx->net_dev,
1741 "failed to setup vswitching rc=%d;"
1742 " VFs may not function\n", rc);
1745 rc = efx_probe_filters(efx);
1747 netif_err(efx, probe, efx->net_dev,
1748 "failed to create filter tables\n");
1752 rc = efx_probe_channels(efx);
1759 efx_remove_filters(efx);
1761 #ifdef CONFIG_SFC_SRIOV
1762 efx->type->vswitching_remove(efx);
1765 efx_remove_port(efx);
1767 efx_remove_nic(efx);
1772 /* If the interface is supposed to be running but is not, start
1773 * the hardware and software data path, regular activity for the port
1774 * (MAC statistics, link polling, etc.) and schedule the port to be
1775 * reconfigured. Interrupts must already be enabled. This function
1776 * is safe to call multiple times, so long as the NIC is not disabled.
1777 * Requires the RTNL lock.
1779 static void efx_start_all(struct efx_nic *efx)
1781 EFX_ASSERT_RESET_SERIALISED(efx);
1782 BUG_ON(efx->state == STATE_DISABLED);
1784 /* Check that it is appropriate to restart the interface. All
1785 * of these flags are safe to read under just the rtnl lock */
1786 if (efx->port_enabled || !netif_running(efx->net_dev) ||
1790 efx_start_port(efx);
1791 efx_start_datapath(efx);
1793 /* Start the hardware monitor if there is one */
1794 if (efx->type->monitor != NULL)
1795 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1796 efx_monitor_interval);
1798 /* If link state detection is normally event-driven, we have
1799 * to poll now because we could have missed a change
1801 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) {
1802 mutex_lock(&efx->mac_lock);
1803 if (efx->phy_op->poll(efx))
1804 efx_link_status_changed(efx);
1805 mutex_unlock(&efx->mac_lock);
1808 efx->type->start_stats(efx);
1809 efx->type->pull_stats(efx);
1810 spin_lock_bh(&efx->stats_lock);
1811 efx->type->update_stats(efx, NULL, NULL);
1812 spin_unlock_bh(&efx->stats_lock);
1815 /* Quiesce the hardware and software data path, and regular activity
1816 * for the port without bringing the link down. Safe to call multiple
1817 * times with the NIC in almost any state, but interrupts should be
1818 * enabled. Requires the RTNL lock.
1820 static void efx_stop_all(struct efx_nic *efx)
1822 EFX_ASSERT_RESET_SERIALISED(efx);
1824 /* port_enabled can be read safely under the rtnl lock */
1825 if (!efx->port_enabled)
1828 /* update stats before we go down so we can accurately count
1831 efx->type->pull_stats(efx);
1832 spin_lock_bh(&efx->stats_lock);
1833 efx->type->update_stats(efx, NULL, NULL);
1834 spin_unlock_bh(&efx->stats_lock);
1835 efx->type->stop_stats(efx);
1838 /* Stop the kernel transmit interface. This is only valid if
1839 * the device is stopped or detached; otherwise the watchdog
1840 * may fire immediately.
1842 WARN_ON(netif_running(efx->net_dev) &&
1843 netif_device_present(efx->net_dev));
1844 netif_tx_disable(efx->net_dev);
1846 efx_stop_datapath(efx);
1849 static void efx_remove_all(struct efx_nic *efx)
1851 efx_remove_channels(efx);
1852 efx_remove_filters(efx);
1853 #ifdef CONFIG_SFC_SRIOV
1854 efx->type->vswitching_remove(efx);
1856 efx_remove_port(efx);
1857 efx_remove_nic(efx);
1860 /**************************************************************************
1862 * Interrupt moderation
1864 **************************************************************************/
1866 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1870 if (usecs * 1000 < quantum_ns)
1871 return 1; /* never round down to 0 */
1872 return usecs * 1000 / quantum_ns;
1875 /* Set interrupt moderation parameters */
1876 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1877 unsigned int rx_usecs, bool rx_adaptive,
1878 bool rx_may_override_tx)
1880 struct efx_channel *channel;
1881 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1882 efx->timer_quantum_ns,
1884 unsigned int tx_ticks;
1885 unsigned int rx_ticks;
1887 EFX_ASSERT_RESET_SERIALISED(efx);
1889 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1892 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1893 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1895 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1896 !rx_may_override_tx) {
1897 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1898 "RX and TX IRQ moderation must be equal\n");
1902 efx->irq_rx_adaptive = rx_adaptive;
1903 efx->irq_rx_moderation = rx_ticks;
1904 efx_for_each_channel(channel, efx) {
1905 if (efx_channel_has_rx_queue(channel))
1906 channel->irq_moderation = rx_ticks;
1907 else if (efx_channel_has_tx_queues(channel))
1908 channel->irq_moderation = tx_ticks;
1914 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1915 unsigned int *rx_usecs, bool *rx_adaptive)
1917 /* We must round up when converting ticks to microseconds
1918 * because we round down when converting the other way.
1921 *rx_adaptive = efx->irq_rx_adaptive;
1922 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1923 efx->timer_quantum_ns,
1926 /* If channels are shared between RX and TX, so is IRQ
1927 * moderation. Otherwise, IRQ moderation is the same for all
1928 * TX channels and is not adaptive.
1930 if (efx->tx_channel_offset == 0)
1931 *tx_usecs = *rx_usecs;
1933 *tx_usecs = DIV_ROUND_UP(
1934 efx->channel[efx->tx_channel_offset]->irq_moderation *
1935 efx->timer_quantum_ns,
1939 /**************************************************************************
1943 **************************************************************************/
1945 /* Run periodically off the general workqueue */
1946 static void efx_monitor(struct work_struct *data)
1948 struct efx_nic *efx = container_of(data, struct efx_nic,
1951 netif_vdbg(efx, timer, efx->net_dev,
1952 "hardware monitor executing on CPU %d\n",
1953 raw_smp_processor_id());
1954 BUG_ON(efx->type->monitor == NULL);
1956 /* If the mac_lock is already held then it is likely a port
1957 * reconfiguration is already in place, which will likely do
1958 * most of the work of monitor() anyway. */
1959 if (mutex_trylock(&efx->mac_lock)) {
1960 if (efx->port_enabled)
1961 efx->type->monitor(efx);
1962 mutex_unlock(&efx->mac_lock);
1965 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1966 efx_monitor_interval);
1969 /**************************************************************************
1973 *************************************************************************/
1976 * Context: process, rtnl_lock() held.
1978 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1980 struct efx_nic *efx = netdev_priv(net_dev);
1981 struct mii_ioctl_data *data = if_mii(ifr);
1983 if (cmd == SIOCSHWTSTAMP)
1984 return efx_ptp_set_ts_config(efx, ifr);
1985 if (cmd == SIOCGHWTSTAMP)
1986 return efx_ptp_get_ts_config(efx, ifr);
1988 /* Convert phy_id from older PRTAD/DEVAD format */
1989 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1990 (data->phy_id & 0xfc00) == 0x0400)
1991 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1993 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1996 /**************************************************************************
2000 **************************************************************************/
2002 static void efx_init_napi_channel(struct efx_channel *channel)
2004 struct efx_nic *efx = channel->efx;
2006 channel->napi_dev = efx->net_dev;
2007 netif_napi_add(channel->napi_dev, &channel->napi_str,
2008 efx_poll, napi_weight);
2009 napi_hash_add(&channel->napi_str);
2010 efx_channel_init_lock(channel);
2013 static void efx_init_napi(struct efx_nic *efx)
2015 struct efx_channel *channel;
2017 efx_for_each_channel(channel, efx)
2018 efx_init_napi_channel(channel);
2021 static void efx_fini_napi_channel(struct efx_channel *channel)
2023 if (channel->napi_dev) {
2024 netif_napi_del(&channel->napi_str);
2025 napi_hash_del(&channel->napi_str);
2027 channel->napi_dev = NULL;
2030 static void efx_fini_napi(struct efx_nic *efx)
2032 struct efx_channel *channel;
2034 efx_for_each_channel(channel, efx)
2035 efx_fini_napi_channel(channel);
2038 /**************************************************************************
2040 * Kernel netpoll interface
2042 *************************************************************************/
2044 #ifdef CONFIG_NET_POLL_CONTROLLER
2046 /* Although in the common case interrupts will be disabled, this is not
2047 * guaranteed. However, all our work happens inside the NAPI callback,
2048 * so no locking is required.
2050 static void efx_netpoll(struct net_device *net_dev)
2052 struct efx_nic *efx = netdev_priv(net_dev);
2053 struct efx_channel *channel;
2055 efx_for_each_channel(channel, efx)
2056 efx_schedule_channel(channel);
2061 #ifdef CONFIG_NET_RX_BUSY_POLL
2062 static int efx_busy_poll(struct napi_struct *napi)
2064 struct efx_channel *channel =
2065 container_of(napi, struct efx_channel, napi_str);
2066 struct efx_nic *efx = channel->efx;
2068 int old_rx_packets, rx_packets;
2070 if (!netif_running(efx->net_dev))
2071 return LL_FLUSH_FAILED;
2073 if (!efx_channel_lock_poll(channel))
2074 return LL_FLUSH_BUSY;
2076 old_rx_packets = channel->rx_queue.rx_packets;
2077 efx_process_channel(channel, budget);
2079 rx_packets = channel->rx_queue.rx_packets - old_rx_packets;
2081 /* There is no race condition with NAPI here.
2082 * NAPI will automatically be rescheduled if it yielded during busy
2083 * polling, because it was not able to take the lock and thus returned
2086 efx_channel_unlock_poll(channel);
2092 /**************************************************************************
2094 * Kernel net device interface
2096 *************************************************************************/
2098 /* Context: process, rtnl_lock() held. */
2099 static int efx_net_open(struct net_device *net_dev)
2101 struct efx_nic *efx = netdev_priv(net_dev);
2104 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
2105 raw_smp_processor_id());
2107 rc = efx_check_disabled(efx);
2110 if (efx->phy_mode & PHY_MODE_SPECIAL)
2112 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
2115 /* Notify the kernel of the link state polled during driver load,
2116 * before the monitor starts running */
2117 efx_link_status_changed(efx);
2120 efx_selftest_async_start(efx);
2124 /* Context: process, rtnl_lock() held.
2125 * Note that the kernel will ignore our return code; this method
2126 * should really be a void.
2128 static int efx_net_stop(struct net_device *net_dev)
2130 struct efx_nic *efx = netdev_priv(net_dev);
2132 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
2133 raw_smp_processor_id());
2135 /* Stop the device and flush all the channels */
2141 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
2142 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
2143 struct rtnl_link_stats64 *stats)
2145 struct efx_nic *efx = netdev_priv(net_dev);
2147 spin_lock_bh(&efx->stats_lock);
2148 efx->type->update_stats(efx, NULL, stats);
2149 spin_unlock_bh(&efx->stats_lock);
2154 /* Context: netif_tx_lock held, BHs disabled. */
2155 static void efx_watchdog(struct net_device *net_dev)
2157 struct efx_nic *efx = netdev_priv(net_dev);
2159 netif_err(efx, tx_err, efx->net_dev,
2160 "TX stuck with port_enabled=%d: resetting channels\n",
2163 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
2167 /* Context: process, rtnl_lock() held. */
2168 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
2170 struct efx_nic *efx = netdev_priv(net_dev);
2173 rc = efx_check_disabled(efx);
2176 if (new_mtu > EFX_MAX_MTU)
2179 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
2181 efx_device_detach_sync(efx);
2184 mutex_lock(&efx->mac_lock);
2185 net_dev->mtu = new_mtu;
2186 efx->type->reconfigure_mac(efx);
2187 mutex_unlock(&efx->mac_lock);
2190 netif_device_attach(efx->net_dev);
2194 static int efx_set_mac_address(struct net_device *net_dev, void *data)
2196 struct efx_nic *efx = netdev_priv(net_dev);
2197 struct sockaddr *addr = data;
2198 u8 *new_addr = addr->sa_data;
2200 if (!is_valid_ether_addr(new_addr)) {
2201 netif_err(efx, drv, efx->net_dev,
2202 "invalid ethernet MAC address requested: %pM\n",
2204 return -EADDRNOTAVAIL;
2207 ether_addr_copy(net_dev->dev_addr, new_addr);
2208 if (efx->type->sriov_mac_address_changed)
2209 efx->type->sriov_mac_address_changed(efx);
2211 /* Reconfigure the MAC */
2212 mutex_lock(&efx->mac_lock);
2213 efx->type->reconfigure_mac(efx);
2214 mutex_unlock(&efx->mac_lock);
2219 /* Context: netif_addr_lock held, BHs disabled. */
2220 static void efx_set_rx_mode(struct net_device *net_dev)
2222 struct efx_nic *efx = netdev_priv(net_dev);
2224 if (efx->port_enabled)
2225 queue_work(efx->workqueue, &efx->mac_work);
2226 /* Otherwise efx_start_port() will do this */
2229 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2231 struct efx_nic *efx = netdev_priv(net_dev);
2233 /* If disabling RX n-tuple filtering, clear existing filters */
2234 if (net_dev->features & ~data & NETIF_F_NTUPLE)
2235 return efx->type->filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2240 static const struct net_device_ops efx_netdev_ops = {
2241 .ndo_open = efx_net_open,
2242 .ndo_stop = efx_net_stop,
2243 .ndo_get_stats64 = efx_net_stats,
2244 .ndo_tx_timeout = efx_watchdog,
2245 .ndo_start_xmit = efx_hard_start_xmit,
2246 .ndo_validate_addr = eth_validate_addr,
2247 .ndo_do_ioctl = efx_ioctl,
2248 .ndo_change_mtu = efx_change_mtu,
2249 .ndo_set_mac_address = efx_set_mac_address,
2250 .ndo_set_rx_mode = efx_set_rx_mode,
2251 .ndo_set_features = efx_set_features,
2252 #ifdef CONFIG_SFC_SRIOV
2253 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2254 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2255 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2256 .ndo_get_vf_config = efx_sriov_get_vf_config,
2258 #ifdef CONFIG_NET_POLL_CONTROLLER
2259 .ndo_poll_controller = efx_netpoll,
2261 .ndo_setup_tc = efx_setup_tc,
2262 #ifdef CONFIG_NET_RX_BUSY_POLL
2263 .ndo_busy_poll = efx_busy_poll,
2265 #ifdef CONFIG_RFS_ACCEL
2266 .ndo_rx_flow_steer = efx_filter_rfs,
2270 static void efx_update_name(struct efx_nic *efx)
2272 strcpy(efx->name, efx->net_dev->name);
2273 efx_mtd_rename(efx);
2274 efx_set_channel_names(efx);
2277 static int efx_netdev_event(struct notifier_block *this,
2278 unsigned long event, void *ptr)
2280 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2282 if ((net_dev->netdev_ops == &efx_netdev_ops) &&
2283 event == NETDEV_CHANGENAME)
2284 efx_update_name(netdev_priv(net_dev));
2289 static struct notifier_block efx_netdev_notifier = {
2290 .notifier_call = efx_netdev_event,
2294 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2296 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2297 return sprintf(buf, "%d\n", efx->phy_type);
2299 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2301 static int efx_register_netdev(struct efx_nic *efx)
2303 struct net_device *net_dev = efx->net_dev;
2304 struct efx_channel *channel;
2307 net_dev->watchdog_timeo = 5 * HZ;
2308 net_dev->irq = efx->pci_dev->irq;
2309 net_dev->netdev_ops = &efx_netdev_ops;
2310 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0)
2311 net_dev->priv_flags |= IFF_UNICAST_FLT;
2312 net_dev->ethtool_ops = &efx_ethtool_ops;
2313 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2317 /* Enable resets to be scheduled and check whether any were
2318 * already requested. If so, the NIC is probably hosed so we
2321 efx->state = STATE_READY;
2322 smp_mb(); /* ensure we change state before checking reset_pending */
2323 if (efx->reset_pending) {
2324 netif_err(efx, probe, efx->net_dev,
2325 "aborting probe due to scheduled reset\n");
2330 rc = dev_alloc_name(net_dev, net_dev->name);
2333 efx_update_name(efx);
2335 /* Always start with carrier off; PHY events will detect the link */
2336 netif_carrier_off(net_dev);
2338 rc = register_netdevice(net_dev);
2342 efx_for_each_channel(channel, efx) {
2343 struct efx_tx_queue *tx_queue;
2344 efx_for_each_channel_tx_queue(tx_queue, channel)
2345 efx_init_tx_queue_core_txq(tx_queue);
2352 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2354 netif_err(efx, drv, efx->net_dev,
2355 "failed to init net dev attributes\n");
2356 goto fail_registered;
2363 efx_dissociate(efx);
2364 unregister_netdevice(net_dev);
2366 efx->state = STATE_UNINIT;
2368 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2372 static void efx_unregister_netdev(struct efx_nic *efx)
2377 BUG_ON(netdev_priv(efx->net_dev) != efx);
2379 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2380 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2383 unregister_netdevice(efx->net_dev);
2384 efx->state = STATE_UNINIT;
2388 /**************************************************************************
2390 * Device reset and suspend
2392 **************************************************************************/
2394 /* Tears down the entire software state and most of the hardware state
2396 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2398 EFX_ASSERT_RESET_SERIALISED(efx);
2400 if (method == RESET_TYPE_MCDI_TIMEOUT)
2401 efx->type->prepare_flr(efx);
2404 efx_disable_interrupts(efx);
2406 mutex_lock(&efx->mac_lock);
2407 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2408 efx->phy_op->fini(efx);
2409 efx->type->fini(efx);
2412 /* This function will always ensure that the locks acquired in
2413 * efx_reset_down() are released. A failure return code indicates
2414 * that we were unable to reinitialise the hardware, and the
2415 * driver should be disabled. If ok is false, then the rx and tx
2416 * engines are not restarted, pending a RESET_DISABLE. */
2417 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2421 EFX_ASSERT_RESET_SERIALISED(efx);
2423 if (method == RESET_TYPE_MCDI_TIMEOUT)
2424 efx->type->finish_flr(efx);
2426 /* Ensure that SRAM is initialised even if we're disabling the device */
2427 rc = efx->type->init(efx);
2429 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2436 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2437 rc = efx->phy_op->init(efx);
2440 rc = efx->phy_op->reconfigure(efx);
2441 if (rc && rc != -EPERM)
2442 netif_err(efx, drv, efx->net_dev,
2443 "could not restore PHY settings\n");
2446 rc = efx_enable_interrupts(efx);
2450 #ifdef CONFIG_SFC_SRIOV
2451 rc = efx->type->vswitching_restore(efx);
2452 if (rc) /* not fatal; the PF will still work fine */
2453 netif_warn(efx, probe, efx->net_dev,
2454 "failed to restore vswitching rc=%d;"
2455 " VFs may not function\n", rc);
2458 efx_restore_filters(efx);
2459 if (efx->type->sriov_reset)
2460 efx->type->sriov_reset(efx);
2462 mutex_unlock(&efx->mac_lock);
2469 efx->port_initialized = false;
2471 mutex_unlock(&efx->mac_lock);
2476 /* Reset the NIC using the specified method. Note that the reset may
2477 * fail, in which case the card will be left in an unusable state.
2479 * Caller must hold the rtnl_lock.
2481 int efx_reset(struct efx_nic *efx, enum reset_type method)
2486 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2487 RESET_TYPE(method));
2489 efx_device_detach_sync(efx);
2490 efx_reset_down(efx, method);
2492 rc = efx->type->reset(efx, method);
2494 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2498 /* Clear flags for the scopes we covered. We assume the NIC and
2499 * driver are now quiescent so that there is no race here.
2501 if (method < RESET_TYPE_MAX_METHOD)
2502 efx->reset_pending &= -(1 << (method + 1));
2503 else /* it doesn't fit into the well-ordered scope hierarchy */
2504 __clear_bit(method, &efx->reset_pending);
2506 /* Reinitialise bus-mastering, which may have been turned off before
2507 * the reset was scheduled. This is still appropriate, even in the
2508 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2509 * can respond to requests. */
2510 pci_set_master(efx->pci_dev);
2513 /* Leave device stopped if necessary */
2515 method == RESET_TYPE_DISABLE ||
2516 method == RESET_TYPE_RECOVER_OR_DISABLE;
2517 rc2 = efx_reset_up(efx, method, !disabled);
2525 dev_close(efx->net_dev);
2526 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2527 efx->state = STATE_DISABLED;
2529 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2530 netif_device_attach(efx->net_dev);
2535 /* Try recovery mechanisms.
2536 * For now only EEH is supported.
2537 * Returns 0 if the recovery mechanisms are unsuccessful.
2538 * Returns a non-zero value otherwise.
2540 int efx_try_recovery(struct efx_nic *efx)
2543 /* A PCI error can occur and not be seen by EEH because nothing
2544 * happens on the PCI bus. In this case the driver may fail and
2545 * schedule a 'recover or reset', leading to this recovery handler.
2546 * Manually call the eeh failure check function.
2548 struct eeh_dev *eehdev = pci_dev_to_eeh_dev(efx->pci_dev);
2549 if (eeh_dev_check_failure(eehdev)) {
2550 /* The EEH mechanisms will handle the error and reset the
2551 * device if necessary.
2559 static void efx_wait_for_bist_end(struct efx_nic *efx)
2563 for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) {
2564 if (efx_mcdi_poll_reboot(efx))
2566 msleep(BIST_WAIT_DELAY_MS);
2569 netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n");
2571 /* Either way unset the BIST flag. If we found no reboot we probably
2572 * won't recover, but we should try.
2574 efx->mc_bist_for_other_fn = false;
2577 /* The worker thread exists so that code that cannot sleep can
2578 * schedule a reset for later.
2580 static void efx_reset_work(struct work_struct *data)
2582 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2583 unsigned long pending;
2584 enum reset_type method;
2586 pending = ACCESS_ONCE(efx->reset_pending);
2587 method = fls(pending) - 1;
2589 if (method == RESET_TYPE_MC_BIST)
2590 efx_wait_for_bist_end(efx);
2592 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2593 method == RESET_TYPE_RECOVER_OR_ALL) &&
2594 efx_try_recovery(efx))
2602 /* We checked the state in efx_schedule_reset() but it may
2603 * have changed by now. Now that we have the RTNL lock,
2604 * it cannot change again.
2606 if (efx->state == STATE_READY)
2607 (void)efx_reset(efx, method);
2612 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2614 enum reset_type method;
2616 if (efx->state == STATE_RECOVERY) {
2617 netif_dbg(efx, drv, efx->net_dev,
2618 "recovering: skip scheduling %s reset\n",
2624 case RESET_TYPE_INVISIBLE:
2625 case RESET_TYPE_ALL:
2626 case RESET_TYPE_RECOVER_OR_ALL:
2627 case RESET_TYPE_WORLD:
2628 case RESET_TYPE_DISABLE:
2629 case RESET_TYPE_RECOVER_OR_DISABLE:
2630 case RESET_TYPE_MC_BIST:
2631 case RESET_TYPE_MCDI_TIMEOUT:
2633 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2634 RESET_TYPE(method));
2637 method = efx->type->map_reset_reason(type);
2638 netif_dbg(efx, drv, efx->net_dev,
2639 "scheduling %s reset for %s\n",
2640 RESET_TYPE(method), RESET_TYPE(type));
2644 set_bit(method, &efx->reset_pending);
2645 smp_mb(); /* ensure we change reset_pending before checking state */
2647 /* If we're not READY then just leave the flags set as the cue
2648 * to abort probing or reschedule the reset later.
2650 if (ACCESS_ONCE(efx->state) != STATE_READY)
2653 /* efx_process_channel() will no longer read events once a
2654 * reset is scheduled. So switch back to poll'd MCDI completions. */
2655 efx_mcdi_mode_poll(efx);
2657 queue_work(reset_workqueue, &efx->reset_work);
2660 /**************************************************************************
2662 * List of NICs we support
2664 **************************************************************************/
2666 /* PCI device ID table */
2667 static const struct pci_device_id efx_pci_table[] = {
2668 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2669 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2670 .driver_data = (unsigned long) &falcon_a1_nic_type},
2671 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2672 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2673 .driver_data = (unsigned long) &falcon_b0_nic_type},
2674 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2675 .driver_data = (unsigned long) &siena_a0_nic_type},
2676 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2677 .driver_data = (unsigned long) &siena_a0_nic_type},
2678 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */
2679 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2680 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1903), /* SFC9120 VF */
2681 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
2682 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0923), /* SFC9140 PF */
2683 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2684 {0} /* end of list */
2687 /**************************************************************************
2689 * Dummy PHY/MAC operations
2691 * Can be used for some unimplemented operations
2692 * Needed so all function pointers are valid and do not have to be tested
2695 **************************************************************************/
2696 int efx_port_dummy_op_int(struct efx_nic *efx)
2700 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2702 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2707 static const struct efx_phy_operations efx_dummy_phy_operations = {
2708 .init = efx_port_dummy_op_int,
2709 .reconfigure = efx_port_dummy_op_int,
2710 .poll = efx_port_dummy_op_poll,
2711 .fini = efx_port_dummy_op_void,
2714 /**************************************************************************
2718 **************************************************************************/
2720 /* This zeroes out and then fills in the invariants in a struct
2721 * efx_nic (including all sub-structures).
2723 static int efx_init_struct(struct efx_nic *efx,
2724 struct pci_dev *pci_dev, struct net_device *net_dev)
2728 /* Initialise common structures */
2729 INIT_LIST_HEAD(&efx->node);
2730 INIT_LIST_HEAD(&efx->secondary_list);
2731 spin_lock_init(&efx->biu_lock);
2732 #ifdef CONFIG_SFC_MTD
2733 INIT_LIST_HEAD(&efx->mtd_list);
2735 INIT_WORK(&efx->reset_work, efx_reset_work);
2736 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2737 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2738 efx->pci_dev = pci_dev;
2739 efx->msg_enable = debug;
2740 efx->state = STATE_UNINIT;
2741 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2743 efx->net_dev = net_dev;
2744 efx->rx_prefix_size = efx->type->rx_prefix_size;
2746 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
2747 efx->rx_packet_hash_offset =
2748 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
2749 efx->rx_packet_ts_offset =
2750 efx->type->rx_ts_offset - efx->type->rx_prefix_size;
2751 spin_lock_init(&efx->stats_lock);
2752 mutex_init(&efx->mac_lock);
2753 efx->phy_op = &efx_dummy_phy_operations;
2754 efx->mdio.dev = net_dev;
2755 INIT_WORK(&efx->mac_work, efx_mac_work);
2756 init_waitqueue_head(&efx->flush_wq);
2758 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2759 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2760 if (!efx->channel[i])
2762 efx->msi_context[i].efx = efx;
2763 efx->msi_context[i].index = i;
2766 /* Higher numbered interrupt modes are less capable! */
2767 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2770 /* Would be good to use the net_dev name, but we're too early */
2771 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2773 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2774 if (!efx->workqueue)
2780 efx_fini_struct(efx);
2784 static void efx_fini_struct(struct efx_nic *efx)
2788 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2789 kfree(efx->channel[i]);
2793 if (efx->workqueue) {
2794 destroy_workqueue(efx->workqueue);
2795 efx->workqueue = NULL;
2799 void efx_update_sw_stats(struct efx_nic *efx, u64 *stats)
2801 u64 n_rx_nodesc_trunc = 0;
2802 struct efx_channel *channel;
2804 efx_for_each_channel(channel, efx)
2805 n_rx_nodesc_trunc += channel->n_rx_nodesc_trunc;
2806 stats[GENERIC_STAT_rx_nodesc_trunc] = n_rx_nodesc_trunc;
2807 stats[GENERIC_STAT_rx_noskb_drops] = atomic_read(&efx->n_rx_noskb_drops);
2810 /**************************************************************************
2814 **************************************************************************/
2816 /* Main body of final NIC shutdown code
2817 * This is called only at module unload (or hotplug removal).
2819 static void efx_pci_remove_main(struct efx_nic *efx)
2821 /* Flush reset_work. It can no longer be scheduled since we
2824 BUG_ON(efx->state == STATE_READY);
2825 cancel_work_sync(&efx->reset_work);
2827 efx_disable_interrupts(efx);
2828 efx_nic_fini_interrupt(efx);
2830 efx->type->fini(efx);
2832 efx_remove_all(efx);
2835 /* Final NIC shutdown
2836 * This is called only at module unload (or hotplug removal).
2838 static void efx_pci_remove(struct pci_dev *pci_dev)
2840 struct efx_nic *efx;
2842 efx = pci_get_drvdata(pci_dev);
2846 /* Mark the NIC as fini, then stop the interface */
2848 efx_dissociate(efx);
2849 dev_close(efx->net_dev);
2850 efx_disable_interrupts(efx);
2853 if (efx->type->sriov_fini)
2854 efx->type->sriov_fini(efx);
2856 efx_unregister_netdev(efx);
2858 efx_mtd_remove(efx);
2860 efx_pci_remove_main(efx);
2863 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2865 efx_fini_struct(efx);
2866 free_netdev(efx->net_dev);
2868 pci_disable_pcie_error_reporting(pci_dev);
2871 /* NIC VPD information
2872 * Called during probe to display the part number of the
2873 * installed NIC. VPD is potentially very large but this should
2874 * always appear within the first 512 bytes.
2876 #define SFC_VPD_LEN 512
2877 static void efx_probe_vpd_strings(struct efx_nic *efx)
2879 struct pci_dev *dev = efx->pci_dev;
2880 char vpd_data[SFC_VPD_LEN];
2882 int ro_start, ro_size, i, j;
2884 /* Get the vpd data from the device */
2885 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2886 if (vpd_size <= 0) {
2887 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2891 /* Get the Read only section */
2892 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
2894 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
2898 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
2900 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
2901 if (i + j > vpd_size)
2904 /* Get the Part number */
2905 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
2907 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
2911 j = pci_vpd_info_field_size(&vpd_data[i]);
2912 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2913 if (i + j > vpd_size) {
2914 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
2918 netif_info(efx, drv, efx->net_dev,
2919 "Part Number : %.*s\n", j, &vpd_data[i]);
2921 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
2923 i = pci_vpd_find_info_keyword(vpd_data, i, j, "SN");
2925 netif_err(efx, drv, efx->net_dev, "Serial number not found\n");
2929 j = pci_vpd_info_field_size(&vpd_data[i]);
2930 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2931 if (i + j > vpd_size) {
2932 netif_err(efx, drv, efx->net_dev, "Incomplete serial number\n");
2936 efx->vpd_sn = kmalloc(j + 1, GFP_KERNEL);
2940 snprintf(efx->vpd_sn, j + 1, "%s", &vpd_data[i]);
2944 /* Main body of NIC initialisation
2945 * This is called at module load (or hotplug insertion, theoretically).
2947 static int efx_pci_probe_main(struct efx_nic *efx)
2951 /* Do start-of-day initialisation */
2952 rc = efx_probe_all(efx);
2958 rc = efx->type->init(efx);
2960 netif_err(efx, probe, efx->net_dev,
2961 "failed to initialise NIC\n");
2965 rc = efx_init_port(efx);
2967 netif_err(efx, probe, efx->net_dev,
2968 "failed to initialise port\n");
2972 rc = efx_nic_init_interrupt(efx);
2975 rc = efx_enable_interrupts(efx);
2982 efx_nic_fini_interrupt(efx);
2986 efx->type->fini(efx);
2989 efx_remove_all(efx);
2994 /* NIC initialisation
2996 * This is called at module load (or hotplug insertion,
2997 * theoretically). It sets up PCI mappings, resets the NIC,
2998 * sets up and registers the network devices with the kernel and hooks
2999 * the interrupt service routine. It does not prepare the device for
3000 * transmission; this is left to the first time one of the network
3001 * interfaces is brought up (i.e. efx_net_open).
3003 static int efx_pci_probe(struct pci_dev *pci_dev,
3004 const struct pci_device_id *entry)
3006 struct net_device *net_dev;
3007 struct efx_nic *efx;
3010 /* Allocate and initialise a struct net_device and struct efx_nic */
3011 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
3015 efx = netdev_priv(net_dev);
3016 efx->type = (const struct efx_nic_type *) entry->driver_data;
3017 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
3018 NETIF_F_HIGHDMA | NETIF_F_TSO |
3020 if (efx->type->offload_features & NETIF_F_V6_CSUM)
3021 net_dev->features |= NETIF_F_TSO6;
3022 /* Mask for features that also apply to VLAN devices */
3023 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
3024 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
3026 /* All offloads can be toggled */
3027 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
3028 pci_set_drvdata(pci_dev, efx);
3029 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
3030 rc = efx_init_struct(efx, pci_dev, net_dev);
3034 netif_info(efx, probe, efx->net_dev,
3035 "Solarflare NIC detected\n");
3037 if (!efx->type->is_vf)
3038 efx_probe_vpd_strings(efx);
3040 /* Set up basic I/O (BAR mappings etc) */
3041 rc = efx_init_io(efx);
3045 rc = efx_pci_probe_main(efx);
3049 rc = efx_register_netdev(efx);
3053 if (efx->type->sriov_init) {
3054 rc = efx->type->sriov_init(efx);
3056 netif_err(efx, probe, efx->net_dev,
3057 "SR-IOV can't be enabled rc %d\n", rc);
3060 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
3062 /* Try to create MTDs, but allow this to fail */
3064 rc = efx_mtd_probe(efx);
3067 netif_warn(efx, probe, efx->net_dev,
3068 "failed to create MTDs (%d)\n", rc);
3070 rc = pci_enable_pcie_error_reporting(pci_dev);
3071 if (rc && rc != -EINVAL)
3072 netif_warn(efx, probe, efx->net_dev,
3073 "pci_enable_pcie_error_reporting failed (%d)\n", rc);
3078 efx_pci_remove_main(efx);
3082 efx_fini_struct(efx);
3085 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
3086 free_netdev(net_dev);
3090 /* efx_pci_sriov_configure returns the actual number of Virtual Functions
3091 * enabled on success
3093 #ifdef CONFIG_SFC_SRIOV
3094 static int efx_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
3097 struct efx_nic *efx = pci_get_drvdata(dev);
3099 if (efx->type->sriov_configure) {
3100 rc = efx->type->sriov_configure(efx, num_vfs);
3110 static int efx_pm_freeze(struct device *dev)
3112 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
3116 if (efx->state != STATE_DISABLED) {
3117 efx->state = STATE_UNINIT;
3119 efx_device_detach_sync(efx);
3122 efx_disable_interrupts(efx);
3130 static int efx_pm_thaw(struct device *dev)
3133 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
3137 if (efx->state != STATE_DISABLED) {
3138 rc = efx_enable_interrupts(efx);
3142 mutex_lock(&efx->mac_lock);
3143 efx->phy_op->reconfigure(efx);
3144 mutex_unlock(&efx->mac_lock);
3148 netif_device_attach(efx->net_dev);
3150 efx->state = STATE_READY;
3152 efx->type->resume_wol(efx);
3157 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
3158 queue_work(reset_workqueue, &efx->reset_work);
3168 static int efx_pm_poweroff(struct device *dev)
3170 struct pci_dev *pci_dev = to_pci_dev(dev);
3171 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3173 efx->type->fini(efx);
3175 efx->reset_pending = 0;
3177 pci_save_state(pci_dev);
3178 return pci_set_power_state(pci_dev, PCI_D3hot);
3181 /* Used for both resume and restore */
3182 static int efx_pm_resume(struct device *dev)
3184 struct pci_dev *pci_dev = to_pci_dev(dev);
3185 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3188 rc = pci_set_power_state(pci_dev, PCI_D0);
3191 pci_restore_state(pci_dev);
3192 rc = pci_enable_device(pci_dev);
3195 pci_set_master(efx->pci_dev);
3196 rc = efx->type->reset(efx, RESET_TYPE_ALL);
3199 rc = efx->type->init(efx);
3202 rc = efx_pm_thaw(dev);
3206 static int efx_pm_suspend(struct device *dev)
3211 rc = efx_pm_poweroff(dev);
3217 static const struct dev_pm_ops efx_pm_ops = {
3218 .suspend = efx_pm_suspend,
3219 .resume = efx_pm_resume,
3220 .freeze = efx_pm_freeze,
3221 .thaw = efx_pm_thaw,
3222 .poweroff = efx_pm_poweroff,
3223 .restore = efx_pm_resume,
3226 /* A PCI error affecting this device was detected.
3227 * At this point MMIO and DMA may be disabled.
3228 * Stop the software path and request a slot reset.
3230 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
3231 enum pci_channel_state state)
3233 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3234 struct efx_nic *efx = pci_get_drvdata(pdev);
3236 if (state == pci_channel_io_perm_failure)
3237 return PCI_ERS_RESULT_DISCONNECT;
3241 if (efx->state != STATE_DISABLED) {
3242 efx->state = STATE_RECOVERY;
3243 efx->reset_pending = 0;
3245 efx_device_detach_sync(efx);
3248 efx_disable_interrupts(efx);
3250 status = PCI_ERS_RESULT_NEED_RESET;
3252 /* If the interface is disabled we don't want to do anything
3255 status = PCI_ERS_RESULT_RECOVERED;
3260 pci_disable_device(pdev);
3265 /* Fake a successful reset, which will be performed later in efx_io_resume. */
3266 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
3268 struct efx_nic *efx = pci_get_drvdata(pdev);
3269 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3272 if (pci_enable_device(pdev)) {
3273 netif_err(efx, hw, efx->net_dev,
3274 "Cannot re-enable PCI device after reset.\n");
3275 status = PCI_ERS_RESULT_DISCONNECT;
3278 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
3280 netif_err(efx, hw, efx->net_dev,
3281 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
3282 /* Non-fatal error. Continue. */
3288 /* Perform the actual reset and resume I/O operations. */
3289 static void efx_io_resume(struct pci_dev *pdev)
3291 struct efx_nic *efx = pci_get_drvdata(pdev);
3296 if (efx->state == STATE_DISABLED)
3299 rc = efx_reset(efx, RESET_TYPE_ALL);
3301 netif_err(efx, hw, efx->net_dev,
3302 "efx_reset failed after PCI error (%d)\n", rc);
3304 efx->state = STATE_READY;
3305 netif_dbg(efx, hw, efx->net_dev,
3306 "Done resetting and resuming IO after PCI error.\n");
3313 /* For simplicity and reliability, we always require a slot reset and try to
3314 * reset the hardware when a pci error affecting the device is detected.
3315 * We leave both the link_reset and mmio_enabled callback unimplemented:
3316 * with our request for slot reset the mmio_enabled callback will never be
3317 * called, and the link_reset callback is not used by AER or EEH mechanisms.
3319 static struct pci_error_handlers efx_err_handlers = {
3320 .error_detected = efx_io_error_detected,
3321 .slot_reset = efx_io_slot_reset,
3322 .resume = efx_io_resume,
3325 static struct pci_driver efx_pci_driver = {
3326 .name = KBUILD_MODNAME,
3327 .id_table = efx_pci_table,
3328 .probe = efx_pci_probe,
3329 .remove = efx_pci_remove,
3330 .driver.pm = &efx_pm_ops,
3331 .err_handler = &efx_err_handlers,
3332 #ifdef CONFIG_SFC_SRIOV
3333 .sriov_configure = efx_pci_sriov_configure,
3337 /**************************************************************************
3339 * Kernel module interface
3341 *************************************************************************/
3343 module_param(interrupt_mode, uint, 0444);
3344 MODULE_PARM_DESC(interrupt_mode,
3345 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
3347 static int __init efx_init_module(void)
3351 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
3353 rc = register_netdevice_notifier(&efx_netdev_notifier);
3357 #ifdef CONFIG_SFC_SRIOV
3358 rc = efx_init_sriov();
3363 reset_workqueue = create_singlethread_workqueue("sfc_reset");
3364 if (!reset_workqueue) {
3369 rc = pci_register_driver(&efx_pci_driver);
3376 destroy_workqueue(reset_workqueue);
3378 #ifdef CONFIG_SFC_SRIOV
3382 unregister_netdevice_notifier(&efx_netdev_notifier);
3387 static void __exit efx_exit_module(void)
3389 printk(KERN_INFO "Solarflare NET driver unloading\n");
3391 pci_unregister_driver(&efx_pci_driver);
3392 destroy_workqueue(reset_workqueue);
3393 #ifdef CONFIG_SFC_SRIOV
3396 unregister_netdevice_notifier(&efx_netdev_notifier);
3400 module_init(efx_init_module);
3401 module_exit(efx_exit_module);
3403 MODULE_AUTHOR("Solarflare Communications and "
3404 "Michael Brown <mbrown@fensystems.co.uk>");
3405 MODULE_DESCRIPTION("Solarflare network driver");
3406 MODULE_LICENSE("GPL");
3407 MODULE_DEVICE_TABLE(pci, efx_pci_table);