1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 /* Common definitions for all Efx net driver code */
13 #ifndef EFX_NET_DRIVER_H
14 #define EFX_NET_DRIVER_H
16 #include <linux/netdevice.h>
17 #include <linux/etherdevice.h>
18 #include <linux/ethtool.h>
19 #include <linux/if_vlan.h>
20 #include <linux/timer.h>
21 #include <linux/mdio.h>
22 #include <linux/list.h>
23 #include <linux/pci.h>
24 #include <linux/device.h>
25 #include <linux/highmem.h>
26 #include <linux/workqueue.h>
27 #include <linux/mutex.h>
28 #include <linux/vmalloc.h>
29 #include <linux/i2c.h>
30 #include <linux/mtd/mtd.h>
36 /**************************************************************************
40 **************************************************************************/
42 #define EFX_DRIVER_VERSION "3.2"
45 #define EFX_BUG_ON_PARANOID(x) BUG_ON(x)
46 #define EFX_WARN_ON_PARANOID(x) WARN_ON(x)
48 #define EFX_BUG_ON_PARANOID(x) do {} while (0)
49 #define EFX_WARN_ON_PARANOID(x) do {} while (0)
52 /**************************************************************************
56 **************************************************************************/
58 #define EFX_MAX_CHANNELS 32U
59 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
60 #define EFX_EXTRA_CHANNEL_IOV 0
61 #define EFX_EXTRA_CHANNEL_PTP 1
62 #define EFX_MAX_EXTRA_CHANNELS 2U
64 /* Checksum generation is a per-queue option in hardware, so each
65 * queue visible to the networking core is backed by two hardware TX
67 #define EFX_MAX_TX_TC 2
68 #define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS)
69 #define EFX_TXQ_TYPE_OFFLOAD 1 /* flag */
70 #define EFX_TXQ_TYPE_HIGHPRI 2 /* flag */
71 #define EFX_TXQ_TYPES 4
72 #define EFX_MAX_TX_QUEUES (EFX_TXQ_TYPES * EFX_MAX_CHANNELS)
74 /* Maximum possible MTU the driver supports */
75 #define EFX_MAX_MTU (9 * 1024)
77 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page,
78 * and should be a multiple of the cache line size.
80 #define EFX_RX_USR_BUF_SIZE (2048 - 256)
82 /* If possible, we should ensure cache line alignment at start and end
83 * of every buffer. Otherwise, we just need to ensure 4-byte
84 * alignment of the network header.
87 #define EFX_RX_BUF_ALIGNMENT L1_CACHE_BYTES
89 #define EFX_RX_BUF_ALIGNMENT 4
92 /* Forward declare Precision Time Protocol (PTP) support structure. */
95 struct efx_self_tests;
98 * struct efx_buffer - A general-purpose DMA buffer
99 * @addr: host base address of the buffer
100 * @dma_addr: DMA base address of the buffer
101 * @len: Buffer length, in bytes
103 * The NIC uses these buffers for its interrupt status registers and
113 * struct efx_special_buffer - DMA buffer entered into buffer table
114 * @buf: Standard &struct efx_buffer
115 * @index: Buffer index within controller;s buffer table
116 * @entries: Number of buffer table entries
118 * The NIC has a buffer table that maps buffers of size %EFX_BUF_SIZE.
119 * Event and descriptor rings are addressed via one or more buffer
120 * table entries (and so can be physically non-contiguous, although we
121 * currently do not take advantage of that). On Falcon and Siena we
122 * have to take care of allocating and initialising the entries
123 * ourselves. On later hardware this is managed by the firmware and
124 * @index and @entries are left as 0.
126 struct efx_special_buffer {
127 struct efx_buffer buf;
129 unsigned int entries;
133 * struct efx_tx_buffer - buffer state for a TX descriptor
134 * @skb: When @flags & %EFX_TX_BUF_SKB, the associated socket buffer to be
135 * freed when descriptor completes
136 * @heap_buf: When @flags & %EFX_TX_BUF_HEAP, the associated heap buffer to be
137 * freed when descriptor completes.
138 * @dma_addr: DMA address of the fragment.
139 * @flags: Flags for allocation and DMA mapping type
140 * @len: Length of this fragment.
141 * This field is zero when the queue slot is empty.
142 * @unmap_len: Length of this fragment to unmap
144 struct efx_tx_buffer {
146 const struct sk_buff *skb;
150 unsigned short flags;
152 unsigned short unmap_len;
154 #define EFX_TX_BUF_CONT 1 /* not last descriptor of packet */
155 #define EFX_TX_BUF_SKB 2 /* buffer is last part of skb */
156 #define EFX_TX_BUF_HEAP 4 /* buffer was allocated with kmalloc() */
157 #define EFX_TX_BUF_MAP_SINGLE 8 /* buffer was mapped with dma_map_single() */
160 * struct efx_tx_queue - An Efx TX queue
162 * This is a ring buffer of TX fragments.
163 * Since the TX completion path always executes on the same
164 * CPU and the xmit path can operate on different CPUs,
165 * performance is increased by ensuring that the completion
166 * path and the xmit path operate on different cache lines.
167 * This is particularly important if the xmit path is always
168 * executing on one CPU which is different from the completion
169 * path. There is also a cache line for members which are
170 * read but not written on the fast path.
172 * @efx: The associated Efx NIC
173 * @queue: DMA queue number
174 * @channel: The associated channel
175 * @core_txq: The networking core TX queue structure
176 * @buffer: The software buffer ring
177 * @tsoh_page: Array of pages of TSO header buffers
178 * @txd: The hardware descriptor ring
179 * @ptr_mask: The size of the ring minus 1.
180 * @initialised: Has hardware queue been initialised?
181 * @read_count: Current read pointer.
182 * This is the number of buffers that have been removed from both rings.
183 * @old_write_count: The value of @write_count when last checked.
184 * This is here for performance reasons. The xmit path will
185 * only get the up-to-date value of @write_count if this
186 * variable indicates that the queue is empty. This is to
187 * avoid cache-line ping-pong between the xmit path and the
189 * @insert_count: Current insert pointer
190 * This is the number of buffers that have been added to the
192 * @write_count: Current write pointer
193 * This is the number of buffers that have been added to the
195 * @old_read_count: The value of read_count when last checked.
196 * This is here for performance reasons. The xmit path will
197 * only get the up-to-date value of read_count if this
198 * variable indicates that the queue is full. This is to
199 * avoid cache-line ping-pong between the xmit path and the
201 * @tso_bursts: Number of times TSO xmit invoked by kernel
202 * @tso_long_headers: Number of packets with headers too long for standard
204 * @tso_packets: Number of packets via the TSO xmit path
205 * @pushes: Number of times the TX push feature has been used
206 * @empty_read_count: If the completion path has seen the queue as empty
207 * and the transmission path has not yet checked this, the value of
208 * @read_count bitwise-added to %EFX_EMPTY_COUNT_VALID; otherwise 0.
210 struct efx_tx_queue {
211 /* Members which don't change on the fast path */
212 struct efx_nic *efx ____cacheline_aligned_in_smp;
214 struct efx_channel *channel;
215 struct netdev_queue *core_txq;
216 struct efx_tx_buffer *buffer;
217 struct efx_buffer *tsoh_page;
218 struct efx_special_buffer txd;
219 unsigned int ptr_mask;
222 /* Members used mainly on the completion path */
223 unsigned int read_count ____cacheline_aligned_in_smp;
224 unsigned int old_write_count;
226 /* Members used only on the xmit path */
227 unsigned int insert_count ____cacheline_aligned_in_smp;
228 unsigned int write_count;
229 unsigned int old_read_count;
230 unsigned int tso_bursts;
231 unsigned int tso_long_headers;
232 unsigned int tso_packets;
235 /* Members shared between paths and sometimes updated */
236 unsigned int empty_read_count ____cacheline_aligned_in_smp;
237 #define EFX_EMPTY_COUNT_VALID 0x80000000
238 atomic_t flush_outstanding;
242 * struct efx_rx_buffer - An Efx RX data buffer
243 * @dma_addr: DMA base address of the buffer
244 * @page: The associated page buffer.
245 * Will be %NULL if the buffer slot is currently free.
246 * @page_offset: If pending: offset in @page of DMA base address.
247 * If completed: offset in @page of Ethernet header.
248 * @len: If pending: length for DMA descriptor.
249 * If completed: received length, excluding hash prefix.
250 * @flags: Flags for buffer and packet state. These are only set on the
251 * first buffer of a scattered packet.
253 struct efx_rx_buffer {
260 #define EFX_RX_BUF_LAST_IN_PAGE 0x0001
261 #define EFX_RX_PKT_CSUMMED 0x0002
262 #define EFX_RX_PKT_DISCARD 0x0004
263 #define EFX_RX_PKT_TCP 0x0040
266 * struct efx_rx_page_state - Page-based rx buffer state
268 * Inserted at the start of every page allocated for receive buffers.
269 * Used to facilitate sharing dma mappings between recycled rx buffers
270 * and those passed up to the kernel.
272 * @refcnt: Number of struct efx_rx_buffer's referencing this page.
273 * When refcnt falls to zero, the page is unmapped for dma
274 * @dma_addr: The dma address of this page.
276 struct efx_rx_page_state {
280 unsigned int __pad[0] ____cacheline_aligned;
284 * struct efx_rx_queue - An Efx RX queue
285 * @efx: The associated Efx NIC
286 * @core_index: Index of network core RX queue. Will be >= 0 iff this
287 * is associated with a real RX queue.
288 * @buffer: The software buffer ring
289 * @rxd: The hardware descriptor ring
290 * @ptr_mask: The size of the ring minus 1.
291 * @refill_enabled: Enable refill whenever fill level is low
292 * @flush_pending: Set when a RX flush is pending. Has the same lifetime as
293 * @rxq_flush_pending.
294 * @added_count: Number of buffers added to the receive queue.
295 * @notified_count: Number of buffers given to NIC (<= @added_count).
296 * @removed_count: Number of buffers removed from the receive queue.
297 * @scatter_n: Number of buffers used by current packet
298 * @page_ring: The ring to store DMA mapped pages for reuse.
299 * @page_add: Counter to calculate the write pointer for the recycle ring.
300 * @page_remove: Counter to calculate the read pointer for the recycle ring.
301 * @page_recycle_count: The number of pages that have been recycled.
302 * @page_recycle_failed: The number of pages that couldn't be recycled because
303 * the kernel still held a reference to them.
304 * @page_recycle_full: The number of pages that were released because the
305 * recycle ring was full.
306 * @page_ptr_mask: The number of pages in the RX recycle ring minus 1.
307 * @max_fill: RX descriptor maximum fill level (<= ring size)
308 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill
310 * @min_fill: RX descriptor minimum non-zero fill level.
311 * This records the minimum fill level observed when a ring
312 * refill was triggered.
313 * @recycle_count: RX buffer recycle counter.
314 * @slow_fill: Timer used to defer efx_nic_generate_fill_event().
316 struct efx_rx_queue {
319 struct efx_rx_buffer *buffer;
320 struct efx_special_buffer rxd;
321 unsigned int ptr_mask;
325 unsigned int added_count;
326 unsigned int notified_count;
327 unsigned int removed_count;
328 unsigned int scatter_n;
329 struct page **page_ring;
330 unsigned int page_add;
331 unsigned int page_remove;
332 unsigned int page_recycle_count;
333 unsigned int page_recycle_failed;
334 unsigned int page_recycle_full;
335 unsigned int page_ptr_mask;
336 unsigned int max_fill;
337 unsigned int fast_fill_trigger;
338 unsigned int min_fill;
339 unsigned int min_overfill;
340 unsigned int recycle_count;
341 struct timer_list slow_fill;
342 unsigned int slow_fill_count;
345 enum efx_rx_alloc_method {
346 RX_ALLOC_METHOD_AUTO = 0,
347 RX_ALLOC_METHOD_SKB = 1,
348 RX_ALLOC_METHOD_PAGE = 2,
352 * struct efx_channel - An Efx channel
354 * A channel comprises an event queue, at least one TX queue, at least
355 * one RX queue, and an associated tasklet for processing the event
358 * @efx: Associated Efx NIC
359 * @channel: Channel instance number
360 * @type: Channel type definition
361 * @eventq_init: Event queue initialised flag
362 * @enabled: Channel enabled indicator
363 * @irq: IRQ number (MSI and MSI-X only)
364 * @irq_moderation: IRQ moderation value (in hardware ticks)
365 * @napi_dev: Net device used with NAPI
366 * @napi_str: NAPI control structure
367 * @eventq: Event queue buffer
368 * @eventq_mask: Event queue pointer mask
369 * @eventq_read_ptr: Event queue read pointer
370 * @event_test_cpu: Last CPU to handle interrupt or test event for this channel
371 * @irq_count: Number of IRQs since last adaptive moderation decision
372 * @irq_mod_score: IRQ moderation score
373 * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors
374 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
375 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
376 * @n_rx_mcast_mismatch: Count of unmatched multicast frames
377 * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors
378 * @n_rx_overlength: Count of RX_OVERLENGTH errors
379 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
380 * @n_rx_nodesc_trunc: Number of RX packets truncated and then dropped due to
381 * lack of descriptors
382 * @rx_pkt_n_frags: Number of fragments in next packet to be delivered by
383 * __efx_rx_packet(), or zero if there is none
384 * @rx_pkt_index: Ring index of first buffer for next packet to be delivered
385 * by __efx_rx_packet(), if @rx_pkt_n_frags != 0
386 * @rx_queue: RX queue for this channel
387 * @tx_queue: TX queues for this channel
392 const struct efx_channel_type *type;
396 unsigned int irq_moderation;
397 struct net_device *napi_dev;
398 struct napi_struct napi_str;
399 struct efx_special_buffer eventq;
400 unsigned int eventq_mask;
401 unsigned int eventq_read_ptr;
404 unsigned int irq_count;
405 unsigned int irq_mod_score;
406 #ifdef CONFIG_RFS_ACCEL
407 unsigned int rfs_filters_added;
410 unsigned n_rx_tobe_disc;
411 unsigned n_rx_ip_hdr_chksum_err;
412 unsigned n_rx_tcp_udp_chksum_err;
413 unsigned n_rx_mcast_mismatch;
414 unsigned n_rx_frm_trunc;
415 unsigned n_rx_overlength;
416 unsigned n_skbuff_leaks;
417 unsigned int n_rx_nodesc_trunc;
419 unsigned int rx_pkt_n_frags;
420 unsigned int rx_pkt_index;
422 struct efx_rx_queue rx_queue;
423 struct efx_tx_queue tx_queue[EFX_TXQ_TYPES];
427 * struct efx_msi_context - Context for each MSI
428 * @efx: The associated NIC
429 * @index: Index of the channel/IRQ
430 * @name: Name of the channel/IRQ
432 * Unlike &struct efx_channel, this is never reallocated and is always
433 * safe for the IRQ handler to access.
435 struct efx_msi_context {
438 char name[IFNAMSIZ + 6];
442 * struct efx_channel_type - distinguishes traffic and extra channels
443 * @handle_no_channel: Handle failure to allocate an extra channel
444 * @pre_probe: Set up extra state prior to initialisation
445 * @post_remove: Tear down extra state after finalisation, if allocated.
446 * May be called on channels that have not been probed.
447 * @get_name: Generate the channel's name (used for its IRQ handler)
448 * @copy: Copy the channel state prior to reallocation. May be %NULL if
449 * reallocation is not supported.
450 * @receive_skb: Handle an skb ready to be passed to netif_receive_skb()
451 * @keep_eventq: Flag for whether event queue should be kept initialised
452 * while the device is stopped
454 struct efx_channel_type {
455 void (*handle_no_channel)(struct efx_nic *);
456 int (*pre_probe)(struct efx_channel *);
457 void (*post_remove)(struct efx_channel *);
458 void (*get_name)(struct efx_channel *, char *buf, size_t len);
459 struct efx_channel *(*copy)(const struct efx_channel *);
460 bool (*receive_skb)(struct efx_channel *, struct sk_buff *);
470 #define STRING_TABLE_LOOKUP(val, member) \
471 ((val) < member ## _max) ? member ## _names[val] : "(invalid)"
473 extern const char *const efx_loopback_mode_names[];
474 extern const unsigned int efx_loopback_mode_max;
475 #define LOOPBACK_MODE(efx) \
476 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode)
478 extern const char *const efx_reset_type_names[];
479 extern const unsigned int efx_reset_type_max;
480 #define RESET_TYPE(type) \
481 STRING_TABLE_LOOKUP(type, efx_reset_type)
484 /* Be careful if altering to correct macro below */
485 EFX_INT_MODE_MSIX = 0,
486 EFX_INT_MODE_MSI = 1,
487 EFX_INT_MODE_LEGACY = 2,
488 EFX_INT_MODE_MAX /* Insert any new items before this */
490 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
493 STATE_UNINIT = 0, /* device being probed/removed or is frozen */
494 STATE_READY = 1, /* hardware ready and netdev registered */
495 STATE_DISABLED = 2, /* device disabled due to hardware errors */
496 STATE_RECOVERY = 3, /* device recovering from PCI error */
500 * Alignment of the skb->head which wraps a page-allocated RX buffer
502 * The skb allocated to wrap an rx_buffer can have this alignment. Since
503 * the data is memcpy'd from the rx_buf, it does not need to be equal to
506 #define EFX_PAGE_SKB_ALIGN 2
508 /* Forward declaration */
511 /* Pseudo bit-mask flow control field */
512 #define EFX_FC_RX FLOW_CTRL_RX
513 #define EFX_FC_TX FLOW_CTRL_TX
514 #define EFX_FC_AUTO 4
517 * struct efx_link_state - Current state of the link
519 * @fd: Link is full-duplex
520 * @fc: Actual flow control flags
521 * @speed: Link speed (Mbps)
523 struct efx_link_state {
530 static inline bool efx_link_state_equal(const struct efx_link_state *left,
531 const struct efx_link_state *right)
533 return left->up == right->up && left->fd == right->fd &&
534 left->fc == right->fc && left->speed == right->speed;
538 * struct efx_phy_operations - Efx PHY operations table
539 * @probe: Probe PHY and initialise efx->mdio.mode_support, efx->mdio.mmds,
540 * efx->loopback_modes.
541 * @init: Initialise PHY
542 * @fini: Shut down PHY
543 * @reconfigure: Reconfigure PHY (e.g. for new link parameters)
544 * @poll: Update @link_state and report whether it changed.
545 * Serialised by the mac_lock.
546 * @get_settings: Get ethtool settings. Serialised by the mac_lock.
547 * @set_settings: Set ethtool settings. Serialised by the mac_lock.
548 * @set_npage_adv: Set abilities advertised in (Extended) Next Page
549 * (only needed where AN bit is set in mmds)
550 * @test_alive: Test that PHY is 'alive' (online)
551 * @test_name: Get the name of a PHY-specific test/result
552 * @run_tests: Run tests and record results as appropriate (offline).
553 * Flags are the ethtool tests flags.
555 struct efx_phy_operations {
556 int (*probe) (struct efx_nic *efx);
557 int (*init) (struct efx_nic *efx);
558 void (*fini) (struct efx_nic *efx);
559 void (*remove) (struct efx_nic *efx);
560 int (*reconfigure) (struct efx_nic *efx);
561 bool (*poll) (struct efx_nic *efx);
562 void (*get_settings) (struct efx_nic *efx,
563 struct ethtool_cmd *ecmd);
564 int (*set_settings) (struct efx_nic *efx,
565 struct ethtool_cmd *ecmd);
566 void (*set_npage_adv) (struct efx_nic *efx, u32);
567 int (*test_alive) (struct efx_nic *efx);
568 const char *(*test_name) (struct efx_nic *efx, unsigned int index);
569 int (*run_tests) (struct efx_nic *efx, int *results, unsigned flags);
570 int (*get_module_eeprom) (struct efx_nic *efx,
571 struct ethtool_eeprom *ee,
573 int (*get_module_info) (struct efx_nic *efx,
574 struct ethtool_modinfo *modinfo);
578 * enum efx_phy_mode - PHY operating mode flags
579 * @PHY_MODE_NORMAL: on and should pass traffic
580 * @PHY_MODE_TX_DISABLED: on with TX disabled
581 * @PHY_MODE_LOW_POWER: set to low power through MDIO
582 * @PHY_MODE_OFF: switched off through external control
583 * @PHY_MODE_SPECIAL: on but will not pass traffic
587 PHY_MODE_TX_DISABLED = 1,
588 PHY_MODE_LOW_POWER = 2,
590 PHY_MODE_SPECIAL = 8,
593 static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode)
595 return !!(mode & ~PHY_MODE_TX_DISABLED);
599 * struct efx_hw_stat_desc - Description of a hardware statistic
600 * @name: Name of the statistic as visible through ethtool, or %NULL if
601 * it should not be exposed
602 * @dma_width: Width in bits (0 for non-DMA statistics)
603 * @offset: Offset within stats (ignored for non-DMA statistics)
605 struct efx_hw_stat_desc {
611 /* Number of bits used in a multicast filter hash address */
612 #define EFX_MCAST_HASH_BITS 8
614 /* Number of (single-bit) entries in a multicast filter hash */
615 #define EFX_MCAST_HASH_ENTRIES (1 << EFX_MCAST_HASH_BITS)
617 /* An Efx multicast filter hash */
618 union efx_multicast_hash {
619 u8 byte[EFX_MCAST_HASH_ENTRIES / 8];
620 efx_oword_t oword[EFX_MCAST_HASH_ENTRIES / sizeof(efx_oword_t) / 8];
627 * struct efx_nic - an Efx NIC
628 * @name: Device name (net device name or bus id before net device registered)
629 * @pci_dev: The PCI device
630 * @type: Controller type attributes
631 * @legacy_irq: IRQ number
632 * @workqueue: Workqueue for port reconfigures and the HW monitor.
633 * Work items do not hold and must not acquire RTNL.
634 * @workqueue_name: Name of workqueue
635 * @reset_work: Scheduled reset workitem
636 * @membase_phys: Memory BAR value as physical address
637 * @membase: Memory BAR value
638 * @interrupt_mode: Interrupt mode
639 * @timer_quantum_ns: Interrupt timer quantum, in nanoseconds
640 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
641 * @irq_rx_moderation: IRQ moderation time for RX event queues
642 * @msg_enable: Log message enable flags
643 * @state: Device state number (%STATE_*). Serialised by the rtnl_lock.
644 * @reset_pending: Bitmask for pending resets
645 * @tx_queue: TX DMA queues
646 * @rx_queue: RX DMA queues
648 * @msi_context: Context for each MSI
649 * @extra_channel_types: Types of extra (non-traffic) channels that
650 * should be allocated for this NIC
651 * @rxq_entries: Size of receive queues requested by user.
652 * @txq_entries: Size of transmit queues requested by user.
653 * @txq_stop_thresh: TX queue fill level at or above which we stop it.
654 * @txq_wake_thresh: TX queue fill level at or below which we wake it.
655 * @tx_dc_base: Base qword address in SRAM of TX queue descriptor caches
656 * @rx_dc_base: Base qword address in SRAM of RX queue descriptor caches
657 * @sram_lim_qw: Qword address limit of SRAM
658 * @next_buffer_table: First available buffer table id
659 * @n_channels: Number of channels in use
660 * @n_rx_channels: Number of channels used for RX (= number of RX queues)
661 * @n_tx_channels: Number of channels used for TX
662 * @rx_dma_len: Current maximum RX DMA length
663 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
664 * @rx_buffer_truesize: Amortised allocation size of an RX buffer,
665 * for use in sk_buff::truesize
666 * @rx_hash_key: Toeplitz hash key for RSS
667 * @rx_indir_table: Indirection table for RSS
668 * @rx_scatter: Scatter mode enabled for receives
669 * @int_error_count: Number of internal errors seen recently
670 * @int_error_expire: Time at which error count will be expired
671 * @irq_soft_enabled: Are IRQs soft-enabled? If not, IRQ handler will
672 * acknowledge but do nothing else.
673 * @irq_status: Interrupt status buffer
674 * @irq_zero_count: Number of legacy IRQs seen with queue flags == 0
675 * @irq_level: IRQ level/index for IRQs not triggered by an event queue
676 * @selftest_work: Work item for asynchronous self-test
677 * @mtd_list: List of MTDs attached to the NIC
678 * @nic_data: Hardware dependent state
679 * @mcdi: Management-Controller-to-Driver Interface state
680 * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode,
681 * efx_monitor() and efx_reconfigure_port()
682 * @port_enabled: Port enabled indicator.
683 * Serialises efx_stop_all(), efx_start_all(), efx_monitor() and
684 * efx_mac_work() with kernel interfaces. Safe to read under any
685 * one of the rtnl_lock, mac_lock, or netif_tx_lock, but all three must
686 * be held to modify it.
687 * @port_initialized: Port initialized?
688 * @net_dev: Operating system network device. Consider holding the rtnl lock
689 * @stats_buffer: DMA buffer for statistics
690 * @phy_type: PHY type
691 * @phy_op: PHY interface
692 * @phy_data: PHY private data (including PHY-specific stats)
693 * @mdio: PHY MDIO interface
694 * @mdio_bus: PHY MDIO bus ID (only used by Siena)
695 * @phy_mode: PHY operating mode. Serialised by @mac_lock.
696 * @link_advertising: Autonegotiation advertising flags
697 * @link_state: Current state of the link
698 * @n_link_state_changes: Number of times the link has changed state
699 * @unicast_filter: Flag for Falcon-arch simple unicast filter.
700 * Protected by @mac_lock.
701 * @multicast_hash: Multicast hash table for Falcon-arch.
702 * Protected by @mac_lock.
703 * @wanted_fc: Wanted flow control flags
704 * @fc_disable: When non-zero flow control is disabled. Typically used to
705 * ensure that network back pressure doesn't delay dma queue flushes.
706 * Serialised by the rtnl lock.
707 * @mac_work: Work item for changing MAC promiscuity and multicast hash
708 * @loopback_mode: Loopback status
709 * @loopback_modes: Supported loopback mode bitmask
710 * @loopback_selftest: Offline self-test private state
711 * @filter_lock: Filter table lock
712 * @filter_state: Architecture-dependent filter table state
713 * @rps_flow_id: Flow IDs of filters allocated for accelerated RFS,
714 * indexed by filter ID
715 * @rps_expire_index: Next index to check for expiry in @rps_flow_id
716 * @drain_pending: Count of RX and TX queues that haven't been flushed and drained.
717 * @rxq_flush_pending: Count of number of receive queues that need to be flushed.
718 * Decremented when the efx_flush_rx_queue() is called.
719 * @rxq_flush_outstanding: Count of number of RX flushes started but not yet
720 * completed (either success or failure). Not used when MCDI is used to
721 * flush receive queues.
722 * @flush_wq: wait queue used by efx_nic_flush_queues() to wait for flush completions.
723 * @vf: Array of &struct efx_vf objects.
724 * @vf_count: Number of VFs intended to be enabled.
725 * @vf_init_count: Number of VFs that have been fully initialised.
726 * @vi_scale: log2 number of vnics per VF.
727 * @vf_buftbl_base: The zeroth buffer table index used to back VF queues.
728 * @vfdi_status: Common VFDI status page to be dmad to VF address space.
729 * @local_addr_list: List of local addresses. Protected by %local_lock.
730 * @local_page_list: List of DMA addressable pages used to broadcast
731 * %local_addr_list. Protected by %local_lock.
732 * @local_lock: Mutex protecting %local_addr_list and %local_page_list.
733 * @peer_work: Work item to broadcast peer addresses to VMs.
734 * @ptp_data: PTP state data
735 * @monitor_work: Hardware monitor workitem
736 * @biu_lock: BIU (bus interface unit) lock
737 * @last_irq_cpu: Last CPU to handle a possible test interrupt. This
738 * field is used by efx_test_interrupts() to verify that an
739 * interrupt has occurred.
740 * @stats_lock: Statistics update lock. Must be held when calling
741 * efx_nic_type::{update,start,stop}_stats.
743 * This is stored in the private area of the &struct net_device.
746 /* The following fields should be written very rarely */
749 struct pci_dev *pci_dev;
750 unsigned int port_num;
751 const struct efx_nic_type *type;
753 bool eeh_disabled_legacy_irq;
754 struct workqueue_struct *workqueue;
755 char workqueue_name[16];
756 struct work_struct reset_work;
757 resource_size_t membase_phys;
758 void __iomem *membase;
760 enum efx_int_mode interrupt_mode;
761 unsigned int timer_quantum_ns;
762 bool irq_rx_adaptive;
763 unsigned int irq_rx_moderation;
766 enum nic_state state;
767 unsigned long reset_pending;
769 struct efx_channel *channel[EFX_MAX_CHANNELS];
770 struct efx_msi_context msi_context[EFX_MAX_CHANNELS];
771 const struct efx_channel_type *
772 extra_channel_type[EFX_MAX_EXTRA_CHANNELS];
774 unsigned rxq_entries;
775 unsigned txq_entries;
776 unsigned int txq_stop_thresh;
777 unsigned int txq_wake_thresh;
781 unsigned sram_lim_qw;
782 unsigned next_buffer_table;
784 unsigned int max_channels;
786 unsigned n_rx_channels;
788 unsigned tx_channel_offset;
789 unsigned n_tx_channels;
790 unsigned int rx_dma_len;
791 unsigned int rx_buffer_order;
792 unsigned int rx_buffer_truesize;
793 unsigned int rx_page_buf_step;
794 unsigned int rx_bufs_per_page;
795 unsigned int rx_pages_per_batch;
797 u32 rx_indir_table[128];
800 unsigned int_error_count;
801 unsigned long int_error_expire;
803 bool irq_soft_enabled;
804 struct efx_buffer irq_status;
805 unsigned irq_zero_count;
807 struct delayed_work selftest_work;
809 #ifdef CONFIG_SFC_MTD
810 struct list_head mtd_list;
814 struct efx_mcdi_data *mcdi;
816 struct mutex mac_lock;
817 struct work_struct mac_work;
820 bool port_initialized;
821 struct net_device *net_dev;
823 struct efx_buffer stats_buffer;
825 unsigned int phy_type;
826 const struct efx_phy_operations *phy_op;
828 struct mdio_if_info mdio;
829 unsigned int mdio_bus;
830 enum efx_phy_mode phy_mode;
832 u32 link_advertising;
833 struct efx_link_state link_state;
834 unsigned int n_link_state_changes;
837 union efx_multicast_hash multicast_hash;
842 enum efx_loopback_mode loopback_mode;
845 void *loopback_selftest;
847 spinlock_t filter_lock;
849 #ifdef CONFIG_RFS_ACCEL
851 unsigned int rps_expire_index;
854 atomic_t drain_pending;
855 atomic_t rxq_flush_pending;
856 atomic_t rxq_flush_outstanding;
857 wait_queue_head_t flush_wq;
859 #ifdef CONFIG_SFC_SRIOV
860 struct efx_channel *vfdi_channel;
863 unsigned vf_init_count;
865 unsigned vf_buftbl_base;
866 struct efx_buffer vfdi_status;
867 struct list_head local_addr_list;
868 struct list_head local_page_list;
869 struct mutex local_lock;
870 struct work_struct peer_work;
873 struct efx_ptp_data *ptp_data;
875 /* The following fields may be written more often */
877 struct delayed_work monitor_work ____cacheline_aligned_in_smp;
880 spinlock_t stats_lock;
883 static inline int efx_dev_registered(struct efx_nic *efx)
885 return efx->net_dev->reg_state == NETREG_REGISTERED;
888 static inline unsigned int efx_port_num(struct efx_nic *efx)
890 return efx->port_num;
893 struct efx_mtd_partition {
894 struct list_head node;
896 const char *dev_type_name;
897 const char *type_name;
898 char name[IFNAMSIZ + 20];
902 * struct efx_nic_type - Efx device type definition
903 * @mem_map_size: Get memory BAR mapped size
904 * @probe: Probe the controller
905 * @remove: Free resources allocated by probe()
906 * @init: Initialise the controller
907 * @dimension_resources: Dimension controller resources (buffer table,
908 * and VIs once the available interrupt resources are clear)
909 * @fini: Shut down the controller
910 * @monitor: Periodic function for polling link state and hardware monitor
911 * @map_reset_reason: Map ethtool reset reason to a reset method
912 * @map_reset_flags: Map ethtool reset flags to a reset method, if possible
913 * @reset: Reset the controller hardware and possibly the PHY. This will
914 * be called while the controller is uninitialised.
915 * @probe_port: Probe the MAC and PHY
916 * @remove_port: Free resources allocated by probe_port()
917 * @handle_global_event: Handle a "global" event (may be %NULL)
918 * @fini_dmaq: Flush and finalise DMA queues (RX and TX queues)
919 * @prepare_flush: Prepare the hardware for flushing the DMA queues
920 * (for Falcon architecture)
921 * @finish_flush: Clean up after flushing the DMA queues (for Falcon
923 * @describe_stats: Describe statistics for ethtool
924 * @update_stats: Update statistics not provided by event handling.
925 * Either argument may be %NULL.
926 * @start_stats: Start the regular fetching of statistics
927 * @stop_stats: Stop the regular fetching of statistics
928 * @set_id_led: Set state of identifying LED or revert to automatic function
929 * @push_irq_moderation: Apply interrupt moderation value
930 * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY
931 * @prepare_enable_fc_tx: Prepare MAC to enable pause frame TX (may be %NULL)
932 * @reconfigure_mac: Push MAC address, MTU, flow control and filter settings
933 * to the hardware. Serialised by the mac_lock.
934 * @check_mac_fault: Check MAC fault state. True if fault present.
935 * @get_wol: Get WoL configuration from driver state
936 * @set_wol: Push WoL configuration to the NIC
937 * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume)
938 * @test_chip: Test registers. May use efx_farch_test_registers(), and is
939 * expected to reset the NIC.
940 * @test_nvram: Test validity of NVRAM contents
941 * @mcdi_request: Send an MCDI request with the given header and SDU.
942 * The SDU length may be any value from 0 up to the protocol-
943 * defined maximum, but its buffer will be padded to a multiple
945 * @mcdi_poll_response: Test whether an MCDI response is available.
946 * @mcdi_read_response: Read the MCDI response PDU. The offset will
947 * be a multiple of 4. The length may not be, but the buffer
948 * will be padded so it is safe to round up.
949 * @mcdi_poll_reboot: Test whether the MCDI has rebooted. If so,
950 * return an appropriate error code for aborting any current
951 * request; otherwise return 0.
952 * @irq_enable_master: Enable IRQs on the NIC. Each event queue must
953 * be separately enabled after this.
954 * @irq_test_generate: Generate a test IRQ
955 * @irq_disable_non_ev: Disable non-event IRQs on the NIC. Each event
956 * queue must be separately disabled before this.
957 * @irq_handle_msi: Handle MSI for a channel. The @dev_id argument is
958 * a pointer to the &struct efx_msi_context for the channel.
959 * @irq_handle_legacy: Handle legacy interrupt. The @dev_id argument
960 * is a pointer to the &struct efx_nic.
961 * @tx_probe: Allocate resources for TX queue
962 * @tx_init: Initialise TX queue on the NIC
963 * @tx_remove: Free resources for TX queue
964 * @tx_write: Write TX descriptors and doorbell
965 * @rx_push_indir_table: Write RSS indirection table to the NIC
966 * @rx_probe: Allocate resources for RX queue
967 * @rx_init: Initialise RX queue on the NIC
968 * @rx_remove: Free resources for RX queue
969 * @rx_write: Write RX descriptors and doorbell
970 * @rx_defer_refill: Generate a refill reminder event
971 * @ev_probe: Allocate resources for event queue
972 * @ev_init: Initialise event queue on the NIC
973 * @ev_fini: Deinitialise event queue on the NIC
974 * @ev_remove: Free resources for event queue
975 * @ev_process: Process events for a queue, up to the given NAPI quota
976 * @ev_read_ack: Acknowledge read events on a queue, rearming its IRQ
977 * @ev_test_generate: Generate a test event
978 * @filter_table_probe: Probe filter capabilities and set up filter software state
979 * @filter_table_restore: Restore filters removed from hardware
980 * @filter_table_remove: Remove filters from hardware and tear down software state
981 * @filter_update_rx_scatter: Update filters after change to rx scatter setting
982 * @filter_insert: add or replace a filter
983 * @filter_remove_safe: remove a filter by ID, carefully
984 * @filter_get_safe: retrieve a filter by ID, carefully
985 * @filter_clear_rx: remove RX filters by priority
986 * @filter_count_rx_used: Get the number of filters in use at a given priority
987 * @filter_get_rx_id_limit: Get maximum value of a filter id, plus 1
988 * @filter_get_rx_ids: Get list of RX filters at a given priority
989 * @filter_rfs_insert: Add or replace a filter for RFS. This must be
990 * atomic. The hardware change may be asynchronous but should
991 * not be delayed for long. It may fail if this can't be done
993 * @filter_rfs_expire_one: Consider expiring a filter inserted for RFS.
994 * This must check whether the specified table entry is used by RFS
995 * and that rps_may_expire_flow() returns true for it.
996 * @mtd_probe: Probe and add MTD partitions associated with this net device,
997 * using efx_mtd_add()
998 * @mtd_rename: Set an MTD partition name using the net device name
999 * @mtd_read: Read from an MTD partition
1000 * @mtd_erase: Erase part of an MTD partition
1001 * @mtd_write: Write to an MTD partition
1002 * @mtd_sync: Wait for write-back to complete on MTD partition. This
1003 * also notifies the driver that a writer has finished using this
1005 * @revision: Hardware architecture revision
1006 * @txd_ptr_tbl_base: TX descriptor ring base address
1007 * @rxd_ptr_tbl_base: RX descriptor ring base address
1008 * @buf_tbl_base: Buffer table base address
1009 * @evq_ptr_tbl_base: Event queue pointer table base address
1010 * @evq_rptr_tbl_base: Event queue read-pointer table base address
1011 * @max_dma_mask: Maximum possible DMA mask
1012 * @rx_buffer_hash_size: Size of hash at start of RX packet
1013 * @rx_buffer_padding: Size of padding at end of RX packet
1014 * @can_rx_scatter: NIC is able to scatter packet to multiple buffers
1015 * @max_interrupt_mode: Highest capability interrupt mode supported
1016 * from &enum efx_init_mode.
1017 * @timer_period_max: Maximum period of interrupt timer (in ticks)
1018 * @offload_features: net_device feature flags for protocol offload
1019 * features implemented in hardware
1020 * @mcdi_max_ver: Maximum MCDI version supported
1022 struct efx_nic_type {
1023 unsigned int (*mem_map_size)(struct efx_nic *efx);
1024 int (*probe)(struct efx_nic *efx);
1025 void (*remove)(struct efx_nic *efx);
1026 int (*init)(struct efx_nic *efx);
1027 void (*dimension_resources)(struct efx_nic *efx);
1028 void (*fini)(struct efx_nic *efx);
1029 void (*monitor)(struct efx_nic *efx);
1030 enum reset_type (*map_reset_reason)(enum reset_type reason);
1031 int (*map_reset_flags)(u32 *flags);
1032 int (*reset)(struct efx_nic *efx, enum reset_type method);
1033 int (*probe_port)(struct efx_nic *efx);
1034 void (*remove_port)(struct efx_nic *efx);
1035 bool (*handle_global_event)(struct efx_channel *channel, efx_qword_t *);
1036 int (*fini_dmaq)(struct efx_nic *efx);
1037 void (*prepare_flush)(struct efx_nic *efx);
1038 void (*finish_flush)(struct efx_nic *efx);
1039 size_t (*describe_stats)(struct efx_nic *efx, u8 *names);
1040 size_t (*update_stats)(struct efx_nic *efx, u64 *full_stats,
1041 struct rtnl_link_stats64 *core_stats);
1042 void (*start_stats)(struct efx_nic *efx);
1043 void (*stop_stats)(struct efx_nic *efx);
1044 void (*set_id_led)(struct efx_nic *efx, enum efx_led_mode mode);
1045 void (*push_irq_moderation)(struct efx_channel *channel);
1046 int (*reconfigure_port)(struct efx_nic *efx);
1047 void (*prepare_enable_fc_tx)(struct efx_nic *efx);
1048 int (*reconfigure_mac)(struct efx_nic *efx);
1049 bool (*check_mac_fault)(struct efx_nic *efx);
1050 void (*get_wol)(struct efx_nic *efx, struct ethtool_wolinfo *wol);
1051 int (*set_wol)(struct efx_nic *efx, u32 type);
1052 void (*resume_wol)(struct efx_nic *efx);
1053 int (*test_chip)(struct efx_nic *efx, struct efx_self_tests *tests);
1054 int (*test_nvram)(struct efx_nic *efx);
1055 void (*mcdi_request)(struct efx_nic *efx,
1056 const efx_dword_t *hdr, size_t hdr_len,
1057 const efx_dword_t *sdu, size_t sdu_len);
1058 bool (*mcdi_poll_response)(struct efx_nic *efx);
1059 void (*mcdi_read_response)(struct efx_nic *efx, efx_dword_t *pdu,
1060 size_t pdu_offset, size_t pdu_len);
1061 int (*mcdi_poll_reboot)(struct efx_nic *efx);
1062 void (*irq_enable_master)(struct efx_nic *efx);
1063 void (*irq_test_generate)(struct efx_nic *efx);
1064 void (*irq_disable_non_ev)(struct efx_nic *efx);
1065 irqreturn_t (*irq_handle_msi)(int irq, void *dev_id);
1066 irqreturn_t (*irq_handle_legacy)(int irq, void *dev_id);
1067 int (*tx_probe)(struct efx_tx_queue *tx_queue);
1068 void (*tx_init)(struct efx_tx_queue *tx_queue);
1069 void (*tx_remove)(struct efx_tx_queue *tx_queue);
1070 void (*tx_write)(struct efx_tx_queue *tx_queue);
1071 void (*rx_push_indir_table)(struct efx_nic *efx);
1072 int (*rx_probe)(struct efx_rx_queue *rx_queue);
1073 void (*rx_init)(struct efx_rx_queue *rx_queue);
1074 void (*rx_remove)(struct efx_rx_queue *rx_queue);
1075 void (*rx_write)(struct efx_rx_queue *rx_queue);
1076 void (*rx_defer_refill)(struct efx_rx_queue *rx_queue);
1077 int (*ev_probe)(struct efx_channel *channel);
1078 void (*ev_init)(struct efx_channel *channel);
1079 void (*ev_fini)(struct efx_channel *channel);
1080 void (*ev_remove)(struct efx_channel *channel);
1081 int (*ev_process)(struct efx_channel *channel, int quota);
1082 void (*ev_read_ack)(struct efx_channel *channel);
1083 void (*ev_test_generate)(struct efx_channel *channel);
1084 int (*filter_table_probe)(struct efx_nic *efx);
1085 void (*filter_table_restore)(struct efx_nic *efx);
1086 void (*filter_table_remove)(struct efx_nic *efx);
1087 void (*filter_update_rx_scatter)(struct efx_nic *efx);
1088 s32 (*filter_insert)(struct efx_nic *efx,
1089 struct efx_filter_spec *spec, bool replace);
1090 int (*filter_remove_safe)(struct efx_nic *efx,
1091 enum efx_filter_priority priority,
1093 int (*filter_get_safe)(struct efx_nic *efx,
1094 enum efx_filter_priority priority,
1095 u32 filter_id, struct efx_filter_spec *);
1096 void (*filter_clear_rx)(struct efx_nic *efx,
1097 enum efx_filter_priority priority);
1098 u32 (*filter_count_rx_used)(struct efx_nic *efx,
1099 enum efx_filter_priority priority);
1100 u32 (*filter_get_rx_id_limit)(struct efx_nic *efx);
1101 s32 (*filter_get_rx_ids)(struct efx_nic *efx,
1102 enum efx_filter_priority priority,
1103 u32 *buf, u32 size);
1104 #ifdef CONFIG_RFS_ACCEL
1105 s32 (*filter_rfs_insert)(struct efx_nic *efx,
1106 struct efx_filter_spec *spec);
1107 bool (*filter_rfs_expire_one)(struct efx_nic *efx, u32 flow_id,
1108 unsigned int index);
1110 #ifdef CONFIG_SFC_MTD
1111 int (*mtd_probe)(struct efx_nic *efx);
1112 void (*mtd_rename)(struct efx_mtd_partition *part);
1113 int (*mtd_read)(struct mtd_info *mtd, loff_t start, size_t len,
1114 size_t *retlen, u8 *buffer);
1115 int (*mtd_erase)(struct mtd_info *mtd, loff_t start, size_t len);
1116 int (*mtd_write)(struct mtd_info *mtd, loff_t start, size_t len,
1117 size_t *retlen, const u8 *buffer);
1118 int (*mtd_sync)(struct mtd_info *mtd);
1120 void (*ptp_write_host_time)(struct efx_nic *efx, u32 host_time);
1123 unsigned int txd_ptr_tbl_base;
1124 unsigned int rxd_ptr_tbl_base;
1125 unsigned int buf_tbl_base;
1126 unsigned int evq_ptr_tbl_base;
1127 unsigned int evq_rptr_tbl_base;
1129 unsigned int rx_buffer_hash_size;
1130 unsigned int rx_buffer_padding;
1131 bool can_rx_scatter;
1132 unsigned int max_interrupt_mode;
1133 unsigned int timer_period_max;
1134 netdev_features_t offload_features;
1136 unsigned int max_rx_ip_filters;
1139 /**************************************************************************
1141 * Prototypes and inline functions
1143 *************************************************************************/
1145 static inline struct efx_channel *
1146 efx_get_channel(struct efx_nic *efx, unsigned index)
1148 EFX_BUG_ON_PARANOID(index >= efx->n_channels);
1149 return efx->channel[index];
1152 /* Iterate over all used channels */
1153 #define efx_for_each_channel(_channel, _efx) \
1154 for (_channel = (_efx)->channel[0]; \
1156 _channel = (_channel->channel + 1 < (_efx)->n_channels) ? \
1157 (_efx)->channel[_channel->channel + 1] : NULL)
1159 /* Iterate over all used channels in reverse */
1160 #define efx_for_each_channel_rev(_channel, _efx) \
1161 for (_channel = (_efx)->channel[(_efx)->n_channels - 1]; \
1163 _channel = _channel->channel ? \
1164 (_efx)->channel[_channel->channel - 1] : NULL)
1166 static inline struct efx_tx_queue *
1167 efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type)
1169 EFX_BUG_ON_PARANOID(index >= efx->n_tx_channels ||
1170 type >= EFX_TXQ_TYPES);
1171 return &efx->channel[efx->tx_channel_offset + index]->tx_queue[type];
1174 static inline bool efx_channel_has_tx_queues(struct efx_channel *channel)
1176 return channel->channel - channel->efx->tx_channel_offset <
1177 channel->efx->n_tx_channels;
1180 static inline struct efx_tx_queue *
1181 efx_channel_get_tx_queue(struct efx_channel *channel, unsigned type)
1183 EFX_BUG_ON_PARANOID(!efx_channel_has_tx_queues(channel) ||
1184 type >= EFX_TXQ_TYPES);
1185 return &channel->tx_queue[type];
1188 static inline bool efx_tx_queue_used(struct efx_tx_queue *tx_queue)
1190 return !(tx_queue->efx->net_dev->num_tc < 2 &&
1191 tx_queue->queue & EFX_TXQ_TYPE_HIGHPRI);
1194 /* Iterate over all TX queues belonging to a channel */
1195 #define efx_for_each_channel_tx_queue(_tx_queue, _channel) \
1196 if (!efx_channel_has_tx_queues(_channel)) \
1199 for (_tx_queue = (_channel)->tx_queue; \
1200 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES && \
1201 efx_tx_queue_used(_tx_queue); \
1204 /* Iterate over all possible TX queues belonging to a channel */
1205 #define efx_for_each_possible_channel_tx_queue(_tx_queue, _channel) \
1206 if (!efx_channel_has_tx_queues(_channel)) \
1209 for (_tx_queue = (_channel)->tx_queue; \
1210 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES; \
1213 static inline bool efx_channel_has_rx_queue(struct efx_channel *channel)
1215 return channel->rx_queue.core_index >= 0;
1218 static inline struct efx_rx_queue *
1219 efx_channel_get_rx_queue(struct efx_channel *channel)
1221 EFX_BUG_ON_PARANOID(!efx_channel_has_rx_queue(channel));
1222 return &channel->rx_queue;
1225 /* Iterate over all RX queues belonging to a channel */
1226 #define efx_for_each_channel_rx_queue(_rx_queue, _channel) \
1227 if (!efx_channel_has_rx_queue(_channel)) \
1230 for (_rx_queue = &(_channel)->rx_queue; \
1234 static inline struct efx_channel *
1235 efx_rx_queue_channel(struct efx_rx_queue *rx_queue)
1237 return container_of(rx_queue, struct efx_channel, rx_queue);
1240 static inline int efx_rx_queue_index(struct efx_rx_queue *rx_queue)
1242 return efx_rx_queue_channel(rx_queue)->channel;
1245 /* Returns a pointer to the specified receive buffer in the RX
1248 static inline struct efx_rx_buffer *efx_rx_buffer(struct efx_rx_queue *rx_queue,
1251 return &rx_queue->buffer[index];
1256 * EFX_MAX_FRAME_LEN - calculate maximum frame length
1258 * This calculates the maximum frame length that will be used for a
1259 * given MTU. The frame length will be equal to the MTU plus a
1260 * constant amount of header space and padding. This is the quantity
1261 * that the net driver will program into the MAC as the maximum frame
1264 * The 10G MAC requires 8-byte alignment on the frame
1265 * length, so we round up to the nearest 8.
1267 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an
1268 * XGMII cycle). If the frame length reaches the maximum value in the
1269 * same cycle, the XMAC can miss the IPG altogether. We work around
1270 * this by adding a further 16 bytes.
1272 #define EFX_MAX_FRAME_LEN(mtu) \
1273 ((((mtu) + ETH_HLEN + VLAN_HLEN + 4/* FCS */ + 7) & ~7) + 16)
1275 static inline bool efx_xmit_with_hwtstamp(struct sk_buff *skb)
1277 return skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP;
1279 static inline void efx_xmit_hwtstamp_pending(struct sk_buff *skb)
1281 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
1284 #endif /* EFX_NET_DRIVER_H */