1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2011 Solarflare Communications Inc.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
10 /* Theory of operation:
12 * PTP support is assisted by firmware running on the MC, which provides
13 * the hardware timestamping capabilities. Both transmitted and received
14 * PTP event packets are queued onto internal queues for subsequent processing;
15 * this is because the MC operations are relatively long and would block
16 * block NAPI/interrupt operation.
18 * Receive event processing:
19 * The event contains the packet's UUID and sequence number, together
20 * with the hardware timestamp. The PTP receive packet queue is searched
21 * for this UUID/sequence number and, if found, put on a pending queue.
22 * Packets not matching are delivered without timestamps (MCDI events will
23 * always arrive after the actual packet).
24 * It is important for the operation of the PTP protocol that the ordering
25 * of packets between the event and general port is maintained.
27 * Work queue processing:
28 * If work waiting, synchronise host/hardware time
30 * Transmit: send packet through MC, which returns the transmission time
31 * that is converted to an appropriate timestamp.
33 * Receive: the packet's reception time is converted to an appropriate
37 #include <linux/udp.h>
38 #include <linux/time.h>
39 #include <linux/ktime.h>
40 #include <linux/module.h>
41 #include <linux/net_tstamp.h>
42 #include <linux/pps_kernel.h>
43 #include <linux/ptp_clock_kernel.h>
44 #include "net_driver.h"
47 #include "mcdi_pcol.h"
52 /* Maximum number of events expected to make up a PTP event */
53 #define MAX_EVENT_FRAGS 3
55 /* Maximum delay, ms, to begin synchronisation */
56 #define MAX_SYNCHRONISE_WAIT_MS 2
58 /* How long, at most, to spend synchronising */
59 #define SYNCHRONISE_PERIOD_NS 250000
61 /* How often to update the shared memory time */
62 #define SYNCHRONISATION_GRANULARITY_NS 200
64 /* Minimum permitted length of a (corrected) synchronisation time */
65 #define MIN_SYNCHRONISATION_NS 120
67 /* Maximum permitted length of a (corrected) synchronisation time */
68 #define MAX_SYNCHRONISATION_NS 1000
70 /* How many (MC) receive events that can be queued */
71 #define MAX_RECEIVE_EVENTS 8
73 /* Length of (modified) moving average. */
74 #define AVERAGE_LENGTH 16
76 /* How long an unmatched event or packet can be held */
77 #define PKT_EVENT_LIFETIME_MS 10
79 /* Offsets into PTP packet for identification. These offsets are from the
80 * start of the IP header, not the MAC header. Note that neither PTP V1 nor
81 * PTP V2 permit the use of IPV4 options.
83 #define PTP_DPORT_OFFSET 22
85 #define PTP_V1_VERSION_LENGTH 2
86 #define PTP_V1_VERSION_OFFSET 28
88 #define PTP_V1_UUID_LENGTH 6
89 #define PTP_V1_UUID_OFFSET 50
91 #define PTP_V1_SEQUENCE_LENGTH 2
92 #define PTP_V1_SEQUENCE_OFFSET 58
94 /* The minimum length of a PTP V1 packet for offsets, etc. to be valid:
97 #define PTP_V1_MIN_LENGTH 64
99 #define PTP_V2_VERSION_LENGTH 1
100 #define PTP_V2_VERSION_OFFSET 29
102 /* Although PTP V2 UUIDs are comprised a ClockIdentity (8) and PortNumber (2),
103 * the MC only captures the last six bytes of the clock identity. These values
104 * reflect those, not the ones used in the standard. The standard permits
105 * mapping of V1 UUIDs to V2 UUIDs with these same values.
107 #define PTP_V2_MC_UUID_LENGTH 6
108 #define PTP_V2_MC_UUID_OFFSET 50
110 #define PTP_V2_SEQUENCE_LENGTH 2
111 #define PTP_V2_SEQUENCE_OFFSET 58
113 /* The minimum length of a PTP V2 packet for offsets, etc. to be valid:
114 * includes IP header.
116 #define PTP_V2_MIN_LENGTH 63
118 #define PTP_MIN_LENGTH 63
120 #define PTP_ADDRESS 0xe0000181 /* 224.0.1.129 */
121 #define PTP_EVENT_PORT 319
122 #define PTP_GENERAL_PORT 320
124 /* Annoyingly the format of the version numbers are different between
125 * versions 1 and 2 so it isn't possible to simply look for 1 or 2.
127 #define PTP_VERSION_V1 1
129 #define PTP_VERSION_V2 2
130 #define PTP_VERSION_V2_MASK 0x0f
132 enum ptp_packet_state {
133 PTP_PACKET_STATE_UNMATCHED = 0,
134 PTP_PACKET_STATE_MATCHED,
135 PTP_PACKET_STATE_TIMED_OUT,
136 PTP_PACKET_STATE_MATCH_UNWANTED
139 /* NIC synchronised with single word of time only comprising
140 * partial seconds and full nanoseconds: 10^9 ~ 2^30 so 2 bits for seconds.
142 #define MC_NANOSECOND_BITS 30
143 #define MC_NANOSECOND_MASK ((1 << MC_NANOSECOND_BITS) - 1)
144 #define MC_SECOND_MASK ((1 << (32 - MC_NANOSECOND_BITS)) - 1)
146 /* Maximum parts-per-billion adjustment that is acceptable */
147 #define MAX_PPB 1000000
149 /* Number of bits required to hold the above */
150 #define MAX_PPB_BITS 20
152 /* Number of extra bits allowed when calculating fractional ns.
153 * EXTRA_BITS + MC_CMD_PTP_IN_ADJUST_BITS + MAX_PPB_BITS should
156 #define PPB_EXTRA_BITS 2
158 /* Precalculate scale word to avoid long long division at runtime */
159 #define PPB_SCALE_WORD ((1LL << (PPB_EXTRA_BITS + MC_CMD_PTP_IN_ADJUST_BITS +\
160 MAX_PPB_BITS)) / 1000000000LL)
162 #define PTP_SYNC_ATTEMPTS 4
165 * struct efx_ptp_match - Matching structure, stored in sk_buff's cb area.
166 * @words: UUID and (partial) sequence number
167 * @expiry: Time after which the packet should be delivered irrespective of
169 * @state: The state of the packet - whether it is ready for processing or
170 * whether that is of no interest.
172 struct efx_ptp_match {
173 u32 words[DIV_ROUND_UP(PTP_V1_UUID_LENGTH, 4)];
174 unsigned long expiry;
175 enum ptp_packet_state state;
179 * struct efx_ptp_event_rx - A PTP receive event (from MC)
180 * @seq0: First part of (PTP) UUID
181 * @seq1: Second part of (PTP) UUID and sequence number
182 * @hwtimestamp: Event timestamp
184 struct efx_ptp_event_rx {
185 struct list_head link;
189 unsigned long expiry;
193 * struct efx_ptp_timeset - Synchronisation between host and MC
194 * @host_start: Host time immediately before hardware timestamp taken
195 * @seconds: Hardware timestamp, seconds
196 * @nanoseconds: Hardware timestamp, nanoseconds
197 * @host_end: Host time immediately after hardware timestamp taken
198 * @waitns: Number of nanoseconds between hardware timestamp being read and
199 * host end time being seen
200 * @window: Difference of host_end and host_start
201 * @valid: Whether this timeset is valid
203 struct efx_ptp_timeset {
209 u32 window; /* Derived: end - start, allowing for wrap */
213 * struct efx_ptp_data - Precision Time Protocol (PTP) state
214 * @channel: The PTP channel
215 * @rxq: Receive queue (awaiting timestamps)
216 * @txq: Transmit queue
217 * @evt_list: List of MC receive events awaiting packets
218 * @evt_free_list: List of free events
219 * @evt_lock: Lock for manipulating evt_list and evt_free_list
220 * @rx_evts: Instantiated events (on evt_list and evt_free_list)
221 * @workwq: Work queue for processing pending PTP operations
223 * @reset_required: A serious error has occurred and the PTP task needs to be
224 * reset (disable, enable).
225 * @rxfilter_event: Receive filter when operating
226 * @rxfilter_general: Receive filter when operating
227 * @config: Current timestamp configuration
228 * @enabled: PTP operation enabled
229 * @mode: Mode in which PTP operating (PTP version)
230 * @evt_frags: Partly assembled PTP events
231 * @evt_frag_idx: Current fragment number
232 * @evt_code: Last event code
233 * @start: Address at which MC indicates ready for synchronisation
234 * @host_time_pps: Host time at last PPS
235 * @last_sync_ns: Last number of nanoseconds between readings when synchronising
236 * @base_sync_ns: Number of nanoseconds for last synchronisation.
237 * @base_sync_valid: Whether base_sync_time is valid.
238 * @current_adjfreq: Current ppb adjustment.
239 * @phc_clock: Pointer to registered phc device
240 * @phc_clock_info: Registration structure for phc device
241 * @pps_work: pps work task for handling pps events
242 * @pps_workwq: pps work queue
243 * @nic_ts_enabled: Flag indicating if NIC generated TS events are handled
244 * @txbuf: Buffer for use when transmitting (PTP) packets to MC (avoids
245 * allocations in main data path).
246 * @debug_ptp_dir: PTP debugfs directory
247 * @missed_rx_sync: Number of packets received without syncrhonisation.
248 * @good_syncs: Number of successful synchronisations.
249 * @no_time_syncs: Number of synchronisations with no good times.
250 * @bad_sync_durations: Number of synchronisations with bad durations.
251 * @bad_syncs: Number of failed synchronisations.
252 * @last_sync_time: Number of nanoseconds for last synchronisation.
253 * @sync_timeouts: Number of synchronisation timeouts
254 * @fast_syncs: Number of synchronisations requiring short delay
255 * @min_sync_delta: Minimum time between event and synchronisation
256 * @max_sync_delta: Maximum time between event and synchronisation
257 * @average_sync_delta: Average time between event and synchronisation.
258 * Modified moving average.
259 * @last_sync_delta: Last time between event and synchronisation
260 * @mc_stats: Context value for MC statistics
261 * @timeset: Last set of synchronisation statistics.
263 struct efx_ptp_data {
264 struct efx_channel *channel;
265 struct sk_buff_head rxq;
266 struct sk_buff_head txq;
267 struct list_head evt_list;
268 struct list_head evt_free_list;
270 struct efx_ptp_event_rx rx_evts[MAX_RECEIVE_EVENTS];
271 struct workqueue_struct *workwq;
272 struct work_struct work;
275 u32 rxfilter_general;
276 bool rxfilter_installed;
277 struct hwtstamp_config config;
280 efx_qword_t evt_frags[MAX_EVENT_FRAGS];
283 struct efx_buffer start;
284 struct pps_event_time host_time_pps;
285 unsigned last_sync_ns;
286 unsigned base_sync_ns;
287 bool base_sync_valid;
289 struct ptp_clock *phc_clock;
290 struct ptp_clock_info phc_clock_info;
291 struct work_struct pps_work;
292 struct workqueue_struct *pps_workwq;
294 u8 txbuf[ALIGN(MC_CMD_PTP_IN_TRANSMIT_LEN(
295 MC_CMD_PTP_IN_TRANSMIT_PACKET_MAXNUM), 4)];
296 struct efx_ptp_timeset
297 timeset[MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_MAXNUM];
300 static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta);
301 static int efx_phc_adjtime(struct ptp_clock_info *ptp, s64 delta);
302 static int efx_phc_gettime(struct ptp_clock_info *ptp, struct timespec *ts);
303 static int efx_phc_settime(struct ptp_clock_info *ptp,
304 const struct timespec *e_ts);
305 static int efx_phc_enable(struct ptp_clock_info *ptp,
306 struct ptp_clock_request *request, int on);
308 /* Enable MCDI PTP support. */
309 static int efx_ptp_enable(struct efx_nic *efx)
311 u8 inbuf[MC_CMD_PTP_IN_ENABLE_LEN];
313 MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_ENABLE);
314 MCDI_SET_DWORD(inbuf, PTP_IN_ENABLE_QUEUE,
315 efx->ptp_data->channel->channel);
316 MCDI_SET_DWORD(inbuf, PTP_IN_ENABLE_MODE, efx->ptp_data->mode);
318 return efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf),
322 /* Disable MCDI PTP support.
324 * Note that this function should never rely on the presence of ptp_data -
325 * may be called before that exists.
327 static int efx_ptp_disable(struct efx_nic *efx)
329 u8 inbuf[MC_CMD_PTP_IN_DISABLE_LEN];
331 MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_DISABLE);
332 return efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf),
336 static void efx_ptp_deliver_rx_queue(struct sk_buff_head *q)
340 while ((skb = skb_dequeue(q))) {
342 netif_receive_skb(skb);
347 static void efx_ptp_handle_no_channel(struct efx_nic *efx)
349 netif_err(efx, drv, efx->net_dev,
350 "ERROR: PTP requires MSI-X and 1 additional interrupt"
351 "vector. PTP disabled\n");
354 /* Repeatedly send the host time to the MC which will capture the hardware
357 static void efx_ptp_send_times(struct efx_nic *efx,
358 struct pps_event_time *last_time)
360 struct pps_event_time now;
361 struct timespec limit;
362 struct efx_ptp_data *ptp = efx->ptp_data;
363 struct timespec start;
364 int *mc_running = ptp->start.addr;
369 timespec_add_ns(&limit, SYNCHRONISE_PERIOD_NS);
371 /* Write host time for specified period or until MC is done */
372 while ((timespec_compare(&now.ts_real, &limit) < 0) &&
373 ACCESS_ONCE(*mc_running)) {
374 struct timespec update_time;
375 unsigned int host_time;
377 /* Don't update continuously to avoid saturating the PCIe bus */
378 update_time = now.ts_real;
379 timespec_add_ns(&update_time, SYNCHRONISATION_GRANULARITY_NS);
382 } while ((timespec_compare(&now.ts_real, &update_time) < 0) &&
383 ACCESS_ONCE(*mc_running));
385 /* Synchronise NIC with single word of time only */
386 host_time = (now.ts_real.tv_sec << MC_NANOSECOND_BITS |
387 now.ts_real.tv_nsec);
388 /* Update host time in NIC memory */
389 _efx_writed(efx, cpu_to_le32(host_time),
390 FR_CZ_MC_TREG_SMEM + MC_SMEM_P0_PTP_TIME_OFST);
395 /* Read a timeset from the MC's results and partial process. */
396 static void efx_ptp_read_timeset(u8 *data, struct efx_ptp_timeset *timeset)
398 unsigned start_ns, end_ns;
400 timeset->host_start = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_HOSTSTART);
401 timeset->seconds = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_SECONDS);
402 timeset->nanoseconds = MCDI_DWORD(data,
403 PTP_OUT_SYNCHRONIZE_NANOSECONDS);
404 timeset->host_end = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_HOSTEND),
405 timeset->waitns = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_WAITNS);
408 start_ns = timeset->host_start & MC_NANOSECOND_MASK;
409 end_ns = timeset->host_end & MC_NANOSECOND_MASK;
410 /* Allow for rollover */
411 if (end_ns < start_ns)
412 end_ns += NSEC_PER_SEC;
413 /* Determine duration of operation */
414 timeset->window = end_ns - start_ns;
417 /* Process times received from MC.
419 * Extract times from returned results, and establish the minimum value
420 * seen. The minimum value represents the "best" possible time and events
421 * too much greater than this are rejected - the machine is, perhaps, too
422 * busy. A number of readings are taken so that, hopefully, at least one good
423 * synchronisation will be seen in the results.
425 static int efx_ptp_process_times(struct efx_nic *efx, u8 *synch_buf,
426 size_t response_length,
427 const struct pps_event_time *last_time)
429 unsigned number_readings = (response_length /
430 MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_LEN);
433 unsigned min_set = 0;
436 unsigned last_good = 0;
437 struct efx_ptp_data *ptp = efx->ptp_data;
438 bool min_valid = false;
441 struct timespec delta;
443 if (number_readings == 0)
446 /* Find minimum value in this set of results, discarding clearly
449 for (i = 0; i < number_readings; i++) {
450 efx_ptp_read_timeset(synch_buf, &ptp->timeset[i]);
451 synch_buf += MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_LEN;
452 if (ptp->timeset[i].window > SYNCHRONISATION_GRANULARITY_NS) {
454 if (ptp->timeset[i].window < min_set)
455 min_set = ptp->timeset[i].window;
458 min_set = ptp->timeset[i].window;
464 if (ptp->base_sync_valid && (min_set > ptp->base_sync_ns))
465 min = ptp->base_sync_ns;
469 min = SYNCHRONISATION_GRANULARITY_NS;
472 /* Discard excessively long synchronise durations. The MC times
473 * when it finishes reading the host time so the corrected window
474 * time should be fairly constant for a given platform.
477 for (i = 0; i < number_readings; i++)
478 if (ptp->timeset[i].window > ptp->timeset[i].waitns) {
481 win = ptp->timeset[i].window - ptp->timeset[i].waitns;
482 if (win >= MIN_SYNCHRONISATION_NS &&
483 win < MAX_SYNCHRONISATION_NS) {
484 total += ptp->timeset[i].window;
491 netif_warn(efx, drv, efx->net_dev,
492 "PTP no suitable synchronisations %dns %dns\n",
493 ptp->base_sync_ns, min_set);
497 /* Average minimum this synchronisation */
498 ptp->last_sync_ns = DIV_ROUND_UP(total, ngood);
499 if (!ptp->base_sync_valid || (ptp->last_sync_ns < ptp->base_sync_ns)) {
500 ptp->base_sync_valid = true;
501 ptp->base_sync_ns = ptp->last_sync_ns;
504 /* Calculate delay from actual PPS to last_time */
506 ptp->timeset[last_good].nanoseconds +
507 last_time->ts_real.tv_nsec -
508 (ptp->timeset[last_good].host_start & MC_NANOSECOND_MASK);
510 /* It is possible that the seconds rolled over between taking
511 * the start reading and the last value written by the host. The
512 * timescales are such that a gap of more than one second is never
515 start_sec = ptp->timeset[last_good].host_start >> MC_NANOSECOND_BITS;
516 last_sec = last_time->ts_real.tv_sec & MC_SECOND_MASK;
517 if (start_sec != last_sec) {
518 if (((start_sec + 1) & MC_SECOND_MASK) != last_sec) {
519 netif_warn(efx, hw, efx->net_dev,
520 "PTP bad synchronisation seconds\n");
529 ptp->host_time_pps = *last_time;
530 pps_sub_ts(&ptp->host_time_pps, delta);
535 /* Synchronize times between the host and the MC */
536 static int efx_ptp_synchronize(struct efx_nic *efx, unsigned int num_readings)
538 struct efx_ptp_data *ptp = efx->ptp_data;
539 u8 synch_buf[MC_CMD_PTP_OUT_SYNCHRONIZE_LENMAX];
540 size_t response_length;
542 unsigned long timeout;
543 struct pps_event_time last_time = {};
544 unsigned int loops = 0;
545 int *start = ptp->start.addr;
547 MCDI_SET_DWORD(synch_buf, PTP_IN_OP, MC_CMD_PTP_OP_SYNCHRONIZE);
548 MCDI_SET_DWORD(synch_buf, PTP_IN_SYNCHRONIZE_NUMTIMESETS,
550 MCDI_SET_DWORD(synch_buf, PTP_IN_SYNCHRONIZE_START_ADDR_LO,
551 (u32)ptp->start.dma_addr);
552 MCDI_SET_DWORD(synch_buf, PTP_IN_SYNCHRONIZE_START_ADDR_HI,
553 (u32)((u64)ptp->start.dma_addr >> 32));
555 /* Clear flag that signals MC ready */
556 ACCESS_ONCE(*start) = 0;
557 efx_mcdi_rpc_start(efx, MC_CMD_PTP, synch_buf,
558 MC_CMD_PTP_IN_SYNCHRONIZE_LEN);
560 /* Wait for start from MCDI (or timeout) */
561 timeout = jiffies + msecs_to_jiffies(MAX_SYNCHRONISE_WAIT_MS);
562 while (!ACCESS_ONCE(*start) && (time_before(jiffies, timeout))) {
563 udelay(20); /* Usually start MCDI execution quickly */
567 if (ACCESS_ONCE(*start))
568 efx_ptp_send_times(efx, &last_time);
570 /* Collect results */
571 rc = efx_mcdi_rpc_finish(efx, MC_CMD_PTP,
572 MC_CMD_PTP_IN_SYNCHRONIZE_LEN,
573 synch_buf, sizeof(synch_buf),
576 rc = efx_ptp_process_times(efx, synch_buf, response_length,
582 /* Transmit a PTP packet, via the MCDI interface, to the wire. */
583 static int efx_ptp_xmit_skb(struct efx_nic *efx, struct sk_buff *skb)
585 u8 *txbuf = efx->ptp_data->txbuf;
586 struct skb_shared_hwtstamps timestamps;
588 /* MCDI driver requires word aligned lengths */
589 size_t len = ALIGN(MC_CMD_PTP_IN_TRANSMIT_LEN(skb->len), 4);
590 u8 txtime[MC_CMD_PTP_OUT_TRANSMIT_LEN];
592 MCDI_SET_DWORD(txbuf, PTP_IN_OP, MC_CMD_PTP_OP_TRANSMIT);
593 MCDI_SET_DWORD(txbuf, PTP_IN_TRANSMIT_LENGTH, skb->len);
594 if (skb_shinfo(skb)->nr_frags != 0) {
595 rc = skb_linearize(skb);
600 if (skb->ip_summed == CHECKSUM_PARTIAL) {
601 rc = skb_checksum_help(skb);
605 skb_copy_from_linear_data(skb,
606 &txbuf[MC_CMD_PTP_IN_TRANSMIT_PACKET_OFST],
608 rc = efx_mcdi_rpc(efx, MC_CMD_PTP, txbuf, len, txtime,
609 sizeof(txtime), &len);
613 memset(×tamps, 0, sizeof(timestamps));
614 timestamps.hwtstamp = ktime_set(
615 MCDI_DWORD(txtime, PTP_OUT_TRANSMIT_SECONDS),
616 MCDI_DWORD(txtime, PTP_OUT_TRANSMIT_NANOSECONDS));
618 skb_tstamp_tx(skb, ×tamps);
628 static void efx_ptp_drop_time_expired_events(struct efx_nic *efx)
630 struct efx_ptp_data *ptp = efx->ptp_data;
631 struct list_head *cursor;
632 struct list_head *next;
634 /* Drop time-expired events */
635 spin_lock_bh(&ptp->evt_lock);
636 if (!list_empty(&ptp->evt_list)) {
637 list_for_each_safe(cursor, next, &ptp->evt_list) {
638 struct efx_ptp_event_rx *evt;
640 evt = list_entry(cursor, struct efx_ptp_event_rx,
642 if (time_after(jiffies, evt->expiry)) {
643 list_del(&evt->link);
644 list_add(&evt->link, &ptp->evt_free_list);
645 netif_warn(efx, hw, efx->net_dev,
646 "PTP rx event dropped\n");
650 spin_unlock_bh(&ptp->evt_lock);
653 static enum ptp_packet_state efx_ptp_match_rx(struct efx_nic *efx,
656 struct efx_ptp_data *ptp = efx->ptp_data;
658 struct list_head *cursor;
659 struct list_head *next;
660 struct efx_ptp_match *match;
661 enum ptp_packet_state rc = PTP_PACKET_STATE_UNMATCHED;
663 spin_lock_bh(&ptp->evt_lock);
664 evts_waiting = !list_empty(&ptp->evt_list);
665 spin_unlock_bh(&ptp->evt_lock);
668 return PTP_PACKET_STATE_UNMATCHED;
670 match = (struct efx_ptp_match *)skb->cb;
671 /* Look for a matching timestamp in the event queue */
672 spin_lock_bh(&ptp->evt_lock);
673 list_for_each_safe(cursor, next, &ptp->evt_list) {
674 struct efx_ptp_event_rx *evt;
676 evt = list_entry(cursor, struct efx_ptp_event_rx, link);
677 if ((evt->seq0 == match->words[0]) &&
678 (evt->seq1 == match->words[1])) {
679 struct skb_shared_hwtstamps *timestamps;
681 /* Match - add in hardware timestamp */
682 timestamps = skb_hwtstamps(skb);
683 timestamps->hwtstamp = evt->hwtimestamp;
685 match->state = PTP_PACKET_STATE_MATCHED;
686 rc = PTP_PACKET_STATE_MATCHED;
687 list_del(&evt->link);
688 list_add(&evt->link, &ptp->evt_free_list);
692 spin_unlock_bh(&ptp->evt_lock);
697 /* Process any queued receive events and corresponding packets
699 * q is returned with all the packets that are ready for delivery.
700 * true is returned if at least one of those packets requires
703 static bool efx_ptp_process_events(struct efx_nic *efx, struct sk_buff_head *q)
705 struct efx_ptp_data *ptp = efx->ptp_data;
709 while ((skb = skb_dequeue(&ptp->rxq))) {
710 struct efx_ptp_match *match;
712 match = (struct efx_ptp_match *)skb->cb;
713 if (match->state == PTP_PACKET_STATE_MATCH_UNWANTED) {
714 __skb_queue_tail(q, skb);
715 } else if (efx_ptp_match_rx(efx, skb) ==
716 PTP_PACKET_STATE_MATCHED) {
718 __skb_queue_tail(q, skb);
719 } else if (time_after(jiffies, match->expiry)) {
720 match->state = PTP_PACKET_STATE_TIMED_OUT;
721 netif_warn(efx, rx_err, efx->net_dev,
722 "PTP packet - no timestamp seen\n");
723 __skb_queue_tail(q, skb);
725 /* Replace unprocessed entry and stop */
726 skb_queue_head(&ptp->rxq, skb);
734 /* Complete processing of a received packet */
735 static inline void efx_ptp_process_rx(struct efx_nic *efx, struct sk_buff *skb)
738 netif_receive_skb(skb);
742 static int efx_ptp_start(struct efx_nic *efx)
744 struct efx_ptp_data *ptp = efx->ptp_data;
745 struct efx_filter_spec rxfilter;
748 ptp->reset_required = false;
750 /* Must filter on both event and general ports to ensure
751 * that there is no packet re-ordering.
753 efx_filter_init_rx(&rxfilter, EFX_FILTER_PRI_REQUIRED, 0,
755 efx_channel_get_rx_queue(ptp->channel)));
756 rc = efx_filter_set_ipv4_local(&rxfilter, IPPROTO_UDP,
758 htons(PTP_EVENT_PORT));
762 rc = efx_filter_insert_filter(efx, &rxfilter, true);
765 ptp->rxfilter_event = rc;
767 efx_filter_init_rx(&rxfilter, EFX_FILTER_PRI_REQUIRED, 0,
769 efx_channel_get_rx_queue(ptp->channel)));
770 rc = efx_filter_set_ipv4_local(&rxfilter, IPPROTO_UDP,
772 htons(PTP_GENERAL_PORT));
776 rc = efx_filter_insert_filter(efx, &rxfilter, true);
779 ptp->rxfilter_general = rc;
781 rc = efx_ptp_enable(efx);
785 ptp->evt_frag_idx = 0;
786 ptp->current_adjfreq = 0;
787 ptp->rxfilter_installed = true;
792 efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED,
793 ptp->rxfilter_general);
795 efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED,
796 ptp->rxfilter_event);
801 static int efx_ptp_stop(struct efx_nic *efx)
803 struct efx_ptp_data *ptp = efx->ptp_data;
804 int rc = efx_ptp_disable(efx);
805 struct list_head *cursor;
806 struct list_head *next;
808 if (ptp->rxfilter_installed) {
809 efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED,
810 ptp->rxfilter_general);
811 efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED,
812 ptp->rxfilter_event);
813 ptp->rxfilter_installed = false;
816 /* Make sure RX packets are really delivered */
817 efx_ptp_deliver_rx_queue(&efx->ptp_data->rxq);
818 skb_queue_purge(&efx->ptp_data->txq);
820 /* Drop any pending receive events */
821 spin_lock_bh(&efx->ptp_data->evt_lock);
822 list_for_each_safe(cursor, next, &efx->ptp_data->evt_list) {
824 list_add(cursor, &efx->ptp_data->evt_free_list);
826 spin_unlock_bh(&efx->ptp_data->evt_lock);
831 static void efx_ptp_pps_worker(struct work_struct *work)
833 struct efx_ptp_data *ptp =
834 container_of(work, struct efx_ptp_data, pps_work);
835 struct efx_nic *efx = ptp->channel->efx;
836 struct ptp_clock_event ptp_evt;
838 if (efx_ptp_synchronize(efx, PTP_SYNC_ATTEMPTS))
841 ptp_evt.type = PTP_CLOCK_PPSUSR;
842 ptp_evt.pps_times = ptp->host_time_pps;
843 ptp_clock_event(ptp->phc_clock, &ptp_evt);
846 /* Process any pending transmissions and timestamp any received packets.
848 static void efx_ptp_worker(struct work_struct *work)
850 struct efx_ptp_data *ptp_data =
851 container_of(work, struct efx_ptp_data, work);
852 struct efx_nic *efx = ptp_data->channel->efx;
854 struct sk_buff_head tempq;
856 if (ptp_data->reset_required) {
862 efx_ptp_drop_time_expired_events(efx);
864 __skb_queue_head_init(&tempq);
865 if (efx_ptp_process_events(efx, &tempq) ||
866 !skb_queue_empty(&ptp_data->txq)) {
868 while ((skb = skb_dequeue(&ptp_data->txq)))
869 efx_ptp_xmit_skb(efx, skb);
872 while ((skb = __skb_dequeue(&tempq)))
873 efx_ptp_process_rx(efx, skb);
876 /* Initialise PTP channel and state.
878 * Setting core_index to zero causes the queue to be initialised and doesn't
879 * overlap with 'rxq0' because ptp.c doesn't use skb_record_rx_queue.
881 static int efx_ptp_probe_channel(struct efx_channel *channel)
883 struct efx_nic *efx = channel->efx;
884 struct efx_ptp_data *ptp;
888 channel->irq_moderation = 0;
889 channel->rx_queue.core_index = 0;
891 ptp = kzalloc(sizeof(struct efx_ptp_data), GFP_KERNEL);
896 rc = efx_nic_alloc_buffer(efx, &ptp->start, sizeof(int));
900 ptp->channel = channel;
901 skb_queue_head_init(&ptp->rxq);
902 skb_queue_head_init(&ptp->txq);
903 ptp->workwq = create_singlethread_workqueue("sfc_ptp");
909 INIT_WORK(&ptp->work, efx_ptp_worker);
910 ptp->config.flags = 0;
911 ptp->config.tx_type = HWTSTAMP_TX_OFF;
912 ptp->config.rx_filter = HWTSTAMP_FILTER_NONE;
913 INIT_LIST_HEAD(&ptp->evt_list);
914 INIT_LIST_HEAD(&ptp->evt_free_list);
915 spin_lock_init(&ptp->evt_lock);
916 for (pos = 0; pos < MAX_RECEIVE_EVENTS; pos++)
917 list_add(&ptp->rx_evts[pos].link, &ptp->evt_free_list);
919 ptp->phc_clock_info.owner = THIS_MODULE;
920 snprintf(ptp->phc_clock_info.name,
921 sizeof(ptp->phc_clock_info.name),
922 "%pm", efx->net_dev->perm_addr);
923 ptp->phc_clock_info.max_adj = MAX_PPB;
924 ptp->phc_clock_info.n_alarm = 0;
925 ptp->phc_clock_info.n_ext_ts = 0;
926 ptp->phc_clock_info.n_per_out = 0;
927 ptp->phc_clock_info.pps = 1;
928 ptp->phc_clock_info.adjfreq = efx_phc_adjfreq;
929 ptp->phc_clock_info.adjtime = efx_phc_adjtime;
930 ptp->phc_clock_info.gettime = efx_phc_gettime;
931 ptp->phc_clock_info.settime = efx_phc_settime;
932 ptp->phc_clock_info.enable = efx_phc_enable;
934 ptp->phc_clock = ptp_clock_register(&ptp->phc_clock_info,
939 INIT_WORK(&ptp->pps_work, efx_ptp_pps_worker);
940 ptp->pps_workwq = create_singlethread_workqueue("sfc_pps");
941 if (!ptp->pps_workwq) {
945 ptp->nic_ts_enabled = false;
949 ptp_clock_unregister(efx->ptp_data->phc_clock);
952 destroy_workqueue(efx->ptp_data->workwq);
955 efx_nic_free_buffer(efx, &ptp->start);
958 kfree(efx->ptp_data);
959 efx->ptp_data = NULL;
964 static void efx_ptp_remove_channel(struct efx_channel *channel)
966 struct efx_nic *efx = channel->efx;
971 (void)efx_ptp_disable(channel->efx);
973 cancel_work_sync(&efx->ptp_data->work);
974 cancel_work_sync(&efx->ptp_data->pps_work);
976 skb_queue_purge(&efx->ptp_data->rxq);
977 skb_queue_purge(&efx->ptp_data->txq);
979 ptp_clock_unregister(efx->ptp_data->phc_clock);
981 destroy_workqueue(efx->ptp_data->workwq);
982 destroy_workqueue(efx->ptp_data->pps_workwq);
984 efx_nic_free_buffer(efx, &efx->ptp_data->start);
985 kfree(efx->ptp_data);
988 static void efx_ptp_get_channel_name(struct efx_channel *channel,
989 char *buf, size_t len)
991 snprintf(buf, len, "%s-ptp", channel->efx->name);
994 /* Determine whether this packet should be processed by the PTP module
995 * or transmitted conventionally.
997 bool efx_ptp_is_ptp_tx(struct efx_nic *efx, struct sk_buff *skb)
999 return efx->ptp_data &&
1000 efx->ptp_data->enabled &&
1001 skb->len >= PTP_MIN_LENGTH &&
1002 skb->len <= MC_CMD_PTP_IN_TRANSMIT_PACKET_MAXNUM &&
1003 likely(skb->protocol == htons(ETH_P_IP)) &&
1004 ip_hdr(skb)->protocol == IPPROTO_UDP &&
1005 udp_hdr(skb)->dest == htons(PTP_EVENT_PORT);
1008 /* Receive a PTP packet. Packets are queued until the arrival of
1009 * the receive timestamp from the MC - this will probably occur after the
1010 * packet arrival because of the processing in the MC.
1012 static void efx_ptp_rx(struct efx_channel *channel, struct sk_buff *skb)
1014 struct efx_nic *efx = channel->efx;
1015 struct efx_ptp_data *ptp = efx->ptp_data;
1016 struct efx_ptp_match *match = (struct efx_ptp_match *)skb->cb;
1018 unsigned int version;
1020 match->expiry = jiffies + msecs_to_jiffies(PKT_EVENT_LIFETIME_MS);
1022 /* Correct version? */
1023 if (ptp->mode == MC_CMD_PTP_MODE_V1) {
1024 if (skb->len < PTP_V1_MIN_LENGTH) {
1025 netif_receive_skb(skb);
1028 version = ntohs(*(__be16 *)&skb->data[PTP_V1_VERSION_OFFSET]);
1029 if (version != PTP_VERSION_V1) {
1030 netif_receive_skb(skb);
1034 if (skb->len < PTP_V2_MIN_LENGTH) {
1035 netif_receive_skb(skb);
1038 version = skb->data[PTP_V2_VERSION_OFFSET];
1040 BUG_ON(ptp->mode != MC_CMD_PTP_MODE_V2);
1041 BUILD_BUG_ON(PTP_V1_UUID_OFFSET != PTP_V2_MC_UUID_OFFSET);
1042 BUILD_BUG_ON(PTP_V1_UUID_LENGTH != PTP_V2_MC_UUID_LENGTH);
1043 BUILD_BUG_ON(PTP_V1_SEQUENCE_OFFSET != PTP_V2_SEQUENCE_OFFSET);
1044 BUILD_BUG_ON(PTP_V1_SEQUENCE_LENGTH != PTP_V2_SEQUENCE_LENGTH);
1046 if ((version & PTP_VERSION_V2_MASK) != PTP_VERSION_V2) {
1047 netif_receive_skb(skb);
1052 /* Does this packet require timestamping? */
1053 if (ntohs(*(__be16 *)&skb->data[PTP_DPORT_OFFSET]) == PTP_EVENT_PORT) {
1054 struct skb_shared_hwtstamps *timestamps;
1056 match->state = PTP_PACKET_STATE_UNMATCHED;
1058 /* Clear all timestamps held: filled in later */
1059 timestamps = skb_hwtstamps(skb);
1060 memset(timestamps, 0, sizeof(*timestamps));
1062 /* Extract UUID/Sequence information */
1063 data = skb->data + PTP_V1_UUID_OFFSET;
1064 match->words[0] = (data[0] |
1068 match->words[1] = (data[4] |
1070 (skb->data[PTP_V1_SEQUENCE_OFFSET +
1071 PTP_V1_SEQUENCE_LENGTH - 1] <<
1074 match->state = PTP_PACKET_STATE_MATCH_UNWANTED;
1077 skb_queue_tail(&ptp->rxq, skb);
1078 queue_work(ptp->workwq, &ptp->work);
1081 /* Transmit a PTP packet. This has to be transmitted by the MC
1082 * itself, through an MCDI call. MCDI calls aren't permitted
1083 * in the transmit path so defer the actual transmission to a suitable worker.
1085 int efx_ptp_tx(struct efx_nic *efx, struct sk_buff *skb)
1087 struct efx_ptp_data *ptp = efx->ptp_data;
1089 skb_queue_tail(&ptp->txq, skb);
1091 if ((udp_hdr(skb)->dest == htons(PTP_EVENT_PORT)) &&
1092 (skb->len <= MC_CMD_PTP_IN_TRANSMIT_PACKET_MAXNUM))
1093 efx_xmit_hwtstamp_pending(skb);
1094 queue_work(ptp->workwq, &ptp->work);
1096 return NETDEV_TX_OK;
1099 static int efx_ptp_change_mode(struct efx_nic *efx, bool enable_wanted,
1100 unsigned int new_mode)
1102 if ((enable_wanted != efx->ptp_data->enabled) ||
1103 (enable_wanted && (efx->ptp_data->mode != new_mode))) {
1106 if (enable_wanted) {
1107 /* Change of mode requires disable */
1108 if (efx->ptp_data->enabled &&
1109 (efx->ptp_data->mode != new_mode)) {
1110 efx->ptp_data->enabled = false;
1111 rc = efx_ptp_stop(efx);
1116 /* Set new operating mode and establish
1117 * baseline synchronisation, which must
1120 efx->ptp_data->mode = new_mode;
1121 rc = efx_ptp_start(efx);
1123 rc = efx_ptp_synchronize(efx,
1124 PTP_SYNC_ATTEMPTS * 2);
1129 rc = efx_ptp_stop(efx);
1135 efx->ptp_data->enabled = enable_wanted;
1141 static int efx_ptp_ts_init(struct efx_nic *efx, struct hwtstamp_config *init)
1143 bool enable_wanted = false;
1144 unsigned int new_mode;
1150 if ((init->tx_type != HWTSTAMP_TX_OFF) &&
1151 (init->tx_type != HWTSTAMP_TX_ON))
1154 new_mode = efx->ptp_data->mode;
1155 /* Determine whether any PTP HW operations are required */
1156 switch (init->rx_filter) {
1157 case HWTSTAMP_FILTER_NONE:
1159 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1160 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1161 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
1162 init->rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;
1163 new_mode = MC_CMD_PTP_MODE_V1;
1164 enable_wanted = true;
1166 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1167 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1168 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1169 /* Although these three are accepted only IPV4 packets will be
1172 init->rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;
1173 new_mode = MC_CMD_PTP_MODE_V2;
1174 enable_wanted = true;
1176 case HWTSTAMP_FILTER_PTP_V2_EVENT:
1177 case HWTSTAMP_FILTER_PTP_V2_SYNC:
1178 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
1179 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1180 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
1181 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
1182 /* Non-IP + IPv6 timestamping not supported */
1189 if (init->tx_type != HWTSTAMP_TX_OFF)
1190 enable_wanted = true;
1192 rc = efx_ptp_change_mode(efx, enable_wanted, new_mode);
1196 efx->ptp_data->config = *init;
1202 efx_ptp_get_ts_info(struct net_device *net_dev, struct ethtool_ts_info *ts_info)
1204 struct efx_nic *efx = netdev_priv(net_dev);
1205 struct efx_ptp_data *ptp = efx->ptp_data;
1210 ts_info->so_timestamping = (SOF_TIMESTAMPING_TX_HARDWARE |
1211 SOF_TIMESTAMPING_RX_HARDWARE |
1212 SOF_TIMESTAMPING_RAW_HARDWARE);
1213 ts_info->phc_index = ptp_clock_index(ptp->phc_clock);
1214 ts_info->tx_types = 1 << HWTSTAMP_TX_OFF | 1 << HWTSTAMP_TX_ON;
1215 ts_info->rx_filters = (1 << HWTSTAMP_FILTER_NONE |
1216 1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT |
1217 1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC |
1218 1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ |
1219 1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT |
1220 1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC |
1221 1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
1225 int efx_ptp_ioctl(struct efx_nic *efx, struct ifreq *ifr, int cmd)
1227 struct hwtstamp_config config;
1230 /* Not a PTP enabled port */
1234 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
1237 rc = efx_ptp_ts_init(efx, &config);
1241 return copy_to_user(ifr->ifr_data, &config, sizeof(config))
1245 static void ptp_event_failure(struct efx_nic *efx, int expected_frag_len)
1247 struct efx_ptp_data *ptp = efx->ptp_data;
1249 netif_err(efx, hw, efx->net_dev,
1250 "PTP unexpected event length: got %d expected %d\n",
1251 ptp->evt_frag_idx, expected_frag_len);
1252 ptp->reset_required = true;
1253 queue_work(ptp->workwq, &ptp->work);
1256 /* Process a completed receive event. Put it on the event queue and
1257 * start worker thread. This is required because event and their
1258 * correspoding packets may come in either order.
1260 static void ptp_event_rx(struct efx_nic *efx, struct efx_ptp_data *ptp)
1262 struct efx_ptp_event_rx *evt = NULL;
1264 if (ptp->evt_frag_idx != 3) {
1265 ptp_event_failure(efx, 3);
1269 spin_lock_bh(&ptp->evt_lock);
1270 if (!list_empty(&ptp->evt_free_list)) {
1271 evt = list_first_entry(&ptp->evt_free_list,
1272 struct efx_ptp_event_rx, link);
1273 list_del(&evt->link);
1275 evt->seq0 = EFX_QWORD_FIELD(ptp->evt_frags[2], MCDI_EVENT_DATA);
1276 evt->seq1 = (EFX_QWORD_FIELD(ptp->evt_frags[2],
1278 (EFX_QWORD_FIELD(ptp->evt_frags[1],
1279 MCDI_EVENT_SRC) << 8) |
1280 (EFX_QWORD_FIELD(ptp->evt_frags[0],
1281 MCDI_EVENT_SRC) << 16));
1282 evt->hwtimestamp = ktime_set(
1283 EFX_QWORD_FIELD(ptp->evt_frags[0], MCDI_EVENT_DATA),
1284 EFX_QWORD_FIELD(ptp->evt_frags[1], MCDI_EVENT_DATA));
1285 evt->expiry = jiffies + msecs_to_jiffies(PKT_EVENT_LIFETIME_MS);
1286 list_add_tail(&evt->link, &ptp->evt_list);
1288 queue_work(ptp->workwq, &ptp->work);
1290 netif_err(efx, rx_err, efx->net_dev, "No free PTP event");
1292 spin_unlock_bh(&ptp->evt_lock);
1295 static void ptp_event_fault(struct efx_nic *efx, struct efx_ptp_data *ptp)
1297 int code = EFX_QWORD_FIELD(ptp->evt_frags[0], MCDI_EVENT_DATA);
1298 if (ptp->evt_frag_idx != 1) {
1299 ptp_event_failure(efx, 1);
1303 netif_err(efx, hw, efx->net_dev, "PTP error %d\n", code);
1306 static void ptp_event_pps(struct efx_nic *efx, struct efx_ptp_data *ptp)
1308 if (ptp->nic_ts_enabled)
1309 queue_work(ptp->pps_workwq, &ptp->pps_work);
1312 void efx_ptp_event(struct efx_nic *efx, efx_qword_t *ev)
1314 struct efx_ptp_data *ptp = efx->ptp_data;
1315 int code = EFX_QWORD_FIELD(*ev, MCDI_EVENT_CODE);
1320 if (ptp->evt_frag_idx == 0) {
1321 ptp->evt_code = code;
1322 } else if (ptp->evt_code != code) {
1323 netif_err(efx, hw, efx->net_dev,
1324 "PTP out of sequence event %d\n", code);
1325 ptp->evt_frag_idx = 0;
1328 ptp->evt_frags[ptp->evt_frag_idx++] = *ev;
1329 if (!MCDI_EVENT_FIELD(*ev, CONT)) {
1330 /* Process resulting event */
1332 case MCDI_EVENT_CODE_PTP_RX:
1333 ptp_event_rx(efx, ptp);
1335 case MCDI_EVENT_CODE_PTP_FAULT:
1336 ptp_event_fault(efx, ptp);
1338 case MCDI_EVENT_CODE_PTP_PPS:
1339 ptp_event_pps(efx, ptp);
1342 netif_err(efx, hw, efx->net_dev,
1343 "PTP unknown event %d\n", code);
1346 ptp->evt_frag_idx = 0;
1347 } else if (MAX_EVENT_FRAGS == ptp->evt_frag_idx) {
1348 netif_err(efx, hw, efx->net_dev,
1349 "PTP too many event fragments\n");
1350 ptp->evt_frag_idx = 0;
1354 static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
1356 struct efx_ptp_data *ptp_data = container_of(ptp,
1357 struct efx_ptp_data,
1359 struct efx_nic *efx = ptp_data->channel->efx;
1360 u8 inadj[MC_CMD_PTP_IN_ADJUST_LEN];
1364 if (delta > MAX_PPB)
1366 else if (delta < -MAX_PPB)
1369 /* Convert ppb to fixed point ns. */
1370 adjustment_ns = (((s64)delta * PPB_SCALE_WORD) >>
1371 (PPB_EXTRA_BITS + MAX_PPB_BITS));
1373 MCDI_SET_DWORD(inadj, PTP_IN_OP, MC_CMD_PTP_OP_ADJUST);
1374 MCDI_SET_DWORD(inadj, PTP_IN_ADJUST_FREQ_LO, (u32)adjustment_ns);
1375 MCDI_SET_DWORD(inadj, PTP_IN_ADJUST_FREQ_HI,
1376 (u32)(adjustment_ns >> 32));
1377 MCDI_SET_DWORD(inadj, PTP_IN_ADJUST_SECONDS, 0);
1378 MCDI_SET_DWORD(inadj, PTP_IN_ADJUST_NANOSECONDS, 0);
1379 rc = efx_mcdi_rpc(efx, MC_CMD_PTP, inadj, sizeof(inadj),
1384 ptp_data->current_adjfreq = delta;
1388 static int efx_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
1390 struct efx_ptp_data *ptp_data = container_of(ptp,
1391 struct efx_ptp_data,
1393 struct efx_nic *efx = ptp_data->channel->efx;
1394 struct timespec delta_ts = ns_to_timespec(delta);
1395 u8 inbuf[MC_CMD_PTP_IN_ADJUST_LEN];
1397 MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_ADJUST);
1398 MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_FREQ_LO, 0);
1399 MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_FREQ_HI, 0);
1400 MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_SECONDS, (u32)delta_ts.tv_sec);
1401 MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_NANOSECONDS, (u32)delta_ts.tv_nsec);
1402 return efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf),
1406 static int efx_phc_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
1408 struct efx_ptp_data *ptp_data = container_of(ptp,
1409 struct efx_ptp_data,
1411 struct efx_nic *efx = ptp_data->channel->efx;
1412 u8 inbuf[MC_CMD_PTP_IN_READ_NIC_TIME_LEN];
1413 u8 outbuf[MC_CMD_PTP_OUT_READ_NIC_TIME_LEN];
1416 MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_READ_NIC_TIME);
1418 rc = efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf),
1419 outbuf, sizeof(outbuf), NULL);
1423 ts->tv_sec = MCDI_DWORD(outbuf, PTP_OUT_READ_NIC_TIME_SECONDS);
1424 ts->tv_nsec = MCDI_DWORD(outbuf, PTP_OUT_READ_NIC_TIME_NANOSECONDS);
1428 static int efx_phc_settime(struct ptp_clock_info *ptp,
1429 const struct timespec *e_ts)
1431 /* Get the current NIC time, efx_phc_gettime.
1432 * Subtract from the desired time to get the offset
1433 * call efx_phc_adjtime with the offset
1436 struct timespec time_now;
1437 struct timespec delta;
1439 rc = efx_phc_gettime(ptp, &time_now);
1443 delta = timespec_sub(*e_ts, time_now);
1445 efx_phc_adjtime(ptp, timespec_to_ns(&delta));
1452 static int efx_phc_enable(struct ptp_clock_info *ptp,
1453 struct ptp_clock_request *request,
1456 struct efx_ptp_data *ptp_data = container_of(ptp,
1457 struct efx_ptp_data,
1459 if (request->type != PTP_CLK_REQ_PPS)
1462 ptp_data->nic_ts_enabled = !!enable;
1466 static const struct efx_channel_type efx_ptp_channel_type = {
1467 .handle_no_channel = efx_ptp_handle_no_channel,
1468 .pre_probe = efx_ptp_probe_channel,
1469 .post_remove = efx_ptp_remove_channel,
1470 .get_name = efx_ptp_get_channel_name,
1471 /* no copy operation; there is no need to reallocate this channel */
1472 .receive_skb = efx_ptp_rx,
1473 .keep_eventq = false,
1476 void efx_ptp_probe(struct efx_nic *efx)
1478 /* Check whether PTP is implemented on this NIC. The DISABLE
1479 * operation will succeed if and only if it is implemented.
1481 if (efx_ptp_disable(efx) == 0)
1482 efx->extra_channel_type[EFX_EXTRA_CHANNEL_PTP] =
1483 &efx_ptp_channel_type;