1 /*******************************************************************************
4 Copyright (C) 2007-2009 STMicroelectronics Ltd
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
22 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
23 *******************************************************************************/
25 #include <linux/etherdevice.h>
26 #include <linux/ethtool.h>
27 #include <linux/interrupt.h>
28 #include <linux/mii.h>
29 #include <linux/phy.h>
33 #include "dwmac_dma.h"
35 #define REG_SPACE_SIZE 0x1054
36 #define MAC100_ETHTOOL_NAME "st_mac100"
37 #define GMAC_ETHTOOL_NAME "st_gmac"
40 char stat_string[ETH_GSTRING_LEN];
45 #define STMMAC_STAT(m) \
46 { #m, FIELD_SIZEOF(struct stmmac_extra_stats, m), \
47 offsetof(struct stmmac_priv, xstats.m)}
49 static const struct stmmac_stats stmmac_gstrings_stats[] = {
51 STMMAC_STAT(tx_underflow),
52 STMMAC_STAT(tx_carrier),
53 STMMAC_STAT(tx_losscarrier),
54 STMMAC_STAT(vlan_tag),
55 STMMAC_STAT(tx_deferred),
57 STMMAC_STAT(tx_jabber),
58 STMMAC_STAT(tx_frame_flushed),
59 STMMAC_STAT(tx_payload_error),
60 STMMAC_STAT(tx_ip_header_error),
63 STMMAC_STAT(sa_filter_fail),
64 STMMAC_STAT(overflow_error),
65 STMMAC_STAT(ipc_csum_error),
66 STMMAC_STAT(rx_collision),
68 STMMAC_STAT(dribbling_bit),
69 STMMAC_STAT(rx_length),
71 STMMAC_STAT(rx_multicast),
72 STMMAC_STAT(rx_gmac_overflow),
73 STMMAC_STAT(rx_watchdog),
74 STMMAC_STAT(da_rx_filter_fail),
75 STMMAC_STAT(sa_rx_filter_fail),
76 STMMAC_STAT(rx_missed_cntr),
77 STMMAC_STAT(rx_overflow_cntr),
79 /* Tx/Rx IRQ error info */
80 STMMAC_STAT(tx_undeflow_irq),
81 STMMAC_STAT(tx_process_stopped_irq),
82 STMMAC_STAT(tx_jabber_irq),
83 STMMAC_STAT(rx_overflow_irq),
84 STMMAC_STAT(rx_buf_unav_irq),
85 STMMAC_STAT(rx_process_stopped_irq),
86 STMMAC_STAT(rx_watchdog_irq),
87 STMMAC_STAT(tx_early_irq),
88 STMMAC_STAT(fatal_bus_error_irq),
89 /* Tx/Rx IRQ Events */
90 STMMAC_STAT(rx_early_irq),
91 STMMAC_STAT(threshold),
92 STMMAC_STAT(tx_pkt_n),
93 STMMAC_STAT(rx_pkt_n),
94 STMMAC_STAT(normal_irq_n),
95 STMMAC_STAT(rx_normal_irq_n),
96 STMMAC_STAT(napi_poll),
97 STMMAC_STAT(tx_normal_irq_n),
98 STMMAC_STAT(tx_clean),
99 STMMAC_STAT(tx_reset_ic_bit),
100 STMMAC_STAT(irq_receive_pmt_irq_n),
102 STMMAC_STAT(mmc_tx_irq_n),
103 STMMAC_STAT(mmc_rx_irq_n),
104 STMMAC_STAT(mmc_rx_csum_offload_irq_n),
106 STMMAC_STAT(irq_tx_path_in_lpi_mode_n),
107 STMMAC_STAT(irq_tx_path_exit_lpi_mode_n),
108 STMMAC_STAT(irq_rx_path_in_lpi_mode_n),
109 STMMAC_STAT(irq_rx_path_exit_lpi_mode_n),
110 STMMAC_STAT(phy_eee_wakeup_error_n),
111 /* Extended RDES status */
112 STMMAC_STAT(ip_hdr_err),
113 STMMAC_STAT(ip_payload_err),
114 STMMAC_STAT(ip_csum_bypassed),
115 STMMAC_STAT(ipv4_pkt_rcvd),
116 STMMAC_STAT(ipv6_pkt_rcvd),
117 STMMAC_STAT(rx_msg_type_ext_no_ptp),
118 STMMAC_STAT(rx_msg_type_sync),
119 STMMAC_STAT(rx_msg_type_follow_up),
120 STMMAC_STAT(rx_msg_type_delay_req),
121 STMMAC_STAT(rx_msg_type_delay_resp),
122 STMMAC_STAT(rx_msg_type_pdelay_req),
123 STMMAC_STAT(rx_msg_type_pdelay_resp),
124 STMMAC_STAT(rx_msg_type_pdelay_follow_up),
125 STMMAC_STAT(ptp_frame_type),
126 STMMAC_STAT(ptp_ver),
127 STMMAC_STAT(timestamp_dropped),
128 STMMAC_STAT(av_pkt_rcvd),
129 STMMAC_STAT(av_tagged_pkt_rcvd),
130 STMMAC_STAT(vlan_tag_priority_val),
131 STMMAC_STAT(l3_filter_match),
132 STMMAC_STAT(l4_filter_match),
133 STMMAC_STAT(l3_l4_filter_no_match),
135 STMMAC_STAT(irq_pcs_ane_n),
136 STMMAC_STAT(irq_pcs_link_n),
137 STMMAC_STAT(irq_rgmii_n),
139 #define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats)
141 /* HW MAC Management counters (if supported) */
142 #define STMMAC_MMC_STAT(m) \
143 { #m, FIELD_SIZEOF(struct stmmac_counters, m), \
144 offsetof(struct stmmac_priv, mmc.m)}
146 static const struct stmmac_stats stmmac_mmc[] = {
147 STMMAC_MMC_STAT(mmc_tx_octetcount_gb),
148 STMMAC_MMC_STAT(mmc_tx_framecount_gb),
149 STMMAC_MMC_STAT(mmc_tx_broadcastframe_g),
150 STMMAC_MMC_STAT(mmc_tx_multicastframe_g),
151 STMMAC_MMC_STAT(mmc_tx_64_octets_gb),
152 STMMAC_MMC_STAT(mmc_tx_65_to_127_octets_gb),
153 STMMAC_MMC_STAT(mmc_tx_128_to_255_octets_gb),
154 STMMAC_MMC_STAT(mmc_tx_256_to_511_octets_gb),
155 STMMAC_MMC_STAT(mmc_tx_512_to_1023_octets_gb),
156 STMMAC_MMC_STAT(mmc_tx_1024_to_max_octets_gb),
157 STMMAC_MMC_STAT(mmc_tx_unicast_gb),
158 STMMAC_MMC_STAT(mmc_tx_multicast_gb),
159 STMMAC_MMC_STAT(mmc_tx_broadcast_gb),
160 STMMAC_MMC_STAT(mmc_tx_underflow_error),
161 STMMAC_MMC_STAT(mmc_tx_singlecol_g),
162 STMMAC_MMC_STAT(mmc_tx_multicol_g),
163 STMMAC_MMC_STAT(mmc_tx_deferred),
164 STMMAC_MMC_STAT(mmc_tx_latecol),
165 STMMAC_MMC_STAT(mmc_tx_exesscol),
166 STMMAC_MMC_STAT(mmc_tx_carrier_error),
167 STMMAC_MMC_STAT(mmc_tx_octetcount_g),
168 STMMAC_MMC_STAT(mmc_tx_framecount_g),
169 STMMAC_MMC_STAT(mmc_tx_excessdef),
170 STMMAC_MMC_STAT(mmc_tx_pause_frame),
171 STMMAC_MMC_STAT(mmc_tx_vlan_frame_g),
172 STMMAC_MMC_STAT(mmc_rx_framecount_gb),
173 STMMAC_MMC_STAT(mmc_rx_octetcount_gb),
174 STMMAC_MMC_STAT(mmc_rx_octetcount_g),
175 STMMAC_MMC_STAT(mmc_rx_broadcastframe_g),
176 STMMAC_MMC_STAT(mmc_rx_multicastframe_g),
177 STMMAC_MMC_STAT(mmc_rx_crc_errror),
178 STMMAC_MMC_STAT(mmc_rx_align_error),
179 STMMAC_MMC_STAT(mmc_rx_run_error),
180 STMMAC_MMC_STAT(mmc_rx_jabber_error),
181 STMMAC_MMC_STAT(mmc_rx_undersize_g),
182 STMMAC_MMC_STAT(mmc_rx_oversize_g),
183 STMMAC_MMC_STAT(mmc_rx_64_octets_gb),
184 STMMAC_MMC_STAT(mmc_rx_65_to_127_octets_gb),
185 STMMAC_MMC_STAT(mmc_rx_128_to_255_octets_gb),
186 STMMAC_MMC_STAT(mmc_rx_256_to_511_octets_gb),
187 STMMAC_MMC_STAT(mmc_rx_512_to_1023_octets_gb),
188 STMMAC_MMC_STAT(mmc_rx_1024_to_max_octets_gb),
189 STMMAC_MMC_STAT(mmc_rx_unicast_g),
190 STMMAC_MMC_STAT(mmc_rx_length_error),
191 STMMAC_MMC_STAT(mmc_rx_autofrangetype),
192 STMMAC_MMC_STAT(mmc_rx_pause_frames),
193 STMMAC_MMC_STAT(mmc_rx_fifo_overflow),
194 STMMAC_MMC_STAT(mmc_rx_vlan_frames_gb),
195 STMMAC_MMC_STAT(mmc_rx_watchdog_error),
196 STMMAC_MMC_STAT(mmc_rx_ipc_intr_mask),
197 STMMAC_MMC_STAT(mmc_rx_ipc_intr),
198 STMMAC_MMC_STAT(mmc_rx_ipv4_gd),
199 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr),
200 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay),
201 STMMAC_MMC_STAT(mmc_rx_ipv4_frag),
202 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl),
203 STMMAC_MMC_STAT(mmc_rx_ipv4_gd_octets),
204 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr_octets),
205 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay_octets),
206 STMMAC_MMC_STAT(mmc_rx_ipv4_frag_octets),
207 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl_octets),
208 STMMAC_MMC_STAT(mmc_rx_ipv6_gd_octets),
209 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr_octets),
210 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay_octets),
211 STMMAC_MMC_STAT(mmc_rx_ipv6_gd),
212 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr),
213 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay),
214 STMMAC_MMC_STAT(mmc_rx_udp_gd),
215 STMMAC_MMC_STAT(mmc_rx_udp_err),
216 STMMAC_MMC_STAT(mmc_rx_tcp_gd),
217 STMMAC_MMC_STAT(mmc_rx_tcp_err),
218 STMMAC_MMC_STAT(mmc_rx_icmp_gd),
219 STMMAC_MMC_STAT(mmc_rx_icmp_err),
220 STMMAC_MMC_STAT(mmc_rx_udp_gd_octets),
221 STMMAC_MMC_STAT(mmc_rx_udp_err_octets),
222 STMMAC_MMC_STAT(mmc_rx_tcp_gd_octets),
223 STMMAC_MMC_STAT(mmc_rx_tcp_err_octets),
224 STMMAC_MMC_STAT(mmc_rx_icmp_gd_octets),
225 STMMAC_MMC_STAT(mmc_rx_icmp_err_octets),
227 #define STMMAC_MMC_STATS_LEN ARRAY_SIZE(stmmac_mmc)
229 static void stmmac_ethtool_getdrvinfo(struct net_device *dev,
230 struct ethtool_drvinfo *info)
232 struct stmmac_priv *priv = netdev_priv(dev);
234 if (priv->plat->has_gmac)
235 strlcpy(info->driver, GMAC_ETHTOOL_NAME, sizeof(info->driver));
237 strlcpy(info->driver, MAC100_ETHTOOL_NAME,
238 sizeof(info->driver));
240 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
243 static int stmmac_ethtool_getsettings(struct net_device *dev,
244 struct ethtool_cmd *cmd)
246 struct stmmac_priv *priv = netdev_priv(dev);
247 struct phy_device *phy = priv->phydev;
250 pr_err("%s: %s: PHY is not registered\n",
251 __func__, dev->name);
254 if (!netif_running(dev)) {
255 pr_err("%s: interface is disabled: we cannot track "
256 "link speed / duplex setting\n", dev->name);
259 cmd->transceiver = XCVR_INTERNAL;
260 spin_lock_irq(&priv->lock);
261 rc = phy_ethtool_gset(phy, cmd);
262 spin_unlock_irq(&priv->lock);
266 static int stmmac_ethtool_setsettings(struct net_device *dev,
267 struct ethtool_cmd *cmd)
269 struct stmmac_priv *priv = netdev_priv(dev);
270 struct phy_device *phy = priv->phydev;
273 spin_lock(&priv->lock);
274 rc = phy_ethtool_sset(phy, cmd);
275 spin_unlock(&priv->lock);
280 static u32 stmmac_ethtool_getmsglevel(struct net_device *dev)
282 struct stmmac_priv *priv = netdev_priv(dev);
283 return priv->msg_enable;
286 static void stmmac_ethtool_setmsglevel(struct net_device *dev, u32 level)
288 struct stmmac_priv *priv = netdev_priv(dev);
289 priv->msg_enable = level;
293 static int stmmac_check_if_running(struct net_device *dev)
295 if (!netif_running(dev))
300 static int stmmac_ethtool_get_regs_len(struct net_device *dev)
302 return REG_SPACE_SIZE;
305 static void stmmac_ethtool_gregs(struct net_device *dev,
306 struct ethtool_regs *regs, void *space)
309 u32 *reg_space = (u32 *) space;
311 struct stmmac_priv *priv = netdev_priv(dev);
313 memset(reg_space, 0x0, REG_SPACE_SIZE);
315 if (!priv->plat->has_gmac) {
317 for (i = 0; i < 12; i++)
318 reg_space[i] = readl(priv->ioaddr + (i * 4));
320 for (i = 0; i < 9; i++)
322 readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4)));
323 reg_space[22] = readl(priv->ioaddr + DMA_CUR_TX_BUF_ADDR);
324 reg_space[23] = readl(priv->ioaddr + DMA_CUR_RX_BUF_ADDR);
327 for (i = 0; i < 55; i++)
328 reg_space[i] = readl(priv->ioaddr + (i * 4));
330 for (i = 0; i < 22; i++)
332 readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4)));
337 stmmac_get_pauseparam(struct net_device *netdev,
338 struct ethtool_pauseparam *pause)
340 struct stmmac_priv *priv = netdev_priv(netdev);
342 spin_lock(&priv->lock);
346 pause->autoneg = priv->phydev->autoneg;
348 if (priv->flow_ctrl & FLOW_RX)
350 if (priv->flow_ctrl & FLOW_TX)
353 spin_unlock(&priv->lock);
357 stmmac_set_pauseparam(struct net_device *netdev,
358 struct ethtool_pauseparam *pause)
360 struct stmmac_priv *priv = netdev_priv(netdev);
361 struct phy_device *phy = priv->phydev;
362 int new_pause = FLOW_OFF;
365 spin_lock(&priv->lock);
368 new_pause |= FLOW_RX;
370 new_pause |= FLOW_TX;
372 priv->flow_ctrl = new_pause;
373 phy->autoneg = pause->autoneg;
376 if (netif_running(netdev))
377 ret = phy_start_aneg(phy);
379 priv->hw->mac->flow_ctrl(priv->ioaddr, phy->duplex,
380 priv->flow_ctrl, priv->pause);
381 spin_unlock(&priv->lock);
385 static void stmmac_get_ethtool_stats(struct net_device *dev,
386 struct ethtool_stats *dummy, u64 *data)
388 struct stmmac_priv *priv = netdev_priv(dev);
391 /* Update the DMA HW counters for dwmac10/100 */
392 if (!priv->plat->has_gmac)
393 priv->hw->dma->dma_diagnostic_fr(&dev->stats,
394 (void *) &priv->xstats,
397 /* If supported, for new GMAC chips expose the MMC counters */
398 if (priv->dma_cap.rmon) {
399 dwmac_mmc_read(priv->ioaddr, &priv->mmc);
401 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
403 p = (char *)priv + stmmac_mmc[i].stat_offset;
405 data[j++] = (stmmac_mmc[i].sizeof_stat ==
406 sizeof(u64)) ? (*(u64 *)p) :
410 if (priv->eee_enabled) {
411 int val = phy_get_eee_err(priv->phydev);
413 priv->xstats.phy_eee_wakeup_error_n = val;
416 for (i = 0; i < STMMAC_STATS_LEN; i++) {
417 char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset;
418 data[j++] = (stmmac_gstrings_stats[i].sizeof_stat ==
419 sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p);
423 static int stmmac_get_sset_count(struct net_device *netdev, int sset)
425 struct stmmac_priv *priv = netdev_priv(netdev);
430 len = STMMAC_STATS_LEN;
432 if (priv->dma_cap.rmon)
433 len += STMMAC_MMC_STATS_LEN;
441 static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data)
445 struct stmmac_priv *priv = netdev_priv(dev);
449 if (priv->dma_cap.rmon)
450 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
451 memcpy(p, stmmac_mmc[i].stat_string,
453 p += ETH_GSTRING_LEN;
455 for (i = 0; i < STMMAC_STATS_LEN; i++) {
456 memcpy(p, stmmac_gstrings_stats[i].stat_string,
458 p += ETH_GSTRING_LEN;
467 /* Currently only support WOL through Magic packet. */
468 static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
470 struct stmmac_priv *priv = netdev_priv(dev);
472 spin_lock_irq(&priv->lock);
473 if (device_can_wakeup(priv->device)) {
474 wol->supported = WAKE_MAGIC | WAKE_UCAST;
475 wol->wolopts = priv->wolopts;
477 spin_unlock_irq(&priv->lock);
480 static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
482 struct stmmac_priv *priv = netdev_priv(dev);
483 u32 support = WAKE_MAGIC | WAKE_UCAST;
485 /* By default almost all GMAC devices support the WoL via
486 * magic frame but we can disable it if the HW capability
487 * register shows no support for pmt_magic_frame. */
488 if ((priv->hw_cap_support) && (!priv->dma_cap.pmt_magic_frame))
489 wol->wolopts &= ~WAKE_MAGIC;
491 if (!device_can_wakeup(priv->device))
494 if (wol->wolopts & ~support)
498 pr_info("stmmac: wakeup enable\n");
499 device_set_wakeup_enable(priv->device, 1);
500 enable_irq_wake(priv->wol_irq);
502 device_set_wakeup_enable(priv->device, 0);
503 disable_irq_wake(priv->wol_irq);
506 spin_lock_irq(&priv->lock);
507 priv->wolopts = wol->wolopts;
508 spin_unlock_irq(&priv->lock);
513 static int stmmac_ethtool_op_get_eee(struct net_device *dev,
514 struct ethtool_eee *edata)
516 struct stmmac_priv *priv = netdev_priv(dev);
518 if (!priv->dma_cap.eee)
521 edata->eee_enabled = priv->eee_enabled;
522 edata->eee_active = priv->eee_active;
523 edata->tx_lpi_timer = priv->tx_lpi_timer;
525 return phy_ethtool_get_eee(priv->phydev, edata);
528 static int stmmac_ethtool_op_set_eee(struct net_device *dev,
529 struct ethtool_eee *edata)
531 struct stmmac_priv *priv = netdev_priv(dev);
533 priv->eee_enabled = edata->eee_enabled;
535 if (!priv->eee_enabled)
536 stmmac_disable_eee_mode(priv);
538 /* We are asking for enabling the EEE but it is safe
539 * to verify all by invoking the eee_init function.
540 * In case of failure it will return an error.
542 priv->eee_enabled = stmmac_eee_init(priv);
543 if (!priv->eee_enabled)
546 /* Do not change tx_lpi_timer in case of failure */
547 priv->tx_lpi_timer = edata->tx_lpi_timer;
550 return phy_ethtool_set_eee(priv->phydev, edata);
553 static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv)
555 unsigned long clk = clk_get_rate(priv->stmmac_clk);
560 return (usec * (clk / 1000000)) / 256;
563 static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv)
565 unsigned long clk = clk_get_rate(priv->stmmac_clk);
570 return (riwt * 256) / (clk / 1000000);
573 static int stmmac_get_coalesce(struct net_device *dev,
574 struct ethtool_coalesce *ec)
576 struct stmmac_priv *priv = netdev_priv(dev);
578 ec->tx_coalesce_usecs = priv->tx_coal_timer;
579 ec->tx_max_coalesced_frames = priv->tx_coal_frames;
582 ec->rx_coalesce_usecs = stmmac_riwt2usec(priv->rx_riwt, priv);
587 static int stmmac_set_coalesce(struct net_device *dev,
588 struct ethtool_coalesce *ec)
590 struct stmmac_priv *priv = netdev_priv(dev);
591 unsigned int rx_riwt;
593 /* Check not supported parameters */
594 if ((ec->rx_max_coalesced_frames) || (ec->rx_coalesce_usecs_irq) ||
595 (ec->rx_max_coalesced_frames_irq) || (ec->tx_coalesce_usecs_irq) ||
596 (ec->use_adaptive_rx_coalesce) || (ec->use_adaptive_tx_coalesce) ||
597 (ec->pkt_rate_low) || (ec->rx_coalesce_usecs_low) ||
598 (ec->rx_max_coalesced_frames_low) || (ec->tx_coalesce_usecs_high) ||
599 (ec->tx_max_coalesced_frames_low) || (ec->pkt_rate_high) ||
600 (ec->tx_coalesce_usecs_low) || (ec->rx_coalesce_usecs_high) ||
601 (ec->rx_max_coalesced_frames_high) ||
602 (ec->tx_max_coalesced_frames_irq) ||
603 (ec->stats_block_coalesce_usecs) ||
604 (ec->tx_max_coalesced_frames_high) || (ec->rate_sample_interval))
607 if (ec->rx_coalesce_usecs == 0)
610 if ((ec->tx_coalesce_usecs == 0) &&
611 (ec->tx_max_coalesced_frames == 0))
614 if ((ec->tx_coalesce_usecs > STMMAC_COAL_TX_TIMER) ||
615 (ec->tx_max_coalesced_frames > STMMAC_TX_MAX_FRAMES))
618 rx_riwt = stmmac_usec2riwt(ec->rx_coalesce_usecs, priv);
620 if ((rx_riwt > MAX_DMA_RIWT) || (rx_riwt < MIN_DMA_RIWT))
622 else if (!priv->use_riwt)
625 /* Only copy relevant parameters, ignore all others. */
626 priv->tx_coal_frames = ec->tx_max_coalesced_frames;
627 priv->tx_coal_timer = ec->tx_coalesce_usecs;
628 priv->rx_riwt = rx_riwt;
629 priv->hw->dma->rx_watchdog(priv->ioaddr, priv->rx_riwt);
634 static const struct ethtool_ops stmmac_ethtool_ops = {
635 .begin = stmmac_check_if_running,
636 .get_drvinfo = stmmac_ethtool_getdrvinfo,
637 .get_settings = stmmac_ethtool_getsettings,
638 .set_settings = stmmac_ethtool_setsettings,
639 .get_msglevel = stmmac_ethtool_getmsglevel,
640 .set_msglevel = stmmac_ethtool_setmsglevel,
641 .get_regs = stmmac_ethtool_gregs,
642 .get_regs_len = stmmac_ethtool_get_regs_len,
643 .get_link = ethtool_op_get_link,
644 .get_pauseparam = stmmac_get_pauseparam,
645 .set_pauseparam = stmmac_set_pauseparam,
646 .get_ethtool_stats = stmmac_get_ethtool_stats,
647 .get_strings = stmmac_get_strings,
648 .get_wol = stmmac_get_wol,
649 .set_wol = stmmac_set_wol,
650 .get_eee = stmmac_ethtool_op_get_eee,
651 .set_eee = stmmac_ethtool_op_set_eee,
652 .get_sset_count = stmmac_get_sset_count,
653 .get_ts_info = ethtool_op_get_ts_info,
654 .get_coalesce = stmmac_get_coalesce,
655 .set_coalesce = stmmac_set_coalesce,
658 void stmmac_set_ethtool_ops(struct net_device *netdev)
660 SET_ETHTOOL_OPS(netdev, &stmmac_ethtool_ops);