2 * Texas Instruments 3-Port Ethernet Switch Address Lookup Engine
4 * Copyright (C) 2012 Texas Instruments
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/seq_file.h>
19 #include <linux/slab.h>
20 #include <linux/err.h>
22 #include <linux/stat.h>
23 #include <linux/sysfs.h>
24 #include <linux/etherdevice.h>
28 #define BITMASK(bits) (BIT(bits) - 1)
30 #define ALE_VERSION_MAJOR(rev) ((rev >> 8) & 0xff)
31 #define ALE_VERSION_MINOR(rev) (rev & 0xff)
34 #define ALE_IDVER 0x00
35 #define ALE_CONTROL 0x08
36 #define ALE_PRESCALE 0x10
37 #define ALE_UNKNOWNVLAN 0x18
38 #define ALE_TABLE_CONTROL 0x20
39 #define ALE_TABLE 0x34
40 #define ALE_PORTCTL 0x40
42 #define ALE_TABLE_WRITE BIT(31)
44 #define ALE_TYPE_FREE 0
45 #define ALE_TYPE_ADDR 1
46 #define ALE_TYPE_VLAN 2
47 #define ALE_TYPE_VLAN_ADDR 3
49 #define ALE_UCAST_PERSISTANT 0
50 #define ALE_UCAST_UNTOUCHED 1
51 #define ALE_UCAST_OUI 2
52 #define ALE_UCAST_TOUCHED 3
54 static inline int cpsw_ale_get_field(u32 *ale_entry, u32 start, u32 bits)
60 idx = 2 - idx; /* flip */
61 return (ale_entry[idx] >> start) & BITMASK(bits);
64 static inline void cpsw_ale_set_field(u32 *ale_entry, u32 start, u32 bits,
69 value &= BITMASK(bits);
72 idx = 2 - idx; /* flip */
73 ale_entry[idx] &= ~(BITMASK(bits) << start);
74 ale_entry[idx] |= (value << start);
77 #define DEFINE_ALE_FIELD(name, start, bits) \
78 static inline int cpsw_ale_get_##name(u32 *ale_entry) \
80 return cpsw_ale_get_field(ale_entry, start, bits); \
82 static inline void cpsw_ale_set_##name(u32 *ale_entry, u32 value) \
84 cpsw_ale_set_field(ale_entry, start, bits, value); \
87 DEFINE_ALE_FIELD(entry_type, 60, 2)
88 DEFINE_ALE_FIELD(vlan_id, 48, 12)
89 DEFINE_ALE_FIELD(mcast_state, 62, 2)
90 DEFINE_ALE_FIELD(port_mask, 66, 3)
91 DEFINE_ALE_FIELD(super, 65, 1)
92 DEFINE_ALE_FIELD(ucast_type, 62, 2)
93 DEFINE_ALE_FIELD(port_num, 66, 2)
94 DEFINE_ALE_FIELD(blocked, 65, 1)
95 DEFINE_ALE_FIELD(secure, 64, 1)
96 DEFINE_ALE_FIELD(vlan_untag_force, 24, 3)
97 DEFINE_ALE_FIELD(vlan_reg_mcast, 16, 3)
98 DEFINE_ALE_FIELD(vlan_unreg_mcast, 8, 3)
99 DEFINE_ALE_FIELD(vlan_member_list, 0, 3)
100 DEFINE_ALE_FIELD(mcast, 40, 1)
102 /* The MAC address field in the ALE entry cannot be macroized as above */
103 static inline void cpsw_ale_get_addr(u32 *ale_entry, u8 *addr)
107 for (i = 0; i < 6; i++)
108 addr[i] = cpsw_ale_get_field(ale_entry, 40 - 8*i, 8);
111 static inline void cpsw_ale_set_addr(u32 *ale_entry, u8 *addr)
115 for (i = 0; i < 6; i++)
116 cpsw_ale_set_field(ale_entry, 40 - 8*i, 8, addr[i]);
119 static int cpsw_ale_read(struct cpsw_ale *ale, int idx, u32 *ale_entry)
123 WARN_ON(idx > ale->params.ale_entries);
125 __raw_writel(idx, ale->params.ale_regs + ALE_TABLE_CONTROL);
127 for (i = 0; i < ALE_ENTRY_WORDS; i++)
128 ale_entry[i] = __raw_readl(ale->params.ale_regs +
134 static int cpsw_ale_write(struct cpsw_ale *ale, int idx, u32 *ale_entry)
138 WARN_ON(idx > ale->params.ale_entries);
140 for (i = 0; i < ALE_ENTRY_WORDS; i++)
141 __raw_writel(ale_entry[i], ale->params.ale_regs +
144 __raw_writel(idx | ALE_TABLE_WRITE, ale->params.ale_regs +
150 static int cpsw_ale_match_addr(struct cpsw_ale *ale, u8 *addr, u16 vid)
152 u32 ale_entry[ALE_ENTRY_WORDS];
155 for (idx = 0; idx < ale->params.ale_entries; idx++) {
158 cpsw_ale_read(ale, idx, ale_entry);
159 type = cpsw_ale_get_entry_type(ale_entry);
160 if (type != ALE_TYPE_ADDR && type != ALE_TYPE_VLAN_ADDR)
162 if (cpsw_ale_get_vlan_id(ale_entry) != vid)
164 cpsw_ale_get_addr(ale_entry, entry_addr);
165 if (ether_addr_equal(entry_addr, addr))
171 static int cpsw_ale_match_vlan(struct cpsw_ale *ale, u16 vid)
173 u32 ale_entry[ALE_ENTRY_WORDS];
176 for (idx = 0; idx < ale->params.ale_entries; idx++) {
177 cpsw_ale_read(ale, idx, ale_entry);
178 type = cpsw_ale_get_entry_type(ale_entry);
179 if (type != ALE_TYPE_VLAN)
181 if (cpsw_ale_get_vlan_id(ale_entry) == vid)
187 static int cpsw_ale_match_free(struct cpsw_ale *ale)
189 u32 ale_entry[ALE_ENTRY_WORDS];
192 for (idx = 0; idx < ale->params.ale_entries; idx++) {
193 cpsw_ale_read(ale, idx, ale_entry);
194 type = cpsw_ale_get_entry_type(ale_entry);
195 if (type == ALE_TYPE_FREE)
201 static int cpsw_ale_find_ageable(struct cpsw_ale *ale)
203 u32 ale_entry[ALE_ENTRY_WORDS];
206 for (idx = 0; idx < ale->params.ale_entries; idx++) {
207 cpsw_ale_read(ale, idx, ale_entry);
208 type = cpsw_ale_get_entry_type(ale_entry);
209 if (type != ALE_TYPE_ADDR && type != ALE_TYPE_VLAN_ADDR)
211 if (cpsw_ale_get_mcast(ale_entry))
213 type = cpsw_ale_get_ucast_type(ale_entry);
214 if (type != ALE_UCAST_PERSISTANT &&
215 type != ALE_UCAST_OUI)
221 static void cpsw_ale_flush_mcast(struct cpsw_ale *ale, u32 *ale_entry,
226 mask = cpsw_ale_get_port_mask(ale_entry);
227 if ((mask & port_mask) == 0)
228 return; /* ports dont intersect, not interested */
231 /* free if only remaining port is host port */
233 cpsw_ale_set_port_mask(ale_entry, mask);
235 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE);
238 int cpsw_ale_flush_multicast(struct cpsw_ale *ale, int port_mask, int vid)
240 u32 ale_entry[ALE_ENTRY_WORDS];
243 for (idx = 0; idx < ale->params.ale_entries; idx++) {
244 cpsw_ale_read(ale, idx, ale_entry);
245 ret = cpsw_ale_get_entry_type(ale_entry);
246 if (ret != ALE_TYPE_ADDR && ret != ALE_TYPE_VLAN_ADDR)
249 /* if vid passed is -1 then remove all multicast entry from
250 * the table irrespective of vlan id, if a valid vlan id is
251 * passed then remove only multicast added to that vlan id.
252 * if vlan id doesn't match then move on to next entry.
254 if (vid != -1 && cpsw_ale_get_vlan_id(ale_entry) != vid)
257 if (cpsw_ale_get_mcast(ale_entry)) {
260 cpsw_ale_get_addr(ale_entry, addr);
261 if (!is_broadcast_ether_addr(addr))
262 cpsw_ale_flush_mcast(ale, ale_entry, port_mask);
265 cpsw_ale_write(ale, idx, ale_entry);
269 EXPORT_SYMBOL_GPL(cpsw_ale_flush_multicast);
271 static inline void cpsw_ale_set_vlan_entry_type(u32 *ale_entry,
274 if (flags & ALE_VLAN) {
275 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_VLAN_ADDR);
276 cpsw_ale_set_vlan_id(ale_entry, vid);
278 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_ADDR);
282 int cpsw_ale_add_ucast(struct cpsw_ale *ale, u8 *addr, int port,
285 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
288 cpsw_ale_set_vlan_entry_type(ale_entry, flags, vid);
290 cpsw_ale_set_addr(ale_entry, addr);
291 cpsw_ale_set_ucast_type(ale_entry, ALE_UCAST_PERSISTANT);
292 cpsw_ale_set_secure(ale_entry, (flags & ALE_SECURE) ? 1 : 0);
293 cpsw_ale_set_blocked(ale_entry, (flags & ALE_BLOCKED) ? 1 : 0);
294 cpsw_ale_set_port_num(ale_entry, port);
296 idx = cpsw_ale_match_addr(ale, addr, (flags & ALE_VLAN) ? vid : 0);
298 idx = cpsw_ale_match_free(ale);
300 idx = cpsw_ale_find_ageable(ale);
304 cpsw_ale_write(ale, idx, ale_entry);
307 EXPORT_SYMBOL_GPL(cpsw_ale_add_ucast);
309 int cpsw_ale_del_ucast(struct cpsw_ale *ale, u8 *addr, int port,
312 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
315 idx = cpsw_ale_match_addr(ale, addr, (flags & ALE_VLAN) ? vid : 0);
319 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE);
320 cpsw_ale_write(ale, idx, ale_entry);
323 EXPORT_SYMBOL_GPL(cpsw_ale_del_ucast);
325 int cpsw_ale_add_mcast(struct cpsw_ale *ale, u8 *addr, int port_mask,
326 int flags, u16 vid, int mcast_state)
328 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
331 idx = cpsw_ale_match_addr(ale, addr, (flags & ALE_VLAN) ? vid : 0);
333 cpsw_ale_read(ale, idx, ale_entry);
335 cpsw_ale_set_vlan_entry_type(ale_entry, flags, vid);
337 cpsw_ale_set_addr(ale_entry, addr);
338 cpsw_ale_set_super(ale_entry, (flags & ALE_BLOCKED) ? 1 : 0);
339 cpsw_ale_set_mcast_state(ale_entry, mcast_state);
341 mask = cpsw_ale_get_port_mask(ale_entry);
343 cpsw_ale_set_port_mask(ale_entry, port_mask);
346 idx = cpsw_ale_match_free(ale);
348 idx = cpsw_ale_find_ageable(ale);
352 cpsw_ale_write(ale, idx, ale_entry);
355 EXPORT_SYMBOL_GPL(cpsw_ale_add_mcast);
357 int cpsw_ale_del_mcast(struct cpsw_ale *ale, u8 *addr, int port_mask,
360 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
363 idx = cpsw_ale_match_addr(ale, addr, (flags & ALE_VLAN) ? vid : 0);
367 cpsw_ale_read(ale, idx, ale_entry);
370 cpsw_ale_set_port_mask(ale_entry, port_mask);
372 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE);
374 cpsw_ale_write(ale, idx, ale_entry);
377 EXPORT_SYMBOL_GPL(cpsw_ale_del_mcast);
379 int cpsw_ale_add_vlan(struct cpsw_ale *ale, u16 vid, int port, int untag,
380 int reg_mcast, int unreg_mcast)
382 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
385 idx = cpsw_ale_match_vlan(ale, vid);
387 cpsw_ale_read(ale, idx, ale_entry);
389 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_VLAN);
390 cpsw_ale_set_vlan_id(ale_entry, vid);
392 cpsw_ale_set_vlan_untag_force(ale_entry, untag);
393 cpsw_ale_set_vlan_reg_mcast(ale_entry, reg_mcast);
394 cpsw_ale_set_vlan_unreg_mcast(ale_entry, unreg_mcast);
395 cpsw_ale_set_vlan_member_list(ale_entry, port);
398 idx = cpsw_ale_match_free(ale);
400 idx = cpsw_ale_find_ageable(ale);
404 cpsw_ale_write(ale, idx, ale_entry);
407 EXPORT_SYMBOL_GPL(cpsw_ale_add_vlan);
409 int cpsw_ale_del_vlan(struct cpsw_ale *ale, u16 vid, int port_mask)
411 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
414 idx = cpsw_ale_match_vlan(ale, vid);
418 cpsw_ale_read(ale, idx, ale_entry);
421 cpsw_ale_set_vlan_member_list(ale_entry, port_mask);
423 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE);
425 cpsw_ale_write(ale, idx, ale_entry);
428 EXPORT_SYMBOL_GPL(cpsw_ale_del_vlan);
430 void cpsw_ale_set_allmulti(struct cpsw_ale *ale, int allmulti)
432 u32 ale_entry[ALE_ENTRY_WORDS];
436 /* Only bother doing the work if the setting is actually changing */
437 if (ale->allmulti == allmulti)
440 /* Remember the new setting to check against next time */
441 ale->allmulti = allmulti;
443 for (idx = 0; idx < ale->params.ale_entries; idx++) {
444 cpsw_ale_read(ale, idx, ale_entry);
445 type = cpsw_ale_get_entry_type(ale_entry);
446 if (type != ALE_TYPE_VLAN)
449 unreg_mcast = cpsw_ale_get_vlan_unreg_mcast(ale_entry);
454 cpsw_ale_set_vlan_unreg_mcast(ale_entry, unreg_mcast);
455 cpsw_ale_write(ale, idx, ale_entry);
458 EXPORT_SYMBOL_GPL(cpsw_ale_set_allmulti);
460 struct ale_control_info {
462 int offset, port_offset;
463 int shift, port_shift;
467 static const struct ale_control_info ale_controls[ALE_NUM_CONTROLS] = {
470 .offset = ALE_CONTROL,
478 .offset = ALE_CONTROL,
486 .offset = ALE_CONTROL,
492 [ALE_P0_UNI_FLOOD] = {
493 .name = "port0_unicast_flood",
494 .offset = ALE_CONTROL,
500 [ALE_VLAN_NOLEARN] = {
501 .name = "vlan_nolearn",
502 .offset = ALE_CONTROL,
508 [ALE_NO_PORT_VLAN] = {
509 .name = "no_port_vlan",
510 .offset = ALE_CONTROL,
518 .offset = ALE_CONTROL,
526 .offset = ALE_CONTROL,
532 [ALE_RATE_LIMIT_TX] = {
533 .name = "rate_limit_tx",
534 .offset = ALE_CONTROL,
541 .name = "vlan_aware",
542 .offset = ALE_CONTROL,
548 [ALE_AUTH_ENABLE] = {
549 .name = "auth_enable",
550 .offset = ALE_CONTROL,
557 .name = "rate_limit",
558 .offset = ALE_CONTROL,
565 .name = "port_state",
566 .offset = ALE_PORTCTL,
572 [ALE_PORT_DROP_UNTAGGED] = {
573 .name = "drop_untagged",
574 .offset = ALE_PORTCTL,
580 [ALE_PORT_DROP_UNKNOWN_VLAN] = {
581 .name = "drop_unknown",
582 .offset = ALE_PORTCTL,
588 [ALE_PORT_NOLEARN] = {
590 .offset = ALE_PORTCTL,
596 [ALE_PORT_NO_SA_UPDATE] = {
597 .name = "no_source_update",
598 .offset = ALE_PORTCTL,
604 [ALE_PORT_MCAST_LIMIT] = {
605 .name = "mcast_limit",
606 .offset = ALE_PORTCTL,
612 [ALE_PORT_BCAST_LIMIT] = {
613 .name = "bcast_limit",
614 .offset = ALE_PORTCTL,
620 [ALE_PORT_UNKNOWN_VLAN_MEMBER] = {
621 .name = "unknown_vlan_member",
622 .offset = ALE_UNKNOWNVLAN,
628 [ALE_PORT_UNKNOWN_MCAST_FLOOD] = {
629 .name = "unknown_mcast_flood",
630 .offset = ALE_UNKNOWNVLAN,
636 [ALE_PORT_UNKNOWN_REG_MCAST_FLOOD] = {
637 .name = "unknown_reg_flood",
638 .offset = ALE_UNKNOWNVLAN,
644 [ALE_PORT_UNTAGGED_EGRESS] = {
645 .name = "untagged_egress",
646 .offset = ALE_UNKNOWNVLAN,
654 int cpsw_ale_control_set(struct cpsw_ale *ale, int port, int control,
657 const struct ale_control_info *info;
661 if (control < 0 || control >= ARRAY_SIZE(ale_controls))
664 info = &ale_controls[control];
665 if (info->port_offset == 0 && info->port_shift == 0)
666 port = 0; /* global, port is a dont care */
668 if (port < 0 || port > ale->params.ale_ports)
671 mask = BITMASK(info->bits);
675 offset = info->offset + (port * info->port_offset);
676 shift = info->shift + (port * info->port_shift);
678 tmp = __raw_readl(ale->params.ale_regs + offset);
679 tmp = (tmp & ~(mask << shift)) | (value << shift);
680 __raw_writel(tmp, ale->params.ale_regs + offset);
684 EXPORT_SYMBOL_GPL(cpsw_ale_control_set);
686 int cpsw_ale_control_get(struct cpsw_ale *ale, int port, int control)
688 const struct ale_control_info *info;
692 if (control < 0 || control >= ARRAY_SIZE(ale_controls))
695 info = &ale_controls[control];
696 if (info->port_offset == 0 && info->port_shift == 0)
697 port = 0; /* global, port is a dont care */
699 if (port < 0 || port > ale->params.ale_ports)
702 offset = info->offset + (port * info->port_offset);
703 shift = info->shift + (port * info->port_shift);
705 tmp = __raw_readl(ale->params.ale_regs + offset) >> shift;
706 return tmp & BITMASK(info->bits);
708 EXPORT_SYMBOL_GPL(cpsw_ale_control_get);
710 static void cpsw_ale_timer(unsigned long arg)
712 struct cpsw_ale *ale = (struct cpsw_ale *)arg;
714 cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1);
717 ale->timer.expires = jiffies + ale->ageout;
718 add_timer(&ale->timer);
722 void cpsw_ale_start(struct cpsw_ale *ale)
726 rev = __raw_readl(ale->params.ale_regs + ALE_IDVER);
727 dev_dbg(ale->params.dev, "initialized cpsw ale revision %d.%d\n",
728 ALE_VERSION_MAJOR(rev), ALE_VERSION_MINOR(rev));
729 cpsw_ale_control_set(ale, 0, ALE_ENABLE, 1);
730 cpsw_ale_control_set(ale, 0, ALE_CLEAR, 1);
732 init_timer(&ale->timer);
733 ale->timer.data = (unsigned long)ale;
734 ale->timer.function = cpsw_ale_timer;
736 ale->timer.expires = jiffies + ale->ageout;
737 add_timer(&ale->timer);
740 EXPORT_SYMBOL_GPL(cpsw_ale_start);
742 void cpsw_ale_stop(struct cpsw_ale *ale)
744 del_timer_sync(&ale->timer);
746 EXPORT_SYMBOL_GPL(cpsw_ale_stop);
748 struct cpsw_ale *cpsw_ale_create(struct cpsw_ale_params *params)
750 struct cpsw_ale *ale;
752 ale = kzalloc(sizeof(*ale), GFP_KERNEL);
756 ale->params = *params;
757 ale->ageout = ale->params.ale_ageout * HZ;
761 EXPORT_SYMBOL_GPL(cpsw_ale_create);
763 int cpsw_ale_destroy(struct cpsw_ale *ale)
767 cpsw_ale_control_set(ale, 0, ALE_ENABLE, 0);
771 EXPORT_SYMBOL_GPL(cpsw_ale_destroy);
773 void cpsw_ale_dump(struct cpsw_ale *ale, u32 *data)
777 for (i = 0; i < ale->params.ale_entries; i++) {
778 cpsw_ale_read(ale, i, data);
779 data += ALE_ENTRY_WORDS;
782 EXPORT_SYMBOL_GPL(cpsw_ale_dump);
784 MODULE_LICENSE("GPL v2");
785 MODULE_DESCRIPTION("TI CPSW ALE driver");
786 MODULE_AUTHOR("Texas Instruments");