2 * Xilinx Axi Ethernet device driver
4 * Copyright (c) 2008 Nissin Systems Co., Ltd., Yoshio Kashiwagi
5 * Copyright (c) 2005-2008 DLA Systems, David H. Lynch Jr. <dhlii@dlasys.net>
6 * Copyright (c) 2008-2009 Secret Lab Technologies Ltd.
7 * Copyright (c) 2010 - 2011 Michal Simek <monstr@monstr.eu>
8 * Copyright (c) 2010 - 2011 PetaLogix
9 * Copyright (c) 2010 - 2012 Xilinx, Inc. All rights reserved.
11 * This is a driver for the Xilinx Axi Ethernet which is used in the Virtex6
15 * - Add Axi Fifo support.
16 * - Factor out Axi DMA code into separate driver.
17 * - Test and fix basic multicast filtering.
18 * - Add support for extended multicast filtering.
19 * - Test basic VLAN support.
20 * - Add support for extended VLAN support.
23 #include <linux/delay.h>
24 #include <linux/etherdevice.h>
25 #include <linux/init.h>
26 #include <linux/module.h>
27 #include <linux/netdevice.h>
28 #include <linux/of_mdio.h>
29 #include <linux/of_platform.h>
30 #include <linux/of_address.h>
31 #include <linux/skbuff.h>
32 #include <linux/spinlock.h>
33 #include <linux/phy.h>
34 #include <linux/mii.h>
35 #include <linux/ethtool.h>
37 #include "xilinx_axienet.h"
39 /* Descriptors defines for Tx and Rx DMA - 2^n for the best performance */
43 /* Must be shorter than length of ethtool_drvinfo.driver field to fit */
44 #define DRIVER_NAME "xaxienet"
45 #define DRIVER_DESCRIPTION "Xilinx Axi Ethernet driver"
46 #define DRIVER_VERSION "1.00a"
48 #define AXIENET_REGS_N 32
50 /* Match table for of_platform binding */
51 static struct of_device_id axienet_of_match[] = {
52 { .compatible = "xlnx,axi-ethernet-1.00.a", },
53 { .compatible = "xlnx,axi-ethernet-1.01.a", },
54 { .compatible = "xlnx,axi-ethernet-2.01.a", },
58 MODULE_DEVICE_TABLE(of, axienet_of_match);
60 /* Option table for setting up Axi Ethernet hardware options */
61 static struct axienet_option axienet_options[] = {
62 /* Turn on jumbo packet support for both Rx and Tx */
64 .opt = XAE_OPTION_JUMBO,
66 .m_or = XAE_TC_JUM_MASK,
68 .opt = XAE_OPTION_JUMBO,
69 .reg = XAE_RCW1_OFFSET,
70 .m_or = XAE_RCW1_JUM_MASK,
71 }, { /* Turn on VLAN packet support for both Rx and Tx */
72 .opt = XAE_OPTION_VLAN,
74 .m_or = XAE_TC_VLAN_MASK,
76 .opt = XAE_OPTION_VLAN,
77 .reg = XAE_RCW1_OFFSET,
78 .m_or = XAE_RCW1_VLAN_MASK,
79 }, { /* Turn on FCS stripping on receive packets */
80 .opt = XAE_OPTION_FCS_STRIP,
81 .reg = XAE_RCW1_OFFSET,
82 .m_or = XAE_RCW1_FCS_MASK,
83 }, { /* Turn on FCS insertion on transmit packets */
84 .opt = XAE_OPTION_FCS_INSERT,
86 .m_or = XAE_TC_FCS_MASK,
87 }, { /* Turn off length/type field checking on receive packets */
88 .opt = XAE_OPTION_LENTYPE_ERR,
89 .reg = XAE_RCW1_OFFSET,
90 .m_or = XAE_RCW1_LT_DIS_MASK,
91 }, { /* Turn on Rx flow control */
92 .opt = XAE_OPTION_FLOW_CONTROL,
93 .reg = XAE_FCC_OFFSET,
94 .m_or = XAE_FCC_FCRX_MASK,
95 }, { /* Turn on Tx flow control */
96 .opt = XAE_OPTION_FLOW_CONTROL,
97 .reg = XAE_FCC_OFFSET,
98 .m_or = XAE_FCC_FCTX_MASK,
99 }, { /* Turn on promiscuous frame filtering */
100 .opt = XAE_OPTION_PROMISC,
101 .reg = XAE_FMI_OFFSET,
102 .m_or = XAE_FMI_PM_MASK,
103 }, { /* Enable transmitter */
104 .opt = XAE_OPTION_TXEN,
105 .reg = XAE_TC_OFFSET,
106 .m_or = XAE_TC_TX_MASK,
107 }, { /* Enable receiver */
108 .opt = XAE_OPTION_RXEN,
109 .reg = XAE_RCW1_OFFSET,
110 .m_or = XAE_RCW1_RX_MASK,
116 * axienet_dma_in32 - Memory mapped Axi DMA register read
117 * @lp: Pointer to axienet local structure
118 * @reg: Address offset from the base address of the Axi DMA core
120 * returns: The contents of the Axi DMA register
122 * This function returns the contents of the corresponding Axi DMA register.
124 static inline u32 axienet_dma_in32(struct axienet_local *lp, off_t reg)
126 return in_be32(lp->dma_regs + reg);
130 * axienet_dma_out32 - Memory mapped Axi DMA register write.
131 * @lp: Pointer to axienet local structure
132 * @reg: Address offset from the base address of the Axi DMA core
133 * @value: Value to be written into the Axi DMA register
135 * This function writes the desired value into the corresponding Axi DMA
138 static inline void axienet_dma_out32(struct axienet_local *lp,
139 off_t reg, u32 value)
141 out_be32((lp->dma_regs + reg), value);
145 * axienet_dma_bd_release - Release buffer descriptor rings
146 * @ndev: Pointer to the net_device structure
148 * This function is used to release the descriptors allocated in
149 * axienet_dma_bd_init. axienet_dma_bd_release is called when Axi Ethernet
150 * driver stop api is called.
152 static void axienet_dma_bd_release(struct net_device *ndev)
155 struct axienet_local *lp = netdev_priv(ndev);
157 for (i = 0; i < RX_BD_NUM; i++) {
158 dma_unmap_single(ndev->dev.parent, lp->rx_bd_v[i].phys,
159 lp->max_frm_size, DMA_FROM_DEVICE);
160 dev_kfree_skb((struct sk_buff *)
161 (lp->rx_bd_v[i].sw_id_offset));
165 dma_free_coherent(ndev->dev.parent,
166 sizeof(*lp->rx_bd_v) * RX_BD_NUM,
171 dma_free_coherent(ndev->dev.parent,
172 sizeof(*lp->tx_bd_v) * TX_BD_NUM,
179 * axienet_dma_bd_init - Setup buffer descriptor rings for Axi DMA
180 * @ndev: Pointer to the net_device structure
182 * returns: 0, on success
183 * -ENOMEM, on failure
185 * This function is called to initialize the Rx and Tx DMA descriptor
186 * rings. This initializes the descriptors with required default values
187 * and is called when Axi Ethernet driver reset is called.
189 static int axienet_dma_bd_init(struct net_device *ndev)
194 struct axienet_local *lp = netdev_priv(ndev);
196 /* Reset the indexes which are used for accessing the BDs */
202 * Allocate the Tx and Rx buffer descriptors.
204 lp->tx_bd_v = dma_alloc_coherent(ndev->dev.parent,
205 sizeof(*lp->tx_bd_v) * TX_BD_NUM,
209 dev_err(&ndev->dev, "unable to allocate DMA Tx buffer "
214 lp->rx_bd_v = dma_alloc_coherent(ndev->dev.parent,
215 sizeof(*lp->rx_bd_v) * RX_BD_NUM,
219 dev_err(&ndev->dev, "unable to allocate DMA Rx buffer "
224 memset(lp->tx_bd_v, 0, sizeof(*lp->tx_bd_v) * TX_BD_NUM);
225 for (i = 0; i < TX_BD_NUM; i++) {
226 lp->tx_bd_v[i].next = lp->tx_bd_p +
227 sizeof(*lp->tx_bd_v) *
228 ((i + 1) % TX_BD_NUM);
231 memset(lp->rx_bd_v, 0, sizeof(*lp->rx_bd_v) * RX_BD_NUM);
232 for (i = 0; i < RX_BD_NUM; i++) {
233 lp->rx_bd_v[i].next = lp->rx_bd_p +
234 sizeof(*lp->rx_bd_v) *
235 ((i + 1) % RX_BD_NUM);
237 skb = netdev_alloc_skb_ip_align(ndev, lp->max_frm_size);
241 lp->rx_bd_v[i].sw_id_offset = (u32) skb;
242 lp->rx_bd_v[i].phys = dma_map_single(ndev->dev.parent,
246 lp->rx_bd_v[i].cntrl = lp->max_frm_size;
249 /* Start updating the Rx channel control register */
250 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET);
251 /* Update the interrupt coalesce count */
252 cr = ((cr & ~XAXIDMA_COALESCE_MASK) |
253 ((lp->coalesce_count_rx) << XAXIDMA_COALESCE_SHIFT));
254 /* Update the delay timer count */
255 cr = ((cr & ~XAXIDMA_DELAY_MASK) |
256 (XAXIDMA_DFT_RX_WAITBOUND << XAXIDMA_DELAY_SHIFT));
257 /* Enable coalesce, delay timer and error interrupts */
258 cr |= XAXIDMA_IRQ_ALL_MASK;
259 /* Write to the Rx channel control register */
260 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr);
262 /* Start updating the Tx channel control register */
263 cr = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET);
264 /* Update the interrupt coalesce count */
265 cr = (((cr & ~XAXIDMA_COALESCE_MASK)) |
266 ((lp->coalesce_count_tx) << XAXIDMA_COALESCE_SHIFT));
267 /* Update the delay timer count */
268 cr = (((cr & ~XAXIDMA_DELAY_MASK)) |
269 (XAXIDMA_DFT_TX_WAITBOUND << XAXIDMA_DELAY_SHIFT));
270 /* Enable coalesce, delay timer and error interrupts */
271 cr |= XAXIDMA_IRQ_ALL_MASK;
272 /* Write to the Tx channel control register */
273 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr);
275 /* Populate the tail pointer and bring the Rx Axi DMA engine out of
276 * halted state. This will make the Rx side ready for reception.*/
277 axienet_dma_out32(lp, XAXIDMA_RX_CDESC_OFFSET, lp->rx_bd_p);
278 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET);
279 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET,
280 cr | XAXIDMA_CR_RUNSTOP_MASK);
281 axienet_dma_out32(lp, XAXIDMA_RX_TDESC_OFFSET, lp->rx_bd_p +
282 (sizeof(*lp->rx_bd_v) * (RX_BD_NUM - 1)));
284 /* Write to the RS (Run-stop) bit in the Tx channel control register.
285 * Tx channel is now ready to run. But only after we write to the
286 * tail pointer register that the Tx channel will start transmitting */
287 axienet_dma_out32(lp, XAXIDMA_TX_CDESC_OFFSET, lp->tx_bd_p);
288 cr = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET);
289 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET,
290 cr | XAXIDMA_CR_RUNSTOP_MASK);
294 axienet_dma_bd_release(ndev);
299 * axienet_set_mac_address - Write the MAC address
300 * @ndev: Pointer to the net_device structure
301 * @address: 6 byte Address to be written as MAC address
303 * This function is called to initialize the MAC address of the Axi Ethernet
304 * core. It writes to the UAW0 and UAW1 registers of the core.
306 static void axienet_set_mac_address(struct net_device *ndev, void *address)
308 struct axienet_local *lp = netdev_priv(ndev);
311 memcpy(ndev->dev_addr, address, ETH_ALEN);
312 if (!is_valid_ether_addr(ndev->dev_addr))
313 eth_random_addr(ndev->dev_addr);
315 /* Set up unicast MAC address filter set its mac address */
316 axienet_iow(lp, XAE_UAW0_OFFSET,
317 (ndev->dev_addr[0]) |
318 (ndev->dev_addr[1] << 8) |
319 (ndev->dev_addr[2] << 16) |
320 (ndev->dev_addr[3] << 24));
321 axienet_iow(lp, XAE_UAW1_OFFSET,
322 (((axienet_ior(lp, XAE_UAW1_OFFSET)) &
323 ~XAE_UAW1_UNICASTADDR_MASK) |
325 (ndev->dev_addr[5] << 8))));
329 * netdev_set_mac_address - Write the MAC address (from outside the driver)
330 * @ndev: Pointer to the net_device structure
331 * @p: 6 byte Address to be written as MAC address
333 * returns: 0 for all conditions. Presently, there is no failure case.
335 * This function is called to initialize the MAC address of the Axi Ethernet
336 * core. It calls the core specific axienet_set_mac_address. This is the
337 * function that goes into net_device_ops structure entry ndo_set_mac_address.
339 static int netdev_set_mac_address(struct net_device *ndev, void *p)
341 struct sockaddr *addr = p;
342 axienet_set_mac_address(ndev, addr->sa_data);
347 * axienet_set_multicast_list - Prepare the multicast table
348 * @ndev: Pointer to the net_device structure
350 * This function is called to initialize the multicast table during
351 * initialization. The Axi Ethernet basic multicast support has a four-entry
352 * multicast table which is initialized here. Additionally this function
353 * goes into the net_device_ops structure entry ndo_set_multicast_list. This
354 * means whenever the multicast table entries need to be updated this
355 * function gets called.
357 static void axienet_set_multicast_list(struct net_device *ndev)
360 u32 reg, af0reg, af1reg;
361 struct axienet_local *lp = netdev_priv(ndev);
363 if (ndev->flags & (IFF_ALLMULTI | IFF_PROMISC) ||
364 netdev_mc_count(ndev) > XAE_MULTICAST_CAM_TABLE_NUM) {
365 /* We must make the kernel realize we had to move into
366 * promiscuous mode. If it was a promiscuous mode request
367 * the flag is already set. If not we set it. */
368 ndev->flags |= IFF_PROMISC;
369 reg = axienet_ior(lp, XAE_FMI_OFFSET);
370 reg |= XAE_FMI_PM_MASK;
371 axienet_iow(lp, XAE_FMI_OFFSET, reg);
372 dev_info(&ndev->dev, "Promiscuous mode enabled.\n");
373 } else if (!netdev_mc_empty(ndev)) {
374 struct netdev_hw_addr *ha;
377 netdev_for_each_mc_addr(ha, ndev) {
378 if (i >= XAE_MULTICAST_CAM_TABLE_NUM)
381 af0reg = (ha->addr[0]);
382 af0reg |= (ha->addr[1] << 8);
383 af0reg |= (ha->addr[2] << 16);
384 af0reg |= (ha->addr[3] << 24);
386 af1reg = (ha->addr[4]);
387 af1reg |= (ha->addr[5] << 8);
389 reg = axienet_ior(lp, XAE_FMI_OFFSET) & 0xFFFFFF00;
392 axienet_iow(lp, XAE_FMI_OFFSET, reg);
393 axienet_iow(lp, XAE_AF0_OFFSET, af0reg);
394 axienet_iow(lp, XAE_AF1_OFFSET, af1reg);
398 reg = axienet_ior(lp, XAE_FMI_OFFSET);
399 reg &= ~XAE_FMI_PM_MASK;
401 axienet_iow(lp, XAE_FMI_OFFSET, reg);
403 for (i = 0; i < XAE_MULTICAST_CAM_TABLE_NUM; i++) {
404 reg = axienet_ior(lp, XAE_FMI_OFFSET) & 0xFFFFFF00;
407 axienet_iow(lp, XAE_FMI_OFFSET, reg);
408 axienet_iow(lp, XAE_AF0_OFFSET, 0);
409 axienet_iow(lp, XAE_AF1_OFFSET, 0);
412 dev_info(&ndev->dev, "Promiscuous mode disabled.\n");
417 * axienet_setoptions - Set an Axi Ethernet option
418 * @ndev: Pointer to the net_device structure
419 * @options: Option to be enabled/disabled
421 * The Axi Ethernet core has multiple features which can be selectively turned
422 * on or off. The typical options could be jumbo frame option, basic VLAN
423 * option, promiscuous mode option etc. This function is used to set or clear
424 * these options in the Axi Ethernet hardware. This is done through
425 * axienet_option structure .
427 static void axienet_setoptions(struct net_device *ndev, u32 options)
430 struct axienet_local *lp = netdev_priv(ndev);
431 struct axienet_option *tp = &axienet_options[0];
434 reg = ((axienet_ior(lp, tp->reg)) & ~(tp->m_or));
435 if (options & tp->opt)
437 axienet_iow(lp, tp->reg, reg);
441 lp->options |= options;
444 static void __axienet_device_reset(struct axienet_local *lp,
445 struct device *dev, off_t offset)
448 /* Reset Axi DMA. This would reset Axi Ethernet core as well. The reset
449 * process of Axi DMA takes a while to complete as all pending
450 * commands/transfers will be flushed or completed during this
452 axienet_dma_out32(lp, offset, XAXIDMA_CR_RESET_MASK);
453 timeout = DELAY_OF_ONE_MILLISEC;
454 while (axienet_dma_in32(lp, offset) & XAXIDMA_CR_RESET_MASK) {
456 if (--timeout == 0) {
457 dev_err(dev, "axienet_device_reset DMA "
465 * axienet_device_reset - Reset and initialize the Axi Ethernet hardware.
466 * @ndev: Pointer to the net_device structure
468 * This function is called to reset and initialize the Axi Ethernet core. This
469 * is typically called during initialization. It does a reset of the Axi DMA
470 * Rx/Tx channels and initializes the Axi DMA BDs. Since Axi DMA reset lines
471 * areconnected to Axi Ethernet reset lines, this in turn resets the Axi
472 * Ethernet core. No separate hardware reset is done for the Axi Ethernet
475 static void axienet_device_reset(struct net_device *ndev)
478 struct axienet_local *lp = netdev_priv(ndev);
480 __axienet_device_reset(lp, &ndev->dev, XAXIDMA_TX_CR_OFFSET);
481 __axienet_device_reset(lp, &ndev->dev, XAXIDMA_RX_CR_OFFSET);
483 lp->max_frm_size = XAE_MAX_VLAN_FRAME_SIZE;
484 lp->options &= (~XAE_OPTION_JUMBO);
486 if ((ndev->mtu > XAE_MTU) &&
487 (ndev->mtu <= XAE_JUMBO_MTU) &&
488 (lp->jumbo_support)) {
489 lp->max_frm_size = ndev->mtu + XAE_HDR_VLAN_SIZE +
491 lp->options |= XAE_OPTION_JUMBO;
494 if (axienet_dma_bd_init(ndev)) {
495 dev_err(&ndev->dev, "axienet_device_reset descriptor "
496 "allocation failed\n");
499 axienet_status = axienet_ior(lp, XAE_RCW1_OFFSET);
500 axienet_status &= ~XAE_RCW1_RX_MASK;
501 axienet_iow(lp, XAE_RCW1_OFFSET, axienet_status);
503 axienet_status = axienet_ior(lp, XAE_IP_OFFSET);
504 if (axienet_status & XAE_INT_RXRJECT_MASK)
505 axienet_iow(lp, XAE_IS_OFFSET, XAE_INT_RXRJECT_MASK);
507 axienet_iow(lp, XAE_FCC_OFFSET, XAE_FCC_FCRX_MASK);
509 /* Sync default options with HW but leave receiver and
510 * transmitter disabled.*/
511 axienet_setoptions(ndev, lp->options &
512 ~(XAE_OPTION_TXEN | XAE_OPTION_RXEN));
513 axienet_set_mac_address(ndev, NULL);
514 axienet_set_multicast_list(ndev);
515 axienet_setoptions(ndev, lp->options);
517 ndev->trans_start = jiffies;
521 * axienet_adjust_link - Adjust the PHY link speed/duplex.
522 * @ndev: Pointer to the net_device structure
524 * This function is called to change the speed and duplex setting after
525 * auto negotiation is done by the PHY. This is the function that gets
526 * registered with the PHY interface through the "of_phy_connect" call.
528 static void axienet_adjust_link(struct net_device *ndev)
533 struct axienet_local *lp = netdev_priv(ndev);
534 struct phy_device *phy = lp->phy_dev;
536 link_state = phy->speed | (phy->duplex << 1) | phy->link;
537 if (lp->last_link != link_state) {
538 if ((phy->speed == SPEED_10) || (phy->speed == SPEED_100)) {
539 if (lp->phy_type == XAE_PHY_TYPE_1000BASE_X)
542 if ((phy->speed == SPEED_1000) &&
543 (lp->phy_type == XAE_PHY_TYPE_MII))
548 emmc_reg = axienet_ior(lp, XAE_EMMC_OFFSET);
549 emmc_reg &= ~XAE_EMMC_LINKSPEED_MASK;
551 switch (phy->speed) {
553 emmc_reg |= XAE_EMMC_LINKSPD_1000;
556 emmc_reg |= XAE_EMMC_LINKSPD_100;
559 emmc_reg |= XAE_EMMC_LINKSPD_10;
562 dev_err(&ndev->dev, "Speed other than 10, 100 "
563 "or 1Gbps is not supported\n");
567 axienet_iow(lp, XAE_EMMC_OFFSET, emmc_reg);
568 lp->last_link = link_state;
569 phy_print_status(phy);
571 dev_err(&ndev->dev, "Error setting Axi Ethernet "
578 * axienet_start_xmit_done - Invoked once a transmit is completed by the
579 * Axi DMA Tx channel.
580 * @ndev: Pointer to the net_device structure
582 * This function is invoked from the Axi DMA Tx isr to notify the completion
583 * of transmit operation. It clears fields in the corresponding Tx BDs and
584 * unmaps the corresponding buffer so that CPU can regain ownership of the
585 * buffer. It finally invokes "netif_wake_queue" to restart transmission if
588 static void axienet_start_xmit_done(struct net_device *ndev)
592 struct axienet_local *lp = netdev_priv(ndev);
593 struct axidma_bd *cur_p;
594 unsigned int status = 0;
596 cur_p = &lp->tx_bd_v[lp->tx_bd_ci];
597 status = cur_p->status;
598 while (status & XAXIDMA_BD_STS_COMPLETE_MASK) {
599 dma_unmap_single(ndev->dev.parent, cur_p->phys,
600 (cur_p->cntrl & XAXIDMA_BD_CTRL_LENGTH_MASK),
603 dev_kfree_skb_irq((struct sk_buff *)cur_p->app4);
611 size += status & XAXIDMA_BD_STS_ACTUAL_LEN_MASK;
614 lp->tx_bd_ci = ++lp->tx_bd_ci % TX_BD_NUM;
615 cur_p = &lp->tx_bd_v[lp->tx_bd_ci];
616 status = cur_p->status;
619 ndev->stats.tx_packets += packets;
620 ndev->stats.tx_bytes += size;
621 netif_wake_queue(ndev);
625 * axienet_check_tx_bd_space - Checks if a BD/group of BDs are currently busy
626 * @lp: Pointer to the axienet_local structure
627 * @num_frag: The number of BDs to check for
629 * returns: 0, on success
630 * NETDEV_TX_BUSY, if any of the descriptors are not free
632 * This function is invoked before BDs are allocated and transmission starts.
633 * This function returns 0 if a BD or group of BDs can be allocated for
634 * transmission. If the BD or any of the BDs are not free the function
635 * returns a busy status. This is invoked from axienet_start_xmit.
637 static inline int axienet_check_tx_bd_space(struct axienet_local *lp,
640 struct axidma_bd *cur_p;
641 cur_p = &lp->tx_bd_v[(lp->tx_bd_tail + num_frag) % TX_BD_NUM];
642 if (cur_p->status & XAXIDMA_BD_STS_ALL_MASK)
643 return NETDEV_TX_BUSY;
648 * axienet_start_xmit - Starts the transmission.
649 * @skb: sk_buff pointer that contains data to be Txed.
650 * @ndev: Pointer to net_device structure.
652 * returns: NETDEV_TX_OK, on success
653 * NETDEV_TX_BUSY, if any of the descriptors are not free
655 * This function is invoked from upper layers to initiate transmission. The
656 * function uses the next available free BDs and populates their fields to
657 * start the transmission. Additionally if checksum offloading is supported,
658 * it populates AXI Stream Control fields with appropriate values.
660 static int axienet_start_xmit(struct sk_buff *skb, struct net_device *ndev)
668 struct axienet_local *lp = netdev_priv(ndev);
669 struct axidma_bd *cur_p;
671 num_frag = skb_shinfo(skb)->nr_frags;
672 cur_p = &lp->tx_bd_v[lp->tx_bd_tail];
674 if (axienet_check_tx_bd_space(lp, num_frag)) {
675 if (!netif_queue_stopped(ndev))
676 netif_stop_queue(ndev);
677 return NETDEV_TX_BUSY;
680 if (skb->ip_summed == CHECKSUM_PARTIAL) {
681 if (lp->features & XAE_FEATURE_FULL_TX_CSUM) {
682 /* Tx Full Checksum Offload Enabled */
684 } else if (lp->features & XAE_FEATURE_PARTIAL_RX_CSUM) {
685 csum_start_off = skb_transport_offset(skb);
686 csum_index_off = csum_start_off + skb->csum_offset;
687 /* Tx Partial Checksum Offload Enabled */
689 cur_p->app1 = (csum_start_off << 16) | csum_index_off;
691 } else if (skb->ip_summed == CHECKSUM_UNNECESSARY) {
692 cur_p->app0 |= 2; /* Tx Full Checksum Offload Enabled */
695 cur_p->cntrl = skb_headlen(skb) | XAXIDMA_BD_CTRL_TXSOF_MASK;
696 cur_p->phys = dma_map_single(ndev->dev.parent, skb->data,
697 skb_headlen(skb), DMA_TO_DEVICE);
699 for (ii = 0; ii < num_frag; ii++) {
700 lp->tx_bd_tail = ++lp->tx_bd_tail % TX_BD_NUM;
701 cur_p = &lp->tx_bd_v[lp->tx_bd_tail];
702 frag = &skb_shinfo(skb)->frags[ii];
703 cur_p->phys = dma_map_single(ndev->dev.parent,
704 skb_frag_address(frag),
707 cur_p->cntrl = skb_frag_size(frag);
710 cur_p->cntrl |= XAXIDMA_BD_CTRL_TXEOF_MASK;
711 cur_p->app4 = (unsigned long)skb;
713 tail_p = lp->tx_bd_p + sizeof(*lp->tx_bd_v) * lp->tx_bd_tail;
714 /* Start the transfer */
715 axienet_dma_out32(lp, XAXIDMA_TX_TDESC_OFFSET, tail_p);
716 lp->tx_bd_tail = ++lp->tx_bd_tail % TX_BD_NUM;
722 * axienet_recv - Is called from Axi DMA Rx Isr to complete the received
724 * @ndev: Pointer to net_device structure.
726 * This function is invoked from the Axi DMA Rx isr to process the Rx BDs. It
727 * does minimal processing and invokes "netif_rx" to complete further
730 static void axienet_recv(struct net_device *ndev)
737 struct axienet_local *lp = netdev_priv(ndev);
738 struct sk_buff *skb, *new_skb;
739 struct axidma_bd *cur_p;
741 tail_p = lp->rx_bd_p + sizeof(*lp->rx_bd_v) * lp->rx_bd_ci;
742 cur_p = &lp->rx_bd_v[lp->rx_bd_ci];
744 while ((cur_p->status & XAXIDMA_BD_STS_COMPLETE_MASK)) {
745 skb = (struct sk_buff *) (cur_p->sw_id_offset);
746 length = cur_p->app4 & 0x0000FFFF;
748 dma_unmap_single(ndev->dev.parent, cur_p->phys,
752 skb_put(skb, length);
753 skb->protocol = eth_type_trans(skb, ndev);
754 /*skb_checksum_none_assert(skb);*/
755 skb->ip_summed = CHECKSUM_NONE;
757 /* if we're doing Rx csum offload, set it up */
758 if (lp->features & XAE_FEATURE_FULL_RX_CSUM) {
759 csumstatus = (cur_p->app2 &
760 XAE_FULL_CSUM_STATUS_MASK) >> 3;
761 if ((csumstatus == XAE_IP_TCP_CSUM_VALIDATED) ||
762 (csumstatus == XAE_IP_UDP_CSUM_VALIDATED)) {
763 skb->ip_summed = CHECKSUM_UNNECESSARY;
765 } else if ((lp->features & XAE_FEATURE_PARTIAL_RX_CSUM) != 0 &&
766 skb->protocol == __constant_htons(ETH_P_IP) &&
768 skb->csum = be32_to_cpu(cur_p->app3 & 0xFFFF);
769 skb->ip_summed = CHECKSUM_COMPLETE;
777 new_skb = netdev_alloc_skb_ip_align(ndev, lp->max_frm_size);
781 cur_p->phys = dma_map_single(ndev->dev.parent, new_skb->data,
784 cur_p->cntrl = lp->max_frm_size;
786 cur_p->sw_id_offset = (u32) new_skb;
788 lp->rx_bd_ci = ++lp->rx_bd_ci % RX_BD_NUM;
789 cur_p = &lp->rx_bd_v[lp->rx_bd_ci];
792 ndev->stats.rx_packets += packets;
793 ndev->stats.rx_bytes += size;
795 axienet_dma_out32(lp, XAXIDMA_RX_TDESC_OFFSET, tail_p);
799 * axienet_tx_irq - Tx Done Isr.
801 * @_ndev: net_device pointer
803 * returns: IRQ_HANDLED for all cases.
805 * This is the Axi DMA Tx done Isr. It invokes "axienet_start_xmit_done"
806 * to complete the BD processing.
808 static irqreturn_t axienet_tx_irq(int irq, void *_ndev)
812 struct net_device *ndev = _ndev;
813 struct axienet_local *lp = netdev_priv(ndev);
815 status = axienet_dma_in32(lp, XAXIDMA_TX_SR_OFFSET);
816 if (status & (XAXIDMA_IRQ_IOC_MASK | XAXIDMA_IRQ_DELAY_MASK)) {
817 axienet_start_xmit_done(lp->ndev);
820 if (!(status & XAXIDMA_IRQ_ALL_MASK))
821 dev_err(&ndev->dev, "No interrupts asserted in Tx path");
822 if (status & XAXIDMA_IRQ_ERROR_MASK) {
823 dev_err(&ndev->dev, "DMA Tx error 0x%x\n", status);
824 dev_err(&ndev->dev, "Current BD is at: 0x%x\n",
825 (lp->tx_bd_v[lp->tx_bd_ci]).phys);
827 cr = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET);
828 /* Disable coalesce, delay timer and error interrupts */
829 cr &= (~XAXIDMA_IRQ_ALL_MASK);
830 /* Write to the Tx channel control register */
831 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr);
833 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET);
834 /* Disable coalesce, delay timer and error interrupts */
835 cr &= (~XAXIDMA_IRQ_ALL_MASK);
836 /* Write to the Rx channel control register */
837 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr);
839 tasklet_schedule(&lp->dma_err_tasklet);
842 axienet_dma_out32(lp, XAXIDMA_TX_SR_OFFSET, status);
847 * axienet_rx_irq - Rx Isr.
849 * @_ndev: net_device pointer
851 * returns: IRQ_HANDLED for all cases.
853 * This is the Axi DMA Rx Isr. It invokes "axienet_recv" to complete the BD
856 static irqreturn_t axienet_rx_irq(int irq, void *_ndev)
860 struct net_device *ndev = _ndev;
861 struct axienet_local *lp = netdev_priv(ndev);
863 status = axienet_dma_in32(lp, XAXIDMA_RX_SR_OFFSET);
864 if (status & (XAXIDMA_IRQ_IOC_MASK | XAXIDMA_IRQ_DELAY_MASK)) {
865 axienet_recv(lp->ndev);
868 if (!(status & XAXIDMA_IRQ_ALL_MASK))
869 dev_err(&ndev->dev, "No interrupts asserted in Rx path");
870 if (status & XAXIDMA_IRQ_ERROR_MASK) {
871 dev_err(&ndev->dev, "DMA Rx error 0x%x\n", status);
872 dev_err(&ndev->dev, "Current BD is at: 0x%x\n",
873 (lp->rx_bd_v[lp->rx_bd_ci]).phys);
875 cr = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET);
876 /* Disable coalesce, delay timer and error interrupts */
877 cr &= (~XAXIDMA_IRQ_ALL_MASK);
878 /* Finally write to the Tx channel control register */
879 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr);
881 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET);
882 /* Disable coalesce, delay timer and error interrupts */
883 cr &= (~XAXIDMA_IRQ_ALL_MASK);
884 /* write to the Rx channel control register */
885 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr);
887 tasklet_schedule(&lp->dma_err_tasklet);
890 axienet_dma_out32(lp, XAXIDMA_RX_SR_OFFSET, status);
894 static void axienet_dma_err_handler(unsigned long data);
897 * axienet_open - Driver open routine.
898 * @ndev: Pointer to net_device structure
900 * returns: 0, on success.
901 * -ENODEV, if PHY cannot be connected to
902 * non-zero error value on failure
904 * This is the driver open routine. It calls phy_start to start the PHY device.
905 * It also allocates interrupt service routines, enables the interrupt lines
906 * and ISR handling. Axi Ethernet core is reset through Axi DMA core. Buffer
907 * descriptors are initialized.
909 static int axienet_open(struct net_device *ndev)
912 struct axienet_local *lp = netdev_priv(ndev);
914 dev_dbg(&ndev->dev, "axienet_open()\n");
916 mdio_mcreg = axienet_ior(lp, XAE_MDIO_MC_OFFSET);
917 ret = axienet_mdio_wait_until_ready(lp);
920 /* Disable the MDIO interface till Axi Ethernet Reset is completed.
921 * When we do an Axi Ethernet reset, it resets the complete core
922 * including the MDIO. If MDIO is not disabled when the reset
923 * process is started, MDIO will be broken afterwards. */
924 axienet_iow(lp, XAE_MDIO_MC_OFFSET,
925 (mdio_mcreg & (~XAE_MDIO_MC_MDIOEN_MASK)));
926 axienet_device_reset(ndev);
927 /* Enable the MDIO */
928 axienet_iow(lp, XAE_MDIO_MC_OFFSET, mdio_mcreg);
929 ret = axienet_mdio_wait_until_ready(lp);
934 lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node,
935 axienet_adjust_link, 0,
936 PHY_INTERFACE_MODE_GMII);
938 dev_err(lp->dev, "of_phy_connect() failed\n");
941 phy_start(lp->phy_dev);
944 /* Enable tasklets for Axi DMA error handling */
945 tasklet_init(&lp->dma_err_tasklet, axienet_dma_err_handler,
948 /* Enable interrupts for Axi DMA Tx */
949 ret = request_irq(lp->tx_irq, axienet_tx_irq, 0, ndev->name, ndev);
952 /* Enable interrupts for Axi DMA Rx */
953 ret = request_irq(lp->rx_irq, axienet_rx_irq, 0, ndev->name, ndev);
960 free_irq(lp->tx_irq, ndev);
963 phy_disconnect(lp->phy_dev);
965 tasklet_kill(&lp->dma_err_tasklet);
966 dev_err(lp->dev, "request_irq() failed\n");
971 * axienet_stop - Driver stop routine.
972 * @ndev: Pointer to net_device structure
974 * returns: 0, on success.
976 * This is the driver stop routine. It calls phy_disconnect to stop the PHY
977 * device. It also removes the interrupt handlers and disables the interrupts.
978 * The Axi DMA Tx/Rx BDs are released.
980 static int axienet_stop(struct net_device *ndev)
983 struct axienet_local *lp = netdev_priv(ndev);
985 dev_dbg(&ndev->dev, "axienet_close()\n");
987 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET);
988 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET,
989 cr & (~XAXIDMA_CR_RUNSTOP_MASK));
990 cr = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET);
991 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET,
992 cr & (~XAXIDMA_CR_RUNSTOP_MASK));
993 axienet_setoptions(ndev, lp->options &
994 ~(XAE_OPTION_TXEN | XAE_OPTION_RXEN));
996 tasklet_kill(&lp->dma_err_tasklet);
998 free_irq(lp->tx_irq, ndev);
999 free_irq(lp->rx_irq, ndev);
1002 phy_disconnect(lp->phy_dev);
1005 axienet_dma_bd_release(ndev);
1010 * axienet_change_mtu - Driver change mtu routine.
1011 * @ndev: Pointer to net_device structure
1012 * @new_mtu: New mtu value to be applied
1014 * returns: Always returns 0 (success).
1016 * This is the change mtu driver routine. It checks if the Axi Ethernet
1017 * hardware supports jumbo frames before changing the mtu. This can be
1018 * called only when the device is not up.
1020 static int axienet_change_mtu(struct net_device *ndev, int new_mtu)
1022 struct axienet_local *lp = netdev_priv(ndev);
1024 if (netif_running(ndev))
1026 if (lp->jumbo_support) {
1027 if ((new_mtu > XAE_JUMBO_MTU) || (new_mtu < 64))
1029 ndev->mtu = new_mtu;
1031 if ((new_mtu > XAE_MTU) || (new_mtu < 64))
1033 ndev->mtu = new_mtu;
1039 #ifdef CONFIG_NET_POLL_CONTROLLER
1041 * axienet_poll_controller - Axi Ethernet poll mechanism.
1042 * @ndev: Pointer to net_device structure
1044 * This implements Rx/Tx ISR poll mechanisms. The interrupts are disabled prior
1045 * to polling the ISRs and are enabled back after the polling is done.
1047 static void axienet_poll_controller(struct net_device *ndev)
1049 struct axienet_local *lp = netdev_priv(ndev);
1050 disable_irq(lp->tx_irq);
1051 disable_irq(lp->rx_irq);
1052 axienet_rx_irq(lp->tx_irq, ndev);
1053 axienet_tx_irq(lp->rx_irq, ndev);
1054 enable_irq(lp->tx_irq);
1055 enable_irq(lp->rx_irq);
1059 static const struct net_device_ops axienet_netdev_ops = {
1060 .ndo_open = axienet_open,
1061 .ndo_stop = axienet_stop,
1062 .ndo_start_xmit = axienet_start_xmit,
1063 .ndo_change_mtu = axienet_change_mtu,
1064 .ndo_set_mac_address = netdev_set_mac_address,
1065 .ndo_validate_addr = eth_validate_addr,
1066 .ndo_set_rx_mode = axienet_set_multicast_list,
1067 #ifdef CONFIG_NET_POLL_CONTROLLER
1068 .ndo_poll_controller = axienet_poll_controller,
1073 * axienet_ethtools_get_settings - Get Axi Ethernet settings related to PHY.
1074 * @ndev: Pointer to net_device structure
1075 * @ecmd: Pointer to ethtool_cmd structure
1077 * This implements ethtool command for getting PHY settings. If PHY could
1078 * not be found, the function returns -ENODEV. This function calls the
1079 * relevant PHY ethtool API to get the PHY settings.
1080 * Issue "ethtool ethX" under linux prompt to execute this function.
1082 static int axienet_ethtools_get_settings(struct net_device *ndev,
1083 struct ethtool_cmd *ecmd)
1085 struct axienet_local *lp = netdev_priv(ndev);
1086 struct phy_device *phydev = lp->phy_dev;
1089 return phy_ethtool_gset(phydev, ecmd);
1093 * axienet_ethtools_set_settings - Set PHY settings as passed in the argument.
1094 * @ndev: Pointer to net_device structure
1095 * @ecmd: Pointer to ethtool_cmd structure
1097 * This implements ethtool command for setting various PHY settings. If PHY
1098 * could not be found, the function returns -ENODEV. This function calls the
1099 * relevant PHY ethtool API to set the PHY.
1100 * Issue e.g. "ethtool -s ethX speed 1000" under linux prompt to execute this
1103 static int axienet_ethtools_set_settings(struct net_device *ndev,
1104 struct ethtool_cmd *ecmd)
1106 struct axienet_local *lp = netdev_priv(ndev);
1107 struct phy_device *phydev = lp->phy_dev;
1110 return phy_ethtool_sset(phydev, ecmd);
1114 * axienet_ethtools_get_drvinfo - Get various Axi Ethernet driver information.
1115 * @ndev: Pointer to net_device structure
1116 * @ed: Pointer to ethtool_drvinfo structure
1118 * This implements ethtool command for getting the driver information.
1119 * Issue "ethtool -i ethX" under linux prompt to execute this function.
1121 static void axienet_ethtools_get_drvinfo(struct net_device *ndev,
1122 struct ethtool_drvinfo *ed)
1124 strlcpy(ed->driver, DRIVER_NAME, sizeof(ed->driver));
1125 strlcpy(ed->version, DRIVER_VERSION, sizeof(ed->version));
1126 ed->regdump_len = sizeof(u32) * AXIENET_REGS_N;
1130 * axienet_ethtools_get_regs_len - Get the total regs length present in the
1132 * @ndev: Pointer to net_device structure
1134 * This implements ethtool command for getting the total register length
1137 static int axienet_ethtools_get_regs_len(struct net_device *ndev)
1139 return sizeof(u32) * AXIENET_REGS_N;
1143 * axienet_ethtools_get_regs - Dump the contents of all registers present
1144 * in AxiEthernet core.
1145 * @ndev: Pointer to net_device structure
1146 * @regs: Pointer to ethtool_regs structure
1147 * @ret: Void pointer used to return the contents of the registers.
1149 * This implements ethtool command for getting the Axi Ethernet register dump.
1150 * Issue "ethtool -d ethX" to execute this function.
1152 static void axienet_ethtools_get_regs(struct net_device *ndev,
1153 struct ethtool_regs *regs, void *ret)
1155 u32 *data = (u32 *) ret;
1156 size_t len = sizeof(u32) * AXIENET_REGS_N;
1157 struct axienet_local *lp = netdev_priv(ndev);
1162 memset(data, 0, len);
1163 data[0] = axienet_ior(lp, XAE_RAF_OFFSET);
1164 data[1] = axienet_ior(lp, XAE_TPF_OFFSET);
1165 data[2] = axienet_ior(lp, XAE_IFGP_OFFSET);
1166 data[3] = axienet_ior(lp, XAE_IS_OFFSET);
1167 data[4] = axienet_ior(lp, XAE_IP_OFFSET);
1168 data[5] = axienet_ior(lp, XAE_IE_OFFSET);
1169 data[6] = axienet_ior(lp, XAE_TTAG_OFFSET);
1170 data[7] = axienet_ior(lp, XAE_RTAG_OFFSET);
1171 data[8] = axienet_ior(lp, XAE_UAWL_OFFSET);
1172 data[9] = axienet_ior(lp, XAE_UAWU_OFFSET);
1173 data[10] = axienet_ior(lp, XAE_TPID0_OFFSET);
1174 data[11] = axienet_ior(lp, XAE_TPID1_OFFSET);
1175 data[12] = axienet_ior(lp, XAE_PPST_OFFSET);
1176 data[13] = axienet_ior(lp, XAE_RCW0_OFFSET);
1177 data[14] = axienet_ior(lp, XAE_RCW1_OFFSET);
1178 data[15] = axienet_ior(lp, XAE_TC_OFFSET);
1179 data[16] = axienet_ior(lp, XAE_FCC_OFFSET);
1180 data[17] = axienet_ior(lp, XAE_EMMC_OFFSET);
1181 data[18] = axienet_ior(lp, XAE_PHYC_OFFSET);
1182 data[19] = axienet_ior(lp, XAE_MDIO_MC_OFFSET);
1183 data[20] = axienet_ior(lp, XAE_MDIO_MCR_OFFSET);
1184 data[21] = axienet_ior(lp, XAE_MDIO_MWD_OFFSET);
1185 data[22] = axienet_ior(lp, XAE_MDIO_MRD_OFFSET);
1186 data[23] = axienet_ior(lp, XAE_MDIO_MIS_OFFSET);
1187 data[24] = axienet_ior(lp, XAE_MDIO_MIP_OFFSET);
1188 data[25] = axienet_ior(lp, XAE_MDIO_MIE_OFFSET);
1189 data[26] = axienet_ior(lp, XAE_MDIO_MIC_OFFSET);
1190 data[27] = axienet_ior(lp, XAE_UAW0_OFFSET);
1191 data[28] = axienet_ior(lp, XAE_UAW1_OFFSET);
1192 data[29] = axienet_ior(lp, XAE_FMI_OFFSET);
1193 data[30] = axienet_ior(lp, XAE_AF0_OFFSET);
1194 data[31] = axienet_ior(lp, XAE_AF1_OFFSET);
1198 * axienet_ethtools_get_pauseparam - Get the pause parameter setting for
1200 * @ndev: Pointer to net_device structure
1201 * @epauseparm: Pointer to ethtool_pauseparam structure.
1203 * This implements ethtool command for getting axi ethernet pause frame
1204 * setting. Issue "ethtool -a ethX" to execute this function.
1207 axienet_ethtools_get_pauseparam(struct net_device *ndev,
1208 struct ethtool_pauseparam *epauseparm)
1211 struct axienet_local *lp = netdev_priv(ndev);
1212 epauseparm->autoneg = 0;
1213 regval = axienet_ior(lp, XAE_FCC_OFFSET);
1214 epauseparm->tx_pause = regval & XAE_FCC_FCTX_MASK;
1215 epauseparm->rx_pause = regval & XAE_FCC_FCRX_MASK;
1219 * axienet_ethtools_set_pauseparam - Set device pause parameter(flow control)
1221 * @ndev: Pointer to net_device structure
1222 * @epauseparam:Pointer to ethtool_pauseparam structure
1224 * This implements ethtool command for enabling flow control on Rx and Tx
1225 * paths. Issue "ethtool -A ethX tx on|off" under linux prompt to execute this
1229 axienet_ethtools_set_pauseparam(struct net_device *ndev,
1230 struct ethtool_pauseparam *epauseparm)
1233 struct axienet_local *lp = netdev_priv(ndev);
1235 if (netif_running(ndev)) {
1236 printk(KERN_ERR "%s: Please stop netif before applying "
1237 "configruation\n", ndev->name);
1241 regval = axienet_ior(lp, XAE_FCC_OFFSET);
1242 if (epauseparm->tx_pause)
1243 regval |= XAE_FCC_FCTX_MASK;
1245 regval &= ~XAE_FCC_FCTX_MASK;
1246 if (epauseparm->rx_pause)
1247 regval |= XAE_FCC_FCRX_MASK;
1249 regval &= ~XAE_FCC_FCRX_MASK;
1250 axienet_iow(lp, XAE_FCC_OFFSET, regval);
1256 * axienet_ethtools_get_coalesce - Get DMA interrupt coalescing count.
1257 * @ndev: Pointer to net_device structure
1258 * @ecoalesce: Pointer to ethtool_coalesce structure
1260 * This implements ethtool command for getting the DMA interrupt coalescing
1261 * count on Tx and Rx paths. Issue "ethtool -c ethX" under linux prompt to
1262 * execute this function.
1264 static int axienet_ethtools_get_coalesce(struct net_device *ndev,
1265 struct ethtool_coalesce *ecoalesce)
1268 struct axienet_local *lp = netdev_priv(ndev);
1269 regval = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET);
1270 ecoalesce->rx_max_coalesced_frames = (regval & XAXIDMA_COALESCE_MASK)
1271 >> XAXIDMA_COALESCE_SHIFT;
1272 regval = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET);
1273 ecoalesce->tx_max_coalesced_frames = (regval & XAXIDMA_COALESCE_MASK)
1274 >> XAXIDMA_COALESCE_SHIFT;
1279 * axienet_ethtools_set_coalesce - Set DMA interrupt coalescing count.
1280 * @ndev: Pointer to net_device structure
1281 * @ecoalesce: Pointer to ethtool_coalesce structure
1283 * This implements ethtool command for setting the DMA interrupt coalescing
1284 * count on Tx and Rx paths. Issue "ethtool -C ethX rx-frames 5" under linux
1285 * prompt to execute this function.
1287 static int axienet_ethtools_set_coalesce(struct net_device *ndev,
1288 struct ethtool_coalesce *ecoalesce)
1290 struct axienet_local *lp = netdev_priv(ndev);
1292 if (netif_running(ndev)) {
1293 printk(KERN_ERR "%s: Please stop netif before applying "
1294 "configruation\n", ndev->name);
1298 if ((ecoalesce->rx_coalesce_usecs) ||
1299 (ecoalesce->rx_coalesce_usecs_irq) ||
1300 (ecoalesce->rx_max_coalesced_frames_irq) ||
1301 (ecoalesce->tx_coalesce_usecs) ||
1302 (ecoalesce->tx_coalesce_usecs_irq) ||
1303 (ecoalesce->tx_max_coalesced_frames_irq) ||
1304 (ecoalesce->stats_block_coalesce_usecs) ||
1305 (ecoalesce->use_adaptive_rx_coalesce) ||
1306 (ecoalesce->use_adaptive_tx_coalesce) ||
1307 (ecoalesce->pkt_rate_low) ||
1308 (ecoalesce->rx_coalesce_usecs_low) ||
1309 (ecoalesce->rx_max_coalesced_frames_low) ||
1310 (ecoalesce->tx_coalesce_usecs_low) ||
1311 (ecoalesce->tx_max_coalesced_frames_low) ||
1312 (ecoalesce->pkt_rate_high) ||
1313 (ecoalesce->rx_coalesce_usecs_high) ||
1314 (ecoalesce->rx_max_coalesced_frames_high) ||
1315 (ecoalesce->tx_coalesce_usecs_high) ||
1316 (ecoalesce->tx_max_coalesced_frames_high) ||
1317 (ecoalesce->rate_sample_interval))
1319 if (ecoalesce->rx_max_coalesced_frames)
1320 lp->coalesce_count_rx = ecoalesce->rx_max_coalesced_frames;
1321 if (ecoalesce->tx_max_coalesced_frames)
1322 lp->coalesce_count_tx = ecoalesce->tx_max_coalesced_frames;
1327 static struct ethtool_ops axienet_ethtool_ops = {
1328 .get_settings = axienet_ethtools_get_settings,
1329 .set_settings = axienet_ethtools_set_settings,
1330 .get_drvinfo = axienet_ethtools_get_drvinfo,
1331 .get_regs_len = axienet_ethtools_get_regs_len,
1332 .get_regs = axienet_ethtools_get_regs,
1333 .get_link = ethtool_op_get_link,
1334 .get_pauseparam = axienet_ethtools_get_pauseparam,
1335 .set_pauseparam = axienet_ethtools_set_pauseparam,
1336 .get_coalesce = axienet_ethtools_get_coalesce,
1337 .set_coalesce = axienet_ethtools_set_coalesce,
1341 * axienet_dma_err_handler - Tasklet handler for Axi DMA Error
1342 * @data: Data passed
1344 * Resets the Axi DMA and Axi Ethernet devices, and reconfigures the
1347 static void axienet_dma_err_handler(unsigned long data)
1352 struct axienet_local *lp = (struct axienet_local *) data;
1353 struct net_device *ndev = lp->ndev;
1354 struct axidma_bd *cur_p;
1356 axienet_setoptions(ndev, lp->options &
1357 ~(XAE_OPTION_TXEN | XAE_OPTION_RXEN));
1358 mdio_mcreg = axienet_ior(lp, XAE_MDIO_MC_OFFSET);
1359 axienet_mdio_wait_until_ready(lp);
1360 /* Disable the MDIO interface till Axi Ethernet Reset is completed.
1361 * When we do an Axi Ethernet reset, it resets the complete core
1362 * including the MDIO. So if MDIO is not disabled when the reset
1363 * process is started, MDIO will be broken afterwards. */
1364 axienet_iow(lp, XAE_MDIO_MC_OFFSET, (mdio_mcreg &
1365 ~XAE_MDIO_MC_MDIOEN_MASK));
1367 __axienet_device_reset(lp, &ndev->dev, XAXIDMA_TX_CR_OFFSET);
1368 __axienet_device_reset(lp, &ndev->dev, XAXIDMA_RX_CR_OFFSET);
1370 axienet_iow(lp, XAE_MDIO_MC_OFFSET, mdio_mcreg);
1371 axienet_mdio_wait_until_ready(lp);
1373 for (i = 0; i < TX_BD_NUM; i++) {
1374 cur_p = &lp->tx_bd_v[i];
1376 dma_unmap_single(ndev->dev.parent, cur_p->phys,
1378 XAXIDMA_BD_CTRL_LENGTH_MASK),
1381 dev_kfree_skb_irq((struct sk_buff *) cur_p->app4);
1390 cur_p->sw_id_offset = 0;
1393 for (i = 0; i < RX_BD_NUM; i++) {
1394 cur_p = &lp->rx_bd_v[i];
1407 /* Start updating the Rx channel control register */
1408 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET);
1409 /* Update the interrupt coalesce count */
1410 cr = ((cr & ~XAXIDMA_COALESCE_MASK) |
1411 (XAXIDMA_DFT_RX_THRESHOLD << XAXIDMA_COALESCE_SHIFT));
1412 /* Update the delay timer count */
1413 cr = ((cr & ~XAXIDMA_DELAY_MASK) |
1414 (XAXIDMA_DFT_RX_WAITBOUND << XAXIDMA_DELAY_SHIFT));
1415 /* Enable coalesce, delay timer and error interrupts */
1416 cr |= XAXIDMA_IRQ_ALL_MASK;
1417 /* Finally write to the Rx channel control register */
1418 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr);
1420 /* Start updating the Tx channel control register */
1421 cr = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET);
1422 /* Update the interrupt coalesce count */
1423 cr = (((cr & ~XAXIDMA_COALESCE_MASK)) |
1424 (XAXIDMA_DFT_TX_THRESHOLD << XAXIDMA_COALESCE_SHIFT));
1425 /* Update the delay timer count */
1426 cr = (((cr & ~XAXIDMA_DELAY_MASK)) |
1427 (XAXIDMA_DFT_TX_WAITBOUND << XAXIDMA_DELAY_SHIFT));
1428 /* Enable coalesce, delay timer and error interrupts */
1429 cr |= XAXIDMA_IRQ_ALL_MASK;
1430 /* Finally write to the Tx channel control register */
1431 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr);
1433 /* Populate the tail pointer and bring the Rx Axi DMA engine out of
1434 * halted state. This will make the Rx side ready for reception.*/
1435 axienet_dma_out32(lp, XAXIDMA_RX_CDESC_OFFSET, lp->rx_bd_p);
1436 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET);
1437 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET,
1438 cr | XAXIDMA_CR_RUNSTOP_MASK);
1439 axienet_dma_out32(lp, XAXIDMA_RX_TDESC_OFFSET, lp->rx_bd_p +
1440 (sizeof(*lp->rx_bd_v) * (RX_BD_NUM - 1)));
1442 /* Write to the RS (Run-stop) bit in the Tx channel control register.
1443 * Tx channel is now ready to run. But only after we write to the
1444 * tail pointer register that the Tx channel will start transmitting */
1445 axienet_dma_out32(lp, XAXIDMA_TX_CDESC_OFFSET, lp->tx_bd_p);
1446 cr = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET);
1447 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET,
1448 cr | XAXIDMA_CR_RUNSTOP_MASK);
1450 axienet_status = axienet_ior(lp, XAE_RCW1_OFFSET);
1451 axienet_status &= ~XAE_RCW1_RX_MASK;
1452 axienet_iow(lp, XAE_RCW1_OFFSET, axienet_status);
1454 axienet_status = axienet_ior(lp, XAE_IP_OFFSET);
1455 if (axienet_status & XAE_INT_RXRJECT_MASK)
1456 axienet_iow(lp, XAE_IS_OFFSET, XAE_INT_RXRJECT_MASK);
1457 axienet_iow(lp, XAE_FCC_OFFSET, XAE_FCC_FCRX_MASK);
1459 /* Sync default options with HW but leave receiver and
1460 * transmitter disabled.*/
1461 axienet_setoptions(ndev, lp->options &
1462 ~(XAE_OPTION_TXEN | XAE_OPTION_RXEN));
1463 axienet_set_mac_address(ndev, NULL);
1464 axienet_set_multicast_list(ndev);
1465 axienet_setoptions(ndev, lp->options);
1469 * axienet_of_probe - Axi Ethernet probe function.
1470 * @op: Pointer to platform device structure.
1471 * @match: Pointer to device id structure
1473 * returns: 0, on success
1474 * Non-zero error value on failure.
1476 * This is the probe routine for Axi Ethernet driver. This is called before
1477 * any other driver routines are invoked. It allocates and sets up the Ethernet
1478 * device. Parses through device tree and populates fields of
1479 * axienet_local. It registers the Ethernet device.
1481 static int axienet_of_probe(struct platform_device *op)
1485 struct device_node *np;
1486 struct axienet_local *lp;
1487 struct net_device *ndev;
1490 ndev = alloc_etherdev(sizeof(*lp));
1495 dev_set_drvdata(&op->dev, ndev);
1497 SET_NETDEV_DEV(ndev, &op->dev);
1498 ndev->flags &= ~IFF_MULTICAST; /* clear multicast */
1499 ndev->features = NETIF_F_SG | NETIF_F_FRAGLIST;
1500 ndev->netdev_ops = &axienet_netdev_ops;
1501 ndev->ethtool_ops = &axienet_ethtool_ops;
1503 lp = netdev_priv(ndev);
1506 lp->options = XAE_OPTION_DEFAULTS;
1507 /* Map device registers */
1508 lp->regs = of_iomap(op->dev.of_node, 0);
1510 dev_err(&op->dev, "could not map Axi Ethernet regs.\n");
1513 /* Setup checksum offload, but default to off if not specified */
1516 p = (__be32 *) of_get_property(op->dev.of_node, "xlnx,txcsum", NULL);
1518 switch (be32_to_cpup(p)) {
1520 lp->csum_offload_on_tx_path =
1521 XAE_FEATURE_PARTIAL_TX_CSUM;
1522 lp->features |= XAE_FEATURE_PARTIAL_TX_CSUM;
1523 /* Can checksum TCP/UDP over IPv4. */
1524 ndev->features |= NETIF_F_IP_CSUM;
1527 lp->csum_offload_on_tx_path =
1528 XAE_FEATURE_FULL_TX_CSUM;
1529 lp->features |= XAE_FEATURE_FULL_TX_CSUM;
1530 /* Can checksum TCP/UDP over IPv4. */
1531 ndev->features |= NETIF_F_IP_CSUM;
1534 lp->csum_offload_on_tx_path = XAE_NO_CSUM_OFFLOAD;
1537 p = (__be32 *) of_get_property(op->dev.of_node, "xlnx,rxcsum", NULL);
1539 switch (be32_to_cpup(p)) {
1541 lp->csum_offload_on_rx_path =
1542 XAE_FEATURE_PARTIAL_RX_CSUM;
1543 lp->features |= XAE_FEATURE_PARTIAL_RX_CSUM;
1546 lp->csum_offload_on_rx_path =
1547 XAE_FEATURE_FULL_RX_CSUM;
1548 lp->features |= XAE_FEATURE_FULL_RX_CSUM;
1551 lp->csum_offload_on_rx_path = XAE_NO_CSUM_OFFLOAD;
1554 /* For supporting jumbo frames, the Axi Ethernet hardware must have
1555 * a larger Rx/Tx Memory. Typically, the size must be more than or
1556 * equal to 16384 bytes, so that we can enable jumbo option and start
1557 * supporting jumbo frames. Here we check for memory allocated for
1558 * Rx/Tx in the hardware from the device-tree and accordingly set
1560 p = (__be32 *) of_get_property(op->dev.of_node, "xlnx,rxmem", NULL);
1562 if ((be32_to_cpup(p)) >= 0x4000)
1563 lp->jumbo_support = 1;
1565 p = (__be32 *) of_get_property(op->dev.of_node, "xlnx,temac-type",
1568 lp->temac_type = be32_to_cpup(p);
1569 p = (__be32 *) of_get_property(op->dev.of_node, "xlnx,phy-type", NULL);
1571 lp->phy_type = be32_to_cpup(p);
1573 /* Find the DMA node, map the DMA registers, and decode the DMA IRQs */
1574 np = of_parse_phandle(op->dev.of_node, "axistream-connected", 0);
1576 dev_err(&op->dev, "could not find DMA node\n");
1579 lp->dma_regs = of_iomap(np, 0);
1581 dev_dbg(&op->dev, "MEM base: %p\n", lp->dma_regs);
1583 dev_err(&op->dev, "unable to map DMA registers\n");
1586 lp->rx_irq = irq_of_parse_and_map(np, 1);
1587 lp->tx_irq = irq_of_parse_and_map(np, 0);
1589 if ((lp->rx_irq <= 0) || (lp->tx_irq <= 0)) {
1590 dev_err(&op->dev, "could not determine irqs\n");
1595 /* Retrieve the MAC address */
1596 addr = of_get_property(op->dev.of_node, "local-mac-address", &size);
1597 if ((!addr) || (size != 6)) {
1598 dev_err(&op->dev, "could not find MAC address\n");
1602 axienet_set_mac_address(ndev, (void *) addr);
1604 lp->coalesce_count_rx = XAXIDMA_DFT_RX_THRESHOLD;
1605 lp->coalesce_count_tx = XAXIDMA_DFT_TX_THRESHOLD;
1607 lp->phy_node = of_parse_phandle(op->dev.of_node, "phy-handle", 0);
1608 ret = axienet_mdio_setup(lp, op->dev.of_node);
1610 dev_warn(&op->dev, "error registering MDIO bus\n");
1612 ret = register_netdev(lp->ndev);
1614 dev_err(lp->dev, "register_netdev() error (%i)\n", ret);
1622 iounmap(lp->dma_regs);
1631 static int axienet_of_remove(struct platform_device *op)
1633 struct net_device *ndev = dev_get_drvdata(&op->dev);
1634 struct axienet_local *lp = netdev_priv(ndev);
1636 axienet_mdio_teardown(lp);
1637 unregister_netdev(ndev);
1640 of_node_put(lp->phy_node);
1641 lp->phy_node = NULL;
1643 dev_set_drvdata(&op->dev, NULL);
1647 iounmap(lp->dma_regs);
1653 static struct platform_driver axienet_of_driver = {
1654 .probe = axienet_of_probe,
1655 .remove = axienet_of_remove,
1657 .owner = THIS_MODULE,
1658 .name = "xilinx_axienet",
1659 .of_match_table = axienet_of_match,
1663 module_platform_driver(axienet_of_driver);
1665 MODULE_DESCRIPTION("Xilinx Axi Ethernet driver");
1666 MODULE_AUTHOR("Xilinx");
1667 MODULE_LICENSE("GPL");