drivers/net/ieee802154/at86rf230.c

   1 /*
   2  * AT86RF230/RF231 driver
   3  *
   4  * Copyright (C) 2009-2012 Siemens AG
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2
   8  * as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * Written by:
  16  * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
  17  * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
  18  * Alexander Aring <aar@pengutronix.de>
  19  */
  20 #include <linux/kernel.h>
  21 #include <linux/module.h>
  22 #include <linux/hrtimer.h>
  23 #include <linux/jiffies.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/irq.h>
  26 #include <linux/gpio.h>
  27 #include <linux/delay.h>
  28 #include <linux/spi/spi.h>
  29 #include <linux/spi/at86rf230.h>
  30 #include <linux/regmap.h>
  31 #include <linux/skbuff.h>
  32 #include <linux/of_gpio.h>
  33 #include <linux/ieee802154.h>
  34
  35 #include <net/mac802154.h>
  36 #include <net/cfg802154.h>
  37
  38 struct at86rf230_local;
  39 /* at86rf2xx chip depend data.
  40  * All timings are in us.
  41  */
  42 struct at86rf2xx_chip_data {
  43         u16 t_sleep_cycle;
  44         u16 t_channel_switch;
  45         u16 t_reset_to_off;
  46         u16 t_off_to_aack;
  47         u16 t_off_to_tx_on;
  48         u16 t_frame;
  49         u16 t_p_ack;
  50         int rssi_base_val;
  51
  52         int (*set_channel)(struct at86rf230_local *, u8, u8);
  53         int (*get_desense_steps)(struct at86rf230_local *, s32);
  54 };
  55
  56 #define AT86RF2XX_MAX_BUF               (127 + 3)
  57 /* tx retries to access the TX_ON state
  58  * if it's above then force change will be started.
  59  *
  60  * We assume the max_frame_retries (7) value of 802.15.4 here.
  61  */
  62 #define AT86RF2XX_MAX_TX_RETRIES        7
  63 /* We use the recommended 5 minutes timeout to recalibrate */
  64 #define AT86RF2XX_CAL_LOOP_TIMEOUT      (5 * 60 * HZ)
  65
  66 struct at86rf230_state_change {
  67         struct at86rf230_local *lp;
  68         int irq;
  69
  70         struct hrtimer timer;
  71         struct spi_message msg;
  72         struct spi_transfer trx;
  73         u8 buf[AT86RF2XX_MAX_BUF];
  74
  75         void (*complete)(void *context);
  76         u8 from_state;
  77         u8 to_state;
  78
  79         bool irq_enable;
  80 };
  81
  82 struct at86rf230_local {
  83         struct spi_device *spi;
  84
  85         struct ieee802154_hw *hw;
  86         struct at86rf2xx_chip_data *data;
  87         struct regmap *regmap;
  88
  89         struct completion state_complete;
  90         struct at86rf230_state_change state;
  91
  92         struct at86rf230_state_change irq;
  93
  94         bool tx_aret;
  95         unsigned long cal_timeout;
  96         s8 max_frame_retries;
  97         bool is_tx;
  98         bool is_tx_from_off;
  99         u8 tx_retry;
 100         struct sk_buff *tx_skb;
 101         struct at86rf230_state_change tx;
 102 };
 103
 104 #define RG_TRX_STATUS   (0x01)
 105 #define SR_TRX_STATUS           0x01, 0x1f, 0
 106 #define SR_RESERVED_01_3        0x01, 0x20, 5
 107 #define SR_CCA_STATUS           0x01, 0x40, 6
 108 #define SR_CCA_DONE             0x01, 0x80, 7
 109 #define RG_TRX_STATE    (0x02)
 110 #define SR_TRX_CMD              0x02, 0x1f, 0
 111 #define SR_TRAC_STATUS          0x02, 0xe0, 5
 112 #define RG_TRX_CTRL_0   (0x03)
 113 #define SR_CLKM_CTRL            0x03, 0x07, 0
 114 #define SR_CLKM_SHA_SEL         0x03, 0x08, 3
 115 #define SR_PAD_IO_CLKM          0x03, 0x30, 4
 116 #define SR_PAD_IO               0x03, 0xc0, 6
 117 #define RG_TRX_CTRL_1   (0x04)
 118 #define SR_IRQ_POLARITY         0x04, 0x01, 0
 119 #define SR_IRQ_MASK_MODE        0x04, 0x02, 1
 120 #define SR_SPI_CMD_MODE         0x04, 0x0c, 2
 121 #define SR_RX_BL_CTRL           0x04, 0x10, 4
 122 #define SR_TX_AUTO_CRC_ON       0x04, 0x20, 5
 123 #define SR_IRQ_2_EXT_EN         0x04, 0x40, 6
 124 #define SR_PA_EXT_EN            0x04, 0x80, 7
 125 #define RG_PHY_TX_PWR   (0x05)
 126 #define SR_TX_PWR               0x05, 0x0f, 0
 127 #define SR_PA_LT                0x05, 0x30, 4
 128 #define SR_PA_BUF_LT            0x05, 0xc0, 6
 129 #define RG_PHY_RSSI     (0x06)
 130 #define SR_RSSI                 0x06, 0x1f, 0
 131 #define SR_RND_VALUE            0x06, 0x60, 5
 132 #define SR_RX_CRC_VALID         0x06, 0x80, 7
 133 #define RG_PHY_ED_LEVEL (0x07)
 134 #define SR_ED_LEVEL             0x07, 0xff, 0
 135 #define RG_PHY_CC_CCA   (0x08)
 136 #define SR_CHANNEL              0x08, 0x1f, 0
 137 #define SR_CCA_MODE             0x08, 0x60, 5
 138 #define SR_CCA_REQUEST          0x08, 0x80, 7
 139 #define RG_CCA_THRES    (0x09)
 140 #define SR_CCA_ED_THRES         0x09, 0x0f, 0
 141 #define SR_RESERVED_09_1        0x09, 0xf0, 4
 142 #define RG_RX_CTRL      (0x0a)
 143 #define SR_PDT_THRES            0x0a, 0x0f, 0
 144 #define SR_RESERVED_0a_1        0x0a, 0xf0, 4
 145 #define RG_SFD_VALUE    (0x0b)
 146 #define SR_SFD_VALUE            0x0b, 0xff, 0
 147 #define RG_TRX_CTRL_2   (0x0c)
 148 #define SR_OQPSK_DATA_RATE      0x0c, 0x03, 0
 149 #define SR_SUB_MODE             0x0c, 0x04, 2
 150 #define SR_BPSK_QPSK            0x0c, 0x08, 3
 151 #define SR_OQPSK_SUB1_RC_EN     0x0c, 0x10, 4
 152 #define SR_RESERVED_0c_5        0x0c, 0x60, 5
 153 #define SR_RX_SAFE_MODE         0x0c, 0x80, 7
 154 #define RG_ANT_DIV      (0x0d)
 155 #define SR_ANT_CTRL             0x0d, 0x03, 0
 156 #define SR_ANT_EXT_SW_EN        0x0d, 0x04, 2
 157 #define SR_ANT_DIV_EN           0x0d, 0x08, 3
 158 #define SR_RESERVED_0d_2        0x0d, 0x70, 4
 159 #define SR_ANT_SEL              0x0d, 0x80, 7
 160 #define RG_IRQ_MASK     (0x0e)
 161 #define SR_IRQ_MASK             0x0e, 0xff, 0
 162 #define RG_IRQ_STATUS   (0x0f)
 163 #define SR_IRQ_0_PLL_LOCK       0x0f, 0x01, 0
 164 #define SR_IRQ_1_PLL_UNLOCK     0x0f, 0x02, 1
 165 #define SR_IRQ_2_RX_START       0x0f, 0x04, 2
 166 #define SR_IRQ_3_TRX_END        0x0f, 0x08, 3
 167 #define SR_IRQ_4_CCA_ED_DONE    0x0f, 0x10, 4
 168 #define SR_IRQ_5_AMI            0x0f, 0x20, 5
 169 #define SR_IRQ_6_TRX_UR         0x0f, 0x40, 6
 170 #define SR_IRQ_7_BAT_LOW        0x0f, 0x80, 7
 171 #define RG_VREG_CTRL    (0x10)
 172 #define SR_RESERVED_10_6        0x10, 0x03, 0
 173 #define SR_DVDD_OK              0x10, 0x04, 2
 174 #define SR_DVREG_EXT            0x10, 0x08, 3
 175 #define SR_RESERVED_10_3        0x10, 0x30, 4
 176 #define SR_AVDD_OK              0x10, 0x40, 6
 177 #define SR_AVREG_EXT            0x10, 0x80, 7
 178 #define RG_BATMON       (0x11)
 179 #define SR_BATMON_VTH           0x11, 0x0f, 0
 180 #define SR_BATMON_HR            0x11, 0x10, 4
 181 #define SR_BATMON_OK            0x11, 0x20, 5
 182 #define SR_RESERVED_11_1        0x11, 0xc0, 6
 183 #define RG_XOSC_CTRL    (0x12)
 184 #define SR_XTAL_TRIM            0x12, 0x0f, 0
 185 #define SR_XTAL_MODE            0x12, 0xf0, 4
 186 #define RG_RX_SYN       (0x15)
 187 #define SR_RX_PDT_LEVEL         0x15, 0x0f, 0
 188 #define SR_RESERVED_15_2        0x15, 0x70, 4
 189 #define SR_RX_PDT_DIS           0x15, 0x80, 7
 190 #define RG_XAH_CTRL_1   (0x17)
 191 #define SR_RESERVED_17_8        0x17, 0x01, 0
 192 #define SR_AACK_PROM_MODE       0x17, 0x02, 1
 193 #define SR_AACK_ACK_TIME        0x17, 0x04, 2
 194 #define SR_RESERVED_17_5        0x17, 0x08, 3
 195 #define SR_AACK_UPLD_RES_FT     0x17, 0x10, 4
 196 #define SR_AACK_FLTR_RES_FT     0x17, 0x20, 5
 197 #define SR_CSMA_LBT_MODE        0x17, 0x40, 6
 198 #define SR_RESERVED_17_1        0x17, 0x80, 7
 199 #define RG_FTN_CTRL     (0x18)
 200 #define SR_RESERVED_18_2        0x18, 0x7f, 0
 201 #define SR_FTN_START            0x18, 0x80, 7
 202 #define RG_PLL_CF       (0x1a)
 203 #define SR_RESERVED_1a_2        0x1a, 0x7f, 0
 204 #define SR_PLL_CF_START         0x1a, 0x80, 7
 205 #define RG_PLL_DCU      (0x1b)
 206 #define SR_RESERVED_1b_3        0x1b, 0x3f, 0
 207 #define SR_RESERVED_1b_2        0x1b, 0x40, 6
 208 #define SR_PLL_DCU_START        0x1b, 0x80, 7
 209 #define RG_PART_NUM     (0x1c)
 210 #define SR_PART_NUM             0x1c, 0xff, 0
 211 #define RG_VERSION_NUM  (0x1d)
 212 #define SR_VERSION_NUM          0x1d, 0xff, 0
 213 #define RG_MAN_ID_0     (0x1e)
 214 #define SR_MAN_ID_0             0x1e, 0xff, 0
 215 #define RG_MAN_ID_1     (0x1f)
 216 #define SR_MAN_ID_1             0x1f, 0xff, 0
 217 #define RG_SHORT_ADDR_0 (0x20)
 218 #define SR_SHORT_ADDR_0         0x20, 0xff, 0
 219 #define RG_SHORT_ADDR_1 (0x21)
 220 #define SR_SHORT_ADDR_1         0x21, 0xff, 0
 221 #define RG_PAN_ID_0     (0x22)
 222 #define SR_PAN_ID_0             0x22, 0xff, 0
 223 #define RG_PAN_ID_1     (0x23)
 224 #define SR_PAN_ID_1             0x23, 0xff, 0
 225 #define RG_IEEE_ADDR_0  (0x24)
 226 #define SR_IEEE_ADDR_0          0x24, 0xff, 0
 227 #define RG_IEEE_ADDR_1  (0x25)
 228 #define SR_IEEE_ADDR_1          0x25, 0xff, 0
 229 #define RG_IEEE_ADDR_2  (0x26)
 230 #define SR_IEEE_ADDR_2          0x26, 0xff, 0
 231 #define RG_IEEE_ADDR_3  (0x27)
 232 #define SR_IEEE_ADDR_3          0x27, 0xff, 0
 233 #define RG_IEEE_ADDR_4  (0x28)
 234 #define SR_IEEE_ADDR_4          0x28, 0xff, 0
 235 #define RG_IEEE_ADDR_5  (0x29)
 236 #define SR_IEEE_ADDR_5          0x29, 0xff, 0
 237 #define RG_IEEE_ADDR_6  (0x2a)
 238 #define SR_IEEE_ADDR_6          0x2a, 0xff, 0
 239 #define RG_IEEE_ADDR_7  (0x2b)
 240 #define SR_IEEE_ADDR_7          0x2b, 0xff, 0
 241 #define RG_XAH_CTRL_0   (0x2c)
 242 #define SR_SLOTTED_OPERATION    0x2c, 0x01, 0
 243 #define SR_MAX_CSMA_RETRIES     0x2c, 0x0e, 1
 244 #define SR_MAX_FRAME_RETRIES    0x2c, 0xf0, 4
 245 #define RG_CSMA_SEED_0  (0x2d)
 246 #define SR_CSMA_SEED_0          0x2d, 0xff, 0
 247 #define RG_CSMA_SEED_1  (0x2e)
 248 #define SR_CSMA_SEED_1          0x2e, 0x07, 0
 249 #define SR_AACK_I_AM_COORD      0x2e, 0x08, 3
 250 #define SR_AACK_DIS_ACK         0x2e, 0x10, 4
 251 #define SR_AACK_SET_PD          0x2e, 0x20, 5
 252 #define SR_AACK_FVN_MODE        0x2e, 0xc0, 6
 253 #define RG_CSMA_BE      (0x2f)
 254 #define SR_MIN_BE               0x2f, 0x0f, 0
 255 #define SR_MAX_BE               0x2f, 0xf0, 4
 256
 257 #define CMD_REG         0x80
 258 #define CMD_REG_MASK    0x3f
 259 #define CMD_WRITE       0x40
 260 #define CMD_FB          0x20
 261
 262 #define IRQ_BAT_LOW     (1 << 7)
 263 #define IRQ_TRX_UR      (1 << 6)
 264 #define IRQ_AMI         (1 << 5)
 265 #define IRQ_CCA_ED      (1 << 4)
 266 #define IRQ_TRX_END     (1 << 3)
 267 #define IRQ_RX_START    (1 << 2)
 268 #define IRQ_PLL_UNL     (1 << 1)
 269 #define IRQ_PLL_LOCK    (1 << 0)
 270
 271 #define IRQ_ACTIVE_HIGH 0
 272 #define IRQ_ACTIVE_LOW  1
 273
 274 #define STATE_P_ON              0x00    /* BUSY */
 275 #define STATE_BUSY_RX           0x01
 276 #define STATE_BUSY_TX           0x02
 277 #define STATE_FORCE_TRX_OFF     0x03
 278 #define STATE_FORCE_TX_ON       0x04    /* IDLE */
 279 /* 0x05 */                              /* INVALID_PARAMETER */
 280 #define STATE_RX_ON             0x06
 281 /* 0x07 */                              /* SUCCESS */
 282 #define STATE_TRX_OFF           0x08
 283 #define STATE_TX_ON             0x09
 284 /* 0x0a - 0x0e */                       /* 0x0a - UNSUPPORTED_ATTRIBUTE */
 285 #define STATE_SLEEP             0x0F
 286 #define STATE_PREP_DEEP_SLEEP   0x10
 287 #define STATE_BUSY_RX_AACK      0x11
 288 #define STATE_BUSY_TX_ARET      0x12
 289 #define STATE_RX_AACK_ON        0x16
 290 #define STATE_TX_ARET_ON        0x19
 291 #define STATE_RX_ON_NOCLK       0x1C
 292 #define STATE_RX_AACK_ON_NOCLK  0x1D
 293 #define STATE_BUSY_RX_AACK_NOCLK 0x1E
 294 #define STATE_TRANSITION_IN_PROGRESS 0x1F
 295
 296 #define TRX_STATE_MASK          (0x1F)
 297
 298 #define AT86RF2XX_NUMREGS 0x3F
 299
 300 static void
 301 at86rf230_async_state_change(struct at86rf230_local *lp,
 302                              struct at86rf230_state_change *ctx,
 303                              const u8 state, void (*complete)(void *context),
 304                              const bool irq_enable);
 305
 306 static inline int
 307 __at86rf230_write(struct at86rf230_local *lp,
 308                   unsigned int addr, unsigned int data)
 309 {
 310         return regmap_write(lp->regmap, addr, data);
 311 }
 312
 313 static inline int
 314 __at86rf230_read(struct at86rf230_local *lp,
 315                  unsigned int addr, unsigned int *data)
 316 {
 317         return regmap_read(lp->regmap, addr, data);
 318 }
 319
 320 static inline int
 321 at86rf230_read_subreg(struct at86rf230_local *lp,
 322                       unsigned int addr, unsigned int mask,
 323                       unsigned int shift, unsigned int *data)
 324 {
 325         int rc;
 326
 327         rc = __at86rf230_read(lp, addr, data);
 328         if (!rc)
 329                 *data = (*data & mask) >> shift;
 330
 331         return rc;
 332 }
 333
 334 static inline int
 335 at86rf230_write_subreg(struct at86rf230_local *lp,
 336                        unsigned int addr, unsigned int mask,
 337                        unsigned int shift, unsigned int data)
 338 {
 339         return regmap_update_bits(lp->regmap, addr, mask, data << shift);
 340 }
 341
 342 static bool
 343 at86rf230_reg_writeable(struct device *dev, unsigned int reg)
 344 {
 345         switch (reg) {
 346         case RG_TRX_STATE:
 347         case RG_TRX_CTRL_0:
 348         case RG_TRX_CTRL_1:
 349         case RG_PHY_TX_PWR:
 350         case RG_PHY_ED_LEVEL:
 351         case RG_PHY_CC_CCA:
 352         case RG_CCA_THRES:
 353         case RG_RX_CTRL:
 354         case RG_SFD_VALUE:
 355         case RG_TRX_CTRL_2:
 356         case RG_ANT_DIV:
 357         case RG_IRQ_MASK:
 358         case RG_VREG_CTRL:
 359         case RG_BATMON:
 360         case RG_XOSC_CTRL:
 361         case RG_RX_SYN:
 362         case RG_XAH_CTRL_1:
 363         case RG_FTN_CTRL:
 364         case RG_PLL_CF:
 365         case RG_PLL_DCU:
 366         case RG_SHORT_ADDR_0:
 367         case RG_SHORT_ADDR_1:
 368         case RG_PAN_ID_0:
 369         case RG_PAN_ID_1:
 370         case RG_IEEE_ADDR_0:
 371         case RG_IEEE_ADDR_1:
 372         case RG_IEEE_ADDR_2:
 373         case RG_IEEE_ADDR_3:
 374         case RG_IEEE_ADDR_4:
 375         case RG_IEEE_ADDR_5:
 376         case RG_IEEE_ADDR_6:
 377         case RG_IEEE_ADDR_7:
 378         case RG_XAH_CTRL_0:
 379         case RG_CSMA_SEED_0:
 380         case RG_CSMA_SEED_1:
 381         case RG_CSMA_BE:
 382                 return true;
 383         default:
 384                 return false;
 385         }
 386 }
 387
 388 static bool
 389 at86rf230_reg_readable(struct device *dev, unsigned int reg)
 390 {
 391         bool rc;
 392
 393         /* all writeable are also readable */
 394         rc = at86rf230_reg_writeable(dev, reg);
 395         if (rc)
 396                 return rc;
 397
 398         /* readonly regs */
 399         switch (reg) {
 400         case RG_TRX_STATUS:
 401         case RG_PHY_RSSI:
 402         case RG_IRQ_STATUS:
 403         case RG_PART_NUM:
 404         case RG_VERSION_NUM:
 405         case RG_MAN_ID_1:
 406         case RG_MAN_ID_0:
 407                 return true;
 408         default:
 409                 return false;
 410         }
 411 }
 412
 413 static bool
 414 at86rf230_reg_volatile(struct device *dev, unsigned int reg)
 415 {
 416         /* can be changed during runtime */
 417         switch (reg) {
 418         case RG_TRX_STATUS:
 419         case RG_TRX_STATE:
 420         case RG_PHY_RSSI:
 421         case RG_PHY_ED_LEVEL:
 422         case RG_IRQ_STATUS:
 423         case RG_VREG_CTRL:
 424         case RG_PLL_CF:
 425         case RG_PLL_DCU:
 426                 return true;
 427         default:
 428                 return false;
 429         }
 430 }
 431
 432 static bool
 433 at86rf230_reg_precious(struct device *dev, unsigned int reg)
 434 {
 435         /* don't clear irq line on read */
 436         switch (reg) {
 437         case RG_IRQ_STATUS:
 438                 return true;
 439         default:
 440                 return false;
 441         }
 442 }
 443
 444 static const struct regmap_config at86rf230_regmap_spi_config = {
 445         .reg_bits = 8,
 446         .val_bits = 8,
 447         .write_flag_mask = CMD_REG | CMD_WRITE,
 448         .read_flag_mask = CMD_REG,
 449         .cache_type = REGCACHE_RBTREE,
 450         .max_register = AT86RF2XX_NUMREGS,
 451         .writeable_reg = at86rf230_reg_writeable,
 452         .readable_reg = at86rf230_reg_readable,
 453         .volatile_reg = at86rf230_reg_volatile,
 454         .precious_reg = at86rf230_reg_precious,
 455 };
 456
 457 static void
 458 at86rf230_async_error_recover(void *context)
 459 {
 460         struct at86rf230_state_change *ctx = context;
 461         struct at86rf230_local *lp = ctx->lp;
 462
 463         lp->is_tx = 0;
 464         at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON, NULL, false);
 465         ieee802154_wake_queue(lp->hw);
 466 }
 467
 468 static inline void
 469 at86rf230_async_error(struct at86rf230_local *lp,
 470                       struct at86rf230_state_change *ctx, int rc)
 471 {
 472         dev_err(&lp->spi->dev, "spi_async error %d\n", rc);
 473
 474         at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
 475                                      at86rf230_async_error_recover, false);
 476 }
 477
 478 /* Generic function to get some register value in async mode */
 479 static void
 480 at86rf230_async_read_reg(struct at86rf230_local *lp, const u8 reg,
 481                          struct at86rf230_state_change *ctx,
 482                          void (*complete)(void *context),
 483                          const bool irq_enable)
 484 {
 485         int rc;
 486
 487         u8 *tx_buf = ctx->buf;
 488
 489         tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
 490         ctx->msg.complete = complete;
 491         ctx->irq_enable = irq_enable;
 492         rc = spi_async(lp->spi, &ctx->msg);
 493         if (rc) {
 494                 if (irq_enable)
 495                         enable_irq(ctx->irq);
 496
 497                 at86rf230_async_error(lp, ctx, rc);
 498         }
 499 }
 500
 501 static inline u8 at86rf230_state_to_force(u8 state)
 502 {
 503         if (state == STATE_TX_ON)
 504                 return STATE_FORCE_TX_ON;
 505         else
 506                 return STATE_FORCE_TRX_OFF;
 507 }
 508
 509 static void
 510 at86rf230_async_state_assert(void *context)
 511 {
 512         struct at86rf230_state_change *ctx = context;
 513         struct at86rf230_local *lp = ctx->lp;
 514         const u8 *buf = ctx->buf;
 515         const u8 trx_state = buf[1] & TRX_STATE_MASK;
 516
 517         /* Assert state change */
 518         if (trx_state != ctx->to_state) {
 519                 /* Special handling if transceiver state is in
 520                  * STATE_BUSY_RX_AACK and a SHR was detected.
 521                  */
 522                 if  (trx_state == STATE_BUSY_RX_AACK) {
 523                         /* Undocumented race condition. If we send a state
 524                          * change to STATE_RX_AACK_ON the transceiver could
 525                          * change his state automatically to STATE_BUSY_RX_AACK
 526                          * if a SHR was detected. This is not an error, but we
 527                          * can't assert this.
 528                          */
 529                         if (ctx->to_state == STATE_RX_AACK_ON)
 530                                 goto done;
 531
 532                         /* If we change to STATE_TX_ON without forcing and
 533                          * transceiver state is STATE_BUSY_RX_AACK, we wait
 534                          * 'tFrame + tPAck' receiving time. In this time the
 535                          * PDU should be received. If the transceiver is still
 536                          * in STATE_BUSY_RX_AACK, we run a force state change
 537                          * to STATE_TX_ON. This is a timeout handling, if the
 538                          * transceiver stucks in STATE_BUSY_RX_AACK.
 539                          *
 540                          * Additional we do several retries to try to get into
 541                          * TX_ON state without forcing. If the retries are
 542                          * higher or equal than AT86RF2XX_MAX_TX_RETRIES we
 543                          * will do a force change.
 544                          */
 545                         if (ctx->to_state == STATE_TX_ON ||
 546                             ctx->to_state == STATE_TRX_OFF) {
 547                                 u8 state = ctx->to_state;
 548
 549                                 if (lp->tx_retry >= AT86RF2XX_MAX_TX_RETRIES)
 550                                         state = at86rf230_state_to_force(state);
 551                                 lp->tx_retry++;
 552
 553                                 at86rf230_async_state_change(lp, ctx, state,
 554                                                              ctx->complete,
 555                                                              ctx->irq_enable);
 556                                 return;
 557                         }
 558                 }
 559
 560                 dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
 561                          ctx->from_state, ctx->to_state, trx_state);
 562         }
 563
 564 done:
 565         if (ctx->complete)
 566                 ctx->complete(context);
 567 }
 568
 569 static enum hrtimer_restart at86rf230_async_state_timer(struct hrtimer *timer)
 570 {
 571         struct at86rf230_state_change *ctx =
 572                 container_of(timer, struct at86rf230_state_change, timer);
 573         struct at86rf230_local *lp = ctx->lp;
 574
 575         at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
 576                                  at86rf230_async_state_assert,
 577                                  ctx->irq_enable);
 578
 579         return HRTIMER_NORESTART;
 580 }
 581
 582 /* Do state change timing delay. */
 583 static void
 584 at86rf230_async_state_delay(void *context)
 585 {
 586         struct at86rf230_state_change *ctx = context;
 587         struct at86rf230_local *lp = ctx->lp;
 588         struct at86rf2xx_chip_data *c = lp->data;
 589         bool force = false;
 590         ktime_t tim;
 591
 592         /* The force state changes are will show as normal states in the
 593          * state status subregister. We change the to_state to the
 594          * corresponding one and remember if it was a force change, this
 595          * differs if we do a state change from STATE_BUSY_RX_AACK.
 596          */
 597         switch (ctx->to_state) {
 598         case STATE_FORCE_TX_ON:
 599                 ctx->to_state = STATE_TX_ON;
 600                 force = true;
 601                 break;
 602         case STATE_FORCE_TRX_OFF:
 603                 ctx->to_state = STATE_TRX_OFF;
 604                 force = true;
 605                 break;
 606         default:
 607                 break;
 608         }
 609
 610         switch (ctx->from_state) {
 611         case STATE_TRX_OFF:
 612                 switch (ctx->to_state) {
 613                 case STATE_RX_AACK_ON:
 614                         tim = ktime_set(0, c->t_off_to_aack * NSEC_PER_USEC);
 615                         /* state change from TRX_OFF to RX_AACK_ON to do a
 616                          * calibration, we need to reset the timeout for the
 617                          * next one.
 618                          */
 619                         lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
 620                         goto change;
 621                 case STATE_TX_ARET_ON:
 622                 case STATE_TX_ON:
 623                         tim = ktime_set(0, c->t_off_to_tx_on * NSEC_PER_USEC);
 624                         /* state change from TRX_OFF to TX_ON or ARET_ON to do
 625                          * a calibration, we need to reset the timeout for the
 626                          * next one.
 627                          */
 628                         lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
 629                         goto change;
 630                 default:
 631                         break;
 632                 }
 633                 break;
 634         case STATE_BUSY_RX_AACK:
 635                 switch (ctx->to_state) {
 636                 case STATE_TRX_OFF:
 637                 case STATE_TX_ON:
 638                         /* Wait for worst case receiving time if we
 639                          * didn't make a force change from BUSY_RX_AACK
 640                          * to TX_ON or TRX_OFF.
 641                          */
 642                         if (!force) {
 643                                 tim = ktime_set(0, (c->t_frame + c->t_p_ack) *
 644                                                    NSEC_PER_USEC);
 645                                 goto change;
 646                         }
 647                         break;
 648                 default:
 649                         break;
 650                 }
 651                 break;
 652         /* Default value, means RESET state */
 653         case STATE_P_ON:
 654                 switch (ctx->to_state) {
 655                 case STATE_TRX_OFF:
 656                         tim = ktime_set(0, c->t_reset_to_off * NSEC_PER_USEC);
 657                         goto change;
 658                 default:
 659                         break;
 660                 }
 661                 break;
 662         default:
 663                 break;
 664         }
 665
 666         /* Default delay is 1us in the most cases */
 667         tim = ktime_set(0, NSEC_PER_USEC);
 668
 669 change:
 670         hrtimer_start(&ctx->timer, tim, HRTIMER_MODE_REL);
 671 }
 672
 673 static void
 674 at86rf230_async_state_change_start(void *context)
 675 {
 676         struct at86rf230_state_change *ctx = context;
 677         struct at86rf230_local *lp = ctx->lp;
 678         u8 *buf = ctx->buf;
 679         const u8 trx_state = buf[1] & TRX_STATE_MASK;
 680         int rc;
 681
 682         /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
 683         if (trx_state == STATE_TRANSITION_IN_PROGRESS) {
 684                 udelay(1);
 685                 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
 686                                          at86rf230_async_state_change_start,
 687                                          ctx->irq_enable);
 688                 return;
 689         }
 690
 691         /* Check if we already are in the state which we change in */
 692         if (trx_state == ctx->to_state) {
 693                 if (ctx->complete)
 694                         ctx->complete(context);
 695                 return;
 696         }
 697
 698         /* Set current state to the context of state change */
 699         ctx->from_state = trx_state;
 700
 701         /* Going into the next step for a state change which do a timing
 702          * relevant delay.
 703          */
 704         buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
 705         buf[1] = ctx->to_state;
 706         ctx->msg.complete = at86rf230_async_state_delay;
 707         rc = spi_async(lp->spi, &ctx->msg);
 708         if (rc) {
 709                 if (ctx->irq_enable)
 710                         enable_irq(ctx->irq);
 711
 712                 at86rf230_async_error(lp, ctx, rc);
 713         }
 714 }
 715
 716 static void
 717 at86rf230_async_state_change(struct at86rf230_local *lp,
 718                              struct at86rf230_state_change *ctx,
 719                              const u8 state, void (*complete)(void *context),
 720                              const bool irq_enable)
 721 {
 722         /* Initialization for the state change context */
 723         ctx->to_state = state;
 724         ctx->complete = complete;
 725         ctx->irq_enable = irq_enable;
 726         at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
 727                                  at86rf230_async_state_change_start,
 728                                  irq_enable);
 729 }
 730
 731 static void
 732 at86rf230_sync_state_change_complete(void *context)
 733 {
 734         struct at86rf230_state_change *ctx = context;
 735         struct at86rf230_local *lp = ctx->lp;
 736
 737         complete(&lp->state_complete);
 738 }
 739
 740 /* This function do a sync framework above the async state change.
 741  * Some callbacks of the IEEE 802.15.4 driver interface need to be
 742  * handled synchronously.
 743  */
 744 static int
 745 at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state)
 746 {
 747         unsigned long rc;
 748
 749         at86rf230_async_state_change(lp, &lp->state, state,
 750                                      at86rf230_sync_state_change_complete,
 751                                      false);
 752
 753         rc = wait_for_completion_timeout(&lp->state_complete,
 754                                          msecs_to_jiffies(100));
 755         if (!rc) {
 756                 at86rf230_async_error(lp, &lp->state, -ETIMEDOUT);
 757                 return -ETIMEDOUT;
 758         }
 759
 760         return 0;
 761 }
 762
 763 static void
 764 at86rf230_tx_complete(void *context)
 765 {
 766         struct at86rf230_state_change *ctx = context;
 767         struct at86rf230_local *lp = ctx->lp;
 768
 769         enable_irq(ctx->irq);
 770
 771         ieee802154_xmit_complete(lp->hw, lp->tx_skb, !lp->tx_aret);
 772 }
 773
 774 static void
 775 at86rf230_tx_on(void *context)
 776 {
 777         struct at86rf230_state_change *ctx = context;
 778         struct at86rf230_local *lp = ctx->lp;
 779
 780         at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
 781                                      at86rf230_tx_complete, true);
 782 }
 783
 784 static void
 785 at86rf230_tx_trac_check(void *context)
 786 {
 787         struct at86rf230_state_change *ctx = context;
 788         struct at86rf230_local *lp = ctx->lp;
 789         const u8 *buf = ctx->buf;
 790         const u8 trac = (buf[1] & 0xe0) >> 5;
 791
 792         /* If trac status is different than zero we need to do a state change
 793          * to STATE_FORCE_TRX_OFF then STATE_RX_AACK_ON to recover the
 794          * transceiver.
 795          */
 796         if (trac)
 797                 at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
 798                                              at86rf230_tx_on, true);
 799         else
 800                 at86rf230_tx_on(context);
 801 }
 802
 803 static void
 804 at86rf230_tx_trac_status(void *context)
 805 {
 806         struct at86rf230_state_change *ctx = context;
 807         struct at86rf230_local *lp = ctx->lp;
 808
 809         at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
 810                                  at86rf230_tx_trac_check, true);
 811 }
 812
 813 static void
 814 at86rf230_rx_read_frame_complete(void *context)
 815 {
 816         struct at86rf230_state_change *ctx = context;
 817         struct at86rf230_local *lp = ctx->lp;
 818         u8 rx_local_buf[AT86RF2XX_MAX_BUF];
 819         const u8 *buf = ctx->buf;
 820         struct sk_buff *skb;
 821         u8 len, lqi;
 822
 823         len = buf[1];
 824         if (!ieee802154_is_valid_psdu_len(len)) {
 825                 dev_vdbg(&lp->spi->dev, "corrupted frame received\n");
 826                 len = IEEE802154_MTU;
 827         }
 828         lqi = buf[2 + len];
 829
 830         memcpy(rx_local_buf, buf + 2, len);
 831         ctx->trx.len = 2;
 832         enable_irq(ctx->irq);
 833
 834         skb = dev_alloc_skb(IEEE802154_MTU);
 835         if (!skb) {
 836                 dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n");
 837                 return;
 838         }
 839
 840         memcpy(skb_put(skb, len), rx_local_buf, len);
 841         ieee802154_rx_irqsafe(lp->hw, skb, lqi);
 842 }
 843
 844 static void
 845 at86rf230_rx_read_frame(void *context)
 846 {
 847         struct at86rf230_state_change *ctx = context;
 848         struct at86rf230_local *lp = ctx->lp;
 849         u8 *buf = ctx->buf;
 850         int rc;
 851
 852         buf[0] = CMD_FB;
 853         ctx->trx.len = AT86RF2XX_MAX_BUF;
 854         ctx->msg.complete = at86rf230_rx_read_frame_complete;
 855         rc = spi_async(lp->spi, &ctx->msg);
 856         if (rc) {
 857                 ctx->trx.len = 2;
 858                 enable_irq(ctx->irq);
 859                 at86rf230_async_error(lp, ctx, rc);
 860         }
 861 }
 862
 863 static void
 864 at86rf230_rx_trac_check(void *context)
 865 {
 866         /* Possible check on trac status here. This could be useful to make
 867          * some stats why receive is failed. Not used at the moment, but it's
 868          * maybe timing relevant. Datasheet doesn't say anything about this.
 869          * The programming guide say do it so.
 870          */
 871
 872         at86rf230_rx_read_frame(context);
 873 }
 874
 875 static void
 876 at86rf230_irq_trx_end(struct at86rf230_local *lp)
 877 {
 878         if (lp->is_tx) {
 879                 lp->is_tx = 0;
 880
 881                 if (lp->tx_aret)
 882                         at86rf230_async_state_change(lp, &lp->irq,
 883                                                      STATE_FORCE_TX_ON,
 884                                                      at86rf230_tx_trac_status,
 885                                                      true);
 886                 else
 887                         at86rf230_async_state_change(lp, &lp->irq,
 888                                                      STATE_RX_AACK_ON,
 889                                                      at86rf230_tx_complete,
 890                                                      true);
 891         } else {
 892                 at86rf230_async_read_reg(lp, RG_TRX_STATE, &lp->irq,
 893                                          at86rf230_rx_trac_check, true);
 894         }
 895 }
 896
 897 static void
 898 at86rf230_irq_status(void *context)
 899 {
 900         struct at86rf230_state_change *ctx = context;
 901         struct at86rf230_local *lp = ctx->lp;
 902         const u8 *buf = ctx->buf;
 903         const u8 irq = buf[1];
 904
 905         if (irq & IRQ_TRX_END) {
 906                 at86rf230_irq_trx_end(lp);
 907         } else {
 908                 enable_irq(ctx->irq);
 909                 dev_err(&lp->spi->dev, "not supported irq %02x received\n",
 910                         irq);
 911         }
 912 }
 913
 914 static irqreturn_t at86rf230_isr(int irq, void *data)
 915 {
 916         struct at86rf230_local *lp = data;
 917         struct at86rf230_state_change *ctx = &lp->irq;
 918         u8 *buf = ctx->buf;
 919         int rc;
 920
 921         disable_irq_nosync(irq);
 922
 923         buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG;
 924         ctx->msg.complete = at86rf230_irq_status;
 925         rc = spi_async(lp->spi, &ctx->msg);
 926         if (rc) {
 927                 enable_irq(irq);
 928                 at86rf230_async_error(lp, ctx, rc);
 929                 return IRQ_NONE;
 930         }
 931
 932         return IRQ_HANDLED;
 933 }
 934
 935 static void
 936 at86rf230_write_frame_complete(void *context)
 937 {
 938         struct at86rf230_state_change *ctx = context;
 939         struct at86rf230_local *lp = ctx->lp;
 940         u8 *buf = ctx->buf;
 941         int rc;
 942
 943         buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
 944         buf[1] = STATE_BUSY_TX;
 945         ctx->trx.len = 2;
 946         ctx->msg.complete = NULL;
 947         rc = spi_async(lp->spi, &ctx->msg);
 948         if (rc)
 949                 at86rf230_async_error(lp, ctx, rc);
 950 }
 951
 952 static void
 953 at86rf230_write_frame(void *context)
 954 {
 955         struct at86rf230_state_change *ctx = context;
 956         struct at86rf230_local *lp = ctx->lp;
 957         struct sk_buff *skb = lp->tx_skb;
 958         u8 *buf = ctx->buf;
 959         int rc;
 960
 961         lp->is_tx = 1;
 962
 963         buf[0] = CMD_FB | CMD_WRITE;
 964         buf[1] = skb->len + 2;
 965         memcpy(buf + 2, skb->data, skb->len);
 966         ctx->trx.len = skb->len + 2;
 967         ctx->msg.complete = at86rf230_write_frame_complete;
 968         rc = spi_async(lp->spi, &ctx->msg);
 969         if (rc) {
 970                 ctx->trx.len = 2;
 971                 at86rf230_async_error(lp, ctx, rc);
 972         }
 973 }
 974
 975 static void
 976 at86rf230_xmit_tx_on(void *context)
 977 {
 978         struct at86rf230_state_change *ctx = context;
 979         struct at86rf230_local *lp = ctx->lp;
 980
 981         at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
 982                                      at86rf230_write_frame, false);
 983 }
 984
 985 static void
 986 at86rf230_xmit_start(void *context)
 987 {
 988         struct at86rf230_state_change *ctx = context;
 989         struct at86rf230_local *lp = ctx->lp;
 990
 991         /* In ARET mode we need to go into STATE_TX_ARET_ON after we
 992          * are in STATE_TX_ON. The pfad differs here, so we change
 993          * the complete handler.
 994          */
 995         if (lp->tx_aret) {
 996                 if (lp->is_tx_from_off) {
 997                         lp->is_tx_from_off = false;
 998                         at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
 999                                                      at86rf230_xmit_tx_on,
1000                                                      false);
1001                 } else {
1002                         at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
1003                                                      at86rf230_xmit_tx_on,
1004                                                      false);
1005                 }
1006         } else {
1007                 at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
1008                                              at86rf230_write_frame, false);
1009         }
1010 }
1011
1012 static int
1013 at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
1014 {
1015         struct at86rf230_local *lp = hw->priv;
1016         struct at86rf230_state_change *ctx = &lp->tx;
1017
1018         lp->tx_skb = skb;
1019         lp->tx_retry = 0;
1020
1021         /* After 5 minutes in PLL and the same frequency we run again the
1022          * calibration loops which is recommended by at86rf2xx datasheets.
1023          *
1024          * The calibration is initiate by a state change from TRX_OFF
1025          * to TX_ON, the lp->cal_timeout should be reinit by state_delay
1026          * function then to start in the next 5 minutes.
1027          */
1028         if (time_is_before_jiffies(lp->cal_timeout)) {
1029                 lp->is_tx_from_off = true;
1030                 at86rf230_async_state_change(lp, ctx, STATE_TRX_OFF,
1031                                              at86rf230_xmit_start, false);
1032         } else {
1033                 at86rf230_xmit_start(ctx);
1034         }
1035
1036         return 0;
1037 }
1038
1039 static int
1040 at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
1041 {
1042         BUG_ON(!level);
1043         *level = 0xbe;
1044         return 0;
1045 }
1046
1047 static int
1048 at86rf230_start(struct ieee802154_hw *hw)
1049 {
1050         return at86rf230_sync_state_change(hw->priv, STATE_RX_AACK_ON);
1051 }
1052
1053 static void
1054 at86rf230_stop(struct ieee802154_hw *hw)
1055 {
1056         at86rf230_sync_state_change(hw->priv, STATE_FORCE_TRX_OFF);
1057 }
1058
1059 static int
1060 at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
1061 {
1062         return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
1063 }
1064
1065 static int
1066 at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
1067 {
1068         int rc;
1069
1070         if (channel == 0)
1071                 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
1072         else
1073                 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
1074         if (rc < 0)
1075                 return rc;
1076
1077         if (page == 0) {
1078                 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
1079                 lp->data->rssi_base_val = -100;
1080         } else {
1081                 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
1082                 lp->data->rssi_base_val = -98;
1083         }
1084         if (rc < 0)
1085                 return rc;
1086
1087         /* This sets the symbol_duration according frequency on the 212.
1088          * TODO move this handling while set channel and page in cfg802154.
1089          * We can do that, this timings are according 802.15.4 standard.
1090          * If we do that in cfg802154, this is a more generic calculation.
1091          *
1092          * This should also protected from ifs_timer. Means cancel timer and
1093          * init with a new value. For now, this is okay.
1094          */
1095         if (channel == 0) {
1096                 if (page == 0) {
1097                         /* SUB:0 and BPSK:0 -> BPSK-20 */
1098                         lp->hw->phy->symbol_duration = 50;
1099                 } else {
1100                         /* SUB:1 and BPSK:0 -> BPSK-40 */
1101                         lp->hw->phy->symbol_duration = 25;
1102                 }
1103         } else {
1104                 if (page == 0)
1105                         /* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */
1106                         lp->hw->phy->symbol_duration = 40;
1107                 else
1108                         /* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */
1109                         lp->hw->phy->symbol_duration = 16;
1110         }
1111
1112         lp->hw->phy->lifs_period = IEEE802154_LIFS_PERIOD *
1113                                    lp->hw->phy->symbol_duration;
1114         lp->hw->phy->sifs_period = IEEE802154_SIFS_PERIOD *
1115                                    lp->hw->phy->symbol_duration;
1116
1117         return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
1118 }
1119
1120 static int
1121 at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
1122 {
1123         struct at86rf230_local *lp = hw->priv;
1124         int rc;
1125
1126         rc = lp->data->set_channel(lp, page, channel);
1127         /* Wait for PLL */
1128         usleep_range(lp->data->t_channel_switch,
1129                      lp->data->t_channel_switch + 10);
1130
1131         lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
1132         return rc;
1133 }
1134
1135 static int
1136 at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
1137                            struct ieee802154_hw_addr_filt *filt,
1138                            unsigned long changed)
1139 {
1140         struct at86rf230_local *lp = hw->priv;
1141
1142         if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
1143                 u16 addr = le16_to_cpu(filt->short_addr);
1144
1145                 dev_vdbg(&lp->spi->dev,
1146                          "at86rf230_set_hw_addr_filt called for saddr\n");
1147                 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
1148                 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
1149         }
1150
1151         if (changed & IEEE802154_AFILT_PANID_CHANGED) {
1152                 u16 pan = le16_to_cpu(filt->pan_id);
1153
1154                 dev_vdbg(&lp->spi->dev,
1155                          "at86rf230_set_hw_addr_filt called for pan id\n");
1156                 __at86rf230_write(lp, RG_PAN_ID_0, pan);
1157                 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
1158         }
1159
1160         if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
1161                 u8 i, addr[8];
1162
1163                 memcpy(addr, &filt->ieee_addr, 8);
1164                 dev_vdbg(&lp->spi->dev,
1165                          "at86rf230_set_hw_addr_filt called for IEEE addr\n");
1166                 for (i = 0; i < 8; i++)
1167                         __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
1168         }
1169
1170         if (changed & IEEE802154_AFILT_PANC_CHANGED) {
1171                 dev_vdbg(&lp->spi->dev,
1172                          "at86rf230_set_hw_addr_filt called for panc change\n");
1173                 if (filt->pan_coord)
1174                         at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
1175                 else
1176                         at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
1177         }
1178
1179         return 0;
1180 }
1181
1182 static int
1183 at86rf230_set_txpower(struct ieee802154_hw *hw, s8 db)
1184 {
1185         struct at86rf230_local *lp = hw->priv;
1186
1187         /* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five
1188          * bits decrease power in 1dB steps. 0x60 represents extra PA gain of
1189          * 0dB.
1190          * thus, supported values for db range from -26 to 5, for 31dB of
1191          * reduction to 0dB of reduction.
1192          */
1193         if (db > 5 || db < -26)
1194                 return -EINVAL;
1195
1196         db = -(db - 5);
1197
1198         return __at86rf230_write(lp, RG_PHY_TX_PWR, 0x60 | db);
1199 }
1200
1201 static int
1202 at86rf230_set_lbt(struct ieee802154_hw *hw, bool on)
1203 {
1204         struct at86rf230_local *lp = hw->priv;
1205
1206         return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
1207 }
1208
1209 static int
1210 at86rf230_set_cca_mode(struct ieee802154_hw *hw,
1211                        const struct wpan_phy_cca *cca)
1212 {
1213         struct at86rf230_local *lp = hw->priv;
1214         u8 val;
1215
1216         /* mapping 802.15.4 to driver spec */
1217         switch (cca->mode) {
1218         case NL802154_CCA_ENERGY:
1219                 val = 1;
1220                 break;
1221         case NL802154_CCA_CARRIER:
1222                 val = 2;
1223                 break;
1224         case NL802154_CCA_ENERGY_CARRIER:
1225                 switch (cca->opt) {
1226                 case NL802154_CCA_OPT_ENERGY_CARRIER_AND:
1227                         val = 3;
1228                         break;
1229                 case NL802154_CCA_OPT_ENERGY_CARRIER_OR:
1230                         val = 0;
1231                         break;
1232                 default:
1233                         return -EINVAL;
1234                 }
1235                 break;
1236         default:
1237                 return -EINVAL;
1238         }
1239
1240         return at86rf230_write_subreg(lp, SR_CCA_MODE, val);
1241 }
1242
1243 static int
1244 at86rf212_get_desens_steps(struct at86rf230_local *lp, s32 level)
1245 {
1246         return (level - lp->data->rssi_base_val) * 100 / 207;
1247 }
1248
1249 static int
1250 at86rf23x_get_desens_steps(struct at86rf230_local *lp, s32 level)
1251 {
1252         return (level - lp->data->rssi_base_val) / 2;
1253 }
1254
1255 static int
1256 at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 level)
1257 {
1258         struct at86rf230_local *lp = hw->priv;
1259
1260         if (level < lp->data->rssi_base_val || level > 30)
1261                 return -EINVAL;
1262
1263         return at86rf230_write_subreg(lp, SR_CCA_ED_THRES,
1264                                       lp->data->get_desense_steps(lp, level));
1265 }
1266
1267 static int
1268 at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
1269                           u8 retries)
1270 {
1271         struct at86rf230_local *lp = hw->priv;
1272         int rc;
1273
1274         rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
1275         if (rc)
1276                 return rc;
1277
1278         rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
1279         if (rc)
1280                 return rc;
1281
1282         return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
1283 }
1284
1285 static int
1286 at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
1287 {
1288         struct at86rf230_local *lp = hw->priv;
1289         int rc = 0;
1290
1291         lp->tx_aret = retries >= 0;
1292         lp->max_frame_retries = retries;
1293
1294         if (retries >= 0)
1295                 rc = at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
1296
1297         return rc;
1298 }
1299
1300 static int
1301 at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
1302 {
1303         struct at86rf230_local *lp = hw->priv;
1304         int rc;
1305
1306         if (on) {
1307                 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1);
1308                 if (rc < 0)
1309                         return rc;
1310
1311                 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1);
1312                 if (rc < 0)
1313                         return rc;
1314         } else {
1315                 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0);
1316                 if (rc < 0)
1317                         return rc;
1318
1319                 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0);
1320                 if (rc < 0)
1321                         return rc;
1322         }
1323
1324         return 0;
1325 }
1326
1327 static const struct ieee802154_ops at86rf230_ops = {
1328         .owner = THIS_MODULE,
1329         .xmit_async = at86rf230_xmit,
1330         .ed = at86rf230_ed,
1331         .set_channel = at86rf230_channel,
1332         .start = at86rf230_start,
1333         .stop = at86rf230_stop,
1334         .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
1335         .set_txpower = at86rf230_set_txpower,
1336         .set_lbt = at86rf230_set_lbt,
1337         .set_cca_mode = at86rf230_set_cca_mode,
1338         .set_cca_ed_level = at86rf230_set_cca_ed_level,
1339         .set_csma_params = at86rf230_set_csma_params,
1340         .set_frame_retries = at86rf230_set_frame_retries,
1341         .set_promiscuous_mode = at86rf230_set_promiscuous_mode,
1342 };
1343
1344 static struct at86rf2xx_chip_data at86rf233_data = {
1345         .t_sleep_cycle = 330,
1346         .t_channel_switch = 11,
1347         .t_reset_to_off = 26,
1348         .t_off_to_aack = 80,
1349         .t_off_to_tx_on = 80,
1350         .t_frame = 4096,
1351         .t_p_ack = 545,
1352         .rssi_base_val = -91,
1353         .set_channel = at86rf23x_set_channel,
1354         .get_desense_steps = at86rf23x_get_desens_steps
1355 };
1356
1357 static struct at86rf2xx_chip_data at86rf231_data = {
1358         .t_sleep_cycle = 330,
1359         .t_channel_switch = 24,
1360         .t_reset_to_off = 37,
1361         .t_off_to_aack = 110,
1362         .t_off_to_tx_on = 110,
1363         .t_frame = 4096,
1364         .t_p_ack = 545,
1365         .rssi_base_val = -91,
1366         .set_channel = at86rf23x_set_channel,
1367         .get_desense_steps = at86rf23x_get_desens_steps
1368 };
1369
1370 static struct at86rf2xx_chip_data at86rf212_data = {
1371         .t_sleep_cycle = 330,
1372         .t_channel_switch = 11,
1373         .t_reset_to_off = 26,
1374         .t_off_to_aack = 200,
1375         .t_off_to_tx_on = 200,
1376         .t_frame = 4096,
1377         .t_p_ack = 545,
1378         .rssi_base_val = -100,
1379         .set_channel = at86rf212_set_channel,
1380         .get_desense_steps = at86rf212_get_desens_steps
1381 };
1382
1383 static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim)
1384 {
1385         int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
1386         unsigned int dvdd;
1387         u8 csma_seed[2];
1388
1389         rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
1390         if (rc)
1391                 return rc;
1392
1393         irq_type = irq_get_trigger_type(lp->spi->irq);
1394         if (irq_type == IRQ_TYPE_EDGE_RISING ||
1395             irq_type == IRQ_TYPE_EDGE_FALLING)
1396                 dev_warn(&lp->spi->dev,
1397                          "Using edge triggered irq's are not recommended!\n");
1398         if (irq_type == IRQ_TYPE_EDGE_FALLING ||
1399             irq_type == IRQ_TYPE_LEVEL_LOW)
1400                 irq_pol = IRQ_ACTIVE_LOW;
1401
1402         rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
1403         if (rc)
1404                 return rc;
1405
1406         rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
1407         if (rc)
1408                 return rc;
1409
1410         rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
1411         if (rc)
1412                 return rc;
1413
1414         /* reset values differs in at86rf231 and at86rf233 */
1415         rc = at86rf230_write_subreg(lp, SR_IRQ_MASK_MODE, 0);
1416         if (rc)
1417                 return rc;
1418
1419         get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1420         rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1421         if (rc)
1422                 return rc;
1423         rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1424         if (rc)
1425                 return rc;
1426
1427         /* CLKM changes are applied immediately */
1428         rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1429         if (rc)
1430                 return rc;
1431
1432         /* Turn CLKM Off */
1433         rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1434         if (rc)
1435                 return rc;
1436         /* Wait the next SLEEP cycle */
1437         usleep_range(lp->data->t_sleep_cycle,
1438                      lp->data->t_sleep_cycle + 100);
1439
1440         /* xtal_trim value is calculated by:
1441          * CL = 0.5 * (CX + CTRIM + CPAR)
1442          *
1443          * whereas:
1444          * CL = capacitor of used crystal
1445          * CX = connected capacitors at xtal pins
1446          * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
1447          *        but this is different on each board setup. You need to fine
1448          *        tuning this value via CTRIM.
1449          * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
1450          *         0 pF upto 4.5 pF.
1451          *
1452          * Examples:
1453          * atben transceiver:
1454          *
1455          * CL = 8 pF
1456          * CX = 12 pF
1457          * CPAR = 3 pF (We assume the magic constant from datasheet)
1458          * CTRIM = 0.9 pF
1459          *
1460          * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
1461          *
1462          * xtal_trim = 0x3
1463          *
1464          * openlabs transceiver:
1465          *
1466          * CL = 16 pF
1467          * CX = 22 pF
1468          * CPAR = 3 pF (We assume the magic constant from datasheet)
1469          * CTRIM = 4.5 pF
1470          *
1471          * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
1472          *
1473          * xtal_trim = 0xf
1474          */
1475         rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim);
1476         if (rc)
1477                 return rc;
1478
1479         rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
1480         if (rc)
1481                 return rc;
1482         if (!dvdd) {
1483                 dev_err(&lp->spi->dev, "DVDD error\n");
1484                 return -EINVAL;
1485         }
1486
1487         /* Force setting slotted operation bit to 0. Sometimes the atben
1488          * sets this bit and I don't know why. We set this always force
1489          * to zero while probing.
1490          */
1491         return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
1492 }
1493
1494 static int
1495 at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr,
1496                     u8 *xtal_trim)
1497 {
1498         struct at86rf230_platform_data *pdata = spi->dev.platform_data;
1499         int ret;
1500
1501         if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) {
1502                 if (!pdata)
1503                         return -ENOENT;
1504
1505                 *rstn = pdata->rstn;
1506                 *slp_tr = pdata->slp_tr;
1507                 *xtal_trim = pdata->xtal_trim;
1508                 return 0;
1509         }
1510
1511         *rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
1512         *slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
1513         ret = of_property_read_u8(spi->dev.of_node, "xtal-trim", xtal_trim);
1514         if (ret < 0 && ret != -EINVAL)
1515                 return ret;
1516
1517         return 0;
1518 }
1519
1520 static int
1521 at86rf230_detect_device(struct at86rf230_local *lp)
1522 {
1523         unsigned int part, version, val;
1524         u16 man_id = 0;
1525         const char *chip;
1526         int rc;
1527
1528         rc = __at86rf230_read(lp, RG_MAN_ID_0, &val);
1529         if (rc)
1530                 return rc;
1531         man_id |= val;
1532
1533         rc = __at86rf230_read(lp, RG_MAN_ID_1, &val);
1534         if (rc)
1535                 return rc;
1536         man_id |= (val << 8);
1537
1538         rc = __at86rf230_read(lp, RG_PART_NUM, &part);
1539         if (rc)
1540                 return rc;
1541
1542         rc = __at86rf230_read(lp, RG_VERSION_NUM, &version);
1543         if (rc)
1544                 return rc;
1545
1546         if (man_id != 0x001f) {
1547                 dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1548                         man_id >> 8, man_id & 0xFF);
1549                 return -EINVAL;
1550         }
1551
1552         lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM | IEEE802154_HW_AACK |
1553                         IEEE802154_HW_TXPOWER | IEEE802154_HW_ARET |
1554                         IEEE802154_HW_AFILT | IEEE802154_HW_PROMISCUOUS;
1555
1556         lp->hw->phy->cca.mode = NL802154_CCA_ENERGY;
1557
1558         switch (part) {
1559         case 2:
1560                 chip = "at86rf230";
1561                 rc = -ENOTSUPP;
1562                 break;
1563         case 3:
1564                 chip = "at86rf231";
1565                 lp->data = &at86rf231_data;
1566                 lp->hw->phy->channels_supported[0] = 0x7FFF800;
1567                 lp->hw->phy->current_channel = 11;
1568                 lp->hw->phy->symbol_duration = 16;
1569                 break;
1570         case 7:
1571                 chip = "at86rf212";
1572                 lp->data = &at86rf212_data;
1573                 lp->hw->flags |= IEEE802154_HW_LBT;
1574                 lp->hw->phy->channels_supported[0] = 0x00007FF;
1575                 lp->hw->phy->channels_supported[2] = 0x00007FF;
1576                 lp->hw->phy->current_channel = 5;
1577                 lp->hw->phy->symbol_duration = 25;
1578                 break;
1579         case 11:
1580                 chip = "at86rf233";
1581                 lp->data = &at86rf233_data;
1582                 lp->hw->phy->channels_supported[0] = 0x7FFF800;
1583                 lp->hw->phy->current_channel = 13;
1584                 lp->hw->phy->symbol_duration = 16;
1585                 break;
1586         default:
1587                 chip = "unknown";
1588                 rc = -ENOTSUPP;
1589                 break;
1590         }
1591
1592         dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version);
1593
1594         return rc;
1595 }
1596
1597 static void
1598 at86rf230_setup_spi_messages(struct at86rf230_local *lp)
1599 {
1600         lp->state.lp = lp;
1601         lp->state.irq = lp->spi->irq;
1602         spi_message_init(&lp->state.msg);
1603         lp->state.msg.context = &lp->state;
1604         lp->state.trx.len = 2;
1605         lp->state.trx.tx_buf = lp->state.buf;
1606         lp->state.trx.rx_buf = lp->state.buf;
1607         spi_message_add_tail(&lp->state.trx, &lp->state.msg);
1608         hrtimer_init(&lp->state.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
1609         lp->state.timer.function = at86rf230_async_state_timer;
1610
1611         lp->irq.lp = lp;
1612         lp->irq.irq = lp->spi->irq;
1613         spi_message_init(&lp->irq.msg);
1614         lp->irq.msg.context = &lp->irq;
1615         lp->irq.trx.len = 2;
1616         lp->irq.trx.tx_buf = lp->irq.buf;
1617         lp->irq.trx.rx_buf = lp->irq.buf;
1618         spi_message_add_tail(&lp->irq.trx, &lp->irq.msg);
1619         hrtimer_init(&lp->irq.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
1620         lp->irq.timer.function = at86rf230_async_state_timer;
1621
1622         lp->tx.lp = lp;
1623         lp->tx.irq = lp->spi->irq;
1624         spi_message_init(&lp->tx.msg);
1625         lp->tx.msg.context = &lp->tx;
1626         lp->tx.trx.len = 2;
1627         lp->tx.trx.tx_buf = lp->tx.buf;
1628         lp->tx.trx.rx_buf = lp->tx.buf;
1629         spi_message_add_tail(&lp->tx.trx, &lp->tx.msg);
1630         hrtimer_init(&lp->tx.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
1631         lp->tx.timer.function = at86rf230_async_state_timer;
1632 }
1633
1634 static int at86rf230_probe(struct spi_device *spi)
1635 {
1636         struct ieee802154_hw *hw;
1637         struct at86rf230_local *lp;
1638         unsigned int status;
1639         int rc, irq_type, rstn, slp_tr;
1640         u8 xtal_trim = 0;
1641
1642         if (!spi->irq) {
1643                 dev_err(&spi->dev, "no IRQ specified\n");
1644                 return -EINVAL;
1645         }
1646
1647         rc = at86rf230_get_pdata(spi, &rstn, &slp_tr, &xtal_trim);
1648         if (rc < 0) {
1649                 dev_err(&spi->dev, "failed to parse platform_data: %d\n", rc);
1650                 return rc;
1651         }
1652
1653         if (gpio_is_valid(rstn)) {
1654                 rc = devm_gpio_request_one(&spi->dev, rstn,
1655                                            GPIOF_OUT_INIT_HIGH, "rstn");
1656                 if (rc)
1657                         return rc;
1658         }
1659
1660         if (gpio_is_valid(slp_tr)) {
1661                 rc = devm_gpio_request_one(&spi->dev, slp_tr,
1662                                            GPIOF_OUT_INIT_LOW, "slp_tr");
1663                 if (rc)
1664                         return rc;
1665         }
1666
1667         /* Reset */
1668         if (gpio_is_valid(rstn)) {
1669                 udelay(1);
1670                 gpio_set_value(rstn, 0);
1671                 udelay(1);
1672                 gpio_set_value(rstn, 1);
1673                 usleep_range(120, 240);
1674         }
1675
1676         hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops);
1677         if (!hw)
1678                 return -ENOMEM;
1679
1680         lp = hw->priv;
1681         lp->hw = hw;
1682         lp->spi = spi;
1683         hw->parent = &spi->dev;
1684         hw->vif_data_size = sizeof(*lp);
1685         ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
1686
1687         lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
1688         if (IS_ERR(lp->regmap)) {
1689                 rc = PTR_ERR(lp->regmap);
1690                 dev_err(&spi->dev, "Failed to allocate register map: %d\n",
1691                         rc);
1692                 goto free_dev;
1693         }
1694
1695         at86rf230_setup_spi_messages(lp);
1696
1697         rc = at86rf230_detect_device(lp);
1698         if (rc < 0)
1699                 goto free_dev;
1700
1701         init_completion(&lp->state_complete);
1702
1703         spi_set_drvdata(spi, lp);
1704
1705         rc = at86rf230_hw_init(lp, xtal_trim);
1706         if (rc)
1707                 goto free_dev;
1708
1709         /* Read irq status register to reset irq line */
1710         rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1711         if (rc)
1712                 goto free_dev;
1713
1714         irq_type = irq_get_trigger_type(spi->irq);
1715         if (!irq_type)
1716                 irq_type = IRQF_TRIGGER_RISING;
1717
1718         rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr,
1719                               IRQF_SHARED | irq_type, dev_name(&spi->dev), lp);
1720         if (rc)
1721                 goto free_dev;
1722
1723         rc = ieee802154_register_hw(lp->hw);
1724         if (rc)
1725                 goto free_dev;
1726
1727         return rc;
1728
1729 free_dev:
1730         ieee802154_free_hw(lp->hw);
1731
1732         return rc;
1733 }
1734
1735 static int at86rf230_remove(struct spi_device *spi)
1736 {
1737         struct at86rf230_local *lp = spi_get_drvdata(spi);
1738
1739         /* mask all at86rf230 irq's */
1740         at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1741         ieee802154_unregister_hw(lp->hw);
1742         ieee802154_free_hw(lp->hw);
1743         dev_dbg(&spi->dev, "unregistered at86rf230\n");
1744
1745         return 0;
1746 }
1747
1748 static const struct of_device_id at86rf230_of_match[] = {
1749         { .compatible = "atmel,at86rf230", },
1750         { .compatible = "atmel,at86rf231", },
1751         { .compatible = "atmel,at86rf233", },
1752         { .compatible = "atmel,at86rf212", },
1753         { },
1754 };
1755 MODULE_DEVICE_TABLE(of, at86rf230_of_match);
1756
1757 static const struct spi_device_id at86rf230_device_id[] = {
1758         { .name = "at86rf230", },
1759         { .name = "at86rf231", },
1760         { .name = "at86rf233", },
1761         { .name = "at86rf212", },
1762         { },
1763 };
1764 MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
1765
1766 static struct spi_driver at86rf230_driver = {
1767         .id_table = at86rf230_device_id,
1768         .driver = {
1769                 .of_match_table = of_match_ptr(at86rf230_of_match),
1770                 .name   = "at86rf230",
1771                 .owner  = THIS_MODULE,
1772         },
1773         .probe      = at86rf230_probe,
1774         .remove     = at86rf230_remove,
1775 };
1776
1777 module_spi_driver(at86rf230_driver);
1778
1779 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1780 MODULE_LICENSE("GPL v2");