1 /*********************************************************************
5 * Description: Driver for the NSC PC'108 and PC'338 IrDA chipsets
7 * Author: Dag Brattli <dagb@cs.uit.no>
8 * Created at: Sat Nov 7 21:43:15 1998
9 * Modified at: Wed Mar 1 11:29:34 2000
10 * Modified by: Dag Brattli <dagb@cs.uit.no>
12 * Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
13 * Copyright (c) 1998 Lichen Wang, <lwang@actisys.com>
14 * Copyright (c) 1998 Actisys Corp., www.actisys.com
15 * Copyright (c) 2000-2004 Jean Tourrilhes <jt@hpl.hp.com>
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
23 * Neither Dag Brattli nor University of Tromsø admit liability nor
24 * provide warranty for any of this software. This material is
25 * provided "AS-IS" and at no charge.
27 * Notice that all functions that needs to access the chip in _any_
28 * way, must save BSR register on entry, and restore it on exit.
29 * It is _very_ important to follow this policy!
33 * bank = inb(iobase+BSR);
35 * do_your_stuff_here();
37 * outb(bank, iobase+BSR);
39 * If you find bugs in this file, its very likely that the same bug
40 * will also be in w83977af_ir.c since the implementations are quite
43 ********************************************************************/
45 #include <linux/module.h>
47 #include <linux/kernel.h>
48 #include <linux/types.h>
49 #include <linux/skbuff.h>
50 #include <linux/netdevice.h>
51 #include <linux/ioport.h>
52 #include <linux/delay.h>
53 #include <linux/slab.h>
54 #include <linux/init.h>
55 #include <linux/rtnetlink.h>
56 #include <linux/dma-mapping.h>
57 #include <linux/pnp.h>
61 #include <asm/byteorder.h>
64 #include <linux/pm_legacy.h>
66 #include <net/irda/wrapper.h>
67 #include <net/irda/irda.h>
68 #include <net/irda/irda_device.h>
72 #define CHIP_IO_EXTENT 8
73 #define BROKEN_DONGLE_ID
75 static char *driver_name = "nsc-ircc";
77 /* Module parameters */
78 static int qos_mtt_bits = 0x07; /* 1 ms or more */
81 /* Use BIOS settions by default, but user may supply module parameters */
82 static unsigned int io[] = { ~0, ~0, ~0, ~0 };
83 static unsigned int irq[] = { 0, 0, 0, 0 };
84 static unsigned int dma[] = { 0, 0, 0, 0 };
86 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info);
87 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info);
88 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info);
89 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
90 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
91 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info);
92 static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id);
94 /* These are the known NSC chips */
95 static nsc_chip_t chips[] = {
96 /* Name, {cfg registers}, chip id index reg, chip id expected value, revision mask */
97 { "PC87108", { 0x150, 0x398, 0xea }, 0x05, 0x10, 0xf0,
98 nsc_ircc_probe_108, nsc_ircc_init_108 },
99 { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8,
100 nsc_ircc_probe_338, nsc_ircc_init_338 },
101 /* Contributed by Steffen Pingel - IBM X40 */
102 { "PC8738x", { 0x164e, 0x4e, 0x0 }, 0x20, 0xf4, 0xff,
103 nsc_ircc_probe_39x, nsc_ircc_init_39x },
104 /* Contributed by Jan Frey - IBM A30/A31 */
105 { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff,
106 nsc_ircc_probe_39x, nsc_ircc_init_39x },
110 static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL };
112 static char *dongle_types[] = {
113 "Differential serial interface",
114 "Differential serial interface",
119 "Single-ended serial interface",
121 "HP HSDL-2300, HP HSDL-3600/HSDL-3610",
122 "IBM31T1100 or Temic TFDS6000/TFDS6500",
125 "HP HSDL-1100/HSDL-2100",
126 "HP HSDL-1100/HSDL-2100",
127 "Supports SIR Mode only",
128 "No dongle connected",
132 static chipio_t pnp_info;
133 static const struct pnp_device_id nsc_ircc_pnp_table[] = {
134 { .id = "NSC6001", .driver_data = 0 },
135 { .id = "IBM0071", .driver_data = 0 },
139 MODULE_DEVICE_TABLE(pnp, nsc_ircc_pnp_table);
141 static struct pnp_driver nsc_ircc_pnp_driver = {
143 .id_table = nsc_ircc_pnp_table,
144 .probe = nsc_ircc_pnp_probe,
147 /* Some prototypes */
148 static int nsc_ircc_open(chipio_t *info);
149 static int nsc_ircc_close(struct nsc_ircc_cb *self);
150 static int nsc_ircc_setup(chipio_t *info);
151 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self);
152 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self);
153 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
154 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
155 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
156 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
157 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
158 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 baud);
159 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self);
160 static int nsc_ircc_read_dongle_id (int iobase);
161 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
163 static int nsc_ircc_net_open(struct net_device *dev);
164 static int nsc_ircc_net_close(struct net_device *dev);
165 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
166 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev);
167 static int nsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data);
170 static int pnp_registered;
171 static int pnp_succeeded;
174 * Function nsc_ircc_init ()
176 * Initialize chip. Just try to find out how many chips we are dealing with
179 static int __init nsc_ircc_init(void)
189 /* Register with PnP subsystem to detect disable ports */
190 ret = pnp_register_driver(&nsc_ircc_pnp_driver);
197 /* Probe for all the NSC chipsets we know about */
198 for (chip = chips; chip->name ; chip++) {
199 IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __FUNCTION__,
202 /* Try all config registers for this chip */
203 for (cfg = 0; cfg < ARRAY_SIZE(chip->cfg); cfg++) {
204 cfg_base = chip->cfg[cfg];
208 /* Read index register */
211 IRDA_DEBUG(2, "%s() no chip at 0x%03x\n", __FUNCTION__, cfg_base);
215 /* Read chip identification register */
216 outb(chip->cid_index, cfg_base);
217 id = inb(cfg_base+1);
218 if ((id & chip->cid_mask) == chip->cid_value) {
219 IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n",
220 __FUNCTION__, chip->name, id & ~chip->cid_mask);
223 * If we found a correct PnP setting,
227 memset(&info, 0, sizeof(chipio_t));
228 info.cfg_base = cfg_base;
229 info.fir_base = pnp_info.fir_base;
230 info.dma = pnp_info.dma;
231 info.irq = pnp_info.irq;
233 if (info.fir_base < 0x2000) {
234 IRDA_MESSAGE("%s, chip->init\n", driver_name);
235 chip->init(chip, &info);
237 chip->probe(chip, &info);
239 if (nsc_ircc_open(&info) >= 0)
244 * Opening based on PnP values failed.
245 * Let's fallback to user values, or probe
249 IRDA_DEBUG(2, "%s, PnP init failed\n", driver_name);
250 memset(&info, 0, sizeof(chipio_t));
251 info.cfg_base = cfg_base;
252 info.fir_base = io[i];
257 * If the user supplies the base address, then
258 * we init the chip, if not we probe the values
261 if (io[i] < 0x2000) {
262 chip->init(chip, &info);
264 chip->probe(chip, &info);
266 if (nsc_ircc_open(&info) >= 0)
271 IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __FUNCTION__, id);
277 pnp_unregister_driver(&nsc_ircc_pnp_driver);
285 * Function nsc_ircc_cleanup ()
287 * Close all configured chips
290 static void __exit nsc_ircc_cleanup(void)
294 pm_unregister_all(nsc_ircc_pmproc);
296 for (i = 0; i < ARRAY_SIZE(dev_self); i++) {
298 nsc_ircc_close(dev_self[i]);
302 pnp_unregister_driver(&nsc_ircc_pnp_driver);
308 * Function nsc_ircc_open (iobase, irq)
310 * Open driver instance
313 static int __init nsc_ircc_open(chipio_t *info)
315 struct net_device *dev;
316 struct nsc_ircc_cb *self;
317 struct pm_dev *pmdev;
321 IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
324 for (chip_index = 0; chip_index < ARRAY_SIZE(dev_self); chip_index++) {
325 if (!dev_self[chip_index])
329 if (chip_index == ARRAY_SIZE(dev_self)) {
330 IRDA_ERROR("%s(), maximum number of supported chips reached!\n", __FUNCTION__);
334 IRDA_MESSAGE("%s, Found chip at base=0x%03x\n", driver_name,
337 if ((nsc_ircc_setup(info)) == -1)
340 IRDA_MESSAGE("%s, driver loaded (Dag Brattli)\n", driver_name);
342 dev = alloc_irdadev(sizeof(struct nsc_ircc_cb));
344 IRDA_ERROR("%s(), can't allocate memory for "
345 "control block!\n", __FUNCTION__);
351 spin_lock_init(&self->lock);
353 /* Need to store self somewhere */
354 dev_self[chip_index] = self;
355 self->index = chip_index;
358 self->io.cfg_base = info->cfg_base;
359 self->io.fir_base = info->fir_base;
360 self->io.irq = info->irq;
361 self->io.fir_ext = CHIP_IO_EXTENT;
362 self->io.dma = info->dma;
363 self->io.fifo_size = 32;
365 /* Reserve the ioports that we need */
366 ret = request_region(self->io.fir_base, self->io.fir_ext, driver_name);
368 IRDA_WARNING("%s(), can't get iobase of 0x%03x\n",
369 __FUNCTION__, self->io.fir_base);
374 /* Initialize QoS for this device */
375 irda_init_max_qos_capabilies(&self->qos);
377 /* The only value we must override it the baudrate */
378 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
379 IR_115200|IR_576000|IR_1152000 |(IR_4000000 << 8);
381 self->qos.min_turn_time.bits = qos_mtt_bits;
382 irda_qos_bits_to_value(&self->qos);
384 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
385 self->rx_buff.truesize = 14384;
386 self->tx_buff.truesize = 14384;
388 /* Allocate memory if needed */
390 dma_alloc_coherent(NULL, self->rx_buff.truesize,
391 &self->rx_buff_dma, GFP_KERNEL);
392 if (self->rx_buff.head == NULL) {
397 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
400 dma_alloc_coherent(NULL, self->tx_buff.truesize,
401 &self->tx_buff_dma, GFP_KERNEL);
402 if (self->tx_buff.head == NULL) {
406 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
408 self->rx_buff.in_frame = FALSE;
409 self->rx_buff.state = OUTSIDE_FRAME;
410 self->tx_buff.data = self->tx_buff.head;
411 self->rx_buff.data = self->rx_buff.head;
413 /* Reset Tx queue info */
414 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
415 self->tx_fifo.tail = self->tx_buff.head;
417 /* Override the network functions we need to use */
418 SET_MODULE_OWNER(dev);
419 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
420 dev->open = nsc_ircc_net_open;
421 dev->stop = nsc_ircc_net_close;
422 dev->do_ioctl = nsc_ircc_net_ioctl;
423 dev->get_stats = nsc_ircc_net_get_stats;
425 err = register_netdev(dev);
427 IRDA_ERROR("%s(), register_netdev() failed!\n", __FUNCTION__);
430 IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name);
432 /* Check if user has supplied a valid dongle id or not */
433 if ((dongle_id <= 0) ||
434 (dongle_id >= ARRAY_SIZE(dongle_types))) {
435 dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
437 IRDA_MESSAGE("%s, Found dongle: %s\n", driver_name,
438 dongle_types[dongle_id]);
440 IRDA_MESSAGE("%s, Using dongle: %s\n", driver_name,
441 dongle_types[dongle_id]);
444 self->io.dongle_id = dongle_id;
445 nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id);
447 pmdev = pm_register(PM_SYS_DEV, PM_SYS_IRDA, nsc_ircc_pmproc);
453 dma_free_coherent(NULL, self->tx_buff.truesize,
454 self->tx_buff.head, self->tx_buff_dma);
456 dma_free_coherent(NULL, self->rx_buff.truesize,
457 self->rx_buff.head, self->rx_buff_dma);
459 release_region(self->io.fir_base, self->io.fir_ext);
462 dev_self[chip_index] = NULL;
467 * Function nsc_ircc_close (self)
469 * Close driver instance
472 static int __exit nsc_ircc_close(struct nsc_ircc_cb *self)
476 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
478 IRDA_ASSERT(self != NULL, return -1;);
480 iobase = self->io.fir_base;
482 /* Remove netdevice */
483 unregister_netdev(self->netdev);
485 /* Release the PORT that this driver is using */
486 IRDA_DEBUG(4, "%s(), Releasing Region %03x\n",
487 __FUNCTION__, self->io.fir_base);
488 release_region(self->io.fir_base, self->io.fir_ext);
490 if (self->tx_buff.head)
491 dma_free_coherent(NULL, self->tx_buff.truesize,
492 self->tx_buff.head, self->tx_buff_dma);
494 if (self->rx_buff.head)
495 dma_free_coherent(NULL, self->rx_buff.truesize,
496 self->rx_buff.head, self->rx_buff_dma);
498 dev_self[self->index] = NULL;
499 free_netdev(self->netdev);
505 * Function nsc_ircc_init_108 (iobase, cfg_base, irq, dma)
507 * Initialize the NSC '108 chip
510 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info)
512 int cfg_base = info->cfg_base;
515 outb(2, cfg_base); /* Mode Control Register (MCTL) */
516 outb(0x00, cfg_base+1); /* Disable device */
518 /* Base Address and Interrupt Control Register (BAIC) */
519 outb(CFG_108_BAIC, cfg_base);
520 switch (info->fir_base) {
521 case 0x3e8: outb(0x14, cfg_base+1); break;
522 case 0x2e8: outb(0x15, cfg_base+1); break;
523 case 0x3f8: outb(0x16, cfg_base+1); break;
524 case 0x2f8: outb(0x17, cfg_base+1); break;
525 default: IRDA_ERROR("%s(), invalid base_address", __FUNCTION__);
528 /* Control Signal Routing Register (CSRT) */
530 case 3: temp = 0x01; break;
531 case 4: temp = 0x02; break;
532 case 5: temp = 0x03; break;
533 case 7: temp = 0x04; break;
534 case 9: temp = 0x05; break;
535 case 11: temp = 0x06; break;
536 case 15: temp = 0x07; break;
537 default: IRDA_ERROR("%s(), invalid irq", __FUNCTION__);
539 outb(CFG_108_CSRT, cfg_base);
542 case 0: outb(0x08+temp, cfg_base+1); break;
543 case 1: outb(0x10+temp, cfg_base+1); break;
544 case 3: outb(0x18+temp, cfg_base+1); break;
545 default: IRDA_ERROR("%s(), invalid dma", __FUNCTION__);
548 outb(CFG_108_MCTL, cfg_base); /* Mode Control Register (MCTL) */
549 outb(0x03, cfg_base+1); /* Enable device */
555 * Function nsc_ircc_probe_108 (chip, info)
560 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info)
562 int cfg_base = info->cfg_base;
565 /* Read address and interrupt control register (BAIC) */
566 outb(CFG_108_BAIC, cfg_base);
567 reg = inb(cfg_base+1);
569 switch (reg & 0x03) {
571 info->fir_base = 0x3e8;
574 info->fir_base = 0x2e8;
577 info->fir_base = 0x3f8;
580 info->fir_base = 0x2f8;
583 info->sir_base = info->fir_base;
584 IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __FUNCTION__,
587 /* Read control signals routing register (CSRT) */
588 outb(CFG_108_CSRT, cfg_base);
589 reg = inb(cfg_base+1);
591 switch (reg & 0x07) {
617 IRDA_DEBUG(2, "%s(), probing irq=%d\n", __FUNCTION__, info->irq);
619 /* Currently we only read Rx DMA but it will also be used for Tx */
620 switch ((reg >> 3) & 0x03) {
634 IRDA_DEBUG(2, "%s(), probing dma=%d\n", __FUNCTION__, info->dma);
636 /* Read mode control register (MCTL) */
637 outb(CFG_108_MCTL, cfg_base);
638 reg = inb(cfg_base+1);
640 info->enabled = reg & 0x01;
641 info->suspended = !((reg >> 1) & 0x01);
647 * Function nsc_ircc_init_338 (chip, info)
649 * Initialize the NSC '338 chip. Remember that the 87338 needs two
650 * consecutive writes to the data registers while CPU interrupts are
651 * disabled. The 97338 does not require this, but shouldn't be any
652 * harm if we do it anyway.
654 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info)
662 * Function nsc_ircc_probe_338 (chip, info)
667 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info)
669 int cfg_base = info->cfg_base;
673 /* Read funtion enable register (FER) */
674 outb(CFG_338_FER, cfg_base);
675 reg = inb(cfg_base+1);
677 info->enabled = (reg >> 2) & 0x01;
679 /* Check if we are in Legacy or PnP mode */
680 outb(CFG_338_PNP0, cfg_base);
681 reg = inb(cfg_base+1);
683 pnp = (reg >> 3) & 0x01;
685 IRDA_DEBUG(2, "(), Chip is in PnP mode\n");
686 outb(0x46, cfg_base);
687 reg = (inb(cfg_base+1) & 0xfe) << 2;
689 outb(0x47, cfg_base);
690 reg |= ((inb(cfg_base+1) & 0xfc) << 8);
692 info->fir_base = reg;
694 /* Read function address register (FAR) */
695 outb(CFG_338_FAR, cfg_base);
696 reg = inb(cfg_base+1);
698 switch ((reg >> 4) & 0x03) {
700 info->fir_base = 0x3f8;
703 info->fir_base = 0x2f8;
714 switch ((reg >> 6) & 0x03) {
717 info->fir_base = 0x3e8;
719 info->fir_base = 0x2e8;
723 info->fir_base = 0x338;
725 info->fir_base = 0x238;
729 info->fir_base = 0x2e8;
731 info->fir_base = 0x2e0;
735 info->fir_base = 0x220;
737 info->fir_base = 0x228;
742 info->sir_base = info->fir_base;
744 /* Read PnP register 1 (PNP1) */
745 outb(CFG_338_PNP1, cfg_base);
746 reg = inb(cfg_base+1);
748 info->irq = reg >> 4;
750 /* Read PnP register 3 (PNP3) */
751 outb(CFG_338_PNP3, cfg_base);
752 reg = inb(cfg_base+1);
754 info->dma = (reg & 0x07) - 1;
756 /* Read power and test register (PTR) */
757 outb(CFG_338_PTR, cfg_base);
758 reg = inb(cfg_base+1);
760 info->suspended = reg & 0x01;
767 * Function nsc_ircc_init_39x (chip, info)
769 * Now that we know it's a '39x (see probe below), we need to
770 * configure it so we can use it.
772 * The NSC '338 chip is a Super I/O chip with a "bank" architecture,
773 * the configuration of the different functionality (serial, parallel,
774 * floppy...) are each in a different bank (Logical Device Number).
775 * The base address, irq and dma configuration registers are common
776 * to all functionalities (index 0x30 to 0x7F).
777 * There is only one configuration register specific to the
778 * serial port, CFG_39X_SPC.
781 * Note : this code was written by Jan Frey <janfrey@web.de>
783 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info)
785 int cfg_base = info->cfg_base;
788 /* User is shure about his config... accept it. */
789 IRDA_DEBUG(2, "%s(): nsc_ircc_init_39x (user settings): "
790 "io=0x%04x, irq=%d, dma=%d\n",
791 __FUNCTION__, info->fir_base, info->irq, info->dma);
793 /* Access bank for SP2 */
794 outb(CFG_39X_LDN, cfg_base);
795 outb(0x02, cfg_base+1);
799 /* We want to enable the device if not enabled */
800 outb(CFG_39X_ACT, cfg_base);
801 enabled = inb(cfg_base+1) & 0x01;
804 /* Enable the device */
805 outb(CFG_39X_SIOCF1, cfg_base);
806 outb(0x01, cfg_base+1);
807 /* May want to update info->enabled. Jean II */
810 /* Enable UART bank switching (bit 7) ; Sets the chip to normal
811 * power mode (wake up from sleep mode) (bit 1) */
812 outb(CFG_39X_SPC, cfg_base);
813 outb(0x82, cfg_base+1);
819 * Function nsc_ircc_probe_39x (chip, info)
821 * Test if we really have a '39x chip at the given address
823 * Note : this code was written by Jan Frey <janfrey@web.de>
825 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info)
827 int cfg_base = info->cfg_base;
828 int reg1, reg2, irq, irqt, dma1, dma2;
831 IRDA_DEBUG(2, "%s(), nsc_ircc_probe_39x, base=%d\n",
832 __FUNCTION__, cfg_base);
834 /* This function should be executed with irq off to avoid
835 * another driver messing with the Super I/O bank - Jean II */
837 /* Access bank for SP2 */
838 outb(CFG_39X_LDN, cfg_base);
839 outb(0x02, cfg_base+1);
841 /* Read infos about SP2 ; store in info struct */
842 outb(CFG_39X_BASEH, cfg_base);
843 reg1 = inb(cfg_base+1);
844 outb(CFG_39X_BASEL, cfg_base);
845 reg2 = inb(cfg_base+1);
846 info->fir_base = (reg1 << 8) | reg2;
848 outb(CFG_39X_IRQNUM, cfg_base);
849 irq = inb(cfg_base+1);
850 outb(CFG_39X_IRQSEL, cfg_base);
851 irqt = inb(cfg_base+1);
854 outb(CFG_39X_DMA0, cfg_base);
855 dma1 = inb(cfg_base+1);
856 outb(CFG_39X_DMA1, cfg_base);
857 dma2 = inb(cfg_base+1);
860 outb(CFG_39X_ACT, cfg_base);
861 info->enabled = enabled = inb(cfg_base+1) & 0x01;
863 outb(CFG_39X_SPC, cfg_base);
864 susp = 1 - ((inb(cfg_base+1) & 0x02) >> 1);
866 IRDA_DEBUG(2, "%s(): io=0x%02x%02x, irq=%d (type %d), rxdma=%d, txdma=%d, enabled=%d (suspended=%d)\n", __FUNCTION__, reg1,reg2,irq,irqt,dma1,dma2,enabled,susp);
870 /* We want to enable the device if not enabled */
871 outb(CFG_39X_ACT, cfg_base);
872 enabled = inb(cfg_base+1) & 0x01;
875 /* Enable the device */
876 outb(CFG_39X_SIOCF1, cfg_base);
877 outb(0x01, cfg_base+1);
878 /* May want to update info->enabled. Jean II */
881 /* Enable UART bank switching (bit 7) ; Sets the chip to normal
882 * power mode (wake up from sleep mode) (bit 1) */
883 outb(CFG_39X_SPC, cfg_base);
884 outb(0x82, cfg_base+1);
890 static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id)
892 memset(&pnp_info, 0, sizeof(chipio_t));
897 /* There don't seem to be any way to get the cfg_base.
898 * On my box, cfg_base is in the PnP descriptor of the
899 * motherboard. Oh well... Jean II */
901 if (pnp_port_valid(dev, 0) &&
902 !(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED))
903 pnp_info.fir_base = pnp_port_start(dev, 0);
905 if (pnp_irq_valid(dev, 0) &&
906 !(pnp_irq_flags(dev, 0) & IORESOURCE_DISABLED))
907 pnp_info.irq = pnp_irq(dev, 0);
909 if (pnp_dma_valid(dev, 0) &&
910 !(pnp_dma_flags(dev, 0) & IORESOURCE_DISABLED))
911 pnp_info.dma = pnp_dma(dev, 0);
913 IRDA_DEBUG(0, "%s() : From PnP, found firbase 0x%03X ; irq %d ; dma %d.\n",
914 __FUNCTION__, pnp_info.fir_base, pnp_info.irq, pnp_info.dma);
916 if((pnp_info.fir_base == 0) ||
917 (pnp_info.irq == -1) || (pnp_info.dma == -1)) {
918 /* Returning an error will disable the device. Yuck ! */
927 * Function nsc_ircc_setup (info)
929 * Returns non-negative on success.
932 static int nsc_ircc_setup(chipio_t *info)
935 int iobase = info->fir_base;
937 /* Read the Module ID */
938 switch_bank(iobase, BANK3);
939 version = inb(iobase+MID);
941 IRDA_DEBUG(2, "%s() Driver %s Found chip version %02x\n",
942 __FUNCTION__, driver_name, version);
945 if (0x20 != (version & 0xf0)) {
946 IRDA_ERROR("%s, Wrong chip version %02x\n",
947 driver_name, version);
951 /* Switch to advanced mode */
952 switch_bank(iobase, BANK2);
953 outb(ECR1_EXT_SL, iobase+ECR1);
954 switch_bank(iobase, BANK0);
956 /* Set FIFO threshold to TX17, RX16, reset and enable FIFO's */
957 switch_bank(iobase, BANK0);
958 outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
960 outb(0x03, iobase+LCR); /* 8 bit word length */
961 outb(MCR_SIR, iobase+MCR); /* Start at SIR-mode, also clears LSR*/
963 /* Set FIFO size to 32 */
964 switch_bank(iobase, BANK2);
965 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
967 /* IRCR2: FEND_MD is not set */
968 switch_bank(iobase, BANK5);
969 outb(0x02, iobase+4);
971 /* Make sure that some defaults are OK */
972 switch_bank(iobase, BANK6);
973 outb(0x20, iobase+0); /* Set 32 bits FIR CRC */
974 outb(0x0a, iobase+1); /* Set MIR pulse width */
975 outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */
976 outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */
978 /* Enable receive interrupts */
979 switch_bank(iobase, BANK0);
980 outb(IER_RXHDL_IE, iobase+IER);
986 * Function nsc_ircc_read_dongle_id (void)
988 * Try to read dongle indentification. This procedure needs to be executed
989 * once after power-on/reset. It also needs to be used whenever you suspect
990 * that the user may have plugged/unplugged the IrDA Dongle.
992 static int nsc_ircc_read_dongle_id (int iobase)
997 bank = inb(iobase+BSR);
1000 switch_bank(iobase, BANK7);
1002 /* IRCFG4: IRSL0_DS and IRSL21_DS are cleared */
1003 outb(0x00, iobase+7);
1005 /* ID0, 1, and 2 are pulled up/down very slowly */
1008 /* IRCFG1: read the ID bits */
1009 dongle_id = inb(iobase+4) & 0x0f;
1011 #ifdef BROKEN_DONGLE_ID
1012 if (dongle_id == 0x0a)
1015 /* Go back to bank 0 before returning */
1016 switch_bank(iobase, BANK0);
1018 outb(bank, iobase+BSR);
1024 * Function nsc_ircc_init_dongle_interface (iobase, dongle_id)
1026 * This function initializes the dongle for the transceiver that is
1027 * used. This procedure needs to be executed once after
1028 * power-on/reset. It also needs to be used whenever you suspect that
1029 * the dongle is changed.
1031 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id)
1035 /* Save current bank */
1036 bank = inb(iobase+BSR);
1039 switch_bank(iobase, BANK7);
1041 /* IRCFG4: set according to dongle_id */
1042 switch (dongle_id) {
1043 case 0x00: /* same as */
1044 case 0x01: /* Differential serial interface */
1045 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1046 __FUNCTION__, dongle_types[dongle_id]);
1048 case 0x02: /* same as */
1049 case 0x03: /* Reserved */
1050 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1051 __FUNCTION__, dongle_types[dongle_id]);
1053 case 0x04: /* Sharp RY5HD01 */
1055 case 0x05: /* Reserved, but this is what the Thinkpad reports */
1056 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1057 __FUNCTION__, dongle_types[dongle_id]);
1059 case 0x06: /* Single-ended serial interface */
1060 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1061 __FUNCTION__, dongle_types[dongle_id]);
1063 case 0x07: /* Consumer-IR only */
1064 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1065 __FUNCTION__, dongle_types[dongle_id]);
1067 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1068 IRDA_DEBUG(0, "%s(), %s\n",
1069 __FUNCTION__, dongle_types[dongle_id]);
1071 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1072 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1074 case 0x0A: /* same as */
1075 case 0x0B: /* Reserved */
1076 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1077 __FUNCTION__, dongle_types[dongle_id]);
1079 case 0x0C: /* same as */
1080 case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1082 * Set irsl0 as input, irsl[1-2] as output, and separate
1083 * inputs are used for SIR and MIR/FIR
1085 outb(0x48, iobase+7);
1087 case 0x0E: /* Supports SIR Mode only */
1088 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1090 case 0x0F: /* No dongle connected */
1091 IRDA_DEBUG(0, "%s(), %s\n",
1092 __FUNCTION__, dongle_types[dongle_id]);
1094 switch_bank(iobase, BANK0);
1095 outb(0x62, iobase+MCR);
1098 IRDA_DEBUG(0, "%s(), invalid dongle_id %#x",
1099 __FUNCTION__, dongle_id);
1102 /* IRCFG1: IRSL1 and 2 are set to IrDA mode */
1103 outb(0x00, iobase+4);
1105 /* Restore bank register */
1106 outb(bank, iobase+BSR);
1108 } /* set_up_dongle_interface */
1111 * Function nsc_ircc_change_dongle_speed (iobase, speed, dongle_id)
1113 * Change speed of the attach dongle
1116 static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id)
1120 /* Save current bank */
1121 bank = inb(iobase+BSR);
1124 switch_bank(iobase, BANK7);
1126 /* IRCFG1: set according to dongle_id */
1127 switch (dongle_id) {
1128 case 0x00: /* same as */
1129 case 0x01: /* Differential serial interface */
1130 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1131 __FUNCTION__, dongle_types[dongle_id]);
1133 case 0x02: /* same as */
1134 case 0x03: /* Reserved */
1135 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1136 __FUNCTION__, dongle_types[dongle_id]);
1138 case 0x04: /* Sharp RY5HD01 */
1140 case 0x05: /* Reserved */
1141 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1142 __FUNCTION__, dongle_types[dongle_id]);
1144 case 0x06: /* Single-ended serial interface */
1145 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1146 __FUNCTION__, dongle_types[dongle_id]);
1148 case 0x07: /* Consumer-IR only */
1149 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1150 __FUNCTION__, dongle_types[dongle_id]);
1152 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1153 IRDA_DEBUG(0, "%s(), %s\n",
1154 __FUNCTION__, dongle_types[dongle_id]);
1155 outb(0x00, iobase+4);
1157 outb(0x01, iobase+4);
1159 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1160 outb(0x01, iobase+4);
1162 if (speed == 4000000) {
1163 /* There was a cli() there, but we now are already
1164 * under spin_lock_irqsave() - JeanII */
1165 outb(0x81, iobase+4);
1166 outb(0x80, iobase+4);
1168 outb(0x00, iobase+4);
1170 case 0x0A: /* same as */
1171 case 0x0B: /* Reserved */
1172 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1173 __FUNCTION__, dongle_types[dongle_id]);
1175 case 0x0C: /* same as */
1176 case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1178 case 0x0E: /* Supports SIR Mode only */
1180 case 0x0F: /* No dongle connected */
1181 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1182 __FUNCTION__, dongle_types[dongle_id]);
1184 switch_bank(iobase, BANK0);
1185 outb(0x62, iobase+MCR);
1188 IRDA_DEBUG(0, "%s(), invalid data_rate\n", __FUNCTION__);
1190 /* Restore bank register */
1191 outb(bank, iobase+BSR);
1195 * Function nsc_ircc_change_speed (self, baud)
1197 * Change the speed of the device
1199 * This function *must* be called with irq off and spin-lock.
1201 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed)
1203 struct net_device *dev = self->netdev;
1207 __u8 ier; /* Interrupt enable register */
1209 IRDA_DEBUG(2, "%s(), speed=%d\n", __FUNCTION__, speed);
1211 IRDA_ASSERT(self != NULL, return 0;);
1213 iobase = self->io.fir_base;
1215 /* Update accounting for new speed */
1216 self->io.speed = speed;
1218 /* Save current bank */
1219 bank = inb(iobase+BSR);
1221 /* Disable interrupts */
1222 switch_bank(iobase, BANK0);
1223 outb(0, iobase+IER);
1226 switch_bank(iobase, BANK2);
1228 outb(0x00, iobase+BGDH);
1230 case 9600: outb(0x0c, iobase+BGDL); break;
1231 case 19200: outb(0x06, iobase+BGDL); break;
1232 case 38400: outb(0x03, iobase+BGDL); break;
1233 case 57600: outb(0x02, iobase+BGDL); break;
1234 case 115200: outb(0x01, iobase+BGDL); break;
1236 switch_bank(iobase, BANK5);
1238 /* IRCR2: MDRS is set */
1239 outb(inb(iobase+4) | 0x04, iobase+4);
1242 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__);
1246 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __FUNCTION__);
1250 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __FUNCTION__);
1254 IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n",
1255 __FUNCTION__, speed);
1259 /* Set appropriate speed mode */
1260 switch_bank(iobase, BANK0);
1261 outb(mcr | MCR_TX_DFR, iobase+MCR);
1263 /* Give some hits to the transceiver */
1264 nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
1266 /* Set FIFO threshold to TX17, RX16 */
1267 switch_bank(iobase, BANK0);
1268 outb(0x00, iobase+FCR);
1269 outb(FCR_FIFO_EN, iobase+FCR);
1270 outb(FCR_RXTH| /* Set Rx FIFO threshold */
1271 FCR_TXTH| /* Set Tx FIFO threshold */
1272 FCR_TXSR| /* Reset Tx FIFO */
1273 FCR_RXSR| /* Reset Rx FIFO */
1274 FCR_FIFO_EN, /* Enable FIFOs */
1277 /* Set FIFO size to 32 */
1278 switch_bank(iobase, BANK2);
1279 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1281 /* Enable some interrupts so we can receive frames */
1282 switch_bank(iobase, BANK0);
1283 if (speed > 115200) {
1284 /* Install FIR xmit handler */
1285 dev->hard_start_xmit = nsc_ircc_hard_xmit_fir;
1287 nsc_ircc_dma_receive(self);
1289 /* Install SIR xmit handler */
1290 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
1293 /* Set our current interrupt mask */
1294 outb(ier, iobase+IER);
1297 outb(bank, iobase+BSR);
1299 /* Make sure interrupt handlers keep the proper interrupt mask */
1304 * Function nsc_ircc_hard_xmit (skb, dev)
1306 * Transmit the frame!
1309 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
1311 struct nsc_ircc_cb *self;
1312 unsigned long flags;
1317 self = (struct nsc_ircc_cb *) dev->priv;
1319 IRDA_ASSERT(self != NULL, return 0;);
1321 iobase = self->io.fir_base;
1323 netif_stop_queue(dev);
1325 /* Make sure tests *& speed change are atomic */
1326 spin_lock_irqsave(&self->lock, flags);
1328 /* Check if we need to change the speed */
1329 speed = irda_get_next_speed(skb);
1330 if ((speed != self->io.speed) && (speed != -1)) {
1331 /* Check for empty frame. */
1333 /* If we just sent a frame, we get called before
1334 * the last bytes get out (because of the SIR FIFO).
1335 * If this is the case, let interrupt handler change
1336 * the speed itself... Jean II */
1337 if (self->io.direction == IO_RECV) {
1338 nsc_ircc_change_speed(self, speed);
1339 /* TODO : For SIR->SIR, the next packet
1340 * may get corrupted - Jean II */
1341 netif_wake_queue(dev);
1343 self->new_speed = speed;
1344 /* Queue will be restarted after speed change
1345 * to make sure packets gets through the
1346 * proper xmit handler - Jean II */
1348 dev->trans_start = jiffies;
1349 spin_unlock_irqrestore(&self->lock, flags);
1353 self->new_speed = speed;
1356 /* Save current bank */
1357 bank = inb(iobase+BSR);
1359 self->tx_buff.data = self->tx_buff.head;
1361 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
1362 self->tx_buff.truesize);
1364 self->stats.tx_bytes += self->tx_buff.len;
1366 /* Add interrupt on tx low level (will fire immediately) */
1367 switch_bank(iobase, BANK0);
1368 outb(IER_TXLDL_IE, iobase+IER);
1370 /* Restore bank register */
1371 outb(bank, iobase+BSR);
1373 dev->trans_start = jiffies;
1374 spin_unlock_irqrestore(&self->lock, flags);
1381 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1383 struct nsc_ircc_cb *self;
1384 unsigned long flags;
1390 self = (struct nsc_ircc_cb *) dev->priv;
1391 iobase = self->io.fir_base;
1393 netif_stop_queue(dev);
1395 /* Make sure tests *& speed change are atomic */
1396 spin_lock_irqsave(&self->lock, flags);
1398 /* Check if we need to change the speed */
1399 speed = irda_get_next_speed(skb);
1400 if ((speed != self->io.speed) && (speed != -1)) {
1401 /* Check for empty frame. */
1403 /* If we are currently transmitting, defer to
1404 * interrupt handler. - Jean II */
1405 if(self->tx_fifo.len == 0) {
1406 nsc_ircc_change_speed(self, speed);
1407 netif_wake_queue(dev);
1409 self->new_speed = speed;
1410 /* Keep queue stopped :
1411 * the speed change operation may change the
1412 * xmit handler, and we want to make sure
1413 * the next packet get through the proper
1414 * Tx path, so block the Tx queue until
1415 * the speed change has been done.
1418 dev->trans_start = jiffies;
1419 spin_unlock_irqrestore(&self->lock, flags);
1423 /* Change speed after current frame */
1424 self->new_speed = speed;
1428 /* Save current bank */
1429 bank = inb(iobase+BSR);
1431 /* Register and copy this frame to DMA memory */
1432 self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1433 self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1434 self->tx_fifo.tail += skb->len;
1436 self->stats.tx_bytes += skb->len;
1438 memcpy(self->tx_fifo.queue[self->tx_fifo.free].start, skb->data,
1441 self->tx_fifo.len++;
1442 self->tx_fifo.free++;
1444 /* Start transmit only if there is currently no transmit going on */
1445 if (self->tx_fifo.len == 1) {
1446 /* Check if we must wait the min turn time or not */
1447 mtt = irda_get_mtt(skb);
1449 /* Check how much time we have used already */
1450 do_gettimeofday(&self->now);
1451 diff = self->now.tv_usec - self->stamp.tv_usec;
1455 /* Check if the mtt is larger than the time we have
1456 * already used by all the protocol processing
1462 * Use timer if delay larger than 125 us, and
1463 * use udelay for smaller values which should
1467 /* Adjust for timer resolution */
1471 switch_bank(iobase, BANK4);
1472 outb(mtt & 0xff, iobase+TMRL);
1473 outb((mtt >> 8) & 0x0f, iobase+TMRH);
1476 outb(IRCR1_TMR_EN, iobase+IRCR1);
1477 self->io.direction = IO_XMIT;
1479 /* Enable timer interrupt */
1480 switch_bank(iobase, BANK0);
1481 outb(IER_TMR_IE, iobase+IER);
1483 /* Timer will take care of the rest */
1489 /* Enable DMA interrupt */
1490 switch_bank(iobase, BANK0);
1491 outb(IER_DMA_IE, iobase+IER);
1493 /* Transmit frame */
1494 nsc_ircc_dma_xmit(self, iobase);
1497 /* Not busy transmitting anymore if window is not full,
1498 * and if we don't need to change speed */
1499 if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0))
1500 netif_wake_queue(self->netdev);
1502 /* Restore bank register */
1503 outb(bank, iobase+BSR);
1505 dev->trans_start = jiffies;
1506 spin_unlock_irqrestore(&self->lock, flags);
1513 * Function nsc_ircc_dma_xmit (self, iobase)
1515 * Transmit data using DMA
1518 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase)
1522 /* Save current bank */
1523 bsr = inb(iobase+BSR);
1526 switch_bank(iobase, BANK0);
1527 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1529 self->io.direction = IO_XMIT;
1531 /* Choose transmit DMA channel */
1532 switch_bank(iobase, BANK2);
1533 outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1535 irda_setup_dma(self->io.dma,
1536 ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
1537 self->tx_buff.head) + self->tx_buff_dma,
1538 self->tx_fifo.queue[self->tx_fifo.ptr].len,
1541 /* Enable DMA and SIR interaction pulse */
1542 switch_bank(iobase, BANK0);
1543 outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR);
1545 /* Restore bank register */
1546 outb(bsr, iobase+BSR);
1550 * Function nsc_ircc_pio_xmit (self, iobase)
1552 * Transmit data using PIO. Returns the number of bytes that actually
1556 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
1561 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
1563 /* Save current bank */
1564 bank = inb(iobase+BSR);
1566 switch_bank(iobase, BANK0);
1567 if (!(inb_p(iobase+LSR) & LSR_TXEMP)) {
1568 IRDA_DEBUG(4, "%s(), warning, FIFO not empty yet!\n",
1571 /* FIFO may still be filled to the Tx interrupt threshold */
1575 /* Fill FIFO with current frame */
1576 while ((fifo_size-- > 0) && (actual < len)) {
1577 /* Transmit next byte */
1578 outb(buf[actual++], iobase+TXD);
1581 IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n",
1582 __FUNCTION__, fifo_size, actual, len);
1585 outb(bank, iobase+BSR);
1591 * Function nsc_ircc_dma_xmit_complete (self)
1593 * The transfer of a frame in finished. This function will only be called
1594 * by the interrupt handler
1597 static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self)
1603 IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
1605 iobase = self->io.fir_base;
1607 /* Save current bank */
1608 bank = inb(iobase+BSR);
1611 switch_bank(iobase, BANK0);
1612 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1614 /* Check for underrrun! */
1615 if (inb(iobase+ASCR) & ASCR_TXUR) {
1616 self->stats.tx_errors++;
1617 self->stats.tx_fifo_errors++;
1619 /* Clear bit, by writing 1 into it */
1620 outb(ASCR_TXUR, iobase+ASCR);
1622 self->stats.tx_packets++;
1625 /* Finished with this frame, so prepare for next */
1626 self->tx_fifo.ptr++;
1627 self->tx_fifo.len--;
1629 /* Any frames to be sent back-to-back? */
1630 if (self->tx_fifo.len) {
1631 nsc_ircc_dma_xmit(self, iobase);
1633 /* Not finished yet! */
1636 /* Reset Tx FIFO info */
1637 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1638 self->tx_fifo.tail = self->tx_buff.head;
1641 /* Make sure we have room for more frames and
1642 * that we don't need to change speed */
1643 if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0)) {
1644 /* Not busy transmitting anymore */
1645 /* Tell the network layer, that we can accept more frames */
1646 netif_wake_queue(self->netdev);
1650 outb(bank, iobase+BSR);
1656 * Function nsc_ircc_dma_receive (self)
1658 * Get ready for receiving a frame. The device will initiate a DMA
1659 * if it starts to receive a frame.
1662 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self)
1667 iobase = self->io.fir_base;
1669 /* Reset Tx FIFO info */
1670 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1671 self->tx_fifo.tail = self->tx_buff.head;
1673 /* Save current bank */
1674 bsr = inb(iobase+BSR);
1677 switch_bank(iobase, BANK0);
1678 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1680 /* Choose DMA Rx, DMA Fairness, and Advanced mode */
1681 switch_bank(iobase, BANK2);
1682 outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1684 self->io.direction = IO_RECV;
1685 self->rx_buff.data = self->rx_buff.head;
1687 /* Reset Rx FIFO. This will also flush the ST_FIFO */
1688 switch_bank(iobase, BANK0);
1689 outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1691 self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1692 self->st_fifo.tail = self->st_fifo.head = 0;
1694 irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1698 switch_bank(iobase, BANK0);
1699 outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR);
1701 /* Restore bank register */
1702 outb(bsr, iobase+BSR);
1708 * Function nsc_ircc_dma_receive_complete (self)
1710 * Finished with receiving frames
1714 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase)
1716 struct st_fifo *st_fifo;
1717 struct sk_buff *skb;
1722 st_fifo = &self->st_fifo;
1724 /* Save current bank */
1725 bank = inb(iobase+BSR);
1727 /* Read all entries in status FIFO */
1728 switch_bank(iobase, BANK5);
1729 while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) {
1730 /* We must empty the status FIFO no matter what */
1731 len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8);
1733 if (st_fifo->tail >= MAX_RX_WINDOW) {
1734 IRDA_DEBUG(0, "%s(), window is full!\n", __FUNCTION__);
1738 st_fifo->entries[st_fifo->tail].status = status;
1739 st_fifo->entries[st_fifo->tail].len = len;
1740 st_fifo->pending_bytes += len;
1744 /* Try to process all entries in status FIFO */
1745 while (st_fifo->len > 0) {
1746 /* Get first entry */
1747 status = st_fifo->entries[st_fifo->head].status;
1748 len = st_fifo->entries[st_fifo->head].len;
1749 st_fifo->pending_bytes -= len;
1753 /* Check for errors */
1754 if (status & FRM_ST_ERR_MSK) {
1755 if (status & FRM_ST_LOST_FR) {
1756 /* Add number of lost frames to stats */
1757 self->stats.rx_errors += len;
1760 self->stats.rx_errors++;
1762 self->rx_buff.data += len;
1764 if (status & FRM_ST_MAX_LEN)
1765 self->stats.rx_length_errors++;
1767 if (status & FRM_ST_PHY_ERR)
1768 self->stats.rx_frame_errors++;
1770 if (status & FRM_ST_BAD_CRC)
1771 self->stats.rx_crc_errors++;
1773 /* The errors below can be reported in both cases */
1774 if (status & FRM_ST_OVR1)
1775 self->stats.rx_fifo_errors++;
1777 if (status & FRM_ST_OVR2)
1778 self->stats.rx_fifo_errors++;
1781 * First we must make sure that the frame we
1782 * want to deliver is all in main memory. If we
1783 * cannot tell, then we check if the Rx FIFO is
1784 * empty. If not then we will have to take a nap
1785 * and try again later.
1787 if (st_fifo->pending_bytes < self->io.fifo_size) {
1788 switch_bank(iobase, BANK0);
1789 if (inb(iobase+LSR) & LSR_RXDA) {
1790 /* Put this entry back in fifo */
1793 st_fifo->pending_bytes += len;
1794 st_fifo->entries[st_fifo->head].status = status;
1795 st_fifo->entries[st_fifo->head].len = len;
1797 * DMA not finished yet, so try again
1798 * later, set timer value, resolution
1801 switch_bank(iobase, BANK4);
1802 outb(0x02, iobase+TMRL); /* x 125 us */
1803 outb(0x00, iobase+TMRH);
1806 outb(IRCR1_TMR_EN, iobase+IRCR1);
1808 /* Restore bank register */
1809 outb(bank, iobase+BSR);
1811 return FALSE; /* I'll be back! */
1816 * Remember the time we received this frame, so we can
1817 * reduce the min turn time a bit since we will know
1818 * how much time we have used for protocol processing
1820 do_gettimeofday(&self->stamp);
1822 skb = dev_alloc_skb(len+1);
1824 IRDA_WARNING("%s(), memory squeeze, "
1825 "dropping frame.\n",
1827 self->stats.rx_dropped++;
1829 /* Restore bank register */
1830 outb(bank, iobase+BSR);
1835 /* Make sure IP header gets aligned */
1836 skb_reserve(skb, 1);
1838 /* Copy frame without CRC */
1839 if (self->io.speed < 4000000) {
1840 skb_put(skb, len-2);
1841 memcpy(skb->data, self->rx_buff.data, len-2);
1843 skb_put(skb, len-4);
1844 memcpy(skb->data, self->rx_buff.data, len-4);
1847 /* Move to next frame */
1848 self->rx_buff.data += len;
1849 self->stats.rx_bytes += len;
1850 self->stats.rx_packets++;
1852 skb->dev = self->netdev;
1853 skb->mac.raw = skb->data;
1854 skb->protocol = htons(ETH_P_IRDA);
1856 self->netdev->last_rx = jiffies;
1859 /* Restore bank register */
1860 outb(bank, iobase+BSR);
1866 * Function nsc_ircc_pio_receive (self)
1868 * Receive all data in receiver FIFO
1871 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self)
1876 iobase = self->io.fir_base;
1878 /* Receive all characters in Rx FIFO */
1880 byte = inb(iobase+RXD);
1881 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
1883 } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */
1887 * Function nsc_ircc_sir_interrupt (self, eir)
1889 * Handle SIR interrupt
1892 static void nsc_ircc_sir_interrupt(struct nsc_ircc_cb *self, int eir)
1896 /* Check if transmit FIFO is low on data */
1897 if (eir & EIR_TXLDL_EV) {
1898 /* Write data left in transmit buffer */
1899 actual = nsc_ircc_pio_write(self->io.fir_base,
1902 self->io.fifo_size);
1903 self->tx_buff.data += actual;
1904 self->tx_buff.len -= actual;
1906 self->io.direction = IO_XMIT;
1908 /* Check if finished */
1909 if (self->tx_buff.len > 0)
1910 self->ier = IER_TXLDL_IE;
1913 self->stats.tx_packets++;
1914 netif_wake_queue(self->netdev);
1915 self->ier = IER_TXEMP_IE;
1919 /* Check if transmission has completed */
1920 if (eir & EIR_TXEMP_EV) {
1921 /* Turn around and get ready to receive some data */
1922 self->io.direction = IO_RECV;
1923 self->ier = IER_RXHDL_IE;
1924 /* Check if we need to change the speed?
1925 * Need to be after self->io.direction to avoid race with
1926 * nsc_ircc_hard_xmit_sir() - Jean II */
1927 if (self->new_speed) {
1928 IRDA_DEBUG(2, "%s(), Changing speed!\n", __FUNCTION__);
1929 self->ier = nsc_ircc_change_speed(self,
1931 self->new_speed = 0;
1932 netif_wake_queue(self->netdev);
1934 /* Check if we are going to FIR */
1935 if (self->io.speed > 115200) {
1936 /* No need to do anymore SIR stuff */
1942 /* Rx FIFO threshold or timeout */
1943 if (eir & EIR_RXHDL_EV) {
1944 nsc_ircc_pio_receive(self);
1946 /* Keep receiving */
1947 self->ier = IER_RXHDL_IE;
1952 * Function nsc_ircc_fir_interrupt (self, eir)
1954 * Handle MIR/FIR interrupt
1957 static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase,
1962 bank = inb(iobase+BSR);
1964 /* Status FIFO event*/
1965 if (eir & EIR_SFIF_EV) {
1966 /* Check if DMA has finished */
1967 if (nsc_ircc_dma_receive_complete(self, iobase)) {
1968 /* Wait for next status FIFO interrupt */
1969 self->ier = IER_SFIF_IE;
1971 self->ier = IER_SFIF_IE | IER_TMR_IE;
1973 } else if (eir & EIR_TMR_EV) { /* Timer finished */
1975 switch_bank(iobase, BANK4);
1976 outb(0, iobase+IRCR1);
1978 /* Clear timer event */
1979 switch_bank(iobase, BANK0);
1980 outb(ASCR_CTE, iobase+ASCR);
1982 /* Check if this is a Tx timer interrupt */
1983 if (self->io.direction == IO_XMIT) {
1984 nsc_ircc_dma_xmit(self, iobase);
1986 /* Interrupt on DMA */
1987 self->ier = IER_DMA_IE;
1989 /* Check (again) if DMA has finished */
1990 if (nsc_ircc_dma_receive_complete(self, iobase)) {
1991 self->ier = IER_SFIF_IE;
1993 self->ier = IER_SFIF_IE | IER_TMR_IE;
1996 } else if (eir & EIR_DMA_EV) {
1997 /* Finished with all transmissions? */
1998 if (nsc_ircc_dma_xmit_complete(self)) {
1999 if(self->new_speed != 0) {
2000 /* As we stop the Tx queue, the speed change
2001 * need to be done when the Tx fifo is
2002 * empty. Ask for a Tx done interrupt */
2003 self->ier = IER_TXEMP_IE;
2005 /* Check if there are more frames to be
2007 if (irda_device_txqueue_empty(self->netdev)) {
2008 /* Prepare for receive */
2009 nsc_ircc_dma_receive(self);
2010 self->ier = IER_SFIF_IE;
2012 IRDA_WARNING("%s(), potential "
2013 "Tx queue lockup !\n",
2017 /* Not finished yet, so interrupt on DMA again */
2018 self->ier = IER_DMA_IE;
2020 } else if (eir & EIR_TXEMP_EV) {
2021 /* The Tx FIFO has totally drained out, so now we can change
2022 * the speed... - Jean II */
2023 self->ier = nsc_ircc_change_speed(self, self->new_speed);
2024 self->new_speed = 0;
2025 netif_wake_queue(self->netdev);
2026 /* Note : nsc_ircc_change_speed() restarted Rx fifo */
2029 outb(bank, iobase+BSR);
2033 * Function nsc_ircc_interrupt (irq, dev_id, regs)
2035 * An interrupt from the chip has arrived. Time to do some work
2038 static irqreturn_t nsc_ircc_interrupt(int irq, void *dev_id,
2039 struct pt_regs *regs)
2041 struct net_device *dev = (struct net_device *) dev_id;
2042 struct nsc_ircc_cb *self;
2047 IRDA_WARNING("%s: irq %d for unknown device.\n",
2051 self = (struct nsc_ircc_cb *) dev->priv;
2053 spin_lock(&self->lock);
2055 iobase = self->io.fir_base;
2057 bsr = inb(iobase+BSR); /* Save current bank */
2059 switch_bank(iobase, BANK0);
2060 self->ier = inb(iobase+IER);
2061 eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */
2063 outb(0, iobase+IER); /* Disable interrupts */
2066 /* Dispatch interrupt handler for the current speed */
2067 if (self->io.speed > 115200)
2068 nsc_ircc_fir_interrupt(self, iobase, eir);
2070 nsc_ircc_sir_interrupt(self, eir);
2073 outb(self->ier, iobase+IER); /* Restore interrupts */
2074 outb(bsr, iobase+BSR); /* Restore bank register */
2076 spin_unlock(&self->lock);
2077 return IRQ_RETVAL(eir);
2081 * Function nsc_ircc_is_receiving (self)
2083 * Return TRUE is we are currently receiving a frame
2086 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self)
2088 unsigned long flags;
2093 IRDA_ASSERT(self != NULL, return FALSE;);
2095 spin_lock_irqsave(&self->lock, flags);
2097 if (self->io.speed > 115200) {
2098 iobase = self->io.fir_base;
2100 /* Check if rx FIFO is not empty */
2101 bank = inb(iobase+BSR);
2102 switch_bank(iobase, BANK2);
2103 if ((inb(iobase+RXFLV) & 0x3f) != 0) {
2104 /* We are receiving something */
2107 outb(bank, iobase+BSR);
2109 status = (self->rx_buff.state != OUTSIDE_FRAME);
2111 spin_unlock_irqrestore(&self->lock, flags);
2117 * Function nsc_ircc_net_open (dev)
2122 static int nsc_ircc_net_open(struct net_device *dev)
2124 struct nsc_ircc_cb *self;
2129 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
2131 IRDA_ASSERT(dev != NULL, return -1;);
2132 self = (struct nsc_ircc_cb *) dev->priv;
2134 IRDA_ASSERT(self != NULL, return 0;);
2136 iobase = self->io.fir_base;
2138 if (request_irq(self->io.irq, nsc_ircc_interrupt, 0, dev->name, dev)) {
2139 IRDA_WARNING("%s, unable to allocate irq=%d\n",
2140 driver_name, self->io.irq);
2144 * Always allocate the DMA channel after the IRQ, and clean up on
2147 if (request_dma(self->io.dma, dev->name)) {
2148 IRDA_WARNING("%s, unable to allocate dma=%d\n",
2149 driver_name, self->io.dma);
2150 free_irq(self->io.irq, dev);
2154 /* Save current bank */
2155 bank = inb(iobase+BSR);
2157 /* turn on interrupts */
2158 switch_bank(iobase, BANK0);
2159 outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER);
2161 /* Restore bank register */
2162 outb(bank, iobase+BSR);
2164 /* Ready to play! */
2165 netif_start_queue(dev);
2167 /* Give self a hardware name */
2168 sprintf(hwname, "NSC-FIR @ 0x%03x", self->io.fir_base);
2171 * Open new IrLAP layer instance, now that everything should be
2172 * initialized properly
2174 self->irlap = irlap_open(dev, &self->qos, hwname);
2180 * Function nsc_ircc_net_close (dev)
2185 static int nsc_ircc_net_close(struct net_device *dev)
2187 struct nsc_ircc_cb *self;
2191 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
2193 IRDA_ASSERT(dev != NULL, return -1;);
2195 self = (struct nsc_ircc_cb *) dev->priv;
2196 IRDA_ASSERT(self != NULL, return 0;);
2199 netif_stop_queue(dev);
2201 /* Stop and remove instance of IrLAP */
2203 irlap_close(self->irlap);
2206 iobase = self->io.fir_base;
2208 disable_dma(self->io.dma);
2210 /* Save current bank */
2211 bank = inb(iobase+BSR);
2213 /* Disable interrupts */
2214 switch_bank(iobase, BANK0);
2215 outb(0, iobase+IER);
2217 free_irq(self->io.irq, dev);
2218 free_dma(self->io.dma);
2220 /* Restore bank register */
2221 outb(bank, iobase+BSR);
2227 * Function nsc_ircc_net_ioctl (dev, rq, cmd)
2229 * Process IOCTL commands for this device
2232 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2234 struct if_irda_req *irq = (struct if_irda_req *) rq;
2235 struct nsc_ircc_cb *self;
2236 unsigned long flags;
2239 IRDA_ASSERT(dev != NULL, return -1;);
2243 IRDA_ASSERT(self != NULL, return -1;);
2245 IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd);
2248 case SIOCSBANDWIDTH: /* Set bandwidth */
2249 if (!capable(CAP_NET_ADMIN)) {
2253 spin_lock_irqsave(&self->lock, flags);
2254 nsc_ircc_change_speed(self, irq->ifr_baudrate);
2255 spin_unlock_irqrestore(&self->lock, flags);
2257 case SIOCSMEDIABUSY: /* Set media busy */
2258 if (!capable(CAP_NET_ADMIN)) {
2262 irda_device_set_media_busy(self->netdev, TRUE);
2264 case SIOCGRECEIVING: /* Check if we are receiving right now */
2265 /* This is already protected */
2266 irq->ifr_receiving = nsc_ircc_is_receiving(self);
2274 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev)
2276 struct nsc_ircc_cb *self = (struct nsc_ircc_cb *) dev->priv;
2278 return &self->stats;
2281 static void nsc_ircc_suspend(struct nsc_ircc_cb *self)
2283 IRDA_MESSAGE("%s, Suspending\n", driver_name);
2285 if (self->io.suspended)
2288 nsc_ircc_net_close(self->netdev);
2290 self->io.suspended = 1;
2293 static void nsc_ircc_wakeup(struct nsc_ircc_cb *self)
2295 if (!self->io.suspended)
2298 nsc_ircc_setup(&self->io);
2299 nsc_ircc_net_open(self->netdev);
2301 IRDA_MESSAGE("%s, Waking up\n", driver_name);
2303 self->io.suspended = 0;
2306 static int nsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data)
2308 struct nsc_ircc_cb *self = (struct nsc_ircc_cb*) dev->data;
2312 nsc_ircc_suspend(self);
2315 nsc_ircc_wakeup(self);
2322 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
2323 MODULE_DESCRIPTION("NSC IrDA Device Driver");
2324 MODULE_LICENSE("GPL");
2327 module_param(qos_mtt_bits, int, 0);
2328 MODULE_PARM_DESC(qos_mtt_bits, "Minimum Turn Time");
2329 module_param_array(io, int, NULL, 0);
2330 MODULE_PARM_DESC(io, "Base I/O addresses");
2331 module_param_array(irq, int, NULL, 0);
2332 MODULE_PARM_DESC(irq, "IRQ lines");
2333 module_param_array(dma, int, NULL, 0);
2334 MODULE_PARM_DESC(dma, "DMA channels");
2335 module_param(dongle_id, int, 0);
2336 MODULE_PARM_DESC(dongle_id, "Type-id of used dongle");
2338 module_init(nsc_ircc_init);
2339 module_exit(nsc_ircc_cleanup);