2 * Copyright (C) 2006-2007 PA Semi, Inc
4 * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/pci.h>
23 #include <linux/interrupt.h>
24 #include <linux/dmaengine.h>
25 #include <linux/delay.h>
26 #include <linux/netdevice.h>
27 #include <linux/etherdevice.h>
28 #include <asm/dma-mapping.h>
30 #include <linux/skbuff.h>
33 #include <linux/tcp.h>
34 #include <net/checksum.h>
38 #include "pasemi_mac.h"
40 /* We have our own align, since ppc64 in general has it at 0 because
41 * of design flaws in some of the server bridge chips. However, for
42 * PWRficient doing the unaligned copies is more expensive than doing
43 * unaligned DMA, so make sure the data is aligned instead.
45 #define LOCAL_SKB_ALIGN 2
56 /* Must be a power of two */
57 #define RX_RING_SIZE 4096
58 #define TX_RING_SIZE 4096
60 #define DEFAULT_MSG_ENABLE \
70 #define TX_RING(mac, num) ((mac)->tx->ring[(num) & (TX_RING_SIZE-1)])
71 #define TX_RING_INFO(mac, num) ((mac)->tx->ring_info[(num) & (TX_RING_SIZE-1)])
72 #define RX_RING(mac, num) ((mac)->rx->ring[(num) & (RX_RING_SIZE-1)])
73 #define RX_RING_INFO(mac, num) ((mac)->rx->ring_info[(num) & (RX_RING_SIZE-1)])
74 #define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
76 #define RING_USED(ring) (((ring)->next_to_fill - (ring)->next_to_clean) \
78 #define RING_AVAIL(ring) ((ring->size) - RING_USED(ring))
80 #define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
82 MODULE_LICENSE("GPL");
83 MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
84 MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
86 static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
87 module_param(debug, int, 0);
88 MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
90 static struct pasdma_status *dma_status;
92 static void write_iob_reg(struct pasemi_mac *mac, unsigned int reg,
95 out_le32(mac->iob_regs+reg, val);
98 static unsigned int read_mac_reg(struct pasemi_mac *mac, unsigned int reg)
100 return in_le32(mac->regs+reg);
103 static void write_mac_reg(struct pasemi_mac *mac, unsigned int reg,
106 out_le32(mac->regs+reg, val);
109 static unsigned int read_dma_reg(struct pasemi_mac *mac, unsigned int reg)
111 return in_le32(mac->dma_regs+reg);
114 static void write_dma_reg(struct pasemi_mac *mac, unsigned int reg,
117 out_le32(mac->dma_regs+reg, val);
120 static int pasemi_get_mac_addr(struct pasemi_mac *mac)
122 struct pci_dev *pdev = mac->pdev;
123 struct device_node *dn = pci_device_to_OF_node(pdev);
130 "No device node for mac, not configuring\n");
134 maddr = of_get_property(dn, "local-mac-address", &len);
136 if (maddr && len == 6) {
137 memcpy(mac->mac_addr, maddr, 6);
141 /* Some old versions of firmware mistakenly uses mac-address
142 * (and as a string) instead of a byte array in local-mac-address.
146 maddr = of_get_property(dn, "mac-address", NULL);
150 "no mac address in device tree, not configuring\n");
155 if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
156 &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
158 "can't parse mac address, not configuring\n");
162 memcpy(mac->mac_addr, addr, 6);
167 static int pasemi_mac_unmap_tx_skb(struct pasemi_mac *mac,
172 int nfrags = skb_shinfo(skb)->nr_frags;
174 pci_unmap_single(mac->dma_pdev, dmas[0], skb_headlen(skb),
177 for (f = 0; f < nfrags; f++) {
178 skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
180 pci_unmap_page(mac->dma_pdev, dmas[f+1], frag->size,
183 dev_kfree_skb_irq(skb);
185 /* Freed descriptor slot + main SKB ptr + nfrags additional ptrs,
186 * aligned up to a power of 2
188 return (nfrags + 3) & ~1;
191 static int pasemi_mac_setup_rx_resources(struct net_device *dev)
193 struct pasemi_mac_rxring *ring;
194 struct pasemi_mac *mac = netdev_priv(dev);
195 int chan_id = mac->dma_rxch;
197 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
202 spin_lock_init(&ring->lock);
204 ring->size = RX_RING_SIZE;
205 ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
206 RX_RING_SIZE, GFP_KERNEL);
208 if (!ring->ring_info)
211 /* Allocate descriptors */
212 ring->ring = dma_alloc_coherent(&mac->dma_pdev->dev,
213 RX_RING_SIZE * sizeof(u64),
214 &ring->dma, GFP_KERNEL);
219 memset(ring->ring, 0, RX_RING_SIZE * sizeof(u64));
221 ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
222 RX_RING_SIZE * sizeof(u64),
223 &ring->buf_dma, GFP_KERNEL);
227 memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
229 write_dma_reg(mac, PAS_DMA_RXCHAN_BASEL(chan_id), PAS_DMA_RXCHAN_BASEL_BRBL(ring->dma));
231 write_dma_reg(mac, PAS_DMA_RXCHAN_BASEU(chan_id),
232 PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
233 PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 3));
235 write_dma_reg(mac, PAS_DMA_RXCHAN_CFG(chan_id),
236 PAS_DMA_RXCHAN_CFG_HBU(2));
238 write_dma_reg(mac, PAS_DMA_RXINT_BASEL(mac->dma_if),
239 PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers)));
241 write_dma_reg(mac, PAS_DMA_RXINT_BASEU(mac->dma_if),
242 PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) |
243 PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
245 write_dma_reg(mac, PAS_DMA_RXINT_CFG(mac->dma_if),
246 PAS_DMA_RXINT_CFG_DHL(3) | PAS_DMA_RXINT_CFG_L2 |
247 PAS_DMA_RXINT_CFG_LW | PAS_DMA_RXINT_CFG_RBP |
248 PAS_DMA_RXINT_CFG_HEN);
250 ring->next_to_fill = 0;
251 ring->next_to_clean = 0;
253 snprintf(ring->irq_name, sizeof(ring->irq_name),
260 dma_free_coherent(&mac->dma_pdev->dev,
261 RX_RING_SIZE * sizeof(u64),
262 mac->rx->ring, mac->rx->dma);
264 kfree(ring->ring_info);
272 static int pasemi_mac_setup_tx_resources(struct net_device *dev)
274 struct pasemi_mac *mac = netdev_priv(dev);
276 int chan_id = mac->dma_txch;
277 struct pasemi_mac_txring *ring;
279 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
283 spin_lock_init(&ring->lock);
285 ring->size = TX_RING_SIZE;
286 ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
287 TX_RING_SIZE, GFP_KERNEL);
288 if (!ring->ring_info)
291 /* Allocate descriptors */
292 ring->ring = dma_alloc_coherent(&mac->dma_pdev->dev,
293 TX_RING_SIZE * sizeof(u64),
294 &ring->dma, GFP_KERNEL);
298 memset(ring->ring, 0, TX_RING_SIZE * sizeof(u64));
300 write_dma_reg(mac, PAS_DMA_TXCHAN_BASEL(chan_id),
301 PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
302 val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
303 val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 3);
305 write_dma_reg(mac, PAS_DMA_TXCHAN_BASEU(chan_id), val);
307 write_dma_reg(mac, PAS_DMA_TXCHAN_CFG(chan_id),
308 PAS_DMA_TXCHAN_CFG_TY_IFACE |
309 PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
310 PAS_DMA_TXCHAN_CFG_UP |
311 PAS_DMA_TXCHAN_CFG_WT(2));
313 ring->next_to_fill = 0;
314 ring->next_to_clean = 0;
316 snprintf(ring->irq_name, sizeof(ring->irq_name),
323 kfree(ring->ring_info);
330 static void pasemi_mac_free_tx_resources(struct net_device *dev)
332 struct pasemi_mac *mac = netdev_priv(dev);
334 struct pasemi_mac_buffer *info;
335 dma_addr_t dmas[MAX_SKB_FRAGS+1];
339 start = mac->tx->next_to_clean;
340 limit = mac->tx->next_to_fill;
342 /* Compensate for when fill has wrapped and clean has not */
344 limit += TX_RING_SIZE;
346 for (i = start; i < limit; i += freed) {
347 info = &TX_RING_INFO(mac, i+1);
348 if (info->dma && info->skb) {
349 for (j = 0; j <= skb_shinfo(info->skb)->nr_frags; j++)
350 dmas[j] = TX_RING_INFO(mac, i+1+j).dma;
351 freed = pasemi_mac_unmap_tx_skb(mac, info->skb, dmas);
356 for (i = 0; i < TX_RING_SIZE; i++)
359 dma_free_coherent(&mac->dma_pdev->dev,
360 TX_RING_SIZE * sizeof(u64),
361 mac->tx->ring, mac->tx->dma);
363 kfree(mac->tx->ring_info);
368 static void pasemi_mac_free_rx_resources(struct net_device *dev)
370 struct pasemi_mac *mac = netdev_priv(dev);
372 struct pasemi_mac_buffer *info;
374 for (i = 0; i < RX_RING_SIZE; i++) {
375 info = &RX_RING_INFO(mac, i);
376 if (info->skb && info->dma) {
377 pci_unmap_single(mac->dma_pdev,
381 dev_kfree_skb_any(info->skb);
387 for (i = 0; i < RX_RING_SIZE; i++)
390 dma_free_coherent(&mac->dma_pdev->dev,
391 RX_RING_SIZE * sizeof(u64),
392 mac->rx->ring, mac->rx->dma);
394 dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
395 mac->rx->buffers, mac->rx->buf_dma);
397 kfree(mac->rx->ring_info);
402 static void pasemi_mac_replenish_rx_ring(struct net_device *dev, int limit)
404 struct pasemi_mac *mac = netdev_priv(dev);
410 fill = mac->rx->next_to_fill;
411 for (count = 0; count < limit; count++) {
412 struct pasemi_mac_buffer *info = &RX_RING_INFO(mac, fill);
413 u64 *buff = &RX_BUFF(mac, fill);
420 /* skb might still be in there for recycle on short receives */
424 skb = dev_alloc_skb(BUF_SIZE);
425 skb_reserve(skb, LOCAL_SKB_ALIGN);
431 dma = pci_map_single(mac->dma_pdev, skb->data,
432 BUF_SIZE - LOCAL_SKB_ALIGN,
435 if (unlikely(dma_mapping_error(dma))) {
436 dev_kfree_skb_irq(info->skb);
442 *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
448 write_dma_reg(mac, PAS_DMA_RXINT_INCR(mac->dma_if), count);
450 mac->rx->next_to_fill = (mac->rx->next_to_fill + count) &
454 static void pasemi_mac_restart_rx_intr(struct pasemi_mac *mac)
456 unsigned int reg, pcnt;
457 /* Re-enable packet count interrupts: finally
458 * ack the packet count interrupt we got in rx_intr.
461 pcnt = *mac->rx_status & PAS_STATUS_PCNT_M;
463 reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
465 write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
468 static void pasemi_mac_restart_tx_intr(struct pasemi_mac *mac)
470 unsigned int reg, pcnt;
472 /* Re-enable packet count interrupts */
473 pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
475 reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
477 write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
481 static inline void pasemi_mac_rx_error(struct pasemi_mac *mac, u64 macrx)
483 unsigned int rcmdsta, ccmdsta;
485 if (!netif_msg_rx_err(mac))
488 rcmdsta = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
489 ccmdsta = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
491 printk(KERN_ERR "pasemi_mac: rx error. macrx %016lx, rx status %lx\n",
492 macrx, *mac->rx_status);
494 printk(KERN_ERR "pasemi_mac: rcmdsta %08x ccmdsta %08x\n",
498 static inline void pasemi_mac_tx_error(struct pasemi_mac *mac, u64 mactx)
502 if (!netif_msg_tx_err(mac))
505 cmdsta = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
507 printk(KERN_ERR "pasemi_mac: tx error. mactx 0x%016lx, "\
508 "tx status 0x%016lx\n", mactx, *mac->tx_status);
510 printk(KERN_ERR "pasemi_mac: tcmdsta 0x%08x\n", cmdsta);
513 static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
517 struct pasemi_mac_buffer *info;
525 spin_lock(&mac->rx->lock);
527 n = mac->rx->next_to_clean;
529 prefetch(RX_RING(mac, n));
531 for (count = 0; count < limit; count++) {
532 macrx = RX_RING(mac, n);
534 if ((macrx & XCT_MACRX_E) ||
535 (*mac->rx_status & PAS_STATUS_ERROR))
536 pasemi_mac_rx_error(mac, macrx);
538 if (!(macrx & XCT_MACRX_O))
543 BUG_ON(!(macrx & XCT_MACRX_RR_8BRES));
545 eval = (RX_RING(mac, n+1) & XCT_RXRES_8B_EVAL_M) >>
549 dma = (RX_RING(mac, n+2) & XCT_PTR_ADDR_M);
550 info = &RX_RING_INFO(mac, buf_index);
555 prefetch(&skb->data_len);
557 len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
560 struct sk_buff *new_skb;
562 new_skb = netdev_alloc_skb(mac->netdev,
563 len + LOCAL_SKB_ALIGN);
565 skb_reserve(new_skb, LOCAL_SKB_ALIGN);
566 memcpy(new_skb->data, skb->data, len);
567 /* save the skb in buffer_info as good */
570 /* else just continue with the old one */
574 pci_unmap_single(mac->dma_pdev, dma, len, PCI_DMA_FROMDEVICE);
580 if (likely((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK)) {
581 skb->ip_summed = CHECKSUM_UNNECESSARY;
582 skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
585 skb->ip_summed = CHECKSUM_NONE;
587 mac->netdev->stats.rx_bytes += len;
588 mac->netdev->stats.rx_packets++;
590 skb->protocol = eth_type_trans(skb, mac->netdev);
591 netif_receive_skb(skb);
594 RX_RING(mac, n+1) = 0;
596 /* Need to zero it out since hardware doesn't, since the
597 * replenish loop uses it to tell when it's done.
599 RX_BUFF(mac, buf_index) = 0;
604 if (n > RX_RING_SIZE) {
605 /* Errata 5971 workaround: L2 target of headers */
606 write_iob_reg(mac, PAS_IOB_COM_PKTHDRCNT, 0);
607 n &= (RX_RING_SIZE-1);
610 mac->rx->next_to_clean = n;
612 /* Increase is in number of 16-byte entries, and since each descriptor
613 * with an 8BRES takes up 3x8 bytes (padded to 4x8), increase with
616 write_dma_reg(mac, PAS_DMA_RXCHAN_INCR(mac->dma_rxch), count << 1);
618 pasemi_mac_replenish_rx_ring(mac->netdev, count);
620 spin_unlock(&mac->rx->lock);
625 /* Can't make this too large or we blow the kernel stack limits */
626 #define TX_CLEAN_BATCHSIZE (128/MAX_SKB_FRAGS)
628 static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
631 unsigned int start, descr_count, buf_count, batch_limit;
632 unsigned int ring_limit;
633 unsigned int total_count;
635 struct sk_buff *skbs[TX_CLEAN_BATCHSIZE];
636 dma_addr_t dmas[TX_CLEAN_BATCHSIZE][MAX_SKB_FRAGS+1];
639 batch_limit = TX_CLEAN_BATCHSIZE;
641 spin_lock_irqsave(&mac->tx->lock, flags);
643 start = mac->tx->next_to_clean;
644 ring_limit = mac->tx->next_to_fill;
646 /* Compensate for when fill has wrapped but clean has not */
647 if (start > ring_limit)
648 ring_limit += TX_RING_SIZE;
654 descr_count < batch_limit && i < ring_limit;
656 u64 mactx = TX_RING(mac, i);
659 if ((mactx & XCT_MACTX_E) ||
660 (*mac->tx_status & PAS_STATUS_ERROR))
661 pasemi_mac_tx_error(mac, mactx);
663 if (unlikely(mactx & XCT_MACTX_O))
664 /* Not yet transmitted */
667 skb = TX_RING_INFO(mac, i+1).skb;
668 skbs[descr_count] = skb;
670 buf_count = 2 + skb_shinfo(skb)->nr_frags;
671 for (j = 0; j <= skb_shinfo(skb)->nr_frags; j++)
672 dmas[descr_count][j] = TX_RING_INFO(mac, i+1+j).dma;
675 TX_RING(mac, i+1) = 0;
677 /* Since we always fill with an even number of entries, make
678 * sure we skip any unused one at the end as well.
684 mac->tx->next_to_clean = i & (TX_RING_SIZE-1);
686 spin_unlock_irqrestore(&mac->tx->lock, flags);
687 netif_wake_queue(mac->netdev);
689 for (i = 0; i < descr_count; i++)
690 pasemi_mac_unmap_tx_skb(mac, skbs[i], dmas[i]);
692 total_count += descr_count;
694 /* If the batch was full, try to clean more */
695 if (descr_count == batch_limit)
702 static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
704 struct net_device *dev = data;
705 struct pasemi_mac *mac = netdev_priv(dev);
708 if (!(*mac->rx_status & PAS_STATUS_CAUSE_M))
711 /* Don't reset packet count so it won't fire again but clear
716 if (*mac->rx_status & PAS_STATUS_SOFT)
717 reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
718 if (*mac->rx_status & PAS_STATUS_ERROR)
719 reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
720 if (*mac->rx_status & PAS_STATUS_TIMER)
721 reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
723 netif_rx_schedule(dev, &mac->napi);
725 write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
730 static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
732 struct net_device *dev = data;
733 struct pasemi_mac *mac = netdev_priv(dev);
734 unsigned int reg, pcnt;
736 if (!(*mac->tx_status & PAS_STATUS_CAUSE_M))
739 pasemi_mac_clean_tx(mac);
741 pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
743 reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
745 if (*mac->tx_status & PAS_STATUS_SOFT)
746 reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
747 if (*mac->tx_status & PAS_STATUS_ERROR)
748 reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
750 write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
755 static void pasemi_adjust_link(struct net_device *dev)
757 struct pasemi_mac *mac = netdev_priv(dev);
760 unsigned int new_flags;
762 if (!mac->phydev->link) {
763 /* If no link, MAC speed settings don't matter. Just report
764 * link down and return.
766 if (mac->link && netif_msg_link(mac))
767 printk(KERN_INFO "%s: Link is down.\n", dev->name);
769 netif_carrier_off(dev);
774 netif_carrier_on(dev);
776 flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
777 new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
778 PAS_MAC_CFG_PCFG_TSR_M);
780 if (!mac->phydev->duplex)
781 new_flags |= PAS_MAC_CFG_PCFG_HD;
783 switch (mac->phydev->speed) {
785 new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
786 PAS_MAC_CFG_PCFG_TSR_1G;
789 new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
790 PAS_MAC_CFG_PCFG_TSR_100M;
793 new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
794 PAS_MAC_CFG_PCFG_TSR_10M;
797 printk("Unsupported speed %d\n", mac->phydev->speed);
800 /* Print on link or speed/duplex change */
801 msg = mac->link != mac->phydev->link || flags != new_flags;
803 mac->duplex = mac->phydev->duplex;
804 mac->speed = mac->phydev->speed;
805 mac->link = mac->phydev->link;
807 if (new_flags != flags)
808 write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
810 if (msg && netif_msg_link(mac))
811 printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
812 dev->name, mac->speed, mac->duplex ? "full" : "half");
815 static int pasemi_mac_phy_init(struct net_device *dev)
817 struct pasemi_mac *mac = netdev_priv(dev);
818 struct device_node *dn, *phy_dn;
819 struct phy_device *phydev;
822 const unsigned int *prop;
826 dn = pci_device_to_OF_node(mac->pdev);
827 ph = of_get_property(dn, "phy-handle", NULL);
830 phy_dn = of_find_node_by_phandle(*ph);
832 prop = of_get_property(phy_dn, "reg", NULL);
833 ret = of_address_to_resource(phy_dn->parent, 0, &r);
838 snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
846 phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
848 if (IS_ERR(phydev)) {
849 printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
850 return PTR_ERR(phydev);
853 mac->phydev = phydev;
863 static int pasemi_mac_open(struct net_device *dev)
865 struct pasemi_mac *mac = netdev_priv(dev);
870 /* enable rx section */
871 write_dma_reg(mac, PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
873 /* enable tx section */
874 write_dma_reg(mac, PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
876 flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
877 PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
878 PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
880 write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
882 write_iob_reg(mac, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
883 PAS_IOB_DMA_RXCH_CFG_CNTTH(0));
885 write_iob_reg(mac, PAS_IOB_DMA_TXCH_CFG(mac->dma_txch),
886 PAS_IOB_DMA_TXCH_CFG_CNTTH(128));
888 /* Clear out any residual packet count state from firmware */
889 pasemi_mac_restart_rx_intr(mac);
890 pasemi_mac_restart_tx_intr(mac);
892 /* 0xffffff is max value, about 16ms */
893 write_iob_reg(mac, PAS_IOB_DMA_COM_TIMEOUTCFG,
894 PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0xffffff));
896 ret = pasemi_mac_setup_rx_resources(dev);
898 goto out_rx_resources;
900 ret = pasemi_mac_setup_tx_resources(dev);
902 goto out_tx_resources;
904 write_mac_reg(mac, PAS_MAC_IPC_CHNL,
905 PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
906 PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
909 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
910 PAS_DMA_RXINT_RCMDSTA_EN |
911 PAS_DMA_RXINT_RCMDSTA_DROPS_M |
912 PAS_DMA_RXINT_RCMDSTA_BP |
913 PAS_DMA_RXINT_RCMDSTA_OO |
914 PAS_DMA_RXINT_RCMDSTA_BT);
916 /* enable rx channel */
917 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
918 PAS_DMA_RXCHAN_CCMDSTA_EN |
919 PAS_DMA_RXCHAN_CCMDSTA_DU |
920 PAS_DMA_RXCHAN_CCMDSTA_OD |
921 PAS_DMA_RXCHAN_CCMDSTA_FD |
922 PAS_DMA_RXCHAN_CCMDSTA_DT);
924 /* enable tx channel */
925 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
926 PAS_DMA_TXCHAN_TCMDSTA_EN |
927 PAS_DMA_TXCHAN_TCMDSTA_SZ |
928 PAS_DMA_TXCHAN_TCMDSTA_DB |
929 PAS_DMA_TXCHAN_TCMDSTA_DE |
930 PAS_DMA_TXCHAN_TCMDSTA_DA);
932 pasemi_mac_replenish_rx_ring(dev, RX_RING_SIZE);
934 write_dma_reg(mac, PAS_DMA_RXCHAN_INCR(mac->dma_rxch), RX_RING_SIZE>>1);
936 flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
937 PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
939 if (mac->type == MAC_TYPE_GMAC)
940 flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
942 flags |= PAS_MAC_CFG_PCFG_TSR_10G | PAS_MAC_CFG_PCFG_SPD_10G;
944 /* Enable interface in MAC */
945 write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
947 ret = pasemi_mac_phy_init(dev);
948 /* Some configs don't have PHYs (XAUI etc), so don't complain about
949 * failed init due to -ENODEV.
951 if (ret && ret != -ENODEV)
952 dev_warn(&mac->pdev->dev, "phy init failed: %d\n", ret);
954 netif_start_queue(dev);
955 napi_enable(&mac->napi);
957 /* Interrupts are a bit different for our DMA controller: While
958 * it's got one a regular PCI device header, the interrupt there
959 * is really the base of the range it's using. Each tx and rx
960 * channel has it's own interrupt source.
963 base_irq = virq_to_hw(mac->dma_pdev->irq);
965 mac->tx_irq = irq_create_mapping(NULL, base_irq + mac->dma_txch);
966 mac->rx_irq = irq_create_mapping(NULL, base_irq + 20 + mac->dma_txch);
968 ret = request_irq(mac->tx_irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
969 mac->tx->irq_name, dev);
971 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
972 base_irq + mac->dma_txch, ret);
976 ret = request_irq(mac->rx_irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
977 mac->rx->irq_name, dev);
979 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
980 base_irq + 20 + mac->dma_rxch, ret);
985 phy_start(mac->phydev);
990 free_irq(mac->tx_irq, dev);
992 napi_disable(&mac->napi);
993 netif_stop_queue(dev);
994 pasemi_mac_free_tx_resources(dev);
996 pasemi_mac_free_rx_resources(dev);
1002 #define MAX_RETRIES 5000
1004 static int pasemi_mac_close(struct net_device *dev)
1006 struct pasemi_mac *mac = netdev_priv(dev);
1011 phy_stop(mac->phydev);
1012 phy_disconnect(mac->phydev);
1015 netif_stop_queue(dev);
1016 napi_disable(&mac->napi);
1018 sta = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1019 if (sta & (PAS_DMA_RXINT_RCMDSTA_BP |
1020 PAS_DMA_RXINT_RCMDSTA_OO |
1021 PAS_DMA_RXINT_RCMDSTA_BT))
1022 printk(KERN_DEBUG "pasemi_mac: rcmdsta error: 0x%08x\n", sta);
1024 sta = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
1025 if (sta & (PAS_DMA_RXCHAN_CCMDSTA_DU |
1026 PAS_DMA_RXCHAN_CCMDSTA_OD |
1027 PAS_DMA_RXCHAN_CCMDSTA_FD |
1028 PAS_DMA_RXCHAN_CCMDSTA_DT))
1029 printk(KERN_DEBUG "pasemi_mac: ccmdsta error: 0x%08x\n", sta);
1031 sta = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
1032 if (sta & (PAS_DMA_TXCHAN_TCMDSTA_SZ |
1033 PAS_DMA_TXCHAN_TCMDSTA_DB |
1034 PAS_DMA_TXCHAN_TCMDSTA_DE |
1035 PAS_DMA_TXCHAN_TCMDSTA_DA))
1036 printk(KERN_DEBUG "pasemi_mac: tcmdsta error: 0x%08x\n", sta);
1038 /* Clean out any pending buffers */
1039 pasemi_mac_clean_tx(mac);
1040 pasemi_mac_clean_rx(mac, RX_RING_SIZE);
1042 /* Disable interface */
1043 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), PAS_DMA_TXCHAN_TCMDSTA_ST);
1044 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), PAS_DMA_RXINT_RCMDSTA_ST);
1045 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), PAS_DMA_RXCHAN_CCMDSTA_ST);
1047 for (retries = 0; retries < MAX_RETRIES; retries++) {
1048 sta = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
1049 if (!(sta & PAS_DMA_TXCHAN_TCMDSTA_ACT))
1054 if (sta & PAS_DMA_TXCHAN_TCMDSTA_ACT)
1055 dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
1057 for (retries = 0; retries < MAX_RETRIES; retries++) {
1058 sta = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
1059 if (!(sta & PAS_DMA_RXCHAN_CCMDSTA_ACT))
1064 if (sta & PAS_DMA_RXCHAN_CCMDSTA_ACT)
1065 dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
1067 for (retries = 0; retries < MAX_RETRIES; retries++) {
1068 sta = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1069 if (!(sta & PAS_DMA_RXINT_RCMDSTA_ACT))
1074 if (sta & PAS_DMA_RXINT_RCMDSTA_ACT)
1075 dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
1077 /* Then, disable the channel. This must be done separately from
1078 * stopping, since you can't disable when active.
1081 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
1082 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
1083 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
1085 free_irq(mac->tx_irq, dev);
1086 free_irq(mac->rx_irq, dev);
1088 /* Free resources */
1089 pasemi_mac_free_rx_resources(dev);
1090 pasemi_mac_free_tx_resources(dev);
1095 static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
1097 struct pasemi_mac *mac = netdev_priv(dev);
1098 struct pasemi_mac_txring *txring;
1100 dma_addr_t map[MAX_SKB_FRAGS+1];
1101 unsigned int map_size[MAX_SKB_FRAGS+1];
1102 unsigned long flags;
1105 dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_SS | XCT_MACTX_CRC_PAD;
1107 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1108 const unsigned char *nh = skb_network_header(skb);
1110 switch (ip_hdr(skb)->protocol) {
1112 dflags |= XCT_MACTX_CSUM_TCP;
1113 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
1114 dflags |= XCT_MACTX_IPO(nh - skb->data);
1117 dflags |= XCT_MACTX_CSUM_UDP;
1118 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
1119 dflags |= XCT_MACTX_IPO(nh - skb->data);
1124 nfrags = skb_shinfo(skb)->nr_frags;
1126 map[0] = pci_map_single(mac->dma_pdev, skb->data, skb_headlen(skb),
1128 map_size[0] = skb_headlen(skb);
1129 if (dma_mapping_error(map[0]))
1130 goto out_err_nolock;
1132 for (i = 0; i < nfrags; i++) {
1133 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1135 map[i+1] = pci_map_page(mac->dma_pdev, frag->page,
1136 frag->page_offset, frag->size,
1138 map_size[i+1] = frag->size;
1139 if (dma_mapping_error(map[i+1])) {
1141 goto out_err_nolock;
1145 mactx = dflags | XCT_MACTX_LLEN(skb->len);
1149 spin_lock_irqsave(&txring->lock, flags);
1151 /* Avoid stepping on the same cache line that the DMA controller
1152 * is currently about to send, so leave at least 8 words available.
1153 * Total free space needed is mactx + fragments + 8
1155 if (RING_AVAIL(txring) < nfrags + 10) {
1156 /* no room -- stop the queue and wait for tx intr */
1157 netif_stop_queue(dev);
1161 TX_RING(mac, txring->next_to_fill) = mactx;
1162 txring->next_to_fill++;
1163 TX_RING_INFO(mac, txring->next_to_fill).skb = skb;
1164 for (i = 0; i <= nfrags; i++) {
1165 TX_RING(mac, txring->next_to_fill+i) =
1166 XCT_PTR_LEN(map_size[i]) | XCT_PTR_ADDR(map[i]);
1167 TX_RING_INFO(mac, txring->next_to_fill+i).dma = map[i];
1170 /* We have to add an even number of 8-byte entries to the ring
1171 * even if the last one is unused. That means always an odd number
1172 * of pointers + one mactx descriptor.
1177 txring->next_to_fill = (txring->next_to_fill + nfrags + 1) &
1180 dev->stats.tx_packets++;
1181 dev->stats.tx_bytes += skb->len;
1183 spin_unlock_irqrestore(&txring->lock, flags);
1185 write_dma_reg(mac, PAS_DMA_TXCHAN_INCR(mac->dma_txch), (nfrags+2) >> 1);
1187 return NETDEV_TX_OK;
1190 spin_unlock_irqrestore(&txring->lock, flags);
1193 pci_unmap_single(mac->dma_pdev, map[nfrags], map_size[nfrags],
1196 return NETDEV_TX_BUSY;
1199 static void pasemi_mac_set_rx_mode(struct net_device *dev)
1201 struct pasemi_mac *mac = netdev_priv(dev);
1204 flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
1206 /* Set promiscuous */
1207 if (dev->flags & IFF_PROMISC)
1208 flags |= PAS_MAC_CFG_PCFG_PR;
1210 flags &= ~PAS_MAC_CFG_PCFG_PR;
1212 write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
1216 static int pasemi_mac_poll(struct napi_struct *napi, int budget)
1218 struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
1219 struct net_device *dev = mac->netdev;
1222 pasemi_mac_clean_tx(mac);
1223 pkts = pasemi_mac_clean_rx(mac, budget);
1224 if (pkts < budget) {
1225 /* all done, no more packets present */
1226 netif_rx_complete(dev, napi);
1228 pasemi_mac_restart_rx_intr(mac);
1233 static void __iomem * __devinit map_onedev(struct pci_dev *p, int index)
1235 struct device_node *dn;
1238 dn = pci_device_to_OF_node(p);
1242 ret = of_iomap(dn, index);
1248 /* This is hardcoded and ugly, but we have some firmware versions
1249 * that don't provide the register space in the device tree. Luckily
1250 * they are at well-known locations so we can just do the math here.
1252 return ioremap(0xe0000000 + (p->devfn << 12), 0x2000);
1255 static int __devinit pasemi_mac_map_regs(struct pasemi_mac *mac)
1257 struct resource res;
1258 struct device_node *dn;
1261 mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
1262 if (!mac->dma_pdev) {
1263 dev_err(&mac->pdev->dev, "Can't find DMA Controller\n");
1267 mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
1268 if (!mac->iob_pdev) {
1269 dev_err(&mac->pdev->dev, "Can't find I/O Bridge\n");
1273 mac->regs = map_onedev(mac->pdev, 0);
1274 mac->dma_regs = map_onedev(mac->dma_pdev, 0);
1275 mac->iob_regs = map_onedev(mac->iob_pdev, 0);
1277 if (!mac->regs || !mac->dma_regs || !mac->iob_regs) {
1278 dev_err(&mac->pdev->dev, "Can't map registers\n");
1282 /* The dma status structure is located in the I/O bridge, and
1283 * is cache coherent.
1286 dn = pci_device_to_OF_node(mac->iob_pdev);
1288 err = of_address_to_resource(dn, 1, &res);
1290 /* Fallback for old firmware */
1291 res.start = 0xfd800000;
1292 res.end = res.start + 0x1000;
1294 dma_status = __ioremap(res.start, res.end-res.start, 0);
1300 static int __devinit
1301 pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1303 static int index = 0;
1304 struct net_device *dev;
1305 struct pasemi_mac *mac;
1307 DECLARE_MAC_BUF(mac_buf);
1309 err = pci_enable_device(pdev);
1313 dev = alloc_etherdev(sizeof(struct pasemi_mac));
1316 "pasemi_mac: Could not allocate ethernet device.\n");
1318 goto out_disable_device;
1321 pci_set_drvdata(pdev, dev);
1322 SET_NETDEV_DEV(dev, &pdev->dev);
1324 mac = netdev_priv(dev);
1329 netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
1331 dev->features = NETIF_F_HW_CSUM | NETIF_F_LLTX | NETIF_F_SG;
1333 /* These should come out of the device tree eventually */
1334 mac->dma_txch = index;
1335 mac->dma_rxch = index;
1337 /* We probe GMAC before XAUI, but the DMA interfaces are
1338 * in XAUI, GMAC order.
1341 mac->dma_if = index + 2;
1343 mac->dma_if = index - 4;
1346 switch (pdev->device) {
1348 mac->type = MAC_TYPE_GMAC;
1351 mac->type = MAC_TYPE_XAUI;
1358 /* get mac addr from device tree */
1359 if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
1363 memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
1365 dev->open = pasemi_mac_open;
1366 dev->stop = pasemi_mac_close;
1367 dev->hard_start_xmit = pasemi_mac_start_tx;
1368 dev->set_multicast_list = pasemi_mac_set_rx_mode;
1370 err = pasemi_mac_map_regs(mac);
1374 mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
1375 mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
1377 mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
1379 /* Enable most messages by default */
1380 mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
1382 err = register_netdev(dev);
1385 dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
1388 } else if netif_msg_probe(mac)
1389 printk(KERN_INFO "%s: PA Semi %s: intf %d, txch %d, rxch %d, "
1391 dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
1392 mac->dma_if, mac->dma_txch, mac->dma_rxch,
1393 print_mac(mac_buf, dev->dev_addr));
1399 pci_dev_put(mac->iob_pdev);
1401 pci_dev_put(mac->dma_pdev);
1403 iounmap(mac->dma_regs);
1405 iounmap(mac->iob_regs);
1411 pci_disable_device(pdev);
1416 static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
1418 struct net_device *netdev = pci_get_drvdata(pdev);
1419 struct pasemi_mac *mac;
1424 mac = netdev_priv(netdev);
1426 unregister_netdev(netdev);
1428 pci_disable_device(pdev);
1429 pci_dev_put(mac->dma_pdev);
1430 pci_dev_put(mac->iob_pdev);
1433 iounmap(mac->dma_regs);
1434 iounmap(mac->iob_regs);
1436 pci_set_drvdata(pdev, NULL);
1437 free_netdev(netdev);
1440 static struct pci_device_id pasemi_mac_pci_tbl[] = {
1441 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
1442 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
1446 MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
1448 static struct pci_driver pasemi_mac_driver = {
1449 .name = "pasemi_mac",
1450 .id_table = pasemi_mac_pci_tbl,
1451 .probe = pasemi_mac_probe,
1452 .remove = __devexit_p(pasemi_mac_remove),
1455 static void __exit pasemi_mac_cleanup_module(void)
1457 pci_unregister_driver(&pasemi_mac_driver);
1458 __iounmap(dma_status);
1462 int pasemi_mac_init_module(void)
1464 return pci_register_driver(&pasemi_mac_driver);
1467 module_init(pasemi_mac_init_module);
1468 module_exit(pasemi_mac_cleanup_module);