2 * Copyright (C) 2006 PA Semi, Inc
4 * Driver for the PA6T-1682M onchip 1G/10G Ethernet MACs, soft state and
5 * hardware register layouts.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #include <linux/ethtool.h>
25 #include <linux/netdevice.h>
26 #include <linux/spinlock.h>
27 #include <linux/phy.h>
29 #define MAX_LRO_DESCRIPTORS 8
32 struct pasemi_mac_txring {
33 struct pasemi_dmachan chan; /* Must be first */
36 unsigned int next_to_fill;
37 unsigned int next_to_clean;
38 struct pasemi_mac_buffer *ring_info;
39 struct pasemi_mac *mac; /* Needed in intr handler */
40 struct timer_list clean_timer;
43 struct pasemi_mac_rxring {
44 struct pasemi_dmachan chan; /* Must be first */
46 u64 *buffers; /* RX interface buffer ring */
49 unsigned int next_to_fill;
50 unsigned int next_to_clean;
51 struct pasemi_mac_buffer *ring_info;
52 struct pasemi_mac *mac; /* Needed in intr handler */
55 struct pasemi_mac_csring {
56 struct pasemi_dmachan chan;
58 unsigned int next_to_fill;
65 struct net_device *netdev;
67 struct pci_dev *dma_pdev;
68 struct pci_dev *iob_pdev;
69 struct phy_device *phydev;
70 struct napi_struct napi;
72 int bufsz; /* RX ring buffer size */
77 #define MAC_TYPE_GMAC 1
78 #define MAC_TYPE_XAUI 2
82 struct net_lro_mgr lro_mgr;
83 struct net_lro_desc lro_desc[MAX_LRO_DESCRIPTORS];
84 struct timer_list rxtimer;
85 unsigned int lro_max_aggr;
87 struct pasemi_mac_txring *tx;
88 struct pasemi_mac_rxring *rx;
89 struct pasemi_mac_csring *cs[MAX_CS];
90 char tx_irq_name[10]; /* "eth%d tx" */
91 char rx_irq_name[10]; /* "eth%d rx" */
96 unsigned int msg_enable;
97 char phy_id[BUS_ID_SIZE];
100 /* Software status descriptor (ring_info) */
101 struct pasemi_mac_buffer {
107 /* PCI register offsets and formats */
110 /* MAC CFG register offsets */
112 PAS_MAC_CFG_PCFG = 0x80,
113 PAS_MAC_CFG_MACCFG = 0x84,
114 PAS_MAC_CFG_ADR0 = 0x8c,
115 PAS_MAC_CFG_ADR1 = 0x90,
116 PAS_MAC_CFG_TXP = 0x98,
117 PAS_MAC_IPC_CHNL = 0x208,
120 /* MAC CFG register fields */
121 #define PAS_MAC_CFG_PCFG_PE 0x80000000
122 #define PAS_MAC_CFG_PCFG_CE 0x40000000
123 #define PAS_MAC_CFG_PCFG_BU 0x20000000
124 #define PAS_MAC_CFG_PCFG_TT 0x10000000
125 #define PAS_MAC_CFG_PCFG_TSR_M 0x0c000000
126 #define PAS_MAC_CFG_PCFG_TSR_10M 0x00000000
127 #define PAS_MAC_CFG_PCFG_TSR_100M 0x04000000
128 #define PAS_MAC_CFG_PCFG_TSR_1G 0x08000000
129 #define PAS_MAC_CFG_PCFG_TSR_10G 0x0c000000
130 #define PAS_MAC_CFG_PCFG_T24 0x02000000
131 #define PAS_MAC_CFG_PCFG_PR 0x01000000
132 #define PAS_MAC_CFG_PCFG_CRO_M 0x00ff0000
133 #define PAS_MAC_CFG_PCFG_CRO_S 16
134 #define PAS_MAC_CFG_PCFG_IPO_M 0x0000ff00
135 #define PAS_MAC_CFG_PCFG_IPO_S 8
136 #define PAS_MAC_CFG_PCFG_S1 0x00000080
137 #define PAS_MAC_CFG_PCFG_IO_M 0x00000060
138 #define PAS_MAC_CFG_PCFG_IO_MAC 0x00000000
139 #define PAS_MAC_CFG_PCFG_IO_OFF 0x00000020
140 #define PAS_MAC_CFG_PCFG_IO_IND_ETH 0x00000040
141 #define PAS_MAC_CFG_PCFG_IO_IND_IP 0x00000060
142 #define PAS_MAC_CFG_PCFG_LP 0x00000010
143 #define PAS_MAC_CFG_PCFG_TS 0x00000008
144 #define PAS_MAC_CFG_PCFG_HD 0x00000004
145 #define PAS_MAC_CFG_PCFG_SPD_M 0x00000003
146 #define PAS_MAC_CFG_PCFG_SPD_10M 0x00000000
147 #define PAS_MAC_CFG_PCFG_SPD_100M 0x00000001
148 #define PAS_MAC_CFG_PCFG_SPD_1G 0x00000002
149 #define PAS_MAC_CFG_PCFG_SPD_10G 0x00000003
151 #define PAS_MAC_CFG_MACCFG_TXT_M 0x70000000
152 #define PAS_MAC_CFG_MACCFG_TXT_S 28
153 #define PAS_MAC_CFG_MACCFG_PRES_M 0x0f000000
154 #define PAS_MAC_CFG_MACCFG_PRES_S 24
155 #define PAS_MAC_CFG_MACCFG_MAXF_M 0x00ffff00
156 #define PAS_MAC_CFG_MACCFG_MAXF_S 8
157 #define PAS_MAC_CFG_MACCFG_MAXF(x) (((x) << PAS_MAC_CFG_MACCFG_MAXF_S) & \
158 PAS_MAC_CFG_MACCFG_MAXF_M)
159 #define PAS_MAC_CFG_MACCFG_MINF_M 0x000000ff
160 #define PAS_MAC_CFG_MACCFG_MINF_S 0
162 #define PAS_MAC_CFG_TXP_FCF 0x01000000
163 #define PAS_MAC_CFG_TXP_FCE 0x00800000
164 #define PAS_MAC_CFG_TXP_FC 0x00400000
165 #define PAS_MAC_CFG_TXP_FPC_M 0x00300000
166 #define PAS_MAC_CFG_TXP_FPC_S 20
167 #define PAS_MAC_CFG_TXP_FPC(x) (((x) << PAS_MAC_CFG_TXP_FPC_S) & \
168 PAS_MAC_CFG_TXP_FPC_M)
169 #define PAS_MAC_CFG_TXP_RT 0x00080000
170 #define PAS_MAC_CFG_TXP_BL 0x00040000
171 #define PAS_MAC_CFG_TXP_SL_M 0x00030000
172 #define PAS_MAC_CFG_TXP_SL_S 16
173 #define PAS_MAC_CFG_TXP_SL(x) (((x) << PAS_MAC_CFG_TXP_SL_S) & \
174 PAS_MAC_CFG_TXP_SL_M)
175 #define PAS_MAC_CFG_TXP_COB_M 0x0000f000
176 #define PAS_MAC_CFG_TXP_COB_S 12
177 #define PAS_MAC_CFG_TXP_COB(x) (((x) << PAS_MAC_CFG_TXP_COB_S) & \
178 PAS_MAC_CFG_TXP_COB_M)
179 #define PAS_MAC_CFG_TXP_TIFT_M 0x00000f00
180 #define PAS_MAC_CFG_TXP_TIFT_S 8
181 #define PAS_MAC_CFG_TXP_TIFT(x) (((x) << PAS_MAC_CFG_TXP_TIFT_S) & \
182 PAS_MAC_CFG_TXP_TIFT_M)
183 #define PAS_MAC_CFG_TXP_TIFG_M 0x000000ff
184 #define PAS_MAC_CFG_TXP_TIFG_S 0
185 #define PAS_MAC_CFG_TXP_TIFG(x) (((x) << PAS_MAC_CFG_TXP_TIFG_S) & \
186 PAS_MAC_CFG_TXP_TIFG_M)
188 #define PAS_MAC_IPC_CHNL_DCHNO_M 0x003f0000
189 #define PAS_MAC_IPC_CHNL_DCHNO_S 16
190 #define PAS_MAC_IPC_CHNL_DCHNO(x) (((x) << PAS_MAC_IPC_CHNL_DCHNO_S) & \
191 PAS_MAC_IPC_CHNL_DCHNO_M)
192 #define PAS_MAC_IPC_CHNL_BCH_M 0x0000003f
193 #define PAS_MAC_IPC_CHNL_BCH_S 0
194 #define PAS_MAC_IPC_CHNL_BCH(x) (((x) << PAS_MAC_IPC_CHNL_BCH_S) & \
195 PAS_MAC_IPC_CHNL_BCH_M)
197 #endif /* PASEMI_MAC_H */