1 /* ----------------------------------------------------------------------------
2 Linux PCMCIA ethernet adapter driver for the New Media Ethernet LAN.
3 nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao
5 The Ethernet LAN uses the Advanced Micro Devices (AMD) Am79C940 Media
6 Access Controller for Ethernet (MACE). It is essentially the Am2150
7 PCMCIA Ethernet card contained in the Am2150 Demo Kit.
9 Written by Roger C. Pao <rpao@paonet.org>
10 Copyright 1995 Roger C. Pao
11 Linux 2.5 cleanups Copyright Red Hat 2003
13 This software may be used and distributed according to the terms of
14 the GNU General Public License.
16 Ported to Linux 1.3.* network driver environment by
17 Matti Aarnio <mea@utu.fi>
21 Am2150 Technical Reference Manual, Revision 1.0, August 17, 1993
22 Am79C940 (MACE) Data Sheet, 1994
23 Am79C90 (C-LANCE) Data Sheet, 1994
24 Linux PCMCIA Programmer's Guide v1.17
25 /usr/src/linux/net/inet/dev.c, Linux kernel 1.2.8
27 Eric Mears, New Media Corporation
28 Tom Pollard, New Media Corporation
29 Dean Siasoyco, New Media Corporation
30 Ken Lesniak, Silicon Graphics, Inc. <lesniak@boston.sgi.com>
31 Donald Becker <becker@scyld.com>
32 David Hinds <dahinds@users.sourceforge.net>
34 The Linux client driver is based on the 3c589_cs.c client driver by
37 The Linux network driver outline is based on the 3c589_cs.c driver,
38 the 8390.c driver, and the example skeleton.c kernel code, which are
41 The Am2150 network driver hardware interface code is based on the
42 OS/9000 driver for the New Media Ethernet LAN by Eric Mears.
44 Special thanks for testing and help in debugging this driver goes
47 -------------------------------------------------------------------------------
48 Driver Notes and Issues
49 -------------------------------------------------------------------------------
51 1. Developed on a Dell 320SLi
52 PCMCIA Card Services 2.6.2
53 Linux dell 1.2.10 #1 Thu Jun 29 20:23:41 PDT 1995 i386
55 2. rc.pcmcia may require loading pcmcia_core with io_speed=300:
56 'insmod pcmcia_core.o io_speed=300'.
57 This will avoid problems with fast systems which causes rx_framecnt
58 to return random values.
60 3. If hot extraction does not work for you, use 'ifconfig eth0 down'
63 4. There is a bad slow-down problem in this driver.
65 5. Future: Multicast processing. In the meantime, do _not_ compile your
66 kernel with multicast ip enabled.
68 -------------------------------------------------------------------------------
70 -------------------------------------------------------------------------------
72 * 2.5.75-ac1 2003/07/11 Alan Cox <alan@lxorguk.ukuu.org.uk>
73 * Fixed hang on card eject as we probe it
74 * Cleaned up to use new style locking.
76 * Revision 0.16 1995/07/01 06:42:17 rpao
77 * Bug fix: nmclan_reset() called CardServices incorrectly.
79 * Revision 0.15 1995/05/24 08:09:47 rpao
80 * Re-implement MULTI_TX dev->tbusy handling.
82 * Revision 0.14 1995/05/23 03:19:30 rpao
83 * Added, in nmclan_config(), "tuple.Attributes = 0;".
84 * Modified MACE ID check to ignore chip revision level.
85 * Avoid tx_free_frames race condition between _start_xmit and _interrupt.
87 * Revision 0.13 1995/05/18 05:56:34 rpao
89 * Bug fix: nmclan_reset did not enable TX and RX: call restore_multicast_list.
90 * Bug fix: mace_interrupt checks ~MACE_IMR_DEFAULT. Fixes driver lockup.
92 * Revision 0.12 1995/05/14 00:12:23 rpao
93 * Statistics overhaul.
97 Bug fix: MACE statistics counters used wrong I/O ports.
98 Bug fix: mace_interrupt() needed to allow statistics to be
99 processed without RX or TX interrupts pending.
101 Multiple transmit request processing.
102 Modified statistics to use MACE counters where possible.
103 95/05/10 rpao V0.09 Bug fix: Must use IO_DATA_PATH_WIDTH_AUTO.
106 Bug fix: Make all non-exported functions private by using
108 Bug fix: Test IntrCnt _before_ reading MACE_IR.
109 95/05/10 rpao V0.07 Statistics.
110 95/05/09 rpao V0.06 Fix rx_framecnt problem by addition of PCIC wait states.
112 ---------------------------------------------------------------------------- */
114 #define DRV_NAME "nmclan_cs"
115 #define DRV_VERSION "0.16"
118 /* ----------------------------------------------------------------------------
119 Conditional Compilation Options
120 ---------------------------------------------------------------------------- */
123 #define RESET_ON_TIMEOUT 1
124 #define TX_INTERRUPTABLE 1
125 #define RESET_XILINX 0
127 /* ----------------------------------------------------------------------------
129 ---------------------------------------------------------------------------- */
131 #include <linux/module.h>
132 #include <linux/kernel.h>
133 #include <linux/init.h>
134 #include <linux/ptrace.h>
135 #include <linux/slab.h>
136 #include <linux/string.h>
137 #include <linux/timer.h>
138 #include <linux/interrupt.h>
139 #include <linux/in.h>
140 #include <linux/delay.h>
141 #include <linux/ethtool.h>
142 #include <linux/netdevice.h>
143 #include <linux/etherdevice.h>
144 #include <linux/skbuff.h>
145 #include <linux/if_arp.h>
146 #include <linux/ioport.h>
147 #include <linux/bitops.h>
149 #include <pcmcia/cs.h>
150 #include <pcmcia/cisreg.h>
151 #include <pcmcia/cistpl.h>
152 #include <pcmcia/ds.h>
154 #include <asm/uaccess.h>
156 #include <asm/system.h>
158 /* ----------------------------------------------------------------------------
160 ---------------------------------------------------------------------------- */
162 #define ETHER_ADDR_LEN ETH_ALEN
163 /* 6 bytes in an Ethernet Address */
164 #define MACE_LADRF_LEN 8
165 /* 8 bytes in Logical Address Filter */
167 /* Loop Control Defines */
168 #define MACE_MAX_IR_ITERATIONS 10
169 #define MACE_MAX_RX_ITERATIONS 12
171 TBD: Dean brought this up, and I assumed the hardware would
174 If MACE_MAX_RX_ITERATIONS is > 1, rx_framecnt may still be
175 non-zero when the isr exits. We may not get another interrupt
176 to process the remaining packets for some time.
180 The Am2150 has a Xilinx XC3042 field programmable gate array (FPGA)
181 which manages the interface between the MACE and the PCMCIA bus. It
182 also includes buffer management for the 32K x 8 SRAM to control up to
183 four transmit and 12 receive frames at a time.
185 #define AM2150_MAX_TX_FRAMES 4
186 #define AM2150_MAX_RX_FRAMES 12
188 /* Am2150 Ethernet Card I/O Mapping */
189 #define AM2150_RCV 0x00
190 #define AM2150_XMT 0x04
191 #define AM2150_XMT_SKIP 0x09
192 #define AM2150_RCV_NEXT 0x0A
193 #define AM2150_RCV_FRAME_COUNT 0x0B
194 #define AM2150_MACE_BANK 0x0C
195 #define AM2150_MACE_BASE 0x10
198 #define MACE_RCVFIFO 0
199 #define MACE_XMTFIFO 1
205 #define MACE_FIFOFC 7
209 #define MACE_BIUCC 11
210 #define MACE_FIFOCC 12
211 #define MACE_MACCC 13
212 #define MACE_PLSCC 14
213 #define MACE_PHYCC 15
214 #define MACE_CHIPIDL 16
215 #define MACE_CHIPIDH 17
218 #define MACE_LADRF 20
224 #define MACE_RNTPC 26
225 #define MACE_RCVCC 27
232 #define MACE_XMTRC_EXDEF 0x80
233 #define MACE_XMTRC_XMTRC 0x0F
235 #define MACE_XMTFS_XMTSV 0x80
236 #define MACE_XMTFS_UFLO 0x40
237 #define MACE_XMTFS_LCOL 0x20
238 #define MACE_XMTFS_MORE 0x10
239 #define MACE_XMTFS_ONE 0x08
240 #define MACE_XMTFS_DEFER 0x04
241 #define MACE_XMTFS_LCAR 0x02
242 #define MACE_XMTFS_RTRY 0x01
244 #define MACE_RCVFS_RCVSTS 0xF000
245 #define MACE_RCVFS_OFLO 0x8000
246 #define MACE_RCVFS_CLSN 0x4000
247 #define MACE_RCVFS_FRAM 0x2000
248 #define MACE_RCVFS_FCS 0x1000
250 #define MACE_FIFOFC_RCVFC 0xF0
251 #define MACE_FIFOFC_XMTFC 0x0F
253 #define MACE_IR_JAB 0x80
254 #define MACE_IR_BABL 0x40
255 #define MACE_IR_CERR 0x20
256 #define MACE_IR_RCVCCO 0x10
257 #define MACE_IR_RNTPCO 0x08
258 #define MACE_IR_MPCO 0x04
259 #define MACE_IR_RCVINT 0x02
260 #define MACE_IR_XMTINT 0x01
262 #define MACE_MACCC_PROM 0x80
263 #define MACE_MACCC_DXMT2PD 0x40
264 #define MACE_MACCC_EMBA 0x20
265 #define MACE_MACCC_RESERVED 0x10
266 #define MACE_MACCC_DRCVPA 0x08
267 #define MACE_MACCC_DRCVBC 0x04
268 #define MACE_MACCC_ENXMT 0x02
269 #define MACE_MACCC_ENRCV 0x01
271 #define MACE_PHYCC_LNKFL 0x80
272 #define MACE_PHYCC_DLNKTST 0x40
273 #define MACE_PHYCC_REVPOL 0x20
274 #define MACE_PHYCC_DAPC 0x10
275 #define MACE_PHYCC_LRT 0x08
276 #define MACE_PHYCC_ASEL 0x04
277 #define MACE_PHYCC_RWAKE 0x02
278 #define MACE_PHYCC_AWAKE 0x01
280 #define MACE_IAC_ADDRCHG 0x80
281 #define MACE_IAC_PHYADDR 0x04
282 #define MACE_IAC_LOGADDR 0x02
284 #define MACE_UTR_RTRE 0x80
285 #define MACE_UTR_RTRD 0x40
286 #define MACE_UTR_RPA 0x20
287 #define MACE_UTR_FCOLL 0x10
288 #define MACE_UTR_RCVFCSE 0x08
289 #define MACE_UTR_LOOP_INCL_MENDEC 0x06
290 #define MACE_UTR_LOOP_NO_MENDEC 0x04
291 #define MACE_UTR_LOOP_EXTERNAL 0x02
292 #define MACE_UTR_LOOP_NONE 0x00
293 #define MACE_UTR_RESERVED 0x01
295 /* Switch MACE register bank (only 0 and 1 are valid) */
296 #define MACEBANK(win_num) outb((win_num), ioaddr + AM2150_MACE_BANK)
298 #define MACE_IMR_DEFAULT \
309 #undef MACE_IMR_DEFAULT
310 #define MACE_IMR_DEFAULT 0x00 /* New statistics handling: grab everything */
312 #define TX_TIMEOUT ((400*HZ)/1000)
314 /* ----------------------------------------------------------------------------
316 ---------------------------------------------------------------------------- */
318 typedef struct _mace_statistics {
333 /* RFS1--Receive Status (RCVSTS) */
339 /* RFS2--Runt Packet Count (RNTPC) */
342 /* RFS3--Receive Collision Count (RCVCC) */
363 typedef struct _mace_private {
364 struct pcmcia_device *p_dev;
365 struct net_device_stats linux_stats; /* Linux statistics counters */
366 mace_statistics mace_stats; /* MACE chip statistics counters */
368 /* restore_multicast_list() state variables */
369 int multicast_ladrf[MACE_LADRF_LEN]; /* Logical address filter */
370 int multicast_num_addrs;
372 char tx_free_frames; /* Number of free transmit frame buffers */
373 char tx_irq_disabled; /* MACE TX interrupt disabled */
375 spinlock_t bank_lock; /* Must be held if you step off bank 0 */
378 /* ----------------------------------------------------------------------------
379 Private Global Variables
380 ---------------------------------------------------------------------------- */
382 static const char *if_names[]={
383 "Auto", "10baseT", "BNC",
386 /* ----------------------------------------------------------------------------
388 These are the parameters that can be set during loading with
390 ---------------------------------------------------------------------------- */
392 MODULE_DESCRIPTION("New Media PCMCIA ethernet driver");
393 MODULE_LICENSE("GPL");
395 #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
397 /* 0=auto, 1=10baseT, 2 = 10base2, default=auto */
398 INT_MODULE_PARM(if_port, 0);
401 /* ----------------------------------------------------------------------------
403 ---------------------------------------------------------------------------- */
405 static int nmclan_config(struct pcmcia_device *link);
406 static void nmclan_release(struct pcmcia_device *link);
408 static void nmclan_reset(struct net_device *dev);
409 static int mace_config(struct net_device *dev, struct ifmap *map);
410 static int mace_open(struct net_device *dev);
411 static int mace_close(struct net_device *dev);
412 static netdev_tx_t mace_start_xmit(struct sk_buff *skb,
413 struct net_device *dev);
414 static void mace_tx_timeout(struct net_device *dev);
415 static irqreturn_t mace_interrupt(int irq, void *dev_id);
416 static struct net_device_stats *mace_get_stats(struct net_device *dev);
417 static int mace_rx(struct net_device *dev, unsigned char RxCnt);
418 static void restore_multicast_list(struct net_device *dev);
419 static void set_multicast_list(struct net_device *dev);
420 static const struct ethtool_ops netdev_ethtool_ops;
423 static void nmclan_detach(struct pcmcia_device *p_dev);
425 static const struct net_device_ops mace_netdev_ops = {
426 .ndo_open = mace_open,
427 .ndo_stop = mace_close,
428 .ndo_start_xmit = mace_start_xmit,
429 .ndo_tx_timeout = mace_tx_timeout,
430 .ndo_set_config = mace_config,
431 .ndo_get_stats = mace_get_stats,
432 .ndo_set_multicast_list = set_multicast_list,
433 .ndo_change_mtu = eth_change_mtu,
434 .ndo_set_mac_address = eth_mac_addr,
435 .ndo_validate_addr = eth_validate_addr,
438 /* ----------------------------------------------------------------------------
440 Creates an "instance" of the driver, allocating local data
441 structures for one device. The device is registered with Card
443 ---------------------------------------------------------------------------- */
445 static int nmclan_probe(struct pcmcia_device *link)
448 struct net_device *dev;
450 dev_dbg(&link->dev, "nmclan_attach()\n");
452 /* Create new ethernet device */
453 dev = alloc_etherdev(sizeof(mace_private));
456 lp = netdev_priv(dev);
460 spin_lock_init(&lp->bank_lock);
461 link->io.NumPorts1 = 32;
462 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
463 link->io.IOAddrLines = 5;
464 link->conf.Attributes = CONF_ENABLE_IRQ;
465 link->conf.IntType = INT_MEMORY_AND_IO;
466 link->conf.ConfigIndex = 1;
467 link->conf.Present = PRESENT_OPTION;
469 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
471 dev->netdev_ops = &mace_netdev_ops;
472 SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
473 dev->watchdog_timeo = TX_TIMEOUT;
475 return nmclan_config(link);
476 } /* nmclan_attach */
478 /* ----------------------------------------------------------------------------
480 This deletes a driver "instance". The device is de-registered
481 with Card Services. If it has been released, all local data
482 structures are freed. Otherwise, the structures will be freed
483 when the device is released.
484 ---------------------------------------------------------------------------- */
486 static void nmclan_detach(struct pcmcia_device *link)
488 struct net_device *dev = link->priv;
490 dev_dbg(&link->dev, "nmclan_detach\n");
492 unregister_netdev(dev);
494 nmclan_release(link);
497 } /* nmclan_detach */
499 /* ----------------------------------------------------------------------------
501 Reads a MACE register. This is bank independent; however, the
502 caller must ensure that this call is not interruptable. We are
503 assuming that during normal operation, the MACE is always in
505 ---------------------------------------------------------------------------- */
506 static int mace_read(mace_private *lp, unsigned int ioaddr, int reg)
512 case 0: /* register 0-15 */
513 data = inb(ioaddr + AM2150_MACE_BASE + reg);
515 case 1: /* register 16-31 */
516 spin_lock_irqsave(&lp->bank_lock, flags);
518 data = inb(ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
520 spin_unlock_irqrestore(&lp->bank_lock, flags);
523 return (data & 0xFF);
526 /* ----------------------------------------------------------------------------
528 Writes to a MACE register. This is bank independent; however,
529 the caller must ensure that this call is not interruptable. We
530 are assuming that during normal operation, the MACE is always in
532 ---------------------------------------------------------------------------- */
533 static void mace_write(mace_private *lp, unsigned int ioaddr, int reg,
539 case 0: /* register 0-15 */
540 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + reg);
542 case 1: /* register 16-31 */
543 spin_lock_irqsave(&lp->bank_lock, flags);
545 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
547 spin_unlock_irqrestore(&lp->bank_lock, flags);
552 /* ----------------------------------------------------------------------------
554 Resets the MACE chip.
555 ---------------------------------------------------------------------------- */
556 static int mace_init(mace_private *lp, unsigned int ioaddr, char *enet_addr)
561 /* MACE Software reset */
562 mace_write(lp, ioaddr, MACE_BIUCC, 1);
563 while (mace_read(lp, ioaddr, MACE_BIUCC) & 0x01) {
564 /* Wait for reset bit to be cleared automatically after <= 200ns */;
567 printk(KERN_ERR "mace: reset failed, card removed ?\n");
572 mace_write(lp, ioaddr, MACE_BIUCC, 0);
574 /* The Am2150 requires that the MACE FIFOs operate in burst mode. */
575 mace_write(lp, ioaddr, MACE_FIFOCC, 0x0F);
577 mace_write(lp,ioaddr, MACE_RCVFC, 0); /* Disable Auto Strip Receive */
578 mace_write(lp, ioaddr, MACE_IMR, 0xFF); /* Disable all interrupts until _open */
581 * Bit 2-1 PORTSEL[1-0] Port Select.
584 * 10 DAI Port (reserved in Am2150)
586 * For this card, only the first two are valid.
587 * So, PLSCC should be set to
590 * Or just set ASEL in PHYCC below!
594 mace_write(lp, ioaddr, MACE_PLSCC, 0x02);
597 mace_write(lp, ioaddr, MACE_PLSCC, 0x00);
600 mace_write(lp, ioaddr, MACE_PHYCC, /* ASEL */ 4);
601 /* ASEL Auto Select. When set, the PORTSEL[1-0] bits are overridden,
602 and the MACE device will automatically select the operating media
607 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_PHYADDR);
608 /* Poll ADDRCHG bit */
610 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
614 printk(KERN_ERR "mace: ADDRCHG timeout, card removed ?\n");
618 /* Set PADR register */
619 for (i = 0; i < ETHER_ADDR_LEN; i++)
620 mace_write(lp, ioaddr, MACE_PADR, enet_addr[i]);
622 /* MAC Configuration Control Register should be written last */
623 /* Let set_multicast_list set this. */
624 /* mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV); */
625 mace_write(lp, ioaddr, MACE_MACCC, 0x00);
629 /* ----------------------------------------------------------------------------
631 This routine is scheduled to run after a CARD_INSERTION event
632 is received, to configure the PCMCIA socket, and to make the
633 ethernet device available to the system.
634 ---------------------------------------------------------------------------- */
636 static int nmclan_config(struct pcmcia_device *link)
638 struct net_device *dev = link->priv;
639 mace_private *lp = netdev_priv(dev);
645 dev_dbg(&link->dev, "nmclan_config\n");
647 ret = pcmcia_request_io(link, &link->io);
650 ret = pcmcia_request_exclusive_irq(link, mace_interrupt);
653 ret = pcmcia_request_configuration(link, &link->conf);
657 dev->irq = link->irq;
658 dev->base_addr = link->io.BasePort1;
660 ioaddr = dev->base_addr;
662 /* Read the ethernet address from the CIS. */
663 len = pcmcia_get_tuple(link, 0x80, &buf);
664 if (!buf || len < ETHER_ADDR_LEN) {
668 memcpy(dev->dev_addr, buf, ETHER_ADDR_LEN);
671 /* Verify configuration by reading the MACE ID. */
675 sig[0] = mace_read(lp, ioaddr, MACE_CHIPIDL);
676 sig[1] = mace_read(lp, ioaddr, MACE_CHIPIDH);
677 if ((sig[0] == 0x40) && ((sig[1] & 0x0F) == 0x09)) {
678 dev_dbg(&link->dev, "nmclan_cs configured: mace id=%x %x\n",
681 printk(KERN_NOTICE "nmclan_cs: mace id not found: %x %x should"
682 " be 0x40 0x?9\n", sig[0], sig[1]);
687 if(mace_init(lp, ioaddr, dev->dev_addr) == -1)
690 /* The if_port symbol can be set when the module is loaded */
692 dev->if_port = if_port;
694 printk(KERN_NOTICE "nmclan_cs: invalid if_port requested\n");
696 SET_NETDEV_DEV(dev, &link->dev);
698 i = register_netdev(dev);
700 printk(KERN_NOTICE "nmclan_cs: register_netdev() failed\n");
704 printk(KERN_INFO "%s: nmclan: port %#3lx, irq %d, %s port,"
706 dev->name, dev->base_addr, dev->irq, if_names[dev->if_port],
711 nmclan_release(link);
713 } /* nmclan_config */
715 /* ----------------------------------------------------------------------------
717 After a card is removed, nmclan_release() will unregister the
718 net device, and release the PCMCIA configuration. If the device
719 is still open, this will be postponed until it is closed.
720 ---------------------------------------------------------------------------- */
721 static void nmclan_release(struct pcmcia_device *link)
723 dev_dbg(&link->dev, "nmclan_release\n");
724 pcmcia_disable_device(link);
727 static int nmclan_suspend(struct pcmcia_device *link)
729 struct net_device *dev = link->priv;
732 netif_device_detach(dev);
737 static int nmclan_resume(struct pcmcia_device *link)
739 struct net_device *dev = link->priv;
743 netif_device_attach(dev);
750 /* ----------------------------------------------------------------------------
752 Reset and restore all of the Xilinx and MACE registers.
753 ---------------------------------------------------------------------------- */
754 static void nmclan_reset(struct net_device *dev)
756 mace_private *lp = netdev_priv(dev);
759 struct pcmcia_device *link = &lp->link;
763 /* Save original COR value */
765 reg.Action = CS_READ;
766 reg.Offset = CISREG_COR;
768 pcmcia_access_configuration_register(link, ®);
769 OrigCorValue = reg.Value;
772 reg.Action = CS_WRITE;
773 reg.Offset = CISREG_COR;
774 dev_dbg(&link->dev, "nmclan_reset: OrigCorValue=0x%lX, resetting...\n",
776 reg.Value = COR_SOFT_RESET;
777 pcmcia_access_configuration_register(link, ®);
778 /* Need to wait for 20 ms for PCMCIA to finish reset. */
780 /* Restore original COR configuration index */
781 reg.Value = COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK);
782 pcmcia_access_configuration_register(link, ®);
783 /* Xilinx is now completely reset along with the MACE chip. */
784 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
786 #endif /* #if RESET_XILINX */
788 /* Xilinx is now completely reset along with the MACE chip. */
789 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
791 /* Reinitialize the MACE chip for operation. */
792 mace_init(lp, dev->base_addr, dev->dev_addr);
793 mace_write(lp, dev->base_addr, MACE_IMR, MACE_IMR_DEFAULT);
795 /* Restore the multicast list and enable TX and RX. */
796 restore_multicast_list(dev);
799 /* ----------------------------------------------------------------------------
801 [Someone tell me what this is supposed to do? Is if_port a defined
802 standard? If so, there should be defines to indicate 1=10Base-T,
803 2=10Base-2, etc. including limited automatic detection.]
804 ---------------------------------------------------------------------------- */
805 static int mace_config(struct net_device *dev, struct ifmap *map)
807 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
808 if (map->port <= 2) {
809 dev->if_port = map->port;
810 printk(KERN_INFO "%s: switched to %s port\n", dev->name,
811 if_names[dev->if_port]);
818 /* ----------------------------------------------------------------------------
821 ---------------------------------------------------------------------------- */
822 static int mace_open(struct net_device *dev)
824 unsigned int ioaddr = dev->base_addr;
825 mace_private *lp = netdev_priv(dev);
826 struct pcmcia_device *link = lp->p_dev;
828 if (!pcmcia_dev_present(link))
835 netif_start_queue(dev);
838 return 0; /* Always succeed */
841 /* ----------------------------------------------------------------------------
843 Closes device driver.
844 ---------------------------------------------------------------------------- */
845 static int mace_close(struct net_device *dev)
847 unsigned int ioaddr = dev->base_addr;
848 mace_private *lp = netdev_priv(dev);
849 struct pcmcia_device *link = lp->p_dev;
851 dev_dbg(&link->dev, "%s: shutting down ethercard.\n", dev->name);
853 /* Mask off all interrupts from the MACE chip. */
854 outb(0xFF, ioaddr + AM2150_MACE_BASE + MACE_IMR);
857 netif_stop_queue(dev);
862 static void netdev_get_drvinfo(struct net_device *dev,
863 struct ethtool_drvinfo *info)
865 strcpy(info->driver, DRV_NAME);
866 strcpy(info->version, DRV_VERSION);
867 sprintf(info->bus_info, "PCMCIA 0x%lx", dev->base_addr);
870 static const struct ethtool_ops netdev_ethtool_ops = {
871 .get_drvinfo = netdev_get_drvinfo,
874 /* ----------------------------------------------------------------------------
876 This routine begins the packet transmit function. When completed,
877 it will generate a transmit interrupt.
879 According to /usr/src/linux/net/inet/dev.c, if _start_xmit
880 returns 0, the "packet is now solely the responsibility of the
881 driver." If _start_xmit returns non-zero, the "transmission
882 failed, put skb back into a list."
883 ---------------------------------------------------------------------------- */
885 static void mace_tx_timeout(struct net_device *dev)
887 mace_private *lp = netdev_priv(dev);
888 struct pcmcia_device *link = lp->p_dev;
890 printk(KERN_NOTICE "%s: transmit timed out -- ", dev->name);
892 printk("resetting card\n");
893 pcmcia_reset_card(link->socket);
894 #else /* #if RESET_ON_TIMEOUT */
895 printk("NOT resetting card\n");
896 #endif /* #if RESET_ON_TIMEOUT */
897 dev->trans_start = jiffies; /* prevent tx timeout */
898 netif_wake_queue(dev);
901 static netdev_tx_t mace_start_xmit(struct sk_buff *skb,
902 struct net_device *dev)
904 mace_private *lp = netdev_priv(dev);
905 unsigned int ioaddr = dev->base_addr;
907 netif_stop_queue(dev);
909 pr_debug("%s: mace_start_xmit(length = %ld) called.\n",
910 dev->name, (long)skb->len);
912 #if (!TX_INTERRUPTABLE)
913 /* Disable MACE TX interrupts. */
914 outb(MACE_IMR_DEFAULT | MACE_IR_XMTINT,
915 ioaddr + AM2150_MACE_BASE + MACE_IMR);
916 lp->tx_irq_disabled=1;
917 #endif /* #if (!TX_INTERRUPTABLE) */
920 /* This block must not be interrupted by another transmit request!
921 mace_tx_timeout will take care of timer-based retransmissions from
922 the upper layers. The interrupt handler is guaranteed never to
923 service a transmit interrupt while we are in here.
926 lp->linux_stats.tx_bytes += skb->len;
927 lp->tx_free_frames--;
929 /* WARNING: Write the _exact_ number of bytes written in the header! */
930 /* Put out the word header [must be an outw()] . . . */
931 outw(skb->len, ioaddr + AM2150_XMT);
932 /* . . . and the packet [may be any combination of outw() and outb()] */
933 outsw(ioaddr + AM2150_XMT, skb->data, skb->len >> 1);
935 /* Odd byte transfer */
936 outb(skb->data[skb->len-1], ioaddr + AM2150_XMT);
940 if (lp->tx_free_frames > 0)
941 netif_start_queue(dev);
942 #endif /* #if MULTI_TX */
945 #if (!TX_INTERRUPTABLE)
946 /* Re-enable MACE TX interrupts. */
947 lp->tx_irq_disabled=0;
948 outb(MACE_IMR_DEFAULT, ioaddr + AM2150_MACE_BASE + MACE_IMR);
949 #endif /* #if (!TX_INTERRUPTABLE) */
954 } /* mace_start_xmit */
956 /* ----------------------------------------------------------------------------
958 The interrupt handler.
959 ---------------------------------------------------------------------------- */
960 static irqreturn_t mace_interrupt(int irq, void *dev_id)
962 struct net_device *dev = (struct net_device *) dev_id;
963 mace_private *lp = netdev_priv(dev);
966 int IntrCnt = MACE_MAX_IR_ITERATIONS;
969 pr_debug("mace_interrupt(): irq 0x%X for unknown device.\n",
974 ioaddr = dev->base_addr;
976 if (lp->tx_irq_disabled) {
978 (lp->tx_irq_disabled?
979 KERN_NOTICE "%s: Interrupt with tx_irq_disabled "
980 "[isr=%02X, imr=%02X]\n":
981 KERN_NOTICE "%s: Re-entering the interrupt handler "
982 "[isr=%02X, imr=%02X]\n"),
984 inb(ioaddr + AM2150_MACE_BASE + MACE_IR),
985 inb(ioaddr + AM2150_MACE_BASE + MACE_IMR)
987 /* WARNING: MACE_IR has been read! */
991 if (!netif_device_present(dev)) {
992 pr_debug("%s: interrupt from dead card\n", dev->name);
997 /* WARNING: MACE_IR is a READ/CLEAR port! */
998 status = inb(ioaddr + AM2150_MACE_BASE + MACE_IR);
1000 pr_debug("mace_interrupt: irq 0x%X status 0x%X.\n", irq, status);
1002 if (status & MACE_IR_RCVINT) {
1003 mace_rx(dev, MACE_MAX_RX_ITERATIONS);
1006 if (status & MACE_IR_XMTINT) {
1007 unsigned char fifofc;
1008 unsigned char xmtrc;
1009 unsigned char xmtfs;
1011 fifofc = inb(ioaddr + AM2150_MACE_BASE + MACE_FIFOFC);
1012 if ((fifofc & MACE_FIFOFC_XMTFC)==0) {
1013 lp->linux_stats.tx_errors++;
1014 outb(0xFF, ioaddr + AM2150_XMT_SKIP);
1017 /* Transmit Retry Count (XMTRC, reg 4) */
1018 xmtrc = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTRC);
1019 if (xmtrc & MACE_XMTRC_EXDEF) lp->mace_stats.exdef++;
1020 lp->mace_stats.xmtrc += (xmtrc & MACE_XMTRC_XMTRC);
1023 (xmtfs = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTFS)) &
1024 MACE_XMTFS_XMTSV /* Transmit Status Valid */
1026 lp->mace_stats.xmtsv++;
1028 if (xmtfs & ~MACE_XMTFS_XMTSV) {
1029 if (xmtfs & MACE_XMTFS_UFLO) {
1030 /* Underflow. Indicates that the Transmit FIFO emptied before
1031 the end of frame was reached. */
1032 lp->mace_stats.uflo++;
1034 if (xmtfs & MACE_XMTFS_LCOL) {
1035 /* Late Collision */
1036 lp->mace_stats.lcol++;
1038 if (xmtfs & MACE_XMTFS_MORE) {
1039 /* MORE than one retry was needed */
1040 lp->mace_stats.more++;
1042 if (xmtfs & MACE_XMTFS_ONE) {
1043 /* Exactly ONE retry occurred */
1044 lp->mace_stats.one++;
1046 if (xmtfs & MACE_XMTFS_DEFER) {
1047 /* Transmission was defered */
1048 lp->mace_stats.defer++;
1050 if (xmtfs & MACE_XMTFS_LCAR) {
1051 /* Loss of carrier */
1052 lp->mace_stats.lcar++;
1054 if (xmtfs & MACE_XMTFS_RTRY) {
1055 /* Retry error: transmit aborted after 16 attempts */
1056 lp->mace_stats.rtry++;
1058 } /* if (xmtfs & ~MACE_XMTFS_XMTSV) */
1060 } /* if (xmtfs & MACE_XMTFS_XMTSV) */
1062 lp->linux_stats.tx_packets++;
1063 lp->tx_free_frames++;
1064 netif_wake_queue(dev);
1065 } /* if (status & MACE_IR_XMTINT) */
1067 if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) {
1068 if (status & MACE_IR_JAB) {
1069 /* Jabber Error. Excessive transmit duration (20-150ms). */
1070 lp->mace_stats.jab++;
1072 if (status & MACE_IR_BABL) {
1073 /* Babble Error. >1518 bytes transmitted. */
1074 lp->mace_stats.babl++;
1076 if (status & MACE_IR_CERR) {
1077 /* Collision Error. CERR indicates the absence of the
1078 Signal Quality Error Test message after a packet
1080 lp->mace_stats.cerr++;
1082 if (status & MACE_IR_RCVCCO) {
1083 /* Receive Collision Count Overflow; */
1084 lp->mace_stats.rcvcco++;
1086 if (status & MACE_IR_RNTPCO) {
1087 /* Runt Packet Count Overflow */
1088 lp->mace_stats.rntpco++;
1090 if (status & MACE_IR_MPCO) {
1091 /* Missed Packet Count Overflow */
1092 lp->mace_stats.mpco++;
1094 } /* if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) */
1096 } while ((status & ~MACE_IMR_DEFAULT) && (--IntrCnt));
1099 } /* mace_interrupt */
1101 /* ----------------------------------------------------------------------------
1104 ---------------------------------------------------------------------------- */
1105 static int mace_rx(struct net_device *dev, unsigned char RxCnt)
1107 mace_private *lp = netdev_priv(dev);
1108 unsigned int ioaddr = dev->base_addr;
1109 unsigned char rx_framecnt;
1110 unsigned short rx_status;
1113 ((rx_framecnt = inb(ioaddr + AM2150_RCV_FRAME_COUNT)) > 0) &&
1114 (rx_framecnt <= 12) && /* rx_framecnt==0xFF if card is extracted. */
1117 rx_status = inw(ioaddr + AM2150_RCV);
1119 pr_debug("%s: in mace_rx(), framecnt 0x%X, rx_status"
1120 " 0x%X.\n", dev->name, rx_framecnt, rx_status);
1122 if (rx_status & MACE_RCVFS_RCVSTS) { /* Error, update stats. */
1123 lp->linux_stats.rx_errors++;
1124 if (rx_status & MACE_RCVFS_OFLO) {
1125 lp->mace_stats.oflo++;
1127 if (rx_status & MACE_RCVFS_CLSN) {
1128 lp->mace_stats.clsn++;
1130 if (rx_status & MACE_RCVFS_FRAM) {
1131 lp->mace_stats.fram++;
1133 if (rx_status & MACE_RCVFS_FCS) {
1134 lp->mace_stats.fcs++;
1137 short pkt_len = (rx_status & ~MACE_RCVFS_RCVSTS) - 4;
1138 /* Auto Strip is off, always subtract 4 */
1139 struct sk_buff *skb;
1141 lp->mace_stats.rfs_rntpc += inb(ioaddr + AM2150_RCV);
1142 /* runt packet count */
1143 lp->mace_stats.rfs_rcvcc += inb(ioaddr + AM2150_RCV);
1144 /* rcv collision count */
1146 pr_debug(" receiving packet size 0x%X rx_status"
1147 " 0x%X.\n", pkt_len, rx_status);
1149 skb = dev_alloc_skb(pkt_len+2);
1152 skb_reserve(skb, 2);
1153 insw(ioaddr + AM2150_RCV, skb_put(skb, pkt_len), pkt_len>>1);
1155 *(skb_tail_pointer(skb) - 1) = inb(ioaddr + AM2150_RCV);
1156 skb->protocol = eth_type_trans(skb, dev);
1158 netif_rx(skb); /* Send the packet to the upper (protocol) layers. */
1160 lp->linux_stats.rx_packets++;
1161 lp->linux_stats.rx_bytes += pkt_len;
1162 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1165 pr_debug("%s: couldn't allocate a sk_buff of size"
1166 " %d.\n", dev->name, pkt_len);
1167 lp->linux_stats.rx_dropped++;
1170 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1176 /* ----------------------------------------------------------------------------
1178 ---------------------------------------------------------------------------- */
1179 static void pr_linux_stats(struct net_device_stats *pstats)
1181 pr_debug("pr_linux_stats\n");
1182 pr_debug(" rx_packets=%-7ld tx_packets=%ld\n",
1183 (long)pstats->rx_packets, (long)pstats->tx_packets);
1184 pr_debug(" rx_errors=%-7ld tx_errors=%ld\n",
1185 (long)pstats->rx_errors, (long)pstats->tx_errors);
1186 pr_debug(" rx_dropped=%-7ld tx_dropped=%ld\n",
1187 (long)pstats->rx_dropped, (long)pstats->tx_dropped);
1188 pr_debug(" multicast=%-7ld collisions=%ld\n",
1189 (long)pstats->multicast, (long)pstats->collisions);
1191 pr_debug(" rx_length_errors=%-7ld rx_over_errors=%ld\n",
1192 (long)pstats->rx_length_errors, (long)pstats->rx_over_errors);
1193 pr_debug(" rx_crc_errors=%-7ld rx_frame_errors=%ld\n",
1194 (long)pstats->rx_crc_errors, (long)pstats->rx_frame_errors);
1195 pr_debug(" rx_fifo_errors=%-7ld rx_missed_errors=%ld\n",
1196 (long)pstats->rx_fifo_errors, (long)pstats->rx_missed_errors);
1198 pr_debug(" tx_aborted_errors=%-7ld tx_carrier_errors=%ld\n",
1199 (long)pstats->tx_aborted_errors, (long)pstats->tx_carrier_errors);
1200 pr_debug(" tx_fifo_errors=%-7ld tx_heartbeat_errors=%ld\n",
1201 (long)pstats->tx_fifo_errors, (long)pstats->tx_heartbeat_errors);
1202 pr_debug(" tx_window_errors=%ld\n",
1203 (long)pstats->tx_window_errors);
1204 } /* pr_linux_stats */
1206 /* ----------------------------------------------------------------------------
1208 ---------------------------------------------------------------------------- */
1209 static void pr_mace_stats(mace_statistics *pstats)
1211 pr_debug("pr_mace_stats\n");
1213 pr_debug(" xmtsv=%-7d uflo=%d\n",
1214 pstats->xmtsv, pstats->uflo);
1215 pr_debug(" lcol=%-7d more=%d\n",
1216 pstats->lcol, pstats->more);
1217 pr_debug(" one=%-7d defer=%d\n",
1218 pstats->one, pstats->defer);
1219 pr_debug(" lcar=%-7d rtry=%d\n",
1220 pstats->lcar, pstats->rtry);
1223 pr_debug(" exdef=%-7d xmtrc=%d\n",
1224 pstats->exdef, pstats->xmtrc);
1226 /* RFS1--Receive Status (RCVSTS) */
1227 pr_debug(" oflo=%-7d clsn=%d\n",
1228 pstats->oflo, pstats->clsn);
1229 pr_debug(" fram=%-7d fcs=%d\n",
1230 pstats->fram, pstats->fcs);
1232 /* RFS2--Runt Packet Count (RNTPC) */
1233 /* RFS3--Receive Collision Count (RCVCC) */
1234 pr_debug(" rfs_rntpc=%-7d rfs_rcvcc=%d\n",
1235 pstats->rfs_rntpc, pstats->rfs_rcvcc);
1238 pr_debug(" jab=%-7d babl=%d\n",
1239 pstats->jab, pstats->babl);
1240 pr_debug(" cerr=%-7d rcvcco=%d\n",
1241 pstats->cerr, pstats->rcvcco);
1242 pr_debug(" rntpco=%-7d mpco=%d\n",
1243 pstats->rntpco, pstats->mpco);
1246 pr_debug(" mpc=%d\n", pstats->mpc);
1249 pr_debug(" rntpc=%d\n", pstats->rntpc);
1252 pr_debug(" rcvcc=%d\n", pstats->rcvcc);
1254 } /* pr_mace_stats */
1256 /* ----------------------------------------------------------------------------
1258 Update statistics. We change to register window 1, so this
1259 should be run single-threaded if the device is active. This is
1260 expected to be a rare operation, and it's simpler for the rest
1261 of the driver to assume that window 0 is always valid rather
1262 than use a special window-state variable.
1264 oflo & uflo should _never_ occur since it would mean the Xilinx
1265 was not able to transfer data between the MACE FIFO and the
1266 card's SRAM fast enough. If this happens, something is
1267 seriously wrong with the hardware.
1268 ---------------------------------------------------------------------------- */
1269 static void update_stats(unsigned int ioaddr, struct net_device *dev)
1271 mace_private *lp = netdev_priv(dev);
1273 lp->mace_stats.rcvcc += mace_read(lp, ioaddr, MACE_RCVCC);
1274 lp->mace_stats.rntpc += mace_read(lp, ioaddr, MACE_RNTPC);
1275 lp->mace_stats.mpc += mace_read(lp, ioaddr, MACE_MPC);
1276 /* At this point, mace_stats is fully updated for this call.
1277 We may now update the linux_stats. */
1279 /* The MACE has no equivalent for linux_stats field which are commented
1282 /* lp->linux_stats.multicast; */
1283 lp->linux_stats.collisions =
1284 lp->mace_stats.rcvcco * 256 + lp->mace_stats.rcvcc;
1285 /* Collision: The MACE may retry sending a packet 15 times
1286 before giving up. The retry count is in XMTRC.
1287 Does each retry constitute a collision?
1288 If so, why doesn't the RCVCC record these collisions? */
1290 /* detailed rx_errors: */
1291 lp->linux_stats.rx_length_errors =
1292 lp->mace_stats.rntpco * 256 + lp->mace_stats.rntpc;
1293 /* lp->linux_stats.rx_over_errors */
1294 lp->linux_stats.rx_crc_errors = lp->mace_stats.fcs;
1295 lp->linux_stats.rx_frame_errors = lp->mace_stats.fram;
1296 lp->linux_stats.rx_fifo_errors = lp->mace_stats.oflo;
1297 lp->linux_stats.rx_missed_errors =
1298 lp->mace_stats.mpco * 256 + lp->mace_stats.mpc;
1300 /* detailed tx_errors */
1301 lp->linux_stats.tx_aborted_errors = lp->mace_stats.rtry;
1302 lp->linux_stats.tx_carrier_errors = lp->mace_stats.lcar;
1303 /* LCAR usually results from bad cabling. */
1304 lp->linux_stats.tx_fifo_errors = lp->mace_stats.uflo;
1305 lp->linux_stats.tx_heartbeat_errors = lp->mace_stats.cerr;
1306 /* lp->linux_stats.tx_window_errors; */
1307 } /* update_stats */
1309 /* ----------------------------------------------------------------------------
1311 Gathers ethernet statistics from the MACE chip.
1312 ---------------------------------------------------------------------------- */
1313 static struct net_device_stats *mace_get_stats(struct net_device *dev)
1315 mace_private *lp = netdev_priv(dev);
1317 update_stats(dev->base_addr, dev);
1319 pr_debug("%s: updating the statistics.\n", dev->name);
1320 pr_linux_stats(&lp->linux_stats);
1321 pr_mace_stats(&lp->mace_stats);
1323 return &lp->linux_stats;
1324 } /* net_device_stats */
1326 /* ----------------------------------------------------------------------------
1328 Modified from Am79C90 data sheet.
1329 ---------------------------------------------------------------------------- */
1331 #ifdef BROKEN_MULTICAST
1333 static void updateCRC(int *CRC, int bit)
1340 }; /* CRC polynomial. poly[n] = coefficient of the x**n term of the
1341 CRC generator polynomial. */
1345 /* shift CRC and control bit (CRC[32]) */
1346 for (j = 32; j > 0; j--)
1350 /* If bit XOR(control bit) = 1, set CRC = CRC XOR polynomial. */
1352 for (j = 0; j < 32; j++)
1356 /* ----------------------------------------------------------------------------
1358 Build logical address filter.
1359 Modified from Am79C90 data sheet.
1362 ladrf: logical address filter (contents initialized to 0)
1363 adr: ethernet address
1364 ---------------------------------------------------------------------------- */
1365 static void BuildLAF(int *ladrf, int *adr)
1367 int CRC[33]={1}; /* CRC register, 1 word/bit + extra control bit */
1369 int i, byte; /* temporary array indices */
1370 int hashcode; /* the output object */
1374 for (byte = 0; byte < 6; byte++)
1375 for (i = 0; i < 8; i++)
1376 updateCRC(CRC, (adr[byte] >> i) & 1);
1379 for (i = 0; i < 6; i++)
1380 hashcode = (hashcode << 1) + CRC[i];
1382 byte = hashcode >> 3;
1383 ladrf[byte] |= (1 << (hashcode & 7));
1387 printk(KERN_DEBUG " adr =%pM\n", adr);
1388 printk(KERN_DEBUG " hashcode = %d(decimal), ladrf[0:63] =", hashcode);
1389 for (i = 0; i < 8; i++)
1390 printk(KERN_CONT " %02X", ladrf[i]);
1391 printk(KERN_CONT "\n");
1395 /* ----------------------------------------------------------------------------
1396 restore_multicast_list
1397 Restores the multicast filter for MACE chip to the last
1398 set_multicast_list() call.
1403 ---------------------------------------------------------------------------- */
1404 static void restore_multicast_list(struct net_device *dev)
1406 mace_private *lp = netdev_priv(dev);
1407 int num_addrs = lp->multicast_num_addrs;
1408 int *ladrf = lp->multicast_ladrf;
1409 unsigned int ioaddr = dev->base_addr;
1412 pr_debug("%s: restoring Rx mode to %d addresses.\n",
1413 dev->name, num_addrs);
1415 if (num_addrs > 0) {
1417 pr_debug("Attempt to restore multicast list detected.\n");
1419 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_LOGADDR);
1420 /* Poll ADDRCHG bit */
1421 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
1423 /* Set LADRF register */
1424 for (i = 0; i < MACE_LADRF_LEN; i++)
1425 mace_write(lp, ioaddr, MACE_LADRF, ladrf[i]);
1427 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_RCVFCSE | MACE_UTR_LOOP_EXTERNAL);
1428 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1430 } else if (num_addrs < 0) {
1432 /* Promiscuous mode: receive all packets */
1433 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1434 mace_write(lp, ioaddr, MACE_MACCC,
1435 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1441 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1442 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1445 } /* restore_multicast_list */
1447 /* ----------------------------------------------------------------------------
1449 Set or clear the multicast filter for this adaptor.
1452 num_addrs == -1 Promiscuous mode, receive all packets
1453 num_addrs == 0 Normal mode, clear multicast list
1454 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1455 best-effort filtering.
1459 ---------------------------------------------------------------------------- */
1461 static void set_multicast_list(struct net_device *dev)
1463 mace_private *lp = netdev_priv(dev);
1464 int adr[ETHER_ADDR_LEN] = {0}; /* Ethernet address */
1465 struct netdev_hw_addr *ha;
1470 if (netdev_mc_count(dev) != old) {
1471 old = netdev_mc_count(dev);
1472 pr_debug("%s: setting Rx mode to %d addresses.\n",
1478 /* Set multicast_num_addrs. */
1479 lp->multicast_num_addrs = netdev_mc_count(dev);
1481 /* Set multicast_ladrf. */
1482 if (num_addrs > 0) {
1483 /* Calculate multicast logical address filter */
1484 memset(lp->multicast_ladrf, 0, MACE_LADRF_LEN);
1485 netdev_for_each_mc_addr(ha, dev) {
1486 memcpy(adr, ha->addr, ETHER_ADDR_LEN);
1487 BuildLAF(lp->multicast_ladrf, adr);
1491 restore_multicast_list(dev);
1493 } /* set_multicast_list */
1495 #endif /* BROKEN_MULTICAST */
1497 static void restore_multicast_list(struct net_device *dev)
1499 unsigned int ioaddr = dev->base_addr;
1500 mace_private *lp = netdev_priv(dev);
1502 pr_debug("%s: restoring Rx mode to %d addresses.\n", dev->name,
1503 lp->multicast_num_addrs);
1505 if (dev->flags & IFF_PROMISC) {
1506 /* Promiscuous mode: receive all packets */
1507 mace_write(lp,ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1508 mace_write(lp, ioaddr, MACE_MACCC,
1509 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1513 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1514 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1516 } /* restore_multicast_list */
1518 static void set_multicast_list(struct net_device *dev)
1520 mace_private *lp = netdev_priv(dev);
1525 if (netdev_mc_count(dev) != old) {
1526 old = netdev_mc_count(dev);
1527 pr_debug("%s: setting Rx mode to %d addresses.\n",
1533 lp->multicast_num_addrs = netdev_mc_count(dev);
1534 restore_multicast_list(dev);
1536 } /* set_multicast_list */
1538 static struct pcmcia_device_id nmclan_ids[] = {
1539 PCMCIA_DEVICE_PROD_ID12("New Media Corporation", "Ethernet", 0x085a850b, 0x00b2e941),
1540 PCMCIA_DEVICE_PROD_ID12("Portable Add-ons", "Ethernet+", 0xebf1d60, 0xad673aaf),
1543 MODULE_DEVICE_TABLE(pcmcia, nmclan_ids);
1545 static struct pcmcia_driver nmclan_cs_driver = {
1546 .owner = THIS_MODULE,
1548 .name = "nmclan_cs",
1550 .probe = nmclan_probe,
1551 .remove = nmclan_detach,
1552 .id_table = nmclan_ids,
1553 .suspend = nmclan_suspend,
1554 .resume = nmclan_resume,
1557 static int __init init_nmclan_cs(void)
1559 return pcmcia_register_driver(&nmclan_cs_driver);
1562 static void __exit exit_nmclan_cs(void)
1564 pcmcia_unregister_driver(&nmclan_cs_driver);
1567 module_init(init_nmclan_cs);
1568 module_exit(exit_nmclan_cs);