1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2009 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include "net_driver.h"
30 #include "workarounds.h"
32 /**************************************************************************
36 **************************************************************************
39 /* Loopback mode names (see LOOPBACK_MODE()) */
40 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
41 const char *efx_loopback_mode_names[] = {
42 [LOOPBACK_NONE] = "NONE",
43 [LOOPBACK_DATA] = "DATAPATH",
44 [LOOPBACK_GMAC] = "GMAC",
45 [LOOPBACK_XGMII] = "XGMII",
46 [LOOPBACK_XGXS] = "XGXS",
47 [LOOPBACK_XAUI] = "XAUI",
48 [LOOPBACK_GMII] = "GMII",
49 [LOOPBACK_SGMII] = "SGMII",
50 [LOOPBACK_XGBR] = "XGBR",
51 [LOOPBACK_XFI] = "XFI",
52 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
53 [LOOPBACK_GMII_FAR] = "GMII_FAR",
54 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
55 [LOOPBACK_XFI_FAR] = "XFI_FAR",
56 [LOOPBACK_GPHY] = "GPHY",
57 [LOOPBACK_PHYXS] = "PHYXS",
58 [LOOPBACK_PCS] = "PCS",
59 [LOOPBACK_PMAPMD] = "PMA/PMD",
60 [LOOPBACK_XPORT] = "XPORT",
61 [LOOPBACK_XGMII_WS] = "XGMII_WS",
62 [LOOPBACK_XAUI_WS] = "XAUI_WS",
63 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
64 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
65 [LOOPBACK_GMII_WS] = "GMII_WS",
66 [LOOPBACK_XFI_WS] = "XFI_WS",
67 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
68 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
71 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
72 const char *efx_reset_type_names[] = {
73 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
74 [RESET_TYPE_ALL] = "ALL",
75 [RESET_TYPE_WORLD] = "WORLD",
76 [RESET_TYPE_DISABLE] = "DISABLE",
77 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
78 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
79 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
80 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
81 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
82 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
83 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
86 #define EFX_MAX_MTU (9 * 1024)
88 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
89 * queued onto this work queue. This is not a per-nic work queue, because
90 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
92 static struct workqueue_struct *reset_workqueue;
94 /**************************************************************************
98 *************************************************************************/
101 * Use separate channels for TX and RX events
103 * Set this to 1 to use separate channels for TX and RX. It allows us
104 * to control interrupt affinity separately for TX and RX.
106 * This is only used in MSI-X interrupt mode
108 static unsigned int separate_tx_channels;
109 module_param(separate_tx_channels, uint, 0444);
110 MODULE_PARM_DESC(separate_tx_channels,
111 "Use separate channels for TX and RX");
113 /* This is the weight assigned to each of the (per-channel) virtual
116 static int napi_weight = 64;
118 /* This is the time (in jiffies) between invocations of the hardware
119 * monitor. On Falcon-based NICs, this will:
120 * - Check the on-board hardware monitor;
121 * - Poll the link state and reconfigure the hardware as necessary.
123 static unsigned int efx_monitor_interval = 1 * HZ;
125 /* This controls whether or not the driver will initialise devices
126 * with invalid MAC addresses stored in the EEPROM or flash. If true,
127 * such devices will be initialised with a random locally-generated
128 * MAC address. This allows for loading the sfc_mtd driver to
129 * reprogram the flash, even if the flash contents (including the MAC
130 * address) have previously been erased.
132 static unsigned int allow_bad_hwaddr;
134 /* Initial interrupt moderation settings. They can be modified after
135 * module load with ethtool.
137 * The default for RX should strike a balance between increasing the
138 * round-trip latency and reducing overhead.
140 static unsigned int rx_irq_mod_usec = 60;
142 /* Initial interrupt moderation settings. They can be modified after
143 * module load with ethtool.
145 * This default is chosen to ensure that a 10G link does not go idle
146 * while a TX queue is stopped after it has become full. A queue is
147 * restarted when it drops below half full. The time this takes (assuming
148 * worst case 3 descriptors per packet and 1024 descriptors) is
149 * 512 / 3 * 1.2 = 205 usec.
151 static unsigned int tx_irq_mod_usec = 150;
153 /* This is the first interrupt mode to try out of:
158 static unsigned int interrupt_mode;
160 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
161 * i.e. the number of CPUs among which we may distribute simultaneous
162 * interrupt handling.
164 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
165 * The default (0) means to assign an interrupt to each package (level II cache)
167 static unsigned int rss_cpus;
168 module_param(rss_cpus, uint, 0444);
169 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
171 static int phy_flash_cfg;
172 module_param(phy_flash_cfg, int, 0644);
173 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
175 static unsigned irq_adapt_low_thresh = 10000;
176 module_param(irq_adapt_low_thresh, uint, 0644);
177 MODULE_PARM_DESC(irq_adapt_low_thresh,
178 "Threshold score for reducing IRQ moderation");
180 static unsigned irq_adapt_high_thresh = 20000;
181 module_param(irq_adapt_high_thresh, uint, 0644);
182 MODULE_PARM_DESC(irq_adapt_high_thresh,
183 "Threshold score for increasing IRQ moderation");
185 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
186 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
187 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
188 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
189 module_param(debug, uint, 0);
190 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
192 /**************************************************************************
194 * Utility functions and prototypes
196 *************************************************************************/
198 static void efx_remove_channels(struct efx_nic *efx);
199 static void efx_remove_port(struct efx_nic *efx);
200 static void efx_init_napi(struct efx_nic *efx);
201 static void efx_fini_napi(struct efx_nic *efx);
202 static void efx_fini_napi_channel(struct efx_channel *channel);
203 static void efx_fini_struct(struct efx_nic *efx);
204 static void efx_start_all(struct efx_nic *efx);
205 static void efx_stop_all(struct efx_nic *efx);
207 #define EFX_ASSERT_RESET_SERIALISED(efx) \
209 if ((efx->state == STATE_RUNNING) || \
210 (efx->state == STATE_DISABLED)) \
214 /**************************************************************************
216 * Event queue processing
218 *************************************************************************/
220 /* Process channel's event queue
222 * This function is responsible for processing the event queue of a
223 * single channel. The caller must guarantee that this function will
224 * never be concurrently called more than once on the same channel,
225 * though different channels may be being processed concurrently.
227 static int efx_process_channel(struct efx_channel *channel, int budget)
229 struct efx_nic *efx = channel->efx;
232 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
236 spent = efx_nic_process_eventq(channel, budget);
240 /* Deliver last RX packet. */
241 if (channel->rx_pkt) {
242 __efx_rx_packet(channel, channel->rx_pkt,
243 channel->rx_pkt_csummed);
244 channel->rx_pkt = NULL;
247 efx_rx_strategy(channel);
249 efx_fast_push_rx_descriptors(efx_channel_get_rx_queue(channel));
254 /* Mark channel as finished processing
256 * Note that since we will not receive further interrupts for this
257 * channel before we finish processing and call the eventq_read_ack()
258 * method, there is no need to use the interrupt hold-off timers.
260 static inline void efx_channel_processed(struct efx_channel *channel)
262 /* The interrupt handler for this channel may set work_pending
263 * as soon as we acknowledge the events we've seen. Make sure
264 * it's cleared before then. */
265 channel->work_pending = false;
268 efx_nic_eventq_read_ack(channel);
273 * NAPI guarantees serialisation of polls of the same device, which
274 * provides the guarantee required by efx_process_channel().
276 static int efx_poll(struct napi_struct *napi, int budget)
278 struct efx_channel *channel =
279 container_of(napi, struct efx_channel, napi_str);
280 struct efx_nic *efx = channel->efx;
283 netif_vdbg(efx, intr, efx->net_dev,
284 "channel %d NAPI poll executing on CPU %d\n",
285 channel->channel, raw_smp_processor_id());
287 spent = efx_process_channel(channel, budget);
289 if (spent < budget) {
290 if (channel->channel < efx->n_rx_channels &&
291 efx->irq_rx_adaptive &&
292 unlikely(++channel->irq_count == 1000)) {
293 if (unlikely(channel->irq_mod_score <
294 irq_adapt_low_thresh)) {
295 if (channel->irq_moderation > 1) {
296 channel->irq_moderation -= 1;
297 efx->type->push_irq_moderation(channel);
299 } else if (unlikely(channel->irq_mod_score >
300 irq_adapt_high_thresh)) {
301 if (channel->irq_moderation <
302 efx->irq_rx_moderation) {
303 channel->irq_moderation += 1;
304 efx->type->push_irq_moderation(channel);
307 channel->irq_count = 0;
308 channel->irq_mod_score = 0;
311 /* There is no race here; although napi_disable() will
312 * only wait for napi_complete(), this isn't a problem
313 * since efx_channel_processed() will have no effect if
314 * interrupts have already been disabled.
317 efx_channel_processed(channel);
323 /* Process the eventq of the specified channel immediately on this CPU
325 * Disable hardware generated interrupts, wait for any existing
326 * processing to finish, then directly poll (and ack ) the eventq.
327 * Finally reenable NAPI and interrupts.
329 * Since we are touching interrupts the caller should hold the suspend lock
331 void efx_process_channel_now(struct efx_channel *channel)
333 struct efx_nic *efx = channel->efx;
335 BUG_ON(channel->channel >= efx->n_channels);
336 BUG_ON(!channel->enabled);
338 /* Disable interrupts and wait for ISRs to complete */
339 efx_nic_disable_interrupts(efx);
340 if (efx->legacy_irq) {
341 synchronize_irq(efx->legacy_irq);
342 efx->legacy_irq_enabled = false;
345 synchronize_irq(channel->irq);
347 /* Wait for any NAPI processing to complete */
348 napi_disable(&channel->napi_str);
350 /* Poll the channel */
351 efx_process_channel(channel, channel->eventq_mask + 1);
353 /* Ack the eventq. This may cause an interrupt to be generated
354 * when they are reenabled */
355 efx_channel_processed(channel);
357 napi_enable(&channel->napi_str);
359 efx->legacy_irq_enabled = true;
360 efx_nic_enable_interrupts(efx);
363 /* Create event queue
364 * Event queue memory allocations are done only once. If the channel
365 * is reset, the memory buffer will be reused; this guards against
366 * errors during channel reset and also simplifies interrupt handling.
368 static int efx_probe_eventq(struct efx_channel *channel)
370 struct efx_nic *efx = channel->efx;
371 unsigned long entries;
373 netif_dbg(channel->efx, probe, channel->efx->net_dev,
374 "chan %d create event queue\n", channel->channel);
376 /* Build an event queue with room for one event per tx and rx buffer,
377 * plus some extra for link state events and MCDI completions. */
378 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
379 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
380 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
382 return efx_nic_probe_eventq(channel);
385 /* Prepare channel's event queue */
386 static void efx_init_eventq(struct efx_channel *channel)
388 netif_dbg(channel->efx, drv, channel->efx->net_dev,
389 "chan %d init event queue\n", channel->channel);
391 channel->eventq_read_ptr = 0;
393 efx_nic_init_eventq(channel);
396 static void efx_fini_eventq(struct efx_channel *channel)
398 netif_dbg(channel->efx, drv, channel->efx->net_dev,
399 "chan %d fini event queue\n", channel->channel);
401 efx_nic_fini_eventq(channel);
404 static void efx_remove_eventq(struct efx_channel *channel)
406 netif_dbg(channel->efx, drv, channel->efx->net_dev,
407 "chan %d remove event queue\n", channel->channel);
409 efx_nic_remove_eventq(channel);
412 /**************************************************************************
416 *************************************************************************/
418 /* Allocate and initialise a channel structure, optionally copying
419 * parameters (but not resources) from an old channel structure. */
420 static struct efx_channel *
421 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
423 struct efx_channel *channel;
424 struct efx_rx_queue *rx_queue;
425 struct efx_tx_queue *tx_queue;
429 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
433 *channel = *old_channel;
435 channel->napi_dev = NULL;
436 memset(&channel->eventq, 0, sizeof(channel->eventq));
438 rx_queue = &channel->rx_queue;
439 rx_queue->buffer = NULL;
440 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
442 for (j = 0; j < EFX_TXQ_TYPES; j++) {
443 tx_queue = &channel->tx_queue[j];
444 if (tx_queue->channel)
445 tx_queue->channel = channel;
446 tx_queue->buffer = NULL;
447 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
450 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
455 channel->channel = i;
457 for (j = 0; j < EFX_TXQ_TYPES; j++) {
458 tx_queue = &channel->tx_queue[j];
460 tx_queue->queue = i * EFX_TXQ_TYPES + j;
461 tx_queue->channel = channel;
465 spin_lock_init(&channel->tx_stop_lock);
466 atomic_set(&channel->tx_stop_count, 1);
468 rx_queue = &channel->rx_queue;
470 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
471 (unsigned long)rx_queue);
476 static int efx_probe_channel(struct efx_channel *channel)
478 struct efx_tx_queue *tx_queue;
479 struct efx_rx_queue *rx_queue;
482 netif_dbg(channel->efx, probe, channel->efx->net_dev,
483 "creating channel %d\n", channel->channel);
485 rc = efx_probe_eventq(channel);
489 efx_for_each_channel_tx_queue(tx_queue, channel) {
490 rc = efx_probe_tx_queue(tx_queue);
495 efx_for_each_channel_rx_queue(rx_queue, channel) {
496 rc = efx_probe_rx_queue(rx_queue);
501 channel->n_rx_frm_trunc = 0;
506 efx_for_each_channel_rx_queue(rx_queue, channel)
507 efx_remove_rx_queue(rx_queue);
509 efx_for_each_channel_tx_queue(tx_queue, channel)
510 efx_remove_tx_queue(tx_queue);
516 static void efx_set_channel_names(struct efx_nic *efx)
518 struct efx_channel *channel;
519 const char *type = "";
522 efx_for_each_channel(channel, efx) {
523 number = channel->channel;
524 if (efx->n_channels > efx->n_rx_channels) {
525 if (channel->channel < efx->n_rx_channels) {
529 number -= efx->n_rx_channels;
532 snprintf(efx->channel_name[channel->channel],
533 sizeof(efx->channel_name[0]),
534 "%s%s-%d", efx->name, type, number);
538 static int efx_probe_channels(struct efx_nic *efx)
540 struct efx_channel *channel;
543 /* Restart special buffer allocation */
544 efx->next_buffer_table = 0;
546 efx_for_each_channel(channel, efx) {
547 rc = efx_probe_channel(channel);
549 netif_err(efx, probe, efx->net_dev,
550 "failed to create channel %d\n",
555 efx_set_channel_names(efx);
560 efx_remove_channels(efx);
564 /* Channels are shutdown and reinitialised whilst the NIC is running
565 * to propagate configuration changes (mtu, checksum offload), or
566 * to clear hardware error conditions
568 static void efx_init_channels(struct efx_nic *efx)
570 struct efx_tx_queue *tx_queue;
571 struct efx_rx_queue *rx_queue;
572 struct efx_channel *channel;
574 /* Calculate the rx buffer allocation parameters required to
575 * support the current MTU, including padding for header
576 * alignment and overruns.
578 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
579 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
580 efx->type->rx_buffer_hash_size +
581 efx->type->rx_buffer_padding);
582 efx->rx_buffer_order = get_order(efx->rx_buffer_len +
583 sizeof(struct efx_rx_page_state));
585 /* Initialise the channels */
586 efx_for_each_channel(channel, efx) {
587 netif_dbg(channel->efx, drv, channel->efx->net_dev,
588 "init chan %d\n", channel->channel);
590 efx_init_eventq(channel);
592 efx_for_each_channel_tx_queue(tx_queue, channel)
593 efx_init_tx_queue(tx_queue);
595 /* The rx buffer allocation strategy is MTU dependent */
596 efx_rx_strategy(channel);
598 efx_for_each_channel_rx_queue(rx_queue, channel)
599 efx_init_rx_queue(rx_queue);
601 WARN_ON(channel->rx_pkt != NULL);
602 efx_rx_strategy(channel);
606 /* This enables event queue processing and packet transmission.
608 * Note that this function is not allowed to fail, since that would
609 * introduce too much complexity into the suspend/resume path.
611 static void efx_start_channel(struct efx_channel *channel)
613 struct efx_rx_queue *rx_queue;
615 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
616 "starting chan %d\n", channel->channel);
618 /* The interrupt handler for this channel may set work_pending
619 * as soon as we enable it. Make sure it's cleared before
620 * then. Similarly, make sure it sees the enabled flag set. */
621 channel->work_pending = false;
622 channel->enabled = true;
625 /* Fill the queues before enabling NAPI */
626 efx_for_each_channel_rx_queue(rx_queue, channel)
627 efx_fast_push_rx_descriptors(rx_queue);
629 napi_enable(&channel->napi_str);
632 /* This disables event queue processing and packet transmission.
633 * This function does not guarantee that all queue processing
634 * (e.g. RX refill) is complete.
636 static void efx_stop_channel(struct efx_channel *channel)
638 if (!channel->enabled)
641 netif_dbg(channel->efx, ifdown, channel->efx->net_dev,
642 "stop chan %d\n", channel->channel);
644 channel->enabled = false;
645 napi_disable(&channel->napi_str);
648 static void efx_fini_channels(struct efx_nic *efx)
650 struct efx_channel *channel;
651 struct efx_tx_queue *tx_queue;
652 struct efx_rx_queue *rx_queue;
655 EFX_ASSERT_RESET_SERIALISED(efx);
656 BUG_ON(efx->port_enabled);
658 rc = efx_nic_flush_queues(efx);
659 if (rc && EFX_WORKAROUND_7803(efx)) {
660 /* Schedule a reset to recover from the flush failure. The
661 * descriptor caches reference memory we're about to free,
662 * but falcon_reconfigure_mac_wrapper() won't reconnect
663 * the MACs because of the pending reset. */
664 netif_err(efx, drv, efx->net_dev,
665 "Resetting to recover from flush failure\n");
666 efx_schedule_reset(efx, RESET_TYPE_ALL);
668 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
670 netif_dbg(efx, drv, efx->net_dev,
671 "successfully flushed all queues\n");
674 efx_for_each_channel(channel, efx) {
675 netif_dbg(channel->efx, drv, channel->efx->net_dev,
676 "shut down chan %d\n", channel->channel);
678 efx_for_each_channel_rx_queue(rx_queue, channel)
679 efx_fini_rx_queue(rx_queue);
680 efx_for_each_channel_tx_queue(tx_queue, channel)
681 efx_fini_tx_queue(tx_queue);
682 efx_fini_eventq(channel);
686 static void efx_remove_channel(struct efx_channel *channel)
688 struct efx_tx_queue *tx_queue;
689 struct efx_rx_queue *rx_queue;
691 netif_dbg(channel->efx, drv, channel->efx->net_dev,
692 "destroy chan %d\n", channel->channel);
694 efx_for_each_channel_rx_queue(rx_queue, channel)
695 efx_remove_rx_queue(rx_queue);
696 efx_for_each_channel_tx_queue(tx_queue, channel)
697 efx_remove_tx_queue(tx_queue);
698 efx_remove_eventq(channel);
701 static void efx_remove_channels(struct efx_nic *efx)
703 struct efx_channel *channel;
705 efx_for_each_channel(channel, efx)
706 efx_remove_channel(channel);
710 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
712 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
713 u32 old_rxq_entries, old_txq_entries;
718 efx_fini_channels(efx);
721 memset(other_channel, 0, sizeof(other_channel));
722 for (i = 0; i < efx->n_channels; i++) {
723 channel = efx_alloc_channel(efx, i, efx->channel[i]);
728 other_channel[i] = channel;
731 /* Swap entry counts and channel pointers */
732 old_rxq_entries = efx->rxq_entries;
733 old_txq_entries = efx->txq_entries;
734 efx->rxq_entries = rxq_entries;
735 efx->txq_entries = txq_entries;
736 for (i = 0; i < efx->n_channels; i++) {
737 channel = efx->channel[i];
738 efx->channel[i] = other_channel[i];
739 other_channel[i] = channel;
742 rc = efx_probe_channels(efx);
748 /* Destroy old channels */
749 for (i = 0; i < efx->n_channels; i++) {
750 efx_fini_napi_channel(other_channel[i]);
751 efx_remove_channel(other_channel[i]);
754 /* Free unused channel structures */
755 for (i = 0; i < efx->n_channels; i++)
756 kfree(other_channel[i]);
758 efx_init_channels(efx);
764 efx->rxq_entries = old_rxq_entries;
765 efx->txq_entries = old_txq_entries;
766 for (i = 0; i < efx->n_channels; i++) {
767 channel = efx->channel[i];
768 efx->channel[i] = other_channel[i];
769 other_channel[i] = channel;
774 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
776 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
779 /**************************************************************************
783 **************************************************************************/
785 /* This ensures that the kernel is kept informed (via
786 * netif_carrier_on/off) of the link status, and also maintains the
787 * link status's stop on the port's TX queue.
789 void efx_link_status_changed(struct efx_nic *efx)
791 struct efx_link_state *link_state = &efx->link_state;
793 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
794 * that no events are triggered between unregister_netdev() and the
795 * driver unloading. A more general condition is that NETDEV_CHANGE
796 * can only be generated between NETDEV_UP and NETDEV_DOWN */
797 if (!netif_running(efx->net_dev))
800 if (efx->port_inhibited) {
801 netif_carrier_off(efx->net_dev);
805 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
806 efx->n_link_state_changes++;
809 netif_carrier_on(efx->net_dev);
811 netif_carrier_off(efx->net_dev);
814 /* Status message for kernel log */
815 if (link_state->up) {
816 netif_info(efx, link, efx->net_dev,
817 "link up at %uMbps %s-duplex (MTU %d)%s\n",
818 link_state->speed, link_state->fd ? "full" : "half",
820 (efx->promiscuous ? " [PROMISC]" : ""));
822 netif_info(efx, link, efx->net_dev, "link down\n");
827 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
829 efx->link_advertising = advertising;
831 if (advertising & ADVERTISED_Pause)
832 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
834 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
835 if (advertising & ADVERTISED_Asym_Pause)
836 efx->wanted_fc ^= EFX_FC_TX;
840 void efx_link_set_wanted_fc(struct efx_nic *efx, enum efx_fc_type wanted_fc)
842 efx->wanted_fc = wanted_fc;
843 if (efx->link_advertising) {
844 if (wanted_fc & EFX_FC_RX)
845 efx->link_advertising |= (ADVERTISED_Pause |
846 ADVERTISED_Asym_Pause);
848 efx->link_advertising &= ~(ADVERTISED_Pause |
849 ADVERTISED_Asym_Pause);
850 if (wanted_fc & EFX_FC_TX)
851 efx->link_advertising ^= ADVERTISED_Asym_Pause;
855 static void efx_fini_port(struct efx_nic *efx);
857 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
858 * the MAC appropriately. All other PHY configuration changes are pushed
859 * through phy_op->set_settings(), and pushed asynchronously to the MAC
860 * through efx_monitor().
862 * Callers must hold the mac_lock
864 int __efx_reconfigure_port(struct efx_nic *efx)
866 enum efx_phy_mode phy_mode;
869 WARN_ON(!mutex_is_locked(&efx->mac_lock));
871 /* Serialise the promiscuous flag with efx_set_multicast_list. */
872 if (efx_dev_registered(efx)) {
873 netif_addr_lock_bh(efx->net_dev);
874 netif_addr_unlock_bh(efx->net_dev);
877 /* Disable PHY transmit in mac level loopbacks */
878 phy_mode = efx->phy_mode;
879 if (LOOPBACK_INTERNAL(efx))
880 efx->phy_mode |= PHY_MODE_TX_DISABLED;
882 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
884 rc = efx->type->reconfigure_port(efx);
887 efx->phy_mode = phy_mode;
892 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
894 int efx_reconfigure_port(struct efx_nic *efx)
898 EFX_ASSERT_RESET_SERIALISED(efx);
900 mutex_lock(&efx->mac_lock);
901 rc = __efx_reconfigure_port(efx);
902 mutex_unlock(&efx->mac_lock);
907 /* Asynchronous work item for changing MAC promiscuity and multicast
908 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
910 static void efx_mac_work(struct work_struct *data)
912 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
914 mutex_lock(&efx->mac_lock);
915 if (efx->port_enabled) {
916 efx->type->push_multicast_hash(efx);
917 efx->mac_op->reconfigure(efx);
919 mutex_unlock(&efx->mac_lock);
922 static int efx_probe_port(struct efx_nic *efx)
926 netif_dbg(efx, probe, efx->net_dev, "create port\n");
929 efx->phy_mode = PHY_MODE_SPECIAL;
931 /* Connect up MAC/PHY operations table */
932 rc = efx->type->probe_port(efx);
936 /* Sanity check MAC address */
937 if (is_valid_ether_addr(efx->mac_address)) {
938 memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN);
940 netif_err(efx, probe, efx->net_dev, "invalid MAC address %pM\n",
942 if (!allow_bad_hwaddr) {
946 random_ether_addr(efx->net_dev->dev_addr);
947 netif_info(efx, probe, efx->net_dev,
948 "using locally-generated MAC %pM\n",
949 efx->net_dev->dev_addr);
955 efx->type->remove_port(efx);
959 static int efx_init_port(struct efx_nic *efx)
963 netif_dbg(efx, drv, efx->net_dev, "init port\n");
965 mutex_lock(&efx->mac_lock);
967 rc = efx->phy_op->init(efx);
971 efx->port_initialized = true;
973 /* Reconfigure the MAC before creating dma queues (required for
974 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
975 efx->mac_op->reconfigure(efx);
977 /* Ensure the PHY advertises the correct flow control settings */
978 rc = efx->phy_op->reconfigure(efx);
982 mutex_unlock(&efx->mac_lock);
986 efx->phy_op->fini(efx);
988 mutex_unlock(&efx->mac_lock);
992 static void efx_start_port(struct efx_nic *efx)
994 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
995 BUG_ON(efx->port_enabled);
997 mutex_lock(&efx->mac_lock);
998 efx->port_enabled = true;
1000 /* efx_mac_work() might have been scheduled after efx_stop_port(),
1001 * and then cancelled by efx_flush_all() */
1002 efx->type->push_multicast_hash(efx);
1003 efx->mac_op->reconfigure(efx);
1005 mutex_unlock(&efx->mac_lock);
1008 /* Prevent efx_mac_work() and efx_monitor() from working */
1009 static void efx_stop_port(struct efx_nic *efx)
1011 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1013 mutex_lock(&efx->mac_lock);
1014 efx->port_enabled = false;
1015 mutex_unlock(&efx->mac_lock);
1017 /* Serialise against efx_set_multicast_list() */
1018 if (efx_dev_registered(efx)) {
1019 netif_addr_lock_bh(efx->net_dev);
1020 netif_addr_unlock_bh(efx->net_dev);
1024 static void efx_fini_port(struct efx_nic *efx)
1026 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1028 if (!efx->port_initialized)
1031 efx->phy_op->fini(efx);
1032 efx->port_initialized = false;
1034 efx->link_state.up = false;
1035 efx_link_status_changed(efx);
1038 static void efx_remove_port(struct efx_nic *efx)
1040 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1042 efx->type->remove_port(efx);
1045 /**************************************************************************
1049 **************************************************************************/
1051 /* This configures the PCI device to enable I/O and DMA. */
1052 static int efx_init_io(struct efx_nic *efx)
1054 struct pci_dev *pci_dev = efx->pci_dev;
1055 dma_addr_t dma_mask = efx->type->max_dma_mask;
1058 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1060 rc = pci_enable_device(pci_dev);
1062 netif_err(efx, probe, efx->net_dev,
1063 "failed to enable PCI device\n");
1067 pci_set_master(pci_dev);
1069 /* Set the PCI DMA mask. Try all possibilities from our
1070 * genuine mask down to 32 bits, because some architectures
1071 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1072 * masks event though they reject 46 bit masks.
1074 while (dma_mask > 0x7fffffffUL) {
1075 if (pci_dma_supported(pci_dev, dma_mask) &&
1076 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
1081 netif_err(efx, probe, efx->net_dev,
1082 "could not find a suitable DMA mask\n");
1085 netif_dbg(efx, probe, efx->net_dev,
1086 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1087 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
1089 /* pci_set_consistent_dma_mask() is not *allowed* to
1090 * fail with a mask that pci_set_dma_mask() accepted,
1091 * but just in case...
1093 netif_err(efx, probe, efx->net_dev,
1094 "failed to set consistent DMA mask\n");
1098 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1099 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1101 netif_err(efx, probe, efx->net_dev,
1102 "request for memory BAR failed\n");
1106 efx->membase = ioremap_nocache(efx->membase_phys,
1107 efx->type->mem_map_size);
1108 if (!efx->membase) {
1109 netif_err(efx, probe, efx->net_dev,
1110 "could not map memory BAR at %llx+%x\n",
1111 (unsigned long long)efx->membase_phys,
1112 efx->type->mem_map_size);
1116 netif_dbg(efx, probe, efx->net_dev,
1117 "memory BAR at %llx+%x (virtual %p)\n",
1118 (unsigned long long)efx->membase_phys,
1119 efx->type->mem_map_size, efx->membase);
1124 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1126 efx->membase_phys = 0;
1128 pci_disable_device(efx->pci_dev);
1133 static void efx_fini_io(struct efx_nic *efx)
1135 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1138 iounmap(efx->membase);
1139 efx->membase = NULL;
1142 if (efx->membase_phys) {
1143 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1144 efx->membase_phys = 0;
1147 pci_disable_device(efx->pci_dev);
1150 /* Get number of channels wanted. Each channel will have its own IRQ,
1151 * 1 RX queue and/or 2 TX queues. */
1152 static int efx_wanted_channels(void)
1154 cpumask_var_t core_mask;
1158 if (unlikely(!zalloc_cpumask_var(&core_mask, GFP_KERNEL))) {
1160 "sfc: RSS disabled due to allocation failure\n");
1165 for_each_online_cpu(cpu) {
1166 if (!cpumask_test_cpu(cpu, core_mask)) {
1168 cpumask_or(core_mask, core_mask,
1169 topology_core_cpumask(cpu));
1173 free_cpumask_var(core_mask);
1177 /* Probe the number and type of interrupts we are able to obtain, and
1178 * the resulting numbers of channels and RX queues.
1180 static void efx_probe_interrupts(struct efx_nic *efx)
1183 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1186 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1187 struct msix_entry xentries[EFX_MAX_CHANNELS];
1190 n_channels = efx_wanted_channels();
1191 if (separate_tx_channels)
1193 n_channels = min(n_channels, max_channels);
1195 for (i = 0; i < n_channels; i++)
1196 xentries[i].entry = i;
1197 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1199 netif_err(efx, drv, efx->net_dev,
1200 "WARNING: Insufficient MSI-X vectors"
1201 " available (%d < %d).\n", rc, n_channels);
1202 netif_err(efx, drv, efx->net_dev,
1203 "WARNING: Performance may be reduced.\n");
1204 EFX_BUG_ON_PARANOID(rc >= n_channels);
1206 rc = pci_enable_msix(efx->pci_dev, xentries,
1211 efx->n_channels = n_channels;
1212 if (separate_tx_channels) {
1213 efx->n_tx_channels =
1214 max(efx->n_channels / 2, 1U);
1215 efx->n_rx_channels =
1216 max(efx->n_channels -
1217 efx->n_tx_channels, 1U);
1219 efx->n_tx_channels = efx->n_channels;
1220 efx->n_rx_channels = efx->n_channels;
1222 for (i = 0; i < n_channels; i++)
1223 efx_get_channel(efx, i)->irq =
1226 /* Fall back to single channel MSI */
1227 efx->interrupt_mode = EFX_INT_MODE_MSI;
1228 netif_err(efx, drv, efx->net_dev,
1229 "could not enable MSI-X\n");
1233 /* Try single interrupt MSI */
1234 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1235 efx->n_channels = 1;
1236 efx->n_rx_channels = 1;
1237 efx->n_tx_channels = 1;
1238 rc = pci_enable_msi(efx->pci_dev);
1240 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1242 netif_err(efx, drv, efx->net_dev,
1243 "could not enable MSI\n");
1244 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1248 /* Assume legacy interrupts */
1249 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1250 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1251 efx->n_rx_channels = 1;
1252 efx->n_tx_channels = 1;
1253 efx->legacy_irq = efx->pci_dev->irq;
1257 static void efx_remove_interrupts(struct efx_nic *efx)
1259 struct efx_channel *channel;
1261 /* Remove MSI/MSI-X interrupts */
1262 efx_for_each_channel(channel, efx)
1264 pci_disable_msi(efx->pci_dev);
1265 pci_disable_msix(efx->pci_dev);
1267 /* Remove legacy interrupt */
1268 efx->legacy_irq = 0;
1271 struct efx_tx_queue *
1272 efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type)
1274 unsigned tx_channel_offset =
1275 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1276 EFX_BUG_ON_PARANOID(index >= efx->n_tx_channels ||
1277 type >= EFX_TXQ_TYPES);
1278 return &efx->channel[tx_channel_offset + index]->tx_queue[type];
1281 static void efx_set_channels(struct efx_nic *efx)
1283 struct efx_channel *channel;
1284 struct efx_tx_queue *tx_queue;
1285 unsigned tx_channel_offset =
1286 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1288 /* Channel pointers were set in efx_init_struct() but we now
1289 * need to clear them for TX queues in any RX-only channels. */
1290 efx_for_each_channel(channel, efx) {
1291 if (channel->channel - tx_channel_offset >=
1292 efx->n_tx_channels) {
1293 efx_for_each_channel_tx_queue(tx_queue, channel)
1294 tx_queue->channel = NULL;
1299 static int efx_probe_nic(struct efx_nic *efx)
1304 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1306 /* Carry out hardware-type specific initialisation */
1307 rc = efx->type->probe(efx);
1311 /* Determine the number of channels and queues by trying to hook
1312 * in MSI-X interrupts. */
1313 efx_probe_interrupts(efx);
1315 if (efx->n_channels > 1)
1316 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1317 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1318 efx->rx_indir_table[i] = i % efx->n_rx_channels;
1320 efx_set_channels(efx);
1321 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1322 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1324 /* Initialise the interrupt moderation settings */
1325 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true);
1330 static void efx_remove_nic(struct efx_nic *efx)
1332 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1334 efx_remove_interrupts(efx);
1335 efx->type->remove(efx);
1338 /**************************************************************************
1340 * NIC startup/shutdown
1342 *************************************************************************/
1344 static int efx_probe_all(struct efx_nic *efx)
1348 rc = efx_probe_nic(efx);
1350 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1354 rc = efx_probe_port(efx);
1356 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1360 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1361 rc = efx_probe_channels(efx);
1365 rc = efx_probe_filters(efx);
1367 netif_err(efx, probe, efx->net_dev,
1368 "failed to create filter tables\n");
1375 efx_remove_channels(efx);
1377 efx_remove_port(efx);
1379 efx_remove_nic(efx);
1384 /* Called after previous invocation(s) of efx_stop_all, restarts the
1385 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1386 * and ensures that the port is scheduled to be reconfigured.
1387 * This function is safe to call multiple times when the NIC is in any
1389 static void efx_start_all(struct efx_nic *efx)
1391 struct efx_channel *channel;
1393 EFX_ASSERT_RESET_SERIALISED(efx);
1395 /* Check that it is appropriate to restart the interface. All
1396 * of these flags are safe to read under just the rtnl lock */
1397 if (efx->port_enabled)
1399 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1401 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1404 /* Mark the port as enabled so port reconfigurations can start, then
1405 * restart the transmit interface early so the watchdog timer stops */
1406 efx_start_port(efx);
1408 efx_for_each_channel(channel, efx) {
1409 if (efx_dev_registered(efx))
1410 efx_wake_queue(channel);
1411 efx_start_channel(channel);
1414 if (efx->legacy_irq)
1415 efx->legacy_irq_enabled = true;
1416 efx_nic_enable_interrupts(efx);
1418 /* Switch to event based MCDI completions after enabling interrupts.
1419 * If a reset has been scheduled, then we need to stay in polled mode.
1420 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1421 * reset_pending [modified from an atomic context], we instead guarantee
1422 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1423 efx_mcdi_mode_event(efx);
1424 if (efx->reset_pending != RESET_TYPE_NONE)
1425 efx_mcdi_mode_poll(efx);
1427 /* Start the hardware monitor if there is one. Otherwise (we're link
1428 * event driven), we have to poll the PHY because after an event queue
1429 * flush, we could have a missed a link state change */
1430 if (efx->type->monitor != NULL) {
1431 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1432 efx_monitor_interval);
1434 mutex_lock(&efx->mac_lock);
1435 if (efx->phy_op->poll(efx))
1436 efx_link_status_changed(efx);
1437 mutex_unlock(&efx->mac_lock);
1440 efx->type->start_stats(efx);
1443 /* Flush all delayed work. Should only be called when no more delayed work
1444 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1445 * since we're holding the rtnl_lock at this point. */
1446 static void efx_flush_all(struct efx_nic *efx)
1448 /* Make sure the hardware monitor is stopped */
1449 cancel_delayed_work_sync(&efx->monitor_work);
1450 /* Stop scheduled port reconfigurations */
1451 cancel_work_sync(&efx->mac_work);
1454 /* Quiesce hardware and software without bringing the link down.
1455 * Safe to call multiple times, when the nic and interface is in any
1456 * state. The caller is guaranteed to subsequently be in a position
1457 * to modify any hardware and software state they see fit without
1459 static void efx_stop_all(struct efx_nic *efx)
1461 struct efx_channel *channel;
1463 EFX_ASSERT_RESET_SERIALISED(efx);
1465 /* port_enabled can be read safely under the rtnl lock */
1466 if (!efx->port_enabled)
1469 efx->type->stop_stats(efx);
1471 /* Switch to MCDI polling on Siena before disabling interrupts */
1472 efx_mcdi_mode_poll(efx);
1474 /* Disable interrupts and wait for ISR to complete */
1475 efx_nic_disable_interrupts(efx);
1476 if (efx->legacy_irq) {
1477 synchronize_irq(efx->legacy_irq);
1478 efx->legacy_irq_enabled = false;
1480 efx_for_each_channel(channel, efx) {
1482 synchronize_irq(channel->irq);
1485 /* Stop all NAPI processing and synchronous rx refills */
1486 efx_for_each_channel(channel, efx)
1487 efx_stop_channel(channel);
1489 /* Stop all asynchronous port reconfigurations. Since all
1490 * event processing has already been stopped, there is no
1491 * window to loose phy events */
1494 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1497 /* Stop the kernel transmit interface late, so the watchdog
1498 * timer isn't ticking over the flush */
1499 if (efx_dev_registered(efx)) {
1500 struct efx_channel *channel;
1501 efx_for_each_channel(channel, efx)
1502 efx_stop_queue(channel);
1503 netif_tx_lock_bh(efx->net_dev);
1504 netif_tx_unlock_bh(efx->net_dev);
1508 static void efx_remove_all(struct efx_nic *efx)
1510 efx_remove_filters(efx);
1511 efx_remove_channels(efx);
1512 efx_remove_port(efx);
1513 efx_remove_nic(efx);
1516 /**************************************************************************
1518 * Interrupt moderation
1520 **************************************************************************/
1522 static unsigned irq_mod_ticks(int usecs, int resolution)
1525 return 0; /* cannot receive interrupts ahead of time :-) */
1526 if (usecs < resolution)
1527 return 1; /* never round down to 0 */
1528 return usecs / resolution;
1531 /* Set interrupt moderation parameters */
1532 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs,
1535 struct efx_channel *channel;
1536 unsigned tx_ticks = irq_mod_ticks(tx_usecs, EFX_IRQ_MOD_RESOLUTION);
1537 unsigned rx_ticks = irq_mod_ticks(rx_usecs, EFX_IRQ_MOD_RESOLUTION);
1539 EFX_ASSERT_RESET_SERIALISED(efx);
1541 efx->irq_rx_adaptive = rx_adaptive;
1542 efx->irq_rx_moderation = rx_ticks;
1543 efx_for_each_channel(channel, efx) {
1544 if (efx_channel_get_rx_queue(channel))
1545 channel->irq_moderation = rx_ticks;
1546 else if (efx_channel_get_tx_queue(channel, 0))
1547 channel->irq_moderation = tx_ticks;
1551 /**************************************************************************
1555 **************************************************************************/
1557 /* Run periodically off the general workqueue */
1558 static void efx_monitor(struct work_struct *data)
1560 struct efx_nic *efx = container_of(data, struct efx_nic,
1563 netif_vdbg(efx, timer, efx->net_dev,
1564 "hardware monitor executing on CPU %d\n",
1565 raw_smp_processor_id());
1566 BUG_ON(efx->type->monitor == NULL);
1568 /* If the mac_lock is already held then it is likely a port
1569 * reconfiguration is already in place, which will likely do
1570 * most of the work of monitor() anyway. */
1571 if (mutex_trylock(&efx->mac_lock)) {
1572 if (efx->port_enabled)
1573 efx->type->monitor(efx);
1574 mutex_unlock(&efx->mac_lock);
1577 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1578 efx_monitor_interval);
1581 /**************************************************************************
1585 *************************************************************************/
1588 * Context: process, rtnl_lock() held.
1590 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1592 struct efx_nic *efx = netdev_priv(net_dev);
1593 struct mii_ioctl_data *data = if_mii(ifr);
1595 EFX_ASSERT_RESET_SERIALISED(efx);
1597 /* Convert phy_id from older PRTAD/DEVAD format */
1598 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1599 (data->phy_id & 0xfc00) == 0x0400)
1600 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1602 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1605 /**************************************************************************
1609 **************************************************************************/
1611 static void efx_init_napi(struct efx_nic *efx)
1613 struct efx_channel *channel;
1615 efx_for_each_channel(channel, efx) {
1616 channel->napi_dev = efx->net_dev;
1617 netif_napi_add(channel->napi_dev, &channel->napi_str,
1618 efx_poll, napi_weight);
1622 static void efx_fini_napi_channel(struct efx_channel *channel)
1624 if (channel->napi_dev)
1625 netif_napi_del(&channel->napi_str);
1626 channel->napi_dev = NULL;
1629 static void efx_fini_napi(struct efx_nic *efx)
1631 struct efx_channel *channel;
1633 efx_for_each_channel(channel, efx)
1634 efx_fini_napi_channel(channel);
1637 /**************************************************************************
1639 * Kernel netpoll interface
1641 *************************************************************************/
1643 #ifdef CONFIG_NET_POLL_CONTROLLER
1645 /* Although in the common case interrupts will be disabled, this is not
1646 * guaranteed. However, all our work happens inside the NAPI callback,
1647 * so no locking is required.
1649 static void efx_netpoll(struct net_device *net_dev)
1651 struct efx_nic *efx = netdev_priv(net_dev);
1652 struct efx_channel *channel;
1654 efx_for_each_channel(channel, efx)
1655 efx_schedule_channel(channel);
1660 /**************************************************************************
1662 * Kernel net device interface
1664 *************************************************************************/
1666 /* Context: process, rtnl_lock() held. */
1667 static int efx_net_open(struct net_device *net_dev)
1669 struct efx_nic *efx = netdev_priv(net_dev);
1670 EFX_ASSERT_RESET_SERIALISED(efx);
1672 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1673 raw_smp_processor_id());
1675 if (efx->state == STATE_DISABLED)
1677 if (efx->phy_mode & PHY_MODE_SPECIAL)
1679 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1682 /* Notify the kernel of the link state polled during driver load,
1683 * before the monitor starts running */
1684 efx_link_status_changed(efx);
1690 /* Context: process, rtnl_lock() held.
1691 * Note that the kernel will ignore our return code; this method
1692 * should really be a void.
1694 static int efx_net_stop(struct net_device *net_dev)
1696 struct efx_nic *efx = netdev_priv(net_dev);
1698 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1699 raw_smp_processor_id());
1701 if (efx->state != STATE_DISABLED) {
1702 /* Stop the device and flush all the channels */
1704 efx_fini_channels(efx);
1705 efx_init_channels(efx);
1711 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1712 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, struct rtnl_link_stats64 *stats)
1714 struct efx_nic *efx = netdev_priv(net_dev);
1715 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1717 spin_lock_bh(&efx->stats_lock);
1718 efx->type->update_stats(efx);
1719 spin_unlock_bh(&efx->stats_lock);
1721 stats->rx_packets = mac_stats->rx_packets;
1722 stats->tx_packets = mac_stats->tx_packets;
1723 stats->rx_bytes = mac_stats->rx_bytes;
1724 stats->tx_bytes = mac_stats->tx_bytes;
1725 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1726 stats->multicast = mac_stats->rx_multicast;
1727 stats->collisions = mac_stats->tx_collision;
1728 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1729 mac_stats->rx_length_error);
1730 stats->rx_crc_errors = mac_stats->rx_bad;
1731 stats->rx_frame_errors = mac_stats->rx_align_error;
1732 stats->rx_fifo_errors = mac_stats->rx_overflow;
1733 stats->rx_missed_errors = mac_stats->rx_missed;
1734 stats->tx_window_errors = mac_stats->tx_late_collision;
1736 stats->rx_errors = (stats->rx_length_errors +
1737 stats->rx_crc_errors +
1738 stats->rx_frame_errors +
1739 mac_stats->rx_symbol_error);
1740 stats->tx_errors = (stats->tx_window_errors +
1746 /* Context: netif_tx_lock held, BHs disabled. */
1747 static void efx_watchdog(struct net_device *net_dev)
1749 struct efx_nic *efx = netdev_priv(net_dev);
1751 netif_err(efx, tx_err, efx->net_dev,
1752 "TX stuck with port_enabled=%d: resetting channels\n",
1755 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1759 /* Context: process, rtnl_lock() held. */
1760 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1762 struct efx_nic *efx = netdev_priv(net_dev);
1765 EFX_ASSERT_RESET_SERIALISED(efx);
1767 if (new_mtu > EFX_MAX_MTU)
1772 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1774 efx_fini_channels(efx);
1776 mutex_lock(&efx->mac_lock);
1777 /* Reconfigure the MAC before enabling the dma queues so that
1778 * the RX buffers don't overflow */
1779 net_dev->mtu = new_mtu;
1780 efx->mac_op->reconfigure(efx);
1781 mutex_unlock(&efx->mac_lock);
1783 efx_init_channels(efx);
1789 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1791 struct efx_nic *efx = netdev_priv(net_dev);
1792 struct sockaddr *addr = data;
1793 char *new_addr = addr->sa_data;
1795 EFX_ASSERT_RESET_SERIALISED(efx);
1797 if (!is_valid_ether_addr(new_addr)) {
1798 netif_err(efx, drv, efx->net_dev,
1799 "invalid ethernet MAC address requested: %pM\n",
1804 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1806 /* Reconfigure the MAC */
1807 mutex_lock(&efx->mac_lock);
1808 efx->mac_op->reconfigure(efx);
1809 mutex_unlock(&efx->mac_lock);
1814 /* Context: netif_addr_lock held, BHs disabled. */
1815 static void efx_set_multicast_list(struct net_device *net_dev)
1817 struct efx_nic *efx = netdev_priv(net_dev);
1818 struct netdev_hw_addr *ha;
1819 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1823 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1825 /* Build multicast hash table */
1826 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1827 memset(mc_hash, 0xff, sizeof(*mc_hash));
1829 memset(mc_hash, 0x00, sizeof(*mc_hash));
1830 netdev_for_each_mc_addr(ha, net_dev) {
1831 crc = ether_crc_le(ETH_ALEN, ha->addr);
1832 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1833 set_bit_le(bit, mc_hash->byte);
1836 /* Broadcast packets go through the multicast hash filter.
1837 * ether_crc_le() of the broadcast address is 0xbe2612ff
1838 * so we always add bit 0xff to the mask.
1840 set_bit_le(0xff, mc_hash->byte);
1843 if (efx->port_enabled)
1844 queue_work(efx->workqueue, &efx->mac_work);
1845 /* Otherwise efx_start_port() will do this */
1848 static const struct net_device_ops efx_netdev_ops = {
1849 .ndo_open = efx_net_open,
1850 .ndo_stop = efx_net_stop,
1851 .ndo_get_stats64 = efx_net_stats,
1852 .ndo_tx_timeout = efx_watchdog,
1853 .ndo_start_xmit = efx_hard_start_xmit,
1854 .ndo_validate_addr = eth_validate_addr,
1855 .ndo_do_ioctl = efx_ioctl,
1856 .ndo_change_mtu = efx_change_mtu,
1857 .ndo_set_mac_address = efx_set_mac_address,
1858 .ndo_set_multicast_list = efx_set_multicast_list,
1859 #ifdef CONFIG_NET_POLL_CONTROLLER
1860 .ndo_poll_controller = efx_netpoll,
1864 static void efx_update_name(struct efx_nic *efx)
1866 strcpy(efx->name, efx->net_dev->name);
1867 efx_mtd_rename(efx);
1868 efx_set_channel_names(efx);
1871 static int efx_netdev_event(struct notifier_block *this,
1872 unsigned long event, void *ptr)
1874 struct net_device *net_dev = ptr;
1876 if (net_dev->netdev_ops == &efx_netdev_ops &&
1877 event == NETDEV_CHANGENAME)
1878 efx_update_name(netdev_priv(net_dev));
1883 static struct notifier_block efx_netdev_notifier = {
1884 .notifier_call = efx_netdev_event,
1888 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1890 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1891 return sprintf(buf, "%d\n", efx->phy_type);
1893 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1895 static int efx_register_netdev(struct efx_nic *efx)
1897 struct net_device *net_dev = efx->net_dev;
1900 net_dev->watchdog_timeo = 5 * HZ;
1901 net_dev->irq = efx->pci_dev->irq;
1902 net_dev->netdev_ops = &efx_netdev_ops;
1903 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1905 /* Clear MAC statistics */
1906 efx->mac_op->update_stats(efx);
1907 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1911 rc = dev_alloc_name(net_dev, net_dev->name);
1914 efx_update_name(efx);
1916 rc = register_netdevice(net_dev);
1920 /* Always start with carrier off; PHY events will detect the link */
1921 netif_carrier_off(efx->net_dev);
1925 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1927 netif_err(efx, drv, efx->net_dev,
1928 "failed to init net dev attributes\n");
1929 goto fail_registered;
1936 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
1940 unregister_netdev(net_dev);
1944 static void efx_unregister_netdev(struct efx_nic *efx)
1946 struct efx_channel *channel;
1947 struct efx_tx_queue *tx_queue;
1952 BUG_ON(netdev_priv(efx->net_dev) != efx);
1954 /* Free up any skbs still remaining. This has to happen before
1955 * we try to unregister the netdev as running their destructors
1956 * may be needed to get the device ref. count to 0. */
1957 efx_for_each_channel(channel, efx) {
1958 efx_for_each_channel_tx_queue(tx_queue, channel)
1959 efx_release_tx_buffers(tx_queue);
1962 if (efx_dev_registered(efx)) {
1963 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
1964 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1965 unregister_netdev(efx->net_dev);
1969 /**************************************************************************
1971 * Device reset and suspend
1973 **************************************************************************/
1975 /* Tears down the entire software state and most of the hardware state
1977 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
1979 EFX_ASSERT_RESET_SERIALISED(efx);
1982 mutex_lock(&efx->mac_lock);
1983 mutex_lock(&efx->spi_lock);
1985 efx_fini_channels(efx);
1986 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
1987 efx->phy_op->fini(efx);
1988 efx->type->fini(efx);
1991 /* This function will always ensure that the locks acquired in
1992 * efx_reset_down() are released. A failure return code indicates
1993 * that we were unable to reinitialise the hardware, and the
1994 * driver should be disabled. If ok is false, then the rx and tx
1995 * engines are not restarted, pending a RESET_DISABLE. */
1996 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2000 EFX_ASSERT_RESET_SERIALISED(efx);
2002 rc = efx->type->init(efx);
2004 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2011 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2012 rc = efx->phy_op->init(efx);
2015 if (efx->phy_op->reconfigure(efx))
2016 netif_err(efx, drv, efx->net_dev,
2017 "could not restore PHY settings\n");
2020 efx->mac_op->reconfigure(efx);
2022 efx_init_channels(efx);
2023 efx_restore_filters(efx);
2025 mutex_unlock(&efx->spi_lock);
2026 mutex_unlock(&efx->mac_lock);
2033 efx->port_initialized = false;
2035 mutex_unlock(&efx->spi_lock);
2036 mutex_unlock(&efx->mac_lock);
2041 /* Reset the NIC using the specified method. Note that the reset may
2042 * fail, in which case the card will be left in an unusable state.
2044 * Caller must hold the rtnl_lock.
2046 int efx_reset(struct efx_nic *efx, enum reset_type method)
2051 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2052 RESET_TYPE(method));
2054 efx_reset_down(efx, method);
2056 rc = efx->type->reset(efx, method);
2058 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2062 /* Allow resets to be rescheduled. */
2063 efx->reset_pending = RESET_TYPE_NONE;
2065 /* Reinitialise bus-mastering, which may have been turned off before
2066 * the reset was scheduled. This is still appropriate, even in the
2067 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2068 * can respond to requests. */
2069 pci_set_master(efx->pci_dev);
2072 /* Leave device stopped if necessary */
2073 disabled = rc || method == RESET_TYPE_DISABLE;
2074 rc2 = efx_reset_up(efx, method, !disabled);
2082 dev_close(efx->net_dev);
2083 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2084 efx->state = STATE_DISABLED;
2086 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2091 /* The worker thread exists so that code that cannot sleep can
2092 * schedule a reset for later.
2094 static void efx_reset_work(struct work_struct *data)
2096 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2098 if (efx->reset_pending == RESET_TYPE_NONE)
2101 /* If we're not RUNNING then don't reset. Leave the reset_pending
2102 * flag set so that efx_pci_probe_main will be retried */
2103 if (efx->state != STATE_RUNNING) {
2104 netif_info(efx, drv, efx->net_dev,
2105 "scheduled reset quenched. NIC not RUNNING\n");
2110 (void)efx_reset(efx, efx->reset_pending);
2114 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2116 enum reset_type method;
2118 if (efx->reset_pending != RESET_TYPE_NONE) {
2119 netif_info(efx, drv, efx->net_dev,
2120 "quenching already scheduled reset\n");
2125 case RESET_TYPE_INVISIBLE:
2126 case RESET_TYPE_ALL:
2127 case RESET_TYPE_WORLD:
2128 case RESET_TYPE_DISABLE:
2131 case RESET_TYPE_RX_RECOVERY:
2132 case RESET_TYPE_RX_DESC_FETCH:
2133 case RESET_TYPE_TX_DESC_FETCH:
2134 case RESET_TYPE_TX_SKIP:
2135 method = RESET_TYPE_INVISIBLE;
2137 case RESET_TYPE_MC_FAILURE:
2139 method = RESET_TYPE_ALL;
2144 netif_dbg(efx, drv, efx->net_dev,
2145 "scheduling %s reset for %s\n",
2146 RESET_TYPE(method), RESET_TYPE(type));
2148 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2149 RESET_TYPE(method));
2151 efx->reset_pending = method;
2153 /* efx_process_channel() will no longer read events once a
2154 * reset is scheduled. So switch back to poll'd MCDI completions. */
2155 efx_mcdi_mode_poll(efx);
2157 queue_work(reset_workqueue, &efx->reset_work);
2160 /**************************************************************************
2162 * List of NICs we support
2164 **************************************************************************/
2166 /* PCI device ID table */
2167 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2168 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
2169 .driver_data = (unsigned long) &falcon_a1_nic_type},
2170 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
2171 .driver_data = (unsigned long) &falcon_b0_nic_type},
2172 {PCI_DEVICE(EFX_VENDID_SFC, BETHPAGE_A_P_DEVID),
2173 .driver_data = (unsigned long) &siena_a0_nic_type},
2174 {PCI_DEVICE(EFX_VENDID_SFC, SIENA_A_P_DEVID),
2175 .driver_data = (unsigned long) &siena_a0_nic_type},
2176 {0} /* end of list */
2179 /**************************************************************************
2181 * Dummy PHY/MAC operations
2183 * Can be used for some unimplemented operations
2184 * Needed so all function pointers are valid and do not have to be tested
2187 **************************************************************************/
2188 int efx_port_dummy_op_int(struct efx_nic *efx)
2192 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2194 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2199 static struct efx_phy_operations efx_dummy_phy_operations = {
2200 .init = efx_port_dummy_op_int,
2201 .reconfigure = efx_port_dummy_op_int,
2202 .poll = efx_port_dummy_op_poll,
2203 .fini = efx_port_dummy_op_void,
2206 /**************************************************************************
2210 **************************************************************************/
2212 /* This zeroes out and then fills in the invariants in a struct
2213 * efx_nic (including all sub-structures).
2215 static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
2216 struct pci_dev *pci_dev, struct net_device *net_dev)
2220 /* Initialise common structures */
2221 memset(efx, 0, sizeof(*efx));
2222 spin_lock_init(&efx->biu_lock);
2223 mutex_init(&efx->mdio_lock);
2224 mutex_init(&efx->spi_lock);
2225 #ifdef CONFIG_SFC_MTD
2226 INIT_LIST_HEAD(&efx->mtd_list);
2228 INIT_WORK(&efx->reset_work, efx_reset_work);
2229 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2230 efx->pci_dev = pci_dev;
2231 efx->msg_enable = debug;
2232 efx->state = STATE_INIT;
2233 efx->reset_pending = RESET_TYPE_NONE;
2234 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2236 efx->net_dev = net_dev;
2237 efx->rx_checksum_enabled = true;
2238 spin_lock_init(&efx->stats_lock);
2239 mutex_init(&efx->mac_lock);
2240 efx->mac_op = type->default_mac_ops;
2241 efx->phy_op = &efx_dummy_phy_operations;
2242 efx->mdio.dev = net_dev;
2243 INIT_WORK(&efx->mac_work, efx_mac_work);
2245 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2246 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2247 if (!efx->channel[i])
2253 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2255 /* Higher numbered interrupt modes are less capable! */
2256 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2259 /* Would be good to use the net_dev name, but we're too early */
2260 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2262 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2263 if (!efx->workqueue)
2269 efx_fini_struct(efx);
2273 static void efx_fini_struct(struct efx_nic *efx)
2277 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2278 kfree(efx->channel[i]);
2280 if (efx->workqueue) {
2281 destroy_workqueue(efx->workqueue);
2282 efx->workqueue = NULL;
2286 /**************************************************************************
2290 **************************************************************************/
2292 /* Main body of final NIC shutdown code
2293 * This is called only at module unload (or hotplug removal).
2295 static void efx_pci_remove_main(struct efx_nic *efx)
2297 efx_nic_fini_interrupt(efx);
2298 efx_fini_channels(efx);
2300 efx->type->fini(efx);
2302 efx_remove_all(efx);
2305 /* Final NIC shutdown
2306 * This is called only at module unload (or hotplug removal).
2308 static void efx_pci_remove(struct pci_dev *pci_dev)
2310 struct efx_nic *efx;
2312 efx = pci_get_drvdata(pci_dev);
2316 /* Mark the NIC as fini, then stop the interface */
2318 efx->state = STATE_FINI;
2319 dev_close(efx->net_dev);
2321 /* Allow any queued efx_resets() to complete */
2324 efx_unregister_netdev(efx);
2326 efx_mtd_remove(efx);
2328 /* Wait for any scheduled resets to complete. No more will be
2329 * scheduled from this point because efx_stop_all() has been
2330 * called, we are no longer registered with driverlink, and
2331 * the net_device's have been removed. */
2332 cancel_work_sync(&efx->reset_work);
2334 efx_pci_remove_main(efx);
2337 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2339 pci_set_drvdata(pci_dev, NULL);
2340 efx_fini_struct(efx);
2341 free_netdev(efx->net_dev);
2344 /* Main body of NIC initialisation
2345 * This is called at module load (or hotplug insertion, theoretically).
2347 static int efx_pci_probe_main(struct efx_nic *efx)
2351 /* Do start-of-day initialisation */
2352 rc = efx_probe_all(efx);
2358 rc = efx->type->init(efx);
2360 netif_err(efx, probe, efx->net_dev,
2361 "failed to initialise NIC\n");
2365 rc = efx_init_port(efx);
2367 netif_err(efx, probe, efx->net_dev,
2368 "failed to initialise port\n");
2372 efx_init_channels(efx);
2374 rc = efx_nic_init_interrupt(efx);
2381 efx_fini_channels(efx);
2384 efx->type->fini(efx);
2387 efx_remove_all(efx);
2392 /* NIC initialisation
2394 * This is called at module load (or hotplug insertion,
2395 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2396 * sets up and registers the network devices with the kernel and hooks
2397 * the interrupt service routine. It does not prepare the device for
2398 * transmission; this is left to the first time one of the network
2399 * interfaces is brought up (i.e. efx_net_open).
2401 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2402 const struct pci_device_id *entry)
2404 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2405 struct net_device *net_dev;
2406 struct efx_nic *efx;
2409 /* Allocate and initialise a struct net_device and struct efx_nic */
2410 net_dev = alloc_etherdev_mq(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES);
2413 net_dev->features |= (type->offload_features | NETIF_F_SG |
2414 NETIF_F_HIGHDMA | NETIF_F_TSO |
2416 if (type->offload_features & NETIF_F_V6_CSUM)
2417 net_dev->features |= NETIF_F_TSO6;
2418 /* Mask for features that also apply to VLAN devices */
2419 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2420 NETIF_F_HIGHDMA | NETIF_F_TSO);
2421 efx = netdev_priv(net_dev);
2422 pci_set_drvdata(pci_dev, efx);
2423 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2424 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2428 netif_info(efx, probe, efx->net_dev,
2429 "Solarflare Communications NIC detected\n");
2431 /* Set up basic I/O (BAR mappings etc) */
2432 rc = efx_init_io(efx);
2436 /* No serialisation is required with the reset path because
2437 * we're in STATE_INIT. */
2438 for (i = 0; i < 5; i++) {
2439 rc = efx_pci_probe_main(efx);
2441 /* Serialise against efx_reset(). No more resets will be
2442 * scheduled since efx_stop_all() has been called, and we
2443 * have not and never have been registered with either
2444 * the rtnetlink or driverlink layers. */
2445 cancel_work_sync(&efx->reset_work);
2448 if (efx->reset_pending != RESET_TYPE_NONE) {
2449 /* If there was a scheduled reset during
2450 * probe, the NIC is probably hosed anyway */
2451 efx_pci_remove_main(efx);
2458 /* Retry if a recoverably reset event has been scheduled */
2459 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2460 (efx->reset_pending != RESET_TYPE_ALL))
2463 efx->reset_pending = RESET_TYPE_NONE;
2467 netif_err(efx, probe, efx->net_dev, "Could not reset NIC\n");
2471 /* Switch to the running state before we expose the device to the OS,
2472 * so that dev_open()|efx_start_all() will actually start the device */
2473 efx->state = STATE_RUNNING;
2475 rc = efx_register_netdev(efx);
2479 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2482 efx_mtd_probe(efx); /* allowed to fail */
2487 efx_pci_remove_main(efx);
2492 efx_fini_struct(efx);
2495 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2496 free_netdev(net_dev);
2500 static int efx_pm_freeze(struct device *dev)
2502 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2504 efx->state = STATE_FINI;
2506 netif_device_detach(efx->net_dev);
2509 efx_fini_channels(efx);
2514 static int efx_pm_thaw(struct device *dev)
2516 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2518 efx->state = STATE_INIT;
2520 efx_init_channels(efx);
2522 mutex_lock(&efx->mac_lock);
2523 efx->phy_op->reconfigure(efx);
2524 mutex_unlock(&efx->mac_lock);
2528 netif_device_attach(efx->net_dev);
2530 efx->state = STATE_RUNNING;
2532 efx->type->resume_wol(efx);
2534 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2535 queue_work(reset_workqueue, &efx->reset_work);
2540 static int efx_pm_poweroff(struct device *dev)
2542 struct pci_dev *pci_dev = to_pci_dev(dev);
2543 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2545 efx->type->fini(efx);
2547 efx->reset_pending = RESET_TYPE_NONE;
2549 pci_save_state(pci_dev);
2550 return pci_set_power_state(pci_dev, PCI_D3hot);
2553 /* Used for both resume and restore */
2554 static int efx_pm_resume(struct device *dev)
2556 struct pci_dev *pci_dev = to_pci_dev(dev);
2557 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2560 rc = pci_set_power_state(pci_dev, PCI_D0);
2563 pci_restore_state(pci_dev);
2564 rc = pci_enable_device(pci_dev);
2567 pci_set_master(efx->pci_dev);
2568 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2571 rc = efx->type->init(efx);
2578 static int efx_pm_suspend(struct device *dev)
2583 rc = efx_pm_poweroff(dev);
2589 static struct dev_pm_ops efx_pm_ops = {
2590 .suspend = efx_pm_suspend,
2591 .resume = efx_pm_resume,
2592 .freeze = efx_pm_freeze,
2593 .thaw = efx_pm_thaw,
2594 .poweroff = efx_pm_poweroff,
2595 .restore = efx_pm_resume,
2598 static struct pci_driver efx_pci_driver = {
2599 .name = KBUILD_MODNAME,
2600 .id_table = efx_pci_table,
2601 .probe = efx_pci_probe,
2602 .remove = efx_pci_remove,
2603 .driver.pm = &efx_pm_ops,
2606 /**************************************************************************
2608 * Kernel module interface
2610 *************************************************************************/
2612 module_param(interrupt_mode, uint, 0444);
2613 MODULE_PARM_DESC(interrupt_mode,
2614 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2616 static int __init efx_init_module(void)
2620 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2622 rc = register_netdevice_notifier(&efx_netdev_notifier);
2626 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2627 if (!reset_workqueue) {
2632 rc = pci_register_driver(&efx_pci_driver);
2639 destroy_workqueue(reset_workqueue);
2641 unregister_netdevice_notifier(&efx_netdev_notifier);
2646 static void __exit efx_exit_module(void)
2648 printk(KERN_INFO "Solarflare NET driver unloading\n");
2650 pci_unregister_driver(&efx_pci_driver);
2651 destroy_workqueue(reset_workqueue);
2652 unregister_netdevice_notifier(&efx_netdev_notifier);
2656 module_init(efx_init_module);
2657 module_exit(efx_exit_module);
2659 MODULE_AUTHOR("Solarflare Communications and "
2660 "Michael Brown <mbrown@fensystems.co.uk>");
2661 MODULE_DESCRIPTION("Solarflare Communications network driver");
2662 MODULE_LICENSE("GPL");
2663 MODULE_DEVICE_TABLE(pci, efx_pci_table);