1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2006-2009 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/bitops.h>
12 #include <linux/module.h>
13 #include <linux/mtd/mtd.h>
14 #include <linux/delay.h>
15 #include <linux/slab.h>
16 #include <linux/rtnetlink.h>
18 #include "net_driver.h"
23 #include "mcdi_pcol.h"
25 #define EFX_SPI_VERIFY_BUF_LEN 16
27 struct efx_mtd_partition {
37 const char *type_name;
38 char name[IFNAMSIZ + 20];
42 int (*read)(struct mtd_info *mtd, loff_t start, size_t len,
43 size_t *retlen, u8 *buffer);
44 int (*erase)(struct mtd_info *mtd, loff_t start, size_t len);
45 int (*write)(struct mtd_info *mtd, loff_t start, size_t len,
46 size_t *retlen, const u8 *buffer);
47 int (*sync)(struct mtd_info *mtd);
51 struct list_head node;
53 const struct efx_spi_device *spi;
55 const struct efx_mtd_ops *ops;
57 struct efx_mtd_partition part[0];
60 #define efx_for_each_partition(part, efx_mtd) \
61 for ((part) = &(efx_mtd)->part[0]; \
62 (part) != &(efx_mtd)->part[(efx_mtd)->n_parts]; \
65 #define to_efx_mtd_partition(mtd) \
66 container_of(mtd, struct efx_mtd_partition, mtd)
68 static int falcon_mtd_probe(struct efx_nic *efx);
69 static int siena_mtd_probe(struct efx_nic *efx);
74 efx_spi_slow_wait(struct efx_mtd_partition *part, bool uninterruptible)
76 struct efx_mtd *efx_mtd = part->mtd.priv;
77 const struct efx_spi_device *spi = efx_mtd->spi;
78 struct efx_nic *efx = efx_mtd->efx;
82 /* Wait up to 4s for flash/EEPROM to finish a slow operation. */
83 for (i = 0; i < 40; i++) {
84 __set_current_state(uninterruptible ?
85 TASK_UNINTERRUPTIBLE : TASK_INTERRUPTIBLE);
86 schedule_timeout(HZ / 10);
87 rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL,
88 &status, sizeof(status));
91 if (!(status & SPI_STATUS_NRDY))
93 if (signal_pending(current))
96 pr_err("%s: timed out waiting for %s\n", part->name, efx_mtd->name);
101 efx_spi_unlock(struct efx_nic *efx, const struct efx_spi_device *spi)
103 const u8 unlock_mask = (SPI_STATUS_BP2 | SPI_STATUS_BP1 |
108 rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL,
109 &status, sizeof(status));
113 if (!(status & unlock_mask))
114 return 0; /* already unlocked */
116 rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0);
119 rc = falcon_spi_cmd(efx, spi, SPI_SST_EWSR, -1, NULL, NULL, 0);
123 status &= ~unlock_mask;
124 rc = falcon_spi_cmd(efx, spi, SPI_WRSR, -1, &status,
125 NULL, sizeof(status));
128 rc = falcon_spi_wait_write(efx, spi);
136 efx_spi_erase(struct efx_mtd_partition *part, loff_t start, size_t len)
138 struct efx_mtd *efx_mtd = part->mtd.priv;
139 const struct efx_spi_device *spi = efx_mtd->spi;
140 struct efx_nic *efx = efx_mtd->efx;
141 unsigned pos, block_len;
142 u8 empty[EFX_SPI_VERIFY_BUF_LEN];
143 u8 buffer[EFX_SPI_VERIFY_BUF_LEN];
146 if (len != spi->erase_size)
149 if (spi->erase_command == 0)
152 rc = efx_spi_unlock(efx, spi);
155 rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0);
158 rc = falcon_spi_cmd(efx, spi, spi->erase_command, start, NULL,
162 rc = efx_spi_slow_wait(part, false);
164 /* Verify the entire region has been wiped */
165 memset(empty, 0xff, sizeof(empty));
166 for (pos = 0; pos < len; pos += block_len) {
167 block_len = min(len - pos, sizeof(buffer));
168 rc = falcon_spi_read(efx, spi, start + pos, block_len,
172 if (memcmp(empty, buffer, block_len))
175 /* Avoid locking up the system */
177 if (signal_pending(current))
186 static int efx_mtd_erase(struct mtd_info *mtd, struct erase_info *erase)
188 struct efx_mtd *efx_mtd = mtd->priv;
191 rc = efx_mtd->ops->erase(mtd, erase->addr, erase->len);
193 erase->state = MTD_ERASE_DONE;
195 erase->state = MTD_ERASE_FAILED;
196 erase->fail_addr = 0xffffffff;
198 mtd_erase_callback(erase);
202 static void efx_mtd_sync(struct mtd_info *mtd)
204 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
205 struct efx_mtd *efx_mtd = mtd->priv;
208 rc = efx_mtd->ops->sync(mtd);
210 pr_err("%s: %s sync failed (%d)\n",
211 part->name, efx_mtd->name, rc);
214 static void efx_mtd_remove_partition(struct efx_mtd_partition *part)
219 rc = del_mtd_device(&part->mtd);
227 static void efx_mtd_remove_device(struct efx_mtd *efx_mtd)
229 struct efx_mtd_partition *part;
231 efx_for_each_partition(part, efx_mtd)
232 efx_mtd_remove_partition(part);
233 list_del(&efx_mtd->node);
237 static void efx_mtd_rename_device(struct efx_mtd *efx_mtd)
239 struct efx_mtd_partition *part;
241 efx_for_each_partition(part, efx_mtd)
242 if (efx_nic_rev(efx_mtd->efx) >= EFX_REV_SIENA_A0)
243 snprintf(part->name, sizeof(part->name),
244 "%s %s:%02x", efx_mtd->efx->name,
245 part->type_name, part->mcdi.fw_subtype);
247 snprintf(part->name, sizeof(part->name),
248 "%s %s", efx_mtd->efx->name,
252 static int efx_mtd_probe_device(struct efx_nic *efx, struct efx_mtd *efx_mtd)
254 struct efx_mtd_partition *part;
258 efx_mtd_rename_device(efx_mtd);
260 efx_for_each_partition(part, efx_mtd) {
261 part->mtd.writesize = 1;
263 part->mtd.owner = THIS_MODULE;
264 part->mtd.priv = efx_mtd;
265 part->mtd.name = part->name;
266 part->mtd.erase = efx_mtd_erase;
267 part->mtd.read = efx_mtd->ops->read;
268 part->mtd.write = efx_mtd->ops->write;
269 part->mtd.sync = efx_mtd_sync;
271 if (add_mtd_device(&part->mtd))
275 list_add(&efx_mtd->node, &efx->mtd_list);
279 while (part != &efx_mtd->part[0]) {
281 efx_mtd_remove_partition(part);
283 /* add_mtd_device() returns 1 if the MTD table is full */
287 void efx_mtd_remove(struct efx_nic *efx)
289 struct efx_mtd *efx_mtd, *next;
291 WARN_ON(efx_dev_registered(efx));
293 list_for_each_entry_safe(efx_mtd, next, &efx->mtd_list, node)
294 efx_mtd_remove_device(efx_mtd);
297 void efx_mtd_rename(struct efx_nic *efx)
299 struct efx_mtd *efx_mtd;
303 list_for_each_entry(efx_mtd, &efx->mtd_list, node)
304 efx_mtd_rename_device(efx_mtd);
307 int efx_mtd_probe(struct efx_nic *efx)
309 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0)
310 return siena_mtd_probe(efx);
312 return falcon_mtd_probe(efx);
315 /* Implementation of MTD operations for Falcon */
317 static int falcon_mtd_read(struct mtd_info *mtd, loff_t start,
318 size_t len, size_t *retlen, u8 *buffer)
320 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
321 struct efx_mtd *efx_mtd = mtd->priv;
322 const struct efx_spi_device *spi = efx_mtd->spi;
323 struct efx_nic *efx = efx_mtd->efx;
326 rc = mutex_lock_interruptible(&efx->spi_lock);
329 rc = falcon_spi_read(efx, spi, part->offset + start, len,
331 mutex_unlock(&efx->spi_lock);
335 static int falcon_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
337 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
338 struct efx_mtd *efx_mtd = mtd->priv;
339 struct efx_nic *efx = efx_mtd->efx;
342 rc = mutex_lock_interruptible(&efx->spi_lock);
345 rc = efx_spi_erase(part, part->offset + start, len);
346 mutex_unlock(&efx->spi_lock);
350 static int falcon_mtd_write(struct mtd_info *mtd, loff_t start,
351 size_t len, size_t *retlen, const u8 *buffer)
353 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
354 struct efx_mtd *efx_mtd = mtd->priv;
355 const struct efx_spi_device *spi = efx_mtd->spi;
356 struct efx_nic *efx = efx_mtd->efx;
359 rc = mutex_lock_interruptible(&efx->spi_lock);
362 rc = falcon_spi_write(efx, spi, part->offset + start, len,
364 mutex_unlock(&efx->spi_lock);
368 static int falcon_mtd_sync(struct mtd_info *mtd)
370 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
371 struct efx_mtd *efx_mtd = mtd->priv;
372 struct efx_nic *efx = efx_mtd->efx;
375 mutex_lock(&efx->spi_lock);
376 rc = efx_spi_slow_wait(part, true);
377 mutex_unlock(&efx->spi_lock);
381 static struct efx_mtd_ops falcon_mtd_ops = {
382 .read = falcon_mtd_read,
383 .erase = falcon_mtd_erase,
384 .write = falcon_mtd_write,
385 .sync = falcon_mtd_sync,
388 static int falcon_mtd_probe(struct efx_nic *efx)
390 struct efx_spi_device *spi = efx->spi_flash;
391 struct efx_mtd *efx_mtd;
396 if (!spi || spi->size <= FALCON_FLASH_BOOTCODE_START)
399 efx_mtd = kzalloc(sizeof(*efx_mtd) + sizeof(efx_mtd->part[0]),
405 efx_mtd->name = "flash";
406 efx_mtd->ops = &falcon_mtd_ops;
408 efx_mtd->n_parts = 1;
409 efx_mtd->part[0].mtd.type = MTD_NORFLASH;
410 efx_mtd->part[0].mtd.flags = MTD_CAP_NORFLASH;
411 efx_mtd->part[0].mtd.size = spi->size - FALCON_FLASH_BOOTCODE_START;
412 efx_mtd->part[0].mtd.erasesize = spi->erase_size;
413 efx_mtd->part[0].offset = FALCON_FLASH_BOOTCODE_START;
414 efx_mtd->part[0].type_name = "sfc_flash_bootrom";
416 rc = efx_mtd_probe_device(efx, efx_mtd);
422 /* Implementation of MTD operations for Siena */
424 static int siena_mtd_read(struct mtd_info *mtd, loff_t start,
425 size_t len, size_t *retlen, u8 *buffer)
427 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
428 struct efx_mtd *efx_mtd = mtd->priv;
429 struct efx_nic *efx = efx_mtd->efx;
430 loff_t offset = start;
431 loff_t end = min_t(loff_t, start + len, mtd->size);
435 while (offset < end) {
436 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
437 rc = efx_mcdi_nvram_read(efx, part->mcdi.nvram_type, offset,
445 *retlen = offset - start;
449 static int siena_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
451 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
452 struct efx_mtd *efx_mtd = mtd->priv;
453 struct efx_nic *efx = efx_mtd->efx;
454 loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
455 loff_t end = min_t(loff_t, start + len, mtd->size);
456 size_t chunk = part->mtd.erasesize;
459 if (!part->mcdi.updating) {
460 rc = efx_mcdi_nvram_update_start(efx, part->mcdi.nvram_type);
463 part->mcdi.updating = 1;
466 /* The MCDI interface can in fact do multiple erase blocks at once;
467 * but erasing may be slow, so we make multiple calls here to avoid
468 * tripping the MCDI RPC timeout. */
469 while (offset < end) {
470 rc = efx_mcdi_nvram_erase(efx, part->mcdi.nvram_type, offset,
480 static int siena_mtd_write(struct mtd_info *mtd, loff_t start,
481 size_t len, size_t *retlen, const u8 *buffer)
483 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
484 struct efx_mtd *efx_mtd = mtd->priv;
485 struct efx_nic *efx = efx_mtd->efx;
486 loff_t offset = start;
487 loff_t end = min_t(loff_t, start + len, mtd->size);
491 if (!part->mcdi.updating) {
492 rc = efx_mcdi_nvram_update_start(efx, part->mcdi.nvram_type);
495 part->mcdi.updating = 1;
498 while (offset < end) {
499 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
500 rc = efx_mcdi_nvram_write(efx, part->mcdi.nvram_type, offset,
508 *retlen = offset - start;
512 static int siena_mtd_sync(struct mtd_info *mtd)
514 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
515 struct efx_mtd *efx_mtd = mtd->priv;
516 struct efx_nic *efx = efx_mtd->efx;
519 if (part->mcdi.updating) {
520 part->mcdi.updating = 0;
521 rc = efx_mcdi_nvram_update_finish(efx, part->mcdi.nvram_type);
527 static struct efx_mtd_ops siena_mtd_ops = {
528 .read = siena_mtd_read,
529 .erase = siena_mtd_erase,
530 .write = siena_mtd_write,
531 .sync = siena_mtd_sync,
534 struct siena_nvram_type_info {
539 static struct siena_nvram_type_info siena_nvram_types[] = {
540 [MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO] = { 0, "sfc_dummy_phy" },
541 [MC_CMD_NVRAM_TYPE_MC_FW] = { 0, "sfc_mcfw" },
542 [MC_CMD_NVRAM_TYPE_MC_FW_BACKUP] = { 0, "sfc_mcfw_backup" },
543 [MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT0] = { 0, "sfc_static_cfg" },
544 [MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT1] = { 1, "sfc_static_cfg" },
545 [MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0] = { 0, "sfc_dynamic_cfg" },
546 [MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1] = { 1, "sfc_dynamic_cfg" },
547 [MC_CMD_NVRAM_TYPE_EXP_ROM] = { 0, "sfc_exp_rom" },
548 [MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0] = { 0, "sfc_exp_rom_cfg" },
549 [MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1] = { 1, "sfc_exp_rom_cfg" },
550 [MC_CMD_NVRAM_TYPE_PHY_PORT0] = { 0, "sfc_phy_fw" },
551 [MC_CMD_NVRAM_TYPE_PHY_PORT1] = { 1, "sfc_phy_fw" },
554 static int siena_mtd_probe_partition(struct efx_nic *efx,
555 struct efx_mtd *efx_mtd,
556 unsigned int part_id,
559 struct efx_mtd_partition *part = &efx_mtd->part[part_id];
560 struct siena_nvram_type_info *info;
561 size_t size, erase_size;
565 if (type >= ARRAY_SIZE(siena_nvram_types))
568 info = &siena_nvram_types[type];
570 if (info->port != efx_port_num(efx))
573 rc = efx_mcdi_nvram_info(efx, type, &size, &erase_size, &protected);
577 return -ENODEV; /* hide it */
579 part->mcdi.nvram_type = type;
580 part->type_name = info->name;
582 part->mtd.type = MTD_NORFLASH;
583 part->mtd.flags = MTD_CAP_NORFLASH;
584 part->mtd.size = size;
585 part->mtd.erasesize = erase_size;
590 static int siena_mtd_get_fw_subtypes(struct efx_nic *efx,
591 struct efx_mtd *efx_mtd)
593 struct efx_mtd_partition *part;
594 uint16_t fw_subtype_list[MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_LEN /
598 rc = efx_mcdi_get_board_cfg(efx, NULL, fw_subtype_list);
602 efx_for_each_partition(part, efx_mtd)
603 part->mcdi.fw_subtype = fw_subtype_list[part->mcdi.nvram_type];
608 static int siena_mtd_probe(struct efx_nic *efx)
610 struct efx_mtd *efx_mtd;
617 rc = efx_mcdi_nvram_types(efx, &nvram_types);
621 efx_mtd = kzalloc(sizeof(*efx_mtd) +
622 hweight32(nvram_types) * sizeof(efx_mtd->part[0]),
627 efx_mtd->name = "Siena NVRAM manager";
629 efx_mtd->ops = &siena_mtd_ops;
632 efx_mtd->n_parts = 0;
634 while (nvram_types != 0) {
635 if (nvram_types & 1) {
636 rc = siena_mtd_probe_partition(efx, efx_mtd,
637 efx_mtd->n_parts, type);
640 else if (rc != -ENODEV)
647 rc = siena_mtd_get_fw_subtypes(efx, efx_mtd);
651 rc = efx_mtd_probe_device(efx, efx_mtd);