2 sis190.c: Silicon Integrated Systems SiS190 ethernet driver
4 Copyright (c) 2003 K.M. Liu <kmliu@sis.com>
5 Copyright (c) 2003, 2004 Jeff Garzik <jgarzik@pobox.com>
6 Copyright (c) 2003, 2004, 2005 Francois Romieu <romieu@fr.zoreil.com>
8 Based on r8169.c, tg3.c, 8139cp.c, skge.c, epic100.c and SiS 190/191
11 This software may be used and distributed according to the terms of
12 the GNU General Public License (GPL), incorporated herein by reference.
13 Drivers based on or derived from this code fall under the GPL and must
14 retain the authorship, copyright and license notice. This file is not
15 a complete program and may only be used when the entire operating
16 system is licensed under the GPL.
18 See the file COPYING in this distribution for more information.
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/netdevice.h>
25 #include <linux/rtnetlink.h>
26 #include <linux/etherdevice.h>
27 #include <linux/ethtool.h>
28 #include <linux/pci.h>
29 #include <linux/mii.h>
30 #include <linux/delay.h>
31 #include <linux/crc32.h>
32 #include <linux/dma-mapping.h>
35 #define net_drv(p, arg...) if (netif_msg_drv(p)) \
37 #define net_probe(p, arg...) if (netif_msg_probe(p)) \
39 #define net_link(p, arg...) if (netif_msg_link(p)) \
41 #define net_intr(p, arg...) if (netif_msg_intr(p)) \
43 #define net_tx_err(p, arg...) if (netif_msg_tx_err(p)) \
46 #define PHY_MAX_ADDR 32
47 #define PHY_ID_ANY 0x1f
48 #define MII_REG_ANY 0x1f
50 #ifdef CONFIG_SIS190_NAPI
51 #define NAPI_SUFFIX "-NAPI"
53 #define NAPI_SUFFIX ""
56 #define DRV_VERSION "1.2" NAPI_SUFFIX
57 #define DRV_NAME "sis190"
58 #define SIS190_DRIVER_NAME DRV_NAME " Gigabit Ethernet driver " DRV_VERSION
59 #define PFX DRV_NAME ": "
61 #ifdef CONFIG_SIS190_NAPI
62 #define sis190_rx_skb netif_receive_skb
63 #define sis190_rx_quota(count, quota) min(count, quota)
65 #define sis190_rx_skb netif_rx
66 #define sis190_rx_quota(count, quota) count
69 #define MAC_ADDR_LEN 6
71 #define NUM_TX_DESC 64 /* [8..1024] */
72 #define NUM_RX_DESC 64 /* [8..8192] */
73 #define TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
74 #define RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
75 #define RX_BUF_SIZE 1536
76 #define RX_BUF_MASK 0xfff8
78 #define SIS190_REGS_SIZE 0x80
79 #define SIS190_TX_TIMEOUT (6*HZ)
80 #define SIS190_PHY_TIMEOUT (10*HZ)
81 #define SIS190_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | \
82 NETIF_MSG_LINK | NETIF_MSG_IFUP | \
85 /* Enhanced PHY access register bit definitions */
86 #define EhnMIIread 0x0000
87 #define EhnMIIwrite 0x0020
88 #define EhnMIIdataShift 16
89 #define EhnMIIpmdShift 6 /* 7016 only */
90 #define EhnMIIregShift 11
91 #define EhnMIIreq 0x0010
92 #define EhnMIInotDone 0x0010
94 /* Write/read MMIO register */
95 #define SIS_W8(reg, val) writeb ((val), ioaddr + (reg))
96 #define SIS_W16(reg, val) writew ((val), ioaddr + (reg))
97 #define SIS_W32(reg, val) writel ((val), ioaddr + (reg))
98 #define SIS_R8(reg) readb (ioaddr + (reg))
99 #define SIS_R16(reg) readw (ioaddr + (reg))
100 #define SIS_R32(reg) readl (ioaddr + (reg))
102 #define SIS_PCI_COMMIT() SIS_R32(IntrControl)
104 enum sis190_registers {
106 TxDescStartAddr = 0x04,
107 rsv0 = 0x08, // reserved
108 TxSts = 0x0c, // unused (Control/Status)
110 RxDescStartAddr = 0x14,
111 rsv1 = 0x18, // reserved
112 RxSts = 0x1c, // unused
116 IntrTimer = 0x2c, // unused (Interupt Timer)
117 PMControl = 0x30, // unused (Power Mgmt Control/Status)
118 rsv2 = 0x34, // reserved
121 StationControl = 0x40,
123 GIoCR = 0x48, // unused (GMAC IO Compensation)
124 GIoCtrl = 0x4c, // unused (GMAC IO Control)
126 TxLimit = 0x54, // unused (Tx MAC Timer/TryLimit)
127 RGDelay = 0x58, // unused (RGMII Tx Internal Delay)
128 rsv3 = 0x5c, // reserved
132 // Undocumented = 0x6c,
134 RxWolData = 0x74, // unused (Rx WOL Data Access)
135 RxMPSControl = 0x78, // unused (Rx MPS Control)
136 rsv4 = 0x7c, // reserved
139 enum sis190_register_content {
141 SoftInt = 0x40000000, // unused
142 Timeup = 0x20000000, // unused
143 PauseFrame = 0x00080000, // unused
144 MagicPacket = 0x00040000, // unused
145 WakeupFrame = 0x00020000, // unused
146 LinkChange = 0x00010000,
147 RxQEmpty = 0x00000080,
149 TxQ1Empty = 0x00000020, // unused
150 TxQ1Int = 0x00000010,
151 TxQ0Empty = 0x00000008, // unused
152 TxQ0Int = 0x00000004,
158 CmdRxEnb = 0x08, // unused
160 RxBufEmpty = 0x01, // unused
163 Cfg9346_Lock = 0x00, // unused
164 Cfg9346_Unlock = 0xc0, // unused
167 AcceptErr = 0x20, // unused
168 AcceptRunt = 0x10, // unused
169 AcceptBroadcast = 0x0800,
170 AcceptMulticast = 0x0400,
171 AcceptMyPhys = 0x0200,
172 AcceptAllPhys = 0x0100,
176 RxCfgDMAShift = 8, // 0x1a in RxControl ?
179 TxInterFrameGapShift = 24,
180 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
190 LinkStatus = 0x02, // unused
191 FullDup = 0x01, // unused
194 TBILinkOK = 0x02000000, // unused
211 enum _DescStatusBit {
213 OWNbit = 0x80000000, // RXOWN/TXOWN
214 INTbit = 0x40000000, // RXINT/TXINT
215 CRCbit = 0x00020000, // CRCOFF/CRCEN
216 PADbit = 0x00010000, // PREADD/PADEN
218 RingEnd = 0x80000000,
220 LSEN = 0x08000000, // TSO ? -- FR
247 RxDescCountMask = 0x7f000000, // multi-desc pkt when > 1 ? -- FR
256 RxSizeMask = 0x0000ffff
258 * The asic could apparently do vlan, TSO, jumbo (sis191 only) and
259 * provide two (unused with Linux) Tx queues. No publically
260 * available documentation alas.
264 enum sis190_eeprom_access_register_bits {
265 EECS = 0x00000001, // unused
266 EECLK = 0x00000002, // unused
267 EEDO = 0x00000008, // unused
268 EEDI = 0x00000004, // unused
271 EEWOP = 0x00000100 // unused
274 /* EEPROM Addresses */
275 enum sis190_eeprom_address {
276 EEPROMSignature = 0x00,
277 EEPROMCLK = 0x01, // unused
282 struct sis190_private {
283 void __iomem *mmio_addr;
284 struct pci_dev *pci_dev;
285 struct net_device_stats stats;
294 struct RxDesc *RxDescRing;
295 struct TxDesc *TxDescRing;
296 struct sk_buff *Rx_skbuff[NUM_RX_DESC];
297 struct sk_buff *Tx_skbuff[NUM_TX_DESC];
298 struct work_struct phy_task;
299 struct timer_list timer;
301 struct mii_if_info mii_if;
302 struct list_head first_phy;
306 struct list_head list;
313 enum sis190_phy_type {
320 static struct mii_chip_info {
324 } mii_chip_table[] = {
325 { "Broadcom PHY BCM5461", { 0x0020, 0x60c0 }, LAN },
326 { "Agere PHY ET1101B", { 0x0282, 0xf010 }, LAN },
327 { "Marvell PHY 88E1111", { 0x0141, 0x0cc0 }, LAN },
328 { "Realtek PHY RTL8201", { 0x0000, 0x8200 }, LAN },
332 const static struct {
334 u8 version; /* depend on docs */
335 u32 RxConfigMask; /* clear the bits supported by this chip */
336 } sis_chip_info[] = {
337 { DRV_NAME, 0x00, 0xff7e1880, },
340 static struct pci_device_id sis190_pci_tbl[] __devinitdata = {
341 { PCI_DEVICE(PCI_VENDOR_ID_SI, 0x0190), 0, 0, 0 },
345 MODULE_DEVICE_TABLE(pci, sis190_pci_tbl);
347 static int rx_copybreak = 200;
353 MODULE_DESCRIPTION("SiS sis190 Gigabit Ethernet driver");
354 module_param(rx_copybreak, int, 0);
355 MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
356 module_param_named(debug, debug.msg_enable, int, 0);
357 MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
358 MODULE_AUTHOR("K.M. Liu <kmliu@sis.com>, Ueimor <romieu@fr.zoreil.com>");
359 MODULE_VERSION(DRV_VERSION);
360 MODULE_LICENSE("GPL");
362 static const u32 sis190_intr_mask =
363 RxQEmpty | RxQInt | TxQ1Int | TxQ0Int | RxHalt | TxHalt | LinkChange;
366 * Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
367 * The chips use a 64 element hash table based on the Ethernet CRC.
369 static int multicast_filter_limit = 32;
371 static void __mdio_cmd(void __iomem *ioaddr, u32 ctl)
375 SIS_W32(GMIIControl, ctl);
379 for (i = 0; i < 100; i++) {
380 if (!(SIS_R32(GMIIControl) & EhnMIInotDone))
386 printk(KERN_ERR PFX "PHY command failed !\n");
389 static void mdio_write(void __iomem *ioaddr, int phy_id, int reg, int val)
391 __mdio_cmd(ioaddr, EhnMIIreq | EhnMIIwrite |
392 (((u32) reg) << EhnMIIregShift) | (phy_id << EhnMIIpmdShift) |
393 (((u32) val) << EhnMIIdataShift));
396 static int mdio_read(void __iomem *ioaddr, int phy_id, int reg)
398 __mdio_cmd(ioaddr, EhnMIIreq | EhnMIIread |
399 (((u32) reg) << EhnMIIregShift) | (phy_id << EhnMIIpmdShift));
401 return (u16) (SIS_R32(GMIIControl) >> EhnMIIdataShift);
404 static void __mdio_write(struct net_device *dev, int phy_id, int reg, int val)
406 struct sis190_private *tp = netdev_priv(dev);
408 mdio_write(tp->mmio_addr, phy_id, reg, val);
411 static int __mdio_read(struct net_device *dev, int phy_id, int reg)
413 struct sis190_private *tp = netdev_priv(dev);
415 return mdio_read(tp->mmio_addr, phy_id, reg);
418 static u16 mdio_read_latched(void __iomem *ioaddr, int phy_id, int reg)
420 mdio_read(ioaddr, phy_id, reg);
421 return mdio_read(ioaddr, phy_id, reg);
424 static u16 __devinit sis190_read_eeprom(void __iomem *ioaddr, u32 reg)
429 if (!(SIS_R32(ROMControl) & 0x0002))
432 SIS_W32(ROMInterface, EEREQ | EEROP | (reg << 10));
434 for (i = 0; i < 200; i++) {
435 if (!(SIS_R32(ROMInterface) & EEREQ)) {
436 data = (SIS_R32(ROMInterface) & 0xffff0000) >> 16;
445 static void sis190_irq_mask_and_ack(void __iomem *ioaddr)
447 SIS_W32(IntrMask, 0x00);
448 SIS_W32(IntrStatus, 0xffffffff);
452 static void sis190_asic_down(void __iomem *ioaddr)
454 /* Stop the chip's Tx and Rx DMA processes. */
456 SIS_W32(TxControl, 0x1a00);
457 SIS_W32(RxControl, 0x1a00);
459 sis190_irq_mask_and_ack(ioaddr);
462 static void sis190_mark_as_last_descriptor(struct RxDesc *desc)
464 desc->size |= cpu_to_le32(RingEnd);
467 static inline void sis190_give_to_asic(struct RxDesc *desc, u32 rx_buf_sz)
469 u32 eor = le32_to_cpu(desc->size) & RingEnd;
472 desc->size = cpu_to_le32((rx_buf_sz & RX_BUF_MASK) | eor);
474 desc->status = cpu_to_le32(OWNbit | INTbit);
477 static inline void sis190_map_to_asic(struct RxDesc *desc, dma_addr_t mapping,
480 desc->addr = cpu_to_le32(mapping);
481 sis190_give_to_asic(desc, rx_buf_sz);
484 static inline void sis190_make_unusable_by_asic(struct RxDesc *desc)
487 desc->addr = 0xdeadbeef;
488 desc->size &= cpu_to_le32(RingEnd);
493 static int sis190_alloc_rx_skb(struct pci_dev *pdev, struct sk_buff **sk_buff,
494 struct RxDesc *desc, u32 rx_buf_sz)
500 skb = dev_alloc_skb(rx_buf_sz);
506 mapping = pci_map_single(pdev, skb->data, rx_buf_sz,
509 sis190_map_to_asic(desc, mapping, rx_buf_sz);
515 sis190_make_unusable_by_asic(desc);
519 static u32 sis190_rx_fill(struct sis190_private *tp, struct net_device *dev,
524 for (cur = start; cur < end; cur++) {
525 int ret, i = cur % NUM_RX_DESC;
527 if (tp->Rx_skbuff[i])
530 ret = sis190_alloc_rx_skb(tp->pci_dev, tp->Rx_skbuff + i,
531 tp->RxDescRing + i, tp->rx_buf_sz);
538 static inline int sis190_try_rx_copy(struct sk_buff **sk_buff, int pkt_size,
539 struct RxDesc *desc, int rx_buf_sz)
543 if (pkt_size < rx_copybreak) {
546 skb = dev_alloc_skb(pkt_size + NET_IP_ALIGN);
548 skb_reserve(skb, NET_IP_ALIGN);
549 eth_copy_and_sum(skb, sk_buff[0]->data, pkt_size, 0);
551 sis190_give_to_asic(desc, rx_buf_sz);
558 static inline int sis190_rx_pkt_err(u32 status, struct net_device_stats *stats)
560 #define ErrMask (OVRUN | SHORT | LIMIT | MIIER | NIBON | COLON | ABORT)
562 if ((status & CRCOK) && !(status & ErrMask))
565 if (!(status & CRCOK))
566 stats->rx_crc_errors++;
567 else if (status & OVRUN)
568 stats->rx_over_errors++;
569 else if (status & (SHORT | LIMIT))
570 stats->rx_length_errors++;
571 else if (status & (MIIER | NIBON | COLON))
572 stats->rx_frame_errors++;
578 static int sis190_rx_interrupt(struct net_device *dev,
579 struct sis190_private *tp, void __iomem *ioaddr)
581 struct net_device_stats *stats = &tp->stats;
582 u32 rx_left, cur_rx = tp->cur_rx;
585 rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
586 rx_left = sis190_rx_quota(rx_left, (u32) dev->quota);
588 for (; rx_left > 0; rx_left--, cur_rx++) {
589 unsigned int entry = cur_rx % NUM_RX_DESC;
590 struct RxDesc *desc = tp->RxDescRing + entry;
593 if (desc->status & OWNbit)
596 status = le32_to_cpu(desc->PSize);
598 // net_intr(tp, KERN_INFO "%s: Rx PSize = %08x.\n", dev->name,
601 if (sis190_rx_pkt_err(status, stats) < 0)
602 sis190_give_to_asic(desc, tp->rx_buf_sz);
604 struct sk_buff *skb = tp->Rx_skbuff[entry];
605 int pkt_size = (status & RxSizeMask) - 4;
606 void (*pci_action)(struct pci_dev *, dma_addr_t,
607 size_t, int) = pci_dma_sync_single_for_device;
609 if (unlikely(pkt_size > tp->rx_buf_sz)) {
610 net_intr(tp, KERN_INFO
611 "%s: (frag) status = %08x.\n",
614 stats->rx_length_errors++;
615 sis190_give_to_asic(desc, tp->rx_buf_sz);
619 pci_dma_sync_single_for_cpu(tp->pci_dev,
620 le32_to_cpu(desc->addr), tp->rx_buf_sz,
623 if (sis190_try_rx_copy(&skb, pkt_size, desc,
625 pci_action = pci_unmap_single;
626 tp->Rx_skbuff[entry] = NULL;
627 sis190_make_unusable_by_asic(desc);
630 pci_action(tp->pci_dev, le32_to_cpu(desc->addr),
631 tp->rx_buf_sz, PCI_DMA_FROMDEVICE);
634 skb_put(skb, pkt_size);
635 skb->protocol = eth_type_trans(skb, dev);
639 dev->last_rx = jiffies;
641 stats->rx_bytes += pkt_size;
642 if ((status & BCAST) == MCAST)
646 count = cur_rx - tp->cur_rx;
649 delta = sis190_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx);
650 if (!delta && count && netif_msg_intr(tp))
651 printk(KERN_INFO "%s: no Rx buffer allocated.\n", dev->name);
652 tp->dirty_rx += delta;
654 if (((tp->dirty_rx + NUM_RX_DESC) == tp->cur_rx) && netif_msg_intr(tp))
655 printk(KERN_EMERG "%s: Rx buffers exhausted.\n", dev->name);
660 static void sis190_unmap_tx_skb(struct pci_dev *pdev, struct sk_buff *skb,
665 len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
667 pci_unmap_single(pdev, le32_to_cpu(desc->addr), len, PCI_DMA_TODEVICE);
669 memset(desc, 0x00, sizeof(*desc));
672 static void sis190_tx_interrupt(struct net_device *dev,
673 struct sis190_private *tp, void __iomem *ioaddr)
675 u32 pending, dirty_tx = tp->dirty_tx;
677 * It would not be needed if queueing was allowed to be enabled
678 * again too early (hint: think preempt and unclocked smp systems).
680 unsigned int queue_stopped;
683 pending = tp->cur_tx - dirty_tx;
684 queue_stopped = (pending == NUM_TX_DESC);
686 for (; pending; pending--, dirty_tx++) {
687 unsigned int entry = dirty_tx % NUM_TX_DESC;
688 struct TxDesc *txd = tp->TxDescRing + entry;
691 if (le32_to_cpu(txd->status) & OWNbit)
694 skb = tp->Tx_skbuff[entry];
696 tp->stats.tx_packets++;
697 tp->stats.tx_bytes += skb->len;
699 sis190_unmap_tx_skb(tp->pci_dev, skb, txd);
700 tp->Tx_skbuff[entry] = NULL;
701 dev_kfree_skb_irq(skb);
704 if (tp->dirty_tx != dirty_tx) {
705 tp->dirty_tx = dirty_tx;
708 netif_wake_queue(dev);
713 * The interrupt handler does all of the Rx thread work and cleans up after
716 static irqreturn_t sis190_interrupt(int irq, void *__dev, struct pt_regs *regs)
718 struct net_device *dev = __dev;
719 struct sis190_private *tp = netdev_priv(dev);
720 void __iomem *ioaddr = tp->mmio_addr;
721 unsigned int handled = 0;
724 status = SIS_R32(IntrStatus);
726 if ((status == 0xffffffff) || !status)
731 if (unlikely(!netif_running(dev))) {
732 sis190_asic_down(ioaddr);
736 SIS_W32(IntrStatus, status);
738 // net_intr(tp, KERN_INFO "%s: status = %08x.\n", dev->name, status);
740 if (status & LinkChange) {
741 net_intr(tp, KERN_INFO "%s: link change.\n", dev->name);
742 schedule_work(&tp->phy_task);
746 sis190_rx_interrupt(dev, tp, ioaddr);
748 if (status & TxQ0Int)
749 sis190_tx_interrupt(dev, tp, ioaddr);
751 return IRQ_RETVAL(handled);
754 #ifdef CONFIG_NET_POLL_CONTROLLER
755 static void sis190_netpoll(struct net_device *dev)
757 struct sis190_private *tp = netdev_priv(dev);
758 struct pci_dev *pdev = tp->pci_dev;
760 disable_irq(pdev->irq);
761 sis190_interrupt(pdev->irq, dev, NULL);
762 enable_irq(pdev->irq);
766 static void sis190_free_rx_skb(struct sis190_private *tp,
767 struct sk_buff **sk_buff, struct RxDesc *desc)
769 struct pci_dev *pdev = tp->pci_dev;
771 pci_unmap_single(pdev, le32_to_cpu(desc->addr), tp->rx_buf_sz,
773 dev_kfree_skb(*sk_buff);
775 sis190_make_unusable_by_asic(desc);
778 static void sis190_rx_clear(struct sis190_private *tp)
782 for (i = 0; i < NUM_RX_DESC; i++) {
783 if (!tp->Rx_skbuff[i])
785 sis190_free_rx_skb(tp, tp->Rx_skbuff + i, tp->RxDescRing + i);
789 static void sis190_init_ring_indexes(struct sis190_private *tp)
791 tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
794 static int sis190_init_ring(struct net_device *dev)
796 struct sis190_private *tp = netdev_priv(dev);
798 sis190_init_ring_indexes(tp);
800 memset(tp->Tx_skbuff, 0x0, NUM_TX_DESC * sizeof(struct sk_buff *));
801 memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
803 if (sis190_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC)
806 sis190_mark_as_last_descriptor(tp->RxDescRing + NUM_RX_DESC - 1);
815 static void sis190_set_rx_mode(struct net_device *dev)
817 struct sis190_private *tp = netdev_priv(dev);
818 void __iomem *ioaddr = tp->mmio_addr;
820 u32 mc_filter[2]; /* Multicast hash filter */
823 if (dev->flags & IFF_PROMISC) {
824 /* Unconditionally log net taps. */
825 net_drv(tp, KERN_NOTICE "%s: Promiscuous mode enabled.\n",
828 AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
830 mc_filter[1] = mc_filter[0] = 0xffffffff;
831 } else if ((dev->mc_count > multicast_filter_limit) ||
832 (dev->flags & IFF_ALLMULTI)) {
833 /* Too many to filter perfectly -- accept all multicasts. */
834 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
835 mc_filter[1] = mc_filter[0] = 0xffffffff;
837 struct dev_mc_list *mclist;
840 rx_mode = AcceptBroadcast | AcceptMyPhys;
841 mc_filter[1] = mc_filter[0] = 0;
842 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
843 i++, mclist = mclist->next) {
845 ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
846 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
847 rx_mode |= AcceptMulticast;
851 spin_lock_irqsave(&tp->lock, flags);
853 SIS_W16(RxMacControl, rx_mode | 0x2);
854 SIS_W32(RxHashTable, mc_filter[0]);
855 SIS_W32(RxHashTable + 4, mc_filter[1]);
857 spin_unlock_irqrestore(&tp->lock, flags);
860 static void sis190_soft_reset(void __iomem *ioaddr)
862 SIS_W32(IntrControl, 0x8000);
865 SIS_W32(IntrControl, 0x0);
866 sis190_asic_down(ioaddr);
870 static void sis190_hw_start(struct net_device *dev)
872 struct sis190_private *tp = netdev_priv(dev);
873 void __iomem *ioaddr = tp->mmio_addr;
875 sis190_soft_reset(ioaddr);
877 SIS_W32(TxDescStartAddr, tp->tx_dma);
878 SIS_W32(RxDescStartAddr, tp->rx_dma);
880 SIS_W32(IntrStatus, 0xffffffff);
881 SIS_W32(IntrMask, 0x0);
883 * Default is 100Mbps.
884 * A bit strange: 100Mbps is 0x1801 elsewhere -- FR 2005/06/09
886 SIS_W16(StationControl, 0x1901);
887 SIS_W32(GMIIControl, 0x0);
888 SIS_W32(TxMacControl, 0x60);
889 SIS_W16(RxMacControl, 0x02);
890 SIS_W32(RxHashTable, 0x0);
892 SIS_W32(RxWolCtrl, 0x0);
893 SIS_W32(RxWolData, 0x0);
897 sis190_set_rx_mode(dev);
899 /* Enable all known interrupts by setting the interrupt mask. */
900 SIS_W32(IntrMask, sis190_intr_mask);
902 SIS_W32(TxControl, 0x1a00 | CmdTxEnb);
903 SIS_W32(RxControl, 0x1a1d);
905 netif_start_queue(dev);
908 static void sis190_phy_task(void * data)
910 struct net_device *dev = data;
911 struct sis190_private *tp = netdev_priv(dev);
912 void __iomem *ioaddr = tp->mmio_addr;
913 int phy_id = tp->mii_if.phy_id;
918 val = mdio_read(ioaddr, phy_id, MII_BMCR);
919 if (val & BMCR_RESET) {
920 // FIXME: needlessly high ? -- FR 02/07/2005
921 mod_timer(&tp->timer, jiffies + HZ/10);
922 } else if (!(mdio_read_latched(ioaddr, phy_id, MII_BMSR) &
923 BMSR_ANEGCOMPLETE)) {
924 net_link(tp, KERN_WARNING "%s: PHY reset until link up.\n",
926 netif_carrier_off(dev);
927 mdio_write(ioaddr, phy_id, MII_BMCR, val | BMCR_RESET);
928 mod_timer(&tp->timer, jiffies + SIS190_PHY_TIMEOUT);
936 { LPA_1000XFULL | LPA_SLCT,
937 "1000 Mbps Full Duplex",
939 { LPA_1000XHALF | LPA_SLCT,
940 "1000 Mbps Half Duplex",
943 "100 Mbps Full Duplex",
946 "100 Mbps Half Duplex",
949 "10 Mbps Full Duplex",
952 "10 Mbps Half Duplex",
954 { 0, "unknown", 0x0000 }
958 val = mdio_read(ioaddr, phy_id, 0x1f);
959 net_link(tp, KERN_INFO "%s: mii ext = %04x.\n", dev->name, val);
961 val = mdio_read(ioaddr, phy_id, MII_LPA);
962 adv = mdio_read(ioaddr, phy_id, MII_ADVERTISE);
963 net_link(tp, KERN_INFO "%s: mii lpa = %04x adv = %04x.\n",
964 dev->name, val, adv);
968 for (p = reg31; p->ctl; p++) {
969 if ((val & p->val) == p->val)
973 SIS_W16(StationControl, p->ctl);
974 net_link(tp, KERN_INFO "%s: link on %s mode.\n", dev->name,
976 netif_carrier_on(dev);
982 static void sis190_phy_timer(unsigned long __opaque)
984 struct net_device *dev = (struct net_device *)__opaque;
985 struct sis190_private *tp = netdev_priv(dev);
987 if (likely(netif_running(dev)))
988 schedule_work(&tp->phy_task);
991 static inline void sis190_delete_timer(struct net_device *dev)
993 struct sis190_private *tp = netdev_priv(dev);
995 del_timer_sync(&tp->timer);
998 static inline void sis190_request_timer(struct net_device *dev)
1000 struct sis190_private *tp = netdev_priv(dev);
1001 struct timer_list *timer = &tp->timer;
1004 timer->expires = jiffies + SIS190_PHY_TIMEOUT;
1005 timer->data = (unsigned long)dev;
1006 timer->function = sis190_phy_timer;
1010 static void sis190_set_rxbufsize(struct sis190_private *tp,
1011 struct net_device *dev)
1013 unsigned int mtu = dev->mtu;
1015 tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE;
1016 /* RxDesc->size has a licence to kill the lower bits */
1017 if (tp->rx_buf_sz & 0x07) {
1019 tp->rx_buf_sz &= RX_BUF_MASK;
1023 static int sis190_open(struct net_device *dev)
1025 struct sis190_private *tp = netdev_priv(dev);
1026 struct pci_dev *pdev = tp->pci_dev;
1029 sis190_set_rxbufsize(tp, dev);
1032 * Rx and Tx descriptors need 256 bytes alignment.
1033 * pci_alloc_consistent() guarantees a stronger alignment.
1035 tp->TxDescRing = pci_alloc_consistent(pdev, TX_RING_BYTES, &tp->tx_dma);
1036 if (!tp->TxDescRing)
1039 tp->RxDescRing = pci_alloc_consistent(pdev, RX_RING_BYTES, &tp->rx_dma);
1040 if (!tp->RxDescRing)
1043 rc = sis190_init_ring(dev);
1047 INIT_WORK(&tp->phy_task, sis190_phy_task, dev);
1049 sis190_request_timer(dev);
1051 rc = request_irq(dev->irq, sis190_interrupt, SA_SHIRQ, dev->name, dev);
1053 goto err_release_timer_2;
1055 sis190_hw_start(dev);
1059 err_release_timer_2:
1060 sis190_delete_timer(dev);
1061 sis190_rx_clear(tp);
1063 pci_free_consistent(tp->pci_dev, RX_RING_BYTES, tp->RxDescRing,
1066 pci_free_consistent(tp->pci_dev, TX_RING_BYTES, tp->TxDescRing,
1071 static void sis190_tx_clear(struct sis190_private *tp)
1075 for (i = 0; i < NUM_TX_DESC; i++) {
1076 struct sk_buff *skb = tp->Tx_skbuff[i];
1081 sis190_unmap_tx_skb(tp->pci_dev, skb, tp->TxDescRing + i);
1082 tp->Tx_skbuff[i] = NULL;
1085 tp->stats.tx_dropped++;
1087 tp->cur_tx = tp->dirty_tx = 0;
1090 static void sis190_down(struct net_device *dev)
1092 struct sis190_private *tp = netdev_priv(dev);
1093 void __iomem *ioaddr = tp->mmio_addr;
1094 unsigned int poll_locked = 0;
1096 sis190_delete_timer(dev);
1098 netif_stop_queue(dev);
1100 flush_scheduled_work();
1103 spin_lock_irq(&tp->lock);
1105 sis190_asic_down(ioaddr);
1107 spin_unlock_irq(&tp->lock);
1109 synchronize_irq(dev->irq);
1112 netif_poll_disable(dev);
1116 synchronize_sched();
1118 } while (SIS_R32(IntrMask));
1120 sis190_tx_clear(tp);
1121 sis190_rx_clear(tp);
1124 static int sis190_close(struct net_device *dev)
1126 struct sis190_private *tp = netdev_priv(dev);
1127 struct pci_dev *pdev = tp->pci_dev;
1131 free_irq(dev->irq, dev);
1133 netif_poll_enable(dev);
1135 pci_free_consistent(pdev, TX_RING_BYTES, tp->TxDescRing, tp->tx_dma);
1136 pci_free_consistent(pdev, RX_RING_BYTES, tp->RxDescRing, tp->rx_dma);
1138 tp->TxDescRing = NULL;
1139 tp->RxDescRing = NULL;
1144 static int sis190_start_xmit(struct sk_buff *skb, struct net_device *dev)
1146 struct sis190_private *tp = netdev_priv(dev);
1147 void __iomem *ioaddr = tp->mmio_addr;
1148 u32 len, entry, dirty_tx;
1149 struct TxDesc *desc;
1152 if (unlikely(skb->len < ETH_ZLEN)) {
1153 skb = skb_padto(skb, ETH_ZLEN);
1155 tp->stats.tx_dropped++;
1163 entry = tp->cur_tx % NUM_TX_DESC;
1164 desc = tp->TxDescRing + entry;
1166 if (unlikely(le32_to_cpu(desc->status) & OWNbit)) {
1167 netif_stop_queue(dev);
1168 net_tx_err(tp, KERN_ERR PFX
1169 "%s: BUG! Tx Ring full when queue awake!\n",
1171 return NETDEV_TX_BUSY;
1174 mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
1176 tp->Tx_skbuff[entry] = skb;
1178 desc->PSize = cpu_to_le32(len);
1179 desc->addr = cpu_to_le32(mapping);
1181 desc->size = cpu_to_le32(len);
1182 if (entry == (NUM_TX_DESC - 1))
1183 desc->size |= cpu_to_le32(RingEnd);
1187 desc->status = cpu_to_le32(OWNbit | INTbit | DEFbit | CRCbit | PADbit);
1193 SIS_W32(TxControl, 0x1a00 | CmdReset | CmdTxEnb);
1195 dev->trans_start = jiffies;
1197 dirty_tx = tp->dirty_tx;
1198 if ((tp->cur_tx - NUM_TX_DESC) == dirty_tx) {
1199 netif_stop_queue(dev);
1201 if (dirty_tx != tp->dirty_tx)
1202 netif_wake_queue(dev);
1205 return NETDEV_TX_OK;
1208 static struct net_device_stats *sis190_get_stats(struct net_device *dev)
1210 struct sis190_private *tp = netdev_priv(dev);
1215 static void sis190_free_phy(struct list_head *first_phy)
1217 struct sis190_phy *cur, *next;
1219 list_for_each_entry_safe(cur, next, first_phy, list) {
1225 * sis190_default_phy - Select default PHY for sis190 mac.
1226 * @dev: the net device to probe for
1228 * Select first detected PHY with link as default.
1229 * If no one is link on, select PHY whose types is HOME as default.
1230 * If HOME doesn't exist, select LAN.
1232 static u16 sis190_default_phy(struct net_device *dev)
1234 struct sis190_phy *phy, *phy_home, *phy_default, *phy_lan;
1235 struct sis190_private *tp = netdev_priv(dev);
1236 struct mii_if_info *mii_if = &tp->mii_if;
1237 void __iomem *ioaddr = tp->mmio_addr;
1240 phy_home = phy_default = phy_lan = NULL;
1242 list_for_each_entry(phy, &tp->first_phy, list) {
1243 status = mdio_read_latched(ioaddr, phy->phy_id, MII_BMSR);
1245 // Link ON & Not select default PHY & not ghost PHY.
1246 if ((status & BMSR_LSTATUS) &&
1248 (phy->type != UNKNOWN)) {
1251 status = mdio_read(ioaddr, phy->phy_id, MII_BMCR);
1252 mdio_write(ioaddr, phy->phy_id, MII_BMCR,
1253 status | BMCR_ANENABLE | BMCR_ISOLATE);
1254 if (phy->type == HOME)
1256 else if (phy->type == LAN)
1263 phy_default = phy_home;
1265 phy_default = phy_lan;
1267 phy_default = list_entry(&tp->first_phy,
1268 struct sis190_phy, list);
1271 if (mii_if->phy_id != phy_default->phy_id) {
1272 mii_if->phy_id = phy_default->phy_id;
1273 net_probe(tp, KERN_INFO
1274 "%s: Using transceiver at address %d as default.\n",
1275 pci_name(tp->pci_dev), mii_if->phy_id);
1278 status = mdio_read(ioaddr, mii_if->phy_id, MII_BMCR);
1279 status &= (~BMCR_ISOLATE);
1281 mdio_write(ioaddr, mii_if->phy_id, MII_BMCR, status);
1282 status = mdio_read_latched(ioaddr, mii_if->phy_id, MII_BMSR);
1287 static void sis190_init_phy(struct net_device *dev, struct sis190_private *tp,
1288 struct sis190_phy *phy, unsigned int phy_id,
1291 void __iomem *ioaddr = tp->mmio_addr;
1292 struct mii_chip_info *p;
1294 INIT_LIST_HEAD(&phy->list);
1295 phy->status = mii_status;
1296 phy->phy_id = phy_id;
1298 phy->id[0] = mdio_read(ioaddr, phy_id, MII_PHYSID1);
1299 phy->id[1] = mdio_read(ioaddr, phy_id, MII_PHYSID2);
1301 for (p = mii_chip_table; p->type; p++) {
1302 if ((p->id[0] == phy->id[0]) &&
1303 (p->id[1] == (phy->id[1] & 0xfff0))) {
1309 phy->type = (p->type == MIX) ?
1310 ((mii_status & (BMSR_100FULL | BMSR_100HALF)) ?
1311 LAN : HOME) : p->type;
1313 phy->type = UNKNOWN;
1315 net_probe(tp, KERN_INFO "%s: %s transceiver at address %d.\n",
1316 pci_name(tp->pci_dev),
1317 (phy->type == UNKNOWN) ? "Unknown PHY" : p->name, phy_id);
1321 * sis190_mii_probe - Probe MII PHY for sis190
1322 * @dev: the net device to probe for
1324 * Search for total of 32 possible mii phy addresses.
1325 * Identify and set current phy if found one,
1326 * return error if it failed to found.
1328 static int __devinit sis190_mii_probe(struct net_device *dev)
1330 struct sis190_private *tp = netdev_priv(dev);
1331 struct mii_if_info *mii_if = &tp->mii_if;
1332 void __iomem *ioaddr = tp->mmio_addr;
1336 INIT_LIST_HEAD(&tp->first_phy);
1338 for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
1339 struct sis190_phy *phy;
1342 status = mdio_read_latched(ioaddr, phy_id, MII_BMSR);
1344 // Try next mii if the current one is not accessible.
1345 if (status == 0xffff || status == 0x0000)
1348 phy = kmalloc(sizeof(*phy), GFP_KERNEL);
1350 sis190_free_phy(&tp->first_phy);
1355 sis190_init_phy(dev, tp, phy, phy_id, status);
1357 list_add(&tp->first_phy, &phy->list);
1360 if (list_empty(&tp->first_phy)) {
1361 net_probe(tp, KERN_INFO "%s: No MII transceivers found!\n",
1362 pci_name(tp->pci_dev));
1367 /* Select default PHY for mac */
1368 sis190_default_phy(dev);
1371 mii_if->mdio_read = __mdio_read;
1372 mii_if->mdio_write = __mdio_write;
1373 mii_if->phy_id_mask = PHY_ID_ANY;
1374 mii_if->reg_num_mask = MII_REG_ANY;
1379 static void __devexit sis190_mii_remove(struct net_device *dev)
1381 struct sis190_private *tp = netdev_priv(dev);
1383 sis190_free_phy(&tp->first_phy);
1386 static void sis190_release_board(struct pci_dev *pdev)
1388 struct net_device *dev = pci_get_drvdata(pdev);
1389 struct sis190_private *tp = netdev_priv(dev);
1391 iounmap(tp->mmio_addr);
1392 pci_release_regions(pdev);
1393 pci_disable_device(pdev);
1397 static struct net_device * __devinit sis190_init_board(struct pci_dev *pdev)
1399 struct sis190_private *tp;
1400 struct net_device *dev;
1401 void __iomem *ioaddr;
1404 dev = alloc_etherdev(sizeof(*tp));
1406 net_drv(&debug, KERN_ERR PFX "unable to alloc new ethernet\n");
1411 SET_MODULE_OWNER(dev);
1412 SET_NETDEV_DEV(dev, &pdev->dev);
1414 tp = netdev_priv(dev);
1415 tp->msg_enable = netif_msg_init(debug.msg_enable, SIS190_MSG_DEFAULT);
1417 rc = pci_enable_device(pdev);
1419 net_probe(tp, KERN_ERR "%s: enable failure\n", pci_name(pdev));
1420 goto err_free_dev_1;
1425 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
1426 net_probe(tp, KERN_ERR "%s: region #0 is no MMIO resource.\n",
1428 goto err_pci_disable_2;
1430 if (pci_resource_len(pdev, 0) < SIS190_REGS_SIZE) {
1431 net_probe(tp, KERN_ERR "%s: invalid PCI region size(s).\n",
1433 goto err_pci_disable_2;
1436 rc = pci_request_regions(pdev, DRV_NAME);
1438 net_probe(tp, KERN_ERR PFX "%s: could not request regions.\n",
1440 goto err_pci_disable_2;
1443 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1445 net_probe(tp, KERN_ERR "%s: DMA configuration failed.\n",
1447 goto err_free_res_3;
1450 pci_set_master(pdev);
1452 ioaddr = ioremap(pci_resource_start(pdev, 0), SIS190_REGS_SIZE);
1454 net_probe(tp, KERN_ERR "%s: cannot remap MMIO, aborting\n",
1457 goto err_free_res_3;
1461 tp->mmio_addr = ioaddr;
1463 sis190_irq_mask_and_ack(ioaddr);
1465 sis190_soft_reset(ioaddr);
1470 pci_release_regions(pdev);
1472 pci_disable_device(pdev);
1480 static void sis190_tx_timeout(struct net_device *dev)
1482 struct sis190_private *tp = netdev_priv(dev);
1483 void __iomem *ioaddr = tp->mmio_addr;
1486 /* Disable Tx, if not already */
1487 tmp8 = SIS_R8(TxControl);
1488 if (tmp8 & CmdTxEnb)
1489 SIS_W8(TxControl, tmp8 & ~CmdTxEnb);
1492 net_tx_err(tp, KERN_INFO "%s: Transmit timeout, status %08x %08x.\n",
1493 dev->name, SIS_R32(TxControl), SIS_R32(TxSts));
1495 /* Disable interrupts by clearing the interrupt mask. */
1496 SIS_W32(IntrMask, 0x0000);
1498 /* Stop a shared interrupt from scavenging while we are. */
1499 spin_lock_irq(&tp->lock);
1500 sis190_tx_clear(tp);
1501 spin_unlock_irq(&tp->lock);
1503 /* ...and finally, reset everything. */
1504 sis190_hw_start(dev);
1506 netif_wake_queue(dev);
1509 static int __devinit sis190_get_mac_addr_from_eeprom(struct pci_dev *pdev,
1510 struct net_device *dev)
1512 struct sis190_private *tp = netdev_priv(dev);
1513 void __iomem *ioaddr = tp->mmio_addr;
1517 net_probe(tp, KERN_INFO "%s: Read MAC address from EEPROM\n",
1520 /* Check to see if there is a sane EEPROM */
1521 sig = (u16) sis190_read_eeprom(ioaddr, EEPROMSignature);
1523 if ((sig == 0xffff) || (sig == 0x0000)) {
1524 net_probe(tp, KERN_INFO "%s: Error EEPROM read %x.\n",
1525 pci_name(pdev), sig);
1529 /* Get MAC address from EEPROM */
1530 for (i = 0; i < MAC_ADDR_LEN / 2; i++) {
1531 __le16 w = sis190_read_eeprom(ioaddr, EEPROMMACAddr + i);
1533 ((u16 *)dev->dev_addr)[0] = le16_to_cpu(w);
1540 * sis190_get_mac_addr_from_apc - Get MAC address for SiS965 model
1542 * @dev: network device to get address for
1544 * SiS965 model, use APC CMOS RAM to store MAC address.
1545 * APC CMOS RAM is accessed through ISA bridge.
1546 * MAC address is read into @net_dev->dev_addr.
1548 static int __devinit sis190_get_mac_addr_from_apc(struct pci_dev *pdev,
1549 struct net_device *dev)
1551 struct sis190_private *tp = netdev_priv(dev);
1552 struct pci_dev *isa_bridge;
1556 net_probe(tp, KERN_INFO "%s: Read MAC address from APC.\n",
1559 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0965, NULL);
1561 net_probe(tp, KERN_INFO "%s: Can not find ISA bridge.\n",
1566 /* Enable port 78h & 79h to access APC Registers. */
1567 pci_read_config_byte(isa_bridge, 0x48, &tmp8);
1568 reg = (tmp8 & ~0x02);
1569 pci_write_config_byte(isa_bridge, 0x48, reg);
1571 pci_read_config_byte(isa_bridge, 0x48, ®);
1573 for (i = 0; i < MAC_ADDR_LEN; i++) {
1574 outb(0x9 + i, 0x78);
1575 dev->dev_addr[i] = inb(0x79);
1581 /* Restore the value to ISA Bridge */
1582 pci_write_config_byte(isa_bridge, 0x48, tmp8);
1583 pci_dev_put(isa_bridge);
1589 * sis190_init_rxfilter - Initialize the Rx filter
1590 * @dev: network device to initialize
1592 * Set receive filter address to our MAC address
1593 * and enable packet filtering.
1595 static inline void sis190_init_rxfilter(struct net_device *dev)
1597 struct sis190_private *tp = netdev_priv(dev);
1598 void __iomem *ioaddr = tp->mmio_addr;
1602 ctl = SIS_R16(RxMacControl);
1604 * Disable packet filtering before setting filter.
1605 * Note: SiS's driver writes 32 bits but RxMacControl is 16 bits
1606 * only and followed by RxMacAddr (6 bytes). Strange. -- FR
1608 SIS_W16(RxMacControl, ctl & ~0x0f00);
1610 for (i = 0; i < MAC_ADDR_LEN; i++)
1611 SIS_W8(RxMacAddr + i, dev->dev_addr[i]);
1613 SIS_W16(RxMacControl, ctl);
1617 static int sis190_get_mac_addr(struct pci_dev *pdev, struct net_device *dev)
1621 pci_read_config_byte(pdev, 0x73, &from);
1623 return (from & 0x00000001) ?
1624 sis190_get_mac_addr_from_apc(pdev, dev) :
1625 sis190_get_mac_addr_from_eeprom(pdev, dev);
1628 static void sis190_set_speed_auto(struct net_device *dev)
1630 struct sis190_private *tp = netdev_priv(dev);
1631 void __iomem *ioaddr = tp->mmio_addr;
1632 int phy_id = tp->mii_if.phy_id;
1635 net_link(tp, KERN_INFO "%s: Enabling Auto-negotiation.\n", dev->name);
1637 val = mdio_read(ioaddr, phy_id, MII_ADVERTISE);
1639 // Enable 10/100 Full/Half Mode, leave MII_ADVERTISE bit4:0
1641 mdio_write(ioaddr, phy_id, MII_ADVERTISE, (val & ADVERTISE_SLCT) |
1642 ADVERTISE_100FULL | ADVERTISE_10FULL |
1643 ADVERTISE_100HALF | ADVERTISE_10HALF);
1645 // Enable 1000 Full Mode.
1646 mdio_write(ioaddr, phy_id, MII_CTRL1000, ADVERTISE_1000FULL);
1648 // Enable auto-negotiation and restart auto-negotiation.
1649 mdio_write(ioaddr, phy_id, MII_BMCR,
1650 BMCR_ANENABLE | BMCR_ANRESTART | BMCR_RESET);
1653 static int sis190_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1655 struct sis190_private *tp = netdev_priv(dev);
1657 return mii_ethtool_gset(&tp->mii_if, cmd);
1660 static int sis190_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1662 struct sis190_private *tp = netdev_priv(dev);
1664 return mii_ethtool_sset(&tp->mii_if, cmd);
1667 static void sis190_get_drvinfo(struct net_device *dev,
1668 struct ethtool_drvinfo *info)
1670 struct sis190_private *tp = netdev_priv(dev);
1672 strcpy(info->driver, DRV_NAME);
1673 strcpy(info->version, DRV_VERSION);
1674 strcpy(info->bus_info, pci_name(tp->pci_dev));
1677 static int sis190_get_regs_len(struct net_device *dev)
1679 return SIS190_REGS_SIZE;
1682 static void sis190_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1685 struct sis190_private *tp = netdev_priv(dev);
1686 unsigned long flags;
1688 if (regs->len > SIS190_REGS_SIZE)
1689 regs->len = SIS190_REGS_SIZE;
1691 spin_lock_irqsave(&tp->lock, flags);
1692 memcpy_fromio(p, tp->mmio_addr, regs->len);
1693 spin_unlock_irqrestore(&tp->lock, flags);
1696 static int sis190_nway_reset(struct net_device *dev)
1698 struct sis190_private *tp = netdev_priv(dev);
1700 return mii_nway_restart(&tp->mii_if);
1703 static u32 sis190_get_msglevel(struct net_device *dev)
1705 struct sis190_private *tp = netdev_priv(dev);
1707 return tp->msg_enable;
1710 static void sis190_set_msglevel(struct net_device *dev, u32 value)
1712 struct sis190_private *tp = netdev_priv(dev);
1714 tp->msg_enable = value;
1717 static struct ethtool_ops sis190_ethtool_ops = {
1718 .get_settings = sis190_get_settings,
1719 .set_settings = sis190_set_settings,
1720 .get_drvinfo = sis190_get_drvinfo,
1721 .get_regs_len = sis190_get_regs_len,
1722 .get_regs = sis190_get_regs,
1723 .get_link = ethtool_op_get_link,
1724 .get_msglevel = sis190_get_msglevel,
1725 .set_msglevel = sis190_set_msglevel,
1726 .nway_reset = sis190_nway_reset,
1729 static int sis190_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1731 struct sis190_private *tp = netdev_priv(dev);
1733 return !netif_running(dev) ? -EINVAL :
1734 generic_mii_ioctl(&tp->mii_if, if_mii(ifr), cmd, NULL);
1737 static int __devinit sis190_init_one(struct pci_dev *pdev,
1738 const struct pci_device_id *ent)
1740 static int printed_version = 0;
1741 struct sis190_private *tp;
1742 struct net_device *dev;
1743 void __iomem *ioaddr;
1746 if (!printed_version) {
1747 net_drv(&debug, KERN_INFO SIS190_DRIVER_NAME " loaded.\n");
1748 printed_version = 1;
1751 dev = sis190_init_board(pdev);
1757 tp = netdev_priv(dev);
1758 ioaddr = tp->mmio_addr;
1760 rc = sis190_get_mac_addr(pdev, dev);
1762 goto err_release_board;
1764 sis190_init_rxfilter(dev);
1766 INIT_WORK(&tp->phy_task, sis190_phy_task, dev);
1768 dev->open = sis190_open;
1769 dev->stop = sis190_close;
1770 dev->do_ioctl = sis190_ioctl;
1771 dev->get_stats = sis190_get_stats;
1772 dev->tx_timeout = sis190_tx_timeout;
1773 dev->watchdog_timeo = SIS190_TX_TIMEOUT;
1774 dev->hard_start_xmit = sis190_start_xmit;
1775 #ifdef CONFIG_NET_POLL_CONTROLLER
1776 dev->poll_controller = sis190_netpoll;
1778 dev->set_multicast_list = sis190_set_rx_mode;
1779 SET_ETHTOOL_OPS(dev, &sis190_ethtool_ops);
1780 dev->irq = pdev->irq;
1781 dev->base_addr = (unsigned long) 0xdead;
1783 spin_lock_init(&tp->lock);
1785 rc = sis190_mii_probe(dev);
1787 goto err_release_board;
1789 rc = register_netdev(dev);
1791 goto err_remove_mii;
1793 pci_set_drvdata(pdev, dev);
1795 net_probe(tp, KERN_INFO "%s: %s at %p (IRQ: %d), "
1796 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n",
1797 pci_name(pdev), sis_chip_info[ent->driver_data].name,
1799 dev->dev_addr[0], dev->dev_addr[1],
1800 dev->dev_addr[2], dev->dev_addr[3],
1801 dev->dev_addr[4], dev->dev_addr[5]);
1803 netif_carrier_off(dev);
1805 sis190_set_speed_auto(dev);
1810 sis190_mii_remove(dev);
1812 sis190_release_board(pdev);
1816 static void __devexit sis190_remove_one(struct pci_dev *pdev)
1818 struct net_device *dev = pci_get_drvdata(pdev);
1820 sis190_mii_remove(dev);
1821 unregister_netdev(dev);
1822 sis190_release_board(pdev);
1823 pci_set_drvdata(pdev, NULL);
1826 static struct pci_driver sis190_pci_driver = {
1828 .id_table = sis190_pci_tbl,
1829 .probe = sis190_init_one,
1830 .remove = __devexit_p(sis190_remove_one),
1833 static int __init sis190_init_module(void)
1835 return pci_module_init(&sis190_pci_driver);
1838 static void __exit sis190_cleanup_module(void)
1840 pci_unregister_driver(&sis190_pci_driver);
1843 module_init(sis190_init_module);
1844 module_exit(sis190_cleanup_module);