r8152: rename rx_buf_sz
[firefly-linux-kernel-4.4.55.git] / drivers / net / usb / r8152.c
1 /*
2  *  Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * version 2 as published by the Free Software Foundation.
7  *
8  */
9
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
22 #include <linux/ip.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25
26 /* Version Information */
27 #define DRIVER_VERSION "v1.06.0 (2014/03/03)"
28 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
29 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
30 #define MODULENAME "r8152"
31
32 #define R8152_PHY_ID            32
33
34 #define PLA_IDR                 0xc000
35 #define PLA_RCR                 0xc010
36 #define PLA_RMS                 0xc016
37 #define PLA_RXFIFO_CTRL0        0xc0a0
38 #define PLA_RXFIFO_CTRL1        0xc0a4
39 #define PLA_RXFIFO_CTRL2        0xc0a8
40 #define PLA_FMC                 0xc0b4
41 #define PLA_CFG_WOL             0xc0b6
42 #define PLA_TEREDO_CFG          0xc0bc
43 #define PLA_MAR                 0xcd00
44 #define PLA_BACKUP              0xd000
45 #define PAL_BDC_CR              0xd1a0
46 #define PLA_TEREDO_TIMER        0xd2cc
47 #define PLA_REALWOW_TIMER       0xd2e8
48 #define PLA_LEDSEL              0xdd90
49 #define PLA_LED_FEATURE         0xdd92
50 #define PLA_PHYAR               0xde00
51 #define PLA_BOOT_CTRL           0xe004
52 #define PLA_GPHY_INTR_IMR       0xe022
53 #define PLA_EEE_CR              0xe040
54 #define PLA_EEEP_CR             0xe080
55 #define PLA_MAC_PWR_CTRL        0xe0c0
56 #define PLA_MAC_PWR_CTRL2       0xe0ca
57 #define PLA_MAC_PWR_CTRL3       0xe0cc
58 #define PLA_MAC_PWR_CTRL4       0xe0ce
59 #define PLA_WDT6_CTRL           0xe428
60 #define PLA_TCR0                0xe610
61 #define PLA_TCR1                0xe612
62 #define PLA_MTPS                0xe615
63 #define PLA_TXFIFO_CTRL         0xe618
64 #define PLA_RSTTALLY            0xe800
65 #define PLA_CR                  0xe813
66 #define PLA_CRWECR              0xe81c
67 #define PLA_CONFIG12            0xe81e  /* CONFIG1, CONFIG2 */
68 #define PLA_CONFIG34            0xe820  /* CONFIG3, CONFIG4 */
69 #define PLA_CONFIG5             0xe822
70 #define PLA_PHY_PWR             0xe84c
71 #define PLA_OOB_CTRL            0xe84f
72 #define PLA_CPCR                0xe854
73 #define PLA_MISC_0              0xe858
74 #define PLA_MISC_1              0xe85a
75 #define PLA_OCP_GPHY_BASE       0xe86c
76 #define PLA_TALLYCNT            0xe890
77 #define PLA_SFF_STS_7           0xe8de
78 #define PLA_PHYSTATUS           0xe908
79 #define PLA_BP_BA               0xfc26
80 #define PLA_BP_0                0xfc28
81 #define PLA_BP_1                0xfc2a
82 #define PLA_BP_2                0xfc2c
83 #define PLA_BP_3                0xfc2e
84 #define PLA_BP_4                0xfc30
85 #define PLA_BP_5                0xfc32
86 #define PLA_BP_6                0xfc34
87 #define PLA_BP_7                0xfc36
88 #define PLA_BP_EN               0xfc38
89
90 #define USB_U2P3_CTRL           0xb460
91 #define USB_DEV_STAT            0xb808
92 #define USB_USB_CTRL            0xd406
93 #define USB_PHY_CTRL            0xd408
94 #define USB_TX_AGG              0xd40a
95 #define USB_RX_BUF_TH           0xd40c
96 #define USB_USB_TIMER           0xd428
97 #define USB_RX_EARLY_AGG        0xd42c
98 #define USB_PM_CTRL_STATUS      0xd432
99 #define USB_TX_DMA              0xd434
100 #define USB_TOLERANCE           0xd490
101 #define USB_LPM_CTRL            0xd41a
102 #define USB_UPS_CTRL            0xd800
103 #define USB_MISC_0              0xd81a
104 #define USB_POWER_CUT           0xd80a
105 #define USB_AFE_CTRL2           0xd824
106 #define USB_WDT11_CTRL          0xe43c
107 #define USB_BP_BA               0xfc26
108 #define USB_BP_0                0xfc28
109 #define USB_BP_1                0xfc2a
110 #define USB_BP_2                0xfc2c
111 #define USB_BP_3                0xfc2e
112 #define USB_BP_4                0xfc30
113 #define USB_BP_5                0xfc32
114 #define USB_BP_6                0xfc34
115 #define USB_BP_7                0xfc36
116 #define USB_BP_EN               0xfc38
117
118 /* OCP Registers */
119 #define OCP_ALDPS_CONFIG        0x2010
120 #define OCP_EEE_CONFIG1         0x2080
121 #define OCP_EEE_CONFIG2         0x2092
122 #define OCP_EEE_CONFIG3         0x2094
123 #define OCP_BASE_MII            0xa400
124 #define OCP_EEE_AR              0xa41a
125 #define OCP_EEE_DATA            0xa41c
126 #define OCP_PHY_STATUS          0xa420
127 #define OCP_POWER_CFG           0xa430
128 #define OCP_EEE_CFG             0xa432
129 #define OCP_SRAM_ADDR           0xa436
130 #define OCP_SRAM_DATA           0xa438
131 #define OCP_DOWN_SPEED          0xa442
132 #define OCP_EEE_CFG2            0xa5d0
133 #define OCP_ADC_CFG             0xbc06
134
135 /* SRAM Register */
136 #define SRAM_LPF_CFG            0x8012
137 #define SRAM_10M_AMP1           0x8080
138 #define SRAM_10M_AMP2           0x8082
139 #define SRAM_IMPEDANCE          0x8084
140
141 /* PLA_RCR */
142 #define RCR_AAP                 0x00000001
143 #define RCR_APM                 0x00000002
144 #define RCR_AM                  0x00000004
145 #define RCR_AB                  0x00000008
146 #define RCR_ACPT_ALL            (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
147
148 /* PLA_RXFIFO_CTRL0 */
149 #define RXFIFO_THR1_NORMAL      0x00080002
150 #define RXFIFO_THR1_OOB         0x01800003
151
152 /* PLA_RXFIFO_CTRL1 */
153 #define RXFIFO_THR2_FULL        0x00000060
154 #define RXFIFO_THR2_HIGH        0x00000038
155 #define RXFIFO_THR2_OOB         0x0000004a
156 #define RXFIFO_THR2_NORMAL      0x00a0
157
158 /* PLA_RXFIFO_CTRL2 */
159 #define RXFIFO_THR3_FULL        0x00000078
160 #define RXFIFO_THR3_HIGH        0x00000048
161 #define RXFIFO_THR3_OOB         0x0000005a
162 #define RXFIFO_THR3_NORMAL      0x0110
163
164 /* PLA_TXFIFO_CTRL */
165 #define TXFIFO_THR_NORMAL       0x00400008
166 #define TXFIFO_THR_NORMAL2      0x01000008
167
168 /* PLA_FMC */
169 #define FMC_FCR_MCU_EN          0x0001
170
171 /* PLA_EEEP_CR */
172 #define EEEP_CR_EEEP_TX         0x0002
173
174 /* PLA_WDT6_CTRL */
175 #define WDT6_SET_MODE           0x0010
176
177 /* PLA_TCR0 */
178 #define TCR0_TX_EMPTY           0x0800
179 #define TCR0_AUTO_FIFO          0x0080
180
181 /* PLA_TCR1 */
182 #define VERSION_MASK            0x7cf0
183
184 /* PLA_MTPS */
185 #define MTPS_JUMBO              (12 * 1024 / 64)
186 #define MTPS_DEFAULT            (6 * 1024 / 64)
187
188 /* PLA_RSTTALLY */
189 #define TALLY_RESET             0x0001
190
191 /* PLA_CR */
192 #define CR_RST                  0x10
193 #define CR_RE                   0x08
194 #define CR_TE                   0x04
195
196 /* PLA_CRWECR */
197 #define CRWECR_NORAML           0x00
198 #define CRWECR_CONFIG           0xc0
199
200 /* PLA_OOB_CTRL */
201 #define NOW_IS_OOB              0x80
202 #define TXFIFO_EMPTY            0x20
203 #define RXFIFO_EMPTY            0x10
204 #define LINK_LIST_READY         0x02
205 #define DIS_MCU_CLROOB          0x01
206 #define FIFO_EMPTY              (TXFIFO_EMPTY | RXFIFO_EMPTY)
207
208 /* PLA_MISC_1 */
209 #define RXDY_GATED_EN           0x0008
210
211 /* PLA_SFF_STS_7 */
212 #define RE_INIT_LL              0x8000
213 #define MCU_BORW_EN             0x4000
214
215 /* PLA_CPCR */
216 #define CPCR_RX_VLAN            0x0040
217
218 /* PLA_CFG_WOL */
219 #define MAGIC_EN                0x0001
220
221 /* PLA_TEREDO_CFG */
222 #define TEREDO_SEL              0x8000
223 #define TEREDO_WAKE_MASK        0x7f00
224 #define TEREDO_RS_EVENT_MASK    0x00fe
225 #define OOB_TEREDO_EN           0x0001
226
227 /* PAL_BDC_CR */
228 #define ALDPS_PROXY_MODE        0x0001
229
230 /* PLA_CONFIG34 */
231 #define LINK_ON_WAKE_EN         0x0010
232 #define LINK_OFF_WAKE_EN        0x0008
233
234 /* PLA_CONFIG5 */
235 #define BWF_EN                  0x0040
236 #define MWF_EN                  0x0020
237 #define UWF_EN                  0x0010
238 #define LAN_WAKE_EN             0x0002
239
240 /* PLA_LED_FEATURE */
241 #define LED_MODE_MASK           0x0700
242
243 /* PLA_PHY_PWR */
244 #define TX_10M_IDLE_EN          0x0080
245 #define PFM_PWM_SWITCH          0x0040
246
247 /* PLA_MAC_PWR_CTRL */
248 #define D3_CLK_GATED_EN         0x00004000
249 #define MCU_CLK_RATIO           0x07010f07
250 #define MCU_CLK_RATIO_MASK      0x0f0f0f0f
251 #define ALDPS_SPDWN_RATIO       0x0f87
252
253 /* PLA_MAC_PWR_CTRL2 */
254 #define EEE_SPDWN_RATIO         0x8007
255
256 /* PLA_MAC_PWR_CTRL3 */
257 #define PKT_AVAIL_SPDWN_EN      0x0100
258 #define SUSPEND_SPDWN_EN        0x0004
259 #define U1U2_SPDWN_EN           0x0002
260 #define L1_SPDWN_EN             0x0001
261
262 /* PLA_MAC_PWR_CTRL4 */
263 #define PWRSAVE_SPDWN_EN        0x1000
264 #define RXDV_SPDWN_EN           0x0800
265 #define TX10MIDLE_EN            0x0100
266 #define TP100_SPDWN_EN          0x0020
267 #define TP500_SPDWN_EN          0x0010
268 #define TP1000_SPDWN_EN         0x0008
269 #define EEE_SPDWN_EN            0x0001
270
271 /* PLA_GPHY_INTR_IMR */
272 #define GPHY_STS_MSK            0x0001
273 #define SPEED_DOWN_MSK          0x0002
274 #define SPDWN_RXDV_MSK          0x0004
275 #define SPDWN_LINKCHG_MSK       0x0008
276
277 /* PLA_PHYAR */
278 #define PHYAR_FLAG              0x80000000
279
280 /* PLA_EEE_CR */
281 #define EEE_RX_EN               0x0001
282 #define EEE_TX_EN               0x0002
283
284 /* PLA_BOOT_CTRL */
285 #define AUTOLOAD_DONE           0x0002
286
287 /* USB_DEV_STAT */
288 #define STAT_SPEED_MASK         0x0006
289 #define STAT_SPEED_HIGH         0x0000
290 #define STAT_SPEED_FULL         0x0002
291
292 /* USB_TX_AGG */
293 #define TX_AGG_MAX_THRESHOLD    0x03
294
295 /* USB_RX_BUF_TH */
296 #define RX_THR_SUPPER           0x0c350180
297 #define RX_THR_HIGH             0x7a120180
298 #define RX_THR_SLOW             0xffff0180
299
300 /* USB_TX_DMA */
301 #define TEST_MODE_DISABLE       0x00000001
302 #define TX_SIZE_ADJUST1         0x00000100
303
304 /* USB_UPS_CTRL */
305 #define POWER_CUT               0x0100
306
307 /* USB_PM_CTRL_STATUS */
308 #define RESUME_INDICATE         0x0001
309
310 /* USB_USB_CTRL */
311 #define RX_AGG_DISABLE          0x0010
312
313 /* USB_U2P3_CTRL */
314 #define U2P3_ENABLE             0x0001
315
316 /* USB_POWER_CUT */
317 #define PWR_EN                  0x0001
318 #define PHASE2_EN               0x0008
319
320 /* USB_MISC_0 */
321 #define PCUT_STATUS             0x0001
322
323 /* USB_RX_EARLY_AGG */
324 #define EARLY_AGG_SUPPER        0x0e832981
325 #define EARLY_AGG_HIGH          0x0e837a12
326 #define EARLY_AGG_SLOW          0x0e83ffff
327
328 /* USB_WDT11_CTRL */
329 #define TIMER11_EN              0x0001
330
331 /* USB_LPM_CTRL */
332 #define LPM_TIMER_MASK          0x0c
333 #define LPM_TIMER_500MS         0x04    /* 500 ms */
334 #define LPM_TIMER_500US         0x0c    /* 500 us */
335
336 /* USB_AFE_CTRL2 */
337 #define SEN_VAL_MASK            0xf800
338 #define SEN_VAL_NORMAL          0xa000
339 #define SEL_RXIDLE              0x0100
340
341 /* OCP_ALDPS_CONFIG */
342 #define ENPWRSAVE               0x8000
343 #define ENPDNPS                 0x0200
344 #define LINKENA                 0x0100
345 #define DIS_SDSAVE              0x0010
346
347 /* OCP_PHY_STATUS */
348 #define PHY_STAT_MASK           0x0007
349 #define PHY_STAT_LAN_ON         3
350 #define PHY_STAT_PWRDN          5
351
352 /* OCP_POWER_CFG */
353 #define EEE_CLKDIV_EN           0x8000
354 #define EN_ALDPS                0x0004
355 #define EN_10M_PLLOFF           0x0001
356
357 /* OCP_EEE_CONFIG1 */
358 #define RG_TXLPI_MSK_HFDUP      0x8000
359 #define RG_MATCLR_EN            0x4000
360 #define EEE_10_CAP              0x2000
361 #define EEE_NWAY_EN             0x1000
362 #define TX_QUIET_EN             0x0200
363 #define RX_QUIET_EN             0x0100
364 #define SDRISETIME              0x0010  /* bit 4 ~ 6 */
365 #define RG_RXLPI_MSK_HFDUP      0x0008
366 #define SDFALLTIME              0x0007  /* bit 0 ~ 2 */
367
368 /* OCP_EEE_CONFIG2 */
369 #define RG_LPIHYS_NUM           0x7000  /* bit 12 ~ 15 */
370 #define RG_DACQUIET_EN          0x0400
371 #define RG_LDVQUIET_EN          0x0200
372 #define RG_CKRSEL               0x0020
373 #define RG_EEEPRG_EN            0x0010
374
375 /* OCP_EEE_CONFIG3 */
376 #define FST_SNR_EYE_R           0x1500  /* bit 7 ~ 15 */
377 #define RG_LFS_SEL              0x0060  /* bit 6 ~ 5 */
378 #define MSK_PH                  0x0006  /* bit 0 ~ 3 */
379
380 /* OCP_EEE_AR */
381 /* bit[15:14] function */
382 #define FUN_ADDR                0x0000
383 #define FUN_DATA                0x4000
384 /* bit[4:0] device addr */
385 #define DEVICE_ADDR             0x0007
386
387 /* OCP_EEE_DATA */
388 #define EEE_ADDR                0x003C
389 #define EEE_DATA                0x0002
390
391 /* OCP_EEE_CFG */
392 #define CTAP_SHORT_EN           0x0040
393 #define EEE10_EN                0x0010
394
395 /* OCP_DOWN_SPEED */
396 #define EN_10M_BGOFF            0x0080
397
398 /* OCP_EEE_CFG2 */
399 #define MY1000_EEE              0x0004
400 #define MY100_EEE               0x0002
401
402 /* OCP_ADC_CFG */
403 #define CKADSEL_L               0x0100
404 #define ADC_EN                  0x0080
405 #define EN_EMI_L                0x0040
406
407 /* SRAM_LPF_CFG */
408 #define LPF_AUTO_TUNE           0x8000
409
410 /* SRAM_10M_AMP1 */
411 #define GDAC_IB_UPALL           0x0008
412
413 /* SRAM_10M_AMP2 */
414 #define AMP_DN                  0x0200
415
416 /* SRAM_IMPEDANCE */
417 #define RX_DRIVING_MASK         0x6000
418
419 enum rtl_register_content {
420         _1000bps        = 0x10,
421         _100bps         = 0x08,
422         _10bps          = 0x04,
423         LINK_STATUS     = 0x02,
424         FULL_DUP        = 0x01,
425 };
426
427 #define RTL8152_MAX_TX          4
428 #define RTL8152_MAX_RX          10
429 #define INTBUFSIZE              2
430 #define CRC_SIZE                4
431 #define TX_ALIGN                4
432 #define RX_ALIGN                8
433
434 #define INTR_LINK               0x0004
435
436 #define RTL8152_REQT_READ       0xc0
437 #define RTL8152_REQT_WRITE      0x40
438 #define RTL8152_REQ_GET_REGS    0x05
439 #define RTL8152_REQ_SET_REGS    0x05
440
441 #define BYTE_EN_DWORD           0xff
442 #define BYTE_EN_WORD            0x33
443 #define BYTE_EN_BYTE            0x11
444 #define BYTE_EN_SIX_BYTES       0x3f
445 #define BYTE_EN_START_MASK      0x0f
446 #define BYTE_EN_END_MASK        0xf0
447
448 #define RTL8153_MAX_PACKET      9216 /* 9K */
449 #define RTL8153_MAX_MTU         (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
450 #define RTL8152_RMS             (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
451 #define RTL8153_RMS             RTL8153_MAX_PACKET
452 #define RTL8152_TX_TIMEOUT      (5 * HZ)
453
454 /* rtl8152 flags */
455 enum rtl8152_flags {
456         RTL8152_UNPLUG = 0,
457         RTL8152_SET_RX_MODE,
458         WORK_ENABLE,
459         RTL8152_LINK_CHG,
460         SELECTIVE_SUSPEND,
461         PHY_RESET,
462         SCHEDULE_TASKLET,
463 };
464
465 /* Define these values to match your device */
466 #define VENDOR_ID_REALTEK               0x0bda
467 #define PRODUCT_ID_RTL8152              0x8152
468 #define PRODUCT_ID_RTL8153              0x8153
469
470 #define VENDOR_ID_SAMSUNG               0x04e8
471 #define PRODUCT_ID_SAMSUNG              0xa101
472
473 #define MCU_TYPE_PLA                    0x0100
474 #define MCU_TYPE_USB                    0x0000
475
476 #define REALTEK_USB_DEVICE(vend, prod)  \
477         USB_DEVICE_INTERFACE_CLASS(vend, prod, USB_CLASS_VENDOR_SPEC)
478
479 struct tally_counter {
480         __le64  tx_packets;
481         __le64  rx_packets;
482         __le64  tx_errors;
483         __le32  rx_errors;
484         __le16  rx_missed;
485         __le16  align_errors;
486         __le32  tx_one_collision;
487         __le32  tx_multi_collision;
488         __le64  rx_unicast;
489         __le64  rx_broadcast;
490         __le32  rx_multicast;
491         __le16  tx_aborted;
492         __le16  tx_underun;
493 };
494
495 struct rx_desc {
496         __le32 opts1;
497 #define RX_LEN_MASK                     0x7fff
498
499         __le32 opts2;
500 #define RD_UDP_CS                       (1 << 23)
501 #define RD_TCP_CS                       (1 << 22)
502 #define RD_IPV6_CS                      (1 << 20)
503 #define RD_IPV4_CS                      (1 << 19)
504
505         __le32 opts3;
506 #define IPF                             (1 << 23) /* IP checksum fail */
507 #define UDPF                            (1 << 22) /* UDP checksum fail */
508 #define TCPF                            (1 << 21) /* TCP checksum fail */
509
510         __le32 opts4;
511         __le32 opts5;
512         __le32 opts6;
513 };
514
515 struct tx_desc {
516         __le32 opts1;
517 #define TX_FS                   (1 << 31) /* First segment of a packet */
518 #define TX_LS                   (1 << 30) /* Final segment of a packet */
519 #define GTSENDV4                (1 << 28)
520 #define GTSENDV6                (1 << 27)
521 #define GTTCPHO_SHIFT           18
522 #define GTTCPHO_MAX             0x7fU
523 #define TX_LEN_MAX              0x3ffffU
524
525         __le32 opts2;
526 #define UDP_CS                  (1 << 31) /* Calculate UDP/IP checksum */
527 #define TCP_CS                  (1 << 30) /* Calculate TCP/IP checksum */
528 #define IPV4_CS                 (1 << 29) /* Calculate IPv4 checksum */
529 #define IPV6_CS                 (1 << 28) /* Calculate IPv6 checksum */
530 #define MSS_SHIFT               17
531 #define MSS_MAX                 0x7ffU
532 #define TCPHO_SHIFT             17
533 #define TCPHO_MAX               0x7ffU
534 };
535
536 struct r8152;
537
538 struct rx_agg {
539         struct list_head list;
540         struct urb *urb;
541         struct r8152 *context;
542         void *buffer;
543         void *head;
544 };
545
546 struct tx_agg {
547         struct list_head list;
548         struct urb *urb;
549         struct r8152 *context;
550         void *buffer;
551         void *head;
552         u32 skb_num;
553         u32 skb_len;
554 };
555
556 struct r8152 {
557         unsigned long flags;
558         struct usb_device *udev;
559         struct tasklet_struct tl;
560         struct usb_interface *intf;
561         struct net_device *netdev;
562         struct urb *intr_urb;
563         struct tx_agg tx_info[RTL8152_MAX_TX];
564         struct rx_agg rx_info[RTL8152_MAX_RX];
565         struct list_head rx_done, tx_free;
566         struct sk_buff_head tx_queue;
567         spinlock_t rx_lock, tx_lock;
568         struct delayed_work schedule;
569         struct mii_if_info mii;
570
571         struct rtl_ops {
572                 void (*init)(struct r8152 *);
573                 int (*enable)(struct r8152 *);
574                 void (*disable)(struct r8152 *);
575                 void (*up)(struct r8152 *);
576                 void (*down)(struct r8152 *);
577                 void (*unload)(struct r8152 *);
578         } rtl_ops;
579
580         int intr_interval;
581         u32 saved_wolopts;
582         u32 msg_enable;
583         u32 tx_qlen;
584         u16 ocp_base;
585         u8 *intr_buff;
586         u8 version;
587         u8 speed;
588 };
589
590 enum rtl_version {
591         RTL_VER_UNKNOWN = 0,
592         RTL_VER_01,
593         RTL_VER_02,
594         RTL_VER_03,
595         RTL_VER_04,
596         RTL_VER_05,
597         RTL_VER_MAX
598 };
599
600 enum tx_csum_stat {
601         TX_CSUM_SUCCESS = 0,
602         TX_CSUM_TSO,
603         TX_CSUM_NONE
604 };
605
606 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
607  * The RTL chips use a 64 element hash table based on the Ethernet CRC.
608  */
609 static const int multicast_filter_limit = 32;
610 static unsigned int agg_buf_sz = 16384;
611
612 #define RTL_LIMITED_TSO_SIZE    (agg_buf_sz - sizeof(struct tx_desc) - \
613                                  VLAN_ETH_HLEN - VLAN_HLEN)
614
615 static
616 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
617 {
618         int ret;
619         void *tmp;
620
621         tmp = kmalloc(size, GFP_KERNEL);
622         if (!tmp)
623                 return -ENOMEM;
624
625         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
626                               RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
627                               value, index, tmp, size, 500);
628
629         memcpy(data, tmp, size);
630         kfree(tmp);
631
632         return ret;
633 }
634
635 static
636 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
637 {
638         int ret;
639         void *tmp;
640
641         tmp = kmemdup(data, size, GFP_KERNEL);
642         if (!tmp)
643                 return -ENOMEM;
644
645         ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
646                               RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
647                               value, index, tmp, size, 500);
648
649         kfree(tmp);
650
651         return ret;
652 }
653
654 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
655                             void *data, u16 type)
656 {
657         u16 limit = 64;
658         int ret = 0;
659
660         if (test_bit(RTL8152_UNPLUG, &tp->flags))
661                 return -ENODEV;
662
663         /* both size and indix must be 4 bytes align */
664         if ((size & 3) || !size || (index & 3) || !data)
665                 return -EPERM;
666
667         if ((u32)index + (u32)size > 0xffff)
668                 return -EPERM;
669
670         while (size) {
671                 if (size > limit) {
672                         ret = get_registers(tp, index, type, limit, data);
673                         if (ret < 0)
674                                 break;
675
676                         index += limit;
677                         data += limit;
678                         size -= limit;
679                 } else {
680                         ret = get_registers(tp, index, type, size, data);
681                         if (ret < 0)
682                                 break;
683
684                         index += size;
685                         data += size;
686                         size = 0;
687                         break;
688                 }
689         }
690
691         return ret;
692 }
693
694 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
695                              u16 size, void *data, u16 type)
696 {
697         int ret;
698         u16 byteen_start, byteen_end, byen;
699         u16 limit = 512;
700
701         if (test_bit(RTL8152_UNPLUG, &tp->flags))
702                 return -ENODEV;
703
704         /* both size and indix must be 4 bytes align */
705         if ((size & 3) || !size || (index & 3) || !data)
706                 return -EPERM;
707
708         if ((u32)index + (u32)size > 0xffff)
709                 return -EPERM;
710
711         byteen_start = byteen & BYTE_EN_START_MASK;
712         byteen_end = byteen & BYTE_EN_END_MASK;
713
714         byen = byteen_start | (byteen_start << 4);
715         ret = set_registers(tp, index, type | byen, 4, data);
716         if (ret < 0)
717                 goto error1;
718
719         index += 4;
720         data += 4;
721         size -= 4;
722
723         if (size) {
724                 size -= 4;
725
726                 while (size) {
727                         if (size > limit) {
728                                 ret = set_registers(tp, index,
729                                                     type | BYTE_EN_DWORD,
730                                                     limit, data);
731                                 if (ret < 0)
732                                         goto error1;
733
734                                 index += limit;
735                                 data += limit;
736                                 size -= limit;
737                         } else {
738                                 ret = set_registers(tp, index,
739                                                     type | BYTE_EN_DWORD,
740                                                     size, data);
741                                 if (ret < 0)
742                                         goto error1;
743
744                                 index += size;
745                                 data += size;
746                                 size = 0;
747                                 break;
748                         }
749                 }
750
751                 byen = byteen_end | (byteen_end >> 4);
752                 ret = set_registers(tp, index, type | byen, 4, data);
753                 if (ret < 0)
754                         goto error1;
755         }
756
757 error1:
758         return ret;
759 }
760
761 static inline
762 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
763 {
764         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
765 }
766
767 static inline
768 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
769 {
770         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
771 }
772
773 static inline
774 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
775 {
776         return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
777 }
778
779 static inline
780 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
781 {
782         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
783 }
784
785 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
786 {
787         __le32 data;
788
789         generic_ocp_read(tp, index, sizeof(data), &data, type);
790
791         return __le32_to_cpu(data);
792 }
793
794 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
795 {
796         __le32 tmp = __cpu_to_le32(data);
797
798         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
799 }
800
801 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
802 {
803         u32 data;
804         __le32 tmp;
805         u8 shift = index & 2;
806
807         index &= ~3;
808
809         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
810
811         data = __le32_to_cpu(tmp);
812         data >>= (shift * 8);
813         data &= 0xffff;
814
815         return (u16)data;
816 }
817
818 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
819 {
820         u32 mask = 0xffff;
821         __le32 tmp;
822         u16 byen = BYTE_EN_WORD;
823         u8 shift = index & 2;
824
825         data &= mask;
826
827         if (index & 2) {
828                 byen <<= shift;
829                 mask <<= (shift * 8);
830                 data <<= (shift * 8);
831                 index &= ~3;
832         }
833
834         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
835
836         data |= __le32_to_cpu(tmp) & ~mask;
837         tmp = __cpu_to_le32(data);
838
839         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
840 }
841
842 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
843 {
844         u32 data;
845         __le32 tmp;
846         u8 shift = index & 3;
847
848         index &= ~3;
849
850         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
851
852         data = __le32_to_cpu(tmp);
853         data >>= (shift * 8);
854         data &= 0xff;
855
856         return (u8)data;
857 }
858
859 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
860 {
861         u32 mask = 0xff;
862         __le32 tmp;
863         u16 byen = BYTE_EN_BYTE;
864         u8 shift = index & 3;
865
866         data &= mask;
867
868         if (index & 3) {
869                 byen <<= shift;
870                 mask <<= (shift * 8);
871                 data <<= (shift * 8);
872                 index &= ~3;
873         }
874
875         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
876
877         data |= __le32_to_cpu(tmp) & ~mask;
878         tmp = __cpu_to_le32(data);
879
880         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
881 }
882
883 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
884 {
885         u16 ocp_base, ocp_index;
886
887         ocp_base = addr & 0xf000;
888         if (ocp_base != tp->ocp_base) {
889                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
890                 tp->ocp_base = ocp_base;
891         }
892
893         ocp_index = (addr & 0x0fff) | 0xb000;
894         return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
895 }
896
897 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
898 {
899         u16 ocp_base, ocp_index;
900
901         ocp_base = addr & 0xf000;
902         if (ocp_base != tp->ocp_base) {
903                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
904                 tp->ocp_base = ocp_base;
905         }
906
907         ocp_index = (addr & 0x0fff) | 0xb000;
908         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
909 }
910
911 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
912 {
913         ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
914 }
915
916 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
917 {
918         return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
919 }
920
921 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
922 {
923         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
924         ocp_reg_write(tp, OCP_SRAM_DATA, data);
925 }
926
927 static u16 sram_read(struct r8152 *tp, u16 addr)
928 {
929         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
930         return ocp_reg_read(tp, OCP_SRAM_DATA);
931 }
932
933 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
934 {
935         struct r8152 *tp = netdev_priv(netdev);
936         int ret;
937
938         if (test_bit(RTL8152_UNPLUG, &tp->flags))
939                 return -ENODEV;
940
941         if (phy_id != R8152_PHY_ID)
942                 return -EINVAL;
943
944         ret = usb_autopm_get_interface(tp->intf);
945         if (ret < 0)
946                 goto out;
947
948         ret = r8152_mdio_read(tp, reg);
949
950         usb_autopm_put_interface(tp->intf);
951
952 out:
953         return ret;
954 }
955
956 static
957 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
958 {
959         struct r8152 *tp = netdev_priv(netdev);
960
961         if (test_bit(RTL8152_UNPLUG, &tp->flags))
962                 return;
963
964         if (phy_id != R8152_PHY_ID)
965                 return;
966
967         if (usb_autopm_get_interface(tp->intf) < 0)
968                 return;
969
970         r8152_mdio_write(tp, reg, val);
971
972         usb_autopm_put_interface(tp->intf);
973 }
974
975 static int
976 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
977
978 static inline void set_ethernet_addr(struct r8152 *tp)
979 {
980         struct net_device *dev = tp->netdev;
981         int ret;
982         u8 node_id[8] = {0};
983
984         if (tp->version == RTL_VER_01)
985                 ret = pla_ocp_read(tp, PLA_IDR, sizeof(node_id), node_id);
986         else
987                 ret = pla_ocp_read(tp, PLA_BACKUP, sizeof(node_id), node_id);
988
989         if (ret < 0) {
990                 netif_notice(tp, probe, dev, "inet addr fail\n");
991         } else {
992                 if (tp->version != RTL_VER_01) {
993                         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR,
994                                        CRWECR_CONFIG);
995                         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES,
996                                       sizeof(node_id), node_id);
997                         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR,
998                                        CRWECR_NORAML);
999                 }
1000
1001                 memcpy(dev->dev_addr, node_id, dev->addr_len);
1002                 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
1003         }
1004 }
1005
1006 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1007 {
1008         struct r8152 *tp = netdev_priv(netdev);
1009         struct sockaddr *addr = p;
1010
1011         if (!is_valid_ether_addr(addr->sa_data))
1012                 return -EADDRNOTAVAIL;
1013
1014         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1015
1016         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1017         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1018         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1019
1020         return 0;
1021 }
1022
1023 static void read_bulk_callback(struct urb *urb)
1024 {
1025         struct net_device *netdev;
1026         int status = urb->status;
1027         struct rx_agg *agg;
1028         struct r8152 *tp;
1029         int result;
1030
1031         agg = urb->context;
1032         if (!agg)
1033                 return;
1034
1035         tp = agg->context;
1036         if (!tp)
1037                 return;
1038
1039         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1040                 return;
1041
1042         if (!test_bit(WORK_ENABLE, &tp->flags))
1043                 return;
1044
1045         netdev = tp->netdev;
1046
1047         /* When link down, the driver would cancel all bulks. */
1048         /* This avoid the re-submitting bulk */
1049         if (!netif_carrier_ok(netdev))
1050                 return;
1051
1052         usb_mark_last_busy(tp->udev);
1053
1054         switch (status) {
1055         case 0:
1056                 if (urb->actual_length < ETH_ZLEN)
1057                         break;
1058
1059                 spin_lock(&tp->rx_lock);
1060                 list_add_tail(&agg->list, &tp->rx_done);
1061                 spin_unlock(&tp->rx_lock);
1062                 tasklet_schedule(&tp->tl);
1063                 return;
1064         case -ESHUTDOWN:
1065                 set_bit(RTL8152_UNPLUG, &tp->flags);
1066                 netif_device_detach(tp->netdev);
1067                 return;
1068         case -ENOENT:
1069                 return; /* the urb is in unlink state */
1070         case -ETIME:
1071                 if (net_ratelimit())
1072                         netdev_warn(netdev, "maybe reset is needed?\n");
1073                 break;
1074         default:
1075                 if (net_ratelimit())
1076                         netdev_warn(netdev, "Rx status %d\n", status);
1077                 break;
1078         }
1079
1080         result = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1081         if (result == -ENODEV) {
1082                 netif_device_detach(tp->netdev);
1083         } else if (result) {
1084                 spin_lock(&tp->rx_lock);
1085                 list_add_tail(&agg->list, &tp->rx_done);
1086                 spin_unlock(&tp->rx_lock);
1087                 tasklet_schedule(&tp->tl);
1088         }
1089 }
1090
1091 static void write_bulk_callback(struct urb *urb)
1092 {
1093         struct net_device_stats *stats;
1094         struct net_device *netdev;
1095         struct tx_agg *agg;
1096         struct r8152 *tp;
1097         int status = urb->status;
1098
1099         agg = urb->context;
1100         if (!agg)
1101                 return;
1102
1103         tp = agg->context;
1104         if (!tp)
1105                 return;
1106
1107         netdev = tp->netdev;
1108         stats = &netdev->stats;
1109         if (status) {
1110                 if (net_ratelimit())
1111                         netdev_warn(netdev, "Tx status %d\n", status);
1112                 stats->tx_errors += agg->skb_num;
1113         } else {
1114                 stats->tx_packets += agg->skb_num;
1115                 stats->tx_bytes += agg->skb_len;
1116         }
1117
1118         spin_lock(&tp->tx_lock);
1119         list_add_tail(&agg->list, &tp->tx_free);
1120         spin_unlock(&tp->tx_lock);
1121
1122         usb_autopm_put_interface_async(tp->intf);
1123
1124         if (!netif_carrier_ok(netdev))
1125                 return;
1126
1127         if (!test_bit(WORK_ENABLE, &tp->flags))
1128                 return;
1129
1130         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1131                 return;
1132
1133         if (!skb_queue_empty(&tp->tx_queue))
1134                 tasklet_schedule(&tp->tl);
1135 }
1136
1137 static void intr_callback(struct urb *urb)
1138 {
1139         struct r8152 *tp;
1140         __le16 *d;
1141         int status = urb->status;
1142         int res;
1143
1144         tp = urb->context;
1145         if (!tp)
1146                 return;
1147
1148         if (!test_bit(WORK_ENABLE, &tp->flags))
1149                 return;
1150
1151         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1152                 return;
1153
1154         switch (status) {
1155         case 0:                 /* success */
1156                 break;
1157         case -ECONNRESET:       /* unlink */
1158         case -ESHUTDOWN:
1159                 netif_device_detach(tp->netdev);
1160         case -ENOENT:
1161                 return;
1162         case -EOVERFLOW:
1163                 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1164                 goto resubmit;
1165         /* -EPIPE:  should clear the halt */
1166         default:
1167                 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1168                 goto resubmit;
1169         }
1170
1171         d = urb->transfer_buffer;
1172         if (INTR_LINK & __le16_to_cpu(d[0])) {
1173                 if (!(tp->speed & LINK_STATUS)) {
1174                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1175                         schedule_delayed_work(&tp->schedule, 0);
1176                 }
1177         } else {
1178                 if (tp->speed & LINK_STATUS) {
1179                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1180                         schedule_delayed_work(&tp->schedule, 0);
1181                 }
1182         }
1183
1184 resubmit:
1185         res = usb_submit_urb(urb, GFP_ATOMIC);
1186         if (res == -ENODEV)
1187                 netif_device_detach(tp->netdev);
1188         else if (res)
1189                 netif_err(tp, intr, tp->netdev,
1190                           "can't resubmit intr, status %d\n", res);
1191 }
1192
1193 static inline void *rx_agg_align(void *data)
1194 {
1195         return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1196 }
1197
1198 static inline void *tx_agg_align(void *data)
1199 {
1200         return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1201 }
1202
1203 static void free_all_mem(struct r8152 *tp)
1204 {
1205         int i;
1206
1207         for (i = 0; i < RTL8152_MAX_RX; i++) {
1208                 usb_free_urb(tp->rx_info[i].urb);
1209                 tp->rx_info[i].urb = NULL;
1210
1211                 kfree(tp->rx_info[i].buffer);
1212                 tp->rx_info[i].buffer = NULL;
1213                 tp->rx_info[i].head = NULL;
1214         }
1215
1216         for (i = 0; i < RTL8152_MAX_TX; i++) {
1217                 usb_free_urb(tp->tx_info[i].urb);
1218                 tp->tx_info[i].urb = NULL;
1219
1220                 kfree(tp->tx_info[i].buffer);
1221                 tp->tx_info[i].buffer = NULL;
1222                 tp->tx_info[i].head = NULL;
1223         }
1224
1225         usb_free_urb(tp->intr_urb);
1226         tp->intr_urb = NULL;
1227
1228         kfree(tp->intr_buff);
1229         tp->intr_buff = NULL;
1230 }
1231
1232 static int alloc_all_mem(struct r8152 *tp)
1233 {
1234         struct net_device *netdev = tp->netdev;
1235         struct usb_interface *intf = tp->intf;
1236         struct usb_host_interface *alt = intf->cur_altsetting;
1237         struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1238         struct urb *urb;
1239         int node, i;
1240         u8 *buf;
1241
1242         node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1243
1244         spin_lock_init(&tp->rx_lock);
1245         spin_lock_init(&tp->tx_lock);
1246         INIT_LIST_HEAD(&tp->rx_done);
1247         INIT_LIST_HEAD(&tp->tx_free);
1248         skb_queue_head_init(&tp->tx_queue);
1249
1250         for (i = 0; i < RTL8152_MAX_RX; i++) {
1251                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1252                 if (!buf)
1253                         goto err1;
1254
1255                 if (buf != rx_agg_align(buf)) {
1256                         kfree(buf);
1257                         buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1258                                            node);
1259                         if (!buf)
1260                                 goto err1;
1261                 }
1262
1263                 urb = usb_alloc_urb(0, GFP_KERNEL);
1264                 if (!urb) {
1265                         kfree(buf);
1266                         goto err1;
1267                 }
1268
1269                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1270                 tp->rx_info[i].context = tp;
1271                 tp->rx_info[i].urb = urb;
1272                 tp->rx_info[i].buffer = buf;
1273                 tp->rx_info[i].head = rx_agg_align(buf);
1274         }
1275
1276         for (i = 0; i < RTL8152_MAX_TX; i++) {
1277                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1278                 if (!buf)
1279                         goto err1;
1280
1281                 if (buf != tx_agg_align(buf)) {
1282                         kfree(buf);
1283                         buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1284                                            node);
1285                         if (!buf)
1286                                 goto err1;
1287                 }
1288
1289                 urb = usb_alloc_urb(0, GFP_KERNEL);
1290                 if (!urb) {
1291                         kfree(buf);
1292                         goto err1;
1293                 }
1294
1295                 INIT_LIST_HEAD(&tp->tx_info[i].list);
1296                 tp->tx_info[i].context = tp;
1297                 tp->tx_info[i].urb = urb;
1298                 tp->tx_info[i].buffer = buf;
1299                 tp->tx_info[i].head = tx_agg_align(buf);
1300
1301                 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1302         }
1303
1304         tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1305         if (!tp->intr_urb)
1306                 goto err1;
1307
1308         tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1309         if (!tp->intr_buff)
1310                 goto err1;
1311
1312         tp->intr_interval = (int)ep_intr->desc.bInterval;
1313         usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1314                          tp->intr_buff, INTBUFSIZE, intr_callback,
1315                          tp, tp->intr_interval);
1316
1317         return 0;
1318
1319 err1:
1320         free_all_mem(tp);
1321         return -ENOMEM;
1322 }
1323
1324 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1325 {
1326         struct tx_agg *agg = NULL;
1327         unsigned long flags;
1328
1329         if (list_empty(&tp->tx_free))
1330                 return NULL;
1331
1332         spin_lock_irqsave(&tp->tx_lock, flags);
1333         if (!list_empty(&tp->tx_free)) {
1334                 struct list_head *cursor;
1335
1336                 cursor = tp->tx_free.next;
1337                 list_del_init(cursor);
1338                 agg = list_entry(cursor, struct tx_agg, list);
1339         }
1340         spin_unlock_irqrestore(&tp->tx_lock, flags);
1341
1342         return agg;
1343 }
1344
1345 static inline __be16 get_protocol(struct sk_buff *skb)
1346 {
1347         __be16 protocol;
1348
1349         if (skb->protocol == htons(ETH_P_8021Q))
1350                 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
1351         else
1352                 protocol = skb->protocol;
1353
1354         return protocol;
1355 }
1356
1357 /* r8152_csum_workaround()
1358  * The hw limites the value the transport offset. When the offset is out of the
1359  * range, calculate the checksum by sw.
1360  */
1361 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1362                                   struct sk_buff_head *list)
1363 {
1364         if (skb_shinfo(skb)->gso_size) {
1365                 netdev_features_t features = tp->netdev->features;
1366                 struct sk_buff_head seg_list;
1367                 struct sk_buff *segs, *nskb;
1368
1369                 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1370                 segs = skb_gso_segment(skb, features);
1371                 if (IS_ERR(segs) || !segs)
1372                         goto drop;
1373
1374                 __skb_queue_head_init(&seg_list);
1375
1376                 do {
1377                         nskb = segs;
1378                         segs = segs->next;
1379                         nskb->next = NULL;
1380                         __skb_queue_tail(&seg_list, nskb);
1381                 } while (segs);
1382
1383                 skb_queue_splice(&seg_list, list);
1384                 dev_kfree_skb(skb);
1385         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1386                 if (skb_checksum_help(skb) < 0)
1387                         goto drop;
1388
1389                 __skb_queue_head(list, skb);
1390         } else {
1391                 struct net_device_stats *stats;
1392
1393 drop:
1394                 stats = &tp->netdev->stats;
1395                 stats->tx_dropped++;
1396                 dev_kfree_skb(skb);
1397         }
1398 }
1399
1400 /* msdn_giant_send_check()
1401  * According to the document of microsoft, the TCP Pseudo Header excludes the
1402  * packet length for IPv6 TCP large packets.
1403  */
1404 static int msdn_giant_send_check(struct sk_buff *skb)
1405 {
1406         const struct ipv6hdr *ipv6h;
1407         struct tcphdr *th;
1408         int ret;
1409
1410         ret = skb_cow_head(skb, 0);
1411         if (ret)
1412                 return ret;
1413
1414         ipv6h = ipv6_hdr(skb);
1415         th = tcp_hdr(skb);
1416
1417         th->check = 0;
1418         th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1419
1420         return ret;
1421 }
1422
1423 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1424                          struct sk_buff *skb, u32 len, u32 transport_offset)
1425 {
1426         u32 mss = skb_shinfo(skb)->gso_size;
1427         u32 opts1, opts2 = 0;
1428         int ret = TX_CSUM_SUCCESS;
1429
1430         WARN_ON_ONCE(len > TX_LEN_MAX);
1431
1432         opts1 = len | TX_FS | TX_LS;
1433
1434         if (mss) {
1435                 if (transport_offset > GTTCPHO_MAX) {
1436                         netif_warn(tp, tx_err, tp->netdev,
1437                                    "Invalid transport offset 0x%x for TSO\n",
1438                                    transport_offset);
1439                         ret = TX_CSUM_TSO;
1440                         goto unavailable;
1441                 }
1442
1443                 switch (get_protocol(skb)) {
1444                 case htons(ETH_P_IP):
1445                         opts1 |= GTSENDV4;
1446                         break;
1447
1448                 case htons(ETH_P_IPV6):
1449                         if (msdn_giant_send_check(skb)) {
1450                                 ret = TX_CSUM_TSO;
1451                                 goto unavailable;
1452                         }
1453                         opts1 |= GTSENDV6;
1454                         break;
1455
1456                 default:
1457                         WARN_ON_ONCE(1);
1458                         break;
1459                 }
1460
1461                 opts1 |= transport_offset << GTTCPHO_SHIFT;
1462                 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1463         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1464                 u8 ip_protocol;
1465
1466                 if (transport_offset > TCPHO_MAX) {
1467                         netif_warn(tp, tx_err, tp->netdev,
1468                                    "Invalid transport offset 0x%x\n",
1469                                    transport_offset);
1470                         ret = TX_CSUM_NONE;
1471                         goto unavailable;
1472                 }
1473
1474                 switch (get_protocol(skb)) {
1475                 case htons(ETH_P_IP):
1476                         opts2 |= IPV4_CS;
1477                         ip_protocol = ip_hdr(skb)->protocol;
1478                         break;
1479
1480                 case htons(ETH_P_IPV6):
1481                         opts2 |= IPV6_CS;
1482                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1483                         break;
1484
1485                 default:
1486                         ip_protocol = IPPROTO_RAW;
1487                         break;
1488                 }
1489
1490                 if (ip_protocol == IPPROTO_TCP)
1491                         opts2 |= TCP_CS;
1492                 else if (ip_protocol == IPPROTO_UDP)
1493                         opts2 |= UDP_CS;
1494                 else
1495                         WARN_ON_ONCE(1);
1496
1497                 opts2 |= transport_offset << TCPHO_SHIFT;
1498         }
1499
1500         desc->opts2 = cpu_to_le32(opts2);
1501         desc->opts1 = cpu_to_le32(opts1);
1502
1503 unavailable:
1504         return ret;
1505 }
1506
1507 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1508 {
1509         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1510         int remain, ret;
1511         u8 *tx_data;
1512
1513         __skb_queue_head_init(&skb_head);
1514         spin_lock(&tx_queue->lock);
1515         skb_queue_splice_init(tx_queue, &skb_head);
1516         spin_unlock(&tx_queue->lock);
1517
1518         tx_data = agg->head;
1519         agg->skb_num = 0;
1520         agg->skb_len = 0;
1521         remain = agg_buf_sz;
1522
1523         while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1524                 struct tx_desc *tx_desc;
1525                 struct sk_buff *skb;
1526                 unsigned int len;
1527                 u32 offset;
1528
1529                 skb = __skb_dequeue(&skb_head);
1530                 if (!skb)
1531                         break;
1532
1533                 len = skb->len + sizeof(*tx_desc);
1534
1535                 if (len > remain) {
1536                         __skb_queue_head(&skb_head, skb);
1537                         break;
1538                 }
1539
1540                 tx_data = tx_agg_align(tx_data);
1541                 tx_desc = (struct tx_desc *)tx_data;
1542
1543                 offset = (u32)skb_transport_offset(skb);
1544
1545                 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1546                         r8152_csum_workaround(tp, skb, &skb_head);
1547                         continue;
1548                 }
1549
1550                 tx_data += sizeof(*tx_desc);
1551
1552                 len = skb->len;
1553                 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1554                         struct net_device_stats *stats = &tp->netdev->stats;
1555
1556                         stats->tx_dropped++;
1557                         dev_kfree_skb_any(skb);
1558                         tx_data -= sizeof(*tx_desc);
1559                         continue;
1560                 }
1561
1562                 tx_data += len;
1563                 agg->skb_len += len;
1564                 agg->skb_num++;
1565
1566                 dev_kfree_skb_any(skb);
1567
1568                 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1569         }
1570
1571         if (!skb_queue_empty(&skb_head)) {
1572                 spin_lock(&tx_queue->lock);
1573                 skb_queue_splice(&skb_head, tx_queue);
1574                 spin_unlock(&tx_queue->lock);
1575         }
1576
1577         netif_tx_lock(tp->netdev);
1578
1579         if (netif_queue_stopped(tp->netdev) &&
1580             skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1581                 netif_wake_queue(tp->netdev);
1582
1583         netif_tx_unlock(tp->netdev);
1584
1585         ret = usb_autopm_get_interface_async(tp->intf);
1586         if (ret < 0)
1587                 goto out_tx_fill;
1588
1589         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1590                           agg->head, (int)(tx_data - (u8 *)agg->head),
1591                           (usb_complete_t)write_bulk_callback, agg);
1592
1593         ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1594         if (ret < 0)
1595                 usb_autopm_put_interface_async(tp->intf);
1596
1597 out_tx_fill:
1598         return ret;
1599 }
1600
1601 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1602 {
1603         u8 checksum = CHECKSUM_NONE;
1604         u32 opts2, opts3;
1605
1606         if (tp->version == RTL_VER_01)
1607                 goto return_result;
1608
1609         opts2 = le32_to_cpu(rx_desc->opts2);
1610         opts3 = le32_to_cpu(rx_desc->opts3);
1611
1612         if (opts2 & RD_IPV4_CS) {
1613                 if (opts3 & IPF)
1614                         checksum = CHECKSUM_NONE;
1615                 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1616                         checksum = CHECKSUM_NONE;
1617                 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1618                         checksum = CHECKSUM_NONE;
1619                 else
1620                         checksum = CHECKSUM_UNNECESSARY;
1621         } else if (RD_IPV6_CS) {
1622                 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1623                         checksum = CHECKSUM_UNNECESSARY;
1624                 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1625                         checksum = CHECKSUM_UNNECESSARY;
1626         }
1627
1628 return_result:
1629         return checksum;
1630 }
1631
1632 static void rx_bottom(struct r8152 *tp)
1633 {
1634         unsigned long flags;
1635         struct list_head *cursor, *next, rx_queue;
1636
1637         if (list_empty(&tp->rx_done))
1638                 return;
1639
1640         INIT_LIST_HEAD(&rx_queue);
1641         spin_lock_irqsave(&tp->rx_lock, flags);
1642         list_splice_init(&tp->rx_done, &rx_queue);
1643         spin_unlock_irqrestore(&tp->rx_lock, flags);
1644
1645         list_for_each_safe(cursor, next, &rx_queue) {
1646                 struct rx_desc *rx_desc;
1647                 struct rx_agg *agg;
1648                 int len_used = 0;
1649                 struct urb *urb;
1650                 u8 *rx_data;
1651                 int ret;
1652
1653                 list_del_init(cursor);
1654
1655                 agg = list_entry(cursor, struct rx_agg, list);
1656                 urb = agg->urb;
1657                 if (urb->actual_length < ETH_ZLEN)
1658                         goto submit;
1659
1660                 rx_desc = agg->head;
1661                 rx_data = agg->head;
1662                 len_used += sizeof(struct rx_desc);
1663
1664                 while (urb->actual_length > len_used) {
1665                         struct net_device *netdev = tp->netdev;
1666                         struct net_device_stats *stats = &netdev->stats;
1667                         unsigned int pkt_len;
1668                         struct sk_buff *skb;
1669
1670                         pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1671                         if (pkt_len < ETH_ZLEN)
1672                                 break;
1673
1674                         len_used += pkt_len;
1675                         if (urb->actual_length < len_used)
1676                                 break;
1677
1678                         pkt_len -= CRC_SIZE;
1679                         rx_data += sizeof(struct rx_desc);
1680
1681                         skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1682                         if (!skb) {
1683                                 stats->rx_dropped++;
1684                                 goto find_next_rx;
1685                         }
1686
1687                         skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1688                         memcpy(skb->data, rx_data, pkt_len);
1689                         skb_put(skb, pkt_len);
1690                         skb->protocol = eth_type_trans(skb, netdev);
1691                         netif_receive_skb(skb);
1692                         stats->rx_packets++;
1693                         stats->rx_bytes += pkt_len;
1694
1695 find_next_rx:
1696                         rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1697                         rx_desc = (struct rx_desc *)rx_data;
1698                         len_used = (int)(rx_data - (u8 *)agg->head);
1699                         len_used += sizeof(struct rx_desc);
1700                 }
1701
1702 submit:
1703                 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1704                 if (ret && ret != -ENODEV) {
1705                         spin_lock_irqsave(&tp->rx_lock, flags);
1706                         list_add_tail(&agg->list, &tp->rx_done);
1707                         spin_unlock_irqrestore(&tp->rx_lock, flags);
1708                         tasklet_schedule(&tp->tl);
1709                 }
1710         }
1711 }
1712
1713 static void tx_bottom(struct r8152 *tp)
1714 {
1715         int res;
1716
1717         do {
1718                 struct tx_agg *agg;
1719
1720                 if (skb_queue_empty(&tp->tx_queue))
1721                         break;
1722
1723                 agg = r8152_get_tx_agg(tp);
1724                 if (!agg)
1725                         break;
1726
1727                 res = r8152_tx_agg_fill(tp, agg);
1728                 if (res) {
1729                         struct net_device *netdev = tp->netdev;
1730
1731                         if (res == -ENODEV) {
1732                                 netif_device_detach(netdev);
1733                         } else {
1734                                 struct net_device_stats *stats = &netdev->stats;
1735                                 unsigned long flags;
1736
1737                                 netif_warn(tp, tx_err, netdev,
1738                                            "failed tx_urb %d\n", res);
1739                                 stats->tx_dropped += agg->skb_num;
1740
1741                                 spin_lock_irqsave(&tp->tx_lock, flags);
1742                                 list_add_tail(&agg->list, &tp->tx_free);
1743                                 spin_unlock_irqrestore(&tp->tx_lock, flags);
1744                         }
1745                 }
1746         } while (res == 0);
1747 }
1748
1749 static void bottom_half(unsigned long data)
1750 {
1751         struct r8152 *tp;
1752
1753         tp = (struct r8152 *)data;
1754
1755         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1756                 return;
1757
1758         if (!test_bit(WORK_ENABLE, &tp->flags))
1759                 return;
1760
1761         /* When link down, the driver would cancel all bulks. */
1762         /* This avoid the re-submitting bulk */
1763         if (!netif_carrier_ok(tp->netdev))
1764                 return;
1765
1766         rx_bottom(tp);
1767         tx_bottom(tp);
1768 }
1769
1770 static
1771 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1772 {
1773         usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1774                           agg->head, agg_buf_sz,
1775                           (usb_complete_t)read_bulk_callback, agg);
1776
1777         return usb_submit_urb(agg->urb, mem_flags);
1778 }
1779
1780 static void rtl_drop_queued_tx(struct r8152 *tp)
1781 {
1782         struct net_device_stats *stats = &tp->netdev->stats;
1783         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1784         struct sk_buff *skb;
1785
1786         if (skb_queue_empty(tx_queue))
1787                 return;
1788
1789         __skb_queue_head_init(&skb_head);
1790         spin_lock_bh(&tx_queue->lock);
1791         skb_queue_splice_init(tx_queue, &skb_head);
1792         spin_unlock_bh(&tx_queue->lock);
1793
1794         while ((skb = __skb_dequeue(&skb_head))) {
1795                 dev_kfree_skb(skb);
1796                 stats->tx_dropped++;
1797         }
1798 }
1799
1800 static void rtl8152_tx_timeout(struct net_device *netdev)
1801 {
1802         struct r8152 *tp = netdev_priv(netdev);
1803         int i;
1804
1805         netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1806         for (i = 0; i < RTL8152_MAX_TX; i++)
1807                 usb_unlink_urb(tp->tx_info[i].urb);
1808 }
1809
1810 static void rtl8152_set_rx_mode(struct net_device *netdev)
1811 {
1812         struct r8152 *tp = netdev_priv(netdev);
1813
1814         if (tp->speed & LINK_STATUS) {
1815                 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1816                 schedule_delayed_work(&tp->schedule, 0);
1817         }
1818 }
1819
1820 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1821 {
1822         struct r8152 *tp = netdev_priv(netdev);
1823         u32 mc_filter[2];       /* Multicast hash filter */
1824         __le32 tmp[2];
1825         u32 ocp_data;
1826
1827         clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
1828         netif_stop_queue(netdev);
1829         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1830         ocp_data &= ~RCR_ACPT_ALL;
1831         ocp_data |= RCR_AB | RCR_APM;
1832
1833         if (netdev->flags & IFF_PROMISC) {
1834                 /* Unconditionally log net taps. */
1835                 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1836                 ocp_data |= RCR_AM | RCR_AAP;
1837                 mc_filter[1] = 0xffffffff;
1838                 mc_filter[0] = 0xffffffff;
1839         } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1840                    (netdev->flags & IFF_ALLMULTI)) {
1841                 /* Too many to filter perfectly -- accept all multicasts. */
1842                 ocp_data |= RCR_AM;
1843                 mc_filter[1] = 0xffffffff;
1844                 mc_filter[0] = 0xffffffff;
1845         } else {
1846                 struct netdev_hw_addr *ha;
1847
1848                 mc_filter[1] = 0;
1849                 mc_filter[0] = 0;
1850                 netdev_for_each_mc_addr(ha, netdev) {
1851                         int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1852
1853                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1854                         ocp_data |= RCR_AM;
1855                 }
1856         }
1857
1858         tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1859         tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1860
1861         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1862         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1863         netif_wake_queue(netdev);
1864 }
1865
1866 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
1867                                       struct net_device *netdev)
1868 {
1869         struct r8152 *tp = netdev_priv(netdev);
1870
1871         skb_tx_timestamp(skb);
1872
1873         skb_queue_tail(&tp->tx_queue, skb);
1874
1875         if (!list_empty(&tp->tx_free)) {
1876                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
1877                         set_bit(SCHEDULE_TASKLET, &tp->flags);
1878                         schedule_delayed_work(&tp->schedule, 0);
1879                 } else {
1880                         usb_mark_last_busy(tp->udev);
1881                         tasklet_schedule(&tp->tl);
1882                 }
1883         } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
1884                 netif_stop_queue(netdev);
1885         }
1886
1887         return NETDEV_TX_OK;
1888 }
1889
1890 static void r8152b_reset_packet_filter(struct r8152 *tp)
1891 {
1892         u32     ocp_data;
1893
1894         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
1895         ocp_data &= ~FMC_FCR_MCU_EN;
1896         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1897         ocp_data |= FMC_FCR_MCU_EN;
1898         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1899 }
1900
1901 static void rtl8152_nic_reset(struct r8152 *tp)
1902 {
1903         int     i;
1904
1905         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
1906
1907         for (i = 0; i < 1000; i++) {
1908                 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
1909                         break;
1910                 usleep_range(100, 400);
1911         }
1912 }
1913
1914 static void set_tx_qlen(struct r8152 *tp)
1915 {
1916         struct net_device *netdev = tp->netdev;
1917
1918         tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
1919                                     sizeof(struct tx_desc));
1920 }
1921
1922 static inline u8 rtl8152_get_speed(struct r8152 *tp)
1923 {
1924         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
1925 }
1926
1927 static void rtl_set_eee_plus(struct r8152 *tp)
1928 {
1929         u32 ocp_data;
1930         u8 speed;
1931
1932         speed = rtl8152_get_speed(tp);
1933         if (speed & _10bps) {
1934                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1935                 ocp_data |= EEEP_CR_EEEP_TX;
1936                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1937         } else {
1938                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1939                 ocp_data &= ~EEEP_CR_EEEP_TX;
1940                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1941         }
1942 }
1943
1944 static void rxdy_gated_en(struct r8152 *tp, bool enable)
1945 {
1946         u32 ocp_data;
1947
1948         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1949         if (enable)
1950                 ocp_data |= RXDY_GATED_EN;
1951         else
1952                 ocp_data &= ~RXDY_GATED_EN;
1953         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1954 }
1955
1956 static int rtl_enable(struct r8152 *tp)
1957 {
1958         u32 ocp_data;
1959         int i, ret;
1960
1961         r8152b_reset_packet_filter(tp);
1962
1963         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
1964         ocp_data |= CR_RE | CR_TE;
1965         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
1966
1967         rxdy_gated_en(tp, false);
1968
1969         INIT_LIST_HEAD(&tp->rx_done);
1970         ret = 0;
1971         for (i = 0; i < RTL8152_MAX_RX; i++) {
1972                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1973                 ret |= r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
1974         }
1975
1976         return ret;
1977 }
1978
1979 static int rtl8152_enable(struct r8152 *tp)
1980 {
1981         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1982                 return -ENODEV;
1983
1984         set_tx_qlen(tp);
1985         rtl_set_eee_plus(tp);
1986
1987         return rtl_enable(tp);
1988 }
1989
1990 static void r8153_set_rx_agg(struct r8152 *tp)
1991 {
1992         u8 speed;
1993
1994         speed = rtl8152_get_speed(tp);
1995         if (speed & _1000bps) {
1996                 if (tp->udev->speed == USB_SPEED_SUPER) {
1997                         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
1998                                         RX_THR_SUPPER);
1999                         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2000                                         EARLY_AGG_SUPPER);
2001                 } else {
2002                         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
2003                                         RX_THR_HIGH);
2004                         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2005                                         EARLY_AGG_HIGH);
2006                 }
2007         } else {
2008                 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_SLOW);
2009                 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2010                                 EARLY_AGG_SLOW);
2011         }
2012 }
2013
2014 static int rtl8153_enable(struct r8152 *tp)
2015 {
2016         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2017                 return -ENODEV;
2018
2019         set_tx_qlen(tp);
2020         rtl_set_eee_plus(tp);
2021         r8153_set_rx_agg(tp);
2022
2023         return rtl_enable(tp);
2024 }
2025
2026 static void rtl8152_disable(struct r8152 *tp)
2027 {
2028         u32 ocp_data;
2029         int i;
2030
2031         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2032                 rtl_drop_queued_tx(tp);
2033                 return;
2034         }
2035
2036         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2037         ocp_data &= ~RCR_ACPT_ALL;
2038         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2039
2040         rtl_drop_queued_tx(tp);
2041
2042         for (i = 0; i < RTL8152_MAX_TX; i++)
2043                 usb_kill_urb(tp->tx_info[i].urb);
2044
2045         rxdy_gated_en(tp, true);
2046
2047         for (i = 0; i < 1000; i++) {
2048                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2049                 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2050                         break;
2051                 mdelay(1);
2052         }
2053
2054         for (i = 0; i < 1000; i++) {
2055                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2056                         break;
2057                 mdelay(1);
2058         }
2059
2060         for (i = 0; i < RTL8152_MAX_RX; i++)
2061                 usb_kill_urb(tp->rx_info[i].urb);
2062
2063         rtl8152_nic_reset(tp);
2064 }
2065
2066 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2067 {
2068         u32 ocp_data;
2069
2070         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2071         if (enable)
2072                 ocp_data |= POWER_CUT;
2073         else
2074                 ocp_data &= ~POWER_CUT;
2075         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2076
2077         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2078         ocp_data &= ~RESUME_INDICATE;
2079         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2080 }
2081
2082 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2083
2084 static u32 __rtl_get_wol(struct r8152 *tp)
2085 {
2086         u32 ocp_data;
2087         u32 wolopts = 0;
2088
2089         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2090         if (!(ocp_data & LAN_WAKE_EN))
2091                 return 0;
2092
2093         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2094         if (ocp_data & LINK_ON_WAKE_EN)
2095                 wolopts |= WAKE_PHY;
2096
2097         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2098         if (ocp_data & UWF_EN)
2099                 wolopts |= WAKE_UCAST;
2100         if (ocp_data & BWF_EN)
2101                 wolopts |= WAKE_BCAST;
2102         if (ocp_data & MWF_EN)
2103                 wolopts |= WAKE_MCAST;
2104
2105         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2106         if (ocp_data & MAGIC_EN)
2107                 wolopts |= WAKE_MAGIC;
2108
2109         return wolopts;
2110 }
2111
2112 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2113 {
2114         u32 ocp_data;
2115
2116         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2117
2118         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2119         ocp_data &= ~LINK_ON_WAKE_EN;
2120         if (wolopts & WAKE_PHY)
2121                 ocp_data |= LINK_ON_WAKE_EN;
2122         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2123
2124         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2125         ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2126         if (wolopts & WAKE_UCAST)
2127                 ocp_data |= UWF_EN;
2128         if (wolopts & WAKE_BCAST)
2129                 ocp_data |= BWF_EN;
2130         if (wolopts & WAKE_MCAST)
2131                 ocp_data |= MWF_EN;
2132         if (wolopts & WAKE_ANY)
2133                 ocp_data |= LAN_WAKE_EN;
2134         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2135
2136         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2137
2138         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2139         ocp_data &= ~MAGIC_EN;
2140         if (wolopts & WAKE_MAGIC)
2141                 ocp_data |= MAGIC_EN;
2142         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2143
2144         if (wolopts & WAKE_ANY)
2145                 device_set_wakeup_enable(&tp->udev->dev, true);
2146         else
2147                 device_set_wakeup_enable(&tp->udev->dev, false);
2148 }
2149
2150 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2151 {
2152         if (enable) {
2153                 u32 ocp_data;
2154
2155                 __rtl_set_wol(tp, WAKE_ANY);
2156
2157                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2158
2159                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2160                 ocp_data |= LINK_OFF_WAKE_EN;
2161                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2162
2163                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2164         } else {
2165                 __rtl_set_wol(tp, tp->saved_wolopts);
2166         }
2167 }
2168
2169 static void rtl_phy_reset(struct r8152 *tp)
2170 {
2171         u16 data;
2172         int i;
2173
2174         clear_bit(PHY_RESET, &tp->flags);
2175
2176         data = r8152_mdio_read(tp, MII_BMCR);
2177
2178         /* don't reset again before the previous one complete */
2179         if (data & BMCR_RESET)
2180                 return;
2181
2182         data |= BMCR_RESET;
2183         r8152_mdio_write(tp, MII_BMCR, data);
2184
2185         for (i = 0; i < 50; i++) {
2186                 msleep(20);
2187                 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2188                         break;
2189         }
2190 }
2191
2192 static void rtl_clear_bp(struct r8152 *tp)
2193 {
2194         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_0, 0);
2195         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_2, 0);
2196         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_4, 0);
2197         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_6, 0);
2198         ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_0, 0);
2199         ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_2, 0);
2200         ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_4, 0);
2201         ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_6, 0);
2202         mdelay(3);
2203         ocp_write_word(tp, MCU_TYPE_PLA, PLA_BP_BA, 0);
2204         ocp_write_word(tp, MCU_TYPE_USB, USB_BP_BA, 0);
2205 }
2206
2207 static void r8153_clear_bp(struct r8152 *tp)
2208 {
2209         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_BP_EN, 0);
2210         ocp_write_byte(tp, MCU_TYPE_USB, USB_BP_EN, 0);
2211         rtl_clear_bp(tp);
2212 }
2213
2214 static void r8153_teredo_off(struct r8152 *tp)
2215 {
2216         u32 ocp_data;
2217
2218         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2219         ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2220         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2221
2222         ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2223         ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2224         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2225 }
2226
2227 static void r8152b_disable_aldps(struct r8152 *tp)
2228 {
2229         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
2230         msleep(20);
2231 }
2232
2233 static inline void r8152b_enable_aldps(struct r8152 *tp)
2234 {
2235         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2236                                             LINKENA | DIS_SDSAVE);
2237 }
2238
2239 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2240 {
2241         u16 data;
2242
2243         data = r8152_mdio_read(tp, MII_BMCR);
2244         if (data & BMCR_PDOWN) {
2245                 data &= ~BMCR_PDOWN;
2246                 r8152_mdio_write(tp, MII_BMCR, data);
2247         }
2248
2249         r8152b_disable_aldps(tp);
2250
2251         rtl_clear_bp(tp);
2252
2253         r8152b_enable_aldps(tp);
2254         set_bit(PHY_RESET, &tp->flags);
2255 }
2256
2257 static void r8152b_exit_oob(struct r8152 *tp)
2258 {
2259         u32 ocp_data;
2260         int i;
2261
2262         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2263                 return;
2264
2265         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2266         ocp_data &= ~RCR_ACPT_ALL;
2267         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2268
2269         rxdy_gated_en(tp, true);
2270         r8153_teredo_off(tp);
2271         r8152b_hw_phy_cfg(tp);
2272
2273         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2274         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2275
2276         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2277         ocp_data &= ~NOW_IS_OOB;
2278         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2279
2280         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2281         ocp_data &= ~MCU_BORW_EN;
2282         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2283
2284         for (i = 0; i < 1000; i++) {
2285                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2286                 if (ocp_data & LINK_LIST_READY)
2287                         break;
2288                 mdelay(1);
2289         }
2290
2291         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2292         ocp_data |= RE_INIT_LL;
2293         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2294
2295         for (i = 0; i < 1000; i++) {
2296                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2297                 if (ocp_data & LINK_LIST_READY)
2298                         break;
2299                 mdelay(1);
2300         }
2301
2302         rtl8152_nic_reset(tp);
2303
2304         /* rx share fifo credit full threshold */
2305         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2306
2307         if (tp->udev->speed == USB_SPEED_FULL ||
2308             tp->udev->speed == USB_SPEED_LOW) {
2309                 /* rx share fifo credit near full threshold */
2310                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2311                                 RXFIFO_THR2_FULL);
2312                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2313                                 RXFIFO_THR3_FULL);
2314         } else {
2315                 /* rx share fifo credit near full threshold */
2316                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2317                                 RXFIFO_THR2_HIGH);
2318                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2319                                 RXFIFO_THR3_HIGH);
2320         }
2321
2322         /* TX share fifo free credit full threshold */
2323         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2324
2325         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2326         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2327         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2328                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2329
2330         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2331         ocp_data &= ~CPCR_RX_VLAN;
2332         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2333
2334         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2335
2336         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2337         ocp_data |= TCR0_AUTO_FIFO;
2338         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2339 }
2340
2341 static void r8152b_enter_oob(struct r8152 *tp)
2342 {
2343         u32 ocp_data;
2344         int i;
2345
2346         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2347         ocp_data &= ~NOW_IS_OOB;
2348         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2349
2350         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2351         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2352         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2353
2354         rtl8152_disable(tp);
2355
2356         for (i = 0; i < 1000; i++) {
2357                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2358                 if (ocp_data & LINK_LIST_READY)
2359                         break;
2360                 mdelay(1);
2361         }
2362
2363         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2364         ocp_data |= RE_INIT_LL;
2365         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2366
2367         for (i = 0; i < 1000; i++) {
2368                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2369                 if (ocp_data & LINK_LIST_READY)
2370                         break;
2371                 mdelay(1);
2372         }
2373
2374         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2375
2376         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2377         ocp_data |= CPCR_RX_VLAN;
2378         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2379
2380         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2381         ocp_data |= ALDPS_PROXY_MODE;
2382         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2383
2384         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2385         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2386         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2387
2388         rxdy_gated_en(tp, false);
2389
2390         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2391         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2392         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2393 }
2394
2395 static void r8153_hw_phy_cfg(struct r8152 *tp)
2396 {
2397         u32 ocp_data;
2398         u16 data;
2399
2400         ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2401         data = r8152_mdio_read(tp, MII_BMCR);
2402         if (data & BMCR_PDOWN) {
2403                 data &= ~BMCR_PDOWN;
2404                 r8152_mdio_write(tp, MII_BMCR, data);
2405         }
2406
2407         r8153_clear_bp(tp);
2408
2409         if (tp->version == RTL_VER_03) {
2410                 data = ocp_reg_read(tp, OCP_EEE_CFG);
2411                 data &= ~CTAP_SHORT_EN;
2412                 ocp_reg_write(tp, OCP_EEE_CFG, data);
2413         }
2414
2415         data = ocp_reg_read(tp, OCP_POWER_CFG);
2416         data |= EEE_CLKDIV_EN;
2417         ocp_reg_write(tp, OCP_POWER_CFG, data);
2418
2419         data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2420         data |= EN_10M_BGOFF;
2421         ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2422         data = ocp_reg_read(tp, OCP_POWER_CFG);
2423         data |= EN_10M_PLLOFF;
2424         ocp_reg_write(tp, OCP_POWER_CFG, data);
2425         data = sram_read(tp, SRAM_IMPEDANCE);
2426         data &= ~RX_DRIVING_MASK;
2427         sram_write(tp, SRAM_IMPEDANCE, data);
2428
2429         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2430         ocp_data |= PFM_PWM_SWITCH;
2431         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2432
2433         data = sram_read(tp, SRAM_LPF_CFG);
2434         data |= LPF_AUTO_TUNE;
2435         sram_write(tp, SRAM_LPF_CFG, data);
2436
2437         data = sram_read(tp, SRAM_10M_AMP1);
2438         data |= GDAC_IB_UPALL;
2439         sram_write(tp, SRAM_10M_AMP1, data);
2440         data = sram_read(tp, SRAM_10M_AMP2);
2441         data |= AMP_DN;
2442         sram_write(tp, SRAM_10M_AMP2, data);
2443
2444         set_bit(PHY_RESET, &tp->flags);
2445 }
2446
2447 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2448 {
2449         u8 u1u2[8];
2450
2451         if (enable)
2452                 memset(u1u2, 0xff, sizeof(u1u2));
2453         else
2454                 memset(u1u2, 0x00, sizeof(u1u2));
2455
2456         usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2457 }
2458
2459 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2460 {
2461         u32 ocp_data;
2462
2463         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2464         if (enable)
2465                 ocp_data |= U2P3_ENABLE;
2466         else
2467                 ocp_data &= ~U2P3_ENABLE;
2468         ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2469 }
2470
2471 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2472 {
2473         u32 ocp_data;
2474
2475         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2476         if (enable)
2477                 ocp_data |= PWR_EN | PHASE2_EN;
2478         else
2479                 ocp_data &= ~(PWR_EN | PHASE2_EN);
2480         ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2481
2482         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2483         ocp_data &= ~PCUT_STATUS;
2484         ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2485 }
2486
2487 static void r8153_first_init(struct r8152 *tp)
2488 {
2489         u32 ocp_data;
2490         int i;
2491
2492         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2493                 return;
2494
2495         rxdy_gated_en(tp, true);
2496         r8153_teredo_off(tp);
2497
2498         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2499         ocp_data &= ~RCR_ACPT_ALL;
2500         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2501
2502         r8153_hw_phy_cfg(tp);
2503
2504         rtl8152_nic_reset(tp);
2505
2506         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2507         ocp_data &= ~NOW_IS_OOB;
2508         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2509
2510         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2511         ocp_data &= ~MCU_BORW_EN;
2512         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2513
2514         for (i = 0; i < 1000; i++) {
2515                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2516                 if (ocp_data & LINK_LIST_READY)
2517                         break;
2518                 mdelay(1);
2519         }
2520
2521         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2522         ocp_data |= RE_INIT_LL;
2523         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2524
2525         for (i = 0; i < 1000; i++) {
2526                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2527                 if (ocp_data & LINK_LIST_READY)
2528                         break;
2529                 mdelay(1);
2530         }
2531
2532         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2533         ocp_data &= ~CPCR_RX_VLAN;
2534         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2535
2536         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2537         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2538
2539         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2540         ocp_data |= TCR0_AUTO_FIFO;
2541         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2542
2543         rtl8152_nic_reset(tp);
2544
2545         /* rx share fifo credit full threshold */
2546         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2547         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2548         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2549         /* TX share fifo free credit full threshold */
2550         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2551
2552         /* rx aggregation */
2553         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2554         ocp_data &= ~RX_AGG_DISABLE;
2555         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2556 }
2557
2558 static void r8153_enter_oob(struct r8152 *tp)
2559 {
2560         u32 ocp_data;
2561         int i;
2562
2563         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2564         ocp_data &= ~NOW_IS_OOB;
2565         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2566
2567         rtl8152_disable(tp);
2568
2569         for (i = 0; i < 1000; i++) {
2570                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2571                 if (ocp_data & LINK_LIST_READY)
2572                         break;
2573                 mdelay(1);
2574         }
2575
2576         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2577         ocp_data |= RE_INIT_LL;
2578         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2579
2580         for (i = 0; i < 1000; i++) {
2581                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2582                 if (ocp_data & LINK_LIST_READY)
2583                         break;
2584                 mdelay(1);
2585         }
2586
2587         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2588
2589         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2590         ocp_data &= ~TEREDO_WAKE_MASK;
2591         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2592
2593         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2594         ocp_data |= CPCR_RX_VLAN;
2595         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2596
2597         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2598         ocp_data |= ALDPS_PROXY_MODE;
2599         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2600
2601         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2602         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2603         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2604
2605         rxdy_gated_en(tp, false);
2606
2607         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2608         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2609         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2610 }
2611
2612 static void r8153_disable_aldps(struct r8152 *tp)
2613 {
2614         u16 data;
2615
2616         data = ocp_reg_read(tp, OCP_POWER_CFG);
2617         data &= ~EN_ALDPS;
2618         ocp_reg_write(tp, OCP_POWER_CFG, data);
2619         msleep(20);
2620 }
2621
2622 static void r8153_enable_aldps(struct r8152 *tp)
2623 {
2624         u16 data;
2625
2626         data = ocp_reg_read(tp, OCP_POWER_CFG);
2627         data |= EN_ALDPS;
2628         ocp_reg_write(tp, OCP_POWER_CFG, data);
2629 }
2630
2631 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2632 {
2633         u16 bmcr, anar, gbcr;
2634         int ret = 0;
2635
2636         cancel_delayed_work_sync(&tp->schedule);
2637         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2638         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2639                   ADVERTISE_100HALF | ADVERTISE_100FULL);
2640         if (tp->mii.supports_gmii) {
2641                 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2642                 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2643         } else {
2644                 gbcr = 0;
2645         }
2646
2647         if (autoneg == AUTONEG_DISABLE) {
2648                 if (speed == SPEED_10) {
2649                         bmcr = 0;
2650                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2651                 } else if (speed == SPEED_100) {
2652                         bmcr = BMCR_SPEED100;
2653                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2654                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2655                         bmcr = BMCR_SPEED1000;
2656                         gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2657                 } else {
2658                         ret = -EINVAL;
2659                         goto out;
2660                 }
2661
2662                 if (duplex == DUPLEX_FULL)
2663                         bmcr |= BMCR_FULLDPLX;
2664         } else {
2665                 if (speed == SPEED_10) {
2666                         if (duplex == DUPLEX_FULL)
2667                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2668                         else
2669                                 anar |= ADVERTISE_10HALF;
2670                 } else if (speed == SPEED_100) {
2671                         if (duplex == DUPLEX_FULL) {
2672                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2673                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2674                         } else {
2675                                 anar |= ADVERTISE_10HALF;
2676                                 anar |= ADVERTISE_100HALF;
2677                         }
2678                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2679                         if (duplex == DUPLEX_FULL) {
2680                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2681                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2682                                 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2683                         } else {
2684                                 anar |= ADVERTISE_10HALF;
2685                                 anar |= ADVERTISE_100HALF;
2686                                 gbcr |= ADVERTISE_1000HALF;
2687                         }
2688                 } else {
2689                         ret = -EINVAL;
2690                         goto out;
2691                 }
2692
2693                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2694         }
2695
2696         if (test_bit(PHY_RESET, &tp->flags))
2697                 bmcr |= BMCR_RESET;
2698
2699         if (tp->mii.supports_gmii)
2700                 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2701
2702         r8152_mdio_write(tp, MII_ADVERTISE, anar);
2703         r8152_mdio_write(tp, MII_BMCR, bmcr);
2704
2705         if (test_bit(PHY_RESET, &tp->flags)) {
2706                 int i;
2707
2708                 clear_bit(PHY_RESET, &tp->flags);
2709                 for (i = 0; i < 50; i++) {
2710                         msleep(20);
2711                         if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2712                                 break;
2713                 }
2714         }
2715
2716 out:
2717
2718         return ret;
2719 }
2720
2721 static void rtl8152_down(struct r8152 *tp)
2722 {
2723         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2724                 rtl_drop_queued_tx(tp);
2725                 return;
2726         }
2727
2728         r8152_power_cut_en(tp, false);
2729         r8152b_disable_aldps(tp);
2730         r8152b_enter_oob(tp);
2731         r8152b_enable_aldps(tp);
2732 }
2733
2734 static void rtl8153_down(struct r8152 *tp)
2735 {
2736         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2737                 rtl_drop_queued_tx(tp);
2738                 return;
2739         }
2740
2741         r8153_u1u2en(tp, false);
2742         r8153_power_cut_en(tp, false);
2743         r8153_disable_aldps(tp);
2744         r8153_enter_oob(tp);
2745         r8153_enable_aldps(tp);
2746 }
2747
2748 static void set_carrier(struct r8152 *tp)
2749 {
2750         struct net_device *netdev = tp->netdev;
2751         u8 speed;
2752
2753         clear_bit(RTL8152_LINK_CHG, &tp->flags);
2754         speed = rtl8152_get_speed(tp);
2755
2756         if (speed & LINK_STATUS) {
2757                 if (!(tp->speed & LINK_STATUS)) {
2758                         tp->rtl_ops.enable(tp);
2759                         set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2760                         netif_carrier_on(netdev);
2761                 }
2762         } else {
2763                 if (tp->speed & LINK_STATUS) {
2764                         netif_carrier_off(netdev);
2765                         tasklet_disable(&tp->tl);
2766                         tp->rtl_ops.disable(tp);
2767                         tasklet_enable(&tp->tl);
2768                 }
2769         }
2770         tp->speed = speed;
2771 }
2772
2773 static void rtl_work_func_t(struct work_struct *work)
2774 {
2775         struct r8152 *tp = container_of(work, struct r8152, schedule.work);
2776
2777         if (usb_autopm_get_interface(tp->intf) < 0)
2778                 return;
2779
2780         if (!test_bit(WORK_ENABLE, &tp->flags))
2781                 goto out1;
2782
2783         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2784                 goto out1;
2785
2786         if (test_bit(RTL8152_LINK_CHG, &tp->flags))
2787                 set_carrier(tp);
2788
2789         if (test_bit(RTL8152_SET_RX_MODE, &tp->flags))
2790                 _rtl8152_set_rx_mode(tp->netdev);
2791
2792         if (test_bit(SCHEDULE_TASKLET, &tp->flags) &&
2793             (tp->speed & LINK_STATUS)) {
2794                 clear_bit(SCHEDULE_TASKLET, &tp->flags);
2795                 tasklet_schedule(&tp->tl);
2796         }
2797
2798         if (test_bit(PHY_RESET, &tp->flags))
2799                 rtl_phy_reset(tp);
2800
2801 out1:
2802         usb_autopm_put_interface(tp->intf);
2803 }
2804
2805 static int rtl8152_open(struct net_device *netdev)
2806 {
2807         struct r8152 *tp = netdev_priv(netdev);
2808         int res = 0;
2809
2810         res = alloc_all_mem(tp);
2811         if (res)
2812                 goto out;
2813
2814         res = usb_autopm_get_interface(tp->intf);
2815         if (res < 0) {
2816                 free_all_mem(tp);
2817                 goto out;
2818         }
2819
2820         /* The WORK_ENABLE may be set when autoresume occurs */
2821         if (test_bit(WORK_ENABLE, &tp->flags)) {
2822                 clear_bit(WORK_ENABLE, &tp->flags);
2823                 usb_kill_urb(tp->intr_urb);
2824                 cancel_delayed_work_sync(&tp->schedule);
2825                 if (tp->speed & LINK_STATUS)
2826                         tp->rtl_ops.disable(tp);
2827         }
2828
2829         tp->rtl_ops.up(tp);
2830
2831         rtl8152_set_speed(tp, AUTONEG_ENABLE,
2832                           tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
2833                           DUPLEX_FULL);
2834         tp->speed = 0;
2835         netif_carrier_off(netdev);
2836         netif_start_queue(netdev);
2837         set_bit(WORK_ENABLE, &tp->flags);
2838
2839         res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
2840         if (res) {
2841                 if (res == -ENODEV)
2842                         netif_device_detach(tp->netdev);
2843                 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
2844                            res);
2845                 free_all_mem(tp);
2846         }
2847
2848         usb_autopm_put_interface(tp->intf);
2849
2850 out:
2851         return res;
2852 }
2853
2854 static int rtl8152_close(struct net_device *netdev)
2855 {
2856         struct r8152 *tp = netdev_priv(netdev);
2857         int res = 0;
2858
2859         clear_bit(WORK_ENABLE, &tp->flags);
2860         usb_kill_urb(tp->intr_urb);
2861         cancel_delayed_work_sync(&tp->schedule);
2862         netif_stop_queue(netdev);
2863
2864         res = usb_autopm_get_interface(tp->intf);
2865         if (res < 0) {
2866                 rtl_drop_queued_tx(tp);
2867         } else {
2868                 /* The autosuspend may have been enabled and wouldn't
2869                  * be disable when autoresume occurs, because the
2870                  * netif_running() would be false.
2871                  */
2872                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2873                         rtl_runtime_suspend_enable(tp, false);
2874                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
2875                 }
2876
2877                 tasklet_disable(&tp->tl);
2878                 tp->rtl_ops.down(tp);
2879                 tasklet_enable(&tp->tl);
2880                 usb_autopm_put_interface(tp->intf);
2881         }
2882
2883         free_all_mem(tp);
2884
2885         return res;
2886 }
2887
2888 static void r8152b_enable_eee(struct r8152 *tp)
2889 {
2890         u32 ocp_data;
2891
2892         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2893         ocp_data |= EEE_RX_EN | EEE_TX_EN;
2894         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2895         ocp_reg_write(tp, OCP_EEE_CONFIG1, RG_TXLPI_MSK_HFDUP | RG_MATCLR_EN |
2896                                            EEE_10_CAP | EEE_NWAY_EN |
2897                                            TX_QUIET_EN | RX_QUIET_EN |
2898                                            SDRISETIME | RG_RXLPI_MSK_HFDUP |
2899                                            SDFALLTIME);
2900         ocp_reg_write(tp, OCP_EEE_CONFIG2, RG_LPIHYS_NUM | RG_DACQUIET_EN |
2901                                            RG_LDVQUIET_EN | RG_CKRSEL |
2902                                            RG_EEEPRG_EN);
2903         ocp_reg_write(tp, OCP_EEE_CONFIG3, FST_SNR_EYE_R | RG_LFS_SEL | MSK_PH);
2904         ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | DEVICE_ADDR);
2905         ocp_reg_write(tp, OCP_EEE_DATA, EEE_ADDR);
2906         ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | DEVICE_ADDR);
2907         ocp_reg_write(tp, OCP_EEE_DATA, EEE_DATA);
2908         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2909 }
2910
2911 static void r8153_enable_eee(struct r8152 *tp)
2912 {
2913         u32 ocp_data;
2914         u16 data;
2915
2916         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2917         ocp_data |= EEE_RX_EN | EEE_TX_EN;
2918         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2919         data = ocp_reg_read(tp, OCP_EEE_CFG);
2920         data |= EEE10_EN;
2921         ocp_reg_write(tp, OCP_EEE_CFG, data);
2922         data = ocp_reg_read(tp, OCP_EEE_CFG2);
2923         data |= MY1000_EEE | MY100_EEE;
2924         ocp_reg_write(tp, OCP_EEE_CFG2, data);
2925 }
2926
2927 static void r8152b_enable_fc(struct r8152 *tp)
2928 {
2929         u16 anar;
2930
2931         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2932         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
2933         r8152_mdio_write(tp, MII_ADVERTISE, anar);
2934 }
2935
2936 static void rtl_tally_reset(struct r8152 *tp)
2937 {
2938         u32 ocp_data;
2939
2940         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
2941         ocp_data |= TALLY_RESET;
2942         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
2943 }
2944
2945 static void r8152b_init(struct r8152 *tp)
2946 {
2947         u32 ocp_data;
2948
2949         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2950                 return;
2951
2952         if (tp->version == RTL_VER_01) {
2953                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
2954                 ocp_data &= ~LED_MODE_MASK;
2955                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
2956         }
2957
2958         r8152_power_cut_en(tp, false);
2959
2960         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2961         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
2962         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2963         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
2964         ocp_data &= ~MCU_CLK_RATIO_MASK;
2965         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
2966         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
2967         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
2968                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
2969         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
2970
2971         r8152b_enable_eee(tp);
2972         r8152b_enable_aldps(tp);
2973         r8152b_enable_fc(tp);
2974         rtl_tally_reset(tp);
2975
2976         /* enable rx aggregation */
2977         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2978         ocp_data &= ~RX_AGG_DISABLE;
2979         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2980 }
2981
2982 static void r8153_init(struct r8152 *tp)
2983 {
2984         u32 ocp_data;
2985         int i;
2986
2987         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2988                 return;
2989
2990         r8153_u1u2en(tp, false);
2991
2992         for (i = 0; i < 500; i++) {
2993                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
2994                     AUTOLOAD_DONE)
2995                         break;
2996                 msleep(20);
2997         }
2998
2999         for (i = 0; i < 500; i++) {
3000                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3001                 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3002                         break;
3003                 msleep(20);
3004         }
3005
3006         r8153_u2p3en(tp, false);
3007
3008         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3009         ocp_data &= ~TIMER11_EN;
3010         ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3011
3012         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3013         ocp_data &= ~LED_MODE_MASK;
3014         ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3015
3016         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL);
3017         ocp_data &= ~LPM_TIMER_MASK;
3018         if (tp->udev->speed == USB_SPEED_SUPER)
3019                 ocp_data |= LPM_TIMER_500US;
3020         else
3021                 ocp_data |= LPM_TIMER_500MS;
3022         ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3023
3024         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3025         ocp_data &= ~SEN_VAL_MASK;
3026         ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3027         ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3028
3029         r8153_power_cut_en(tp, false);
3030         r8153_u1u2en(tp, true);
3031
3032         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3033         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3034         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3035                        PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3036                        U1U2_SPDWN_EN | L1_SPDWN_EN);
3037         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3038                        PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3039                        TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3040                        EEE_SPDWN_EN);
3041
3042         r8153_enable_eee(tp);
3043         r8153_enable_aldps(tp);
3044         r8152b_enable_fc(tp);
3045         rtl_tally_reset(tp);
3046 }
3047
3048 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3049 {
3050         struct r8152 *tp = usb_get_intfdata(intf);
3051
3052         if (PMSG_IS_AUTO(message))
3053                 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3054         else
3055                 netif_device_detach(tp->netdev);
3056
3057         if (netif_running(tp->netdev)) {
3058                 clear_bit(WORK_ENABLE, &tp->flags);
3059                 usb_kill_urb(tp->intr_urb);
3060                 cancel_delayed_work_sync(&tp->schedule);
3061                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3062                         rtl_runtime_suspend_enable(tp, true);
3063                 } else {
3064                         tasklet_disable(&tp->tl);
3065                         tp->rtl_ops.down(tp);
3066                         tasklet_enable(&tp->tl);
3067                 }
3068         }
3069
3070         return 0;
3071 }
3072
3073 static int rtl8152_resume(struct usb_interface *intf)
3074 {
3075         struct r8152 *tp = usb_get_intfdata(intf);
3076
3077         if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3078                 tp->rtl_ops.init(tp);
3079                 netif_device_attach(tp->netdev);
3080         }
3081
3082         if (netif_running(tp->netdev)) {
3083                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3084                         rtl_runtime_suspend_enable(tp, false);
3085                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3086                         if (tp->speed & LINK_STATUS)
3087                                 tp->rtl_ops.disable(tp);
3088                 } else {
3089                         tp->rtl_ops.up(tp);
3090                         rtl8152_set_speed(tp, AUTONEG_ENABLE,
3091                                           tp->mii.supports_gmii ?
3092                                           SPEED_1000 : SPEED_100,
3093                                           DUPLEX_FULL);
3094                 }
3095                 tp->speed = 0;
3096                 netif_carrier_off(tp->netdev);
3097                 set_bit(WORK_ENABLE, &tp->flags);
3098                 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3099         }
3100
3101         return 0;
3102 }
3103
3104 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3105 {
3106         struct r8152 *tp = netdev_priv(dev);
3107
3108         if (usb_autopm_get_interface(tp->intf) < 0)
3109                 return;
3110
3111         wol->supported = WAKE_ANY;
3112         wol->wolopts = __rtl_get_wol(tp);
3113
3114         usb_autopm_put_interface(tp->intf);
3115 }
3116
3117 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3118 {
3119         struct r8152 *tp = netdev_priv(dev);
3120         int ret;
3121
3122         ret = usb_autopm_get_interface(tp->intf);
3123         if (ret < 0)
3124                 goto out_set_wol;
3125
3126         __rtl_set_wol(tp, wol->wolopts);
3127         tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3128
3129         usb_autopm_put_interface(tp->intf);
3130
3131 out_set_wol:
3132         return ret;
3133 }
3134
3135 static u32 rtl8152_get_msglevel(struct net_device *dev)
3136 {
3137         struct r8152 *tp = netdev_priv(dev);
3138
3139         return tp->msg_enable;
3140 }
3141
3142 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3143 {
3144         struct r8152 *tp = netdev_priv(dev);
3145
3146         tp->msg_enable = value;
3147 }
3148
3149 static void rtl8152_get_drvinfo(struct net_device *netdev,
3150                                 struct ethtool_drvinfo *info)
3151 {
3152         struct r8152 *tp = netdev_priv(netdev);
3153
3154         strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3155         strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3156         usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3157 }
3158
3159 static
3160 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3161 {
3162         struct r8152 *tp = netdev_priv(netdev);
3163
3164         if (!tp->mii.mdio_read)
3165                 return -EOPNOTSUPP;
3166
3167         return mii_ethtool_gset(&tp->mii, cmd);
3168 }
3169
3170 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3171 {
3172         struct r8152 *tp = netdev_priv(dev);
3173         int ret;
3174
3175         ret = usb_autopm_get_interface(tp->intf);
3176         if (ret < 0)
3177                 goto out;
3178
3179         ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3180
3181         usb_autopm_put_interface(tp->intf);
3182
3183 out:
3184         return ret;
3185 }
3186
3187 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3188         "tx_packets",
3189         "rx_packets",
3190         "tx_errors",
3191         "rx_errors",
3192         "rx_missed",
3193         "align_errors",
3194         "tx_single_collisions",
3195         "tx_multi_collisions",
3196         "rx_unicast",
3197         "rx_broadcast",
3198         "rx_multicast",
3199         "tx_aborted",
3200         "tx_underrun",
3201 };
3202
3203 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3204 {
3205         switch (sset) {
3206         case ETH_SS_STATS:
3207                 return ARRAY_SIZE(rtl8152_gstrings);
3208         default:
3209                 return -EOPNOTSUPP;
3210         }
3211 }
3212
3213 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3214                                       struct ethtool_stats *stats, u64 *data)
3215 {
3216         struct r8152 *tp = netdev_priv(dev);
3217         struct tally_counter tally;
3218
3219         if (usb_autopm_get_interface(tp->intf) < 0)
3220                 return;
3221
3222         generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3223
3224         usb_autopm_put_interface(tp->intf);
3225
3226         data[0] = le64_to_cpu(tally.tx_packets);
3227         data[1] = le64_to_cpu(tally.rx_packets);
3228         data[2] = le64_to_cpu(tally.tx_errors);
3229         data[3] = le32_to_cpu(tally.rx_errors);
3230         data[4] = le16_to_cpu(tally.rx_missed);
3231         data[5] = le16_to_cpu(tally.align_errors);
3232         data[6] = le32_to_cpu(tally.tx_one_collision);
3233         data[7] = le32_to_cpu(tally.tx_multi_collision);
3234         data[8] = le64_to_cpu(tally.rx_unicast);
3235         data[9] = le64_to_cpu(tally.rx_broadcast);
3236         data[10] = le32_to_cpu(tally.rx_multicast);
3237         data[11] = le16_to_cpu(tally.tx_aborted);
3238         data[12] = le16_to_cpu(tally.tx_underun);
3239 }
3240
3241 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3242 {
3243         switch (stringset) {
3244         case ETH_SS_STATS:
3245                 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3246                 break;
3247         }
3248 }
3249
3250 static struct ethtool_ops ops = {
3251         .get_drvinfo = rtl8152_get_drvinfo,
3252         .get_settings = rtl8152_get_settings,
3253         .set_settings = rtl8152_set_settings,
3254         .get_link = ethtool_op_get_link,
3255         .get_msglevel = rtl8152_get_msglevel,
3256         .set_msglevel = rtl8152_set_msglevel,
3257         .get_wol = rtl8152_get_wol,
3258         .set_wol = rtl8152_set_wol,
3259         .get_strings = rtl8152_get_strings,
3260         .get_sset_count = rtl8152_get_sset_count,
3261         .get_ethtool_stats = rtl8152_get_ethtool_stats,
3262 };
3263
3264 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3265 {
3266         struct r8152 *tp = netdev_priv(netdev);
3267         struct mii_ioctl_data *data = if_mii(rq);
3268         int res;
3269
3270         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3271                 return -ENODEV;
3272
3273         res = usb_autopm_get_interface(tp->intf);
3274         if (res < 0)
3275                 goto out;
3276
3277         switch (cmd) {
3278         case SIOCGMIIPHY:
3279                 data->phy_id = R8152_PHY_ID; /* Internal PHY */
3280                 break;
3281
3282         case SIOCGMIIREG:
3283                 data->val_out = r8152_mdio_read(tp, data->reg_num);
3284                 break;
3285
3286         case SIOCSMIIREG:
3287                 if (!capable(CAP_NET_ADMIN)) {
3288                         res = -EPERM;
3289                         break;
3290                 }
3291                 r8152_mdio_write(tp, data->reg_num, data->val_in);
3292                 break;
3293
3294         default:
3295                 res = -EOPNOTSUPP;
3296         }
3297
3298         usb_autopm_put_interface(tp->intf);
3299
3300 out:
3301         return res;
3302 }
3303
3304 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
3305 {
3306         struct r8152 *tp = netdev_priv(dev);
3307
3308         switch (tp->version) {
3309         case RTL_VER_01:
3310         case RTL_VER_02:
3311                 return eth_change_mtu(dev, new_mtu);
3312         default:
3313                 break;
3314         }
3315
3316         if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
3317                 return -EINVAL;
3318
3319         dev->mtu = new_mtu;
3320
3321         return 0;
3322 }
3323
3324 static const struct net_device_ops rtl8152_netdev_ops = {
3325         .ndo_open               = rtl8152_open,
3326         .ndo_stop               = rtl8152_close,
3327         .ndo_do_ioctl           = rtl8152_ioctl,
3328         .ndo_start_xmit         = rtl8152_start_xmit,
3329         .ndo_tx_timeout         = rtl8152_tx_timeout,
3330         .ndo_set_rx_mode        = rtl8152_set_rx_mode,
3331         .ndo_set_mac_address    = rtl8152_set_mac_address,
3332         .ndo_change_mtu         = rtl8152_change_mtu,
3333         .ndo_validate_addr      = eth_validate_addr,
3334 };
3335
3336 static void r8152b_get_version(struct r8152 *tp)
3337 {
3338         u32     ocp_data;
3339         u16     version;
3340
3341         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
3342         version = (u16)(ocp_data & VERSION_MASK);
3343
3344         switch (version) {
3345         case 0x4c00:
3346                 tp->version = RTL_VER_01;
3347                 break;
3348         case 0x4c10:
3349                 tp->version = RTL_VER_02;
3350                 break;
3351         case 0x5c00:
3352                 tp->version = RTL_VER_03;
3353                 tp->mii.supports_gmii = 1;
3354                 break;
3355         case 0x5c10:
3356                 tp->version = RTL_VER_04;
3357                 tp->mii.supports_gmii = 1;
3358                 break;
3359         case 0x5c20:
3360                 tp->version = RTL_VER_05;
3361                 tp->mii.supports_gmii = 1;
3362                 break;
3363         default:
3364                 netif_info(tp, probe, tp->netdev,
3365                            "Unknown version 0x%04x\n", version);
3366                 break;
3367         }
3368 }
3369
3370 static void rtl8152_unload(struct r8152 *tp)
3371 {
3372         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3373                 return;
3374
3375         if (tp->version != RTL_VER_01)
3376                 r8152_power_cut_en(tp, true);
3377 }
3378
3379 static void rtl8153_unload(struct r8152 *tp)
3380 {
3381         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3382                 return;
3383
3384         r8153_power_cut_en(tp, true);
3385 }
3386
3387 static int rtl_ops_init(struct r8152 *tp, const struct usb_device_id *id)
3388 {
3389         struct rtl_ops *ops = &tp->rtl_ops;
3390         int ret = -ENODEV;
3391
3392         switch (id->idVendor) {
3393         case VENDOR_ID_REALTEK:
3394                 switch (id->idProduct) {
3395                 case PRODUCT_ID_RTL8152:
3396                         ops->init               = r8152b_init;
3397                         ops->enable             = rtl8152_enable;
3398                         ops->disable            = rtl8152_disable;
3399                         ops->up                 = r8152b_exit_oob;
3400                         ops->down               = rtl8152_down;
3401                         ops->unload             = rtl8152_unload;
3402                         ret = 0;
3403                         break;
3404                 case PRODUCT_ID_RTL8153:
3405                         ops->init               = r8153_init;
3406                         ops->enable             = rtl8153_enable;
3407                         ops->disable            = rtl8152_disable;
3408                         ops->up                 = r8153_first_init;
3409                         ops->down               = rtl8153_down;
3410                         ops->unload             = rtl8153_unload;
3411                         ret = 0;
3412                         break;
3413                 default:
3414                         break;
3415                 }
3416                 break;
3417
3418         case VENDOR_ID_SAMSUNG:
3419                 switch (id->idProduct) {
3420                 case PRODUCT_ID_SAMSUNG:
3421                         ops->init               = r8153_init;
3422                         ops->enable             = rtl8153_enable;
3423                         ops->disable            = rtl8152_disable;
3424                         ops->up                 = r8153_first_init;
3425                         ops->down               = rtl8153_down;
3426                         ops->unload             = rtl8153_unload;
3427                         ret = 0;
3428                         break;
3429                 default:
3430                         break;
3431                 }
3432                 break;
3433
3434         default:
3435                 break;
3436         }
3437
3438         if (ret)
3439                 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
3440
3441         return ret;
3442 }
3443
3444 static int rtl8152_probe(struct usb_interface *intf,
3445                          const struct usb_device_id *id)
3446 {
3447         struct usb_device *udev = interface_to_usbdev(intf);
3448         struct r8152 *tp;
3449         struct net_device *netdev;
3450         int ret;
3451
3452         if (udev->actconfig->desc.bConfigurationValue != 1) {
3453                 usb_driver_set_configuration(udev, 1);
3454                 return -ENODEV;
3455         }
3456
3457         usb_reset_device(udev);
3458         netdev = alloc_etherdev(sizeof(struct r8152));
3459         if (!netdev) {
3460                 dev_err(&intf->dev, "Out of memory\n");
3461                 return -ENOMEM;
3462         }
3463
3464         SET_NETDEV_DEV(netdev, &intf->dev);
3465         tp = netdev_priv(netdev);
3466         tp->msg_enable = 0x7FFF;
3467
3468         tp->udev = udev;
3469         tp->netdev = netdev;
3470         tp->intf = intf;
3471
3472         ret = rtl_ops_init(tp, id);
3473         if (ret)
3474                 goto out;
3475
3476         tasklet_init(&tp->tl, bottom_half, (unsigned long)tp);
3477         INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
3478
3479         netdev->netdev_ops = &rtl8152_netdev_ops;
3480         netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
3481
3482         netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
3483                             NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
3484                             NETIF_F_TSO6;
3485         netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
3486                               NETIF_F_TSO | NETIF_F_FRAGLIST |
3487                               NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
3488
3489         netdev->ethtool_ops = &ops;
3490         netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
3491
3492         tp->mii.dev = netdev;
3493         tp->mii.mdio_read = read_mii_word;
3494         tp->mii.mdio_write = write_mii_word;
3495         tp->mii.phy_id_mask = 0x3f;
3496         tp->mii.reg_num_mask = 0x1f;
3497         tp->mii.phy_id = R8152_PHY_ID;
3498         tp->mii.supports_gmii = 0;
3499
3500         intf->needs_remote_wakeup = 1;
3501
3502         r8152b_get_version(tp);
3503         tp->rtl_ops.init(tp);
3504         set_ethernet_addr(tp);
3505
3506         usb_set_intfdata(intf, tp);
3507
3508         ret = register_netdev(netdev);
3509         if (ret != 0) {
3510                 netif_err(tp, probe, netdev, "couldn't register the device\n");
3511                 goto out1;
3512         }
3513
3514         tp->saved_wolopts = __rtl_get_wol(tp);
3515         if (tp->saved_wolopts)
3516                 device_set_wakeup_enable(&udev->dev, true);
3517         else
3518                 device_set_wakeup_enable(&udev->dev, false);
3519
3520         netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
3521
3522         return 0;
3523
3524 out1:
3525         usb_set_intfdata(intf, NULL);
3526 out:
3527         free_netdev(netdev);
3528         return ret;
3529 }
3530
3531 static void rtl8152_disconnect(struct usb_interface *intf)
3532 {
3533         struct r8152 *tp = usb_get_intfdata(intf);
3534
3535         usb_set_intfdata(intf, NULL);
3536         if (tp) {
3537                 set_bit(RTL8152_UNPLUG, &tp->flags);
3538                 tasklet_kill(&tp->tl);
3539                 unregister_netdev(tp->netdev);
3540                 tp->rtl_ops.unload(tp);
3541                 free_netdev(tp->netdev);
3542         }
3543 }
3544
3545 /* table of devices that work with this driver */
3546 static struct usb_device_id rtl8152_table[] = {
3547         {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8152)},
3548         {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8153)},
3549         {USB_DEVICE(VENDOR_ID_SAMSUNG, PRODUCT_ID_SAMSUNG)},
3550         {}
3551 };
3552
3553 MODULE_DEVICE_TABLE(usb, rtl8152_table);
3554
3555 static struct usb_driver rtl8152_driver = {
3556         .name =         MODULENAME,
3557         .id_table =     rtl8152_table,
3558         .probe =        rtl8152_probe,
3559         .disconnect =   rtl8152_disconnect,
3560         .suspend =      rtl8152_suspend,
3561         .resume =       rtl8152_resume,
3562         .reset_resume = rtl8152_resume,
3563         .supports_autosuspend = 1,
3564         .disable_hub_initiated_lpm = 1,
3565 };
3566
3567 module_usb_driver(rtl8152_driver);
3568
3569 MODULE_AUTHOR(DRIVER_AUTHOR);
3570 MODULE_DESCRIPTION(DRIVER_DESC);
3571 MODULE_LICENSE("GPL");