2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
26 /* Version Information */
27 #define DRIVER_VERSION "v1.06.0 (2014/03/03)"
28 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
29 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
30 #define MODULENAME "r8152"
32 #define R8152_PHY_ID 32
34 #define PLA_IDR 0xc000
35 #define PLA_RCR 0xc010
36 #define PLA_RMS 0xc016
37 #define PLA_RXFIFO_CTRL0 0xc0a0
38 #define PLA_RXFIFO_CTRL1 0xc0a4
39 #define PLA_RXFIFO_CTRL2 0xc0a8
40 #define PLA_FMC 0xc0b4
41 #define PLA_CFG_WOL 0xc0b6
42 #define PLA_TEREDO_CFG 0xc0bc
43 #define PLA_MAR 0xcd00
44 #define PLA_BACKUP 0xd000
45 #define PAL_BDC_CR 0xd1a0
46 #define PLA_TEREDO_TIMER 0xd2cc
47 #define PLA_REALWOW_TIMER 0xd2e8
48 #define PLA_LEDSEL 0xdd90
49 #define PLA_LED_FEATURE 0xdd92
50 #define PLA_PHYAR 0xde00
51 #define PLA_BOOT_CTRL 0xe004
52 #define PLA_GPHY_INTR_IMR 0xe022
53 #define PLA_EEE_CR 0xe040
54 #define PLA_EEEP_CR 0xe080
55 #define PLA_MAC_PWR_CTRL 0xe0c0
56 #define PLA_MAC_PWR_CTRL2 0xe0ca
57 #define PLA_MAC_PWR_CTRL3 0xe0cc
58 #define PLA_MAC_PWR_CTRL4 0xe0ce
59 #define PLA_WDT6_CTRL 0xe428
60 #define PLA_TCR0 0xe610
61 #define PLA_TCR1 0xe612
62 #define PLA_MTPS 0xe615
63 #define PLA_TXFIFO_CTRL 0xe618
64 #define PLA_RSTTALLY 0xe800
66 #define PLA_CRWECR 0xe81c
67 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
68 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
69 #define PLA_CONFIG5 0xe822
70 #define PLA_PHY_PWR 0xe84c
71 #define PLA_OOB_CTRL 0xe84f
72 #define PLA_CPCR 0xe854
73 #define PLA_MISC_0 0xe858
74 #define PLA_MISC_1 0xe85a
75 #define PLA_OCP_GPHY_BASE 0xe86c
76 #define PLA_TALLYCNT 0xe890
77 #define PLA_SFF_STS_7 0xe8de
78 #define PLA_PHYSTATUS 0xe908
79 #define PLA_BP_BA 0xfc26
80 #define PLA_BP_0 0xfc28
81 #define PLA_BP_1 0xfc2a
82 #define PLA_BP_2 0xfc2c
83 #define PLA_BP_3 0xfc2e
84 #define PLA_BP_4 0xfc30
85 #define PLA_BP_5 0xfc32
86 #define PLA_BP_6 0xfc34
87 #define PLA_BP_7 0xfc36
88 #define PLA_BP_EN 0xfc38
90 #define USB_U2P3_CTRL 0xb460
91 #define USB_DEV_STAT 0xb808
92 #define USB_USB_CTRL 0xd406
93 #define USB_PHY_CTRL 0xd408
94 #define USB_TX_AGG 0xd40a
95 #define USB_RX_BUF_TH 0xd40c
96 #define USB_USB_TIMER 0xd428
97 #define USB_RX_EARLY_AGG 0xd42c
98 #define USB_PM_CTRL_STATUS 0xd432
99 #define USB_TX_DMA 0xd434
100 #define USB_TOLERANCE 0xd490
101 #define USB_LPM_CTRL 0xd41a
102 #define USB_UPS_CTRL 0xd800
103 #define USB_MISC_0 0xd81a
104 #define USB_POWER_CUT 0xd80a
105 #define USB_AFE_CTRL2 0xd824
106 #define USB_WDT11_CTRL 0xe43c
107 #define USB_BP_BA 0xfc26
108 #define USB_BP_0 0xfc28
109 #define USB_BP_1 0xfc2a
110 #define USB_BP_2 0xfc2c
111 #define USB_BP_3 0xfc2e
112 #define USB_BP_4 0xfc30
113 #define USB_BP_5 0xfc32
114 #define USB_BP_6 0xfc34
115 #define USB_BP_7 0xfc36
116 #define USB_BP_EN 0xfc38
119 #define OCP_ALDPS_CONFIG 0x2010
120 #define OCP_EEE_CONFIG1 0x2080
121 #define OCP_EEE_CONFIG2 0x2092
122 #define OCP_EEE_CONFIG3 0x2094
123 #define OCP_BASE_MII 0xa400
124 #define OCP_EEE_AR 0xa41a
125 #define OCP_EEE_DATA 0xa41c
126 #define OCP_PHY_STATUS 0xa420
127 #define OCP_POWER_CFG 0xa430
128 #define OCP_EEE_CFG 0xa432
129 #define OCP_SRAM_ADDR 0xa436
130 #define OCP_SRAM_DATA 0xa438
131 #define OCP_DOWN_SPEED 0xa442
132 #define OCP_EEE_CFG2 0xa5d0
133 #define OCP_ADC_CFG 0xbc06
136 #define SRAM_LPF_CFG 0x8012
137 #define SRAM_10M_AMP1 0x8080
138 #define SRAM_10M_AMP2 0x8082
139 #define SRAM_IMPEDANCE 0x8084
142 #define RCR_AAP 0x00000001
143 #define RCR_APM 0x00000002
144 #define RCR_AM 0x00000004
145 #define RCR_AB 0x00000008
146 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
148 /* PLA_RXFIFO_CTRL0 */
149 #define RXFIFO_THR1_NORMAL 0x00080002
150 #define RXFIFO_THR1_OOB 0x01800003
152 /* PLA_RXFIFO_CTRL1 */
153 #define RXFIFO_THR2_FULL 0x00000060
154 #define RXFIFO_THR2_HIGH 0x00000038
155 #define RXFIFO_THR2_OOB 0x0000004a
156 #define RXFIFO_THR2_NORMAL 0x00a0
158 /* PLA_RXFIFO_CTRL2 */
159 #define RXFIFO_THR3_FULL 0x00000078
160 #define RXFIFO_THR3_HIGH 0x00000048
161 #define RXFIFO_THR3_OOB 0x0000005a
162 #define RXFIFO_THR3_NORMAL 0x0110
164 /* PLA_TXFIFO_CTRL */
165 #define TXFIFO_THR_NORMAL 0x00400008
166 #define TXFIFO_THR_NORMAL2 0x01000008
169 #define FMC_FCR_MCU_EN 0x0001
172 #define EEEP_CR_EEEP_TX 0x0002
175 #define WDT6_SET_MODE 0x0010
178 #define TCR0_TX_EMPTY 0x0800
179 #define TCR0_AUTO_FIFO 0x0080
182 #define VERSION_MASK 0x7cf0
185 #define MTPS_JUMBO (12 * 1024 / 64)
186 #define MTPS_DEFAULT (6 * 1024 / 64)
189 #define TALLY_RESET 0x0001
197 #define CRWECR_NORAML 0x00
198 #define CRWECR_CONFIG 0xc0
201 #define NOW_IS_OOB 0x80
202 #define TXFIFO_EMPTY 0x20
203 #define RXFIFO_EMPTY 0x10
204 #define LINK_LIST_READY 0x02
205 #define DIS_MCU_CLROOB 0x01
206 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
209 #define RXDY_GATED_EN 0x0008
212 #define RE_INIT_LL 0x8000
213 #define MCU_BORW_EN 0x4000
216 #define CPCR_RX_VLAN 0x0040
219 #define MAGIC_EN 0x0001
222 #define TEREDO_SEL 0x8000
223 #define TEREDO_WAKE_MASK 0x7f00
224 #define TEREDO_RS_EVENT_MASK 0x00fe
225 #define OOB_TEREDO_EN 0x0001
228 #define ALDPS_PROXY_MODE 0x0001
231 #define LINK_ON_WAKE_EN 0x0010
232 #define LINK_OFF_WAKE_EN 0x0008
235 #define BWF_EN 0x0040
236 #define MWF_EN 0x0020
237 #define UWF_EN 0x0010
238 #define LAN_WAKE_EN 0x0002
240 /* PLA_LED_FEATURE */
241 #define LED_MODE_MASK 0x0700
244 #define TX_10M_IDLE_EN 0x0080
245 #define PFM_PWM_SWITCH 0x0040
247 /* PLA_MAC_PWR_CTRL */
248 #define D3_CLK_GATED_EN 0x00004000
249 #define MCU_CLK_RATIO 0x07010f07
250 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
251 #define ALDPS_SPDWN_RATIO 0x0f87
253 /* PLA_MAC_PWR_CTRL2 */
254 #define EEE_SPDWN_RATIO 0x8007
256 /* PLA_MAC_PWR_CTRL3 */
257 #define PKT_AVAIL_SPDWN_EN 0x0100
258 #define SUSPEND_SPDWN_EN 0x0004
259 #define U1U2_SPDWN_EN 0x0002
260 #define L1_SPDWN_EN 0x0001
262 /* PLA_MAC_PWR_CTRL4 */
263 #define PWRSAVE_SPDWN_EN 0x1000
264 #define RXDV_SPDWN_EN 0x0800
265 #define TX10MIDLE_EN 0x0100
266 #define TP100_SPDWN_EN 0x0020
267 #define TP500_SPDWN_EN 0x0010
268 #define TP1000_SPDWN_EN 0x0008
269 #define EEE_SPDWN_EN 0x0001
271 /* PLA_GPHY_INTR_IMR */
272 #define GPHY_STS_MSK 0x0001
273 #define SPEED_DOWN_MSK 0x0002
274 #define SPDWN_RXDV_MSK 0x0004
275 #define SPDWN_LINKCHG_MSK 0x0008
278 #define PHYAR_FLAG 0x80000000
281 #define EEE_RX_EN 0x0001
282 #define EEE_TX_EN 0x0002
285 #define AUTOLOAD_DONE 0x0002
288 #define STAT_SPEED_MASK 0x0006
289 #define STAT_SPEED_HIGH 0x0000
290 #define STAT_SPEED_FULL 0x0002
293 #define TX_AGG_MAX_THRESHOLD 0x03
296 #define RX_THR_SUPPER 0x0c350180
297 #define RX_THR_HIGH 0x7a120180
298 #define RX_THR_SLOW 0xffff0180
301 #define TEST_MODE_DISABLE 0x00000001
302 #define TX_SIZE_ADJUST1 0x00000100
305 #define POWER_CUT 0x0100
307 /* USB_PM_CTRL_STATUS */
308 #define RESUME_INDICATE 0x0001
311 #define RX_AGG_DISABLE 0x0010
314 #define U2P3_ENABLE 0x0001
317 #define PWR_EN 0x0001
318 #define PHASE2_EN 0x0008
321 #define PCUT_STATUS 0x0001
323 /* USB_RX_EARLY_AGG */
324 #define EARLY_AGG_SUPPER 0x0e832981
325 #define EARLY_AGG_HIGH 0x0e837a12
326 #define EARLY_AGG_SLOW 0x0e83ffff
329 #define TIMER11_EN 0x0001
332 #define LPM_TIMER_MASK 0x0c
333 #define LPM_TIMER_500MS 0x04 /* 500 ms */
334 #define LPM_TIMER_500US 0x0c /* 500 us */
337 #define SEN_VAL_MASK 0xf800
338 #define SEN_VAL_NORMAL 0xa000
339 #define SEL_RXIDLE 0x0100
341 /* OCP_ALDPS_CONFIG */
342 #define ENPWRSAVE 0x8000
343 #define ENPDNPS 0x0200
344 #define LINKENA 0x0100
345 #define DIS_SDSAVE 0x0010
348 #define PHY_STAT_MASK 0x0007
349 #define PHY_STAT_LAN_ON 3
350 #define PHY_STAT_PWRDN 5
353 #define EEE_CLKDIV_EN 0x8000
354 #define EN_ALDPS 0x0004
355 #define EN_10M_PLLOFF 0x0001
357 /* OCP_EEE_CONFIG1 */
358 #define RG_TXLPI_MSK_HFDUP 0x8000
359 #define RG_MATCLR_EN 0x4000
360 #define EEE_10_CAP 0x2000
361 #define EEE_NWAY_EN 0x1000
362 #define TX_QUIET_EN 0x0200
363 #define RX_QUIET_EN 0x0100
364 #define SDRISETIME 0x0010 /* bit 4 ~ 6 */
365 #define RG_RXLPI_MSK_HFDUP 0x0008
366 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
368 /* OCP_EEE_CONFIG2 */
369 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
370 #define RG_DACQUIET_EN 0x0400
371 #define RG_LDVQUIET_EN 0x0200
372 #define RG_CKRSEL 0x0020
373 #define RG_EEEPRG_EN 0x0010
375 /* OCP_EEE_CONFIG3 */
376 #define FST_SNR_EYE_R 0x1500 /* bit 7 ~ 15 */
377 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
378 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
381 /* bit[15:14] function */
382 #define FUN_ADDR 0x0000
383 #define FUN_DATA 0x4000
384 /* bit[4:0] device addr */
385 #define DEVICE_ADDR 0x0007
388 #define EEE_ADDR 0x003C
389 #define EEE_DATA 0x0002
392 #define CTAP_SHORT_EN 0x0040
393 #define EEE10_EN 0x0010
396 #define EN_10M_BGOFF 0x0080
399 #define MY1000_EEE 0x0004
400 #define MY100_EEE 0x0002
403 #define CKADSEL_L 0x0100
404 #define ADC_EN 0x0080
405 #define EN_EMI_L 0x0040
408 #define LPF_AUTO_TUNE 0x8000
411 #define GDAC_IB_UPALL 0x0008
414 #define AMP_DN 0x0200
417 #define RX_DRIVING_MASK 0x6000
419 enum rtl_register_content {
427 #define RTL8152_MAX_TX 4
428 #define RTL8152_MAX_RX 10
434 #define INTR_LINK 0x0004
436 #define RTL8152_REQT_READ 0xc0
437 #define RTL8152_REQT_WRITE 0x40
438 #define RTL8152_REQ_GET_REGS 0x05
439 #define RTL8152_REQ_SET_REGS 0x05
441 #define BYTE_EN_DWORD 0xff
442 #define BYTE_EN_WORD 0x33
443 #define BYTE_EN_BYTE 0x11
444 #define BYTE_EN_SIX_BYTES 0x3f
445 #define BYTE_EN_START_MASK 0x0f
446 #define BYTE_EN_END_MASK 0xf0
448 #define RTL8153_MAX_PACKET 9216 /* 9K */
449 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
450 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
451 #define RTL8153_RMS RTL8153_MAX_PACKET
452 #define RTL8152_TX_TIMEOUT (5 * HZ)
465 /* Define these values to match your device */
466 #define VENDOR_ID_REALTEK 0x0bda
467 #define PRODUCT_ID_RTL8152 0x8152
468 #define PRODUCT_ID_RTL8153 0x8153
470 #define VENDOR_ID_SAMSUNG 0x04e8
471 #define PRODUCT_ID_SAMSUNG 0xa101
473 #define MCU_TYPE_PLA 0x0100
474 #define MCU_TYPE_USB 0x0000
476 #define REALTEK_USB_DEVICE(vend, prod) \
477 USB_DEVICE_INTERFACE_CLASS(vend, prod, USB_CLASS_VENDOR_SPEC)
479 struct tally_counter {
486 __le32 tx_one_collision;
487 __le32 tx_multi_collision;
497 #define RX_LEN_MASK 0x7fff
500 #define RD_UDP_CS (1 << 23)
501 #define RD_TCP_CS (1 << 22)
502 #define RD_IPV6_CS (1 << 20)
503 #define RD_IPV4_CS (1 << 19)
506 #define IPF (1 << 23) /* IP checksum fail */
507 #define UDPF (1 << 22) /* UDP checksum fail */
508 #define TCPF (1 << 21) /* TCP checksum fail */
517 #define TX_FS (1 << 31) /* First segment of a packet */
518 #define TX_LS (1 << 30) /* Final segment of a packet */
519 #define GTSENDV4 (1 << 28)
520 #define GTSENDV6 (1 << 27)
521 #define GTTCPHO_SHIFT 18
522 #define GTTCPHO_MAX 0x7fU
523 #define TX_LEN_MAX 0x3ffffU
526 #define UDP_CS (1 << 31) /* Calculate UDP/IP checksum */
527 #define TCP_CS (1 << 30) /* Calculate TCP/IP checksum */
528 #define IPV4_CS (1 << 29) /* Calculate IPv4 checksum */
529 #define IPV6_CS (1 << 28) /* Calculate IPv6 checksum */
531 #define MSS_MAX 0x7ffU
532 #define TCPHO_SHIFT 17
533 #define TCPHO_MAX 0x7ffU
539 struct list_head list;
541 struct r8152 *context;
547 struct list_head list;
549 struct r8152 *context;
558 struct usb_device *udev;
559 struct tasklet_struct tl;
560 struct usb_interface *intf;
561 struct net_device *netdev;
562 struct urb *intr_urb;
563 struct tx_agg tx_info[RTL8152_MAX_TX];
564 struct rx_agg rx_info[RTL8152_MAX_RX];
565 struct list_head rx_done, tx_free;
566 struct sk_buff_head tx_queue;
567 spinlock_t rx_lock, tx_lock;
568 struct delayed_work schedule;
569 struct mii_if_info mii;
572 void (*init)(struct r8152 *);
573 int (*enable)(struct r8152 *);
574 void (*disable)(struct r8152 *);
575 void (*up)(struct r8152 *);
576 void (*down)(struct r8152 *);
577 void (*unload)(struct r8152 *);
606 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
607 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
609 static const int multicast_filter_limit = 32;
610 static unsigned int agg_buf_sz = 16384;
612 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
613 VLAN_ETH_HLEN - VLAN_HLEN)
616 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
621 tmp = kmalloc(size, GFP_KERNEL);
625 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
626 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
627 value, index, tmp, size, 500);
629 memcpy(data, tmp, size);
636 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
641 tmp = kmemdup(data, size, GFP_KERNEL);
645 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
646 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
647 value, index, tmp, size, 500);
654 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
655 void *data, u16 type)
660 if (test_bit(RTL8152_UNPLUG, &tp->flags))
663 /* both size and indix must be 4 bytes align */
664 if ((size & 3) || !size || (index & 3) || !data)
667 if ((u32)index + (u32)size > 0xffff)
672 ret = get_registers(tp, index, type, limit, data);
680 ret = get_registers(tp, index, type, size, data);
694 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
695 u16 size, void *data, u16 type)
698 u16 byteen_start, byteen_end, byen;
701 if (test_bit(RTL8152_UNPLUG, &tp->flags))
704 /* both size and indix must be 4 bytes align */
705 if ((size & 3) || !size || (index & 3) || !data)
708 if ((u32)index + (u32)size > 0xffff)
711 byteen_start = byteen & BYTE_EN_START_MASK;
712 byteen_end = byteen & BYTE_EN_END_MASK;
714 byen = byteen_start | (byteen_start << 4);
715 ret = set_registers(tp, index, type | byen, 4, data);
728 ret = set_registers(tp, index,
729 type | BYTE_EN_DWORD,
738 ret = set_registers(tp, index,
739 type | BYTE_EN_DWORD,
751 byen = byteen_end | (byteen_end >> 4);
752 ret = set_registers(tp, index, type | byen, 4, data);
762 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
764 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
768 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
770 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
774 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
776 return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
780 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
782 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
785 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
789 generic_ocp_read(tp, index, sizeof(data), &data, type);
791 return __le32_to_cpu(data);
794 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
796 __le32 tmp = __cpu_to_le32(data);
798 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
801 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
805 u8 shift = index & 2;
809 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
811 data = __le32_to_cpu(tmp);
812 data >>= (shift * 8);
818 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
822 u16 byen = BYTE_EN_WORD;
823 u8 shift = index & 2;
829 mask <<= (shift * 8);
830 data <<= (shift * 8);
834 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
836 data |= __le32_to_cpu(tmp) & ~mask;
837 tmp = __cpu_to_le32(data);
839 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
842 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
846 u8 shift = index & 3;
850 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
852 data = __le32_to_cpu(tmp);
853 data >>= (shift * 8);
859 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
863 u16 byen = BYTE_EN_BYTE;
864 u8 shift = index & 3;
870 mask <<= (shift * 8);
871 data <<= (shift * 8);
875 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
877 data |= __le32_to_cpu(tmp) & ~mask;
878 tmp = __cpu_to_le32(data);
880 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
883 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
885 u16 ocp_base, ocp_index;
887 ocp_base = addr & 0xf000;
888 if (ocp_base != tp->ocp_base) {
889 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
890 tp->ocp_base = ocp_base;
893 ocp_index = (addr & 0x0fff) | 0xb000;
894 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
897 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
899 u16 ocp_base, ocp_index;
901 ocp_base = addr & 0xf000;
902 if (ocp_base != tp->ocp_base) {
903 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
904 tp->ocp_base = ocp_base;
907 ocp_index = (addr & 0x0fff) | 0xb000;
908 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
911 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
913 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
916 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
918 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
921 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
923 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
924 ocp_reg_write(tp, OCP_SRAM_DATA, data);
927 static u16 sram_read(struct r8152 *tp, u16 addr)
929 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
930 return ocp_reg_read(tp, OCP_SRAM_DATA);
933 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
935 struct r8152 *tp = netdev_priv(netdev);
938 if (test_bit(RTL8152_UNPLUG, &tp->flags))
941 if (phy_id != R8152_PHY_ID)
944 ret = usb_autopm_get_interface(tp->intf);
948 ret = r8152_mdio_read(tp, reg);
950 usb_autopm_put_interface(tp->intf);
957 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
959 struct r8152 *tp = netdev_priv(netdev);
961 if (test_bit(RTL8152_UNPLUG, &tp->flags))
964 if (phy_id != R8152_PHY_ID)
967 if (usb_autopm_get_interface(tp->intf) < 0)
970 r8152_mdio_write(tp, reg, val);
972 usb_autopm_put_interface(tp->intf);
976 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
978 static inline void set_ethernet_addr(struct r8152 *tp)
980 struct net_device *dev = tp->netdev;
984 if (tp->version == RTL_VER_01)
985 ret = pla_ocp_read(tp, PLA_IDR, sizeof(node_id), node_id);
987 ret = pla_ocp_read(tp, PLA_BACKUP, sizeof(node_id), node_id);
990 netif_notice(tp, probe, dev, "inet addr fail\n");
992 if (tp->version != RTL_VER_01) {
993 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR,
995 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES,
996 sizeof(node_id), node_id);
997 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR,
1001 memcpy(dev->dev_addr, node_id, dev->addr_len);
1002 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
1006 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1008 struct r8152 *tp = netdev_priv(netdev);
1009 struct sockaddr *addr = p;
1011 if (!is_valid_ether_addr(addr->sa_data))
1012 return -EADDRNOTAVAIL;
1014 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1016 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1017 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1018 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1023 static void read_bulk_callback(struct urb *urb)
1025 struct net_device *netdev;
1026 int status = urb->status;
1039 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1042 if (!test_bit(WORK_ENABLE, &tp->flags))
1045 netdev = tp->netdev;
1047 /* When link down, the driver would cancel all bulks. */
1048 /* This avoid the re-submitting bulk */
1049 if (!netif_carrier_ok(netdev))
1052 usb_mark_last_busy(tp->udev);
1056 if (urb->actual_length < ETH_ZLEN)
1059 spin_lock(&tp->rx_lock);
1060 list_add_tail(&agg->list, &tp->rx_done);
1061 spin_unlock(&tp->rx_lock);
1062 tasklet_schedule(&tp->tl);
1065 set_bit(RTL8152_UNPLUG, &tp->flags);
1066 netif_device_detach(tp->netdev);
1069 return; /* the urb is in unlink state */
1071 if (net_ratelimit())
1072 netdev_warn(netdev, "maybe reset is needed?\n");
1075 if (net_ratelimit())
1076 netdev_warn(netdev, "Rx status %d\n", status);
1080 result = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1081 if (result == -ENODEV) {
1082 netif_device_detach(tp->netdev);
1083 } else if (result) {
1084 spin_lock(&tp->rx_lock);
1085 list_add_tail(&agg->list, &tp->rx_done);
1086 spin_unlock(&tp->rx_lock);
1087 tasklet_schedule(&tp->tl);
1091 static void write_bulk_callback(struct urb *urb)
1093 struct net_device_stats *stats;
1094 struct net_device *netdev;
1097 int status = urb->status;
1107 netdev = tp->netdev;
1108 stats = &netdev->stats;
1110 if (net_ratelimit())
1111 netdev_warn(netdev, "Tx status %d\n", status);
1112 stats->tx_errors += agg->skb_num;
1114 stats->tx_packets += agg->skb_num;
1115 stats->tx_bytes += agg->skb_len;
1118 spin_lock(&tp->tx_lock);
1119 list_add_tail(&agg->list, &tp->tx_free);
1120 spin_unlock(&tp->tx_lock);
1122 usb_autopm_put_interface_async(tp->intf);
1124 if (!netif_carrier_ok(netdev))
1127 if (!test_bit(WORK_ENABLE, &tp->flags))
1130 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1133 if (!skb_queue_empty(&tp->tx_queue))
1134 tasklet_schedule(&tp->tl);
1137 static void intr_callback(struct urb *urb)
1141 int status = urb->status;
1148 if (!test_bit(WORK_ENABLE, &tp->flags))
1151 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1155 case 0: /* success */
1157 case -ECONNRESET: /* unlink */
1159 netif_device_detach(tp->netdev);
1163 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1165 /* -EPIPE: should clear the halt */
1167 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1171 d = urb->transfer_buffer;
1172 if (INTR_LINK & __le16_to_cpu(d[0])) {
1173 if (!(tp->speed & LINK_STATUS)) {
1174 set_bit(RTL8152_LINK_CHG, &tp->flags);
1175 schedule_delayed_work(&tp->schedule, 0);
1178 if (tp->speed & LINK_STATUS) {
1179 set_bit(RTL8152_LINK_CHG, &tp->flags);
1180 schedule_delayed_work(&tp->schedule, 0);
1185 res = usb_submit_urb(urb, GFP_ATOMIC);
1187 netif_device_detach(tp->netdev);
1189 netif_err(tp, intr, tp->netdev,
1190 "can't resubmit intr, status %d\n", res);
1193 static inline void *rx_agg_align(void *data)
1195 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1198 static inline void *tx_agg_align(void *data)
1200 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1203 static void free_all_mem(struct r8152 *tp)
1207 for (i = 0; i < RTL8152_MAX_RX; i++) {
1208 usb_free_urb(tp->rx_info[i].urb);
1209 tp->rx_info[i].urb = NULL;
1211 kfree(tp->rx_info[i].buffer);
1212 tp->rx_info[i].buffer = NULL;
1213 tp->rx_info[i].head = NULL;
1216 for (i = 0; i < RTL8152_MAX_TX; i++) {
1217 usb_free_urb(tp->tx_info[i].urb);
1218 tp->tx_info[i].urb = NULL;
1220 kfree(tp->tx_info[i].buffer);
1221 tp->tx_info[i].buffer = NULL;
1222 tp->tx_info[i].head = NULL;
1225 usb_free_urb(tp->intr_urb);
1226 tp->intr_urb = NULL;
1228 kfree(tp->intr_buff);
1229 tp->intr_buff = NULL;
1232 static int alloc_all_mem(struct r8152 *tp)
1234 struct net_device *netdev = tp->netdev;
1235 struct usb_interface *intf = tp->intf;
1236 struct usb_host_interface *alt = intf->cur_altsetting;
1237 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1242 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1244 spin_lock_init(&tp->rx_lock);
1245 spin_lock_init(&tp->tx_lock);
1246 INIT_LIST_HEAD(&tp->rx_done);
1247 INIT_LIST_HEAD(&tp->tx_free);
1248 skb_queue_head_init(&tp->tx_queue);
1250 for (i = 0; i < RTL8152_MAX_RX; i++) {
1251 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1255 if (buf != rx_agg_align(buf)) {
1257 buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1263 urb = usb_alloc_urb(0, GFP_KERNEL);
1269 INIT_LIST_HEAD(&tp->rx_info[i].list);
1270 tp->rx_info[i].context = tp;
1271 tp->rx_info[i].urb = urb;
1272 tp->rx_info[i].buffer = buf;
1273 tp->rx_info[i].head = rx_agg_align(buf);
1276 for (i = 0; i < RTL8152_MAX_TX; i++) {
1277 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1281 if (buf != tx_agg_align(buf)) {
1283 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1289 urb = usb_alloc_urb(0, GFP_KERNEL);
1295 INIT_LIST_HEAD(&tp->tx_info[i].list);
1296 tp->tx_info[i].context = tp;
1297 tp->tx_info[i].urb = urb;
1298 tp->tx_info[i].buffer = buf;
1299 tp->tx_info[i].head = tx_agg_align(buf);
1301 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1304 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1308 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1312 tp->intr_interval = (int)ep_intr->desc.bInterval;
1313 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1314 tp->intr_buff, INTBUFSIZE, intr_callback,
1315 tp, tp->intr_interval);
1324 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1326 struct tx_agg *agg = NULL;
1327 unsigned long flags;
1329 if (list_empty(&tp->tx_free))
1332 spin_lock_irqsave(&tp->tx_lock, flags);
1333 if (!list_empty(&tp->tx_free)) {
1334 struct list_head *cursor;
1336 cursor = tp->tx_free.next;
1337 list_del_init(cursor);
1338 agg = list_entry(cursor, struct tx_agg, list);
1340 spin_unlock_irqrestore(&tp->tx_lock, flags);
1345 static inline __be16 get_protocol(struct sk_buff *skb)
1349 if (skb->protocol == htons(ETH_P_8021Q))
1350 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
1352 protocol = skb->protocol;
1357 /* r8152_csum_workaround()
1358 * The hw limites the value the transport offset. When the offset is out of the
1359 * range, calculate the checksum by sw.
1361 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1362 struct sk_buff_head *list)
1364 if (skb_shinfo(skb)->gso_size) {
1365 netdev_features_t features = tp->netdev->features;
1366 struct sk_buff_head seg_list;
1367 struct sk_buff *segs, *nskb;
1369 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1370 segs = skb_gso_segment(skb, features);
1371 if (IS_ERR(segs) || !segs)
1374 __skb_queue_head_init(&seg_list);
1380 __skb_queue_tail(&seg_list, nskb);
1383 skb_queue_splice(&seg_list, list);
1385 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1386 if (skb_checksum_help(skb) < 0)
1389 __skb_queue_head(list, skb);
1391 struct net_device_stats *stats;
1394 stats = &tp->netdev->stats;
1395 stats->tx_dropped++;
1400 /* msdn_giant_send_check()
1401 * According to the document of microsoft, the TCP Pseudo Header excludes the
1402 * packet length for IPv6 TCP large packets.
1404 static int msdn_giant_send_check(struct sk_buff *skb)
1406 const struct ipv6hdr *ipv6h;
1410 ret = skb_cow_head(skb, 0);
1414 ipv6h = ipv6_hdr(skb);
1418 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1423 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1424 struct sk_buff *skb, u32 len, u32 transport_offset)
1426 u32 mss = skb_shinfo(skb)->gso_size;
1427 u32 opts1, opts2 = 0;
1428 int ret = TX_CSUM_SUCCESS;
1430 WARN_ON_ONCE(len > TX_LEN_MAX);
1432 opts1 = len | TX_FS | TX_LS;
1435 if (transport_offset > GTTCPHO_MAX) {
1436 netif_warn(tp, tx_err, tp->netdev,
1437 "Invalid transport offset 0x%x for TSO\n",
1443 switch (get_protocol(skb)) {
1444 case htons(ETH_P_IP):
1448 case htons(ETH_P_IPV6):
1449 if (msdn_giant_send_check(skb)) {
1461 opts1 |= transport_offset << GTTCPHO_SHIFT;
1462 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1463 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1466 if (transport_offset > TCPHO_MAX) {
1467 netif_warn(tp, tx_err, tp->netdev,
1468 "Invalid transport offset 0x%x\n",
1474 switch (get_protocol(skb)) {
1475 case htons(ETH_P_IP):
1477 ip_protocol = ip_hdr(skb)->protocol;
1480 case htons(ETH_P_IPV6):
1482 ip_protocol = ipv6_hdr(skb)->nexthdr;
1486 ip_protocol = IPPROTO_RAW;
1490 if (ip_protocol == IPPROTO_TCP)
1492 else if (ip_protocol == IPPROTO_UDP)
1497 opts2 |= transport_offset << TCPHO_SHIFT;
1500 desc->opts2 = cpu_to_le32(opts2);
1501 desc->opts1 = cpu_to_le32(opts1);
1507 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1509 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1513 __skb_queue_head_init(&skb_head);
1514 spin_lock(&tx_queue->lock);
1515 skb_queue_splice_init(tx_queue, &skb_head);
1516 spin_unlock(&tx_queue->lock);
1518 tx_data = agg->head;
1521 remain = agg_buf_sz;
1523 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1524 struct tx_desc *tx_desc;
1525 struct sk_buff *skb;
1529 skb = __skb_dequeue(&skb_head);
1533 len = skb->len + sizeof(*tx_desc);
1536 __skb_queue_head(&skb_head, skb);
1540 tx_data = tx_agg_align(tx_data);
1541 tx_desc = (struct tx_desc *)tx_data;
1543 offset = (u32)skb_transport_offset(skb);
1545 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1546 r8152_csum_workaround(tp, skb, &skb_head);
1550 tx_data += sizeof(*tx_desc);
1553 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1554 struct net_device_stats *stats = &tp->netdev->stats;
1556 stats->tx_dropped++;
1557 dev_kfree_skb_any(skb);
1558 tx_data -= sizeof(*tx_desc);
1563 agg->skb_len += len;
1566 dev_kfree_skb_any(skb);
1568 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1571 if (!skb_queue_empty(&skb_head)) {
1572 spin_lock(&tx_queue->lock);
1573 skb_queue_splice(&skb_head, tx_queue);
1574 spin_unlock(&tx_queue->lock);
1577 netif_tx_lock(tp->netdev);
1579 if (netif_queue_stopped(tp->netdev) &&
1580 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1581 netif_wake_queue(tp->netdev);
1583 netif_tx_unlock(tp->netdev);
1585 ret = usb_autopm_get_interface_async(tp->intf);
1589 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1590 agg->head, (int)(tx_data - (u8 *)agg->head),
1591 (usb_complete_t)write_bulk_callback, agg);
1593 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1595 usb_autopm_put_interface_async(tp->intf);
1601 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1603 u8 checksum = CHECKSUM_NONE;
1606 if (tp->version == RTL_VER_01)
1609 opts2 = le32_to_cpu(rx_desc->opts2);
1610 opts3 = le32_to_cpu(rx_desc->opts3);
1612 if (opts2 & RD_IPV4_CS) {
1614 checksum = CHECKSUM_NONE;
1615 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1616 checksum = CHECKSUM_NONE;
1617 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1618 checksum = CHECKSUM_NONE;
1620 checksum = CHECKSUM_UNNECESSARY;
1621 } else if (RD_IPV6_CS) {
1622 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1623 checksum = CHECKSUM_UNNECESSARY;
1624 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1625 checksum = CHECKSUM_UNNECESSARY;
1632 static void rx_bottom(struct r8152 *tp)
1634 unsigned long flags;
1635 struct list_head *cursor, *next, rx_queue;
1637 if (list_empty(&tp->rx_done))
1640 INIT_LIST_HEAD(&rx_queue);
1641 spin_lock_irqsave(&tp->rx_lock, flags);
1642 list_splice_init(&tp->rx_done, &rx_queue);
1643 spin_unlock_irqrestore(&tp->rx_lock, flags);
1645 list_for_each_safe(cursor, next, &rx_queue) {
1646 struct rx_desc *rx_desc;
1653 list_del_init(cursor);
1655 agg = list_entry(cursor, struct rx_agg, list);
1657 if (urb->actual_length < ETH_ZLEN)
1660 rx_desc = agg->head;
1661 rx_data = agg->head;
1662 len_used += sizeof(struct rx_desc);
1664 while (urb->actual_length > len_used) {
1665 struct net_device *netdev = tp->netdev;
1666 struct net_device_stats *stats = &netdev->stats;
1667 unsigned int pkt_len;
1668 struct sk_buff *skb;
1670 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1671 if (pkt_len < ETH_ZLEN)
1674 len_used += pkt_len;
1675 if (urb->actual_length < len_used)
1678 pkt_len -= CRC_SIZE;
1679 rx_data += sizeof(struct rx_desc);
1681 skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1683 stats->rx_dropped++;
1687 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1688 memcpy(skb->data, rx_data, pkt_len);
1689 skb_put(skb, pkt_len);
1690 skb->protocol = eth_type_trans(skb, netdev);
1691 netif_receive_skb(skb);
1692 stats->rx_packets++;
1693 stats->rx_bytes += pkt_len;
1696 rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1697 rx_desc = (struct rx_desc *)rx_data;
1698 len_used = (int)(rx_data - (u8 *)agg->head);
1699 len_used += sizeof(struct rx_desc);
1703 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1704 if (ret && ret != -ENODEV) {
1705 spin_lock_irqsave(&tp->rx_lock, flags);
1706 list_add_tail(&agg->list, &tp->rx_done);
1707 spin_unlock_irqrestore(&tp->rx_lock, flags);
1708 tasklet_schedule(&tp->tl);
1713 static void tx_bottom(struct r8152 *tp)
1720 if (skb_queue_empty(&tp->tx_queue))
1723 agg = r8152_get_tx_agg(tp);
1727 res = r8152_tx_agg_fill(tp, agg);
1729 struct net_device *netdev = tp->netdev;
1731 if (res == -ENODEV) {
1732 netif_device_detach(netdev);
1734 struct net_device_stats *stats = &netdev->stats;
1735 unsigned long flags;
1737 netif_warn(tp, tx_err, netdev,
1738 "failed tx_urb %d\n", res);
1739 stats->tx_dropped += agg->skb_num;
1741 spin_lock_irqsave(&tp->tx_lock, flags);
1742 list_add_tail(&agg->list, &tp->tx_free);
1743 spin_unlock_irqrestore(&tp->tx_lock, flags);
1749 static void bottom_half(unsigned long data)
1753 tp = (struct r8152 *)data;
1755 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1758 if (!test_bit(WORK_ENABLE, &tp->flags))
1761 /* When link down, the driver would cancel all bulks. */
1762 /* This avoid the re-submitting bulk */
1763 if (!netif_carrier_ok(tp->netdev))
1771 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1773 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1774 agg->head, agg_buf_sz,
1775 (usb_complete_t)read_bulk_callback, agg);
1777 return usb_submit_urb(agg->urb, mem_flags);
1780 static void rtl_drop_queued_tx(struct r8152 *tp)
1782 struct net_device_stats *stats = &tp->netdev->stats;
1783 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1784 struct sk_buff *skb;
1786 if (skb_queue_empty(tx_queue))
1789 __skb_queue_head_init(&skb_head);
1790 spin_lock_bh(&tx_queue->lock);
1791 skb_queue_splice_init(tx_queue, &skb_head);
1792 spin_unlock_bh(&tx_queue->lock);
1794 while ((skb = __skb_dequeue(&skb_head))) {
1796 stats->tx_dropped++;
1800 static void rtl8152_tx_timeout(struct net_device *netdev)
1802 struct r8152 *tp = netdev_priv(netdev);
1805 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1806 for (i = 0; i < RTL8152_MAX_TX; i++)
1807 usb_unlink_urb(tp->tx_info[i].urb);
1810 static void rtl8152_set_rx_mode(struct net_device *netdev)
1812 struct r8152 *tp = netdev_priv(netdev);
1814 if (tp->speed & LINK_STATUS) {
1815 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1816 schedule_delayed_work(&tp->schedule, 0);
1820 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1822 struct r8152 *tp = netdev_priv(netdev);
1823 u32 mc_filter[2]; /* Multicast hash filter */
1827 clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
1828 netif_stop_queue(netdev);
1829 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1830 ocp_data &= ~RCR_ACPT_ALL;
1831 ocp_data |= RCR_AB | RCR_APM;
1833 if (netdev->flags & IFF_PROMISC) {
1834 /* Unconditionally log net taps. */
1835 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1836 ocp_data |= RCR_AM | RCR_AAP;
1837 mc_filter[1] = 0xffffffff;
1838 mc_filter[0] = 0xffffffff;
1839 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1840 (netdev->flags & IFF_ALLMULTI)) {
1841 /* Too many to filter perfectly -- accept all multicasts. */
1843 mc_filter[1] = 0xffffffff;
1844 mc_filter[0] = 0xffffffff;
1846 struct netdev_hw_addr *ha;
1850 netdev_for_each_mc_addr(ha, netdev) {
1851 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1853 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1858 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1859 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1861 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1862 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1863 netif_wake_queue(netdev);
1866 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
1867 struct net_device *netdev)
1869 struct r8152 *tp = netdev_priv(netdev);
1871 skb_tx_timestamp(skb);
1873 skb_queue_tail(&tp->tx_queue, skb);
1875 if (!list_empty(&tp->tx_free)) {
1876 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
1877 set_bit(SCHEDULE_TASKLET, &tp->flags);
1878 schedule_delayed_work(&tp->schedule, 0);
1880 usb_mark_last_busy(tp->udev);
1881 tasklet_schedule(&tp->tl);
1883 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
1884 netif_stop_queue(netdev);
1887 return NETDEV_TX_OK;
1890 static void r8152b_reset_packet_filter(struct r8152 *tp)
1894 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
1895 ocp_data &= ~FMC_FCR_MCU_EN;
1896 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1897 ocp_data |= FMC_FCR_MCU_EN;
1898 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1901 static void rtl8152_nic_reset(struct r8152 *tp)
1905 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
1907 for (i = 0; i < 1000; i++) {
1908 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
1910 usleep_range(100, 400);
1914 static void set_tx_qlen(struct r8152 *tp)
1916 struct net_device *netdev = tp->netdev;
1918 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
1919 sizeof(struct tx_desc));
1922 static inline u8 rtl8152_get_speed(struct r8152 *tp)
1924 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
1927 static void rtl_set_eee_plus(struct r8152 *tp)
1932 speed = rtl8152_get_speed(tp);
1933 if (speed & _10bps) {
1934 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1935 ocp_data |= EEEP_CR_EEEP_TX;
1936 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1938 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1939 ocp_data &= ~EEEP_CR_EEEP_TX;
1940 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1944 static void rxdy_gated_en(struct r8152 *tp, bool enable)
1948 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1950 ocp_data |= RXDY_GATED_EN;
1952 ocp_data &= ~RXDY_GATED_EN;
1953 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1956 static int rtl_enable(struct r8152 *tp)
1961 r8152b_reset_packet_filter(tp);
1963 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
1964 ocp_data |= CR_RE | CR_TE;
1965 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
1967 rxdy_gated_en(tp, false);
1969 INIT_LIST_HEAD(&tp->rx_done);
1971 for (i = 0; i < RTL8152_MAX_RX; i++) {
1972 INIT_LIST_HEAD(&tp->rx_info[i].list);
1973 ret |= r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
1979 static int rtl8152_enable(struct r8152 *tp)
1981 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1985 rtl_set_eee_plus(tp);
1987 return rtl_enable(tp);
1990 static void r8153_set_rx_agg(struct r8152 *tp)
1994 speed = rtl8152_get_speed(tp);
1995 if (speed & _1000bps) {
1996 if (tp->udev->speed == USB_SPEED_SUPER) {
1997 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
1999 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2002 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
2004 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2008 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_SLOW);
2009 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2014 static int rtl8153_enable(struct r8152 *tp)
2016 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2020 rtl_set_eee_plus(tp);
2021 r8153_set_rx_agg(tp);
2023 return rtl_enable(tp);
2026 static void rtl8152_disable(struct r8152 *tp)
2031 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2032 rtl_drop_queued_tx(tp);
2036 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2037 ocp_data &= ~RCR_ACPT_ALL;
2038 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2040 rtl_drop_queued_tx(tp);
2042 for (i = 0; i < RTL8152_MAX_TX; i++)
2043 usb_kill_urb(tp->tx_info[i].urb);
2045 rxdy_gated_en(tp, true);
2047 for (i = 0; i < 1000; i++) {
2048 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2049 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2054 for (i = 0; i < 1000; i++) {
2055 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2060 for (i = 0; i < RTL8152_MAX_RX; i++)
2061 usb_kill_urb(tp->rx_info[i].urb);
2063 rtl8152_nic_reset(tp);
2066 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2070 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2072 ocp_data |= POWER_CUT;
2074 ocp_data &= ~POWER_CUT;
2075 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2077 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2078 ocp_data &= ~RESUME_INDICATE;
2079 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2082 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2084 static u32 __rtl_get_wol(struct r8152 *tp)
2089 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2090 if (!(ocp_data & LAN_WAKE_EN))
2093 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2094 if (ocp_data & LINK_ON_WAKE_EN)
2095 wolopts |= WAKE_PHY;
2097 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2098 if (ocp_data & UWF_EN)
2099 wolopts |= WAKE_UCAST;
2100 if (ocp_data & BWF_EN)
2101 wolopts |= WAKE_BCAST;
2102 if (ocp_data & MWF_EN)
2103 wolopts |= WAKE_MCAST;
2105 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2106 if (ocp_data & MAGIC_EN)
2107 wolopts |= WAKE_MAGIC;
2112 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2116 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2118 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2119 ocp_data &= ~LINK_ON_WAKE_EN;
2120 if (wolopts & WAKE_PHY)
2121 ocp_data |= LINK_ON_WAKE_EN;
2122 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2124 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2125 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2126 if (wolopts & WAKE_UCAST)
2128 if (wolopts & WAKE_BCAST)
2130 if (wolopts & WAKE_MCAST)
2132 if (wolopts & WAKE_ANY)
2133 ocp_data |= LAN_WAKE_EN;
2134 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2136 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2138 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2139 ocp_data &= ~MAGIC_EN;
2140 if (wolopts & WAKE_MAGIC)
2141 ocp_data |= MAGIC_EN;
2142 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2144 if (wolopts & WAKE_ANY)
2145 device_set_wakeup_enable(&tp->udev->dev, true);
2147 device_set_wakeup_enable(&tp->udev->dev, false);
2150 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2155 __rtl_set_wol(tp, WAKE_ANY);
2157 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2159 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2160 ocp_data |= LINK_OFF_WAKE_EN;
2161 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2163 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2165 __rtl_set_wol(tp, tp->saved_wolopts);
2169 static void rtl_phy_reset(struct r8152 *tp)
2174 clear_bit(PHY_RESET, &tp->flags);
2176 data = r8152_mdio_read(tp, MII_BMCR);
2178 /* don't reset again before the previous one complete */
2179 if (data & BMCR_RESET)
2183 r8152_mdio_write(tp, MII_BMCR, data);
2185 for (i = 0; i < 50; i++) {
2187 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2192 static void rtl_clear_bp(struct r8152 *tp)
2194 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_0, 0);
2195 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_2, 0);
2196 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_4, 0);
2197 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_6, 0);
2198 ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_0, 0);
2199 ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_2, 0);
2200 ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_4, 0);
2201 ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_6, 0);
2203 ocp_write_word(tp, MCU_TYPE_PLA, PLA_BP_BA, 0);
2204 ocp_write_word(tp, MCU_TYPE_USB, USB_BP_BA, 0);
2207 static void r8153_clear_bp(struct r8152 *tp)
2209 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_BP_EN, 0);
2210 ocp_write_byte(tp, MCU_TYPE_USB, USB_BP_EN, 0);
2214 static void r8153_teredo_off(struct r8152 *tp)
2218 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2219 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2220 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2222 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2223 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2224 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2227 static void r8152b_disable_aldps(struct r8152 *tp)
2229 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
2233 static inline void r8152b_enable_aldps(struct r8152 *tp)
2235 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2236 LINKENA | DIS_SDSAVE);
2239 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2243 data = r8152_mdio_read(tp, MII_BMCR);
2244 if (data & BMCR_PDOWN) {
2245 data &= ~BMCR_PDOWN;
2246 r8152_mdio_write(tp, MII_BMCR, data);
2249 r8152b_disable_aldps(tp);
2253 r8152b_enable_aldps(tp);
2254 set_bit(PHY_RESET, &tp->flags);
2257 static void r8152b_exit_oob(struct r8152 *tp)
2262 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2265 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2266 ocp_data &= ~RCR_ACPT_ALL;
2267 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2269 rxdy_gated_en(tp, true);
2270 r8153_teredo_off(tp);
2271 r8152b_hw_phy_cfg(tp);
2273 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2274 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2276 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2277 ocp_data &= ~NOW_IS_OOB;
2278 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2280 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2281 ocp_data &= ~MCU_BORW_EN;
2282 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2284 for (i = 0; i < 1000; i++) {
2285 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2286 if (ocp_data & LINK_LIST_READY)
2291 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2292 ocp_data |= RE_INIT_LL;
2293 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2295 for (i = 0; i < 1000; i++) {
2296 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2297 if (ocp_data & LINK_LIST_READY)
2302 rtl8152_nic_reset(tp);
2304 /* rx share fifo credit full threshold */
2305 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2307 if (tp->udev->speed == USB_SPEED_FULL ||
2308 tp->udev->speed == USB_SPEED_LOW) {
2309 /* rx share fifo credit near full threshold */
2310 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2312 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2315 /* rx share fifo credit near full threshold */
2316 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2318 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2322 /* TX share fifo free credit full threshold */
2323 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2325 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2326 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2327 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2328 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2330 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2331 ocp_data &= ~CPCR_RX_VLAN;
2332 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2334 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2336 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2337 ocp_data |= TCR0_AUTO_FIFO;
2338 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2341 static void r8152b_enter_oob(struct r8152 *tp)
2346 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2347 ocp_data &= ~NOW_IS_OOB;
2348 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2350 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2351 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2352 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2354 rtl8152_disable(tp);
2356 for (i = 0; i < 1000; i++) {
2357 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2358 if (ocp_data & LINK_LIST_READY)
2363 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2364 ocp_data |= RE_INIT_LL;
2365 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2367 for (i = 0; i < 1000; i++) {
2368 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2369 if (ocp_data & LINK_LIST_READY)
2374 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2376 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2377 ocp_data |= CPCR_RX_VLAN;
2378 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2380 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2381 ocp_data |= ALDPS_PROXY_MODE;
2382 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2384 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2385 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2386 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2388 rxdy_gated_en(tp, false);
2390 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2391 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2392 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2395 static void r8153_hw_phy_cfg(struct r8152 *tp)
2400 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2401 data = r8152_mdio_read(tp, MII_BMCR);
2402 if (data & BMCR_PDOWN) {
2403 data &= ~BMCR_PDOWN;
2404 r8152_mdio_write(tp, MII_BMCR, data);
2409 if (tp->version == RTL_VER_03) {
2410 data = ocp_reg_read(tp, OCP_EEE_CFG);
2411 data &= ~CTAP_SHORT_EN;
2412 ocp_reg_write(tp, OCP_EEE_CFG, data);
2415 data = ocp_reg_read(tp, OCP_POWER_CFG);
2416 data |= EEE_CLKDIV_EN;
2417 ocp_reg_write(tp, OCP_POWER_CFG, data);
2419 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2420 data |= EN_10M_BGOFF;
2421 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2422 data = ocp_reg_read(tp, OCP_POWER_CFG);
2423 data |= EN_10M_PLLOFF;
2424 ocp_reg_write(tp, OCP_POWER_CFG, data);
2425 data = sram_read(tp, SRAM_IMPEDANCE);
2426 data &= ~RX_DRIVING_MASK;
2427 sram_write(tp, SRAM_IMPEDANCE, data);
2429 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2430 ocp_data |= PFM_PWM_SWITCH;
2431 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2433 data = sram_read(tp, SRAM_LPF_CFG);
2434 data |= LPF_AUTO_TUNE;
2435 sram_write(tp, SRAM_LPF_CFG, data);
2437 data = sram_read(tp, SRAM_10M_AMP1);
2438 data |= GDAC_IB_UPALL;
2439 sram_write(tp, SRAM_10M_AMP1, data);
2440 data = sram_read(tp, SRAM_10M_AMP2);
2442 sram_write(tp, SRAM_10M_AMP2, data);
2444 set_bit(PHY_RESET, &tp->flags);
2447 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2452 memset(u1u2, 0xff, sizeof(u1u2));
2454 memset(u1u2, 0x00, sizeof(u1u2));
2456 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2459 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2463 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2465 ocp_data |= U2P3_ENABLE;
2467 ocp_data &= ~U2P3_ENABLE;
2468 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2471 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2475 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2477 ocp_data |= PWR_EN | PHASE2_EN;
2479 ocp_data &= ~(PWR_EN | PHASE2_EN);
2480 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2482 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2483 ocp_data &= ~PCUT_STATUS;
2484 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2487 static void r8153_first_init(struct r8152 *tp)
2492 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2495 rxdy_gated_en(tp, true);
2496 r8153_teredo_off(tp);
2498 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2499 ocp_data &= ~RCR_ACPT_ALL;
2500 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2502 r8153_hw_phy_cfg(tp);
2504 rtl8152_nic_reset(tp);
2506 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2507 ocp_data &= ~NOW_IS_OOB;
2508 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2510 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2511 ocp_data &= ~MCU_BORW_EN;
2512 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2514 for (i = 0; i < 1000; i++) {
2515 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2516 if (ocp_data & LINK_LIST_READY)
2521 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2522 ocp_data |= RE_INIT_LL;
2523 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2525 for (i = 0; i < 1000; i++) {
2526 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2527 if (ocp_data & LINK_LIST_READY)
2532 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2533 ocp_data &= ~CPCR_RX_VLAN;
2534 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2536 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2537 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2539 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2540 ocp_data |= TCR0_AUTO_FIFO;
2541 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2543 rtl8152_nic_reset(tp);
2545 /* rx share fifo credit full threshold */
2546 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2547 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2548 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2549 /* TX share fifo free credit full threshold */
2550 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2552 /* rx aggregation */
2553 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2554 ocp_data &= ~RX_AGG_DISABLE;
2555 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2558 static void r8153_enter_oob(struct r8152 *tp)
2563 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2564 ocp_data &= ~NOW_IS_OOB;
2565 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2567 rtl8152_disable(tp);
2569 for (i = 0; i < 1000; i++) {
2570 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2571 if (ocp_data & LINK_LIST_READY)
2576 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2577 ocp_data |= RE_INIT_LL;
2578 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2580 for (i = 0; i < 1000; i++) {
2581 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2582 if (ocp_data & LINK_LIST_READY)
2587 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2589 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2590 ocp_data &= ~TEREDO_WAKE_MASK;
2591 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2593 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2594 ocp_data |= CPCR_RX_VLAN;
2595 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2597 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2598 ocp_data |= ALDPS_PROXY_MODE;
2599 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2601 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2602 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2603 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2605 rxdy_gated_en(tp, false);
2607 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2608 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2609 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2612 static void r8153_disable_aldps(struct r8152 *tp)
2616 data = ocp_reg_read(tp, OCP_POWER_CFG);
2618 ocp_reg_write(tp, OCP_POWER_CFG, data);
2622 static void r8153_enable_aldps(struct r8152 *tp)
2626 data = ocp_reg_read(tp, OCP_POWER_CFG);
2628 ocp_reg_write(tp, OCP_POWER_CFG, data);
2631 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2633 u16 bmcr, anar, gbcr;
2636 cancel_delayed_work_sync(&tp->schedule);
2637 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2638 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2639 ADVERTISE_100HALF | ADVERTISE_100FULL);
2640 if (tp->mii.supports_gmii) {
2641 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2642 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2647 if (autoneg == AUTONEG_DISABLE) {
2648 if (speed == SPEED_10) {
2650 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2651 } else if (speed == SPEED_100) {
2652 bmcr = BMCR_SPEED100;
2653 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2654 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2655 bmcr = BMCR_SPEED1000;
2656 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2662 if (duplex == DUPLEX_FULL)
2663 bmcr |= BMCR_FULLDPLX;
2665 if (speed == SPEED_10) {
2666 if (duplex == DUPLEX_FULL)
2667 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2669 anar |= ADVERTISE_10HALF;
2670 } else if (speed == SPEED_100) {
2671 if (duplex == DUPLEX_FULL) {
2672 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2673 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2675 anar |= ADVERTISE_10HALF;
2676 anar |= ADVERTISE_100HALF;
2678 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2679 if (duplex == DUPLEX_FULL) {
2680 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2681 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2682 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2684 anar |= ADVERTISE_10HALF;
2685 anar |= ADVERTISE_100HALF;
2686 gbcr |= ADVERTISE_1000HALF;
2693 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2696 if (test_bit(PHY_RESET, &tp->flags))
2699 if (tp->mii.supports_gmii)
2700 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2702 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2703 r8152_mdio_write(tp, MII_BMCR, bmcr);
2705 if (test_bit(PHY_RESET, &tp->flags)) {
2708 clear_bit(PHY_RESET, &tp->flags);
2709 for (i = 0; i < 50; i++) {
2711 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2721 static void rtl8152_down(struct r8152 *tp)
2723 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2724 rtl_drop_queued_tx(tp);
2728 r8152_power_cut_en(tp, false);
2729 r8152b_disable_aldps(tp);
2730 r8152b_enter_oob(tp);
2731 r8152b_enable_aldps(tp);
2734 static void rtl8153_down(struct r8152 *tp)
2736 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2737 rtl_drop_queued_tx(tp);
2741 r8153_u1u2en(tp, false);
2742 r8153_power_cut_en(tp, false);
2743 r8153_disable_aldps(tp);
2744 r8153_enter_oob(tp);
2745 r8153_enable_aldps(tp);
2748 static void set_carrier(struct r8152 *tp)
2750 struct net_device *netdev = tp->netdev;
2753 clear_bit(RTL8152_LINK_CHG, &tp->flags);
2754 speed = rtl8152_get_speed(tp);
2756 if (speed & LINK_STATUS) {
2757 if (!(tp->speed & LINK_STATUS)) {
2758 tp->rtl_ops.enable(tp);
2759 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2760 netif_carrier_on(netdev);
2763 if (tp->speed & LINK_STATUS) {
2764 netif_carrier_off(netdev);
2765 tasklet_disable(&tp->tl);
2766 tp->rtl_ops.disable(tp);
2767 tasklet_enable(&tp->tl);
2773 static void rtl_work_func_t(struct work_struct *work)
2775 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
2777 if (usb_autopm_get_interface(tp->intf) < 0)
2780 if (!test_bit(WORK_ENABLE, &tp->flags))
2783 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2786 if (test_bit(RTL8152_LINK_CHG, &tp->flags))
2789 if (test_bit(RTL8152_SET_RX_MODE, &tp->flags))
2790 _rtl8152_set_rx_mode(tp->netdev);
2792 if (test_bit(SCHEDULE_TASKLET, &tp->flags) &&
2793 (tp->speed & LINK_STATUS)) {
2794 clear_bit(SCHEDULE_TASKLET, &tp->flags);
2795 tasklet_schedule(&tp->tl);
2798 if (test_bit(PHY_RESET, &tp->flags))
2802 usb_autopm_put_interface(tp->intf);
2805 static int rtl8152_open(struct net_device *netdev)
2807 struct r8152 *tp = netdev_priv(netdev);
2810 res = alloc_all_mem(tp);
2814 res = usb_autopm_get_interface(tp->intf);
2820 /* The WORK_ENABLE may be set when autoresume occurs */
2821 if (test_bit(WORK_ENABLE, &tp->flags)) {
2822 clear_bit(WORK_ENABLE, &tp->flags);
2823 usb_kill_urb(tp->intr_urb);
2824 cancel_delayed_work_sync(&tp->schedule);
2825 if (tp->speed & LINK_STATUS)
2826 tp->rtl_ops.disable(tp);
2831 rtl8152_set_speed(tp, AUTONEG_ENABLE,
2832 tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
2835 netif_carrier_off(netdev);
2836 netif_start_queue(netdev);
2837 set_bit(WORK_ENABLE, &tp->flags);
2839 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
2842 netif_device_detach(tp->netdev);
2843 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
2848 usb_autopm_put_interface(tp->intf);
2854 static int rtl8152_close(struct net_device *netdev)
2856 struct r8152 *tp = netdev_priv(netdev);
2859 clear_bit(WORK_ENABLE, &tp->flags);
2860 usb_kill_urb(tp->intr_urb);
2861 cancel_delayed_work_sync(&tp->schedule);
2862 netif_stop_queue(netdev);
2864 res = usb_autopm_get_interface(tp->intf);
2866 rtl_drop_queued_tx(tp);
2868 /* The autosuspend may have been enabled and wouldn't
2869 * be disable when autoresume occurs, because the
2870 * netif_running() would be false.
2872 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2873 rtl_runtime_suspend_enable(tp, false);
2874 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
2877 tasklet_disable(&tp->tl);
2878 tp->rtl_ops.down(tp);
2879 tasklet_enable(&tp->tl);
2880 usb_autopm_put_interface(tp->intf);
2888 static void r8152b_enable_eee(struct r8152 *tp)
2892 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2893 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2894 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2895 ocp_reg_write(tp, OCP_EEE_CONFIG1, RG_TXLPI_MSK_HFDUP | RG_MATCLR_EN |
2896 EEE_10_CAP | EEE_NWAY_EN |
2897 TX_QUIET_EN | RX_QUIET_EN |
2898 SDRISETIME | RG_RXLPI_MSK_HFDUP |
2900 ocp_reg_write(tp, OCP_EEE_CONFIG2, RG_LPIHYS_NUM | RG_DACQUIET_EN |
2901 RG_LDVQUIET_EN | RG_CKRSEL |
2903 ocp_reg_write(tp, OCP_EEE_CONFIG3, FST_SNR_EYE_R | RG_LFS_SEL | MSK_PH);
2904 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | DEVICE_ADDR);
2905 ocp_reg_write(tp, OCP_EEE_DATA, EEE_ADDR);
2906 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | DEVICE_ADDR);
2907 ocp_reg_write(tp, OCP_EEE_DATA, EEE_DATA);
2908 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2911 static void r8153_enable_eee(struct r8152 *tp)
2916 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2917 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2918 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2919 data = ocp_reg_read(tp, OCP_EEE_CFG);
2921 ocp_reg_write(tp, OCP_EEE_CFG, data);
2922 data = ocp_reg_read(tp, OCP_EEE_CFG2);
2923 data |= MY1000_EEE | MY100_EEE;
2924 ocp_reg_write(tp, OCP_EEE_CFG2, data);
2927 static void r8152b_enable_fc(struct r8152 *tp)
2931 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2932 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
2933 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2936 static void rtl_tally_reset(struct r8152 *tp)
2940 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
2941 ocp_data |= TALLY_RESET;
2942 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
2945 static void r8152b_init(struct r8152 *tp)
2949 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2952 if (tp->version == RTL_VER_01) {
2953 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
2954 ocp_data &= ~LED_MODE_MASK;
2955 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
2958 r8152_power_cut_en(tp, false);
2960 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2961 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
2962 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2963 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
2964 ocp_data &= ~MCU_CLK_RATIO_MASK;
2965 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
2966 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
2967 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
2968 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
2969 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
2971 r8152b_enable_eee(tp);
2972 r8152b_enable_aldps(tp);
2973 r8152b_enable_fc(tp);
2974 rtl_tally_reset(tp);
2976 /* enable rx aggregation */
2977 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2978 ocp_data &= ~RX_AGG_DISABLE;
2979 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2982 static void r8153_init(struct r8152 *tp)
2987 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2990 r8153_u1u2en(tp, false);
2992 for (i = 0; i < 500; i++) {
2993 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
2999 for (i = 0; i < 500; i++) {
3000 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3001 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3006 r8153_u2p3en(tp, false);
3008 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3009 ocp_data &= ~TIMER11_EN;
3010 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3012 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3013 ocp_data &= ~LED_MODE_MASK;
3014 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3016 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL);
3017 ocp_data &= ~LPM_TIMER_MASK;
3018 if (tp->udev->speed == USB_SPEED_SUPER)
3019 ocp_data |= LPM_TIMER_500US;
3021 ocp_data |= LPM_TIMER_500MS;
3022 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3024 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3025 ocp_data &= ~SEN_VAL_MASK;
3026 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3027 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3029 r8153_power_cut_en(tp, false);
3030 r8153_u1u2en(tp, true);
3032 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3033 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3034 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3035 PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3036 U1U2_SPDWN_EN | L1_SPDWN_EN);
3037 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3038 PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3039 TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3042 r8153_enable_eee(tp);
3043 r8153_enable_aldps(tp);
3044 r8152b_enable_fc(tp);
3045 rtl_tally_reset(tp);
3048 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3050 struct r8152 *tp = usb_get_intfdata(intf);
3052 if (PMSG_IS_AUTO(message))
3053 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3055 netif_device_detach(tp->netdev);
3057 if (netif_running(tp->netdev)) {
3058 clear_bit(WORK_ENABLE, &tp->flags);
3059 usb_kill_urb(tp->intr_urb);
3060 cancel_delayed_work_sync(&tp->schedule);
3061 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3062 rtl_runtime_suspend_enable(tp, true);
3064 tasklet_disable(&tp->tl);
3065 tp->rtl_ops.down(tp);
3066 tasklet_enable(&tp->tl);
3073 static int rtl8152_resume(struct usb_interface *intf)
3075 struct r8152 *tp = usb_get_intfdata(intf);
3077 if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3078 tp->rtl_ops.init(tp);
3079 netif_device_attach(tp->netdev);
3082 if (netif_running(tp->netdev)) {
3083 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3084 rtl_runtime_suspend_enable(tp, false);
3085 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3086 if (tp->speed & LINK_STATUS)
3087 tp->rtl_ops.disable(tp);
3090 rtl8152_set_speed(tp, AUTONEG_ENABLE,
3091 tp->mii.supports_gmii ?
3092 SPEED_1000 : SPEED_100,
3096 netif_carrier_off(tp->netdev);
3097 set_bit(WORK_ENABLE, &tp->flags);
3098 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3104 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3106 struct r8152 *tp = netdev_priv(dev);
3108 if (usb_autopm_get_interface(tp->intf) < 0)
3111 wol->supported = WAKE_ANY;
3112 wol->wolopts = __rtl_get_wol(tp);
3114 usb_autopm_put_interface(tp->intf);
3117 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3119 struct r8152 *tp = netdev_priv(dev);
3122 ret = usb_autopm_get_interface(tp->intf);
3126 __rtl_set_wol(tp, wol->wolopts);
3127 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3129 usb_autopm_put_interface(tp->intf);
3135 static u32 rtl8152_get_msglevel(struct net_device *dev)
3137 struct r8152 *tp = netdev_priv(dev);
3139 return tp->msg_enable;
3142 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3144 struct r8152 *tp = netdev_priv(dev);
3146 tp->msg_enable = value;
3149 static void rtl8152_get_drvinfo(struct net_device *netdev,
3150 struct ethtool_drvinfo *info)
3152 struct r8152 *tp = netdev_priv(netdev);
3154 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3155 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3156 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3160 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3162 struct r8152 *tp = netdev_priv(netdev);
3164 if (!tp->mii.mdio_read)
3167 return mii_ethtool_gset(&tp->mii, cmd);
3170 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3172 struct r8152 *tp = netdev_priv(dev);
3175 ret = usb_autopm_get_interface(tp->intf);
3179 ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3181 usb_autopm_put_interface(tp->intf);
3187 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3194 "tx_single_collisions",
3195 "tx_multi_collisions",
3203 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3207 return ARRAY_SIZE(rtl8152_gstrings);
3213 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3214 struct ethtool_stats *stats, u64 *data)
3216 struct r8152 *tp = netdev_priv(dev);
3217 struct tally_counter tally;
3219 if (usb_autopm_get_interface(tp->intf) < 0)
3222 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3224 usb_autopm_put_interface(tp->intf);
3226 data[0] = le64_to_cpu(tally.tx_packets);
3227 data[1] = le64_to_cpu(tally.rx_packets);
3228 data[2] = le64_to_cpu(tally.tx_errors);
3229 data[3] = le32_to_cpu(tally.rx_errors);
3230 data[4] = le16_to_cpu(tally.rx_missed);
3231 data[5] = le16_to_cpu(tally.align_errors);
3232 data[6] = le32_to_cpu(tally.tx_one_collision);
3233 data[7] = le32_to_cpu(tally.tx_multi_collision);
3234 data[8] = le64_to_cpu(tally.rx_unicast);
3235 data[9] = le64_to_cpu(tally.rx_broadcast);
3236 data[10] = le32_to_cpu(tally.rx_multicast);
3237 data[11] = le16_to_cpu(tally.tx_aborted);
3238 data[12] = le16_to_cpu(tally.tx_underun);
3241 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3243 switch (stringset) {
3245 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3250 static struct ethtool_ops ops = {
3251 .get_drvinfo = rtl8152_get_drvinfo,
3252 .get_settings = rtl8152_get_settings,
3253 .set_settings = rtl8152_set_settings,
3254 .get_link = ethtool_op_get_link,
3255 .get_msglevel = rtl8152_get_msglevel,
3256 .set_msglevel = rtl8152_set_msglevel,
3257 .get_wol = rtl8152_get_wol,
3258 .set_wol = rtl8152_set_wol,
3259 .get_strings = rtl8152_get_strings,
3260 .get_sset_count = rtl8152_get_sset_count,
3261 .get_ethtool_stats = rtl8152_get_ethtool_stats,
3264 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3266 struct r8152 *tp = netdev_priv(netdev);
3267 struct mii_ioctl_data *data = if_mii(rq);
3270 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3273 res = usb_autopm_get_interface(tp->intf);
3279 data->phy_id = R8152_PHY_ID; /* Internal PHY */
3283 data->val_out = r8152_mdio_read(tp, data->reg_num);
3287 if (!capable(CAP_NET_ADMIN)) {
3291 r8152_mdio_write(tp, data->reg_num, data->val_in);
3298 usb_autopm_put_interface(tp->intf);
3304 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
3306 struct r8152 *tp = netdev_priv(dev);
3308 switch (tp->version) {
3311 return eth_change_mtu(dev, new_mtu);
3316 if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
3324 static const struct net_device_ops rtl8152_netdev_ops = {
3325 .ndo_open = rtl8152_open,
3326 .ndo_stop = rtl8152_close,
3327 .ndo_do_ioctl = rtl8152_ioctl,
3328 .ndo_start_xmit = rtl8152_start_xmit,
3329 .ndo_tx_timeout = rtl8152_tx_timeout,
3330 .ndo_set_rx_mode = rtl8152_set_rx_mode,
3331 .ndo_set_mac_address = rtl8152_set_mac_address,
3332 .ndo_change_mtu = rtl8152_change_mtu,
3333 .ndo_validate_addr = eth_validate_addr,
3336 static void r8152b_get_version(struct r8152 *tp)
3341 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
3342 version = (u16)(ocp_data & VERSION_MASK);
3346 tp->version = RTL_VER_01;
3349 tp->version = RTL_VER_02;
3352 tp->version = RTL_VER_03;
3353 tp->mii.supports_gmii = 1;
3356 tp->version = RTL_VER_04;
3357 tp->mii.supports_gmii = 1;
3360 tp->version = RTL_VER_05;
3361 tp->mii.supports_gmii = 1;
3364 netif_info(tp, probe, tp->netdev,
3365 "Unknown version 0x%04x\n", version);
3370 static void rtl8152_unload(struct r8152 *tp)
3372 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3375 if (tp->version != RTL_VER_01)
3376 r8152_power_cut_en(tp, true);
3379 static void rtl8153_unload(struct r8152 *tp)
3381 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3384 r8153_power_cut_en(tp, true);
3387 static int rtl_ops_init(struct r8152 *tp, const struct usb_device_id *id)
3389 struct rtl_ops *ops = &tp->rtl_ops;
3392 switch (id->idVendor) {
3393 case VENDOR_ID_REALTEK:
3394 switch (id->idProduct) {
3395 case PRODUCT_ID_RTL8152:
3396 ops->init = r8152b_init;
3397 ops->enable = rtl8152_enable;
3398 ops->disable = rtl8152_disable;
3399 ops->up = r8152b_exit_oob;
3400 ops->down = rtl8152_down;
3401 ops->unload = rtl8152_unload;
3404 case PRODUCT_ID_RTL8153:
3405 ops->init = r8153_init;
3406 ops->enable = rtl8153_enable;
3407 ops->disable = rtl8152_disable;
3408 ops->up = r8153_first_init;
3409 ops->down = rtl8153_down;
3410 ops->unload = rtl8153_unload;
3418 case VENDOR_ID_SAMSUNG:
3419 switch (id->idProduct) {
3420 case PRODUCT_ID_SAMSUNG:
3421 ops->init = r8153_init;
3422 ops->enable = rtl8153_enable;
3423 ops->disable = rtl8152_disable;
3424 ops->up = r8153_first_init;
3425 ops->down = rtl8153_down;
3426 ops->unload = rtl8153_unload;
3439 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
3444 static int rtl8152_probe(struct usb_interface *intf,
3445 const struct usb_device_id *id)
3447 struct usb_device *udev = interface_to_usbdev(intf);
3449 struct net_device *netdev;
3452 if (udev->actconfig->desc.bConfigurationValue != 1) {
3453 usb_driver_set_configuration(udev, 1);
3457 usb_reset_device(udev);
3458 netdev = alloc_etherdev(sizeof(struct r8152));
3460 dev_err(&intf->dev, "Out of memory\n");
3464 SET_NETDEV_DEV(netdev, &intf->dev);
3465 tp = netdev_priv(netdev);
3466 tp->msg_enable = 0x7FFF;
3469 tp->netdev = netdev;
3472 ret = rtl_ops_init(tp, id);
3476 tasklet_init(&tp->tl, bottom_half, (unsigned long)tp);
3477 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
3479 netdev->netdev_ops = &rtl8152_netdev_ops;
3480 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
3482 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
3483 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
3485 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
3486 NETIF_F_TSO | NETIF_F_FRAGLIST |
3487 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
3489 netdev->ethtool_ops = &ops;
3490 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
3492 tp->mii.dev = netdev;
3493 tp->mii.mdio_read = read_mii_word;
3494 tp->mii.mdio_write = write_mii_word;
3495 tp->mii.phy_id_mask = 0x3f;
3496 tp->mii.reg_num_mask = 0x1f;
3497 tp->mii.phy_id = R8152_PHY_ID;
3498 tp->mii.supports_gmii = 0;
3500 intf->needs_remote_wakeup = 1;
3502 r8152b_get_version(tp);
3503 tp->rtl_ops.init(tp);
3504 set_ethernet_addr(tp);
3506 usb_set_intfdata(intf, tp);
3508 ret = register_netdev(netdev);
3510 netif_err(tp, probe, netdev, "couldn't register the device\n");
3514 tp->saved_wolopts = __rtl_get_wol(tp);
3515 if (tp->saved_wolopts)
3516 device_set_wakeup_enable(&udev->dev, true);
3518 device_set_wakeup_enable(&udev->dev, false);
3520 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
3525 usb_set_intfdata(intf, NULL);
3527 free_netdev(netdev);
3531 static void rtl8152_disconnect(struct usb_interface *intf)
3533 struct r8152 *tp = usb_get_intfdata(intf);
3535 usb_set_intfdata(intf, NULL);
3537 set_bit(RTL8152_UNPLUG, &tp->flags);
3538 tasklet_kill(&tp->tl);
3539 unregister_netdev(tp->netdev);
3540 tp->rtl_ops.unload(tp);
3541 free_netdev(tp->netdev);
3545 /* table of devices that work with this driver */
3546 static struct usb_device_id rtl8152_table[] = {
3547 {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8152)},
3548 {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8153)},
3549 {USB_DEVICE(VENDOR_ID_SAMSUNG, PRODUCT_ID_SAMSUNG)},
3553 MODULE_DEVICE_TABLE(usb, rtl8152_table);
3555 static struct usb_driver rtl8152_driver = {
3557 .id_table = rtl8152_table,
3558 .probe = rtl8152_probe,
3559 .disconnect = rtl8152_disconnect,
3560 .suspend = rtl8152_suspend,
3561 .resume = rtl8152_resume,
3562 .reset_resume = rtl8152_resume,
3563 .supports_autosuspend = 1,
3564 .disable_hub_initiated_lpm = 1,
3567 module_usb_driver(rtl8152_driver);
3569 MODULE_AUTHOR(DRIVER_AUTHOR);
3570 MODULE_DESCRIPTION(DRIVER_DESC);
3571 MODULE_LICENSE("GPL");