drivers/net/usb/smsc95xx.c

   1  /***************************************************************************
   2  *
   3  * Copyright (C) 2007-2008 SMSC
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License
   7  * as published by the Free Software Foundation; either version 2
   8  * of the License, or (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  18  *
  19  *****************************************************************************/
  20
  21 #include <linux/module.h>
  22 #include <linux/kmod.h>
  23 #include <linux/init.h>
  24 #include <linux/netdevice.h>
  25 #include <linux/etherdevice.h>
  26 #include <linux/ethtool.h>
  27 #include <linux/mii.h>
  28 #include <linux/usb.h>
  29 #include <linux/bitrev.h>
  30 #include <linux/crc16.h>
  31 #include <linux/crc32.h>
  32 #include <linux/usb/usbnet.h>
  33 #include <linux/slab.h>
  34 #include "smsc95xx.h"
  35
  36 #define SMSC_CHIPNAME                   "smsc95xx"
  37 #define SMSC_DRIVER_VERSION             "1.0.4"
  38 #define HS_USB_PKT_SIZE                 (512)
  39 #define FS_USB_PKT_SIZE                 (64)
  40 #define DEFAULT_HS_BURST_CAP_SIZE       (16 * 1024 + 5 * HS_USB_PKT_SIZE)
  41 #define DEFAULT_FS_BURST_CAP_SIZE       (6 * 1024 + 33 * FS_USB_PKT_SIZE)
  42 #define DEFAULT_BULK_IN_DELAY           (0x00002000)
  43 #define MAX_SINGLE_PACKET_SIZE          (2048)
  44 #define LAN95XX_EEPROM_MAGIC            (0x9500)
  45 #define EEPROM_MAC_OFFSET               (0x01)
  46 #define DEFAULT_TX_CSUM_ENABLE          (true)
  47 #define DEFAULT_RX_CSUM_ENABLE          (true)
  48 #define SMSC95XX_INTERNAL_PHY_ID        (1)
  49 #define SMSC95XX_TX_OVERHEAD            (8)
  50 #define SMSC95XX_TX_OVERHEAD_CSUM       (12)
  51 #define SUPPORTED_WAKE                  (WAKE_UCAST | WAKE_BCAST | \
  52                                          WAKE_MCAST | WAKE_ARP | WAKE_MAGIC)
  53
  54 #define check_warn(ret, fmt, args...) \
  55         ({ if (ret < 0) netdev_warn(dev->net, fmt, ##args); })
  56
  57 #define check_warn_return(ret, fmt, args...) \
  58         ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); return ret; } })
  59
  60 #define check_warn_goto_done(ret, fmt, args...) \
  61         ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); goto done; } })
  62
  63 struct smsc95xx_priv {
  64         u32 mac_cr;
  65         u32 hash_hi;
  66         u32 hash_lo;
  67         u32 wolopts;
  68         spinlock_t mac_cr_lock;
  69         int wuff_filter_count;
  70 };
  71
  72 static bool turbo_mode = true;
  73 module_param(turbo_mode, bool, 0644);
  74 MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
  75
  76 static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index,
  77                                             u32 *data, int in_pm)
  78 {
  79         u32 buf;
  80         int ret;
  81         int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
  82
  83         BUG_ON(!dev);
  84
  85         if (!in_pm)
  86                 fn = usbnet_read_cmd;
  87         else
  88                 fn = usbnet_read_cmd_nopm;
  89
  90         ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN
  91                  | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  92                  0, index, &buf, 4);
  93         if (unlikely(ret < 0))
  94                 netdev_warn(dev->net,
  95                         "Failed to read reg index 0x%08x: %d", index, ret);
  96
  97         le32_to_cpus(&buf);
  98         *data = buf;
  99
 100         return ret;
 101 }
 102
 103 static int __must_check __smsc95xx_write_reg(struct usbnet *dev, u32 index,
 104                                              u32 data, int in_pm)
 105 {
 106         u32 buf;
 107         int ret;
 108         int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
 109
 110         BUG_ON(!dev);
 111
 112         if (!in_pm)
 113                 fn = usbnet_write_cmd;
 114         else
 115                 fn = usbnet_write_cmd_nopm;
 116
 117         buf = data;
 118         cpu_to_le32s(&buf);
 119
 120         ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT
 121                  | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 122                  0, index, &buf, 4);
 123         if (unlikely(ret < 0))
 124                 netdev_warn(dev->net,
 125                         "Failed to write reg index 0x%08x: %d", index, ret);
 126
 127         return ret;
 128 }
 129
 130 static int __must_check smsc95xx_read_reg_nopm(struct usbnet *dev, u32 index,
 131                                                u32 *data)
 132 {
 133         return __smsc95xx_read_reg(dev, index, data, 1);
 134 }
 135
 136 static int __must_check smsc95xx_write_reg_nopm(struct usbnet *dev, u32 index,
 137                                                 u32 data)
 138 {
 139         return __smsc95xx_write_reg(dev, index, data, 1);
 140 }
 141
 142 static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index,
 143                                           u32 *data)
 144 {
 145         return __smsc95xx_read_reg(dev, index, data, 0);
 146 }
 147
 148 static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index,
 149                                            u32 data)
 150 {
 151         return __smsc95xx_write_reg(dev, index, data, 0);
 152 }
 153 static int smsc95xx_set_feature(struct usbnet *dev, u32 feature)
 154 {
 155         if (WARN_ON_ONCE(!dev))
 156                 return -EINVAL;
 157
 158         return usbnet_write_cmd_nopm(dev, USB_REQ_SET_FEATURE,
 159                                      USB_RECIP_DEVICE, feature, 0,
 160                                      NULL, 0);
 161 }
 162
 163 static int smsc95xx_clear_feature(struct usbnet *dev, u32 feature)
 164 {
 165         if (WARN_ON_ONCE(!dev))
 166                 return -EINVAL;
 167
 168         return usbnet_write_cmd_nopm(dev, USB_REQ_CLEAR_FEATURE,
 169                                      USB_RECIP_DEVICE, feature,
 170                                      0, NULL, 0);
 171 }
 172
 173 /* Loop until the read is completed with timeout
 174  * called with phy_mutex held */
 175 static int __must_check smsc95xx_phy_wait_not_busy(struct usbnet *dev)
 176 {
 177         unsigned long start_time = jiffies;
 178         u32 val;
 179         int ret;
 180
 181         do {
 182                 ret = smsc95xx_read_reg(dev, MII_ADDR, &val);
 183                 check_warn_return(ret, "Error reading MII_ACCESS");
 184                 if (!(val & MII_BUSY_))
 185                         return 0;
 186         } while (!time_after(jiffies, start_time + HZ));
 187
 188         return -EIO;
 189 }
 190
 191 static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
 192 {
 193         struct usbnet *dev = netdev_priv(netdev);
 194         u32 val, addr;
 195         int ret;
 196
 197         mutex_lock(&dev->phy_mutex);
 198
 199         /* confirm MII not busy */
 200         ret = smsc95xx_phy_wait_not_busy(dev);
 201         check_warn_goto_done(ret, "MII is busy in smsc95xx_mdio_read");
 202
 203         /* set the address, index & direction (read from PHY) */
 204         phy_id &= dev->mii.phy_id_mask;
 205         idx &= dev->mii.reg_num_mask;
 206         addr = (phy_id << 11) | (idx << 6) | MII_READ_;
 207         ret = smsc95xx_write_reg(dev, MII_ADDR, addr);
 208         check_warn_goto_done(ret, "Error writing MII_ADDR");
 209
 210         ret = smsc95xx_phy_wait_not_busy(dev);
 211         check_warn_goto_done(ret, "Timed out reading MII reg %02X", idx);
 212
 213         ret = smsc95xx_read_reg(dev, MII_DATA, &val);
 214         check_warn_goto_done(ret, "Error reading MII_DATA");
 215
 216         ret = (u16)(val & 0xFFFF);
 217
 218 done:
 219         mutex_unlock(&dev->phy_mutex);
 220         return ret;
 221 }
 222
 223 static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
 224                                 int regval)
 225 {
 226         struct usbnet *dev = netdev_priv(netdev);
 227         u32 val, addr;
 228         int ret;
 229
 230         mutex_lock(&dev->phy_mutex);
 231
 232         /* confirm MII not busy */
 233         ret = smsc95xx_phy_wait_not_busy(dev);
 234         check_warn_goto_done(ret, "MII is busy in smsc95xx_mdio_write");
 235
 236         val = regval;
 237         ret = smsc95xx_write_reg(dev, MII_DATA, val);
 238         check_warn_goto_done(ret, "Error writing MII_DATA");
 239
 240         /* set the address, index & direction (write to PHY) */
 241         phy_id &= dev->mii.phy_id_mask;
 242         idx &= dev->mii.reg_num_mask;
 243         addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
 244         ret = smsc95xx_write_reg(dev, MII_ADDR, addr);
 245         check_warn_goto_done(ret, "Error writing MII_ADDR");
 246
 247         ret = smsc95xx_phy_wait_not_busy(dev);
 248         check_warn_goto_done(ret, "Timed out writing MII reg %02X", idx);
 249
 250 done:
 251         mutex_unlock(&dev->phy_mutex);
 252 }
 253
 254 static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev)
 255 {
 256         unsigned long start_time = jiffies;
 257         u32 val;
 258         int ret;
 259
 260         do {
 261                 ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
 262                 check_warn_return(ret, "Error reading E2P_CMD");
 263                 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
 264                         break;
 265                 udelay(40);
 266         } while (!time_after(jiffies, start_time + HZ));
 267
 268         if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
 269                 netdev_warn(dev->net, "EEPROM read operation timeout\n");
 270                 return -EIO;
 271         }
 272
 273         return 0;
 274 }
 275
 276 static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
 277 {
 278         unsigned long start_time = jiffies;
 279         u32 val;
 280         int ret;
 281
 282         do {
 283                 ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
 284                 check_warn_return(ret, "Error reading E2P_CMD");
 285
 286                 if (!(val & E2P_CMD_BUSY_))
 287                         return 0;
 288
 289                 udelay(40);
 290         } while (!time_after(jiffies, start_time + HZ));
 291
 292         netdev_warn(dev->net, "EEPROM is busy\n");
 293         return -EIO;
 294 }
 295
 296 static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
 297                                 u8 *data)
 298 {
 299         u32 val;
 300         int i, ret;
 301
 302         BUG_ON(!dev);
 303         BUG_ON(!data);
 304
 305         ret = smsc95xx_eeprom_confirm_not_busy(dev);
 306         if (ret)
 307                 return ret;
 308
 309         for (i = 0; i < length; i++) {
 310                 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
 311                 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
 312                 check_warn_return(ret, "Error writing E2P_CMD");
 313
 314                 ret = smsc95xx_wait_eeprom(dev);
 315                 if (ret < 0)
 316                         return ret;
 317
 318                 ret = smsc95xx_read_reg(dev, E2P_DATA, &val);
 319                 check_warn_return(ret, "Error reading E2P_DATA");
 320
 321                 data[i] = val & 0xFF;
 322                 offset++;
 323         }
 324
 325         return 0;
 326 }
 327
 328 static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
 329                                  u8 *data)
 330 {
 331         u32 val;
 332         int i, ret;
 333
 334         BUG_ON(!dev);
 335         BUG_ON(!data);
 336
 337         ret = smsc95xx_eeprom_confirm_not_busy(dev);
 338         if (ret)
 339                 return ret;
 340
 341         /* Issue write/erase enable command */
 342         val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
 343         ret = smsc95xx_write_reg(dev, E2P_CMD, val);
 344         check_warn_return(ret, "Error writing E2P_DATA");
 345
 346         ret = smsc95xx_wait_eeprom(dev);
 347         if (ret < 0)
 348                 return ret;
 349
 350         for (i = 0; i < length; i++) {
 351
 352                 /* Fill data register */
 353                 val = data[i];
 354                 ret = smsc95xx_write_reg(dev, E2P_DATA, val);
 355                 check_warn_return(ret, "Error writing E2P_DATA");
 356
 357                 /* Send "write" command */
 358                 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
 359                 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
 360                 check_warn_return(ret, "Error writing E2P_CMD");
 361
 362                 ret = smsc95xx_wait_eeprom(dev);
 363                 if (ret < 0)
 364                         return ret;
 365
 366                 offset++;
 367         }
 368
 369         return 0;
 370 }
 371
 372 static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index,
 373                                                  u32 *data)
 374 {
 375         const u16 size = 4;
 376         int ret;
 377
 378         ret = usbnet_write_cmd_async(dev, USB_VENDOR_REQUEST_WRITE_REGISTER,
 379                                      USB_DIR_OUT | USB_TYPE_VENDOR |
 380                                      USB_RECIP_DEVICE,
 381                                      0, index, data, size);
 382         if (ret < 0)
 383                 netdev_warn(dev->net, "Error write async cmd, sts=%d\n",
 384                             ret);
 385         return ret;
 386 }
 387
 388 /* returns hash bit number for given MAC address
 389  * example:
 390  * 01 00 5E 00 00 01 -> returns bit number 31 */
 391 static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
 392 {
 393         return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
 394 }
 395
 396 static void smsc95xx_set_multicast(struct net_device *netdev)
 397 {
 398         struct usbnet *dev = netdev_priv(netdev);
 399         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 400         unsigned long flags;
 401         int ret;
 402
 403         pdata->hash_hi = 0;
 404         pdata->hash_lo = 0;
 405
 406         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 407
 408         if (dev->net->flags & IFF_PROMISC) {
 409                 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
 410                 pdata->mac_cr |= MAC_CR_PRMS_;
 411                 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
 412         } else if (dev->net->flags & IFF_ALLMULTI) {
 413                 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
 414                 pdata->mac_cr |= MAC_CR_MCPAS_;
 415                 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
 416         } else if (!netdev_mc_empty(dev->net)) {
 417                 struct netdev_hw_addr *ha;
 418
 419                 pdata->mac_cr |= MAC_CR_HPFILT_;
 420                 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
 421
 422                 netdev_for_each_mc_addr(ha, netdev) {
 423                         u32 bitnum = smsc95xx_hash(ha->addr);
 424                         u32 mask = 0x01 << (bitnum & 0x1F);
 425                         if (bitnum & 0x20)
 426                                 pdata->hash_hi |= mask;
 427                         else
 428                                 pdata->hash_lo |= mask;
 429                 }
 430
 431                 netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n",
 432                                    pdata->hash_hi, pdata->hash_lo);
 433         } else {
 434                 netif_dbg(dev, drv, dev->net, "receive own packets only\n");
 435                 pdata->mac_cr &=
 436                         ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
 437         }
 438
 439         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 440
 441         /* Initiate async writes, as we can't wait for completion here */
 442         ret = smsc95xx_write_reg_async(dev, HASHH, &pdata->hash_hi);
 443         check_warn(ret, "failed to initiate async write to HASHH");
 444
 445         ret = smsc95xx_write_reg_async(dev, HASHL, &pdata->hash_lo);
 446         check_warn(ret, "failed to initiate async write to HASHL");
 447
 448         ret = smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr);
 449         check_warn(ret, "failed to initiate async write to MAC_CR");
 450 }
 451
 452 static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
 453                                            u16 lcladv, u16 rmtadv)
 454 {
 455         u32 flow, afc_cfg = 0;
 456
 457         int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
 458         check_warn_return(ret, "Error reading AFC_CFG");
 459
 460         if (duplex == DUPLEX_FULL) {
 461                 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
 462
 463                 if (cap & FLOW_CTRL_RX)
 464                         flow = 0xFFFF0002;
 465                 else
 466                         flow = 0;
 467
 468                 if (cap & FLOW_CTRL_TX)
 469                         afc_cfg |= 0xF;
 470                 else
 471                         afc_cfg &= ~0xF;
 472
 473                 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
 474                                    cap & FLOW_CTRL_RX ? "enabled" : "disabled",
 475                                    cap & FLOW_CTRL_TX ? "enabled" : "disabled");
 476         } else {
 477                 netif_dbg(dev, link, dev->net, "half duplex\n");
 478                 flow = 0;
 479                 afc_cfg |= 0xF;
 480         }
 481
 482         ret = smsc95xx_write_reg(dev, FLOW, flow);
 483         check_warn_return(ret, "Error writing FLOW");
 484
 485         ret = smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
 486         check_warn_return(ret, "Error writing AFC_CFG");
 487
 488         return 0;
 489 }
 490
 491 static int smsc95xx_link_reset(struct usbnet *dev)
 492 {
 493         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 494         struct mii_if_info *mii = &dev->mii;
 495         struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
 496         unsigned long flags;
 497         u16 lcladv, rmtadv;
 498         int ret;
 499
 500         /* clear interrupt status */
 501         ret = smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
 502         check_warn_return(ret, "Error reading PHY_INT_SRC");
 503
 504         ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
 505         check_warn_return(ret, "Error writing INT_STS");
 506
 507         mii_check_media(mii, 1, 1);
 508         mii_ethtool_gset(&dev->mii, &ecmd);
 509         lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
 510         rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
 511
 512         netif_dbg(dev, link, dev->net,
 513                   "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n",
 514                   ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv);
 515
 516         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 517         if (ecmd.duplex != DUPLEX_FULL) {
 518                 pdata->mac_cr &= ~MAC_CR_FDPX_;
 519                 pdata->mac_cr |= MAC_CR_RCVOWN_;
 520         } else {
 521                 pdata->mac_cr &= ~MAC_CR_RCVOWN_;
 522                 pdata->mac_cr |= MAC_CR_FDPX_;
 523         }
 524         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 525
 526         ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
 527         check_warn_return(ret, "Error writing MAC_CR");
 528
 529         ret = smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
 530         check_warn_return(ret, "Error updating PHY flow control");
 531
 532         return 0;
 533 }
 534
 535 static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
 536 {
 537         u32 intdata;
 538
 539         if (urb->actual_length != 4) {
 540                 netdev_warn(dev->net, "unexpected urb length %d\n",
 541                             urb->actual_length);
 542                 return;
 543         }
 544
 545         memcpy(&intdata, urb->transfer_buffer, 4);
 546         le32_to_cpus(&intdata);
 547
 548         netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
 549
 550         if (intdata & INT_ENP_PHY_INT_)
 551                 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
 552         else
 553                 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
 554                             intdata);
 555 }
 556
 557 /* Enable or disable Tx & Rx checksum offload engines */
 558 static int smsc95xx_set_features(struct net_device *netdev,
 559         netdev_features_t features)
 560 {
 561         struct usbnet *dev = netdev_priv(netdev);
 562         u32 read_buf;
 563         int ret;
 564
 565         ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
 566         check_warn_return(ret, "Failed to read COE_CR: %d\n", ret);
 567
 568         if (features & NETIF_F_HW_CSUM)
 569                 read_buf |= Tx_COE_EN_;
 570         else
 571                 read_buf &= ~Tx_COE_EN_;
 572
 573         if (features & NETIF_F_RXCSUM)
 574                 read_buf |= Rx_COE_EN_;
 575         else
 576                 read_buf &= ~Rx_COE_EN_;
 577
 578         ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
 579         check_warn_return(ret, "Failed to write COE_CR: %d\n", ret);
 580
 581         netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);
 582         return 0;
 583 }
 584
 585 static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
 586 {
 587         return MAX_EEPROM_SIZE;
 588 }
 589
 590 static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
 591                                        struct ethtool_eeprom *ee, u8 *data)
 592 {
 593         struct usbnet *dev = netdev_priv(netdev);
 594
 595         ee->magic = LAN95XX_EEPROM_MAGIC;
 596
 597         return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
 598 }
 599
 600 static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
 601                                        struct ethtool_eeprom *ee, u8 *data)
 602 {
 603         struct usbnet *dev = netdev_priv(netdev);
 604
 605         if (ee->magic != LAN95XX_EEPROM_MAGIC) {
 606                 netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n",
 607                             ee->magic);
 608                 return -EINVAL;
 609         }
 610
 611         return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
 612 }
 613
 614 static int smsc95xx_ethtool_getregslen(struct net_device *netdev)
 615 {
 616         /* all smsc95xx registers */
 617         return COE_CR - ID_REV + 1;
 618 }
 619
 620 static void
 621 smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs,
 622                          void *buf)
 623 {
 624         struct usbnet *dev = netdev_priv(netdev);
 625         unsigned int i, j;
 626         int retval;
 627         u32 *data = buf;
 628
 629         retval = smsc95xx_read_reg(dev, ID_REV, &regs->version);
 630         if (retval < 0) {
 631                 netdev_warn(netdev, "REGS: cannot read ID_REV\n");
 632                 return;
 633         }
 634
 635         for (i = ID_REV, j = 0; i <= COE_CR; i += (sizeof(u32)), j++) {
 636                 retval = smsc95xx_read_reg(dev, i, &data[j]);
 637                 if (retval < 0) {
 638                         netdev_warn(netdev, "REGS: cannot read reg[%x]\n", i);
 639                         return;
 640                 }
 641         }
 642 }
 643
 644 static void smsc95xx_ethtool_get_wol(struct net_device *net,
 645                                      struct ethtool_wolinfo *wolinfo)
 646 {
 647         struct usbnet *dev = netdev_priv(net);
 648         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 649
 650         wolinfo->supported = SUPPORTED_WAKE;
 651         wolinfo->wolopts = pdata->wolopts;
 652 }
 653
 654 static int smsc95xx_ethtool_set_wol(struct net_device *net,
 655                                     struct ethtool_wolinfo *wolinfo)
 656 {
 657         struct usbnet *dev = netdev_priv(net);
 658         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 659
 660         pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE;
 661         return 0;
 662 }
 663
 664 static const struct ethtool_ops smsc95xx_ethtool_ops = {
 665         .get_link       = usbnet_get_link,
 666         .nway_reset     = usbnet_nway_reset,
 667         .get_drvinfo    = usbnet_get_drvinfo,
 668         .get_msglevel   = usbnet_get_msglevel,
 669         .set_msglevel   = usbnet_set_msglevel,
 670         .get_settings   = usbnet_get_settings,
 671         .set_settings   = usbnet_set_settings,
 672         .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
 673         .get_eeprom     = smsc95xx_ethtool_get_eeprom,
 674         .set_eeprom     = smsc95xx_ethtool_set_eeprom,
 675         .get_regs_len   = smsc95xx_ethtool_getregslen,
 676         .get_regs       = smsc95xx_ethtool_getregs,
 677         .get_wol        = smsc95xx_ethtool_get_wol,
 678         .set_wol        = smsc95xx_ethtool_set_wol,
 679 };
 680
 681 static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
 682 {
 683         struct usbnet *dev = netdev_priv(netdev);
 684
 685         if (!netif_running(netdev))
 686                 return -EINVAL;
 687
 688         return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
 689 }
 690
 691 static void smsc95xx_init_mac_address(struct usbnet *dev)
 692 {
 693         /* try reading mac address from EEPROM */
 694         if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
 695                         dev->net->dev_addr) == 0) {
 696                 if (is_valid_ether_addr(dev->net->dev_addr)) {
 697                         /* eeprom values are valid so use them */
 698                         netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n");
 699                         return;
 700                 }
 701         }
 702
 703         /* no eeprom, or eeprom values are invalid. generate random MAC */
 704         eth_hw_addr_random(dev->net);
 705         netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
 706 }
 707
 708 static int smsc95xx_set_mac_address(struct usbnet *dev)
 709 {
 710         u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
 711                 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
 712         u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
 713         int ret;
 714
 715         ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
 716         check_warn_return(ret, "Failed to write ADDRL: %d\n", ret);
 717
 718         ret = smsc95xx_write_reg(dev, ADDRH, addr_hi);
 719         check_warn_return(ret, "Failed to write ADDRH: %d\n", ret);
 720
 721         return 0;
 722 }
 723
 724 /* starts the TX path */
 725 static int smsc95xx_start_tx_path(struct usbnet *dev)
 726 {
 727         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 728         unsigned long flags;
 729         int ret;
 730
 731         /* Enable Tx at MAC */
 732         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 733         pdata->mac_cr |= MAC_CR_TXEN_;
 734         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 735
 736         ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
 737         check_warn_return(ret, "Failed to write MAC_CR: %d\n", ret);
 738
 739         /* Enable Tx at SCSRs */
 740         ret = smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_);
 741         check_warn_return(ret, "Failed to write TX_CFG: %d\n", ret);
 742
 743         return 0;
 744 }
 745
 746 /* Starts the Receive path */
 747 static int smsc95xx_start_rx_path(struct usbnet *dev, int in_pm)
 748 {
 749         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 750         unsigned long flags;
 751         int ret;
 752
 753         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 754         pdata->mac_cr |= MAC_CR_RXEN_;
 755         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 756
 757         ret = __smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr, in_pm);
 758         check_warn_return(ret, "Failed to write MAC_CR: %d\n", ret);
 759
 760         return 0;
 761 }
 762
 763 static int smsc95xx_phy_initialize(struct usbnet *dev)
 764 {
 765         int bmcr, ret, timeout = 0;
 766
 767         /* Initialize MII structure */
 768         dev->mii.dev = dev->net;
 769         dev->mii.mdio_read = smsc95xx_mdio_read;
 770         dev->mii.mdio_write = smsc95xx_mdio_write;
 771         dev->mii.phy_id_mask = 0x1f;
 772         dev->mii.reg_num_mask = 0x1f;
 773         dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
 774
 775         /* reset phy and wait for reset to complete */
 776         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
 777
 778         do {
 779                 msleep(10);
 780                 bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
 781                 timeout++;
 782         } while ((bmcr & BMCR_RESET) && (timeout < 100));
 783
 784         if (timeout >= 100) {
 785                 netdev_warn(dev->net, "timeout on PHY Reset");
 786                 return -EIO;
 787         }
 788
 789         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
 790                 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
 791                 ADVERTISE_PAUSE_ASYM);
 792
 793         /* read to clear */
 794         ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
 795         check_warn_return(ret, "Failed to read PHY_INT_SRC during init");
 796
 797         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
 798                 PHY_INT_MASK_DEFAULT_);
 799         mii_nway_restart(&dev->mii);
 800
 801         netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
 802         return 0;
 803 }
 804
 805 static int smsc95xx_reset(struct usbnet *dev)
 806 {
 807         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 808         u32 read_buf, write_buf, burst_cap;
 809         int ret = 0, timeout;
 810
 811         netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n");
 812
 813         ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_);
 814         check_warn_return(ret, "Failed to write HW_CFG_LRST_ bit in HW_CFG\n");
 815
 816         timeout = 0;
 817         do {
 818                 msleep(10);
 819                 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 820                 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
 821                 timeout++;
 822         } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
 823
 824         if (timeout >= 100) {
 825                 netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n");
 826                 return ret;
 827         }
 828
 829         ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_);
 830         check_warn_return(ret, "Failed to write PM_CTRL: %d\n", ret);
 831
 832         timeout = 0;
 833         do {
 834                 msleep(10);
 835                 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
 836                 check_warn_return(ret, "Failed to read PM_CTRL: %d\n", ret);
 837                 timeout++;
 838         } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
 839
 840         if (timeout >= 100) {
 841                 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
 842                 return ret;
 843         }
 844
 845         ret = smsc95xx_set_mac_address(dev);
 846         if (ret < 0)
 847                 return ret;
 848
 849         netif_dbg(dev, ifup, dev->net,
 850                   "MAC Address: %pM\n", dev->net->dev_addr);
 851
 852         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 853         check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
 854
 855         netif_dbg(dev, ifup, dev->net,
 856                   "Read Value from HW_CFG : 0x%08x\n", read_buf);
 857
 858         read_buf |= HW_CFG_BIR_;
 859
 860         ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
 861         check_warn_return(ret, "Failed to write HW_CFG_BIR_ bit in HW_CFG\n");
 862
 863         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 864         check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
 865         netif_dbg(dev, ifup, dev->net,
 866                   "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n",
 867                   read_buf);
 868
 869         if (!turbo_mode) {
 870                 burst_cap = 0;
 871                 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
 872         } else if (dev->udev->speed == USB_SPEED_HIGH) {
 873                 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
 874                 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
 875         } else {
 876                 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
 877                 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
 878         }
 879
 880         netif_dbg(dev, ifup, dev->net,
 881                   "rx_urb_size=%ld\n", (ulong)dev->rx_urb_size);
 882
 883         ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
 884         check_warn_return(ret, "Failed to write BURST_CAP: %d\n", ret);
 885
 886         ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
 887         check_warn_return(ret, "Failed to read BURST_CAP: %d\n", ret);
 888
 889         netif_dbg(dev, ifup, dev->net,
 890                   "Read Value from BURST_CAP after writing: 0x%08x\n",
 891                   read_buf);
 892
 893         ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
 894         check_warn_return(ret, "Failed to write BULK_IN_DLY: %d\n", ret);
 895
 896         ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
 897         check_warn_return(ret, "Failed to read BULK_IN_DLY: %d\n", ret);
 898
 899         netif_dbg(dev, ifup, dev->net,
 900                   "Read Value from BULK_IN_DLY after writing: 0x%08x\n",
 901                   read_buf);
 902
 903         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 904         check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
 905
 906         netif_dbg(dev, ifup, dev->net,
 907                   "Read Value from HW_CFG: 0x%08x\n", read_buf);
 908
 909         if (turbo_mode)
 910                 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
 911
 912         read_buf &= ~HW_CFG_RXDOFF_;
 913
 914         /* set Rx data offset=2, Make IP header aligns on word boundary. */
 915         read_buf |= NET_IP_ALIGN << 9;
 916
 917         ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
 918         check_warn_return(ret, "Failed to write HW_CFG: %d\n", ret);
 919
 920         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 921         check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
 922
 923         netif_dbg(dev, ifup, dev->net,
 924                   "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
 925
 926         ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
 927         check_warn_return(ret, "Failed to write INT_STS: %d\n", ret);
 928
 929         ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
 930         check_warn_return(ret, "Failed to read ID_REV: %d\n", ret);
 931         netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);
 932
 933         /* Configure GPIO pins as LED outputs */
 934         write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
 935                 LED_GPIO_CFG_FDX_LED;
 936         ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
 937         check_warn_return(ret, "Failed to write LED_GPIO_CFG: %d\n", ret);
 938
 939         /* Init Tx */
 940         ret = smsc95xx_write_reg(dev, FLOW, 0);
 941         check_warn_return(ret, "Failed to write FLOW: %d\n", ret);
 942
 943         ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT);
 944         check_warn_return(ret, "Failed to write AFC_CFG: %d\n", ret);
 945
 946         /* Don't need mac_cr_lock during initialisation */
 947         ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
 948         check_warn_return(ret, "Failed to read MAC_CR: %d\n", ret);
 949
 950         /* Init Rx */
 951         /* Set Vlan */
 952         ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q);
 953         check_warn_return(ret, "Failed to write VLAN1: %d\n", ret);
 954
 955         /* Enable or disable checksum offload engines */
 956         ret = smsc95xx_set_features(dev->net, dev->net->features);
 957         check_warn_return(ret, "Failed to set checksum offload features");
 958
 959         smsc95xx_set_multicast(dev->net);
 960
 961         ret = smsc95xx_phy_initialize(dev);
 962         check_warn_return(ret, "Failed to init PHY");
 963
 964         ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
 965         check_warn_return(ret, "Failed to read INT_EP_CTL: %d\n", ret);
 966
 967         /* enable PHY interrupts */
 968         read_buf |= INT_EP_CTL_PHY_INT_;
 969
 970         ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
 971         check_warn_return(ret, "Failed to write INT_EP_CTL: %d\n", ret);
 972
 973         ret = smsc95xx_start_tx_path(dev);
 974         check_warn_return(ret, "Failed to start TX path");
 975
 976         ret = smsc95xx_start_rx_path(dev, 0);
 977         check_warn_return(ret, "Failed to start RX path");
 978
 979         netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n");
 980         return 0;
 981 }
 982
 983 static const struct net_device_ops smsc95xx_netdev_ops = {
 984         .ndo_open               = usbnet_open,
 985         .ndo_stop               = usbnet_stop,
 986         .ndo_start_xmit         = usbnet_start_xmit,
 987         .ndo_tx_timeout         = usbnet_tx_timeout,
 988         .ndo_change_mtu         = usbnet_change_mtu,
 989         .ndo_set_mac_address    = eth_mac_addr,
 990         .ndo_validate_addr      = eth_validate_addr,
 991         .ndo_do_ioctl           = smsc95xx_ioctl,
 992         .ndo_set_rx_mode        = smsc95xx_set_multicast,
 993         .ndo_set_features       = smsc95xx_set_features,
 994 };
 995
 996 static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
 997 {
 998         struct smsc95xx_priv *pdata = NULL;
 999         u32 val;
1000         int ret;
1001
1002         printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1003
1004         ret = usbnet_get_endpoints(dev, intf);
1005         check_warn_return(ret, "usbnet_get_endpoints failed: %d\n", ret);
1006
1007         dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
1008                 GFP_KERNEL);
1009
1010         pdata = (struct smsc95xx_priv *)(dev->data[0]);
1011         if (!pdata) {
1012                 netdev_warn(dev->net, "Unable to allocate struct smsc95xx_priv\n");
1013                 return -ENOMEM;
1014         }
1015
1016         spin_lock_init(&pdata->mac_cr_lock);
1017
1018         if (DEFAULT_TX_CSUM_ENABLE)
1019                 dev->net->features |= NETIF_F_HW_CSUM;
1020         if (DEFAULT_RX_CSUM_ENABLE)
1021                 dev->net->features |= NETIF_F_RXCSUM;
1022
1023         dev->net->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM;
1024
1025         smsc95xx_init_mac_address(dev);
1026
1027         /* Init all registers */
1028         ret = smsc95xx_reset(dev);
1029
1030         /* detect device revision as different features may be available */
1031         ret = smsc95xx_read_reg(dev, ID_REV, &val);
1032         check_warn_return(ret, "Failed to read ID_REV: %d\n", ret);
1033         val >>= 16;
1034         if ((val == ID_REV_CHIP_ID_9500A_) || (val == ID_REV_CHIP_ID_9512_))
1035                 pdata->wuff_filter_count = LAN9500A_WUFF_NUM;
1036         else
1037                 pdata->wuff_filter_count = LAN9500_WUFF_NUM;
1038
1039         dev->net->netdev_ops = &smsc95xx_netdev_ops;
1040         dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
1041         dev->net->flags |= IFF_MULTICAST;
1042         dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM;
1043         dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
1044         return 0;
1045 }
1046
1047 static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1048 {
1049         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1050         if (pdata) {
1051                 netif_dbg(dev, ifdown, dev->net, "free pdata\n");
1052                 kfree(pdata);
1053                 pdata = NULL;
1054                 dev->data[0] = 0;
1055         }
1056 }
1057
1058 static u16 smsc_crc(const u8 *buffer, size_t len, int filter)
1059 {
1060         return bitrev16(crc16(0xFFFF, buffer, len)) << ((filter % 2) * 16);
1061 }
1062
1063 static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message)
1064 {
1065         struct usbnet *dev = usb_get_intfdata(intf);
1066         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1067         int ret;
1068         u32 val;
1069
1070         ret = usbnet_suspend(intf, message);
1071         check_warn_return(ret, "usbnet_suspend error");
1072
1073         /* if no wol options set, enter lowest power SUSPEND2 mode */
1074         if (!(pdata->wolopts & SUPPORTED_WAKE)) {
1075                 netdev_info(dev->net, "entering SUSPEND2 mode");
1076
1077                 /* disable energy detect (link up) & wake up events */
1078                 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
1079                 check_warn_return(ret, "Error reading WUCSR");
1080
1081                 val &= ~(WUCSR_MPEN_ | WUCSR_WAKE_EN_);
1082
1083                 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
1084                 check_warn_return(ret, "Error writing WUCSR");
1085
1086                 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
1087                 check_warn_return(ret, "Error reading PM_CTRL");
1088
1089                 val &= ~(PM_CTL_ED_EN_ | PM_CTL_WOL_EN_);
1090
1091                 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1092                 check_warn_return(ret, "Error writing PM_CTRL");
1093
1094                 /* enter suspend2 mode */
1095                 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
1096                 check_warn_return(ret, "Error reading PM_CTRL");
1097
1098                 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
1099                 val |= PM_CTL_SUS_MODE_2;
1100
1101                 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1102                 check_warn_return(ret, "Error writing PM_CTRL");
1103
1104                 return 0;
1105         }
1106
1107         if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
1108                 u32 *filter_mask = kzalloc(32, GFP_KERNEL);
1109                 u32 command[2];
1110                 u32 offset[2];
1111                 u32 crc[4];
1112                 int i, filter = 0;
1113
1114                 memset(command, 0, sizeof(command));
1115                 memset(offset, 0, sizeof(offset));
1116                 memset(crc, 0, sizeof(crc));
1117
1118                 if (pdata->wolopts & WAKE_BCAST) {
1119                         const u8 bcast[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
1120                         netdev_info(dev->net, "enabling broadcast detection");
1121                         filter_mask[filter * 4] = 0x003F;
1122                         filter_mask[filter * 4 + 1] = 0x00;
1123                         filter_mask[filter * 4 + 2] = 0x00;
1124                         filter_mask[filter * 4 + 3] = 0x00;
1125                         command[filter/4] |= 0x05UL << ((filter % 4) * 8);
1126                         offset[filter/4] |= 0x00 << ((filter % 4) * 8);
1127                         crc[filter/2] |= smsc_crc(bcast, 6, filter);
1128                         filter++;
1129                 }
1130
1131                 if (pdata->wolopts & WAKE_MCAST) {
1132                         const u8 mcast[] = {0x01, 0x00, 0x5E};
1133                         netdev_info(dev->net, "enabling multicast detection");
1134                         filter_mask[filter * 4] = 0x0007;
1135                         filter_mask[filter * 4 + 1] = 0x00;
1136                         filter_mask[filter * 4 + 2] = 0x00;
1137                         filter_mask[filter * 4 + 3] = 0x00;
1138                         command[filter/4] |= 0x09UL << ((filter % 4) * 8);
1139                         offset[filter/4] |= 0x00  << ((filter % 4) * 8);
1140                         crc[filter/2] |= smsc_crc(mcast, 3, filter);
1141                         filter++;
1142                 }
1143
1144                 if (pdata->wolopts & WAKE_ARP) {
1145                         const u8 arp[] = {0x08, 0x06};
1146                         netdev_info(dev->net, "enabling ARP detection");
1147                         filter_mask[filter * 4] = 0x0003;
1148                         filter_mask[filter * 4 + 1] = 0x00;
1149                         filter_mask[filter * 4 + 2] = 0x00;
1150                         filter_mask[filter * 4 + 3] = 0x00;
1151                         command[filter/4] |= 0x05UL << ((filter % 4) * 8);
1152                         offset[filter/4] |= 0x0C << ((filter % 4) * 8);
1153                         crc[filter/2] |= smsc_crc(arp, 2, filter);
1154                         filter++;
1155                 }
1156
1157                 if (pdata->wolopts & WAKE_UCAST) {
1158                         netdev_info(dev->net, "enabling unicast detection");
1159                         filter_mask[filter * 4] = 0x003F;
1160                         filter_mask[filter * 4 + 1] = 0x00;
1161                         filter_mask[filter * 4 + 2] = 0x00;
1162                         filter_mask[filter * 4 + 3] = 0x00;
1163                         command[filter/4] |= 0x01UL << ((filter % 4) * 8);
1164                         offset[filter/4] |= 0x00 << ((filter % 4) * 8);
1165                         crc[filter/2] |= smsc_crc(dev->net->dev_addr, ETH_ALEN, filter);
1166                         filter++;
1167                 }
1168
1169                 for (i = 0; i < (pdata->wuff_filter_count * 4); i++) {
1170                         ret = smsc95xx_write_reg_nopm(dev, WUFF, filter_mask[i]);
1171                         if (ret < 0)
1172                                 kfree(filter_mask);
1173                         check_warn_return(ret, "Error writing WUFF");
1174                 }
1175                 kfree(filter_mask);
1176
1177                 for (i = 0; i < (pdata->wuff_filter_count / 4); i++) {
1178                         ret = smsc95xx_write_reg_nopm(dev, WUFF, command[i]);
1179                         check_warn_return(ret, "Error writing WUFF");
1180                 }
1181
1182                 for (i = 0; i < (pdata->wuff_filter_count / 4); i++) {
1183                         ret = smsc95xx_write_reg_nopm(dev, WUFF, offset[i]);
1184                         check_warn_return(ret, "Error writing WUFF");
1185                 }
1186
1187                 for (i = 0; i < (pdata->wuff_filter_count / 2); i++) {
1188                         ret = smsc95xx_write_reg_nopm(dev, WUFF, crc[i]);
1189                         check_warn_return(ret, "Error writing WUFF");
1190                 }
1191
1192                 /* clear any pending pattern match packet status */
1193                 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
1194                 check_warn_return(ret, "Error reading WUCSR");
1195
1196                 val |= WUCSR_WUFR_;
1197
1198                 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
1199                 check_warn_return(ret, "Error writing WUCSR");
1200         }
1201
1202         if (pdata->wolopts & WAKE_MAGIC) {
1203                 /* clear any pending magic packet status */
1204                 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
1205                 check_warn_return(ret, "Error reading WUCSR");
1206
1207                 val |= WUCSR_MPR_;
1208
1209                 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
1210                 check_warn_return(ret, "Error writing WUCSR");
1211         }
1212
1213         /* enable/disable wakeup sources */
1214         ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
1215         check_warn_return(ret, "Error reading WUCSR");
1216
1217         if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
1218                 netdev_info(dev->net, "enabling pattern match wakeup");
1219                 val |= WUCSR_WAKE_EN_;
1220         } else {
1221                 netdev_info(dev->net, "disabling pattern match wakeup");
1222                 val &= ~WUCSR_WAKE_EN_;
1223         }
1224
1225         if (pdata->wolopts & WAKE_MAGIC) {
1226                 netdev_info(dev->net, "enabling magic packet wakeup");
1227                 val |= WUCSR_MPEN_;
1228         } else {
1229                 netdev_info(dev->net, "disabling magic packet wakeup");
1230                 val &= ~WUCSR_MPEN_;
1231         }
1232
1233         ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
1234         check_warn_return(ret, "Error writing WUCSR");
1235
1236         /* enable wol wakeup source */
1237         ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
1238         check_warn_return(ret, "Error reading PM_CTRL");
1239
1240         val |= PM_CTL_WOL_EN_;
1241
1242         ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1243         check_warn_return(ret, "Error writing PM_CTRL");
1244
1245         /* enable receiver to enable frame reception */
1246         smsc95xx_start_rx_path(dev, 1);
1247
1248         /* some wol options are enabled, so enter SUSPEND0 */
1249         netdev_info(dev->net, "entering SUSPEND0 mode");
1250
1251         ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
1252         check_warn_return(ret, "Error reading PM_CTRL");
1253
1254         val &= (~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_));
1255         val |= PM_CTL_SUS_MODE_0;
1256
1257         ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1258         check_warn_return(ret, "Error writing PM_CTRL");
1259
1260         /* clear wol status */
1261         val &= ~PM_CTL_WUPS_;
1262         val |= PM_CTL_WUPS_WOL_;
1263         ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1264         check_warn_return(ret, "Error writing PM_CTRL");
1265
1266         /* read back PM_CTRL */
1267         ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
1268         check_warn_return(ret, "Error reading PM_CTRL");
1269
1270         smsc95xx_set_feature(dev, USB_DEVICE_REMOTE_WAKEUP);
1271
1272         return 0;
1273 }
1274
1275 static int smsc95xx_resume(struct usb_interface *intf)
1276 {
1277         struct usbnet *dev = usb_get_intfdata(intf);
1278         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1279         int ret;
1280         u32 val;
1281
1282         BUG_ON(!dev);
1283
1284         if (pdata->wolopts) {
1285                 smsc95xx_clear_feature(dev, USB_DEVICE_REMOTE_WAKEUP);
1286
1287                 /* clear wake-up sources */
1288                 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
1289                 check_warn_return(ret, "Error reading WUCSR");
1290
1291                 val &= ~(WUCSR_WAKE_EN_ | WUCSR_MPEN_);
1292
1293                 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
1294                 check_warn_return(ret, "Error writing WUCSR");
1295
1296                 /* clear wake-up status */
1297                 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
1298                 check_warn_return(ret, "Error reading PM_CTRL");
1299
1300                 val &= ~PM_CTL_WOL_EN_;
1301                 val |= PM_CTL_WUPS_;
1302
1303                 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1304                 check_warn_return(ret, "Error writing PM_CTRL");
1305         }
1306
1307         return usbnet_resume(intf);
1308         check_warn_return(ret, "usbnet_resume error");
1309
1310         return 0;
1311 }
1312
1313 static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
1314 {
1315         skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
1316         skb->ip_summed = CHECKSUM_COMPLETE;
1317         skb_trim(skb, skb->len - 2);
1318 }
1319
1320 static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1321 {
1322         while (skb->len > 0) {
1323                 u32 header, align_count;
1324                 struct sk_buff *ax_skb;
1325                 unsigned char *packet;
1326                 u16 size;
1327
1328                 memcpy(&header, skb->data, sizeof(header));
1329                 le32_to_cpus(&header);
1330                 skb_pull(skb, 4 + NET_IP_ALIGN);
1331                 packet = skb->data;
1332
1333                 /* get the packet length */
1334                 size = (u16)((header & RX_STS_FL_) >> 16);
1335                 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
1336
1337                 if (unlikely(header & RX_STS_ES_)) {
1338                         netif_dbg(dev, rx_err, dev->net,
1339                                   "Error header=0x%08x\n", header);
1340                         dev->net->stats.rx_errors++;
1341                         dev->net->stats.rx_dropped++;
1342
1343                         if (header & RX_STS_CRC_) {
1344                                 dev->net->stats.rx_crc_errors++;
1345                         } else {
1346                                 if (header & (RX_STS_TL_ | RX_STS_RF_))
1347                                         dev->net->stats.rx_frame_errors++;
1348
1349                                 if ((header & RX_STS_LE_) &&
1350                                         (!(header & RX_STS_FT_)))
1351                                         dev->net->stats.rx_length_errors++;
1352                         }
1353                 } else {
1354                         /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1355                         if (unlikely(size > (ETH_FRAME_LEN + 12))) {
1356                                 netif_dbg(dev, rx_err, dev->net,
1357                                           "size err header=0x%08x\n", header);
1358                                 return 0;
1359                         }
1360
1361                         /* last frame in this batch */
1362                         if (skb->len == size) {
1363                                 if (dev->net->features & NETIF_F_RXCSUM)
1364                                         smsc95xx_rx_csum_offload(skb);
1365                                 skb_trim(skb, skb->len - 4); /* remove fcs */
1366                                 skb->truesize = size + sizeof(struct sk_buff);
1367
1368                                 return 1;
1369                         }
1370
1371                         ax_skb = skb_clone(skb, GFP_ATOMIC);
1372                         if (unlikely(!ax_skb)) {
1373                                 netdev_warn(dev->net, "Error allocating skb\n");
1374                                 return 0;
1375                         }
1376
1377                         ax_skb->len = size;
1378                         ax_skb->data = packet;
1379                         skb_set_tail_pointer(ax_skb, size);
1380
1381                         if (dev->net->features & NETIF_F_RXCSUM)
1382                                 smsc95xx_rx_csum_offload(ax_skb);
1383                         skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
1384                         ax_skb->truesize = size + sizeof(struct sk_buff);
1385
1386                         usbnet_skb_return(dev, ax_skb);
1387                 }
1388
1389                 skb_pull(skb, size);
1390
1391                 /* padding bytes before the next frame starts */
1392                 if (skb->len)
1393                         skb_pull(skb, align_count);
1394         }
1395
1396         if (unlikely(skb->len < 0)) {
1397                 netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len);
1398                 return 0;
1399         }
1400
1401         return 1;
1402 }
1403
1404 static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
1405 {
1406         u16 low_16 = (u16)skb_checksum_start_offset(skb);
1407         u16 high_16 = low_16 + skb->csum_offset;
1408         return (high_16 << 16) | low_16;
1409 }
1410
1411 static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
1412                                          struct sk_buff *skb, gfp_t flags)
1413 {
1414         bool csum = skb->ip_summed == CHECKSUM_PARTIAL;
1415         int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
1416         u32 tx_cmd_a, tx_cmd_b;
1417
1418         /* We do not advertise SG, so skbs should be already linearized */
1419         BUG_ON(skb_shinfo(skb)->nr_frags);
1420
1421         if (skb_headroom(skb) < overhead) {
1422                 struct sk_buff *skb2 = skb_copy_expand(skb,
1423                         overhead, 0, flags);
1424                 dev_kfree_skb_any(skb);
1425                 skb = skb2;
1426                 if (!skb)
1427                         return NULL;
1428         }
1429
1430         if (csum) {
1431                 if (skb->len <= 45) {
1432                         /* workaround - hardware tx checksum does not work
1433                          * properly with extremely small packets */
1434                         long csstart = skb_checksum_start_offset(skb);
1435                         __wsum calc = csum_partial(skb->data + csstart,
1436                                 skb->len - csstart, 0);
1437                         *((__sum16 *)(skb->data + csstart
1438                                 + skb->csum_offset)) = csum_fold(calc);
1439
1440                         csum = false;
1441                 } else {
1442                         u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
1443                         skb_push(skb, 4);
1444                         cpu_to_le32s(&csum_preamble);
1445                         memcpy(skb->data, &csum_preamble, 4);
1446                 }
1447         }
1448
1449         skb_push(skb, 4);
1450         tx_cmd_b = (u32)(skb->len - 4);
1451         if (csum)
1452                 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
1453         cpu_to_le32s(&tx_cmd_b);
1454         memcpy(skb->data, &tx_cmd_b, 4);
1455
1456         skb_push(skb, 4);
1457         tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ |
1458                 TX_CMD_A_LAST_SEG_;
1459         cpu_to_le32s(&tx_cmd_a);
1460         memcpy(skb->data, &tx_cmd_a, 4);
1461
1462         return skb;
1463 }
1464
1465 static const struct driver_info smsc95xx_info = {
1466         .description    = "smsc95xx USB 2.0 Ethernet",
1467         .bind           = smsc95xx_bind,
1468         .unbind         = smsc95xx_unbind,
1469         .link_reset     = smsc95xx_link_reset,
1470         .reset          = smsc95xx_reset,
1471         .rx_fixup       = smsc95xx_rx_fixup,
1472         .tx_fixup       = smsc95xx_tx_fixup,
1473         .status         = smsc95xx_status,
1474         .flags          = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
1475 };
1476
1477 static const struct usb_device_id products[] = {
1478         {
1479                 /* SMSC9500 USB Ethernet Device */
1480                 USB_DEVICE(0x0424, 0x9500),
1481                 .driver_info = (unsigned long) &smsc95xx_info,
1482         },
1483         {
1484                 /* SMSC9505 USB Ethernet Device */
1485                 USB_DEVICE(0x0424, 0x9505),
1486                 .driver_info = (unsigned long) &smsc95xx_info,
1487         },
1488         {
1489                 /* SMSC9500A USB Ethernet Device */
1490                 USB_DEVICE(0x0424, 0x9E00),
1491                 .driver_info = (unsigned long) &smsc95xx_info,
1492         },
1493         {
1494                 /* SMSC9505A USB Ethernet Device */
1495                 USB_DEVICE(0x0424, 0x9E01),
1496                 .driver_info = (unsigned long) &smsc95xx_info,
1497         },
1498         {
1499                 /* SMSC9512/9514 USB Hub & Ethernet Device */
1500                 USB_DEVICE(0x0424, 0xec00),
1501                 .driver_info = (unsigned long) &smsc95xx_info,
1502         },
1503         {
1504                 /* SMSC9500 USB Ethernet Device (SAL10) */
1505                 USB_DEVICE(0x0424, 0x9900),
1506                 .driver_info = (unsigned long) &smsc95xx_info,
1507         },
1508         {
1509                 /* SMSC9505 USB Ethernet Device (SAL10) */
1510                 USB_DEVICE(0x0424, 0x9901),
1511                 .driver_info = (unsigned long) &smsc95xx_info,
1512         },
1513         {
1514                 /* SMSC9500A USB Ethernet Device (SAL10) */
1515                 USB_DEVICE(0x0424, 0x9902),
1516                 .driver_info = (unsigned long) &smsc95xx_info,
1517         },
1518         {
1519                 /* SMSC9505A USB Ethernet Device (SAL10) */
1520                 USB_DEVICE(0x0424, 0x9903),
1521                 .driver_info = (unsigned long) &smsc95xx_info,
1522         },
1523         {
1524                 /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */
1525                 USB_DEVICE(0x0424, 0x9904),
1526                 .driver_info = (unsigned long) &smsc95xx_info,
1527         },
1528         {
1529                 /* SMSC9500A USB Ethernet Device (HAL) */
1530                 USB_DEVICE(0x0424, 0x9905),
1531                 .driver_info = (unsigned long) &smsc95xx_info,
1532         },
1533         {
1534                 /* SMSC9505A USB Ethernet Device (HAL) */
1535                 USB_DEVICE(0x0424, 0x9906),
1536                 .driver_info = (unsigned long) &smsc95xx_info,
1537         },
1538         {
1539                 /* SMSC9500 USB Ethernet Device (Alternate ID) */
1540                 USB_DEVICE(0x0424, 0x9907),
1541                 .driver_info = (unsigned long) &smsc95xx_info,
1542         },
1543         {
1544                 /* SMSC9500A USB Ethernet Device (Alternate ID) */
1545                 USB_DEVICE(0x0424, 0x9908),
1546                 .driver_info = (unsigned long) &smsc95xx_info,
1547         },
1548         {
1549                 /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */
1550                 USB_DEVICE(0x0424, 0x9909),
1551                 .driver_info = (unsigned long) &smsc95xx_info,
1552         },
1553         {
1554                 /* SMSC LAN9530 USB Ethernet Device */
1555                 USB_DEVICE(0x0424, 0x9530),
1556                 .driver_info = (unsigned long) &smsc95xx_info,
1557         },
1558         {
1559                 /* SMSC LAN9730 USB Ethernet Device */
1560                 USB_DEVICE(0x0424, 0x9730),
1561                 .driver_info = (unsigned long) &smsc95xx_info,
1562         },
1563         {
1564                 /* SMSC LAN89530 USB Ethernet Device */
1565                 USB_DEVICE(0x0424, 0x9E08),
1566                 .driver_info = (unsigned long) &smsc95xx_info,
1567         },
1568         { },            /* END */
1569 };
1570 MODULE_DEVICE_TABLE(usb, products);
1571
1572 static struct usb_driver smsc95xx_driver = {
1573         .name           = "smsc95xx",
1574         .id_table       = products,
1575         .probe          = usbnet_probe,
1576         .suspend        = smsc95xx_suspend,
1577         .resume         = smsc95xx_resume,
1578         .reset_resume   = smsc95xx_resume,
1579         .disconnect     = usbnet_disconnect,
1580         .disable_hub_initiated_lpm = 1,
1581 };
1582
1583 module_usb_driver(smsc95xx_driver);
1584
1585 MODULE_AUTHOR("Nancy Lin");
1586 MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>");
1587 MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
1588 MODULE_LICENSE("GPL");