2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <linux/interrupt.h>
23 #include <linux/leds.h>
24 #include <linux/completion.h>
25 #include <linux/time.h>
35 extern struct ieee80211_ops ath9k_ops;
36 extern int ath9k_modparam_nohwcrypt;
38 extern bool is_ath9k_unloaded;
39 extern int ath9k_use_chanctx;
41 /*************************/
42 /* Descriptor Management */
43 /*************************/
45 #define ATH_TXSTATUS_RING_SIZE 512
47 /* Macro to expand scalars to 64-bit objects */
48 #define ito64(x) (sizeof(x) == 1) ? \
49 (((unsigned long long int)(x)) & (0xff)) : \
51 (((unsigned long long int)(x)) & 0xffff) : \
53 (((unsigned long long int)(x)) & 0xffffffff) : \
54 (unsigned long long int)(x))
56 #define ATH_TXBUF_RESET(_bf) do { \
57 (_bf)->bf_lastbf = NULL; \
58 (_bf)->bf_next = NULL; \
59 memset(&((_bf)->bf_state), 0, \
60 sizeof(struct ath_buf_state)); \
63 #define DS2PHYS(_dd, _ds) \
64 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
65 #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
66 #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
70 dma_addr_t dd_desc_paddr;
74 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
75 struct list_head *head, const char *name,
76 int nbuf, int ndesc, bool is_tx);
82 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
84 /* increment with wrap-around */
85 #define INCR(_l, _sz) do { \
87 (_l) &= ((_sz) - 1); \
92 #define ATH_TXBUF_RESERVE 5
93 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
94 #define ATH_TXMAXTRY 13
95 #define ATH_MAX_SW_RETRIES 30
97 #define TID_TO_WME_AC(_tid) \
98 ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \
99 (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK : \
100 (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI : \
103 #define ATH_AGGR_DELIM_SZ 4
104 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
105 /* number of delimiters for encryption padding */
106 #define ATH_AGGR_ENCRYPTDELIM 10
107 /* minimum h/w qdepth to be sustained to maximize aggregation */
108 #define ATH_AGGR_MIN_QDEPTH 2
109 /* minimum h/w qdepth for non-aggregated traffic */
110 #define ATH_NON_AGGR_MIN_QDEPTH 8
111 #define ATH_TX_COMPLETE_POLL_INT 1000
112 #define ATH_TXFIFO_DEPTH 8
113 #define ATH_TX_ERROR 0x01
115 /* Stop tx traffic 1ms before the GO goes away */
116 #define ATH_P2P_PS_STOP_TIME 1000
118 #define IEEE80211_SEQ_SEQ_SHIFT 4
119 #define IEEE80211_SEQ_MAX 4096
120 #define IEEE80211_WEP_IVLEN 3
121 #define IEEE80211_WEP_KIDLEN 1
122 #define IEEE80211_WEP_CRCLEN 4
123 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
124 (IEEE80211_WEP_IVLEN + \
125 IEEE80211_WEP_KIDLEN + \
126 IEEE80211_WEP_CRCLEN))
128 /* return whether a bit at index _n in bitmap _bm is set
129 * _sz is the size of the bitmap */
130 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
131 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
133 /* return block-ack bitmap index given sequence and starting sequence */
134 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
136 /* return the seqno for _start + _offset */
137 #define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1))
139 /* returns delimiter padding required given the packet length */
140 #define ATH_AGGR_GET_NDELIM(_len) \
141 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
142 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
144 #define BAW_WITHIN(_start, _bawsz, _seqno) \
145 ((((_seqno) - (_start)) & 4095) < (_bawsz))
147 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
149 #define IS_HT_RATE(rate) (rate & 0x80)
150 #define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e))
151 #define IS_OFDM_RATE(rate) ((rate >= 0x8) && (rate <= 0xf))
159 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
160 u32 axq_qnum; /* ath9k hardware queue number */
162 struct list_head axq_q;
167 bool axq_tx_inprogress;
168 struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
172 struct sk_buff_head complete_q;
177 struct list_head list;
178 struct list_head tid_q;
179 bool clear_ps_filter;
183 struct ath_frame_info {
186 enum ath9k_key_type keytype;
194 struct list_head list;
195 struct sk_buff *bf_mpdu;
198 dma_addr_t bf_buf_addr;
202 * enum buffer_type - Buffer type flags
204 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
205 * @BUF_AGGR: Indicates whether the buffer can be aggregated
206 * (used in aggregation scheduling)
213 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
214 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
216 struct ath_buf_state {
222 unsigned long bfs_paprd_timestamp;
226 struct list_head list;
227 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
229 struct ath_buf *bf_next; /* next subframe in the aggregate */
230 struct sk_buff *bf_mpdu; /* enclosing frame structure */
231 void *bf_desc; /* virtual addr of desc */
232 dma_addr_t bf_daddr; /* physical addr of desc */
233 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
234 struct ieee80211_tx_rate rates[4];
235 struct ath_buf_state bf_state;
239 struct list_head list;
240 struct sk_buff_head buf_q;
241 struct sk_buff_head retry_q;
243 struct ath_atx_ac *ac;
244 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
249 int baw_head; /* first un-acked tx buffer */
250 int baw_tail; /* next unused tx buffer slot */
258 struct ath_softc *sc;
259 struct ieee80211_sta *sta; /* station struct we're part of */
260 struct ieee80211_vif *vif; /* interface with which we're associated */
261 struct ath_atx_tid tid[IEEE80211_NUM_TIDS];
262 struct ath_atx_ac ac[IEEE80211_NUM_ACS];
271 #ifdef CONFIG_ATH9K_STATION_STATISTICS
272 struct ath_rx_rate_stats rx_rate_stats;
277 struct ath_tx_control {
280 struct ieee80211_sta *sta;
287 * @txq_map: Index is mac80211 queue number. This is
288 * not necessarily the same as the hardware queue number
294 spinlock_t txbuflock;
295 struct list_head txbuf;
296 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
297 struct ath_descdma txdma;
298 struct ath_txq *txq_map[IEEE80211_NUM_ACS];
299 struct ath_txq *uapsdq;
300 u32 txq_max_pending[IEEE80211_NUM_ACS];
301 u16 max_aggr_framelen[IEEE80211_NUM_ACS][4][32];
305 struct sk_buff_head rx_fifo;
315 unsigned int rxfilter;
316 struct list_head rxbuf;
317 struct ath_descdma rxdma;
318 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
320 struct ath_rxbuf *buf_hold;
321 struct sk_buff *frag;
327 struct cfg80211_chan_def chandef;
328 struct list_head vifs;
329 struct list_head acq[IEEE80211_NUM_ACS];
331 /* do not dereference, use for comparison only */
332 struct ieee80211_vif *primary_sta;
334 struct ath_beacon_config beacon;
335 struct ath9k_hw_cal_data caldata;
336 struct timespec tsf_ts;
344 bool switch_after_beacon;
347 enum ath_chanctx_event {
348 ATH_CHANCTX_EVENT_BEACON_PREPARE,
349 ATH_CHANCTX_EVENT_BEACON_SENT,
350 ATH_CHANCTX_EVENT_TSF_TIMER,
353 enum ath_chanctx_state {
354 ATH_CHANCTX_STATE_IDLE,
355 ATH_CHANCTX_STATE_WAIT_FOR_BEACON,
356 ATH_CHANCTX_STATE_WAIT_FOR_TIMER,
357 ATH_CHANCTX_STATE_SWITCH,
360 struct ath_chanctx_sched {
362 enum ath_chanctx_state state;
365 u32 switch_start_time;
366 unsigned int offchannel_duration;
367 unsigned int channel_switch_time;
370 enum ath_offchannel_state {
372 ATH_OFFCHANNEL_PROBE_SEND,
373 ATH_OFFCHANNEL_PROBE_WAIT,
374 ATH_OFFCHANNEL_SUSPEND,
375 ATH_OFFCHANNEL_ROC_START,
376 ATH_OFFCHANNEL_ROC_WAIT,
377 ATH_OFFCHANNEL_ROC_DONE,
380 struct ath_offchannel {
381 struct ath_chanctx chan;
382 struct timer_list timer;
383 struct cfg80211_scan_request *scan_req;
384 struct ieee80211_vif *scan_vif;
386 enum ath_offchannel_state state;
387 struct ieee80211_channel *roc_chan;
388 struct ieee80211_vif *roc_vif;
392 #define ath_for_each_chanctx(_sc, _ctx) \
393 for (ctx = &sc->chanctx[0]; \
394 ctx <= &sc->chanctx[ARRAY_SIZE(sc->chanctx) - 1]; \
397 void ath9k_fill_chanctx_ops(void);
398 static inline struct ath_chanctx *
399 ath_chanctx_get(struct ieee80211_chanctx_conf *ctx)
401 struct ath_chanctx **ptr = (void *) ctx->drv_priv;
404 void ath_chanctx_init(struct ath_softc *sc);
405 void ath_chanctx_set_channel(struct ath_softc *sc, struct ath_chanctx *ctx,
406 struct cfg80211_chan_def *chandef);
407 void ath_chanctx_switch(struct ath_softc *sc, struct ath_chanctx *ctx,
408 struct cfg80211_chan_def *chandef);
409 void ath_chanctx_check_active(struct ath_softc *sc, struct ath_chanctx *ctx);
410 void ath_offchannel_timer(unsigned long data);
411 void ath_offchannel_channel_change(struct ath_softc *sc);
412 void ath_chanctx_offchan_switch(struct ath_softc *sc,
413 struct ieee80211_channel *chan);
414 struct ath_chanctx *ath_chanctx_get_oper_chan(struct ath_softc *sc,
416 void ath_chanctx_event(struct ath_softc *sc, struct ieee80211_vif *vif,
417 enum ath_chanctx_event ev);
419 int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan);
420 int ath_startrecv(struct ath_softc *sc);
421 bool ath_stoprecv(struct ath_softc *sc);
422 u32 ath_calcrxfilter(struct ath_softc *sc);
423 int ath_rx_init(struct ath_softc *sc, int nbufs);
424 void ath_rx_cleanup(struct ath_softc *sc);
425 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
426 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
427 void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq);
428 void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq);
429 void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq);
430 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
431 bool ath_drain_all_txq(struct ath_softc *sc);
432 void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq);
433 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
434 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
435 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
436 void ath_txq_schedule_all(struct ath_softc *sc);
437 int ath_tx_init(struct ath_softc *sc, int nbufs);
438 int ath_txq_update(struct ath_softc *sc, int qnum,
439 struct ath9k_tx_queue_info *q);
440 void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);
441 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
442 struct ath_tx_control *txctl);
443 void ath_tx_cabq(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
444 struct sk_buff *skb);
445 void ath_tx_tasklet(struct ath_softc *sc);
446 void ath_tx_edma_tasklet(struct ath_softc *sc);
447 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
449 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
450 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
452 void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an);
453 void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc,
454 struct ath_node *an);
455 void ath9k_release_buffered_frames(struct ieee80211_hw *hw,
456 struct ieee80211_sta *sta,
457 u16 tids, int nframes,
458 enum ieee80211_frame_release_type reason,
466 struct list_head list;
468 struct ieee80211_vif *vif;
469 struct ath_node mcast_node;
471 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
472 struct ath_buf *av_bcbuf;
473 struct ath_chanctx *chanctx;
476 struct ieee80211_noa_data noa;
480 u32 offchannel_start;
481 u32 offchannel_duration;
484 struct ath9k_vif_iter_data {
485 u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */
486 u8 mask[ETH_ALEN]; /* bssid mask */
491 int naps; /* number of AP vifs */
492 int nmeshes; /* number of mesh vifs */
493 int nstations; /* number of station vifs */
494 int nwds; /* number of WDS vifs */
495 int nadhocs; /* number of adhoc vifs */
496 struct ieee80211_vif *primary_sta;
499 void ath9k_calculate_iter_data(struct ath_softc *sc,
500 struct ath_chanctx *ctx,
501 struct ath9k_vif_iter_data *iter_data);
502 void ath9k_calculate_summary_state(struct ath_softc *sc,
503 struct ath_chanctx *ctx);
505 /*******************/
506 /* Beacon Handling */
507 /*******************/
510 * Regardless of the number of beacons we stagger, (i.e. regardless of the
511 * number of BSSIDs) if a given beacon does not go out even after waiting this
512 * number of beacon intervals, the game's up.
514 #define BSTUCK_THRESH 9
516 #define ATH_DEFAULT_BINTVAL 100 /* TU */
517 #define ATH_DEFAULT_BMISS_LIMIT 10
519 #define TSF_TO_TU(_h,_l) \
520 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
524 OK, /* no change needed */
525 UPDATE, /* update pending */
526 COMMIT /* beacon sent, commit change */
527 } updateslot; /* slot time update fsm */
531 struct ieee80211_vif *bslot[ATH_BCBUF];
534 struct ath_descdma bdma;
535 struct ath_txq *cabq;
536 struct list_head bbuf;
542 void ath9k_beacon_tasklet(unsigned long data);
543 void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif,
545 void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
546 void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
547 void ath9k_set_beacon(struct ath_softc *sc);
548 bool ath9k_csa_is_finished(struct ath_softc *sc, struct ieee80211_vif *vif);
549 void ath9k_csa_update(struct ath_softc *sc);
551 /*******************/
552 /* Link Monitoring */
553 /*******************/
555 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
556 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
557 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */
558 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */
559 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */
560 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
561 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
562 #define ATH_ANI_MAX_SKIP_COUNT 10
563 #define ATH_PAPRD_TIMEOUT 100 /* msecs */
564 #define ATH_PLL_WORK_INTERVAL 100
566 void ath_chanctx_work(struct work_struct *work);
567 void ath_tx_complete_poll_work(struct work_struct *work);
568 void ath_reset_work(struct work_struct *work);
569 bool ath_hw_check(struct ath_softc *sc);
570 void ath_hw_pll_work(struct work_struct *work);
571 void ath_paprd_calibrate(struct work_struct *work);
572 void ath_ani_calibrate(unsigned long data);
573 void ath_start_ani(struct ath_softc *sc);
574 void ath_stop_ani(struct ath_softc *sc);
575 void ath_check_ani(struct ath_softc *sc);
576 int ath_update_survey_stats(struct ath_softc *sc);
577 void ath_update_survey_nf(struct ath_softc *sc, int channel);
578 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type);
579 void ath_ps_full_sleep(unsigned long data);
580 void ath9k_p2p_ps_timer(void *priv);
581 void ath9k_update_p2p_ps(struct ath_softc *sc, struct ieee80211_vif *vif);
582 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop);
588 #define ATH_DUMP_BTCOEX(_s, _val) \
590 len += scnprintf(buf + len, size - len, \
591 "%20s : %10d\n", _s, (_val)); \
595 BT_OP_PRIORITY_DETECTED,
600 spinlock_t btcoex_lock;
601 struct timer_list period_timer; /* Timer for BT period */
602 struct timer_list no_stomp_timer;
604 unsigned long bt_priority_time;
605 unsigned long op_flags;
606 int bt_stomp_type; /* Types of BT stomping */
607 u32 btcoex_no_stomp; /* in msec */
608 u32 btcoex_period; /* in msec */
609 u32 btscan_no_stomp; /* in msec */
613 struct ath_mci_profile mci;
617 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
618 int ath9k_init_btcoex(struct ath_softc *sc);
619 void ath9k_deinit_btcoex(struct ath_softc *sc);
620 void ath9k_start_btcoex(struct ath_softc *sc);
621 void ath9k_stop_btcoex(struct ath_softc *sc);
622 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
623 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
624 void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status);
625 u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen);
626 void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc);
627 int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size);
629 static inline int ath9k_init_btcoex(struct ath_softc *sc)
633 static inline void ath9k_deinit_btcoex(struct ath_softc *sc)
636 static inline void ath9k_start_btcoex(struct ath_softc *sc)
639 static inline void ath9k_stop_btcoex(struct ath_softc *sc)
642 static inline void ath9k_btcoex_handle_interrupt(struct ath_softc *sc,
646 static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc,
647 u32 max_4ms_framelen)
651 static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc)
654 static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
658 #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
660 /********************/
662 /********************/
664 #define ATH_LED_PIN_DEF 1
665 #define ATH_LED_PIN_9287 8
666 #define ATH_LED_PIN_9300 10
667 #define ATH_LED_PIN_9485 6
668 #define ATH_LED_PIN_9462 4
670 #ifdef CONFIG_MAC80211_LEDS
671 void ath_init_leds(struct ath_softc *sc);
672 void ath_deinit_leds(struct ath_softc *sc);
673 void ath_fill_led_pin(struct ath_softc *sc);
675 static inline void ath_init_leds(struct ath_softc *sc)
679 static inline void ath_deinit_leds(struct ath_softc *sc)
682 static inline void ath_fill_led_pin(struct ath_softc *sc)
687 /************************/
688 /* Wake on Wireless LAN */
689 /************************/
691 struct ath9k_wow_pattern {
692 u8 pattern_bytes[MAX_PATTERN_SIZE];
693 u8 mask_bytes[MAX_PATTERN_SIZE];
697 #ifdef CONFIG_ATH9K_WOW
698 void ath9k_init_wow(struct ieee80211_hw *hw);
699 int ath9k_suspend(struct ieee80211_hw *hw,
700 struct cfg80211_wowlan *wowlan);
701 int ath9k_resume(struct ieee80211_hw *hw);
702 void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled);
704 static inline void ath9k_init_wow(struct ieee80211_hw *hw)
707 static inline int ath9k_suspend(struct ieee80211_hw *hw,
708 struct cfg80211_wowlan *wowlan)
712 static inline int ath9k_resume(struct ieee80211_hw *hw)
716 static inline void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
719 #endif /* CONFIG_ATH9K_WOW */
721 /*******************************/
722 /* Antenna diversity/combining */
723 /*******************************/
725 #define ATH_ANT_RX_CURRENT_SHIFT 4
726 #define ATH_ANT_RX_MAIN_SHIFT 2
727 #define ATH_ANT_RX_MASK 0x3
729 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
730 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
731 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
732 #define ATH_ANT_DIV_COMB_INIT_COUNT 95
733 #define ATH_ANT_DIV_COMB_MAX_COUNT 100
734 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
735 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
736 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50
737 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50
739 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
740 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
741 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
743 struct ath_ant_comb {
763 enum ath9k_ant_div_comb_lna_conf main_conf;
764 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf;
765 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf;
768 unsigned long scan_start_time;
771 * Card-specific config values.
777 void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs);
779 /********************/
780 /* Main driver core */
781 /********************/
783 #define ATH9K_PCI_CUS198 0x0001
784 #define ATH9K_PCI_CUS230 0x0002
785 #define ATH9K_PCI_CUS217 0x0004
786 #define ATH9K_PCI_CUS252 0x0008
787 #define ATH9K_PCI_WOW 0x0010
788 #define ATH9K_PCI_BT_ANT_DIV 0x0020
789 #define ATH9K_PCI_D3_L1_WAR 0x0040
790 #define ATH9K_PCI_AR9565_1ANT 0x0080
791 #define ATH9K_PCI_AR9565_2ANT 0x0100
792 #define ATH9K_PCI_NO_PLL_PWRSAVE 0x0200
793 #define ATH9K_PCI_KILLER 0x0400
796 * Default cache line size, in bytes.
797 * Used when PCI device not fully initialized by bootrom/BIOS
799 #define DEFAULT_CACHELINE 32
800 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
801 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
802 #define MAX_GTT_CNT 5
804 /* Powersave flags */
805 #define PS_WAIT_FOR_BEACON BIT(0)
806 #define PS_WAIT_FOR_CAB BIT(1)
807 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2)
808 #define PS_WAIT_FOR_TX_ACK BIT(3)
809 #define PS_BEACON_SYNC BIT(4)
810 #define PS_WAIT_FOR_ANI BIT(5)
812 #define ATH9K_NUM_CHANCTX 2 /* supports 2 operating channels */
815 struct ieee80211_hw *hw;
818 struct survey_info *cur_survey;
819 struct survey_info survey[ATH9K_NUM_CHANNELS];
821 struct tasklet_struct intr_tq;
822 struct tasklet_struct bcon_tasklet;
823 struct ath_hw *sc_ah;
826 spinlock_t sc_serial_rw;
827 spinlock_t sc_pm_lock;
828 spinlock_t sc_pcu_lock;
830 struct work_struct paprd_work;
831 struct work_struct hw_reset_work;
832 struct work_struct chanctx_work;
833 struct completion paprd_complete;
834 wait_queue_head_t tx_wait;
836 struct ath_gen_timer *p2p_ps_timer;
837 struct ath_vif *p2p_ps_vif;
839 unsigned long driver_data;
843 u16 ps_flags; /* PS_* */
849 unsigned long ps_usecount;
853 struct ath_beacon beacon;
855 struct cfg80211_chan_def cur_chandef;
856 struct ath_chanctx chanctx[ATH9K_NUM_CHANCTX];
857 struct ath_chanctx *cur_chan;
858 struct ath_chanctx *next_chan;
859 spinlock_t chan_lock;
860 struct ath_offchannel offchannel;
861 struct ath_chanctx_sched sched;
863 #ifdef CONFIG_MAC80211_LEDS
866 struct led_classdev led_cdev;
869 #ifdef CONFIG_ATH9K_DEBUGFS
870 struct ath9k_debug debug;
872 struct delayed_work tx_complete_work;
873 struct delayed_work hw_pll_work;
874 struct timer_list sleep_timer;
876 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
877 struct ath_btcoex btcoex;
878 struct ath_mci_coex mci_coex;
879 struct work_struct mci_work;
882 struct ath_descdma txsdma;
884 struct ath_ant_comb ant_comb;
886 struct dfs_pattern_detector *dfs_detector;
887 u64 dfs_prev_pulse_ts;
889 /* relay(fs) channel for spectral scan */
890 struct rchan *rfs_chan_spec_scan;
891 enum spectral_mode spectral_mode;
892 struct ath_spec_scan spec_config;
894 struct ieee80211_vif *tx99_vif;
895 struct sk_buff *tx99_skb;
899 #ifdef CONFIG_ATH9K_WOW
900 atomic_t wow_got_bmiss_intr;
901 atomic_t wow_sleep_proc_intr; /* in the middle of WoW sleep ? */
902 u32 wow_intr_before_sleep;
910 #ifdef CONFIG_ATH9K_TX99
911 void ath9k_tx99_init_debug(struct ath_softc *sc);
912 int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,
913 struct ath_tx_control *txctl);
915 static inline void ath9k_tx99_init_debug(struct ath_softc *sc)
918 static inline int ath9k_tx99_send(struct ath_softc *sc,
920 struct ath_tx_control *txctl)
924 #endif /* CONFIG_ATH9K_TX99 */
926 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
928 common->bus_ops->read_cachesize(common, csz);
931 void ath9k_tasklet(unsigned long data);
932 int ath_cabq_update(struct ath_softc *);
933 u8 ath9k_parse_mpdudensity(u8 mpdudensity);
934 irqreturn_t ath_isr(int irq, void *dev);
935 int ath_reset(struct ath_softc *sc);
936 void ath_cancel_work(struct ath_softc *sc);
937 void ath_restart_work(struct ath_softc *sc);
938 int ath9k_init_device(u16 devid, struct ath_softc *sc,
939 const struct ath_bus_ops *bus_ops);
940 void ath9k_deinit_device(struct ath_softc *sc);
941 void ath9k_reload_chainmask_settings(struct ath_softc *sc);
942 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
943 void ath_start_rfkill_poll(struct ath_softc *sc);
944 void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
945 void ath9k_ps_wakeup(struct ath_softc *sc);
946 void ath9k_ps_restore(struct ath_softc *sc);
948 #ifdef CONFIG_ATH9K_PCI
949 int ath_pci_init(void);
950 void ath_pci_exit(void);
952 static inline int ath_pci_init(void) { return 0; };
953 static inline void ath_pci_exit(void) {};
956 #ifdef CONFIG_ATH9K_AHB
957 int ath_ahb_init(void);
958 void ath_ahb_exit(void);
960 static inline int ath_ahb_init(void) { return 0; };
961 static inline void ath_ahb_exit(void) {};