2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
22 #include "dfs_debug.h"
27 #ifdef CONFIG_ATH9K_DEBUGFS
28 #define TX_STAT_INC(q, c) sc->debug.stats.txstats[q].c++
29 #define RESET_STAT_INC(sc, type) sc->debug.stats.reset[type]++
31 #define TX_STAT_INC(q, c) do { } while (0)
32 #define RESET_STAT_INC(sc, type) do { } while (0)
35 #ifdef CONFIG_ATH9K_DEBUGFS
38 * struct ath_interrupt_stats - Contains statistics about interrupts
39 * @total: Total no. of interrupts generated so far
40 * @rxok: RX with no errors
41 * @rxlp: RX with low priority RX
42 * @rxhp: RX with high priority, uapsd only
43 * @rxeol: RX with no more RXDESC available
44 * @rxorn: RX FIFO overrun
45 * @txok: TX completed at the requested rate
46 * @txurn: TX FIFO underrun
47 * @mib: MIB regs reaching its threshold
48 * @rxphyerr: RX with phy errors
49 * @rx_keycache_miss: RX with key cache misses
50 * @swba: Software Beacon Alert
52 * @bnr: Beacon Not Ready
53 * @cst: Carrier Sense TImeout
54 * @gtt: Global TX Timeout
55 * @tim: RX beacon TIM occurrence
56 * @cabend: RX End of CAB traffic
57 * @dtimsync: DTIM sync lossage
58 * @dtim: RX Beacon with DTIM
59 * @bb_watchdog: Baseband watchdog
60 * @tsfoor: TSF out of range, indicates that the corrected TSF received
61 * from a beacon differs from the PCU's internal TSF by more than a
62 * (programmable) threshold
64 struct ath_interrupt_stats {
91 * struct ath_tx_stats - Statistics about TX
92 * @tx_pkts_all: No. of total frames transmitted, including ones that
94 * @tx_bytes_all: No. of total bytes transmitted, including ones that
96 * @queued: Total MPDUs (non-aggr) queued
97 * @completed: Total MPDUs (non-aggr) completed
98 * @a_aggr: Total no. of aggregates queued
99 * @a_queued_hw: Total AMPDUs queued to hardware
100 * @a_queued_sw: Total AMPDUs queued to software queues
101 * @a_completed: Total AMPDUs completed
102 * @a_retries: No. of AMPDUs retried (SW)
103 * @a_xretries: No. of AMPDUs dropped due to xretries
104 * @fifo_underrun: FIFO underrun occurrences
106 - non-aggregate condition.
107 - first packet of aggregate.
108 * @xtxop: No. of frames filtered because of TXOP limit
109 * @timer_exp: Transmit timer expiry
110 * @desc_cfg_err: Descriptor configuration errors
111 * @data_urn: TX data underrun errors
112 * @delim_urn: TX delimiter underrun errors
113 * @puttxbuf: Number of times hardware was given txbuf to write.
114 * @txstart: Number of times hardware was told to start tx.
115 * @txprocdesc: Number of times tx descriptor was processed
116 * @txfailed: Out-of-memory or other errors in xmit path.
118 struct ath_tx_stats {
143 * struct ath_rx_stats - RX Statistics
144 * @rx_pkts_all: No. of total frames received, including ones that
146 * @rx_bytes_all: No. of total bytes received, including ones that
148 * @crc_err: No. of frames with incorrect CRC value
149 * @decrypt_crc_err: No. of frames whose CRC check failed after
150 decryption process completed
151 * @phy_err: No. of frames whose reception failed because the PHY
153 * @mic_err: No. of frames with incorrect TKIP MIC verification failure
154 * @pre_delim_crc_err: Pre-Frame delimiter CRC error detections
155 * @post_delim_crc_err: Post-Frame delimiter CRC error detections
156 * @decrypt_busy_err: Decryption interruptions counter
157 * @phy_err_stats: Individual PHY error statistics
159 struct ath_rx_stats {
166 u32 pre_delim_crc_err;
167 u32 post_delim_crc_err;
168 u32 decrypt_busy_err;
169 u32 phy_err_stats[ATH9K_PHYERR_MAX];
172 enum ath_reset_type {
174 RESET_TYPE_BB_WATCHDOG,
175 RESET_TYPE_FATAL_INT,
184 struct ath_interrupt_stats istats;
185 struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES];
186 struct ath_rx_stats rxstats;
187 struct ath_dfs_stats dfs_stats;
188 u32 reset[__RESET_TYPE_MAX];
191 #define ATH_DBG_MAX_SAMPLES 10
192 struct ath_dbg_bb_mac_samp {
193 u32 dma_dbg_reg_vals[ATH9K_NUM_DMA_DEBUG_REGS];
194 u32 pcu_obs, pcu_cr, noise;
212 } ts[ATH_DBG_MAX_SAMPLES];
225 } rs[ATH_DBG_MAX_SAMPLES];
226 struct ath_cycle_counters cc;
227 struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS];
231 struct dentry *debugfs_phy;
233 struct ath_stats stats;
234 #ifdef CONFIG_ATH9K_MAC_DEBUG
235 spinlock_t samp_lock;
236 struct ath_dbg_bb_mac_samp bb_mac_samp[ATH_DBG_MAX_SAMPLES];
243 int ath9k_init_debug(struct ath_hw *ah);
245 void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status);
246 void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
247 struct ath_tx_status *ts, struct ath_txq *txq,
249 void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs);
253 static inline int ath9k_init_debug(struct ath_hw *ah)
258 static inline void ath_debug_stat_interrupt(struct ath_softc *sc,
259 enum ath9k_int status)
263 static inline void ath_debug_stat_tx(struct ath_softc *sc,
265 struct ath_tx_status *ts,
271 static inline void ath_debug_stat_rx(struct ath_softc *sc,
272 struct ath_rx_status *rs)
276 #endif /* CONFIG_ATH9K_DEBUGFS */
278 #ifdef CONFIG_ATH9K_MAC_DEBUG
280 void ath9k_debug_samp_bb_mac(struct ath_softc *sc);
284 static inline void ath9k_debug_samp_bb_mac(struct ath_softc *sc)