2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
22 #include "dfs_debug.h"
27 #ifdef CONFIG_ATH9K_DEBUGFS
28 #define TX_STAT_INC(q, c) sc->debug.stats.txstats[q].c++
29 #define RESET_STAT_INC(sc, type) sc->debug.stats.reset[type]++
31 #define TX_STAT_INC(q, c) do { } while (0)
32 #define RESET_STAT_INC(sc, type) do { } while (0)
37 RESET_TYPE_BB_WATCHDOG,
43 RESET_TYPE_BEACON_STUCK,
47 #ifdef CONFIG_ATH9K_DEBUGFS
50 * struct ath_interrupt_stats - Contains statistics about interrupts
51 * @total: Total no. of interrupts generated so far
52 * @rxok: RX with no errors
53 * @rxlp: RX with low priority RX
54 * @rxhp: RX with high priority, uapsd only
55 * @rxeol: RX with no more RXDESC available
56 * @rxorn: RX FIFO overrun
57 * @txok: TX completed at the requested rate
58 * @txurn: TX FIFO underrun
59 * @mib: MIB regs reaching its threshold
60 * @rxphyerr: RX with phy errors
61 * @rx_keycache_miss: RX with key cache misses
62 * @swba: Software Beacon Alert
64 * @bnr: Beacon Not Ready
65 * @cst: Carrier Sense TImeout
66 * @gtt: Global TX Timeout
67 * @tim: RX beacon TIM occurrence
68 * @cabend: RX End of CAB traffic
69 * @dtimsync: DTIM sync lossage
70 * @dtim: RX Beacon with DTIM
71 * @bb_watchdog: Baseband watchdog
72 * @tsfoor: TSF out of range, indicates that the corrected TSF received
73 * from a beacon differs from the PCU's internal TSF by more than a
74 * (programmable) threshold
75 * @local_timeout: Internal bus timeout.
76 * @mci: MCI interrupt, specific to MCI based BTCOEX chipsets
77 * @gen_timer: Generic hardware timer interrupt
79 struct ath_interrupt_stats {
106 /* Sync-cause stats */
110 u32 eeprom_illegal_access;
112 u32 pci_mode_conflict;
117 u32 radm_cpl_dllp_abort;
118 u32 radm_cpl_tlp_abort;
119 u32 radm_cpl_ecrc_err;
120 u32 radm_cpl_timeout;
125 u32 mac_sleep_access;
130 * struct ath_tx_stats - Statistics about TX
131 * @tx_pkts_all: No. of total frames transmitted, including ones that
133 * @tx_bytes_all: No. of total bytes transmitted, including ones that
135 * @queued: Total MPDUs (non-aggr) queued
136 * @completed: Total MPDUs (non-aggr) completed
137 * @a_aggr: Total no. of aggregates queued
138 * @a_queued_hw: Total AMPDUs queued to hardware
139 * @a_queued_sw: Total AMPDUs queued to software queues
140 * @a_completed: Total AMPDUs completed
141 * @a_retries: No. of AMPDUs retried (SW)
142 * @a_xretries: No. of AMPDUs dropped due to xretries
143 * @fifo_underrun: FIFO underrun occurrences
145 - non-aggregate condition.
146 - first packet of aggregate.
147 * @xtxop: No. of frames filtered because of TXOP limit
148 * @timer_exp: Transmit timer expiry
149 * @desc_cfg_err: Descriptor configuration errors
150 * @data_urn: TX data underrun errors
151 * @delim_urn: TX delimiter underrun errors
152 * @puttxbuf: Number of times hardware was given txbuf to write.
153 * @txstart: Number of times hardware was told to start tx.
154 * @txprocdesc: Number of times tx descriptor was processed
155 * @txfailed: Out-of-memory or other errors in xmit path.
157 struct ath_tx_stats {
181 #define RX_STAT_INC(c) (sc->debug.stats.rxstats.c++)
184 * struct ath_rx_stats - RX Statistics
185 * @rx_pkts_all: No. of total frames received, including ones that
187 * @rx_bytes_all: No. of total bytes received, including ones that
189 * @crc_err: No. of frames with incorrect CRC value
190 * @decrypt_crc_err: No. of frames whose CRC check failed after
191 decryption process completed
192 * @phy_err: No. of frames whose reception failed because the PHY
194 * @mic_err: No. of frames with incorrect TKIP MIC verification failure
195 * @pre_delim_crc_err: Pre-Frame delimiter CRC error detections
196 * @post_delim_crc_err: Post-Frame delimiter CRC error detections
197 * @decrypt_busy_err: Decryption interruptions counter
198 * @phy_err_stats: Individual PHY error statistics
199 * @rx_len_err: No. of frames discarded due to bad length.
200 * @rx_oom_err: No. of frames dropped due to OOM issues.
201 * @rx_rate_err: No. of frames dropped due to rate errors.
202 * @rx_too_many_frags_err: Frames dropped due to too-many-frags received.
203 * @rx_drop_rxflush: No. of frames dropped due to RX-FLUSH.
204 * @rx_beacons: No. of beacons received.
205 * @rx_frags: No. of rx-fragements received.
207 struct ath_rx_stats {
214 u32 pre_delim_crc_err;
215 u32 post_delim_crc_err;
216 u32 decrypt_busy_err;
217 u32 phy_err_stats[ATH9K_PHYERR_MAX];
221 u32 rx_too_many_frags_err;
228 struct ath_interrupt_stats istats;
229 struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES];
230 struct ath_rx_stats rxstats;
231 struct ath_dfs_stats dfs_stats;
232 u32 reset[__RESET_TYPE_MAX];
235 #define ATH_DBG_MAX_SAMPLES 10
236 struct ath_dbg_bb_mac_samp {
237 u32 dma_dbg_reg_vals[ATH9K_NUM_DMA_DEBUG_REGS];
238 u32 pcu_obs, pcu_cr, noise;
256 } ts[ATH_DBG_MAX_SAMPLES];
269 } rs[ATH_DBG_MAX_SAMPLES];
270 struct ath_cycle_counters cc;
271 struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS];
275 struct dentry *debugfs_phy;
277 struct ath_stats stats;
278 #ifdef CONFIG_ATH9K_MAC_DEBUG
279 spinlock_t samp_lock;
280 struct ath_dbg_bb_mac_samp bb_mac_samp[ATH_DBG_MAX_SAMPLES];
287 int ath9k_init_debug(struct ath_hw *ah);
289 void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status);
290 void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
291 struct ath_tx_status *ts, struct ath_txq *txq,
293 void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs);
297 #define RX_STAT_INC(c) /* NOP */
299 static inline int ath9k_init_debug(struct ath_hw *ah)
304 static inline void ath_debug_stat_interrupt(struct ath_softc *sc,
305 enum ath9k_int status)
309 static inline void ath_debug_stat_tx(struct ath_softc *sc,
311 struct ath_tx_status *ts,
317 static inline void ath_debug_stat_rx(struct ath_softc *sc,
318 struct ath_rx_status *rs)
322 #endif /* CONFIG_ATH9K_DEBUGFS */
324 #ifdef CONFIG_ATH9K_MAC_DEBUG
326 void ath9k_debug_samp_bb_mac(struct ath_softc *sc);
330 static inline void ath9k_debug_samp_bb_mac(struct ath_softc *sc)