2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
22 static u8 parse_mpdudensity(u8 mpdudensity)
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
35 switch (mpdudensity) {
41 /* Our lower layer calculations limit our precision to
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
61 spin_lock_bh(&txq->axq_lock);
63 if (txq->axq_depth || !list_empty(&txq->axq_acq))
66 spin_unlock_bh(&txq->axq_lock);
70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
75 spin_lock_irqsave(&sc->sc_pm_lock, flags);
76 ret = ath9k_hw_setpower(sc->sc_ah, mode);
77 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
82 void ath9k_ps_wakeup(struct ath_softc *sc)
84 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
86 enum ath9k_power_mode power_mode;
88 spin_lock_irqsave(&sc->sc_pm_lock, flags);
89 if (++sc->ps_usecount != 1)
92 power_mode = sc->sc_ah->power_mode;
93 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
96 * While the hardware is asleep, the cycle counters contain no
97 * useful data. Better clear them now so that they don't mess up
98 * survey data results.
100 if (power_mode != ATH9K_PM_AWAKE) {
101 spin_lock(&common->cc_lock);
102 ath_hw_cycle_counters_update(common);
103 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
104 spin_unlock(&common->cc_lock);
108 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
111 void ath9k_ps_restore(struct ath_softc *sc)
113 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
114 enum ath9k_power_mode mode;
117 spin_lock_irqsave(&sc->sc_pm_lock, flags);
118 if (--sc->ps_usecount != 0)
121 if (sc->ps_idle && (sc->ps_flags & PS_WAIT_FOR_TX_ACK))
122 mode = ATH9K_PM_FULL_SLEEP;
123 else if (sc->ps_enabled &&
124 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
126 PS_WAIT_FOR_PSPOLL_DATA |
127 PS_WAIT_FOR_TX_ACK)))
128 mode = ATH9K_PM_NETWORK_SLEEP;
132 spin_lock(&common->cc_lock);
133 ath_hw_cycle_counters_update(common);
134 spin_unlock(&common->cc_lock);
136 ath9k_hw_setpower(sc->sc_ah, mode);
139 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
142 void ath_start_ani(struct ath_common *common)
144 struct ath_hw *ah = common->ah;
145 unsigned long timestamp = jiffies_to_msecs(jiffies);
146 struct ath_softc *sc = (struct ath_softc *) common->priv;
148 if (!(sc->sc_flags & SC_OP_ANI_RUN))
151 if (sc->sc_flags & SC_OP_OFFCHANNEL)
154 common->ani.longcal_timer = timestamp;
155 common->ani.shortcal_timer = timestamp;
156 common->ani.checkani_timer = timestamp;
158 mod_timer(&common->ani.timer,
160 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
163 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
165 struct ath_hw *ah = sc->sc_ah;
166 struct ath9k_channel *chan = &ah->channels[channel];
167 struct survey_info *survey = &sc->survey[channel];
169 if (chan->noisefloor) {
170 survey->filled |= SURVEY_INFO_NOISE_DBM;
171 survey->noise = ath9k_hw_getchan_noise(ah, chan);
176 * Updates the survey statistics and returns the busy time since last
177 * update in %, if the measurement duration was long enough for the
178 * result to be useful, -1 otherwise.
180 static int ath_update_survey_stats(struct ath_softc *sc)
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 int pos = ah->curchan - &ah->channels[0];
185 struct survey_info *survey = &sc->survey[pos];
186 struct ath_cycle_counters *cc = &common->cc_survey;
187 unsigned int div = common->clockrate * 1000;
193 if (ah->power_mode == ATH9K_PM_AWAKE)
194 ath_hw_cycle_counters_update(common);
196 if (cc->cycles > 0) {
197 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
198 SURVEY_INFO_CHANNEL_TIME_BUSY |
199 SURVEY_INFO_CHANNEL_TIME_RX |
200 SURVEY_INFO_CHANNEL_TIME_TX;
201 survey->channel_time += cc->cycles / div;
202 survey->channel_time_busy += cc->rx_busy / div;
203 survey->channel_time_rx += cc->rx_frame / div;
204 survey->channel_time_tx += cc->tx_frame / div;
207 if (cc->cycles < div)
211 ret = cc->rx_busy * 100 / cc->cycles;
213 memset(cc, 0, sizeof(*cc));
215 ath_update_survey_nf(sc, pos);
220 static void __ath_cancel_work(struct ath_softc *sc)
222 cancel_work_sync(&sc->paprd_work);
223 cancel_work_sync(&sc->hw_check_work);
224 cancel_delayed_work_sync(&sc->tx_complete_work);
225 cancel_delayed_work_sync(&sc->hw_pll_work);
228 static void ath_cancel_work(struct ath_softc *sc)
230 __ath_cancel_work(sc);
231 cancel_work_sync(&sc->hw_reset_work);
234 static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
236 struct ath_hw *ah = sc->sc_ah;
237 struct ath_common *common = ath9k_hw_common(ah);
240 ieee80211_stop_queues(sc->hw);
242 sc->hw_busy_count = 0;
243 del_timer_sync(&common->ani.timer);
244 del_timer_sync(&sc->rx_poll_timer);
246 ath9k_debug_samp_bb_mac(sc);
247 ath9k_hw_disable_interrupts(ah);
249 ret = ath_drain_all_txq(sc, retry_tx);
251 if (!ath_stoprecv(sc))
255 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
256 ath_rx_tasklet(sc, 1, true);
257 ath_rx_tasklet(sc, 1, false);
265 static bool ath_complete_reset(struct ath_softc *sc, bool start)
267 struct ath_hw *ah = sc->sc_ah;
268 struct ath_common *common = ath9k_hw_common(ah);
270 if (ath_startrecv(sc) != 0) {
271 ath_err(common, "Unable to restart recv logic\n");
275 ath9k_cmn_update_txpow(ah, sc->curtxpow,
276 sc->config.txpowlimit, &sc->curtxpow);
277 ath9k_hw_set_interrupts(ah);
278 ath9k_hw_enable_interrupts(ah);
280 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
281 if (sc->sc_flags & SC_OP_BEACONS)
284 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
285 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
286 ath_start_rx_poll(sc, 3);
287 if (!common->disable_ani)
288 ath_start_ani(common);
291 if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3) {
292 struct ath_hw_antcomb_conf div_ant_conf;
295 ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
298 lna_conf = ATH_ANT_DIV_COMB_LNA1;
300 lna_conf = ATH_ANT_DIV_COMB_LNA2;
301 div_ant_conf.main_lna_conf = lna_conf;
302 div_ant_conf.alt_lna_conf = lna_conf;
304 ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
307 ieee80211_wake_queues(sc->hw);
312 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
315 struct ath_hw *ah = sc->sc_ah;
316 struct ath_common *common = ath9k_hw_common(ah);
317 struct ath9k_hw_cal_data *caldata = NULL;
322 __ath_cancel_work(sc);
324 spin_lock_bh(&sc->sc_pcu_lock);
326 if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
328 caldata = &sc->caldata;
337 if (!ath_prepare_reset(sc, retry_tx, flush))
340 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
341 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
343 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
346 "Unable to reset channel, reset status %d\n", r);
350 if (!ath_complete_reset(sc, true))
354 spin_unlock_bh(&sc->sc_pcu_lock);
360 * Set/change channels. If the channel is really being changed, it's done
361 * by reseting the chip. To accomplish this we must first cleanup any pending
362 * DMA, then restart stuff.
364 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
365 struct ath9k_channel *hchan)
369 if (sc->sc_flags & SC_OP_INVALID)
372 r = ath_reset_internal(sc, hchan, false);
377 static void ath_paprd_activate(struct ath_softc *sc)
379 struct ath_hw *ah = sc->sc_ah;
380 struct ath9k_hw_cal_data *caldata = ah->caldata;
383 if (!caldata || !caldata->paprd_done)
387 ar9003_paprd_enable(ah, false);
388 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
389 if (!(ah->txchainmask & BIT(chain)))
392 ar9003_paprd_populate_single_table(ah, caldata, chain);
395 ar9003_paprd_enable(ah, true);
396 ath9k_ps_restore(sc);
399 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
401 struct ieee80211_hw *hw = sc->hw;
402 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
403 struct ath_hw *ah = sc->sc_ah;
404 struct ath_common *common = ath9k_hw_common(ah);
405 struct ath_tx_control txctl;
408 memset(&txctl, 0, sizeof(txctl));
409 txctl.txq = sc->tx.txq_map[WME_AC_BE];
411 memset(tx_info, 0, sizeof(*tx_info));
412 tx_info->band = hw->conf.channel->band;
413 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
414 tx_info->control.rates[0].idx = 0;
415 tx_info->control.rates[0].count = 1;
416 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
417 tx_info->control.rates[1].idx = -1;
419 init_completion(&sc->paprd_complete);
420 txctl.paprd = BIT(chain);
422 if (ath_tx_start(hw, skb, &txctl) != 0) {
423 ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
424 dev_kfree_skb_any(skb);
428 time_left = wait_for_completion_timeout(&sc->paprd_complete,
429 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
432 ath_dbg(common, CALIBRATE,
433 "Timeout waiting for paprd training on TX chain %d\n",
439 void ath_paprd_calibrate(struct work_struct *work)
441 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
442 struct ieee80211_hw *hw = sc->hw;
443 struct ath_hw *ah = sc->sc_ah;
444 struct ieee80211_hdr *hdr;
445 struct sk_buff *skb = NULL;
446 struct ath9k_hw_cal_data *caldata = ah->caldata;
447 struct ath_common *common = ath9k_hw_common(ah);
458 if (ar9003_paprd_init_table(ah) < 0)
461 skb = alloc_skb(len, GFP_KERNEL);
466 memset(skb->data, 0, len);
467 hdr = (struct ieee80211_hdr *)skb->data;
468 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
469 hdr->frame_control = cpu_to_le16(ftype);
470 hdr->duration_id = cpu_to_le16(10);
471 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
472 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
473 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
475 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
476 if (!(ah->txchainmask & BIT(chain)))
481 ath_dbg(common, CALIBRATE,
482 "Sending PAPRD frame for thermal measurement on chain %d\n",
484 if (!ath_paprd_send_frame(sc, skb, chain))
487 ar9003_paprd_setup_gain_table(ah, chain);
489 ath_dbg(common, CALIBRATE,
490 "Sending PAPRD training frame on chain %d\n", chain);
491 if (!ath_paprd_send_frame(sc, skb, chain))
494 if (!ar9003_paprd_is_done(ah)) {
495 ath_dbg(common, CALIBRATE,
496 "PAPRD not yet done on chain %d\n", chain);
500 if (ar9003_paprd_create_curve(ah, caldata, chain)) {
501 ath_dbg(common, CALIBRATE,
502 "PAPRD create curve failed on chain %d\n",
512 caldata->paprd_done = true;
513 ath_paprd_activate(sc);
517 ath9k_ps_restore(sc);
521 * This routine performs the periodic noise floor calibration function
522 * that is used to adjust and optimize the chip performance. This
523 * takes environmental changes (location, temperature) into account.
524 * When the task is complete, it reschedules itself depending on the
525 * appropriate interval that was calculated.
527 void ath_ani_calibrate(unsigned long data)
529 struct ath_softc *sc = (struct ath_softc *)data;
530 struct ath_hw *ah = sc->sc_ah;
531 struct ath_common *common = ath9k_hw_common(ah);
532 bool longcal = false;
533 bool shortcal = false;
534 bool aniflag = false;
535 unsigned int timestamp = jiffies_to_msecs(jiffies);
536 u32 cal_interval, short_cal_interval, long_cal_interval;
539 if (ah->caldata && ah->caldata->nfcal_interference)
540 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
542 long_cal_interval = ATH_LONG_CALINTERVAL;
544 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
545 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
547 /* Only calibrate if awake */
548 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
553 /* Long calibration runs independently of short calibration. */
554 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
556 common->ani.longcal_timer = timestamp;
559 /* Short calibration applies only while caldone is false */
560 if (!common->ani.caldone) {
561 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
563 common->ani.shortcal_timer = timestamp;
564 common->ani.resetcal_timer = timestamp;
567 if ((timestamp - common->ani.resetcal_timer) >=
568 ATH_RESTART_CALINTERVAL) {
569 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
570 if (common->ani.caldone)
571 common->ani.resetcal_timer = timestamp;
575 /* Verify whether we must check ANI */
576 if (sc->sc_ah->config.enable_ani
577 && (timestamp - common->ani.checkani_timer) >=
578 ah->config.ani_poll_interval) {
580 common->ani.checkani_timer = timestamp;
583 /* Call ANI routine if necessary */
585 spin_lock_irqsave(&common->cc_lock, flags);
586 ath9k_hw_ani_monitor(ah, ah->curchan);
587 ath_update_survey_stats(sc);
588 spin_unlock_irqrestore(&common->cc_lock, flags);
591 /* Perform calibration if necessary */
592 if (longcal || shortcal) {
593 common->ani.caldone =
594 ath9k_hw_calibrate(ah, ah->curchan,
595 ah->rxchainmask, longcal);
599 "Calibration @%lu finished: %s %s %s, caldone: %s\n",
601 longcal ? "long" : "", shortcal ? "short" : "",
602 aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
604 ath9k_ps_restore(sc);
608 * Set timer interval based on previous results.
609 * The interval must be the shortest necessary to satisfy ANI,
610 * short calibration and long calibration.
612 ath9k_debug_samp_bb_mac(sc);
613 cal_interval = ATH_LONG_CALINTERVAL;
614 if (sc->sc_ah->config.enable_ani)
615 cal_interval = min(cal_interval,
616 (u32)ah->config.ani_poll_interval);
617 if (!common->ani.caldone)
618 cal_interval = min(cal_interval, (u32)short_cal_interval);
620 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
621 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
622 if (!ah->caldata->paprd_done)
623 ieee80211_queue_work(sc->hw, &sc->paprd_work);
624 else if (!ah->paprd_table_write_done)
625 ath_paprd_activate(sc);
629 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
630 struct ieee80211_vif *vif)
633 an = (struct ath_node *)sta->drv_priv;
635 #ifdef CONFIG_ATH9K_DEBUGFS
636 spin_lock(&sc->nodes_lock);
637 list_add(&an->list, &sc->nodes);
638 spin_unlock(&sc->nodes_lock);
643 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
644 ath_tx_node_init(sc, an);
645 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
646 sta->ht_cap.ampdu_factor);
647 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
651 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
653 struct ath_node *an = (struct ath_node *)sta->drv_priv;
655 #ifdef CONFIG_ATH9K_DEBUGFS
656 spin_lock(&sc->nodes_lock);
658 spin_unlock(&sc->nodes_lock);
662 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
663 ath_tx_node_cleanup(sc, an);
667 void ath9k_tasklet(unsigned long data)
669 struct ath_softc *sc = (struct ath_softc *)data;
670 struct ath_hw *ah = sc->sc_ah;
671 struct ath_common *common = ath9k_hw_common(ah);
673 u32 status = sc->intrstatus;
677 spin_lock(&sc->sc_pcu_lock);
679 if ((status & ATH9K_INT_FATAL) ||
680 (status & ATH9K_INT_BB_WATCHDOG)) {
681 #ifdef CONFIG_ATH9K_DEBUGFS
682 enum ath_reset_type type;
684 if (status & ATH9K_INT_FATAL)
685 type = RESET_TYPE_FATAL_INT;
687 type = RESET_TYPE_BB_WATCHDOG;
689 RESET_STAT_INC(sc, type);
691 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
695 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
697 * TSF sync does not look correct; remain awake to sync with
700 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
701 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
704 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
705 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
708 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
710 if (status & rxmask) {
711 /* Check for high priority Rx first */
712 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
713 (status & ATH9K_INT_RXHP))
714 ath_rx_tasklet(sc, 0, true);
716 ath_rx_tasklet(sc, 0, false);
719 if (status & ATH9K_INT_TX) {
720 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
721 ath_tx_edma_tasklet(sc);
726 ath9k_btcoex_handle_interrupt(sc, status);
729 /* re-enable hardware interrupt */
730 ath9k_hw_enable_interrupts(ah);
732 spin_unlock(&sc->sc_pcu_lock);
733 ath9k_ps_restore(sc);
736 irqreturn_t ath_isr(int irq, void *dev)
738 #define SCHED_INTR ( \
740 ATH9K_INT_BB_WATCHDOG | \
750 ATH9K_INT_GENTIMER | \
753 struct ath_softc *sc = dev;
754 struct ath_hw *ah = sc->sc_ah;
755 struct ath_common *common = ath9k_hw_common(ah);
756 enum ath9k_int status;
760 * The hardware is not ready/present, don't
761 * touch anything. Note this can happen early
762 * on if the IRQ is shared.
764 if (sc->sc_flags & SC_OP_INVALID)
768 /* shared irq, not for us */
770 if (!ath9k_hw_intrpend(ah))
774 * Figure out the reason(s) for the interrupt. Note
775 * that the hal returns a pseudo-ISR that may include
776 * bits we haven't explicitly enabled so we mask the
777 * value to insure we only process bits we requested.
779 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
780 status &= ah->imask; /* discard unasked-for bits */
783 * If there are no status bits set, then this interrupt was not
784 * for me (should have been caught above).
789 /* Cache the status */
790 sc->intrstatus = status;
792 if (status & SCHED_INTR)
796 * If a FATAL or RXORN interrupt is received, we have to reset the
799 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
800 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
803 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
804 (status & ATH9K_INT_BB_WATCHDOG)) {
806 spin_lock(&common->cc_lock);
807 ath_hw_cycle_counters_update(common);
808 ar9003_hw_bb_watchdog_dbg_info(ah);
809 spin_unlock(&common->cc_lock);
814 if (status & ATH9K_INT_SWBA)
815 tasklet_schedule(&sc->bcon_tasklet);
817 if (status & ATH9K_INT_TXURN)
818 ath9k_hw_updatetxtriglevel(ah, true);
820 if (status & ATH9K_INT_RXEOL) {
821 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
822 ath9k_hw_set_interrupts(ah);
825 if (status & ATH9K_INT_MIB) {
827 * Disable interrupts until we service the MIB
828 * interrupt; otherwise it will continue to
831 ath9k_hw_disable_interrupts(ah);
833 * Let the hal handle the event. We assume
834 * it will clear whatever condition caused
837 spin_lock(&common->cc_lock);
838 ath9k_hw_proc_mib_event(ah);
839 spin_unlock(&common->cc_lock);
840 ath9k_hw_enable_interrupts(ah);
843 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
844 if (status & ATH9K_INT_TIM_TIMER) {
845 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
847 /* Clear RxAbort bit so that we can
849 ath9k_setpower(sc, ATH9K_PM_AWAKE);
850 ath9k_hw_setrxabort(sc->sc_ah, 0);
851 sc->ps_flags |= PS_WAIT_FOR_BEACON;
856 ath_debug_stat_interrupt(sc, status);
859 /* turn off every interrupt */
860 ath9k_hw_disable_interrupts(ah);
861 tasklet_schedule(&sc->intr_tq);
869 static int ath_reset(struct ath_softc *sc, bool retry_tx)
875 r = ath_reset_internal(sc, NULL, retry_tx);
879 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
880 if (ATH_TXQ_SETUP(sc, i)) {
881 spin_lock_bh(&sc->tx.txq[i].axq_lock);
882 ath_txq_schedule(sc, &sc->tx.txq[i]);
883 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
888 ath9k_ps_restore(sc);
893 void ath_reset_work(struct work_struct *work)
895 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
900 void ath_hw_check(struct work_struct *work)
902 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
903 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
906 u8 is_alive, nbeacon = 1;
909 is_alive = ath9k_hw_check_alive(sc->sc_ah);
911 if (is_alive && !AR_SREV_9300(sc->sc_ah))
913 else if (!is_alive && AR_SREV_9300(sc->sc_ah)) {
914 ath_dbg(common, RESET,
915 "DCU stuck is detected. Schedule chip reset\n");
916 RESET_STAT_INC(sc, RESET_TYPE_MAC_HANG);
920 spin_lock_irqsave(&common->cc_lock, flags);
921 busy = ath_update_survey_stats(sc);
922 spin_unlock_irqrestore(&common->cc_lock, flags);
924 ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n",
925 busy, sc->hw_busy_count + 1);
927 if (++sc->hw_busy_count >= 3) {
928 RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
931 } else if (busy >= 0) {
932 sc->hw_busy_count = 0;
936 ath_start_rx_poll(sc, nbeacon);
940 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
942 ath9k_ps_restore(sc);
945 static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
948 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
950 if (pll_sqsum >= 0x40000) {
953 /* Rx is hung for more than 500ms. Reset it */
954 ath_dbg(common, RESET, "Possible RX hang, resetting\n");
955 RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
956 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
963 void ath_hw_pll_work(struct work_struct *work)
965 struct ath_softc *sc = container_of(work, struct ath_softc,
969 if (AR_SREV_9485(sc->sc_ah)) {
972 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
973 ath9k_ps_restore(sc);
975 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
977 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
981 /**********************/
982 /* mac80211 callbacks */
983 /**********************/
985 static int ath9k_start(struct ieee80211_hw *hw)
987 struct ath_softc *sc = hw->priv;
988 struct ath_hw *ah = sc->sc_ah;
989 struct ath_common *common = ath9k_hw_common(ah);
990 struct ieee80211_channel *curchan = hw->conf.channel;
991 struct ath9k_channel *init_channel;
994 ath_dbg(common, CONFIG,
995 "Starting driver with initial channel: %d MHz\n",
996 curchan->center_freq);
999 mutex_lock(&sc->mutex);
1001 init_channel = ath9k_cmn_get_curchannel(hw, ah);
1003 /* Reset SERDES registers */
1004 ath9k_hw_configpcipowersave(ah, false);
1007 * The basic interface to setting the hardware in a good
1008 * state is ``reset''. On return the hardware is known to
1009 * be powered up and with interrupts disabled. This must
1010 * be followed by initialization of the appropriate bits
1011 * and then setup of the interrupt mask.
1013 spin_lock_bh(&sc->sc_pcu_lock);
1015 atomic_set(&ah->intr_ref_cnt, -1);
1017 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1020 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1021 r, curchan->center_freq);
1022 spin_unlock_bh(&sc->sc_pcu_lock);
1026 /* Setup our intr mask. */
1027 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1028 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1031 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1032 ah->imask |= ATH9K_INT_RXHP |
1034 ATH9K_INT_BB_WATCHDOG;
1036 ah->imask |= ATH9K_INT_RX;
1038 ah->imask |= ATH9K_INT_GTT;
1040 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1041 ah->imask |= ATH9K_INT_CST;
1043 if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
1044 ah->imask |= ATH9K_INT_MCI;
1046 sc->sc_flags &= ~SC_OP_INVALID;
1047 sc->sc_ah->is_monitoring = false;
1049 if (!ath_complete_reset(sc, false)) {
1051 spin_unlock_bh(&sc->sc_pcu_lock);
1055 if (ah->led_pin >= 0) {
1056 ath9k_hw_cfg_output(ah, ah->led_pin,
1057 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1058 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
1062 * Reset key cache to sane defaults (all entries cleared) instead of
1063 * semi-random values after suspend/resume.
1065 ath9k_cmn_init_crypto(sc->sc_ah);
1067 spin_unlock_bh(&sc->sc_pcu_lock);
1069 ath9k_start_btcoex(sc);
1071 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1072 common->bus_ops->extn_synch_en(common);
1075 mutex_unlock(&sc->mutex);
1077 ath9k_ps_restore(sc);
1082 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1084 struct ath_softc *sc = hw->priv;
1085 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1086 struct ath_tx_control txctl;
1087 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1089 if (sc->ps_enabled) {
1091 * mac80211 does not set PM field for normal data frames, so we
1092 * need to update that based on the current PS mode.
1094 if (ieee80211_is_data(hdr->frame_control) &&
1095 !ieee80211_is_nullfunc(hdr->frame_control) &&
1096 !ieee80211_has_pm(hdr->frame_control)) {
1098 "Add PM=1 for a TX frame while in PS mode\n");
1099 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1104 * Cannot tx while the hardware is in full sleep, it first needs a full
1105 * chip reset to recover from that
1107 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP))
1110 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1112 * We are using PS-Poll and mac80211 can request TX while in
1113 * power save mode. Need to wake up hardware for the TX to be
1114 * completed and if needed, also for RX of buffered frames.
1116 ath9k_ps_wakeup(sc);
1117 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1118 ath9k_hw_setrxabort(sc->sc_ah, 0);
1119 if (ieee80211_is_pspoll(hdr->frame_control)) {
1121 "Sending PS-Poll to pick a buffered frame\n");
1122 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1124 ath_dbg(common, PS, "Wake up to complete TX\n");
1125 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1128 * The actual restore operation will happen only after
1129 * the sc_flags bit is cleared. We are just dropping
1130 * the ps_usecount here.
1132 ath9k_ps_restore(sc);
1135 memset(&txctl, 0, sizeof(struct ath_tx_control));
1136 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1138 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
1140 if (ath_tx_start(hw, skb, &txctl) != 0) {
1141 ath_dbg(common, XMIT, "TX failed\n");
1142 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
1148 dev_kfree_skb_any(skb);
1151 static void ath9k_stop(struct ieee80211_hw *hw)
1153 struct ath_softc *sc = hw->priv;
1154 struct ath_hw *ah = sc->sc_ah;
1155 struct ath_common *common = ath9k_hw_common(ah);
1158 mutex_lock(&sc->mutex);
1160 ath_cancel_work(sc);
1161 del_timer_sync(&sc->rx_poll_timer);
1163 if (sc->sc_flags & SC_OP_INVALID) {
1164 ath_dbg(common, ANY, "Device not present\n");
1165 mutex_unlock(&sc->mutex);
1169 /* Ensure HW is awake when we try to shut it down. */
1170 ath9k_ps_wakeup(sc);
1172 ath9k_stop_btcoex(sc);
1174 spin_lock_bh(&sc->sc_pcu_lock);
1176 /* prevent tasklets to enable interrupts once we disable them */
1177 ah->imask &= ~ATH9K_INT_GLOBAL;
1179 /* make sure h/w will not generate any interrupt
1180 * before setting the invalid flag. */
1181 ath9k_hw_disable_interrupts(ah);
1183 spin_unlock_bh(&sc->sc_pcu_lock);
1185 /* we can now sync irq and kill any running tasklets, since we already
1186 * disabled interrupts and not holding a spin lock */
1187 synchronize_irq(sc->irq);
1188 tasklet_kill(&sc->intr_tq);
1189 tasklet_kill(&sc->bcon_tasklet);
1191 prev_idle = sc->ps_idle;
1194 spin_lock_bh(&sc->sc_pcu_lock);
1196 if (ah->led_pin >= 0) {
1197 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
1198 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
1201 ath_prepare_reset(sc, false, true);
1204 dev_kfree_skb_any(sc->rx.frag);
1209 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
1211 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
1212 ath9k_hw_phy_disable(ah);
1214 ath9k_hw_configpcipowersave(ah, true);
1216 spin_unlock_bh(&sc->sc_pcu_lock);
1218 ath9k_ps_restore(sc);
1220 sc->sc_flags |= SC_OP_INVALID;
1221 sc->ps_idle = prev_idle;
1223 mutex_unlock(&sc->mutex);
1225 ath_dbg(common, CONFIG, "Driver halt\n");
1228 bool ath9k_uses_beacons(int type)
1231 case NL80211_IFTYPE_AP:
1232 case NL80211_IFTYPE_ADHOC:
1233 case NL80211_IFTYPE_MESH_POINT:
1240 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1241 struct ieee80211_vif *vif)
1243 struct ath_vif *avp = (void *)vif->drv_priv;
1245 ath9k_set_beaconing_status(sc, false);
1246 ath_beacon_return(sc, avp);
1247 ath9k_set_beaconing_status(sc, true);
1250 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1252 struct ath9k_vif_iter_data *iter_data = data;
1255 if (iter_data->hw_macaddr)
1256 for (i = 0; i < ETH_ALEN; i++)
1257 iter_data->mask[i] &=
1258 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1260 switch (vif->type) {
1261 case NL80211_IFTYPE_AP:
1264 case NL80211_IFTYPE_STATION:
1265 iter_data->nstations++;
1267 case NL80211_IFTYPE_ADHOC:
1268 iter_data->nadhocs++;
1270 case NL80211_IFTYPE_MESH_POINT:
1271 iter_data->nmeshes++;
1273 case NL80211_IFTYPE_WDS:
1281 /* Called with sc->mutex held. */
1282 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1283 struct ieee80211_vif *vif,
1284 struct ath9k_vif_iter_data *iter_data)
1286 struct ath_softc *sc = hw->priv;
1287 struct ath_hw *ah = sc->sc_ah;
1288 struct ath_common *common = ath9k_hw_common(ah);
1291 * Use the hardware MAC address as reference, the hardware uses it
1292 * together with the BSSID mask when matching addresses.
1294 memset(iter_data, 0, sizeof(*iter_data));
1295 iter_data->hw_macaddr = common->macaddr;
1296 memset(&iter_data->mask, 0xff, ETH_ALEN);
1299 ath9k_vif_iter(iter_data, vif->addr, vif);
1301 /* Get list of all active MAC addresses */
1302 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1306 /* Called with sc->mutex held. */
1307 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1308 struct ieee80211_vif *vif)
1310 struct ath_softc *sc = hw->priv;
1311 struct ath_hw *ah = sc->sc_ah;
1312 struct ath_common *common = ath9k_hw_common(ah);
1313 struct ath9k_vif_iter_data iter_data;
1315 ath9k_calculate_iter_data(hw, vif, &iter_data);
1317 /* Set BSSID mask. */
1318 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1319 ath_hw_setbssidmask(common);
1321 /* Set op-mode & TSF */
1322 if (iter_data.naps > 0) {
1323 ath9k_hw_set_tsfadjust(ah, 1);
1324 sc->sc_flags |= SC_OP_TSF_RESET;
1325 ah->opmode = NL80211_IFTYPE_AP;
1327 ath9k_hw_set_tsfadjust(ah, 0);
1328 sc->sc_flags &= ~SC_OP_TSF_RESET;
1330 if (iter_data.nmeshes)
1331 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1332 else if (iter_data.nwds)
1333 ah->opmode = NL80211_IFTYPE_AP;
1334 else if (iter_data.nadhocs)
1335 ah->opmode = NL80211_IFTYPE_ADHOC;
1337 ah->opmode = NL80211_IFTYPE_STATION;
1341 * Enable MIB interrupts when there are hardware phy counters.
1343 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1344 if (ah->config.enable_ani)
1345 ah->imask |= ATH9K_INT_MIB;
1346 ah->imask |= ATH9K_INT_TSFOOR;
1348 ah->imask &= ~ATH9K_INT_MIB;
1349 ah->imask &= ~ATH9K_INT_TSFOOR;
1352 ath9k_hw_set_interrupts(ah);
1355 if (iter_data.naps > 0) {
1356 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1358 if (!common->disable_ani) {
1359 sc->sc_flags |= SC_OP_ANI_RUN;
1360 ath_start_ani(common);
1364 sc->sc_flags &= ~SC_OP_ANI_RUN;
1365 del_timer_sync(&common->ani.timer);
1369 /* Called with sc->mutex held, vif counts set up properly. */
1370 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1371 struct ieee80211_vif *vif)
1373 struct ath_softc *sc = hw->priv;
1375 ath9k_calculate_summary_state(hw, vif);
1377 if (ath9k_uses_beacons(vif->type)) {
1378 /* Reserve a beacon slot for the vif */
1379 ath9k_set_beaconing_status(sc, false);
1380 ath_beacon_alloc(sc, vif);
1381 ath9k_set_beaconing_status(sc, true);
1385 void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon)
1387 if (!AR_SREV_9300(sc->sc_ah))
1390 if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF))
1393 mod_timer(&sc->rx_poll_timer, jiffies + msecs_to_jiffies
1394 (nbeacon * sc->cur_beacon_conf.beacon_interval));
1397 void ath_rx_poll(unsigned long data)
1399 struct ath_softc *sc = (struct ath_softc *)data;
1401 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
1404 static int ath9k_add_interface(struct ieee80211_hw *hw,
1405 struct ieee80211_vif *vif)
1407 struct ath_softc *sc = hw->priv;
1408 struct ath_hw *ah = sc->sc_ah;
1409 struct ath_common *common = ath9k_hw_common(ah);
1412 ath9k_ps_wakeup(sc);
1413 mutex_lock(&sc->mutex);
1415 switch (vif->type) {
1416 case NL80211_IFTYPE_STATION:
1417 case NL80211_IFTYPE_WDS:
1418 case NL80211_IFTYPE_ADHOC:
1419 case NL80211_IFTYPE_AP:
1420 case NL80211_IFTYPE_MESH_POINT:
1423 ath_err(common, "Interface type %d not yet supported\n",
1429 if (ath9k_uses_beacons(vif->type)) {
1430 if (sc->nbcnvifs >= ATH_BCBUF) {
1431 ath_err(common, "Not enough beacon buffers when adding"
1432 " new interface of type: %i\n",
1439 if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
1440 ((vif->type == NL80211_IFTYPE_ADHOC) &&
1442 ath_err(common, "Cannot create ADHOC interface when other"
1443 " interfaces already exist.\n");
1448 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1452 ath9k_do_vif_add_setup(hw, vif);
1454 mutex_unlock(&sc->mutex);
1455 ath9k_ps_restore(sc);
1459 static int ath9k_change_interface(struct ieee80211_hw *hw,
1460 struct ieee80211_vif *vif,
1461 enum nl80211_iftype new_type,
1464 struct ath_softc *sc = hw->priv;
1465 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1468 ath_dbg(common, CONFIG, "Change Interface\n");
1469 mutex_lock(&sc->mutex);
1470 ath9k_ps_wakeup(sc);
1472 /* See if new interface type is valid. */
1473 if ((new_type == NL80211_IFTYPE_ADHOC) &&
1475 ath_err(common, "When using ADHOC, it must be the only"
1481 if (ath9k_uses_beacons(new_type) &&
1482 !ath9k_uses_beacons(vif->type)) {
1483 if (sc->nbcnvifs >= ATH_BCBUF) {
1484 ath_err(common, "No beacon slot available\n");
1490 /* Clean up old vif stuff */
1491 if (ath9k_uses_beacons(vif->type))
1492 ath9k_reclaim_beacon(sc, vif);
1494 /* Add new settings */
1495 vif->type = new_type;
1498 ath9k_do_vif_add_setup(hw, vif);
1500 ath9k_ps_restore(sc);
1501 mutex_unlock(&sc->mutex);
1505 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1506 struct ieee80211_vif *vif)
1508 struct ath_softc *sc = hw->priv;
1509 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1511 ath_dbg(common, CONFIG, "Detach Interface\n");
1513 ath9k_ps_wakeup(sc);
1514 mutex_lock(&sc->mutex);
1518 /* Reclaim beacon resources */
1519 if (ath9k_uses_beacons(vif->type))
1520 ath9k_reclaim_beacon(sc, vif);
1522 ath9k_calculate_summary_state(hw, NULL);
1524 mutex_unlock(&sc->mutex);
1525 ath9k_ps_restore(sc);
1528 static void ath9k_enable_ps(struct ath_softc *sc)
1530 struct ath_hw *ah = sc->sc_ah;
1532 sc->ps_enabled = true;
1533 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1534 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1535 ah->imask |= ATH9K_INT_TIM_TIMER;
1536 ath9k_hw_set_interrupts(ah);
1538 ath9k_hw_setrxabort(ah, 1);
1542 static void ath9k_disable_ps(struct ath_softc *sc)
1544 struct ath_hw *ah = sc->sc_ah;
1546 sc->ps_enabled = false;
1547 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1548 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1549 ath9k_hw_setrxabort(ah, 0);
1550 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1552 PS_WAIT_FOR_PSPOLL_DATA |
1553 PS_WAIT_FOR_TX_ACK);
1554 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1555 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1556 ath9k_hw_set_interrupts(ah);
1562 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1564 struct ath_softc *sc = hw->priv;
1565 struct ath_hw *ah = sc->sc_ah;
1566 struct ath_common *common = ath9k_hw_common(ah);
1567 struct ieee80211_conf *conf = &hw->conf;
1569 ath9k_ps_wakeup(sc);
1570 mutex_lock(&sc->mutex);
1572 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1573 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1575 ath_cancel_work(sc);
1579 * We just prepare to enable PS. We have to wait until our AP has
1580 * ACK'd our null data frame to disable RX otherwise we'll ignore
1581 * those ACKs and end up retransmitting the same null data frames.
1582 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1584 if (changed & IEEE80211_CONF_CHANGE_PS) {
1585 unsigned long flags;
1586 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1587 if (conf->flags & IEEE80211_CONF_PS)
1588 ath9k_enable_ps(sc);
1590 ath9k_disable_ps(sc);
1591 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1594 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1595 if (conf->flags & IEEE80211_CONF_MONITOR) {
1596 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1597 sc->sc_ah->is_monitoring = true;
1599 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1600 sc->sc_ah->is_monitoring = false;
1604 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1605 struct ieee80211_channel *curchan = hw->conf.channel;
1606 int pos = curchan->hw_value;
1608 unsigned long flags;
1611 old_pos = ah->curchan - &ah->channels[0];
1613 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1614 sc->sc_flags |= SC_OP_OFFCHANNEL;
1616 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1618 ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n",
1619 curchan->center_freq, conf->channel_type);
1621 /* update survey stats for the old channel before switching */
1622 spin_lock_irqsave(&common->cc_lock, flags);
1623 ath_update_survey_stats(sc);
1624 spin_unlock_irqrestore(&common->cc_lock, flags);
1627 * Preserve the current channel values, before updating
1630 if (ah->curchan && (old_pos == pos))
1631 ath9k_hw_getnf(ah, ah->curchan);
1633 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1634 curchan, conf->channel_type);
1637 * If the operating channel changes, change the survey in-use flags
1639 * Reset the survey data for the new channel, unless we're switching
1640 * back to the operating channel from an off-channel operation.
1642 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1643 sc->cur_survey != &sc->survey[pos]) {
1646 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1648 sc->cur_survey = &sc->survey[pos];
1650 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1651 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1652 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1653 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1656 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1657 ath_err(common, "Unable to set channel\n");
1658 mutex_unlock(&sc->mutex);
1663 * The most recent snapshot of channel->noisefloor for the old
1664 * channel is only available after the hardware reset. Copy it to
1665 * the survey stats now.
1668 ath_update_survey_nf(sc, old_pos);
1671 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1672 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1673 sc->config.txpowlimit = 2 * conf->power_level;
1674 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1675 sc->config.txpowlimit, &sc->curtxpow);
1678 mutex_unlock(&sc->mutex);
1679 ath9k_ps_restore(sc);
1684 #define SUPPORTED_FILTERS \
1685 (FIF_PROMISC_IN_BSS | \
1690 FIF_BCN_PRBRESP_PROMISC | \
1694 /* FIXME: sc->sc_full_reset ? */
1695 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1696 unsigned int changed_flags,
1697 unsigned int *total_flags,
1700 struct ath_softc *sc = hw->priv;
1703 changed_flags &= SUPPORTED_FILTERS;
1704 *total_flags &= SUPPORTED_FILTERS;
1706 sc->rx.rxfilter = *total_flags;
1707 ath9k_ps_wakeup(sc);
1708 rfilt = ath_calcrxfilter(sc);
1709 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1710 ath9k_ps_restore(sc);
1712 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1716 static int ath9k_sta_add(struct ieee80211_hw *hw,
1717 struct ieee80211_vif *vif,
1718 struct ieee80211_sta *sta)
1720 struct ath_softc *sc = hw->priv;
1721 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1722 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1723 struct ieee80211_key_conf ps_key = { };
1725 ath_node_attach(sc, sta, vif);
1727 if (vif->type != NL80211_IFTYPE_AP &&
1728 vif->type != NL80211_IFTYPE_AP_VLAN)
1731 an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1736 static void ath9k_del_ps_key(struct ath_softc *sc,
1737 struct ieee80211_vif *vif,
1738 struct ieee80211_sta *sta)
1740 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1741 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1742 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1747 ath_key_delete(common, &ps_key);
1750 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1751 struct ieee80211_vif *vif,
1752 struct ieee80211_sta *sta)
1754 struct ath_softc *sc = hw->priv;
1756 ath9k_del_ps_key(sc, vif, sta);
1757 ath_node_detach(sc, sta);
1762 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1763 struct ieee80211_vif *vif,
1764 enum sta_notify_cmd cmd,
1765 struct ieee80211_sta *sta)
1767 struct ath_softc *sc = hw->priv;
1768 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1770 if (!sta->ht_cap.ht_supported)
1774 case STA_NOTIFY_SLEEP:
1775 an->sleeping = true;
1776 ath_tx_aggr_sleep(sta, sc, an);
1778 case STA_NOTIFY_AWAKE:
1779 an->sleeping = false;
1780 ath_tx_aggr_wakeup(sc, an);
1785 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1786 struct ieee80211_vif *vif, u16 queue,
1787 const struct ieee80211_tx_queue_params *params)
1789 struct ath_softc *sc = hw->priv;
1790 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1791 struct ath_txq *txq;
1792 struct ath9k_tx_queue_info qi;
1795 if (queue >= WME_NUM_AC)
1798 txq = sc->tx.txq_map[queue];
1800 ath9k_ps_wakeup(sc);
1801 mutex_lock(&sc->mutex);
1803 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1805 qi.tqi_aifs = params->aifs;
1806 qi.tqi_cwmin = params->cw_min;
1807 qi.tqi_cwmax = params->cw_max;
1808 qi.tqi_burstTime = params->txop;
1810 ath_dbg(common, CONFIG,
1811 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1812 queue, txq->axq_qnum, params->aifs, params->cw_min,
1813 params->cw_max, params->txop);
1815 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1817 ath_err(common, "TXQ Update failed\n");
1819 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1820 if (queue == WME_AC_BE && !ret)
1821 ath_beaconq_config(sc);
1823 mutex_unlock(&sc->mutex);
1824 ath9k_ps_restore(sc);
1829 static int ath9k_set_key(struct ieee80211_hw *hw,
1830 enum set_key_cmd cmd,
1831 struct ieee80211_vif *vif,
1832 struct ieee80211_sta *sta,
1833 struct ieee80211_key_conf *key)
1835 struct ath_softc *sc = hw->priv;
1836 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1839 if (ath9k_modparam_nohwcrypt)
1842 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1843 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1844 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1845 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1846 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1848 * For now, disable hw crypto for the RSN IBSS group keys. This
1849 * could be optimized in the future to use a modified key cache
1850 * design to support per-STA RX GTK, but until that gets
1851 * implemented, use of software crypto for group addressed
1852 * frames is a acceptable to allow RSN IBSS to be used.
1857 mutex_lock(&sc->mutex);
1858 ath9k_ps_wakeup(sc);
1859 ath_dbg(common, CONFIG, "Set HW Key\n");
1864 ath9k_del_ps_key(sc, vif, sta);
1866 ret = ath_key_config(common, vif, sta, key);
1868 key->hw_key_idx = ret;
1869 /* push IV and Michael MIC generation to stack */
1870 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1871 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1872 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1873 if (sc->sc_ah->sw_mgmt_crypto &&
1874 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1875 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1880 ath_key_delete(common, key);
1886 ath9k_ps_restore(sc);
1887 mutex_unlock(&sc->mutex);
1891 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1893 struct ath_softc *sc = data;
1894 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1895 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1896 struct ath_vif *avp = (void *)vif->drv_priv;
1899 * Skip iteration if primary station vif's bss info
1902 if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1905 if (bss_conf->assoc) {
1906 sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1907 avp->primary_sta_vif = true;
1908 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1909 common->curaid = bss_conf->aid;
1910 ath9k_hw_write_associd(sc->sc_ah);
1911 ath_dbg(common, CONFIG, "Bss Info ASSOC %d, bssid: %pM\n",
1912 bss_conf->aid, common->curbssid);
1913 ath_beacon_config(sc, vif);
1915 * Request a re-configuration of Beacon related timers
1916 * on the receipt of the first Beacon frame (i.e.,
1917 * after time sync with the AP).
1919 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1920 /* Reset rssi stats */
1921 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1922 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1924 ath_start_rx_poll(sc, 3);
1926 if (!common->disable_ani) {
1927 sc->sc_flags |= SC_OP_ANI_RUN;
1928 ath_start_ani(common);
1934 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
1936 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1937 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1938 struct ath_vif *avp = (void *)vif->drv_priv;
1940 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1943 /* Reconfigure bss info */
1944 if (avp->primary_sta_vif && !bss_conf->assoc) {
1945 ath_dbg(common, CONFIG, "Bss Info DISASSOC %d, bssid %pM\n",
1946 common->curaid, common->curbssid);
1947 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
1948 avp->primary_sta_vif = false;
1949 memset(common->curbssid, 0, ETH_ALEN);
1953 ieee80211_iterate_active_interfaces_atomic(
1954 sc->hw, ath9k_bss_iter, sc);
1957 * None of station vifs are associated.
1960 if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
1961 ath9k_hw_write_associd(sc->sc_ah);
1963 sc->sc_flags &= ~SC_OP_ANI_RUN;
1964 del_timer_sync(&common->ani.timer);
1965 del_timer_sync(&sc->rx_poll_timer);
1966 memset(&sc->caldata, 0, sizeof(sc->caldata));
1970 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1971 struct ieee80211_vif *vif,
1972 struct ieee80211_bss_conf *bss_conf,
1975 struct ath_softc *sc = hw->priv;
1976 struct ath_hw *ah = sc->sc_ah;
1977 struct ath_common *common = ath9k_hw_common(ah);
1978 struct ath_vif *avp = (void *)vif->drv_priv;
1981 ath9k_ps_wakeup(sc);
1982 mutex_lock(&sc->mutex);
1984 if (changed & BSS_CHANGED_ASSOC) {
1985 ath9k_config_bss(sc, vif);
1987 ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n",
1988 common->curbssid, common->curaid);
1991 if (changed & BSS_CHANGED_IBSS) {
1992 /* There can be only one vif available */
1993 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1994 common->curaid = bss_conf->aid;
1995 ath9k_hw_write_associd(sc->sc_ah);
1997 if (bss_conf->ibss_joined) {
1998 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
2000 if (!common->disable_ani) {
2001 sc->sc_flags |= SC_OP_ANI_RUN;
2002 ath_start_ani(common);
2006 sc->sc_flags &= ~SC_OP_ANI_RUN;
2007 del_timer_sync(&common->ani.timer);
2008 del_timer_sync(&sc->rx_poll_timer);
2013 * In case of AP mode, the HW TSF has to be reset
2014 * when the beacon interval changes.
2016 if ((changed & BSS_CHANGED_BEACON_INT) &&
2017 (vif->type == NL80211_IFTYPE_AP))
2018 sc->sc_flags |= SC_OP_TSF_RESET;
2020 /* Configure beaconing (AP, IBSS, MESH) */
2021 if (ath9k_uses_beacons(vif->type) &&
2022 ((changed & BSS_CHANGED_BEACON) ||
2023 (changed & BSS_CHANGED_BEACON_ENABLED) ||
2024 (changed & BSS_CHANGED_BEACON_INT))) {
2025 ath9k_set_beaconing_status(sc, false);
2026 if (bss_conf->enable_beacon)
2027 ath_beacon_alloc(sc, vif);
2029 avp->is_bslot_active = false;
2030 ath_beacon_config(sc, vif);
2031 ath9k_set_beaconing_status(sc, true);
2034 if (changed & BSS_CHANGED_ERP_SLOT) {
2035 if (bss_conf->use_short_slot)
2039 if (vif->type == NL80211_IFTYPE_AP) {
2041 * Defer update, so that connected stations can adjust
2042 * their settings at the same time.
2043 * See beacon.c for more details
2045 sc->beacon.slottime = slottime;
2046 sc->beacon.updateslot = UPDATE;
2048 ah->slottime = slottime;
2049 ath9k_hw_init_global_settings(ah);
2053 mutex_unlock(&sc->mutex);
2054 ath9k_ps_restore(sc);
2057 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2059 struct ath_softc *sc = hw->priv;
2062 mutex_lock(&sc->mutex);
2063 ath9k_ps_wakeup(sc);
2064 tsf = ath9k_hw_gettsf64(sc->sc_ah);
2065 ath9k_ps_restore(sc);
2066 mutex_unlock(&sc->mutex);
2071 static void ath9k_set_tsf(struct ieee80211_hw *hw,
2072 struct ieee80211_vif *vif,
2075 struct ath_softc *sc = hw->priv;
2077 mutex_lock(&sc->mutex);
2078 ath9k_ps_wakeup(sc);
2079 ath9k_hw_settsf64(sc->sc_ah, tsf);
2080 ath9k_ps_restore(sc);
2081 mutex_unlock(&sc->mutex);
2084 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2086 struct ath_softc *sc = hw->priv;
2088 mutex_lock(&sc->mutex);
2090 ath9k_ps_wakeup(sc);
2091 ath9k_hw_reset_tsf(sc->sc_ah);
2092 ath9k_ps_restore(sc);
2094 mutex_unlock(&sc->mutex);
2097 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2098 struct ieee80211_vif *vif,
2099 enum ieee80211_ampdu_mlme_action action,
2100 struct ieee80211_sta *sta,
2101 u16 tid, u16 *ssn, u8 buf_size)
2103 struct ath_softc *sc = hw->priv;
2109 case IEEE80211_AMPDU_RX_START:
2111 case IEEE80211_AMPDU_RX_STOP:
2113 case IEEE80211_AMPDU_TX_START:
2114 ath9k_ps_wakeup(sc);
2115 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2117 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2118 ath9k_ps_restore(sc);
2120 case IEEE80211_AMPDU_TX_STOP:
2121 ath9k_ps_wakeup(sc);
2122 ath_tx_aggr_stop(sc, sta, tid);
2123 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2124 ath9k_ps_restore(sc);
2126 case IEEE80211_AMPDU_TX_OPERATIONAL:
2127 ath9k_ps_wakeup(sc);
2128 ath_tx_aggr_resume(sc, sta, tid);
2129 ath9k_ps_restore(sc);
2132 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2140 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2141 struct survey_info *survey)
2143 struct ath_softc *sc = hw->priv;
2144 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2145 struct ieee80211_supported_band *sband;
2146 struct ieee80211_channel *chan;
2147 unsigned long flags;
2150 spin_lock_irqsave(&common->cc_lock, flags);
2152 ath_update_survey_stats(sc);
2154 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2155 if (sband && idx >= sband->n_channels) {
2156 idx -= sband->n_channels;
2161 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2163 if (!sband || idx >= sband->n_channels) {
2164 spin_unlock_irqrestore(&common->cc_lock, flags);
2168 chan = &sband->channels[idx];
2169 pos = chan->hw_value;
2170 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2171 survey->channel = chan;
2172 spin_unlock_irqrestore(&common->cc_lock, flags);
2177 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2179 struct ath_softc *sc = hw->priv;
2180 struct ath_hw *ah = sc->sc_ah;
2182 mutex_lock(&sc->mutex);
2183 ah->coverage_class = coverage_class;
2185 ath9k_ps_wakeup(sc);
2186 ath9k_hw_init_global_settings(ah);
2187 ath9k_ps_restore(sc);
2189 mutex_unlock(&sc->mutex);
2192 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2194 struct ath_softc *sc = hw->priv;
2195 struct ath_hw *ah = sc->sc_ah;
2196 struct ath_common *common = ath9k_hw_common(ah);
2197 int timeout = 200; /* ms */
2201 mutex_lock(&sc->mutex);
2202 cancel_delayed_work_sync(&sc->tx_complete_work);
2204 if (ah->ah_flags & AH_UNPLUGGED) {
2205 ath_dbg(common, ANY, "Device has been unplugged!\n");
2206 mutex_unlock(&sc->mutex);
2210 if (sc->sc_flags & SC_OP_INVALID) {
2211 ath_dbg(common, ANY, "Device not present\n");
2212 mutex_unlock(&sc->mutex);
2216 for (j = 0; j < timeout; j++) {
2220 usleep_range(1000, 2000);
2222 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2223 if (!ATH_TXQ_SETUP(sc, i))
2226 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2237 ath9k_ps_wakeup(sc);
2238 spin_lock_bh(&sc->sc_pcu_lock);
2239 drain_txq = ath_drain_all_txq(sc, false);
2240 spin_unlock_bh(&sc->sc_pcu_lock);
2243 ath_reset(sc, false);
2245 ath9k_ps_restore(sc);
2246 ieee80211_wake_queues(hw);
2249 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2250 mutex_unlock(&sc->mutex);
2253 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2255 struct ath_softc *sc = hw->priv;
2258 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2259 if (!ATH_TXQ_SETUP(sc, i))
2262 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2268 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2270 struct ath_softc *sc = hw->priv;
2271 struct ath_hw *ah = sc->sc_ah;
2272 struct ieee80211_vif *vif;
2273 struct ath_vif *avp;
2275 struct ath_tx_status ts;
2276 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2279 vif = sc->beacon.bslot[0];
2283 avp = (void *)vif->drv_priv;
2284 if (!avp->is_bslot_active)
2287 if (!sc->beacon.tx_processed && !edma) {
2288 tasklet_disable(&sc->bcon_tasklet);
2291 if (!bf || !bf->bf_mpdu)
2294 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2295 if (status == -EINPROGRESS)
2298 sc->beacon.tx_processed = true;
2299 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2302 tasklet_enable(&sc->bcon_tasklet);
2305 return sc->beacon.tx_last;
2308 static int ath9k_get_stats(struct ieee80211_hw *hw,
2309 struct ieee80211_low_level_stats *stats)
2311 struct ath_softc *sc = hw->priv;
2312 struct ath_hw *ah = sc->sc_ah;
2313 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2315 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2316 stats->dot11RTSFailureCount = mib_stats->rts_bad;
2317 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2318 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2322 static u32 fill_chainmask(u32 cap, u32 new)
2327 for (i = 0; cap && new; i++, cap >>= 1) {
2328 if (!(cap & BIT(0)))
2340 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2342 struct ath_softc *sc = hw->priv;
2343 struct ath_hw *ah = sc->sc_ah;
2345 if (!rx_ant || !tx_ant)
2348 sc->ant_rx = rx_ant;
2349 sc->ant_tx = tx_ant;
2351 if (ah->caps.rx_chainmask == 1)
2354 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2355 if (AR_SREV_9100(ah))
2356 ah->rxchainmask = 0x7;
2358 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2360 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2361 ath9k_reload_chainmask_settings(sc);
2366 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2368 struct ath_softc *sc = hw->priv;
2370 *tx_ant = sc->ant_tx;
2371 *rx_ant = sc->ant_rx;
2375 struct ieee80211_ops ath9k_ops = {
2377 .start = ath9k_start,
2379 .add_interface = ath9k_add_interface,
2380 .change_interface = ath9k_change_interface,
2381 .remove_interface = ath9k_remove_interface,
2382 .config = ath9k_config,
2383 .configure_filter = ath9k_configure_filter,
2384 .sta_add = ath9k_sta_add,
2385 .sta_remove = ath9k_sta_remove,
2386 .sta_notify = ath9k_sta_notify,
2387 .conf_tx = ath9k_conf_tx,
2388 .bss_info_changed = ath9k_bss_info_changed,
2389 .set_key = ath9k_set_key,
2390 .get_tsf = ath9k_get_tsf,
2391 .set_tsf = ath9k_set_tsf,
2392 .reset_tsf = ath9k_reset_tsf,
2393 .ampdu_action = ath9k_ampdu_action,
2394 .get_survey = ath9k_get_survey,
2395 .rfkill_poll = ath9k_rfkill_poll_state,
2396 .set_coverage_class = ath9k_set_coverage_class,
2397 .flush = ath9k_flush,
2398 .tx_frames_pending = ath9k_tx_frames_pending,
2399 .tx_last_beacon = ath9k_tx_last_beacon,
2400 .get_stats = ath9k_get_stats,
2401 .set_antenna = ath9k_set_antenna,
2402 .get_antenna = ath9k_get_antenna,