drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_cache_conf_rate(struct ath_softc *sc,
  22                                 struct ieee80211_conf *conf)
  23 {
  24         switch (conf->channel->band) {
  25         case IEEE80211_BAND_2GHZ:
  26                 if (conf_is_ht20(conf))
  27                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  28                 else if (conf_is_ht40_minus(conf))
  29                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  30                 else if (conf_is_ht40_plus(conf))
  31                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  32                 else
  33                         sc->cur_rate_mode = ATH9K_MODE_11G;
  34                 break;
  35         case IEEE80211_BAND_5GHZ:
  36                 if (conf_is_ht20(conf))
  37                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  38                 else if (conf_is_ht40_minus(conf))
  39                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  40                 else if (conf_is_ht40_plus(conf))
  41                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  42                 else
  43                         sc->cur_rate_mode = ATH9K_MODE_11A;
  44                 break;
  45         default:
  46                 BUG_ON(1);
  47                 break;
  48         }
  49 }
  50
  51 static void ath_update_txpow(struct ath_softc *sc)
  52 {
  53         struct ath_hw *ah = sc->sc_ah;
  54         u32 txpow;
  55
  56         if (sc->curtxpow != sc->config.txpowlimit) {
  57                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  58                 /* read back in case value is clamped */
  59                 ath9k_hw_getcapability(ah, ATH9K_CAP_TXPOW, 1, &txpow);
  60                 sc->curtxpow = txpow;
  61         }
  62 }
  63
  64 static u8 parse_mpdudensity(u8 mpdudensity)
  65 {
  66         /*
  67          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  68          *   0 for no restriction
  69          *   1 for 1/4 us
  70          *   2 for 1/2 us
  71          *   3 for 1 us
  72          *   4 for 2 us
  73          *   5 for 4 us
  74          *   6 for 8 us
  75          *   7 for 16 us
  76          */
  77         switch (mpdudensity) {
  78         case 0:
  79                 return 0;
  80         case 1:
  81         case 2:
  82         case 3:
  83                 /* Our lower layer calculations limit our precision to
  84                    1 microsecond */
  85                 return 1;
  86         case 4:
  87                 return 2;
  88         case 5:
  89                 return 4;
  90         case 6:
  91                 return 8;
  92         case 7:
  93                 return 16;
  94         default:
  95                 return 0;
  96         }
  97 }
  98
  99 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
 100                                                 struct ieee80211_hw *hw)
 101 {
 102         struct ieee80211_channel *curchan = hw->conf.channel;
 103         struct ath9k_channel *channel;
 104         u8 chan_idx;
 105
 106         chan_idx = curchan->hw_value;
 107         channel = &sc->sc_ah->channels[chan_idx];
 108         ath9k_update_ichannel(sc, hw, channel);
 109         return channel;
 110 }
 111
 112 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
 113 {
 114         unsigned long flags;
 115         bool ret;
 116
 117         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 118         ret = ath9k_hw_setpower(sc->sc_ah, mode);
 119         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 120
 121         return ret;
 122 }
 123
 124 void ath9k_ps_wakeup(struct ath_softc *sc)
 125 {
 126         unsigned long flags;
 127
 128         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 129         if (++sc->ps_usecount != 1)
 130                 goto unlock;
 131
 132         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 133
 134  unlock:
 135         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 136 }
 137
 138 void ath9k_ps_restore(struct ath_softc *sc)
 139 {
 140         unsigned long flags;
 141
 142         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 143         if (--sc->ps_usecount != 0)
 144                 goto unlock;
 145
 146         if (sc->ps_idle)
 147                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 148         else if (sc->ps_enabled &&
 149                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 150                               PS_WAIT_FOR_CAB |
 151                               PS_WAIT_FOR_PSPOLL_DATA |
 152                               PS_WAIT_FOR_TX_ACK)))
 153                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 154
 155  unlock:
 156         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 157 }
 158
 159 /*
 160  * Set/change channels.  If the channel is really being changed, it's done
 161  * by reseting the chip.  To accomplish this we must first cleanup any pending
 162  * DMA, then restart stuff.
 163 */
 164 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 165                     struct ath9k_channel *hchan)
 166 {
 167         struct ath_hw *ah = sc->sc_ah;
 168         struct ath_common *common = ath9k_hw_common(ah);
 169         struct ieee80211_conf *conf = &common->hw->conf;
 170         bool fastcc = true, stopped;
 171         struct ieee80211_channel *channel = hw->conf.channel;
 172         int r;
 173
 174         if (sc->sc_flags & SC_OP_INVALID)
 175                 return -EIO;
 176
 177         ath9k_ps_wakeup(sc);
 178
 179         /*
 180          * This is only performed if the channel settings have
 181          * actually changed.
 182          *
 183          * To switch channels clear any pending DMA operations;
 184          * wait long enough for the RX fifo to drain, reset the
 185          * hardware at the new frequency, and then re-enable
 186          * the relevant bits of the h/w.
 187          */
 188         ath9k_hw_set_interrupts(ah, 0);
 189         ath_drain_all_txq(sc, false);
 190         stopped = ath_stoprecv(sc);
 191
 192         /* XXX: do not flush receive queue here. We don't want
 193          * to flush data frames already in queue because of
 194          * changing channel. */
 195
 196         if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
 197                 fastcc = false;
 198
 199         ath_print(common, ATH_DBG_CONFIG,
 200                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
 201                   sc->sc_ah->curchan->channel,
 202                   channel->center_freq, conf_is_ht40(conf));
 203
 204         spin_lock_bh(&sc->sc_resetlock);
 205
 206         r = ath9k_hw_reset(ah, hchan, fastcc);
 207         if (r) {
 208                 ath_print(common, ATH_DBG_FATAL,
 209                           "Unable to reset channel (%u MHz), "
 210                           "reset status %d\n",
 211                           channel->center_freq, r);
 212                 spin_unlock_bh(&sc->sc_resetlock);
 213                 goto ps_restore;
 214         }
 215         spin_unlock_bh(&sc->sc_resetlock);
 216
 217         sc->sc_flags &= ~SC_OP_FULL_RESET;
 218
 219         if (ath_startrecv(sc) != 0) {
 220                 ath_print(common, ATH_DBG_FATAL,
 221                           "Unable to restart recv logic\n");
 222                 r = -EIO;
 223                 goto ps_restore;
 224         }
 225
 226         ath_cache_conf_rate(sc, &hw->conf);
 227         ath_update_txpow(sc);
 228         ath9k_hw_set_interrupts(ah, ah->imask);
 229
 230  ps_restore:
 231         ath9k_ps_restore(sc);
 232         return r;
 233 }
 234
 235 /*
 236  *  This routine performs the periodic noise floor calibration function
 237  *  that is used to adjust and optimize the chip performance.  This
 238  *  takes environmental changes (location, temperature) into account.
 239  *  When the task is complete, it reschedules itself depending on the
 240  *  appropriate interval that was calculated.
 241  */
 242 void ath_ani_calibrate(unsigned long data)
 243 {
 244         struct ath_softc *sc = (struct ath_softc *)data;
 245         struct ath_hw *ah = sc->sc_ah;
 246         struct ath_common *common = ath9k_hw_common(ah);
 247         bool longcal = false;
 248         bool shortcal = false;
 249         bool aniflag = false;
 250         unsigned int timestamp = jiffies_to_msecs(jiffies);
 251         u32 cal_interval, short_cal_interval;
 252
 253         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 254                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 255
 256         /* Only calibrate if awake */
 257         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 258                 goto set_timer;
 259
 260         ath9k_ps_wakeup(sc);
 261
 262         /* Long calibration runs independently of short calibration. */
 263         if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
 264                 longcal = true;
 265                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 266                 common->ani.longcal_timer = timestamp;
 267         }
 268
 269         /* Short calibration applies only while caldone is false */
 270         if (!common->ani.caldone) {
 271                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 272                         shortcal = true;
 273                         ath_print(common, ATH_DBG_ANI,
 274                                   "shortcal @%lu\n", jiffies);
 275                         common->ani.shortcal_timer = timestamp;
 276                         common->ani.resetcal_timer = timestamp;
 277                 }
 278         } else {
 279                 if ((timestamp - common->ani.resetcal_timer) >=
 280                     ATH_RESTART_CALINTERVAL) {
 281                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 282                         if (common->ani.caldone)
 283                                 common->ani.resetcal_timer = timestamp;
 284                 }
 285         }
 286
 287         /* Verify whether we must check ANI */
 288         if ((timestamp - common->ani.checkani_timer) >= ATH_ANI_POLLINTERVAL) {
 289                 aniflag = true;
 290                 common->ani.checkani_timer = timestamp;
 291         }
 292
 293         /* Skip all processing if there's nothing to do. */
 294         if (longcal || shortcal || aniflag) {
 295                 /* Call ANI routine if necessary */
 296                 if (aniflag)
 297                         ath9k_hw_ani_monitor(ah, ah->curchan);
 298
 299                 /* Perform calibration if necessary */
 300                 if (longcal || shortcal) {
 301                         common->ani.caldone =
 302                                 ath9k_hw_calibrate(ah,
 303                                                    ah->curchan,
 304                                                    common->rx_chainmask,
 305                                                    longcal);
 306
 307                         if (longcal)
 308                                 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
 309                                                                      ah->curchan);
 310
 311                         ath_print(common, ATH_DBG_ANI,
 312                                   " calibrate chan %u/%x nf: %d\n",
 313                                   ah->curchan->channel,
 314                                   ah->curchan->channelFlags,
 315                                   common->ani.noise_floor);
 316                 }
 317         }
 318
 319         ath9k_ps_restore(sc);
 320
 321 set_timer:
 322         /*
 323         * Set timer interval based on previous results.
 324         * The interval must be the shortest necessary to satisfy ANI,
 325         * short calibration and long calibration.
 326         */
 327         cal_interval = ATH_LONG_CALINTERVAL;
 328         if (sc->sc_ah->config.enable_ani)
 329                 cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL);
 330         if (!common->ani.caldone)
 331                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 332
 333         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 334 }
 335
 336 static void ath_start_ani(struct ath_common *common)
 337 {
 338         unsigned long timestamp = jiffies_to_msecs(jiffies);
 339
 340         common->ani.longcal_timer = timestamp;
 341         common->ani.shortcal_timer = timestamp;
 342         common->ani.checkani_timer = timestamp;
 343
 344         mod_timer(&common->ani.timer,
 345                   jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
 346 }
 347
 348 /*
 349  * Update tx/rx chainmask. For legacy association,
 350  * hard code chainmask to 1x1, for 11n association, use
 351  * the chainmask configuration, for bt coexistence, use
 352  * the chainmask configuration even in legacy mode.
 353  */
 354 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 355 {
 356         struct ath_hw *ah = sc->sc_ah;
 357         struct ath_common *common = ath9k_hw_common(ah);
 358
 359         if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
 360             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 361                 common->tx_chainmask = ah->caps.tx_chainmask;
 362                 common->rx_chainmask = ah->caps.rx_chainmask;
 363         } else {
 364                 common->tx_chainmask = 1;
 365                 common->rx_chainmask = 1;
 366         }
 367
 368         ath_print(common, ATH_DBG_CONFIG,
 369                   "tx chmask: %d, rx chmask: %d\n",
 370                   common->tx_chainmask,
 371                   common->rx_chainmask);
 372 }
 373
 374 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 375 {
 376         struct ath_node *an;
 377
 378         an = (struct ath_node *)sta->drv_priv;
 379
 380         if (sc->sc_flags & SC_OP_TXAGGR) {
 381                 ath_tx_node_init(sc, an);
 382                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 383                                      sta->ht_cap.ampdu_factor);
 384                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 385                 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
 386         }
 387 }
 388
 389 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 390 {
 391         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 392
 393         if (sc->sc_flags & SC_OP_TXAGGR)
 394                 ath_tx_node_cleanup(sc, an);
 395 }
 396
 397 void ath9k_tasklet(unsigned long data)
 398 {
 399         struct ath_softc *sc = (struct ath_softc *)data;
 400         struct ath_hw *ah = sc->sc_ah;
 401         struct ath_common *common = ath9k_hw_common(ah);
 402
 403         u32 status = sc->intrstatus;
 404         u32 rxmask;
 405
 406         ath9k_ps_wakeup(sc);
 407
 408         if ((status & ATH9K_INT_FATAL) ||
 409             !ath9k_hw_check_alive(ah)) {
 410                 ath_reset(sc, false);
 411                 ath9k_ps_restore(sc);
 412                 return;
 413         }
 414
 415         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 416                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 417                           ATH9K_INT_RXORN);
 418         else
 419                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 420
 421         if (status & rxmask) {
 422                 spin_lock_bh(&sc->rx.rxflushlock);
 423
 424                 /* Check for high priority Rx first */
 425                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 426                     (status & ATH9K_INT_RXHP))
 427                         ath_rx_tasklet(sc, 0, true);
 428
 429                 ath_rx_tasklet(sc, 0, false);
 430                 spin_unlock_bh(&sc->rx.rxflushlock);
 431         }
 432
 433         if (status & ATH9K_INT_TX) {
 434                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 435                         ath_tx_edma_tasklet(sc);
 436                 else
 437                         ath_tx_tasklet(sc);
 438         }
 439
 440         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 441                 /*
 442                  * TSF sync does not look correct; remain awake to sync with
 443                  * the next Beacon.
 444                  */
 445                 ath_print(common, ATH_DBG_PS,
 446                           "TSFOOR - Sync with next Beacon\n");
 447                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 448         }
 449
 450         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 451                 if (status & ATH9K_INT_GENTIMER)
 452                         ath_gen_timer_isr(sc->sc_ah);
 453
 454         /* re-enable hardware interrupt */
 455         ath9k_hw_set_interrupts(ah, ah->imask);
 456         ath9k_ps_restore(sc);
 457 }
 458
 459 irqreturn_t ath_isr(int irq, void *dev)
 460 {
 461 #define SCHED_INTR (                            \
 462                 ATH9K_INT_FATAL |               \
 463                 ATH9K_INT_RXORN |               \
 464                 ATH9K_INT_RXEOL |               \
 465                 ATH9K_INT_RX |                  \
 466                 ATH9K_INT_RXLP |                \
 467                 ATH9K_INT_RXHP |                \
 468                 ATH9K_INT_TX |                  \
 469                 ATH9K_INT_BMISS |               \
 470                 ATH9K_INT_CST |                 \
 471                 ATH9K_INT_TSFOOR |              \
 472                 ATH9K_INT_GENTIMER)
 473
 474         struct ath_softc *sc = dev;
 475         struct ath_hw *ah = sc->sc_ah;
 476         enum ath9k_int status;
 477         bool sched = false;
 478
 479         /*
 480          * The hardware is not ready/present, don't
 481          * touch anything. Note this can happen early
 482          * on if the IRQ is shared.
 483          */
 484         if (sc->sc_flags & SC_OP_INVALID)
 485                 return IRQ_NONE;
 486
 487
 488         /* shared irq, not for us */
 489
 490         if (!ath9k_hw_intrpend(ah))
 491                 return IRQ_NONE;
 492
 493         /*
 494          * Figure out the reason(s) for the interrupt.  Note
 495          * that the hal returns a pseudo-ISR that may include
 496          * bits we haven't explicitly enabled so we mask the
 497          * value to insure we only process bits we requested.
 498          */
 499         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 500         status &= ah->imask;    /* discard unasked-for bits */
 501
 502         /*
 503          * If there are no status bits set, then this interrupt was not
 504          * for me (should have been caught above).
 505          */
 506         if (!status)
 507                 return IRQ_NONE;
 508
 509         /* Cache the status */
 510         sc->intrstatus = status;
 511
 512         if (status & SCHED_INTR)
 513                 sched = true;
 514
 515         /*
 516          * If a FATAL or RXORN interrupt is received, we have to reset the
 517          * chip immediately.
 518          */
 519         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 520             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 521                 goto chip_reset;
 522
 523         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 524             (status & ATH9K_INT_BB_WATCHDOG)) {
 525                 ar9003_hw_bb_watchdog_dbg_info(ah);
 526                 goto chip_reset;
 527         }
 528
 529         if (status & ATH9K_INT_SWBA)
 530                 tasklet_schedule(&sc->bcon_tasklet);
 531
 532         if (status & ATH9K_INT_TXURN)
 533                 ath9k_hw_updatetxtriglevel(ah, true);
 534
 535         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 536                 if (status & ATH9K_INT_RXEOL) {
 537                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 538                         ath9k_hw_set_interrupts(ah, ah->imask);
 539                 }
 540         }
 541
 542         if (status & ATH9K_INT_MIB) {
 543                 /*
 544                  * Disable interrupts until we service the MIB
 545                  * interrupt; otherwise it will continue to
 546                  * fire.
 547                  */
 548                 ath9k_hw_set_interrupts(ah, 0);
 549                 /*
 550                  * Let the hal handle the event. We assume
 551                  * it will clear whatever condition caused
 552                  * the interrupt.
 553                  */
 554                 ath9k_hw_procmibevent(ah);
 555                 ath9k_hw_set_interrupts(ah, ah->imask);
 556         }
 557
 558         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 559                 if (status & ATH9K_INT_TIM_TIMER) {
 560                         /* Clear RxAbort bit so that we can
 561                          * receive frames */
 562                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 563                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 564                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 565                 }
 566
 567 chip_reset:
 568
 569         ath_debug_stat_interrupt(sc, status);
 570
 571         if (sched) {
 572                 /* turn off every interrupt except SWBA */
 573                 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
 574                 tasklet_schedule(&sc->intr_tq);
 575         }
 576
 577         return IRQ_HANDLED;
 578
 579 #undef SCHED_INTR
 580 }
 581
 582 static u32 ath_get_extchanmode(struct ath_softc *sc,
 583                                struct ieee80211_channel *chan,
 584                                enum nl80211_channel_type channel_type)
 585 {
 586         u32 chanmode = 0;
 587
 588         switch (chan->band) {
 589         case IEEE80211_BAND_2GHZ:
 590                 switch(channel_type) {
 591                 case NL80211_CHAN_NO_HT:
 592                 case NL80211_CHAN_HT20:
 593                         chanmode = CHANNEL_G_HT20;
 594                         break;
 595                 case NL80211_CHAN_HT40PLUS:
 596                         chanmode = CHANNEL_G_HT40PLUS;
 597                         break;
 598                 case NL80211_CHAN_HT40MINUS:
 599                         chanmode = CHANNEL_G_HT40MINUS;
 600                         break;
 601                 }
 602                 break;
 603         case IEEE80211_BAND_5GHZ:
 604                 switch(channel_type) {
 605                 case NL80211_CHAN_NO_HT:
 606                 case NL80211_CHAN_HT20:
 607                         chanmode = CHANNEL_A_HT20;
 608                         break;
 609                 case NL80211_CHAN_HT40PLUS:
 610                         chanmode = CHANNEL_A_HT40PLUS;
 611                         break;
 612                 case NL80211_CHAN_HT40MINUS:
 613                         chanmode = CHANNEL_A_HT40MINUS;
 614                         break;
 615                 }
 616                 break;
 617         default:
 618                 break;
 619         }
 620
 621         return chanmode;
 622 }
 623
 624 static int ath_setkey_tkip(struct ath_common *common, u16 keyix, const u8 *key,
 625                            struct ath9k_keyval *hk, const u8 *addr,
 626                            bool authenticator)
 627 {
 628         struct ath_hw *ah = common->ah;
 629         const u8 *key_rxmic;
 630         const u8 *key_txmic;
 631
 632         key_txmic = key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
 633         key_rxmic = key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
 634
 635         if (addr == NULL) {
 636                 /*
 637                  * Group key installation - only two key cache entries are used
 638                  * regardless of splitmic capability since group key is only
 639                  * used either for TX or RX.
 640                  */
 641                 if (authenticator) {
 642                         memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
 643                         memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_mic));
 644                 } else {
 645                         memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 646                         memcpy(hk->kv_txmic, key_rxmic, sizeof(hk->kv_mic));
 647                 }
 648                 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
 649         }
 650         if (!common->splitmic) {
 651                 /* TX and RX keys share the same key cache entry. */
 652                 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 653                 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
 654                 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
 655         }
 656
 657         /* Separate key cache entries for TX and RX */
 658
 659         /* TX key goes at first index, RX key at +32. */
 660         memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
 661         if (!ath9k_hw_set_keycache_entry(ah, keyix, hk, NULL)) {
 662                 /* TX MIC entry failed. No need to proceed further */
 663                 ath_print(common, ATH_DBG_FATAL,
 664                           "Setting TX MIC Key Failed\n");
 665                 return 0;
 666         }
 667
 668         memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 669         /* XXX delete tx key on failure? */
 670         return ath9k_hw_set_keycache_entry(ah, keyix + 32, hk, addr);
 671 }
 672
 673 static int ath_reserve_key_cache_slot_tkip(struct ath_common *common)
 674 {
 675         int i;
 676
 677         for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
 678                 if (test_bit(i, common->keymap) ||
 679                     test_bit(i + 64, common->keymap))
 680                         continue; /* At least one part of TKIP key allocated */
 681                 if (common->splitmic &&
 682                     (test_bit(i + 32, common->keymap) ||
 683                      test_bit(i + 64 + 32, common->keymap)))
 684                         continue; /* At least one part of TKIP key allocated */
 685
 686                 /* Found a free slot for a TKIP key */
 687                 return i;
 688         }
 689         return -1;
 690 }
 691
 692 static int ath_reserve_key_cache_slot(struct ath_common *common)
 693 {
 694         int i;
 695
 696         /* First, try to find slots that would not be available for TKIP. */
 697         if (common->splitmic) {
 698                 for (i = IEEE80211_WEP_NKID; i < common->keymax / 4; i++) {
 699                         if (!test_bit(i, common->keymap) &&
 700                             (test_bit(i + 32, common->keymap) ||
 701                              test_bit(i + 64, common->keymap) ||
 702                              test_bit(i + 64 + 32, common->keymap)))
 703                                 return i;
 704                         if (!test_bit(i + 32, common->keymap) &&
 705                             (test_bit(i, common->keymap) ||
 706                              test_bit(i + 64, common->keymap) ||
 707                              test_bit(i + 64 + 32, common->keymap)))
 708                                 return i + 32;
 709                         if (!test_bit(i + 64, common->keymap) &&
 710                             (test_bit(i , common->keymap) ||
 711                              test_bit(i + 32, common->keymap) ||
 712                              test_bit(i + 64 + 32, common->keymap)))
 713                                 return i + 64;
 714                         if (!test_bit(i + 64 + 32, common->keymap) &&
 715                             (test_bit(i, common->keymap) ||
 716                              test_bit(i + 32, common->keymap) ||
 717                              test_bit(i + 64, common->keymap)))
 718                                 return i + 64 + 32;
 719                 }
 720         } else {
 721                 for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
 722                         if (!test_bit(i, common->keymap) &&
 723                             test_bit(i + 64, common->keymap))
 724                                 return i;
 725                         if (test_bit(i, common->keymap) &&
 726                             !test_bit(i + 64, common->keymap))
 727                                 return i + 64;
 728                 }
 729         }
 730
 731         /* No partially used TKIP slots, pick any available slot */
 732         for (i = IEEE80211_WEP_NKID; i < common->keymax; i++) {
 733                 /* Do not allow slots that could be needed for TKIP group keys
 734                  * to be used. This limitation could be removed if we know that
 735                  * TKIP will not be used. */
 736                 if (i >= 64 && i < 64 + IEEE80211_WEP_NKID)
 737                         continue;
 738                 if (common->splitmic) {
 739                         if (i >= 32 && i < 32 + IEEE80211_WEP_NKID)
 740                                 continue;
 741                         if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID)
 742                                 continue;
 743                 }
 744
 745                 if (!test_bit(i, common->keymap))
 746                         return i; /* Found a free slot for a key */
 747         }
 748
 749         /* No free slot found */
 750         return -1;
 751 }
 752
 753 static int ath_key_config(struct ath_common *common,
 754                           struct ieee80211_vif *vif,
 755                           struct ieee80211_sta *sta,
 756                           struct ieee80211_key_conf *key)
 757 {
 758         struct ath_hw *ah = common->ah;
 759         struct ath9k_keyval hk;
 760         const u8 *mac = NULL;
 761         int ret = 0;
 762         int idx;
 763
 764         memset(&hk, 0, sizeof(hk));
 765
 766         switch (key->alg) {
 767         case ALG_WEP:
 768                 hk.kv_type = ATH9K_CIPHER_WEP;
 769                 break;
 770         case ALG_TKIP:
 771                 hk.kv_type = ATH9K_CIPHER_TKIP;
 772                 break;
 773         case ALG_CCMP:
 774                 hk.kv_type = ATH9K_CIPHER_AES_CCM;
 775                 break;
 776         default:
 777                 return -EOPNOTSUPP;
 778         }
 779
 780         hk.kv_len = key->keylen;
 781         memcpy(hk.kv_val, key->key, key->keylen);
 782
 783         if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
 784                 /* For now, use the default keys for broadcast keys. This may
 785                  * need to change with virtual interfaces. */
 786                 idx = key->keyidx;
 787         } else if (key->keyidx) {
 788                 if (WARN_ON(!sta))
 789                         return -EOPNOTSUPP;
 790                 mac = sta->addr;
 791
 792                 if (vif->type != NL80211_IFTYPE_AP) {
 793                         /* Only keyidx 0 should be used with unicast key, but
 794                          * allow this for client mode for now. */
 795                         idx = key->keyidx;
 796                 } else
 797                         return -EIO;
 798         } else {
 799                 if (WARN_ON(!sta))
 800                         return -EOPNOTSUPP;
 801                 mac = sta->addr;
 802
 803                 if (key->alg == ALG_TKIP)
 804                         idx = ath_reserve_key_cache_slot_tkip(common);
 805                 else
 806                         idx = ath_reserve_key_cache_slot(common);
 807                 if (idx < 0)
 808                         return -ENOSPC; /* no free key cache entries */
 809         }
 810
 811         if (key->alg == ALG_TKIP)
 812                 ret = ath_setkey_tkip(common, idx, key->key, &hk, mac,
 813                                       vif->type == NL80211_IFTYPE_AP);
 814         else
 815                 ret = ath9k_hw_set_keycache_entry(ah, idx, &hk, mac);
 816
 817         if (!ret)
 818                 return -EIO;
 819
 820         set_bit(idx, common->keymap);
 821         if (key->alg == ALG_TKIP) {
 822                 set_bit(idx + 64, common->keymap);
 823                 if (common->splitmic) {
 824                         set_bit(idx + 32, common->keymap);
 825                         set_bit(idx + 64 + 32, common->keymap);
 826                 }
 827         }
 828
 829         return idx;
 830 }
 831
 832 static void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key)
 833 {
 834         struct ath_hw *ah = common->ah;
 835
 836         ath9k_hw_keyreset(ah, key->hw_key_idx);
 837         if (key->hw_key_idx < IEEE80211_WEP_NKID)
 838                 return;
 839
 840         clear_bit(key->hw_key_idx, common->keymap);
 841         if (key->alg != ALG_TKIP)
 842                 return;
 843
 844         clear_bit(key->hw_key_idx + 64, common->keymap);
 845         if (common->splitmic) {
 846                 ath9k_hw_keyreset(ah, key->hw_key_idx + 32);
 847                 clear_bit(key->hw_key_idx + 32, common->keymap);
 848                 clear_bit(key->hw_key_idx + 64 + 32, common->keymap);
 849         }
 850 }
 851
 852 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 853                                  struct ieee80211_vif *vif,
 854                                  struct ieee80211_bss_conf *bss_conf)
 855 {
 856         struct ath_hw *ah = sc->sc_ah;
 857         struct ath_common *common = ath9k_hw_common(ah);
 858
 859         if (bss_conf->assoc) {
 860                 ath_print(common, ATH_DBG_CONFIG,
 861                           "Bss Info ASSOC %d, bssid: %pM\n",
 862                            bss_conf->aid, common->curbssid);
 863
 864                 /* New association, store aid */
 865                 common->curaid = bss_conf->aid;
 866                 ath9k_hw_write_associd(ah);
 867
 868                 /*
 869                  * Request a re-configuration of Beacon related timers
 870                  * on the receipt of the first Beacon frame (i.e.,
 871                  * after time sync with the AP).
 872                  */
 873                 sc->ps_flags |= PS_BEACON_SYNC;
 874
 875                 /* Configure the beacon */
 876                 ath_beacon_config(sc, vif);
 877
 878                 /* Reset rssi stats */
 879                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 880
 881                 ath_start_ani(common);
 882         } else {
 883                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 884                 common->curaid = 0;
 885                 /* Stop ANI */
 886                 del_timer_sync(&common->ani.timer);
 887         }
 888 }
 889
 890 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 891 {
 892         struct ath_hw *ah = sc->sc_ah;
 893         struct ath_common *common = ath9k_hw_common(ah);
 894         struct ieee80211_channel *channel = hw->conf.channel;
 895         int r;
 896
 897         ath9k_ps_wakeup(sc);
 898         ath9k_hw_configpcipowersave(ah, 0, 0);
 899
 900         if (!ah->curchan)
 901                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 902
 903         spin_lock_bh(&sc->sc_resetlock);
 904         r = ath9k_hw_reset(ah, ah->curchan, false);
 905         if (r) {
 906                 ath_print(common, ATH_DBG_FATAL,
 907                           "Unable to reset channel (%u MHz), "
 908                           "reset status %d\n",
 909                           channel->center_freq, r);
 910         }
 911         spin_unlock_bh(&sc->sc_resetlock);
 912
 913         ath_update_txpow(sc);
 914         if (ath_startrecv(sc) != 0) {
 915                 ath_print(common, ATH_DBG_FATAL,
 916                           "Unable to restart recv logic\n");
 917                 return;
 918         }
 919
 920         if (sc->sc_flags & SC_OP_BEACONS)
 921                 ath_beacon_config(sc, NULL);    /* restart beacons */
 922
 923         /* Re-Enable  interrupts */
 924         ath9k_hw_set_interrupts(ah, ah->imask);
 925
 926         /* Enable LED */
 927         ath9k_hw_cfg_output(ah, ah->led_pin,
 928                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 929         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 930
 931         ieee80211_wake_queues(hw);
 932         ath9k_ps_restore(sc);
 933 }
 934
 935 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 936 {
 937         struct ath_hw *ah = sc->sc_ah;
 938         struct ieee80211_channel *channel = hw->conf.channel;
 939         int r;
 940
 941         ath9k_ps_wakeup(sc);
 942         ieee80211_stop_queues(hw);
 943
 944         /* Disable LED */
 945         ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 946         ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 947
 948         /* Disable interrupts */
 949         ath9k_hw_set_interrupts(ah, 0);
 950
 951         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 952         ath_stoprecv(sc);               /* turn off frame recv */
 953         ath_flushrecv(sc);              /* flush recv queue */
 954
 955         if (!ah->curchan)
 956                 ah->curchan = ath_get_curchannel(sc, hw);
 957
 958         spin_lock_bh(&sc->sc_resetlock);
 959         r = ath9k_hw_reset(ah, ah->curchan, false);
 960         if (r) {
 961                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 962                           "Unable to reset channel (%u MHz), "
 963                           "reset status %d\n",
 964                           channel->center_freq, r);
 965         }
 966         spin_unlock_bh(&sc->sc_resetlock);
 967
 968         ath9k_hw_phy_disable(ah);
 969         ath9k_hw_configpcipowersave(ah, 1, 1);
 970         ath9k_ps_restore(sc);
 971         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 972 }
 973
 974 int ath_reset(struct ath_softc *sc, bool retry_tx)
 975 {
 976         struct ath_hw *ah = sc->sc_ah;
 977         struct ath_common *common = ath9k_hw_common(ah);
 978         struct ieee80211_hw *hw = sc->hw;
 979         int r;
 980
 981         /* Stop ANI */
 982         del_timer_sync(&common->ani.timer);
 983
 984         ieee80211_stop_queues(hw);
 985
 986         ath9k_hw_set_interrupts(ah, 0);
 987         ath_drain_all_txq(sc, retry_tx);
 988         ath_stoprecv(sc);
 989         ath_flushrecv(sc);
 990
 991         spin_lock_bh(&sc->sc_resetlock);
 992         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
 993         if (r)
 994                 ath_print(common, ATH_DBG_FATAL,
 995                           "Unable to reset hardware; reset status %d\n", r);
 996         spin_unlock_bh(&sc->sc_resetlock);
 997
 998         if (ath_startrecv(sc) != 0)
 999                 ath_print(common, ATH_DBG_FATAL,
1000                           "Unable to start recv logic\n");
1001
1002         /*
1003          * We may be doing a reset in response to a request
1004          * that changes the channel so update any state that
1005          * might change as a result.
1006          */
1007         ath_cache_conf_rate(sc, &hw->conf);
1008
1009         ath_update_txpow(sc);
1010
1011         if (sc->sc_flags & SC_OP_BEACONS)
1012                 ath_beacon_config(sc, NULL);    /* restart beacons */
1013
1014         ath9k_hw_set_interrupts(ah, ah->imask);
1015
1016         if (retry_tx) {
1017                 int i;
1018                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1019                         if (ATH_TXQ_SETUP(sc, i)) {
1020                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1021                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1022                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1023                         }
1024                 }
1025         }
1026
1027         ieee80211_wake_queues(hw);
1028
1029         /* Start ANI */
1030         ath_start_ani(common);
1031
1032         return r;
1033 }
1034
1035 int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1036 {
1037         int qnum;
1038
1039         switch (queue) {
1040         case 0:
1041                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VO];
1042                 break;
1043         case 1:
1044                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VI];
1045                 break;
1046         case 2:
1047                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
1048                 break;
1049         case 3:
1050                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BK];
1051                 break;
1052         default:
1053                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
1054                 break;
1055         }
1056
1057         return qnum;
1058 }
1059
1060 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1061 {
1062         int qnum;
1063
1064         switch (queue) {
1065         case ATH9K_WME_AC_VO:
1066                 qnum = 0;
1067                 break;
1068         case ATH9K_WME_AC_VI:
1069                 qnum = 1;
1070                 break;
1071         case ATH9K_WME_AC_BE:
1072                 qnum = 2;
1073                 break;
1074         case ATH9K_WME_AC_BK:
1075                 qnum = 3;
1076                 break;
1077         default:
1078                 qnum = -1;
1079                 break;
1080         }
1081
1082         return qnum;
1083 }
1084
1085 /* XXX: Remove me once we don't depend on ath9k_channel for all
1086  * this redundant data */
1087 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1088                            struct ath9k_channel *ichan)
1089 {
1090         struct ieee80211_channel *chan = hw->conf.channel;
1091         struct ieee80211_conf *conf = &hw->conf;
1092
1093         ichan->channel = chan->center_freq;
1094         ichan->chan = chan;
1095
1096         if (chan->band == IEEE80211_BAND_2GHZ) {
1097                 ichan->chanmode = CHANNEL_G;
1098                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1099         } else {
1100                 ichan->chanmode = CHANNEL_A;
1101                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1102         }
1103
1104         if (conf_is_ht(conf))
1105                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1106                                             conf->channel_type);
1107 }
1108
1109 /**********************/
1110 /* mac80211 callbacks */
1111 /**********************/
1112
1113 static int ath9k_start(struct ieee80211_hw *hw)
1114 {
1115         struct ath_wiphy *aphy = hw->priv;
1116         struct ath_softc *sc = aphy->sc;
1117         struct ath_hw *ah = sc->sc_ah;
1118         struct ath_common *common = ath9k_hw_common(ah);
1119         struct ieee80211_channel *curchan = hw->conf.channel;
1120         struct ath9k_channel *init_channel;
1121         int r;
1122
1123         ath_print(common, ATH_DBG_CONFIG,
1124                   "Starting driver with initial channel: %d MHz\n",
1125                   curchan->center_freq);
1126
1127         mutex_lock(&sc->mutex);
1128
1129         if (ath9k_wiphy_started(sc)) {
1130                 if (sc->chan_idx == curchan->hw_value) {
1131                         /*
1132                          * Already on the operational channel, the new wiphy
1133                          * can be marked active.
1134                          */
1135                         aphy->state = ATH_WIPHY_ACTIVE;
1136                         ieee80211_wake_queues(hw);
1137                 } else {
1138                         /*
1139                          * Another wiphy is on another channel, start the new
1140                          * wiphy in paused state.
1141                          */
1142                         aphy->state = ATH_WIPHY_PAUSED;
1143                         ieee80211_stop_queues(hw);
1144                 }
1145                 mutex_unlock(&sc->mutex);
1146                 return 0;
1147         }
1148         aphy->state = ATH_WIPHY_ACTIVE;
1149
1150         /* setup initial channel */
1151
1152         sc->chan_idx = curchan->hw_value;
1153
1154         init_channel = ath_get_curchannel(sc, hw);
1155
1156         /* Reset SERDES registers */
1157         ath9k_hw_configpcipowersave(ah, 0, 0);
1158
1159         /*
1160          * The basic interface to setting the hardware in a good
1161          * state is ``reset''.  On return the hardware is known to
1162          * be powered up and with interrupts disabled.  This must
1163          * be followed by initialization of the appropriate bits
1164          * and then setup of the interrupt mask.
1165          */
1166         spin_lock_bh(&sc->sc_resetlock);
1167         r = ath9k_hw_reset(ah, init_channel, false);
1168         if (r) {
1169                 ath_print(common, ATH_DBG_FATAL,
1170                           "Unable to reset hardware; reset status %d "
1171                           "(freq %u MHz)\n", r,
1172                           curchan->center_freq);
1173                 spin_unlock_bh(&sc->sc_resetlock);
1174                 goto mutex_unlock;
1175         }
1176         spin_unlock_bh(&sc->sc_resetlock);
1177
1178         /*
1179          * This is needed only to setup initial state
1180          * but it's best done after a reset.
1181          */
1182         ath_update_txpow(sc);
1183
1184         /*
1185          * Setup the hardware after reset:
1186          * The receive engine is set going.
1187          * Frame transmit is handled entirely
1188          * in the frame output path; there's nothing to do
1189          * here except setup the interrupt mask.
1190          */
1191         if (ath_startrecv(sc) != 0) {
1192                 ath_print(common, ATH_DBG_FATAL,
1193                           "Unable to start recv logic\n");
1194                 r = -EIO;
1195                 goto mutex_unlock;
1196         }
1197
1198         /* Setup our intr mask. */
1199         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1200                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1201                     ATH9K_INT_GLOBAL;
1202
1203         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1204                 ah->imask |= ATH9K_INT_RXHP |
1205                              ATH9K_INT_RXLP |
1206                              ATH9K_INT_BB_WATCHDOG;
1207         else
1208                 ah->imask |= ATH9K_INT_RX;
1209
1210         if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
1211                 ah->imask |= ATH9K_INT_GTT;
1212
1213         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1214                 ah->imask |= ATH9K_INT_CST;
1215
1216         ath_cache_conf_rate(sc, &hw->conf);
1217
1218         sc->sc_flags &= ~SC_OP_INVALID;
1219
1220         /* Disable BMISS interrupt when we're not associated */
1221         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1222         ath9k_hw_set_interrupts(ah, ah->imask);
1223
1224         ieee80211_wake_queues(hw);
1225
1226         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1227
1228         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1229             !ah->btcoex_hw.enabled) {
1230                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1231                                            AR_STOMP_LOW_WLAN_WGHT);
1232                 ath9k_hw_btcoex_enable(ah);
1233
1234                 if (common->bus_ops->bt_coex_prep)
1235                         common->bus_ops->bt_coex_prep(common);
1236                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1237                         ath9k_btcoex_timer_resume(sc);
1238         }
1239
1240 mutex_unlock:
1241         mutex_unlock(&sc->mutex);
1242
1243         return r;
1244 }
1245
1246 static int ath9k_tx(struct ieee80211_hw *hw,
1247                     struct sk_buff *skb)
1248 {
1249         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1250         struct ath_wiphy *aphy = hw->priv;
1251         struct ath_softc *sc = aphy->sc;
1252         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1253         struct ath_tx_control txctl;
1254         int padpos, padsize;
1255         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1256
1257         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1258                 ath_print(common, ATH_DBG_XMIT,
1259                           "ath9k: %s: TX in unexpected wiphy state "
1260                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1261                 goto exit;
1262         }
1263
1264         if (sc->ps_enabled) {
1265                 /*
1266                  * mac80211 does not set PM field for normal data frames, so we
1267                  * need to update that based on the current PS mode.
1268                  */
1269                 if (ieee80211_is_data(hdr->frame_control) &&
1270                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1271                     !ieee80211_has_pm(hdr->frame_control)) {
1272                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1273                                   "while in PS mode\n");
1274                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1275                 }
1276         }
1277
1278         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1279                 /*
1280                  * We are using PS-Poll and mac80211 can request TX while in
1281                  * power save mode. Need to wake up hardware for the TX to be
1282                  * completed and if needed, also for RX of buffered frames.
1283                  */
1284                 ath9k_ps_wakeup(sc);
1285                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1286                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1287                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1288                         ath_print(common, ATH_DBG_PS,
1289                                   "Sending PS-Poll to pick a buffered frame\n");
1290                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1291                 } else {
1292                         ath_print(common, ATH_DBG_PS,
1293                                   "Wake up to complete TX\n");
1294                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1295                 }
1296                 /*
1297                  * The actual restore operation will happen only after
1298                  * the sc_flags bit is cleared. We are just dropping
1299                  * the ps_usecount here.
1300                  */
1301                 ath9k_ps_restore(sc);
1302         }
1303
1304         memset(&txctl, 0, sizeof(struct ath_tx_control));
1305
1306         /*
1307          * As a temporary workaround, assign seq# here; this will likely need
1308          * to be cleaned up to work better with Beacon transmission and virtual
1309          * BSSes.
1310          */
1311         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1312                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1313                         sc->tx.seq_no += 0x10;
1314                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1315                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1316         }
1317
1318         /* Add the padding after the header if this is not already done */
1319         padpos = ath9k_cmn_padpos(hdr->frame_control);
1320         padsize = padpos & 3;
1321         if (padsize && skb->len>padpos) {
1322                 if (skb_headroom(skb) < padsize)
1323                         return -1;
1324                 skb_push(skb, padsize);
1325                 memmove(skb->data, skb->data + padsize, padpos);
1326         }
1327
1328         /* Check if a tx queue is available */
1329
1330         txctl.txq = ath_test_get_txq(sc, skb);
1331         if (!txctl.txq)
1332                 goto exit;
1333
1334         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1335
1336         if (ath_tx_start(hw, skb, &txctl) != 0) {
1337                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1338                 goto exit;
1339         }
1340
1341         return 0;
1342 exit:
1343         dev_kfree_skb_any(skb);
1344         return 0;
1345 }
1346
1347 static void ath9k_stop(struct ieee80211_hw *hw)
1348 {
1349         struct ath_wiphy *aphy = hw->priv;
1350         struct ath_softc *sc = aphy->sc;
1351         struct ath_hw *ah = sc->sc_ah;
1352         struct ath_common *common = ath9k_hw_common(ah);
1353
1354         mutex_lock(&sc->mutex);
1355
1356         aphy->state = ATH_WIPHY_INACTIVE;
1357
1358         cancel_delayed_work_sync(&sc->ath_led_blink_work);
1359         cancel_delayed_work_sync(&sc->tx_complete_work);
1360
1361         if (!sc->num_sec_wiphy) {
1362                 cancel_delayed_work_sync(&sc->wiphy_work);
1363                 cancel_work_sync(&sc->chan_work);
1364         }
1365
1366         if (sc->sc_flags & SC_OP_INVALID) {
1367                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1368                 mutex_unlock(&sc->mutex);
1369                 return;
1370         }
1371
1372         if (ath9k_wiphy_started(sc)) {
1373                 mutex_unlock(&sc->mutex);
1374                 return; /* another wiphy still in use */
1375         }
1376
1377         /* Ensure HW is awake when we try to shut it down. */
1378         ath9k_ps_wakeup(sc);
1379
1380         if (ah->btcoex_hw.enabled) {
1381                 ath9k_hw_btcoex_disable(ah);
1382                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1383                         ath9k_btcoex_timer_pause(sc);
1384         }
1385
1386         /* make sure h/w will not generate any interrupt
1387          * before setting the invalid flag. */
1388         ath9k_hw_set_interrupts(ah, 0);
1389
1390         if (!(sc->sc_flags & SC_OP_INVALID)) {
1391                 ath_drain_all_txq(sc, false);
1392                 ath_stoprecv(sc);
1393                 ath9k_hw_phy_disable(ah);
1394         } else
1395                 sc->rx.rxlink = NULL;
1396
1397         /* disable HAL and put h/w to sleep */
1398         ath9k_hw_disable(ah);
1399         ath9k_hw_configpcipowersave(ah, 1, 1);
1400         ath9k_ps_restore(sc);
1401
1402         /* Finally, put the chip in FULL SLEEP mode */
1403         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1404
1405         sc->sc_flags |= SC_OP_INVALID;
1406
1407         mutex_unlock(&sc->mutex);
1408
1409         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1410 }
1411
1412 static int ath9k_add_interface(struct ieee80211_hw *hw,
1413                                struct ieee80211_vif *vif)
1414 {
1415         struct ath_wiphy *aphy = hw->priv;
1416         struct ath_softc *sc = aphy->sc;
1417         struct ath_hw *ah = sc->sc_ah;
1418         struct ath_common *common = ath9k_hw_common(ah);
1419         struct ath_vif *avp = (void *)vif->drv_priv;
1420         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1421         int ret = 0;
1422
1423         mutex_lock(&sc->mutex);
1424
1425         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1426             sc->nvifs > 0) {
1427                 ret = -ENOBUFS;
1428                 goto out;
1429         }
1430
1431         switch (vif->type) {
1432         case NL80211_IFTYPE_STATION:
1433                 ic_opmode = NL80211_IFTYPE_STATION;
1434                 break;
1435         case NL80211_IFTYPE_ADHOC:
1436         case NL80211_IFTYPE_AP:
1437         case NL80211_IFTYPE_MESH_POINT:
1438                 if (sc->nbcnvifs >= ATH_BCBUF) {
1439                         ret = -ENOBUFS;
1440                         goto out;
1441                 }
1442                 ic_opmode = vif->type;
1443                 break;
1444         default:
1445                 ath_print(common, ATH_DBG_FATAL,
1446                         "Interface type %d not yet supported\n", vif->type);
1447                 ret = -EOPNOTSUPP;
1448                 goto out;
1449         }
1450
1451         ath_print(common, ATH_DBG_CONFIG,
1452                   "Attach a VIF of type: %d\n", ic_opmode);
1453
1454         /* Set the VIF opmode */
1455         avp->av_opmode = ic_opmode;
1456         avp->av_bslot = -1;
1457
1458         sc->nvifs++;
1459
1460         if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1461                 ath9k_set_bssid_mask(hw);
1462
1463         if (sc->nvifs > 1)
1464                 goto out; /* skip global settings for secondary vif */
1465
1466         if (ic_opmode == NL80211_IFTYPE_AP) {
1467                 ath9k_hw_set_tsfadjust(ah, 1);
1468                 sc->sc_flags |= SC_OP_TSF_RESET;
1469         }
1470
1471         /* Set the device opmode */
1472         ah->opmode = ic_opmode;
1473
1474         /*
1475          * Enable MIB interrupts when there are hardware phy counters.
1476          * Note we only do this (at the moment) for station mode.
1477          */
1478         if ((vif->type == NL80211_IFTYPE_STATION) ||
1479             (vif->type == NL80211_IFTYPE_ADHOC) ||
1480             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1481                 if (ah->config.enable_ani)
1482                         ah->imask |= ATH9K_INT_MIB;
1483                 ah->imask |= ATH9K_INT_TSFOOR;
1484         }
1485
1486         ath9k_hw_set_interrupts(ah, ah->imask);
1487
1488         if (vif->type == NL80211_IFTYPE_AP    ||
1489             vif->type == NL80211_IFTYPE_ADHOC ||
1490             vif->type == NL80211_IFTYPE_MONITOR)
1491                 ath_start_ani(common);
1492
1493 out:
1494         mutex_unlock(&sc->mutex);
1495         return ret;
1496 }
1497
1498 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1499                                    struct ieee80211_vif *vif)
1500 {
1501         struct ath_wiphy *aphy = hw->priv;
1502         struct ath_softc *sc = aphy->sc;
1503         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1504         struct ath_vif *avp = (void *)vif->drv_priv;
1505         int i;
1506
1507         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1508
1509         mutex_lock(&sc->mutex);
1510
1511         /* Stop ANI */
1512         del_timer_sync(&common->ani.timer);
1513
1514         /* Reclaim beacon resources */
1515         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1516             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1517             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1518                 ath9k_ps_wakeup(sc);
1519                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1520                 ath9k_ps_restore(sc);
1521         }
1522
1523         ath_beacon_return(sc, avp);
1524         sc->sc_flags &= ~SC_OP_BEACONS;
1525
1526         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1527                 if (sc->beacon.bslot[i] == vif) {
1528                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1529                                "slot\n", __func__);
1530                         sc->beacon.bslot[i] = NULL;
1531                         sc->beacon.bslot_aphy[i] = NULL;
1532                 }
1533         }
1534
1535         sc->nvifs--;
1536
1537         mutex_unlock(&sc->mutex);
1538 }
1539
1540 void ath9k_enable_ps(struct ath_softc *sc)
1541 {
1542         struct ath_hw *ah = sc->sc_ah;
1543
1544         sc->ps_enabled = true;
1545         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1546                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1547                         ah->imask |= ATH9K_INT_TIM_TIMER;
1548                         ath9k_hw_set_interrupts(ah, ah->imask);
1549                 }
1550                 ath9k_hw_setrxabort(ah, 1);
1551         }
1552 }
1553
1554 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1555 {
1556         struct ath_wiphy *aphy = hw->priv;
1557         struct ath_softc *sc = aphy->sc;
1558         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1559         struct ieee80211_conf *conf = &hw->conf;
1560         struct ath_hw *ah = sc->sc_ah;
1561         bool disable_radio;
1562
1563         mutex_lock(&sc->mutex);
1564
1565         /*
1566          * Leave this as the first check because we need to turn on the
1567          * radio if it was disabled before prior to processing the rest
1568          * of the changes. Likewise we must only disable the radio towards
1569          * the end.
1570          */
1571         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1572                 bool enable_radio;
1573                 bool all_wiphys_idle;
1574                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1575
1576                 spin_lock_bh(&sc->wiphy_lock);
1577                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1578                 ath9k_set_wiphy_idle(aphy, idle);
1579
1580                 enable_radio = (!idle && all_wiphys_idle);
1581
1582                 /*
1583                  * After we unlock here its possible another wiphy
1584                  * can be re-renabled so to account for that we will
1585                  * only disable the radio toward the end of this routine
1586                  * if by then all wiphys are still idle.
1587                  */
1588                 spin_unlock_bh(&sc->wiphy_lock);
1589
1590                 if (enable_radio) {
1591                         sc->ps_idle = false;
1592                         ath_radio_enable(sc, hw);
1593                         ath_print(common, ATH_DBG_CONFIG,
1594                                   "not-idle: enabling radio\n");
1595                 }
1596         }
1597
1598         /*
1599          * We just prepare to enable PS. We have to wait until our AP has
1600          * ACK'd our null data frame to disable RX otherwise we'll ignore
1601          * those ACKs and end up retransmitting the same null data frames.
1602          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1603          */
1604         if (changed & IEEE80211_CONF_CHANGE_PS) {
1605                 if (conf->flags & IEEE80211_CONF_PS) {
1606                         sc->ps_flags |= PS_ENABLED;
1607                         /*
1608                          * At this point we know hardware has received an ACK
1609                          * of a previously sent null data frame.
1610                          */
1611                         if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1612                                 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1613                                 ath9k_enable_ps(sc);
1614                         }
1615                 } else {
1616                         sc->ps_enabled = false;
1617                         sc->ps_flags &= ~(PS_ENABLED |
1618                                           PS_NULLFUNC_COMPLETED);
1619                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
1620                         if (!(ah->caps.hw_caps &
1621                               ATH9K_HW_CAP_AUTOSLEEP)) {
1622                                 ath9k_hw_setrxabort(sc->sc_ah, 0);
1623                                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1624                                                   PS_WAIT_FOR_CAB |
1625                                                   PS_WAIT_FOR_PSPOLL_DATA |
1626                                                   PS_WAIT_FOR_TX_ACK);
1627                                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1628                                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1629                                         ath9k_hw_set_interrupts(sc->sc_ah,
1630                                                         ah->imask);
1631                                 }
1632                         }
1633                 }
1634         }
1635
1636         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1637                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1638                         ath_print(common, ATH_DBG_CONFIG,
1639                                   "HW opmode set to Monitor mode\n");
1640                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1641                 }
1642         }
1643
1644         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1645                 struct ieee80211_channel *curchan = hw->conf.channel;
1646                 int pos = curchan->hw_value;
1647
1648                 aphy->chan_idx = pos;
1649                 aphy->chan_is_ht = conf_is_ht(conf);
1650
1651                 if (aphy->state == ATH_WIPHY_SCAN ||
1652                     aphy->state == ATH_WIPHY_ACTIVE)
1653                         ath9k_wiphy_pause_all_forced(sc, aphy);
1654                 else {
1655                         /*
1656                          * Do not change operational channel based on a paused
1657                          * wiphy changes.
1658                          */
1659                         goto skip_chan_change;
1660                 }
1661
1662                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1663                           curchan->center_freq);
1664
1665                 /* XXX: remove me eventualy */
1666                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1667
1668                 ath_update_chainmask(sc, conf_is_ht(conf));
1669
1670                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1671                         ath_print(common, ATH_DBG_FATAL,
1672                                   "Unable to set channel\n");
1673                         mutex_unlock(&sc->mutex);
1674                         return -EINVAL;
1675                 }
1676         }
1677
1678 skip_chan_change:
1679         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1680                 sc->config.txpowlimit = 2 * conf->power_level;
1681                 ath_update_txpow(sc);
1682         }
1683
1684         spin_lock_bh(&sc->wiphy_lock);
1685         disable_radio = ath9k_all_wiphys_idle(sc);
1686         spin_unlock_bh(&sc->wiphy_lock);
1687
1688         if (disable_radio) {
1689                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1690                 sc->ps_idle = true;
1691                 ath_radio_disable(sc, hw);
1692         }
1693
1694         mutex_unlock(&sc->mutex);
1695
1696         return 0;
1697 }
1698
1699 #define SUPPORTED_FILTERS                       \
1700         (FIF_PROMISC_IN_BSS |                   \
1701         FIF_ALLMULTI |                          \
1702         FIF_CONTROL |                           \
1703         FIF_PSPOLL |                            \
1704         FIF_OTHER_BSS |                         \
1705         FIF_BCN_PRBRESP_PROMISC |               \
1706         FIF_FCSFAIL)
1707
1708 /* FIXME: sc->sc_full_reset ? */
1709 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1710                                    unsigned int changed_flags,
1711                                    unsigned int *total_flags,
1712                                    u64 multicast)
1713 {
1714         struct ath_wiphy *aphy = hw->priv;
1715         struct ath_softc *sc = aphy->sc;
1716         u32 rfilt;
1717
1718         changed_flags &= SUPPORTED_FILTERS;
1719         *total_flags &= SUPPORTED_FILTERS;
1720
1721         sc->rx.rxfilter = *total_flags;
1722         ath9k_ps_wakeup(sc);
1723         rfilt = ath_calcrxfilter(sc);
1724         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1725         ath9k_ps_restore(sc);
1726
1727         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1728                   "Set HW RX filter: 0x%x\n", rfilt);
1729 }
1730
1731 static int ath9k_sta_add(struct ieee80211_hw *hw,
1732                          struct ieee80211_vif *vif,
1733                          struct ieee80211_sta *sta)
1734 {
1735         struct ath_wiphy *aphy = hw->priv;
1736         struct ath_softc *sc = aphy->sc;
1737
1738         ath_node_attach(sc, sta);
1739
1740         return 0;
1741 }
1742
1743 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1744                             struct ieee80211_vif *vif,
1745                             struct ieee80211_sta *sta)
1746 {
1747         struct ath_wiphy *aphy = hw->priv;
1748         struct ath_softc *sc = aphy->sc;
1749
1750         ath_node_detach(sc, sta);
1751
1752         return 0;
1753 }
1754
1755 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1756                          const struct ieee80211_tx_queue_params *params)
1757 {
1758         struct ath_wiphy *aphy = hw->priv;
1759         struct ath_softc *sc = aphy->sc;
1760         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1761         struct ath9k_tx_queue_info qi;
1762         int ret = 0, qnum;
1763
1764         if (queue >= WME_NUM_AC)
1765                 return 0;
1766
1767         mutex_lock(&sc->mutex);
1768
1769         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1770
1771         qi.tqi_aifs = params->aifs;
1772         qi.tqi_cwmin = params->cw_min;
1773         qi.tqi_cwmax = params->cw_max;
1774         qi.tqi_burstTime = params->txop;
1775         qnum = ath_get_hal_qnum(queue, sc);
1776
1777         ath_print(common, ATH_DBG_CONFIG,
1778                   "Configure tx [queue/halq] [%d/%d],  "
1779                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1780                   queue, qnum, params->aifs, params->cw_min,
1781                   params->cw_max, params->txop);
1782
1783         ret = ath_txq_update(sc, qnum, &qi);
1784         if (ret)
1785                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1786
1787         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1788                 if ((qnum == sc->tx.hwq_map[ATH9K_WME_AC_BE]) && !ret)
1789                         ath_beaconq_config(sc);
1790
1791         mutex_unlock(&sc->mutex);
1792
1793         return ret;
1794 }
1795
1796 static int ath9k_set_key(struct ieee80211_hw *hw,
1797                          enum set_key_cmd cmd,
1798                          struct ieee80211_vif *vif,
1799                          struct ieee80211_sta *sta,
1800                          struct ieee80211_key_conf *key)
1801 {
1802         struct ath_wiphy *aphy = hw->priv;
1803         struct ath_softc *sc = aphy->sc;
1804         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1805         int ret = 0;
1806
1807         if (modparam_nohwcrypt)
1808                 return -ENOSPC;
1809
1810         mutex_lock(&sc->mutex);
1811         ath9k_ps_wakeup(sc);
1812         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1813
1814         switch (cmd) {
1815         case SET_KEY:
1816                 ret = ath_key_config(common, vif, sta, key);
1817                 if (ret >= 0) {
1818                         key->hw_key_idx = ret;
1819                         /* push IV and Michael MIC generation to stack */
1820                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1821                         if (key->alg == ALG_TKIP)
1822                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1823                         if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
1824                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1825                         ret = 0;
1826                 }
1827                 break;
1828         case DISABLE_KEY:
1829                 ath_key_delete(common, key);
1830                 break;
1831         default:
1832                 ret = -EINVAL;
1833         }
1834
1835         ath9k_ps_restore(sc);
1836         mutex_unlock(&sc->mutex);
1837
1838         return ret;
1839 }
1840
1841 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1842                                    struct ieee80211_vif *vif,
1843                                    struct ieee80211_bss_conf *bss_conf,
1844                                    u32 changed)
1845 {
1846         struct ath_wiphy *aphy = hw->priv;
1847         struct ath_softc *sc = aphy->sc;
1848         struct ath_hw *ah = sc->sc_ah;
1849         struct ath_common *common = ath9k_hw_common(ah);
1850         struct ath_vif *avp = (void *)vif->drv_priv;
1851         int slottime;
1852         int error;
1853
1854         mutex_lock(&sc->mutex);
1855
1856         if (changed & BSS_CHANGED_BSSID) {
1857                 /* Set BSSID */
1858                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1859                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1860                 common->curaid = 0;
1861                 ath9k_hw_write_associd(ah);
1862
1863                 /* Set aggregation protection mode parameters */
1864                 sc->config.ath_aggr_prot = 0;
1865
1866                 /* Only legacy IBSS for now */
1867                 if (vif->type == NL80211_IFTYPE_ADHOC)
1868                         ath_update_chainmask(sc, 0);
1869
1870                 ath_print(common, ATH_DBG_CONFIG,
1871                           "BSSID: %pM aid: 0x%x\n",
1872                           common->curbssid, common->curaid);
1873
1874                 /* need to reconfigure the beacon */
1875                 sc->sc_flags &= ~SC_OP_BEACONS ;
1876         }
1877
1878         /* Enable transmission of beacons (AP, IBSS, MESH) */
1879         if ((changed & BSS_CHANGED_BEACON) ||
1880             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1881                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1882                 error = ath_beacon_alloc(aphy, vif);
1883                 if (!error)
1884                         ath_beacon_config(sc, vif);
1885         }
1886
1887         if (changed & BSS_CHANGED_ERP_SLOT) {
1888                 if (bss_conf->use_short_slot)
1889                         slottime = 9;
1890                 else
1891                         slottime = 20;
1892                 if (vif->type == NL80211_IFTYPE_AP) {
1893                         /*
1894                          * Defer update, so that connected stations can adjust
1895                          * their settings at the same time.
1896                          * See beacon.c for more details
1897                          */
1898                         sc->beacon.slottime = slottime;
1899                         sc->beacon.updateslot = UPDATE;
1900                 } else {
1901                         ah->slottime = slottime;
1902                         ath9k_hw_init_global_settings(ah);
1903                 }
1904         }
1905
1906         /* Disable transmission of beacons */
1907         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1908                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1909
1910         if (changed & BSS_CHANGED_BEACON_INT) {
1911                 sc->beacon_interval = bss_conf->beacon_int;
1912                 /*
1913                  * In case of AP mode, the HW TSF has to be reset
1914                  * when the beacon interval changes.
1915                  */
1916                 if (vif->type == NL80211_IFTYPE_AP) {
1917                         sc->sc_flags |= SC_OP_TSF_RESET;
1918                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1919                         error = ath_beacon_alloc(aphy, vif);
1920                         if (!error)
1921                                 ath_beacon_config(sc, vif);
1922                 } else {
1923                         ath_beacon_config(sc, vif);
1924                 }
1925         }
1926
1927         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1928                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1929                           bss_conf->use_short_preamble);
1930                 if (bss_conf->use_short_preamble)
1931                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1932                 else
1933                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1934         }
1935
1936         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1937                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1938                           bss_conf->use_cts_prot);
1939                 if (bss_conf->use_cts_prot &&
1940                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1941                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1942                 else
1943                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1944         }
1945
1946         if (changed & BSS_CHANGED_ASSOC) {
1947                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1948                         bss_conf->assoc);
1949                 ath9k_bss_assoc_info(sc, vif, bss_conf);
1950         }
1951
1952         mutex_unlock(&sc->mutex);
1953 }
1954
1955 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1956 {
1957         u64 tsf;
1958         struct ath_wiphy *aphy = hw->priv;
1959         struct ath_softc *sc = aphy->sc;
1960
1961         mutex_lock(&sc->mutex);
1962         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1963         mutex_unlock(&sc->mutex);
1964
1965         return tsf;
1966 }
1967
1968 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1969 {
1970         struct ath_wiphy *aphy = hw->priv;
1971         struct ath_softc *sc = aphy->sc;
1972
1973         mutex_lock(&sc->mutex);
1974         ath9k_hw_settsf64(sc->sc_ah, tsf);
1975         mutex_unlock(&sc->mutex);
1976 }
1977
1978 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1979 {
1980         struct ath_wiphy *aphy = hw->priv;
1981         struct ath_softc *sc = aphy->sc;
1982
1983         mutex_lock(&sc->mutex);
1984
1985         ath9k_ps_wakeup(sc);
1986         ath9k_hw_reset_tsf(sc->sc_ah);
1987         ath9k_ps_restore(sc);
1988
1989         mutex_unlock(&sc->mutex);
1990 }
1991
1992 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1993                               struct ieee80211_vif *vif,
1994                               enum ieee80211_ampdu_mlme_action action,
1995                               struct ieee80211_sta *sta,
1996                               u16 tid, u16 *ssn)
1997 {
1998         struct ath_wiphy *aphy = hw->priv;
1999         struct ath_softc *sc = aphy->sc;
2000         int ret = 0;
2001
2002         switch (action) {
2003         case IEEE80211_AMPDU_RX_START:
2004                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2005                         ret = -ENOTSUPP;
2006                 break;
2007         case IEEE80211_AMPDU_RX_STOP:
2008                 break;
2009         case IEEE80211_AMPDU_TX_START:
2010                 ath9k_ps_wakeup(sc);
2011                 ath_tx_aggr_start(sc, sta, tid, ssn);
2012                 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2013                 ath9k_ps_restore(sc);
2014                 break;
2015         case IEEE80211_AMPDU_TX_STOP:
2016                 ath9k_ps_wakeup(sc);
2017                 ath_tx_aggr_stop(sc, sta, tid);
2018                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2019                 ath9k_ps_restore(sc);
2020                 break;
2021         case IEEE80211_AMPDU_TX_OPERATIONAL:
2022                 ath9k_ps_wakeup(sc);
2023                 ath_tx_aggr_resume(sc, sta, tid);
2024                 ath9k_ps_restore(sc);
2025                 break;
2026         default:
2027                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2028                           "Unknown AMPDU action\n");
2029         }
2030
2031         return ret;
2032 }
2033
2034 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2035                              struct survey_info *survey)
2036 {
2037         struct ath_wiphy *aphy = hw->priv;
2038         struct ath_softc *sc = aphy->sc;
2039         struct ath_hw *ah = sc->sc_ah;
2040         struct ath_common *common = ath9k_hw_common(ah);
2041         struct ieee80211_conf *conf = &hw->conf;
2042
2043          if (idx != 0)
2044                 return -ENOENT;
2045
2046         survey->channel = conf->channel;
2047         survey->filled = SURVEY_INFO_NOISE_DBM;
2048         survey->noise = common->ani.noise_floor;
2049
2050         return 0;
2051 }
2052
2053 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2054 {
2055         struct ath_wiphy *aphy = hw->priv;
2056         struct ath_softc *sc = aphy->sc;
2057         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2058
2059         mutex_lock(&sc->mutex);
2060         if (ath9k_wiphy_scanning(sc)) {
2061                 printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
2062                        "same time\n");
2063                 /*
2064                  * Do not allow the concurrent scanning state for now. This
2065                  * could be improved with scanning control moved into ath9k.
2066                  */
2067                 mutex_unlock(&sc->mutex);
2068                 return;
2069         }
2070
2071         aphy->state = ATH_WIPHY_SCAN;
2072         ath9k_wiphy_pause_all_forced(sc, aphy);
2073         sc->sc_flags |= SC_OP_SCANNING;
2074         del_timer_sync(&common->ani.timer);
2075         cancel_delayed_work_sync(&sc->tx_complete_work);
2076         mutex_unlock(&sc->mutex);
2077 }
2078
2079 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2080 {
2081         struct ath_wiphy *aphy = hw->priv;
2082         struct ath_softc *sc = aphy->sc;
2083         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2084
2085         mutex_lock(&sc->mutex);
2086         aphy->state = ATH_WIPHY_ACTIVE;
2087         sc->sc_flags &= ~SC_OP_SCANNING;
2088         sc->sc_flags |= SC_OP_FULL_RESET;
2089         ath_start_ani(common);
2090         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
2091         ath_beacon_config(sc, NULL);
2092         mutex_unlock(&sc->mutex);
2093 }
2094
2095 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2096 {
2097         struct ath_wiphy *aphy = hw->priv;
2098         struct ath_softc *sc = aphy->sc;
2099         struct ath_hw *ah = sc->sc_ah;
2100
2101         mutex_lock(&sc->mutex);
2102         ah->coverage_class = coverage_class;
2103         ath9k_hw_init_global_settings(ah);
2104         mutex_unlock(&sc->mutex);
2105 }
2106
2107 struct ieee80211_ops ath9k_ops = {
2108         .tx                 = ath9k_tx,
2109         .start              = ath9k_start,
2110         .stop               = ath9k_stop,
2111         .add_interface      = ath9k_add_interface,
2112         .remove_interface   = ath9k_remove_interface,
2113         .config             = ath9k_config,
2114         .configure_filter   = ath9k_configure_filter,
2115         .sta_add            = ath9k_sta_add,
2116         .sta_remove         = ath9k_sta_remove,
2117         .conf_tx            = ath9k_conf_tx,
2118         .bss_info_changed   = ath9k_bss_info_changed,
2119         .set_key            = ath9k_set_key,
2120         .get_tsf            = ath9k_get_tsf,
2121         .set_tsf            = ath9k_set_tsf,
2122         .reset_tsf          = ath9k_reset_tsf,
2123         .ampdu_action       = ath9k_ampdu_action,
2124         .get_survey         = ath9k_get_survey,
2125         .sw_scan_start      = ath9k_sw_scan_start,
2126         .sw_scan_complete   = ath9k_sw_scan_complete,
2127         .rfkill_poll        = ath9k_rfkill_poll_state,
2128         .set_coverage_class = ath9k_set_coverage_class,
2129 };