drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_cache_conf_rate(struct ath_softc *sc,
  22                                 struct ieee80211_conf *conf)
  23 {
  24         switch (conf->channel->band) {
  25         case IEEE80211_BAND_2GHZ:
  26                 if (conf_is_ht20(conf))
  27                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  28                 else if (conf_is_ht40_minus(conf))
  29                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  30                 else if (conf_is_ht40_plus(conf))
  31                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  32                 else
  33                         sc->cur_rate_mode = ATH9K_MODE_11G;
  34                 break;
  35         case IEEE80211_BAND_5GHZ:
  36                 if (conf_is_ht20(conf))
  37                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  38                 else if (conf_is_ht40_minus(conf))
  39                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  40                 else if (conf_is_ht40_plus(conf))
  41                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  42                 else
  43                         sc->cur_rate_mode = ATH9K_MODE_11A;
  44                 break;
  45         default:
  46                 BUG_ON(1);
  47                 break;
  48         }
  49 }
  50
  51 static void ath_update_txpow(struct ath_softc *sc)
  52 {
  53         struct ath_hw *ah = sc->sc_ah;
  54         u32 txpow;
  55
  56         if (sc->curtxpow != sc->config.txpowlimit) {
  57                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  58                 /* read back in case value is clamped */
  59                 ath9k_hw_getcapability(ah, ATH9K_CAP_TXPOW, 1, &txpow);
  60                 sc->curtxpow = txpow;
  61         }
  62 }
  63
  64 static u8 parse_mpdudensity(u8 mpdudensity)
  65 {
  66         /*
  67          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  68          *   0 for no restriction
  69          *   1 for 1/4 us
  70          *   2 for 1/2 us
  71          *   3 for 1 us
  72          *   4 for 2 us
  73          *   5 for 4 us
  74          *   6 for 8 us
  75          *   7 for 16 us
  76          */
  77         switch (mpdudensity) {
  78         case 0:
  79                 return 0;
  80         case 1:
  81         case 2:
  82         case 3:
  83                 /* Our lower layer calculations limit our precision to
  84                    1 microsecond */
  85                 return 1;
  86         case 4:
  87                 return 2;
  88         case 5:
  89                 return 4;
  90         case 6:
  91                 return 8;
  92         case 7:
  93                 return 16;
  94         default:
  95                 return 0;
  96         }
  97 }
  98
  99 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
 100                                                 struct ieee80211_hw *hw)
 101 {
 102         struct ieee80211_channel *curchan = hw->conf.channel;
 103         struct ath9k_channel *channel;
 104         u8 chan_idx;
 105
 106         chan_idx = curchan->hw_value;
 107         channel = &sc->sc_ah->channels[chan_idx];
 108         ath9k_update_ichannel(sc, hw, channel);
 109         return channel;
 110 }
 111
 112 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
 113 {
 114         unsigned long flags;
 115         bool ret;
 116
 117         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 118         ret = ath9k_hw_setpower(sc->sc_ah, mode);
 119         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 120
 121         return ret;
 122 }
 123
 124 void ath9k_ps_wakeup(struct ath_softc *sc)
 125 {
 126         unsigned long flags;
 127
 128         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 129         if (++sc->ps_usecount != 1)
 130                 goto unlock;
 131
 132         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 133
 134  unlock:
 135         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 136 }
 137
 138 void ath9k_ps_restore(struct ath_softc *sc)
 139 {
 140         unsigned long flags;
 141
 142         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 143         if (--sc->ps_usecount != 0)
 144                 goto unlock;
 145
 146         if (sc->ps_idle)
 147                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 148         else if (sc->ps_enabled &&
 149                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 150                               PS_WAIT_FOR_CAB |
 151                               PS_WAIT_FOR_PSPOLL_DATA |
 152                               PS_WAIT_FOR_TX_ACK)))
 153                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 154
 155  unlock:
 156         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 157 }
 158
 159 /*
 160  * Set/change channels.  If the channel is really being changed, it's done
 161  * by reseting the chip.  To accomplish this we must first cleanup any pending
 162  * DMA, then restart stuff.
 163 */
 164 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 165                     struct ath9k_channel *hchan)
 166 {
 167         struct ath_hw *ah = sc->sc_ah;
 168         struct ath_common *common = ath9k_hw_common(ah);
 169         struct ieee80211_conf *conf = &common->hw->conf;
 170         bool fastcc = true, stopped;
 171         struct ieee80211_channel *channel = hw->conf.channel;
 172         int r;
 173
 174         if (sc->sc_flags & SC_OP_INVALID)
 175                 return -EIO;
 176
 177         ath9k_ps_wakeup(sc);
 178
 179         /*
 180          * This is only performed if the channel settings have
 181          * actually changed.
 182          *
 183          * To switch channels clear any pending DMA operations;
 184          * wait long enough for the RX fifo to drain, reset the
 185          * hardware at the new frequency, and then re-enable
 186          * the relevant bits of the h/w.
 187          */
 188         ath9k_hw_set_interrupts(ah, 0);
 189         ath_drain_all_txq(sc, false);
 190         stopped = ath_stoprecv(sc);
 191
 192         /* XXX: do not flush receive queue here. We don't want
 193          * to flush data frames already in queue because of
 194          * changing channel. */
 195
 196         if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
 197                 fastcc = false;
 198
 199         ath_print(common, ATH_DBG_CONFIG,
 200                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
 201                   sc->sc_ah->curchan->channel,
 202                   channel->center_freq, conf_is_ht40(conf));
 203
 204         spin_lock_bh(&sc->sc_resetlock);
 205
 206         r = ath9k_hw_reset(ah, hchan, fastcc);
 207         if (r) {
 208                 ath_print(common, ATH_DBG_FATAL,
 209                           "Unable to reset channel (%u MHz), "
 210                           "reset status %d\n",
 211                           channel->center_freq, r);
 212                 spin_unlock_bh(&sc->sc_resetlock);
 213                 goto ps_restore;
 214         }
 215         spin_unlock_bh(&sc->sc_resetlock);
 216
 217         sc->sc_flags &= ~SC_OP_FULL_RESET;
 218
 219         if (ath_startrecv(sc) != 0) {
 220                 ath_print(common, ATH_DBG_FATAL,
 221                           "Unable to restart recv logic\n");
 222                 r = -EIO;
 223                 goto ps_restore;
 224         }
 225
 226         ath_cache_conf_rate(sc, &hw->conf);
 227         ath_update_txpow(sc);
 228         ath9k_hw_set_interrupts(ah, ah->imask);
 229
 230  ps_restore:
 231         ath9k_ps_restore(sc);
 232         return r;
 233 }
 234
 235 /*
 236  *  This routine performs the periodic noise floor calibration function
 237  *  that is used to adjust and optimize the chip performance.  This
 238  *  takes environmental changes (location, temperature) into account.
 239  *  When the task is complete, it reschedules itself depending on the
 240  *  appropriate interval that was calculated.
 241  */
 242 void ath_ani_calibrate(unsigned long data)
 243 {
 244         struct ath_softc *sc = (struct ath_softc *)data;
 245         struct ath_hw *ah = sc->sc_ah;
 246         struct ath_common *common = ath9k_hw_common(ah);
 247         bool longcal = false;
 248         bool shortcal = false;
 249         bool aniflag = false;
 250         unsigned int timestamp = jiffies_to_msecs(jiffies);
 251         u32 cal_interval, short_cal_interval;
 252
 253         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 254                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 255
 256         /* Only calibrate if awake */
 257         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 258                 goto set_timer;
 259
 260         ath9k_ps_wakeup(sc);
 261
 262         /* Long calibration runs independently of short calibration. */
 263         if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
 264                 longcal = true;
 265                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 266                 common->ani.longcal_timer = timestamp;
 267         }
 268
 269         /* Short calibration applies only while caldone is false */
 270         if (!common->ani.caldone) {
 271                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 272                         shortcal = true;
 273                         ath_print(common, ATH_DBG_ANI,
 274                                   "shortcal @%lu\n", jiffies);
 275                         common->ani.shortcal_timer = timestamp;
 276                         common->ani.resetcal_timer = timestamp;
 277                 }
 278         } else {
 279                 if ((timestamp - common->ani.resetcal_timer) >=
 280                     ATH_RESTART_CALINTERVAL) {
 281                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 282                         if (common->ani.caldone)
 283                                 common->ani.resetcal_timer = timestamp;
 284                 }
 285         }
 286
 287         /* Verify whether we must check ANI */
 288         if ((timestamp - common->ani.checkani_timer) >= ATH_ANI_POLLINTERVAL) {
 289                 aniflag = true;
 290                 common->ani.checkani_timer = timestamp;
 291         }
 292
 293         /* Skip all processing if there's nothing to do. */
 294         if (longcal || shortcal || aniflag) {
 295                 /* Call ANI routine if necessary */
 296                 if (aniflag)
 297                         ath9k_hw_ani_monitor(ah, ah->curchan);
 298
 299                 /* Perform calibration if necessary */
 300                 if (longcal || shortcal) {
 301                         common->ani.caldone =
 302                                 ath9k_hw_calibrate(ah,
 303                                                    ah->curchan,
 304                                                    common->rx_chainmask,
 305                                                    longcal);
 306
 307                         if (longcal)
 308                                 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
 309                                                                      ah->curchan);
 310
 311                         ath_print(common, ATH_DBG_ANI,
 312                                   " calibrate chan %u/%x nf: %d\n",
 313                                   ah->curchan->channel,
 314                                   ah->curchan->channelFlags,
 315                                   common->ani.noise_floor);
 316                 }
 317         }
 318
 319         ath9k_ps_restore(sc);
 320
 321 set_timer:
 322         /*
 323         * Set timer interval based on previous results.
 324         * The interval must be the shortest necessary to satisfy ANI,
 325         * short calibration and long calibration.
 326         */
 327         cal_interval = ATH_LONG_CALINTERVAL;
 328         if (sc->sc_ah->config.enable_ani)
 329                 cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL);
 330         if (!common->ani.caldone)
 331                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 332
 333         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 334 }
 335
 336 static void ath_start_ani(struct ath_common *common)
 337 {
 338         unsigned long timestamp = jiffies_to_msecs(jiffies);
 339
 340         common->ani.longcal_timer = timestamp;
 341         common->ani.shortcal_timer = timestamp;
 342         common->ani.checkani_timer = timestamp;
 343
 344         mod_timer(&common->ani.timer,
 345                   jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
 346 }
 347
 348 /*
 349  * Update tx/rx chainmask. For legacy association,
 350  * hard code chainmask to 1x1, for 11n association, use
 351  * the chainmask configuration, for bt coexistence, use
 352  * the chainmask configuration even in legacy mode.
 353  */
 354 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 355 {
 356         struct ath_hw *ah = sc->sc_ah;
 357         struct ath_common *common = ath9k_hw_common(ah);
 358
 359         if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
 360             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 361                 common->tx_chainmask = ah->caps.tx_chainmask;
 362                 common->rx_chainmask = ah->caps.rx_chainmask;
 363         } else {
 364                 common->tx_chainmask = 1;
 365                 common->rx_chainmask = 1;
 366         }
 367
 368         ath_print(common, ATH_DBG_CONFIG,
 369                   "tx chmask: %d, rx chmask: %d\n",
 370                   common->tx_chainmask,
 371                   common->rx_chainmask);
 372 }
 373
 374 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 375 {
 376         struct ath_node *an;
 377
 378         an = (struct ath_node *)sta->drv_priv;
 379
 380         if (sc->sc_flags & SC_OP_TXAGGR) {
 381                 ath_tx_node_init(sc, an);
 382                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 383                                      sta->ht_cap.ampdu_factor);
 384                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 385                 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
 386         }
 387 }
 388
 389 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 390 {
 391         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 392
 393         if (sc->sc_flags & SC_OP_TXAGGR)
 394                 ath_tx_node_cleanup(sc, an);
 395 }
 396
 397 void ath9k_tasklet(unsigned long data)
 398 {
 399         struct ath_softc *sc = (struct ath_softc *)data;
 400         struct ath_hw *ah = sc->sc_ah;
 401         struct ath_common *common = ath9k_hw_common(ah);
 402
 403         u32 status = sc->intrstatus;
 404
 405         ath9k_ps_wakeup(sc);
 406
 407         if (status & ATH9K_INT_FATAL) {
 408                 ath_reset(sc, false);
 409                 ath9k_ps_restore(sc);
 410                 return;
 411         }
 412
 413         if (status & (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN)) {
 414                 spin_lock_bh(&sc->rx.rxflushlock);
 415                 ath_rx_tasklet(sc, 0);
 416                 spin_unlock_bh(&sc->rx.rxflushlock);
 417         }
 418
 419         if (status & ATH9K_INT_TX)
 420                 ath_tx_tasklet(sc);
 421
 422         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 423                 /*
 424                  * TSF sync does not look correct; remain awake to sync with
 425                  * the next Beacon.
 426                  */
 427                 ath_print(common, ATH_DBG_PS,
 428                           "TSFOOR - Sync with next Beacon\n");
 429                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 430         }
 431
 432         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 433                 if (status & ATH9K_INT_GENTIMER)
 434                         ath_gen_timer_isr(sc->sc_ah);
 435
 436         /* re-enable hardware interrupt */
 437         ath9k_hw_set_interrupts(ah, ah->imask);
 438         ath9k_ps_restore(sc);
 439 }
 440
 441 irqreturn_t ath_isr(int irq, void *dev)
 442 {
 443 #define SCHED_INTR (                            \
 444                 ATH9K_INT_FATAL |               \
 445                 ATH9K_INT_RXORN |               \
 446                 ATH9K_INT_RXEOL |               \
 447                 ATH9K_INT_RX |                  \
 448                 ATH9K_INT_TX |                  \
 449                 ATH9K_INT_BMISS |               \
 450                 ATH9K_INT_CST |                 \
 451                 ATH9K_INT_TSFOOR |              \
 452                 ATH9K_INT_GENTIMER)
 453
 454         struct ath_softc *sc = dev;
 455         struct ath_hw *ah = sc->sc_ah;
 456         enum ath9k_int status;
 457         bool sched = false;
 458
 459         /*
 460          * The hardware is not ready/present, don't
 461          * touch anything. Note this can happen early
 462          * on if the IRQ is shared.
 463          */
 464         if (sc->sc_flags & SC_OP_INVALID)
 465                 return IRQ_NONE;
 466
 467
 468         /* shared irq, not for us */
 469
 470         if (!ath9k_hw_intrpend(ah))
 471                 return IRQ_NONE;
 472
 473         /*
 474          * Figure out the reason(s) for the interrupt.  Note
 475          * that the hal returns a pseudo-ISR that may include
 476          * bits we haven't explicitly enabled so we mask the
 477          * value to insure we only process bits we requested.
 478          */
 479         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 480         status &= ah->imask;    /* discard unasked-for bits */
 481
 482         /*
 483          * If there are no status bits set, then this interrupt was not
 484          * for me (should have been caught above).
 485          */
 486         if (!status)
 487                 return IRQ_NONE;
 488
 489         /* Cache the status */
 490         sc->intrstatus = status;
 491
 492         if (status & SCHED_INTR)
 493                 sched = true;
 494
 495         /*
 496          * If a FATAL or RXORN interrupt is received, we have to reset the
 497          * chip immediately.
 498          */
 499         if (status & (ATH9K_INT_FATAL | ATH9K_INT_RXORN))
 500                 goto chip_reset;
 501
 502         if (status & ATH9K_INT_SWBA)
 503                 tasklet_schedule(&sc->bcon_tasklet);
 504
 505         if (status & ATH9K_INT_TXURN)
 506                 ath9k_hw_updatetxtriglevel(ah, true);
 507
 508         if (status & ATH9K_INT_MIB) {
 509                 /*
 510                  * Disable interrupts until we service the MIB
 511                  * interrupt; otherwise it will continue to
 512                  * fire.
 513                  */
 514                 ath9k_hw_set_interrupts(ah, 0);
 515                 /*
 516                  * Let the hal handle the event. We assume
 517                  * it will clear whatever condition caused
 518                  * the interrupt.
 519                  */
 520                 ath9k_hw_procmibevent(ah);
 521                 ath9k_hw_set_interrupts(ah, ah->imask);
 522         }
 523
 524         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 525                 if (status & ATH9K_INT_TIM_TIMER) {
 526                         /* Clear RxAbort bit so that we can
 527                          * receive frames */
 528                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 529                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 530                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 531                 }
 532
 533 chip_reset:
 534
 535         ath_debug_stat_interrupt(sc, status);
 536
 537         if (sched) {
 538                 /* turn off every interrupt except SWBA */
 539                 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
 540                 tasklet_schedule(&sc->intr_tq);
 541         }
 542
 543         return IRQ_HANDLED;
 544
 545 #undef SCHED_INTR
 546 }
 547
 548 static u32 ath_get_extchanmode(struct ath_softc *sc,
 549                                struct ieee80211_channel *chan,
 550                                enum nl80211_channel_type channel_type)
 551 {
 552         u32 chanmode = 0;
 553
 554         switch (chan->band) {
 555         case IEEE80211_BAND_2GHZ:
 556                 switch(channel_type) {
 557                 case NL80211_CHAN_NO_HT:
 558                 case NL80211_CHAN_HT20:
 559                         chanmode = CHANNEL_G_HT20;
 560                         break;
 561                 case NL80211_CHAN_HT40PLUS:
 562                         chanmode = CHANNEL_G_HT40PLUS;
 563                         break;
 564                 case NL80211_CHAN_HT40MINUS:
 565                         chanmode = CHANNEL_G_HT40MINUS;
 566                         break;
 567                 }
 568                 break;
 569         case IEEE80211_BAND_5GHZ:
 570                 switch(channel_type) {
 571                 case NL80211_CHAN_NO_HT:
 572                 case NL80211_CHAN_HT20:
 573                         chanmode = CHANNEL_A_HT20;
 574                         break;
 575                 case NL80211_CHAN_HT40PLUS:
 576                         chanmode = CHANNEL_A_HT40PLUS;
 577                         break;
 578                 case NL80211_CHAN_HT40MINUS:
 579                         chanmode = CHANNEL_A_HT40MINUS;
 580                         break;
 581                 }
 582                 break;
 583         default:
 584                 break;
 585         }
 586
 587         return chanmode;
 588 }
 589
 590 static int ath_setkey_tkip(struct ath_common *common, u16 keyix, const u8 *key,
 591                            struct ath9k_keyval *hk, const u8 *addr,
 592                            bool authenticator)
 593 {
 594         struct ath_hw *ah = common->ah;
 595         const u8 *key_rxmic;
 596         const u8 *key_txmic;
 597
 598         key_txmic = key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
 599         key_rxmic = key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
 600
 601         if (addr == NULL) {
 602                 /*
 603                  * Group key installation - only two key cache entries are used
 604                  * regardless of splitmic capability since group key is only
 605                  * used either for TX or RX.
 606                  */
 607                 if (authenticator) {
 608                         memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
 609                         memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_mic));
 610                 } else {
 611                         memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 612                         memcpy(hk->kv_txmic, key_rxmic, sizeof(hk->kv_mic));
 613                 }
 614                 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
 615         }
 616         if (!common->splitmic) {
 617                 /* TX and RX keys share the same key cache entry. */
 618                 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 619                 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
 620                 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
 621         }
 622
 623         /* Separate key cache entries for TX and RX */
 624
 625         /* TX key goes at first index, RX key at +32. */
 626         memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
 627         if (!ath9k_hw_set_keycache_entry(ah, keyix, hk, NULL)) {
 628                 /* TX MIC entry failed. No need to proceed further */
 629                 ath_print(common, ATH_DBG_FATAL,
 630                           "Setting TX MIC Key Failed\n");
 631                 return 0;
 632         }
 633
 634         memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 635         /* XXX delete tx key on failure? */
 636         return ath9k_hw_set_keycache_entry(ah, keyix + 32, hk, addr);
 637 }
 638
 639 static int ath_reserve_key_cache_slot_tkip(struct ath_common *common)
 640 {
 641         int i;
 642
 643         for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
 644                 if (test_bit(i, common->keymap) ||
 645                     test_bit(i + 64, common->keymap))
 646                         continue; /* At least one part of TKIP key allocated */
 647                 if (common->splitmic &&
 648                     (test_bit(i + 32, common->keymap) ||
 649                      test_bit(i + 64 + 32, common->keymap)))
 650                         continue; /* At least one part of TKIP key allocated */
 651
 652                 /* Found a free slot for a TKIP key */
 653                 return i;
 654         }
 655         return -1;
 656 }
 657
 658 static int ath_reserve_key_cache_slot(struct ath_common *common)
 659 {
 660         int i;
 661
 662         /* First, try to find slots that would not be available for TKIP. */
 663         if (common->splitmic) {
 664                 for (i = IEEE80211_WEP_NKID; i < common->keymax / 4; i++) {
 665                         if (!test_bit(i, common->keymap) &&
 666                             (test_bit(i + 32, common->keymap) ||
 667                              test_bit(i + 64, common->keymap) ||
 668                              test_bit(i + 64 + 32, common->keymap)))
 669                                 return i;
 670                         if (!test_bit(i + 32, common->keymap) &&
 671                             (test_bit(i, common->keymap) ||
 672                              test_bit(i + 64, common->keymap) ||
 673                              test_bit(i + 64 + 32, common->keymap)))
 674                                 return i + 32;
 675                         if (!test_bit(i + 64, common->keymap) &&
 676                             (test_bit(i , common->keymap) ||
 677                              test_bit(i + 32, common->keymap) ||
 678                              test_bit(i + 64 + 32, common->keymap)))
 679                                 return i + 64;
 680                         if (!test_bit(i + 64 + 32, common->keymap) &&
 681                             (test_bit(i, common->keymap) ||
 682                              test_bit(i + 32, common->keymap) ||
 683                              test_bit(i + 64, common->keymap)))
 684                                 return i + 64 + 32;
 685                 }
 686         } else {
 687                 for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
 688                         if (!test_bit(i, common->keymap) &&
 689                             test_bit(i + 64, common->keymap))
 690                                 return i;
 691                         if (test_bit(i, common->keymap) &&
 692                             !test_bit(i + 64, common->keymap))
 693                                 return i + 64;
 694                 }
 695         }
 696
 697         /* No partially used TKIP slots, pick any available slot */
 698         for (i = IEEE80211_WEP_NKID; i < common->keymax; i++) {
 699                 /* Do not allow slots that could be needed for TKIP group keys
 700                  * to be used. This limitation could be removed if we know that
 701                  * TKIP will not be used. */
 702                 if (i >= 64 && i < 64 + IEEE80211_WEP_NKID)
 703                         continue;
 704                 if (common->splitmic) {
 705                         if (i >= 32 && i < 32 + IEEE80211_WEP_NKID)
 706                                 continue;
 707                         if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID)
 708                                 continue;
 709                 }
 710
 711                 if (!test_bit(i, common->keymap))
 712                         return i; /* Found a free slot for a key */
 713         }
 714
 715         /* No free slot found */
 716         return -1;
 717 }
 718
 719 static int ath_key_config(struct ath_common *common,
 720                           struct ieee80211_vif *vif,
 721                           struct ieee80211_sta *sta,
 722                           struct ieee80211_key_conf *key)
 723 {
 724         struct ath_hw *ah = common->ah;
 725         struct ath9k_keyval hk;
 726         const u8 *mac = NULL;
 727         int ret = 0;
 728         int idx;
 729
 730         memset(&hk, 0, sizeof(hk));
 731
 732         switch (key->alg) {
 733         case ALG_WEP:
 734                 hk.kv_type = ATH9K_CIPHER_WEP;
 735                 break;
 736         case ALG_TKIP:
 737                 hk.kv_type = ATH9K_CIPHER_TKIP;
 738                 break;
 739         case ALG_CCMP:
 740                 hk.kv_type = ATH9K_CIPHER_AES_CCM;
 741                 break;
 742         default:
 743                 return -EOPNOTSUPP;
 744         }
 745
 746         hk.kv_len = key->keylen;
 747         memcpy(hk.kv_val, key->key, key->keylen);
 748
 749         if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
 750                 /* For now, use the default keys for broadcast keys. This may
 751                  * need to change with virtual interfaces. */
 752                 idx = key->keyidx;
 753         } else if (key->keyidx) {
 754                 if (WARN_ON(!sta))
 755                         return -EOPNOTSUPP;
 756                 mac = sta->addr;
 757
 758                 if (vif->type != NL80211_IFTYPE_AP) {
 759                         /* Only keyidx 0 should be used with unicast key, but
 760                          * allow this for client mode for now. */
 761                         idx = key->keyidx;
 762                 } else
 763                         return -EIO;
 764         } else {
 765                 if (WARN_ON(!sta))
 766                         return -EOPNOTSUPP;
 767                 mac = sta->addr;
 768
 769                 if (key->alg == ALG_TKIP)
 770                         idx = ath_reserve_key_cache_slot_tkip(common);
 771                 else
 772                         idx = ath_reserve_key_cache_slot(common);
 773                 if (idx < 0)
 774                         return -ENOSPC; /* no free key cache entries */
 775         }
 776
 777         if (key->alg == ALG_TKIP)
 778                 ret = ath_setkey_tkip(common, idx, key->key, &hk, mac,
 779                                       vif->type == NL80211_IFTYPE_AP);
 780         else
 781                 ret = ath9k_hw_set_keycache_entry(ah, idx, &hk, mac);
 782
 783         if (!ret)
 784                 return -EIO;
 785
 786         set_bit(idx, common->keymap);
 787         if (key->alg == ALG_TKIP) {
 788                 set_bit(idx + 64, common->keymap);
 789                 if (common->splitmic) {
 790                         set_bit(idx + 32, common->keymap);
 791                         set_bit(idx + 64 + 32, common->keymap);
 792                 }
 793         }
 794
 795         return idx;
 796 }
 797
 798 static void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key)
 799 {
 800         struct ath_hw *ah = common->ah;
 801
 802         ath9k_hw_keyreset(ah, key->hw_key_idx);
 803         if (key->hw_key_idx < IEEE80211_WEP_NKID)
 804                 return;
 805
 806         clear_bit(key->hw_key_idx, common->keymap);
 807         if (key->alg != ALG_TKIP)
 808                 return;
 809
 810         clear_bit(key->hw_key_idx + 64, common->keymap);
 811         if (common->splitmic) {
 812                 ath9k_hw_keyreset(ah, key->hw_key_idx + 32);
 813                 clear_bit(key->hw_key_idx + 32, common->keymap);
 814                 clear_bit(key->hw_key_idx + 64 + 32, common->keymap);
 815         }
 816 }
 817
 818 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 819                                  struct ieee80211_vif *vif,
 820                                  struct ieee80211_bss_conf *bss_conf)
 821 {
 822         struct ath_hw *ah = sc->sc_ah;
 823         struct ath_common *common = ath9k_hw_common(ah);
 824
 825         if (bss_conf->assoc) {
 826                 ath_print(common, ATH_DBG_CONFIG,
 827                           "Bss Info ASSOC %d, bssid: %pM\n",
 828                            bss_conf->aid, common->curbssid);
 829
 830                 /* New association, store aid */
 831                 common->curaid = bss_conf->aid;
 832                 ath9k_hw_write_associd(ah);
 833
 834                 /*
 835                  * Request a re-configuration of Beacon related timers
 836                  * on the receipt of the first Beacon frame (i.e.,
 837                  * after time sync with the AP).
 838                  */
 839                 sc->ps_flags |= PS_BEACON_SYNC;
 840
 841                 /* Configure the beacon */
 842                 ath_beacon_config(sc, vif);
 843
 844                 /* Reset rssi stats */
 845                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 846
 847                 ath_start_ani(common);
 848         } else {
 849                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 850                 common->curaid = 0;
 851                 /* Stop ANI */
 852                 del_timer_sync(&common->ani.timer);
 853         }
 854 }
 855
 856 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 857 {
 858         struct ath_hw *ah = sc->sc_ah;
 859         struct ath_common *common = ath9k_hw_common(ah);
 860         struct ieee80211_channel *channel = hw->conf.channel;
 861         int r;
 862
 863         ath9k_ps_wakeup(sc);
 864         ath9k_hw_configpcipowersave(ah, 0, 0);
 865
 866         if (!ah->curchan)
 867                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 868
 869         spin_lock_bh(&sc->sc_resetlock);
 870         r = ath9k_hw_reset(ah, ah->curchan, false);
 871         if (r) {
 872                 ath_print(common, ATH_DBG_FATAL,
 873                           "Unable to reset channel (%u MHz), "
 874                           "reset status %d\n",
 875                           channel->center_freq, r);
 876         }
 877         spin_unlock_bh(&sc->sc_resetlock);
 878
 879         ath_update_txpow(sc);
 880         if (ath_startrecv(sc) != 0) {
 881                 ath_print(common, ATH_DBG_FATAL,
 882                           "Unable to restart recv logic\n");
 883                 return;
 884         }
 885
 886         if (sc->sc_flags & SC_OP_BEACONS)
 887                 ath_beacon_config(sc, NULL);    /* restart beacons */
 888
 889         /* Re-Enable  interrupts */
 890         ath9k_hw_set_interrupts(ah, ah->imask);
 891
 892         /* Enable LED */
 893         ath9k_hw_cfg_output(ah, ah->led_pin,
 894                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 895         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 896
 897         ieee80211_wake_queues(hw);
 898         ath9k_ps_restore(sc);
 899 }
 900
 901 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 902 {
 903         struct ath_hw *ah = sc->sc_ah;
 904         struct ieee80211_channel *channel = hw->conf.channel;
 905         int r;
 906
 907         ath9k_ps_wakeup(sc);
 908         ieee80211_stop_queues(hw);
 909
 910         /* Disable LED */
 911         ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 912         ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 913
 914         /* Disable interrupts */
 915         ath9k_hw_set_interrupts(ah, 0);
 916
 917         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 918         ath_stoprecv(sc);               /* turn off frame recv */
 919         ath_flushrecv(sc);              /* flush recv queue */
 920
 921         if (!ah->curchan)
 922                 ah->curchan = ath_get_curchannel(sc, hw);
 923
 924         spin_lock_bh(&sc->sc_resetlock);
 925         r = ath9k_hw_reset(ah, ah->curchan, false);
 926         if (r) {
 927                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 928                           "Unable to reset channel (%u MHz), "
 929                           "reset status %d\n",
 930                           channel->center_freq, r);
 931         }
 932         spin_unlock_bh(&sc->sc_resetlock);
 933
 934         ath9k_hw_phy_disable(ah);
 935         ath9k_hw_configpcipowersave(ah, 1, 1);
 936         ath9k_ps_restore(sc);
 937         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 938 }
 939
 940 int ath_reset(struct ath_softc *sc, bool retry_tx)
 941 {
 942         struct ath_hw *ah = sc->sc_ah;
 943         struct ath_common *common = ath9k_hw_common(ah);
 944         struct ieee80211_hw *hw = sc->hw;
 945         int r;
 946
 947         /* Stop ANI */
 948         del_timer_sync(&common->ani.timer);
 949
 950         ieee80211_stop_queues(hw);
 951
 952         ath9k_hw_set_interrupts(ah, 0);
 953         ath_drain_all_txq(sc, retry_tx);
 954         ath_stoprecv(sc);
 955         ath_flushrecv(sc);
 956
 957         spin_lock_bh(&sc->sc_resetlock);
 958         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
 959         if (r)
 960                 ath_print(common, ATH_DBG_FATAL,
 961                           "Unable to reset hardware; reset status %d\n", r);
 962         spin_unlock_bh(&sc->sc_resetlock);
 963
 964         if (ath_startrecv(sc) != 0)
 965                 ath_print(common, ATH_DBG_FATAL,
 966                           "Unable to start recv logic\n");
 967
 968         /*
 969          * We may be doing a reset in response to a request
 970          * that changes the channel so update any state that
 971          * might change as a result.
 972          */
 973         ath_cache_conf_rate(sc, &hw->conf);
 974
 975         ath_update_txpow(sc);
 976
 977         if (sc->sc_flags & SC_OP_BEACONS)
 978                 ath_beacon_config(sc, NULL);    /* restart beacons */
 979
 980         ath9k_hw_set_interrupts(ah, ah->imask);
 981
 982         if (retry_tx) {
 983                 int i;
 984                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
 985                         if (ATH_TXQ_SETUP(sc, i)) {
 986                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
 987                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
 988                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
 989                         }
 990                 }
 991         }
 992
 993         ieee80211_wake_queues(hw);
 994
 995         /* Start ANI */
 996         ath_start_ani(common);
 997
 998         return r;
 999 }
1000
1001 int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1002 {
1003         int qnum;
1004
1005         switch (queue) {
1006         case 0:
1007                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VO];
1008                 break;
1009         case 1:
1010                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VI];
1011                 break;
1012         case 2:
1013                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
1014                 break;
1015         case 3:
1016                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BK];
1017                 break;
1018         default:
1019                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
1020                 break;
1021         }
1022
1023         return qnum;
1024 }
1025
1026 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1027 {
1028         int qnum;
1029
1030         switch (queue) {
1031         case ATH9K_WME_AC_VO:
1032                 qnum = 0;
1033                 break;
1034         case ATH9K_WME_AC_VI:
1035                 qnum = 1;
1036                 break;
1037         case ATH9K_WME_AC_BE:
1038                 qnum = 2;
1039                 break;
1040         case ATH9K_WME_AC_BK:
1041                 qnum = 3;
1042                 break;
1043         default:
1044                 qnum = -1;
1045                 break;
1046         }
1047
1048         return qnum;
1049 }
1050
1051 /* XXX: Remove me once we don't depend on ath9k_channel for all
1052  * this redundant data */
1053 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1054                            struct ath9k_channel *ichan)
1055 {
1056         struct ieee80211_channel *chan = hw->conf.channel;
1057         struct ieee80211_conf *conf = &hw->conf;
1058
1059         ichan->channel = chan->center_freq;
1060         ichan->chan = chan;
1061
1062         if (chan->band == IEEE80211_BAND_2GHZ) {
1063                 ichan->chanmode = CHANNEL_G;
1064                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1065         } else {
1066                 ichan->chanmode = CHANNEL_A;
1067                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1068         }
1069
1070         if (conf_is_ht(conf))
1071                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1072                                             conf->channel_type);
1073 }
1074
1075 /**********************/
1076 /* mac80211 callbacks */
1077 /**********************/
1078
1079 static int ath9k_start(struct ieee80211_hw *hw)
1080 {
1081         struct ath_wiphy *aphy = hw->priv;
1082         struct ath_softc *sc = aphy->sc;
1083         struct ath_hw *ah = sc->sc_ah;
1084         struct ath_common *common = ath9k_hw_common(ah);
1085         struct ieee80211_channel *curchan = hw->conf.channel;
1086         struct ath9k_channel *init_channel;
1087         int r;
1088
1089         ath_print(common, ATH_DBG_CONFIG,
1090                   "Starting driver with initial channel: %d MHz\n",
1091                   curchan->center_freq);
1092
1093         mutex_lock(&sc->mutex);
1094
1095         if (ath9k_wiphy_started(sc)) {
1096                 if (sc->chan_idx == curchan->hw_value) {
1097                         /*
1098                          * Already on the operational channel, the new wiphy
1099                          * can be marked active.
1100                          */
1101                         aphy->state = ATH_WIPHY_ACTIVE;
1102                         ieee80211_wake_queues(hw);
1103                 } else {
1104                         /*
1105                          * Another wiphy is on another channel, start the new
1106                          * wiphy in paused state.
1107                          */
1108                         aphy->state = ATH_WIPHY_PAUSED;
1109                         ieee80211_stop_queues(hw);
1110                 }
1111                 mutex_unlock(&sc->mutex);
1112                 return 0;
1113         }
1114         aphy->state = ATH_WIPHY_ACTIVE;
1115
1116         /* setup initial channel */
1117
1118         sc->chan_idx = curchan->hw_value;
1119
1120         init_channel = ath_get_curchannel(sc, hw);
1121
1122         /* Reset SERDES registers */
1123         ath9k_hw_configpcipowersave(ah, 0, 0);
1124
1125         /*
1126          * The basic interface to setting the hardware in a good
1127          * state is ``reset''.  On return the hardware is known to
1128          * be powered up and with interrupts disabled.  This must
1129          * be followed by initialization of the appropriate bits
1130          * and then setup of the interrupt mask.
1131          */
1132         spin_lock_bh(&sc->sc_resetlock);
1133         r = ath9k_hw_reset(ah, init_channel, false);
1134         if (r) {
1135                 ath_print(common, ATH_DBG_FATAL,
1136                           "Unable to reset hardware; reset status %d "
1137                           "(freq %u MHz)\n", r,
1138                           curchan->center_freq);
1139                 spin_unlock_bh(&sc->sc_resetlock);
1140                 goto mutex_unlock;
1141         }
1142         spin_unlock_bh(&sc->sc_resetlock);
1143
1144         /*
1145          * This is needed only to setup initial state
1146          * but it's best done after a reset.
1147          */
1148         ath_update_txpow(sc);
1149
1150         /*
1151          * Setup the hardware after reset:
1152          * The receive engine is set going.
1153          * Frame transmit is handled entirely
1154          * in the frame output path; there's nothing to do
1155          * here except setup the interrupt mask.
1156          */
1157         if (ath_startrecv(sc) != 0) {
1158                 ath_print(common, ATH_DBG_FATAL,
1159                           "Unable to start recv logic\n");
1160                 r = -EIO;
1161                 goto mutex_unlock;
1162         }
1163
1164         /* Setup our intr mask. */
1165         ah->imask = ATH9K_INT_RX | ATH9K_INT_TX
1166                 | ATH9K_INT_RXEOL | ATH9K_INT_RXORN
1167                 | ATH9K_INT_FATAL | ATH9K_INT_GLOBAL;
1168
1169         if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
1170                 ah->imask |= ATH9K_INT_GTT;
1171
1172         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1173                 ah->imask |= ATH9K_INT_CST;
1174
1175         ath_cache_conf_rate(sc, &hw->conf);
1176
1177         sc->sc_flags &= ~SC_OP_INVALID;
1178
1179         /* Disable BMISS interrupt when we're not associated */
1180         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1181         ath9k_hw_set_interrupts(ah, ah->imask);
1182
1183         ieee80211_wake_queues(hw);
1184
1185         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1186
1187         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1188             !ah->btcoex_hw.enabled) {
1189                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1190                                            AR_STOMP_LOW_WLAN_WGHT);
1191                 ath9k_hw_btcoex_enable(ah);
1192
1193                 if (common->bus_ops->bt_coex_prep)
1194                         common->bus_ops->bt_coex_prep(common);
1195                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1196                         ath9k_btcoex_timer_resume(sc);
1197         }
1198
1199 mutex_unlock:
1200         mutex_unlock(&sc->mutex);
1201
1202         return r;
1203 }
1204
1205 static int ath9k_tx(struct ieee80211_hw *hw,
1206                     struct sk_buff *skb)
1207 {
1208         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1209         struct ath_wiphy *aphy = hw->priv;
1210         struct ath_softc *sc = aphy->sc;
1211         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1212         struct ath_tx_control txctl;
1213         int padpos, padsize;
1214         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1215
1216         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1217                 ath_print(common, ATH_DBG_XMIT,
1218                           "ath9k: %s: TX in unexpected wiphy state "
1219                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1220                 goto exit;
1221         }
1222
1223         if (sc->ps_enabled) {
1224                 /*
1225                  * mac80211 does not set PM field for normal data frames, so we
1226                  * need to update that based on the current PS mode.
1227                  */
1228                 if (ieee80211_is_data(hdr->frame_control) &&
1229                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1230                     !ieee80211_has_pm(hdr->frame_control)) {
1231                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1232                                   "while in PS mode\n");
1233                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1234                 }
1235         }
1236
1237         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1238                 /*
1239                  * We are using PS-Poll and mac80211 can request TX while in
1240                  * power save mode. Need to wake up hardware for the TX to be
1241                  * completed and if needed, also for RX of buffered frames.
1242                  */
1243                 ath9k_ps_wakeup(sc);
1244                 ath9k_hw_setrxabort(sc->sc_ah, 0);
1245                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1246                         ath_print(common, ATH_DBG_PS,
1247                                   "Sending PS-Poll to pick a buffered frame\n");
1248                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1249                 } else {
1250                         ath_print(common, ATH_DBG_PS,
1251                                   "Wake up to complete TX\n");
1252                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1253                 }
1254                 /*
1255                  * The actual restore operation will happen only after
1256                  * the sc_flags bit is cleared. We are just dropping
1257                  * the ps_usecount here.
1258                  */
1259                 ath9k_ps_restore(sc);
1260         }
1261
1262         memset(&txctl, 0, sizeof(struct ath_tx_control));
1263
1264         /*
1265          * As a temporary workaround, assign seq# here; this will likely need
1266          * to be cleaned up to work better with Beacon transmission and virtual
1267          * BSSes.
1268          */
1269         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1270                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1271                         sc->tx.seq_no += 0x10;
1272                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1273                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1274         }
1275
1276         /* Add the padding after the header if this is not already done */
1277         padpos = ath9k_cmn_padpos(hdr->frame_control);
1278         padsize = padpos & 3;
1279         if (padsize && skb->len>padpos) {
1280                 if (skb_headroom(skb) < padsize)
1281                         return -1;
1282                 skb_push(skb, padsize);
1283                 memmove(skb->data, skb->data + padsize, padpos);
1284         }
1285
1286         /* Check if a tx queue is available */
1287
1288         txctl.txq = ath_test_get_txq(sc, skb);
1289         if (!txctl.txq)
1290                 goto exit;
1291
1292         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1293
1294         if (ath_tx_start(hw, skb, &txctl) != 0) {
1295                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1296                 goto exit;
1297         }
1298
1299         return 0;
1300 exit:
1301         dev_kfree_skb_any(skb);
1302         return 0;
1303 }
1304
1305 static void ath9k_stop(struct ieee80211_hw *hw)
1306 {
1307         struct ath_wiphy *aphy = hw->priv;
1308         struct ath_softc *sc = aphy->sc;
1309         struct ath_hw *ah = sc->sc_ah;
1310         struct ath_common *common = ath9k_hw_common(ah);
1311
1312         mutex_lock(&sc->mutex);
1313
1314         aphy->state = ATH_WIPHY_INACTIVE;
1315
1316         cancel_delayed_work_sync(&sc->ath_led_blink_work);
1317         cancel_delayed_work_sync(&sc->tx_complete_work);
1318
1319         if (!sc->num_sec_wiphy) {
1320                 cancel_delayed_work_sync(&sc->wiphy_work);
1321                 cancel_work_sync(&sc->chan_work);
1322         }
1323
1324         if (sc->sc_flags & SC_OP_INVALID) {
1325                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1326                 mutex_unlock(&sc->mutex);
1327                 return;
1328         }
1329
1330         if (ath9k_wiphy_started(sc)) {
1331                 mutex_unlock(&sc->mutex);
1332                 return; /* another wiphy still in use */
1333         }
1334
1335         /* Ensure HW is awake when we try to shut it down. */
1336         ath9k_ps_wakeup(sc);
1337
1338         if (ah->btcoex_hw.enabled) {
1339                 ath9k_hw_btcoex_disable(ah);
1340                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1341                         ath9k_btcoex_timer_pause(sc);
1342         }
1343
1344         /* make sure h/w will not generate any interrupt
1345          * before setting the invalid flag. */
1346         ath9k_hw_set_interrupts(ah, 0);
1347
1348         if (!(sc->sc_flags & SC_OP_INVALID)) {
1349                 ath_drain_all_txq(sc, false);
1350                 ath_stoprecv(sc);
1351                 ath9k_hw_phy_disable(ah);
1352         } else
1353                 sc->rx.rxlink = NULL;
1354
1355         /* disable HAL and put h/w to sleep */
1356         ath9k_hw_disable(ah);
1357         ath9k_hw_configpcipowersave(ah, 1, 1);
1358         ath9k_ps_restore(sc);
1359
1360         /* Finally, put the chip in FULL SLEEP mode */
1361         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1362
1363         sc->sc_flags |= SC_OP_INVALID;
1364
1365         mutex_unlock(&sc->mutex);
1366
1367         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1368 }
1369
1370 static int ath9k_add_interface(struct ieee80211_hw *hw,
1371                                struct ieee80211_vif *vif)
1372 {
1373         struct ath_wiphy *aphy = hw->priv;
1374         struct ath_softc *sc = aphy->sc;
1375         struct ath_hw *ah = sc->sc_ah;
1376         struct ath_common *common = ath9k_hw_common(ah);
1377         struct ath_vif *avp = (void *)vif->drv_priv;
1378         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1379         int ret = 0;
1380
1381         mutex_lock(&sc->mutex);
1382
1383         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1384             sc->nvifs > 0) {
1385                 ret = -ENOBUFS;
1386                 goto out;
1387         }
1388
1389         switch (vif->type) {
1390         case NL80211_IFTYPE_STATION:
1391                 ic_opmode = NL80211_IFTYPE_STATION;
1392                 break;
1393         case NL80211_IFTYPE_ADHOC:
1394         case NL80211_IFTYPE_AP:
1395         case NL80211_IFTYPE_MESH_POINT:
1396                 if (sc->nbcnvifs >= ATH_BCBUF) {
1397                         ret = -ENOBUFS;
1398                         goto out;
1399                 }
1400                 ic_opmode = vif->type;
1401                 break;
1402         default:
1403                 ath_print(common, ATH_DBG_FATAL,
1404                         "Interface type %d not yet supported\n", vif->type);
1405                 ret = -EOPNOTSUPP;
1406                 goto out;
1407         }
1408
1409         ath_print(common, ATH_DBG_CONFIG,
1410                   "Attach a VIF of type: %d\n", ic_opmode);
1411
1412         /* Set the VIF opmode */
1413         avp->av_opmode = ic_opmode;
1414         avp->av_bslot = -1;
1415
1416         sc->nvifs++;
1417
1418         if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1419                 ath9k_set_bssid_mask(hw);
1420
1421         if (sc->nvifs > 1)
1422                 goto out; /* skip global settings for secondary vif */
1423
1424         if (ic_opmode == NL80211_IFTYPE_AP) {
1425                 ath9k_hw_set_tsfadjust(ah, 1);
1426                 sc->sc_flags |= SC_OP_TSF_RESET;
1427         }
1428
1429         /* Set the device opmode */
1430         ah->opmode = ic_opmode;
1431
1432         /*
1433          * Enable MIB interrupts when there are hardware phy counters.
1434          * Note we only do this (at the moment) for station mode.
1435          */
1436         if ((vif->type == NL80211_IFTYPE_STATION) ||
1437             (vif->type == NL80211_IFTYPE_ADHOC) ||
1438             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1439                 ah->imask |= ATH9K_INT_MIB;
1440                 ah->imask |= ATH9K_INT_TSFOOR;
1441         }
1442
1443         ath9k_hw_set_interrupts(ah, ah->imask);
1444
1445         if (vif->type == NL80211_IFTYPE_AP    ||
1446             vif->type == NL80211_IFTYPE_ADHOC ||
1447             vif->type == NL80211_IFTYPE_MONITOR)
1448                 ath_start_ani(common);
1449
1450 out:
1451         mutex_unlock(&sc->mutex);
1452         return ret;
1453 }
1454
1455 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1456                                    struct ieee80211_vif *vif)
1457 {
1458         struct ath_wiphy *aphy = hw->priv;
1459         struct ath_softc *sc = aphy->sc;
1460         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1461         struct ath_vif *avp = (void *)vif->drv_priv;
1462         int i;
1463
1464         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1465
1466         mutex_lock(&sc->mutex);
1467
1468         /* Stop ANI */
1469         del_timer_sync(&common->ani.timer);
1470
1471         /* Reclaim beacon resources */
1472         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1473             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1474             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1475                 ath9k_ps_wakeup(sc);
1476                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1477                 ath9k_ps_restore(sc);
1478         }
1479
1480         ath_beacon_return(sc, avp);
1481         sc->sc_flags &= ~SC_OP_BEACONS;
1482
1483         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1484                 if (sc->beacon.bslot[i] == vif) {
1485                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1486                                "slot\n", __func__);
1487                         sc->beacon.bslot[i] = NULL;
1488                         sc->beacon.bslot_aphy[i] = NULL;
1489                 }
1490         }
1491
1492         sc->nvifs--;
1493
1494         mutex_unlock(&sc->mutex);
1495 }
1496
1497 void ath9k_enable_ps(struct ath_softc *sc)
1498 {
1499         struct ath_hw *ah = sc->sc_ah;
1500
1501         sc->ps_enabled = true;
1502         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1503                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1504                         ah->imask |= ATH9K_INT_TIM_TIMER;
1505                         ath9k_hw_set_interrupts(ah, ah->imask);
1506                 }
1507         }
1508         ath9k_hw_setrxabort(ah, 1);
1509 }
1510
1511 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1512 {
1513         struct ath_wiphy *aphy = hw->priv;
1514         struct ath_softc *sc = aphy->sc;
1515         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1516         struct ieee80211_conf *conf = &hw->conf;
1517         struct ath_hw *ah = sc->sc_ah;
1518         bool disable_radio;
1519
1520         mutex_lock(&sc->mutex);
1521
1522         /*
1523          * Leave this as the first check because we need to turn on the
1524          * radio if it was disabled before prior to processing the rest
1525          * of the changes. Likewise we must only disable the radio towards
1526          * the end.
1527          */
1528         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1529                 bool enable_radio;
1530                 bool all_wiphys_idle;
1531                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1532
1533                 spin_lock_bh(&sc->wiphy_lock);
1534                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1535                 ath9k_set_wiphy_idle(aphy, idle);
1536
1537                 enable_radio = (!idle && all_wiphys_idle);
1538
1539                 /*
1540                  * After we unlock here its possible another wiphy
1541                  * can be re-renabled so to account for that we will
1542                  * only disable the radio toward the end of this routine
1543                  * if by then all wiphys are still idle.
1544                  */
1545                 spin_unlock_bh(&sc->wiphy_lock);
1546
1547                 if (enable_radio) {
1548                         sc->ps_idle = false;
1549                         ath_radio_enable(sc, hw);
1550                         ath_print(common, ATH_DBG_CONFIG,
1551                                   "not-idle: enabling radio\n");
1552                 }
1553         }
1554
1555         /*
1556          * We just prepare to enable PS. We have to wait until our AP has
1557          * ACK'd our null data frame to disable RX otherwise we'll ignore
1558          * those ACKs and end up retransmitting the same null data frames.
1559          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1560          */
1561         if (changed & IEEE80211_CONF_CHANGE_PS) {
1562                 if (conf->flags & IEEE80211_CONF_PS) {
1563                         sc->ps_flags |= PS_ENABLED;
1564                         /*
1565                          * At this point we know hardware has received an ACK
1566                          * of a previously sent null data frame.
1567                          */
1568                         if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1569                                 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1570                                 ath9k_enable_ps(sc);
1571                         }
1572                 } else {
1573                         sc->ps_enabled = false;
1574                         sc->ps_flags &= ~(PS_ENABLED |
1575                                           PS_NULLFUNC_COMPLETED);
1576                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
1577                         if (!(ah->caps.hw_caps &
1578                               ATH9K_HW_CAP_AUTOSLEEP)) {
1579                                 ath9k_hw_setrxabort(sc->sc_ah, 0);
1580                                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1581                                                   PS_WAIT_FOR_CAB |
1582                                                   PS_WAIT_FOR_PSPOLL_DATA |
1583                                                   PS_WAIT_FOR_TX_ACK);
1584                                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1585                                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1586                                         ath9k_hw_set_interrupts(sc->sc_ah,
1587                                                         ah->imask);
1588                                 }
1589                         }
1590                 }
1591         }
1592
1593         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1594                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1595                         ath_print(common, ATH_DBG_CONFIG,
1596                                   "HW opmode set to Monitor mode\n");
1597                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1598                 }
1599         }
1600
1601         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1602                 struct ieee80211_channel *curchan = hw->conf.channel;
1603                 int pos = curchan->hw_value;
1604
1605                 aphy->chan_idx = pos;
1606                 aphy->chan_is_ht = conf_is_ht(conf);
1607
1608                 if (aphy->state == ATH_WIPHY_SCAN ||
1609                     aphy->state == ATH_WIPHY_ACTIVE)
1610                         ath9k_wiphy_pause_all_forced(sc, aphy);
1611                 else {
1612                         /*
1613                          * Do not change operational channel based on a paused
1614                          * wiphy changes.
1615                          */
1616                         goto skip_chan_change;
1617                 }
1618
1619                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1620                           curchan->center_freq);
1621
1622                 /* XXX: remove me eventualy */
1623                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1624
1625                 ath_update_chainmask(sc, conf_is_ht(conf));
1626
1627                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1628                         ath_print(common, ATH_DBG_FATAL,
1629                                   "Unable to set channel\n");
1630                         mutex_unlock(&sc->mutex);
1631                         return -EINVAL;
1632                 }
1633         }
1634
1635 skip_chan_change:
1636         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1637                 sc->config.txpowlimit = 2 * conf->power_level;
1638                 ath_update_txpow(sc);
1639         }
1640
1641         spin_lock_bh(&sc->wiphy_lock);
1642         disable_radio = ath9k_all_wiphys_idle(sc);
1643         spin_unlock_bh(&sc->wiphy_lock);
1644
1645         if (disable_radio) {
1646                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1647                 sc->ps_idle = true;
1648                 ath_radio_disable(sc, hw);
1649         }
1650
1651         mutex_unlock(&sc->mutex);
1652
1653         return 0;
1654 }
1655
1656 #define SUPPORTED_FILTERS                       \
1657         (FIF_PROMISC_IN_BSS |                   \
1658         FIF_ALLMULTI |                          \
1659         FIF_CONTROL |                           \
1660         FIF_PSPOLL |                            \
1661         FIF_OTHER_BSS |                         \
1662         FIF_BCN_PRBRESP_PROMISC |               \
1663         FIF_FCSFAIL)
1664
1665 /* FIXME: sc->sc_full_reset ? */
1666 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1667                                    unsigned int changed_flags,
1668                                    unsigned int *total_flags,
1669                                    u64 multicast)
1670 {
1671         struct ath_wiphy *aphy = hw->priv;
1672         struct ath_softc *sc = aphy->sc;
1673         u32 rfilt;
1674
1675         changed_flags &= SUPPORTED_FILTERS;
1676         *total_flags &= SUPPORTED_FILTERS;
1677
1678         sc->rx.rxfilter = *total_flags;
1679         ath9k_ps_wakeup(sc);
1680         rfilt = ath_calcrxfilter(sc);
1681         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1682         ath9k_ps_restore(sc);
1683
1684         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1685                   "Set HW RX filter: 0x%x\n", rfilt);
1686 }
1687
1688 static int ath9k_sta_add(struct ieee80211_hw *hw,
1689                          struct ieee80211_vif *vif,
1690                          struct ieee80211_sta *sta)
1691 {
1692         struct ath_wiphy *aphy = hw->priv;
1693         struct ath_softc *sc = aphy->sc;
1694
1695         ath_node_attach(sc, sta);
1696
1697         return 0;
1698 }
1699
1700 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1701                             struct ieee80211_vif *vif,
1702                             struct ieee80211_sta *sta)
1703 {
1704         struct ath_wiphy *aphy = hw->priv;
1705         struct ath_softc *sc = aphy->sc;
1706
1707         ath_node_detach(sc, sta);
1708
1709         return 0;
1710 }
1711
1712 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1713                          const struct ieee80211_tx_queue_params *params)
1714 {
1715         struct ath_wiphy *aphy = hw->priv;
1716         struct ath_softc *sc = aphy->sc;
1717         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1718         struct ath9k_tx_queue_info qi;
1719         int ret = 0, qnum;
1720
1721         if (queue >= WME_NUM_AC)
1722                 return 0;
1723
1724         mutex_lock(&sc->mutex);
1725
1726         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1727
1728         qi.tqi_aifs = params->aifs;
1729         qi.tqi_cwmin = params->cw_min;
1730         qi.tqi_cwmax = params->cw_max;
1731         qi.tqi_burstTime = params->txop;
1732         qnum = ath_get_hal_qnum(queue, sc);
1733
1734         ath_print(common, ATH_DBG_CONFIG,
1735                   "Configure tx [queue/halq] [%d/%d],  "
1736                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1737                   queue, qnum, params->aifs, params->cw_min,
1738                   params->cw_max, params->txop);
1739
1740         ret = ath_txq_update(sc, qnum, &qi);
1741         if (ret)
1742                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1743
1744         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1745                 if ((qnum == sc->tx.hwq_map[ATH9K_WME_AC_BE]) && !ret)
1746                         ath_beaconq_config(sc);
1747
1748         mutex_unlock(&sc->mutex);
1749
1750         return ret;
1751 }
1752
1753 static int ath9k_set_key(struct ieee80211_hw *hw,
1754                          enum set_key_cmd cmd,
1755                          struct ieee80211_vif *vif,
1756                          struct ieee80211_sta *sta,
1757                          struct ieee80211_key_conf *key)
1758 {
1759         struct ath_wiphy *aphy = hw->priv;
1760         struct ath_softc *sc = aphy->sc;
1761         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1762         int ret = 0;
1763
1764         if (modparam_nohwcrypt)
1765                 return -ENOSPC;
1766
1767         mutex_lock(&sc->mutex);
1768         ath9k_ps_wakeup(sc);
1769         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1770
1771         switch (cmd) {
1772         case SET_KEY:
1773                 ret = ath_key_config(common, vif, sta, key);
1774                 if (ret >= 0) {
1775                         key->hw_key_idx = ret;
1776                         /* push IV and Michael MIC generation to stack */
1777                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1778                         if (key->alg == ALG_TKIP)
1779                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1780                         if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
1781                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1782                         ret = 0;
1783                 }
1784                 break;
1785         case DISABLE_KEY:
1786                 ath_key_delete(common, key);
1787                 break;
1788         default:
1789                 ret = -EINVAL;
1790         }
1791
1792         ath9k_ps_restore(sc);
1793         mutex_unlock(&sc->mutex);
1794
1795         return ret;
1796 }
1797
1798 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1799                                    struct ieee80211_vif *vif,
1800                                    struct ieee80211_bss_conf *bss_conf,
1801                                    u32 changed)
1802 {
1803         struct ath_wiphy *aphy = hw->priv;
1804         struct ath_softc *sc = aphy->sc;
1805         struct ath_hw *ah = sc->sc_ah;
1806         struct ath_common *common = ath9k_hw_common(ah);
1807         struct ath_vif *avp = (void *)vif->drv_priv;
1808         int slottime;
1809         int error;
1810
1811         mutex_lock(&sc->mutex);
1812
1813         if (changed & BSS_CHANGED_BSSID) {
1814                 /* Set BSSID */
1815                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1816                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1817                 common->curaid = 0;
1818                 ath9k_hw_write_associd(ah);
1819
1820                 /* Set aggregation protection mode parameters */
1821                 sc->config.ath_aggr_prot = 0;
1822
1823                 /* Only legacy IBSS for now */
1824                 if (vif->type == NL80211_IFTYPE_ADHOC)
1825                         ath_update_chainmask(sc, 0);
1826
1827                 ath_print(common, ATH_DBG_CONFIG,
1828                           "BSSID: %pM aid: 0x%x\n",
1829                           common->curbssid, common->curaid);
1830
1831                 /* need to reconfigure the beacon */
1832                 sc->sc_flags &= ~SC_OP_BEACONS ;
1833         }
1834
1835         /* Enable transmission of beacons (AP, IBSS, MESH) */
1836         if ((changed & BSS_CHANGED_BEACON) ||
1837             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1838                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1839                 error = ath_beacon_alloc(aphy, vif);
1840                 if (!error)
1841                         ath_beacon_config(sc, vif);
1842         }
1843
1844         if (changed & BSS_CHANGED_ERP_SLOT) {
1845                 if (bss_conf->use_short_slot)
1846                         slottime = 9;
1847                 else
1848                         slottime = 20;
1849                 if (vif->type == NL80211_IFTYPE_AP) {
1850                         /*
1851                          * Defer update, so that connected stations can adjust
1852                          * their settings at the same time.
1853                          * See beacon.c for more details
1854                          */
1855                         sc->beacon.slottime = slottime;
1856                         sc->beacon.updateslot = UPDATE;
1857                 } else {
1858                         ah->slottime = slottime;
1859                         ath9k_hw_init_global_settings(ah);
1860                 }
1861         }
1862
1863         /* Disable transmission of beacons */
1864         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1865                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1866
1867         if (changed & BSS_CHANGED_BEACON_INT) {
1868                 sc->beacon_interval = bss_conf->beacon_int;
1869                 /*
1870                  * In case of AP mode, the HW TSF has to be reset
1871                  * when the beacon interval changes.
1872                  */
1873                 if (vif->type == NL80211_IFTYPE_AP) {
1874                         sc->sc_flags |= SC_OP_TSF_RESET;
1875                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1876                         error = ath_beacon_alloc(aphy, vif);
1877                         if (!error)
1878                                 ath_beacon_config(sc, vif);
1879                 } else {
1880                         ath_beacon_config(sc, vif);
1881                 }
1882         }
1883
1884         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1885                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1886                           bss_conf->use_short_preamble);
1887                 if (bss_conf->use_short_preamble)
1888                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1889                 else
1890                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1891         }
1892
1893         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1894                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1895                           bss_conf->use_cts_prot);
1896                 if (bss_conf->use_cts_prot &&
1897                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1898                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1899                 else
1900                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1901         }
1902
1903         if (changed & BSS_CHANGED_ASSOC) {
1904                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1905                         bss_conf->assoc);
1906                 ath9k_bss_assoc_info(sc, vif, bss_conf);
1907         }
1908
1909         mutex_unlock(&sc->mutex);
1910 }
1911
1912 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1913 {
1914         u64 tsf;
1915         struct ath_wiphy *aphy = hw->priv;
1916         struct ath_softc *sc = aphy->sc;
1917
1918         mutex_lock(&sc->mutex);
1919         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1920         mutex_unlock(&sc->mutex);
1921
1922         return tsf;
1923 }
1924
1925 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1926 {
1927         struct ath_wiphy *aphy = hw->priv;
1928         struct ath_softc *sc = aphy->sc;
1929
1930         mutex_lock(&sc->mutex);
1931         ath9k_hw_settsf64(sc->sc_ah, tsf);
1932         mutex_unlock(&sc->mutex);
1933 }
1934
1935 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1936 {
1937         struct ath_wiphy *aphy = hw->priv;
1938         struct ath_softc *sc = aphy->sc;
1939
1940         mutex_lock(&sc->mutex);
1941
1942         ath9k_ps_wakeup(sc);
1943         ath9k_hw_reset_tsf(sc->sc_ah);
1944         ath9k_ps_restore(sc);
1945
1946         mutex_unlock(&sc->mutex);
1947 }
1948
1949 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1950                               struct ieee80211_vif *vif,
1951                               enum ieee80211_ampdu_mlme_action action,
1952                               struct ieee80211_sta *sta,
1953                               u16 tid, u16 *ssn)
1954 {
1955         struct ath_wiphy *aphy = hw->priv;
1956         struct ath_softc *sc = aphy->sc;
1957         int ret = 0;
1958
1959         switch (action) {
1960         case IEEE80211_AMPDU_RX_START:
1961                 if (!(sc->sc_flags & SC_OP_RXAGGR))
1962                         ret = -ENOTSUPP;
1963                 break;
1964         case IEEE80211_AMPDU_RX_STOP:
1965                 break;
1966         case IEEE80211_AMPDU_TX_START:
1967                 ath9k_ps_wakeup(sc);
1968                 ath_tx_aggr_start(sc, sta, tid, ssn);
1969                 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1970                 ath9k_ps_restore(sc);
1971                 break;
1972         case IEEE80211_AMPDU_TX_STOP:
1973                 ath9k_ps_wakeup(sc);
1974                 ath_tx_aggr_stop(sc, sta, tid);
1975                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1976                 ath9k_ps_restore(sc);
1977                 break;
1978         case IEEE80211_AMPDU_TX_OPERATIONAL:
1979                 ath9k_ps_wakeup(sc);
1980                 ath_tx_aggr_resume(sc, sta, tid);
1981                 ath9k_ps_restore(sc);
1982                 break;
1983         default:
1984                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1985                           "Unknown AMPDU action\n");
1986         }
1987
1988         return ret;
1989 }
1990
1991 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
1992 {
1993         struct ath_wiphy *aphy = hw->priv;
1994         struct ath_softc *sc = aphy->sc;
1995         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1996
1997         mutex_lock(&sc->mutex);
1998         if (ath9k_wiphy_scanning(sc)) {
1999                 printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
2000                        "same time\n");
2001                 /*
2002                  * Do not allow the concurrent scanning state for now. This
2003                  * could be improved with scanning control moved into ath9k.
2004                  */
2005                 mutex_unlock(&sc->mutex);
2006                 return;
2007         }
2008
2009         aphy->state = ATH_WIPHY_SCAN;
2010         ath9k_wiphy_pause_all_forced(sc, aphy);
2011         sc->sc_flags |= SC_OP_SCANNING;
2012         del_timer_sync(&common->ani.timer);
2013         cancel_delayed_work_sync(&sc->tx_complete_work);
2014         mutex_unlock(&sc->mutex);
2015 }
2016
2017 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2018 {
2019         struct ath_wiphy *aphy = hw->priv;
2020         struct ath_softc *sc = aphy->sc;
2021         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2022
2023         mutex_lock(&sc->mutex);
2024         aphy->state = ATH_WIPHY_ACTIVE;
2025         sc->sc_flags &= ~SC_OP_SCANNING;
2026         sc->sc_flags |= SC_OP_FULL_RESET;
2027         ath_start_ani(common);
2028         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
2029         ath_beacon_config(sc, NULL);
2030         mutex_unlock(&sc->mutex);
2031 }
2032
2033 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2034 {
2035         struct ath_wiphy *aphy = hw->priv;
2036         struct ath_softc *sc = aphy->sc;
2037         struct ath_hw *ah = sc->sc_ah;
2038
2039         mutex_lock(&sc->mutex);
2040         ah->coverage_class = coverage_class;
2041         ath9k_hw_init_global_settings(ah);
2042         mutex_unlock(&sc->mutex);
2043 }
2044
2045 struct ieee80211_ops ath9k_ops = {
2046         .tx                 = ath9k_tx,
2047         .start              = ath9k_start,
2048         .stop               = ath9k_stop,
2049         .add_interface      = ath9k_add_interface,
2050         .remove_interface   = ath9k_remove_interface,
2051         .config             = ath9k_config,
2052         .configure_filter   = ath9k_configure_filter,
2053         .sta_add            = ath9k_sta_add,
2054         .sta_remove         = ath9k_sta_remove,
2055         .conf_tx            = ath9k_conf_tx,
2056         .bss_info_changed   = ath9k_bss_info_changed,
2057         .set_key            = ath9k_set_key,
2058         .get_tsf            = ath9k_get_tsf,
2059         .set_tsf            = ath9k_set_tsf,
2060         .reset_tsf          = ath9k_reset_tsf,
2061         .ampdu_action       = ath9k_ampdu_action,
2062         .sw_scan_start      = ath9k_sw_scan_start,
2063         .sw_scan_complete   = ath9k_sw_scan_complete,
2064         .rfkill_poll        = ath9k_rfkill_poll_state,
2065         .set_coverage_class = ath9k_set_coverage_class,
2066 };