2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
21 static void ath_cache_conf_rate(struct ath_softc *sc,
22 struct ieee80211_conf *conf)
24 switch (conf->channel->band) {
25 case IEEE80211_BAND_2GHZ:
26 if (conf_is_ht20(conf))
27 sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
28 else if (conf_is_ht40_minus(conf))
29 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
30 else if (conf_is_ht40_plus(conf))
31 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
33 sc->cur_rate_mode = ATH9K_MODE_11G;
35 case IEEE80211_BAND_5GHZ:
36 if (conf_is_ht20(conf))
37 sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
38 else if (conf_is_ht40_minus(conf))
39 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
40 else if (conf_is_ht40_plus(conf))
41 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
43 sc->cur_rate_mode = ATH9K_MODE_11A;
51 static void ath_update_txpow(struct ath_softc *sc)
53 struct ath_hw *ah = sc->sc_ah;
56 if (sc->curtxpow != sc->config.txpowlimit) {
57 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
58 /* read back in case value is clamped */
59 ath9k_hw_getcapability(ah, ATH9K_CAP_TXPOW, 1, &txpow);
64 static u8 parse_mpdudensity(u8 mpdudensity)
67 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
68 * 0 for no restriction
77 switch (mpdudensity) {
83 /* Our lower layer calculations limit our precision to
99 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
100 struct ieee80211_hw *hw)
102 struct ieee80211_channel *curchan = hw->conf.channel;
103 struct ath9k_channel *channel;
106 chan_idx = curchan->hw_value;
107 channel = &sc->sc_ah->channels[chan_idx];
108 ath9k_update_ichannel(sc, hw, channel);
112 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
117 spin_lock_irqsave(&sc->sc_pm_lock, flags);
118 ret = ath9k_hw_setpower(sc->sc_ah, mode);
119 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
124 void ath9k_ps_wakeup(struct ath_softc *sc)
128 spin_lock_irqsave(&sc->sc_pm_lock, flags);
129 if (++sc->ps_usecount != 1)
132 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
135 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
138 void ath9k_ps_restore(struct ath_softc *sc)
142 spin_lock_irqsave(&sc->sc_pm_lock, flags);
143 if (--sc->ps_usecount != 0)
147 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
148 else if (sc->ps_enabled &&
149 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
151 PS_WAIT_FOR_PSPOLL_DATA |
152 PS_WAIT_FOR_TX_ACK)))
153 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
156 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
160 * Set/change channels. If the channel is really being changed, it's done
161 * by reseting the chip. To accomplish this we must first cleanup any pending
162 * DMA, then restart stuff.
164 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
165 struct ath9k_channel *hchan)
167 struct ath_hw *ah = sc->sc_ah;
168 struct ath_common *common = ath9k_hw_common(ah);
169 struct ieee80211_conf *conf = &common->hw->conf;
170 bool fastcc = true, stopped;
171 struct ieee80211_channel *channel = hw->conf.channel;
174 if (sc->sc_flags & SC_OP_INVALID)
180 * This is only performed if the channel settings have
183 * To switch channels clear any pending DMA operations;
184 * wait long enough for the RX fifo to drain, reset the
185 * hardware at the new frequency, and then re-enable
186 * the relevant bits of the h/w.
188 ath9k_hw_set_interrupts(ah, 0);
189 ath_drain_all_txq(sc, false);
190 stopped = ath_stoprecv(sc);
192 /* XXX: do not flush receive queue here. We don't want
193 * to flush data frames already in queue because of
194 * changing channel. */
196 if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
199 ath_print(common, ATH_DBG_CONFIG,
200 "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
201 sc->sc_ah->curchan->channel,
202 channel->center_freq, conf_is_ht40(conf));
204 spin_lock_bh(&sc->sc_resetlock);
206 r = ath9k_hw_reset(ah, hchan, fastcc);
208 ath_print(common, ATH_DBG_FATAL,
209 "Unable to reset channel (%u MHz), "
211 channel->center_freq, r);
212 spin_unlock_bh(&sc->sc_resetlock);
215 spin_unlock_bh(&sc->sc_resetlock);
217 sc->sc_flags &= ~SC_OP_FULL_RESET;
219 if (ath_startrecv(sc) != 0) {
220 ath_print(common, ATH_DBG_FATAL,
221 "Unable to restart recv logic\n");
226 ath_cache_conf_rate(sc, &hw->conf);
227 ath_update_txpow(sc);
228 ath9k_hw_set_interrupts(ah, sc->imask);
231 ath9k_ps_restore(sc);
236 * This routine performs the periodic noise floor calibration function
237 * that is used to adjust and optimize the chip performance. This
238 * takes environmental changes (location, temperature) into account.
239 * When the task is complete, it reschedules itself depending on the
240 * appropriate interval that was calculated.
242 void ath_ani_calibrate(unsigned long data)
244 struct ath_softc *sc = (struct ath_softc *)data;
245 struct ath_hw *ah = sc->sc_ah;
246 struct ath_common *common = ath9k_hw_common(ah);
247 bool longcal = false;
248 bool shortcal = false;
249 bool aniflag = false;
250 unsigned int timestamp = jiffies_to_msecs(jiffies);
251 u32 cal_interval, short_cal_interval;
253 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
254 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
256 /* Only calibrate if awake */
257 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
262 /* Long calibration runs independently of short calibration. */
263 if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
265 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
266 common->ani.longcal_timer = timestamp;
269 /* Short calibration applies only while caldone is false */
270 if (!common->ani.caldone) {
271 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
273 ath_print(common, ATH_DBG_ANI,
274 "shortcal @%lu\n", jiffies);
275 common->ani.shortcal_timer = timestamp;
276 common->ani.resetcal_timer = timestamp;
279 if ((timestamp - common->ani.resetcal_timer) >=
280 ATH_RESTART_CALINTERVAL) {
281 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
282 if (common->ani.caldone)
283 common->ani.resetcal_timer = timestamp;
287 /* Verify whether we must check ANI */
288 if ((timestamp - common->ani.checkani_timer) >= ATH_ANI_POLLINTERVAL) {
290 common->ani.checkani_timer = timestamp;
293 /* Skip all processing if there's nothing to do. */
294 if (longcal || shortcal || aniflag) {
295 /* Call ANI routine if necessary */
297 ath9k_hw_ani_monitor(ah, ah->curchan);
299 /* Perform calibration if necessary */
300 if (longcal || shortcal) {
301 common->ani.caldone =
302 ath9k_hw_calibrate(ah,
304 common->rx_chainmask,
308 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
311 ath_print(common, ATH_DBG_ANI,
312 " calibrate chan %u/%x nf: %d\n",
313 ah->curchan->channel,
314 ah->curchan->channelFlags,
315 common->ani.noise_floor);
319 ath9k_ps_restore(sc);
323 * Set timer interval based on previous results.
324 * The interval must be the shortest necessary to satisfy ANI,
325 * short calibration and long calibration.
327 cal_interval = ATH_LONG_CALINTERVAL;
328 if (sc->sc_ah->config.enable_ani)
329 cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL);
330 if (!common->ani.caldone)
331 cal_interval = min(cal_interval, (u32)short_cal_interval);
333 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
336 static void ath_start_ani(struct ath_common *common)
338 unsigned long timestamp = jiffies_to_msecs(jiffies);
340 common->ani.longcal_timer = timestamp;
341 common->ani.shortcal_timer = timestamp;
342 common->ani.checkani_timer = timestamp;
344 mod_timer(&common->ani.timer,
345 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
349 * Update tx/rx chainmask. For legacy association,
350 * hard code chainmask to 1x1, for 11n association, use
351 * the chainmask configuration, for bt coexistence, use
352 * the chainmask configuration even in legacy mode.
354 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
356 struct ath_hw *ah = sc->sc_ah;
357 struct ath_common *common = ath9k_hw_common(ah);
359 if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
360 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
361 common->tx_chainmask = ah->caps.tx_chainmask;
362 common->rx_chainmask = ah->caps.rx_chainmask;
364 common->tx_chainmask = 1;
365 common->rx_chainmask = 1;
368 ath_print(common, ATH_DBG_CONFIG,
369 "tx chmask: %d, rx chmask: %d\n",
370 common->tx_chainmask,
371 common->rx_chainmask);
374 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
378 an = (struct ath_node *)sta->drv_priv;
380 if (sc->sc_flags & SC_OP_TXAGGR) {
381 ath_tx_node_init(sc, an);
382 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
383 sta->ht_cap.ampdu_factor);
384 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
385 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
389 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
391 struct ath_node *an = (struct ath_node *)sta->drv_priv;
393 if (sc->sc_flags & SC_OP_TXAGGR)
394 ath_tx_node_cleanup(sc, an);
397 void ath9k_tasklet(unsigned long data)
399 struct ath_softc *sc = (struct ath_softc *)data;
400 struct ath_hw *ah = sc->sc_ah;
401 struct ath_common *common = ath9k_hw_common(ah);
403 u32 status = sc->intrstatus;
407 if (status & ATH9K_INT_FATAL) {
408 ath_reset(sc, false);
409 ath9k_ps_restore(sc);
413 if (status & (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN)) {
414 spin_lock_bh(&sc->rx.rxflushlock);
415 ath_rx_tasklet(sc, 0);
416 spin_unlock_bh(&sc->rx.rxflushlock);
419 if (status & ATH9K_INT_TX)
422 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
424 * TSF sync does not look correct; remain awake to sync with
427 ath_print(common, ATH_DBG_PS,
428 "TSFOOR - Sync with next Beacon\n");
429 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
432 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
433 if (status & ATH9K_INT_GENTIMER)
434 ath_gen_timer_isr(sc->sc_ah);
436 /* re-enable hardware interrupt */
437 ath9k_hw_set_interrupts(ah, sc->imask);
438 ath9k_ps_restore(sc);
441 irqreturn_t ath_isr(int irq, void *dev)
443 #define SCHED_INTR ( \
454 struct ath_softc *sc = dev;
455 struct ath_hw *ah = sc->sc_ah;
456 enum ath9k_int status;
460 * The hardware is not ready/present, don't
461 * touch anything. Note this can happen early
462 * on if the IRQ is shared.
464 if (sc->sc_flags & SC_OP_INVALID)
468 /* shared irq, not for us */
470 if (!ath9k_hw_intrpend(ah))
474 * Figure out the reason(s) for the interrupt. Note
475 * that the hal returns a pseudo-ISR that may include
476 * bits we haven't explicitly enabled so we mask the
477 * value to insure we only process bits we requested.
479 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
480 status &= sc->imask; /* discard unasked-for bits */
483 * If there are no status bits set, then this interrupt was not
484 * for me (should have been caught above).
489 /* Cache the status */
490 sc->intrstatus = status;
492 if (status & SCHED_INTR)
496 * If a FATAL or RXORN interrupt is received, we have to reset the
499 if (status & (ATH9K_INT_FATAL | ATH9K_INT_RXORN))
502 if (status & ATH9K_INT_SWBA)
503 tasklet_schedule(&sc->bcon_tasklet);
505 if (status & ATH9K_INT_TXURN)
506 ath9k_hw_updatetxtriglevel(ah, true);
508 if (status & ATH9K_INT_MIB) {
510 * Disable interrupts until we service the MIB
511 * interrupt; otherwise it will continue to
514 ath9k_hw_set_interrupts(ah, 0);
516 * Let the hal handle the event. We assume
517 * it will clear whatever condition caused
520 ath9k_hw_procmibevent(ah);
521 ath9k_hw_set_interrupts(ah, sc->imask);
524 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
525 if (status & ATH9K_INT_TIM_TIMER) {
526 /* Clear RxAbort bit so that we can
528 ath9k_setpower(sc, ATH9K_PM_AWAKE);
529 ath9k_hw_setrxabort(sc->sc_ah, 0);
530 sc->ps_flags |= PS_WAIT_FOR_BEACON;
535 ath_debug_stat_interrupt(sc, status);
538 /* turn off every interrupt except SWBA */
539 ath9k_hw_set_interrupts(ah, (sc->imask & ATH9K_INT_SWBA));
540 tasklet_schedule(&sc->intr_tq);
548 static u32 ath_get_extchanmode(struct ath_softc *sc,
549 struct ieee80211_channel *chan,
550 enum nl80211_channel_type channel_type)
554 switch (chan->band) {
555 case IEEE80211_BAND_2GHZ:
556 switch(channel_type) {
557 case NL80211_CHAN_NO_HT:
558 case NL80211_CHAN_HT20:
559 chanmode = CHANNEL_G_HT20;
561 case NL80211_CHAN_HT40PLUS:
562 chanmode = CHANNEL_G_HT40PLUS;
564 case NL80211_CHAN_HT40MINUS:
565 chanmode = CHANNEL_G_HT40MINUS;
569 case IEEE80211_BAND_5GHZ:
570 switch(channel_type) {
571 case NL80211_CHAN_NO_HT:
572 case NL80211_CHAN_HT20:
573 chanmode = CHANNEL_A_HT20;
575 case NL80211_CHAN_HT40PLUS:
576 chanmode = CHANNEL_A_HT40PLUS;
578 case NL80211_CHAN_HT40MINUS:
579 chanmode = CHANNEL_A_HT40MINUS;
590 static int ath_setkey_tkip(struct ath_common *common, u16 keyix, const u8 *key,
591 struct ath9k_keyval *hk, const u8 *addr,
594 struct ath_hw *ah = common->ah;
598 key_txmic = key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
599 key_rxmic = key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
603 * Group key installation - only two key cache entries are used
604 * regardless of splitmic capability since group key is only
605 * used either for TX or RX.
608 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
609 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_mic));
611 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
612 memcpy(hk->kv_txmic, key_rxmic, sizeof(hk->kv_mic));
614 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
616 if (!common->splitmic) {
617 /* TX and RX keys share the same key cache entry. */
618 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
619 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
620 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
623 /* Separate key cache entries for TX and RX */
625 /* TX key goes at first index, RX key at +32. */
626 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
627 if (!ath9k_hw_set_keycache_entry(ah, keyix, hk, NULL)) {
628 /* TX MIC entry failed. No need to proceed further */
629 ath_print(common, ATH_DBG_FATAL,
630 "Setting TX MIC Key Failed\n");
634 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
635 /* XXX delete tx key on failure? */
636 return ath9k_hw_set_keycache_entry(ah, keyix + 32, hk, addr);
639 static int ath_reserve_key_cache_slot_tkip(struct ath_common *common)
643 for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
644 if (test_bit(i, common->keymap) ||
645 test_bit(i + 64, common->keymap))
646 continue; /* At least one part of TKIP key allocated */
647 if (common->splitmic &&
648 (test_bit(i + 32, common->keymap) ||
649 test_bit(i + 64 + 32, common->keymap)))
650 continue; /* At least one part of TKIP key allocated */
652 /* Found a free slot for a TKIP key */
658 static int ath_reserve_key_cache_slot(struct ath_common *common)
662 /* First, try to find slots that would not be available for TKIP. */
663 if (common->splitmic) {
664 for (i = IEEE80211_WEP_NKID; i < common->keymax / 4; i++) {
665 if (!test_bit(i, common->keymap) &&
666 (test_bit(i + 32, common->keymap) ||
667 test_bit(i + 64, common->keymap) ||
668 test_bit(i + 64 + 32, common->keymap)))
670 if (!test_bit(i + 32, common->keymap) &&
671 (test_bit(i, common->keymap) ||
672 test_bit(i + 64, common->keymap) ||
673 test_bit(i + 64 + 32, common->keymap)))
675 if (!test_bit(i + 64, common->keymap) &&
676 (test_bit(i , common->keymap) ||
677 test_bit(i + 32, common->keymap) ||
678 test_bit(i + 64 + 32, common->keymap)))
680 if (!test_bit(i + 64 + 32, common->keymap) &&
681 (test_bit(i, common->keymap) ||
682 test_bit(i + 32, common->keymap) ||
683 test_bit(i + 64, common->keymap)))
687 for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
688 if (!test_bit(i, common->keymap) &&
689 test_bit(i + 64, common->keymap))
691 if (test_bit(i, common->keymap) &&
692 !test_bit(i + 64, common->keymap))
697 /* No partially used TKIP slots, pick any available slot */
698 for (i = IEEE80211_WEP_NKID; i < common->keymax; i++) {
699 /* Do not allow slots that could be needed for TKIP group keys
700 * to be used. This limitation could be removed if we know that
701 * TKIP will not be used. */
702 if (i >= 64 && i < 64 + IEEE80211_WEP_NKID)
704 if (common->splitmic) {
705 if (i >= 32 && i < 32 + IEEE80211_WEP_NKID)
707 if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID)
711 if (!test_bit(i, common->keymap))
712 return i; /* Found a free slot for a key */
715 /* No free slot found */
719 static int ath_key_config(struct ath_common *common,
720 struct ieee80211_vif *vif,
721 struct ieee80211_sta *sta,
722 struct ieee80211_key_conf *key)
724 struct ath_hw *ah = common->ah;
725 struct ath9k_keyval hk;
726 const u8 *mac = NULL;
730 memset(&hk, 0, sizeof(hk));
734 hk.kv_type = ATH9K_CIPHER_WEP;
737 hk.kv_type = ATH9K_CIPHER_TKIP;
740 hk.kv_type = ATH9K_CIPHER_AES_CCM;
746 hk.kv_len = key->keylen;
747 memcpy(hk.kv_val, key->key, key->keylen);
749 if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
750 /* For now, use the default keys for broadcast keys. This may
751 * need to change with virtual interfaces. */
753 } else if (key->keyidx) {
758 if (vif->type != NL80211_IFTYPE_AP) {
759 /* Only keyidx 0 should be used with unicast key, but
760 * allow this for client mode for now. */
769 if (key->alg == ALG_TKIP)
770 idx = ath_reserve_key_cache_slot_tkip(common);
772 idx = ath_reserve_key_cache_slot(common);
774 return -ENOSPC; /* no free key cache entries */
777 if (key->alg == ALG_TKIP)
778 ret = ath_setkey_tkip(common, idx, key->key, &hk, mac,
779 vif->type == NL80211_IFTYPE_AP);
781 ret = ath9k_hw_set_keycache_entry(ah, idx, &hk, mac);
786 set_bit(idx, common->keymap);
787 if (key->alg == ALG_TKIP) {
788 set_bit(idx + 64, common->keymap);
789 if (common->splitmic) {
790 set_bit(idx + 32, common->keymap);
791 set_bit(idx + 64 + 32, common->keymap);
798 static void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key)
800 struct ath_hw *ah = common->ah;
802 ath9k_hw_keyreset(ah, key->hw_key_idx);
803 if (key->hw_key_idx < IEEE80211_WEP_NKID)
806 clear_bit(key->hw_key_idx, common->keymap);
807 if (key->alg != ALG_TKIP)
810 clear_bit(key->hw_key_idx + 64, common->keymap);
811 if (common->splitmic) {
812 clear_bit(key->hw_key_idx + 32, common->keymap);
813 clear_bit(key->hw_key_idx + 64 + 32, common->keymap);
817 static void ath9k_bss_assoc_info(struct ath_softc *sc,
818 struct ieee80211_vif *vif,
819 struct ieee80211_bss_conf *bss_conf)
821 struct ath_hw *ah = sc->sc_ah;
822 struct ath_common *common = ath9k_hw_common(ah);
824 if (bss_conf->assoc) {
825 ath_print(common, ATH_DBG_CONFIG,
826 "Bss Info ASSOC %d, bssid: %pM\n",
827 bss_conf->aid, common->curbssid);
829 /* New association, store aid */
830 common->curaid = bss_conf->aid;
831 ath9k_hw_write_associd(ah);
834 * Request a re-configuration of Beacon related timers
835 * on the receipt of the first Beacon frame (i.e.,
836 * after time sync with the AP).
838 sc->ps_flags |= PS_BEACON_SYNC;
840 /* Configure the beacon */
841 ath_beacon_config(sc, vif);
843 /* Reset rssi stats */
844 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
846 ath_start_ani(common);
848 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
851 del_timer_sync(&common->ani.timer);
855 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
857 struct ath_hw *ah = sc->sc_ah;
858 struct ath_common *common = ath9k_hw_common(ah);
859 struct ieee80211_channel *channel = hw->conf.channel;
863 ath9k_hw_configpcipowersave(ah, 0, 0);
866 ah->curchan = ath_get_curchannel(sc, sc->hw);
868 spin_lock_bh(&sc->sc_resetlock);
869 r = ath9k_hw_reset(ah, ah->curchan, false);
871 ath_print(common, ATH_DBG_FATAL,
872 "Unable to reset channel (%u MHz), "
874 channel->center_freq, r);
876 spin_unlock_bh(&sc->sc_resetlock);
878 ath_update_txpow(sc);
879 if (ath_startrecv(sc) != 0) {
880 ath_print(common, ATH_DBG_FATAL,
881 "Unable to restart recv logic\n");
885 if (sc->sc_flags & SC_OP_BEACONS)
886 ath_beacon_config(sc, NULL); /* restart beacons */
888 /* Re-Enable interrupts */
889 ath9k_hw_set_interrupts(ah, sc->imask);
892 ath9k_hw_cfg_output(ah, ah->led_pin,
893 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
894 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
896 ieee80211_wake_queues(hw);
897 ath9k_ps_restore(sc);
900 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
902 struct ath_hw *ah = sc->sc_ah;
903 struct ieee80211_channel *channel = hw->conf.channel;
907 ieee80211_stop_queues(hw);
910 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
911 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
913 /* Disable interrupts */
914 ath9k_hw_set_interrupts(ah, 0);
916 ath_drain_all_txq(sc, false); /* clear pending tx frames */
917 ath_stoprecv(sc); /* turn off frame recv */
918 ath_flushrecv(sc); /* flush recv queue */
921 ah->curchan = ath_get_curchannel(sc, hw);
923 spin_lock_bh(&sc->sc_resetlock);
924 r = ath9k_hw_reset(ah, ah->curchan, false);
926 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
927 "Unable to reset channel (%u MHz), "
929 channel->center_freq, r);
931 spin_unlock_bh(&sc->sc_resetlock);
933 ath9k_hw_phy_disable(ah);
934 ath9k_hw_configpcipowersave(ah, 1, 1);
935 ath9k_ps_restore(sc);
936 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
939 int ath_reset(struct ath_softc *sc, bool retry_tx)
941 struct ath_hw *ah = sc->sc_ah;
942 struct ath_common *common = ath9k_hw_common(ah);
943 struct ieee80211_hw *hw = sc->hw;
947 del_timer_sync(&common->ani.timer);
949 ieee80211_stop_queues(hw);
951 ath9k_hw_set_interrupts(ah, 0);
952 ath_drain_all_txq(sc, retry_tx);
956 spin_lock_bh(&sc->sc_resetlock);
957 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
959 ath_print(common, ATH_DBG_FATAL,
960 "Unable to reset hardware; reset status %d\n", r);
961 spin_unlock_bh(&sc->sc_resetlock);
963 if (ath_startrecv(sc) != 0)
964 ath_print(common, ATH_DBG_FATAL,
965 "Unable to start recv logic\n");
968 * We may be doing a reset in response to a request
969 * that changes the channel so update any state that
970 * might change as a result.
972 ath_cache_conf_rate(sc, &hw->conf);
974 ath_update_txpow(sc);
976 if (sc->sc_flags & SC_OP_BEACONS)
977 ath_beacon_config(sc, NULL); /* restart beacons */
979 ath9k_hw_set_interrupts(ah, sc->imask);
983 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
984 if (ATH_TXQ_SETUP(sc, i)) {
985 spin_lock_bh(&sc->tx.txq[i].axq_lock);
986 ath_txq_schedule(sc, &sc->tx.txq[i]);
987 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
992 ieee80211_wake_queues(hw);
995 ath_start_ani(common);
1000 int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1006 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VO];
1009 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VI];
1012 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
1015 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BK];
1018 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
1025 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1030 case ATH9K_WME_AC_VO:
1033 case ATH9K_WME_AC_VI:
1036 case ATH9K_WME_AC_BE:
1039 case ATH9K_WME_AC_BK:
1050 /* XXX: Remove me once we don't depend on ath9k_channel for all
1051 * this redundant data */
1052 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1053 struct ath9k_channel *ichan)
1055 struct ieee80211_channel *chan = hw->conf.channel;
1056 struct ieee80211_conf *conf = &hw->conf;
1058 ichan->channel = chan->center_freq;
1061 if (chan->band == IEEE80211_BAND_2GHZ) {
1062 ichan->chanmode = CHANNEL_G;
1063 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1065 ichan->chanmode = CHANNEL_A;
1066 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1069 if (conf_is_ht(conf))
1070 ichan->chanmode = ath_get_extchanmode(sc, chan,
1071 conf->channel_type);
1074 /**********************/
1075 /* mac80211 callbacks */
1076 /**********************/
1078 static int ath9k_start(struct ieee80211_hw *hw)
1080 struct ath_wiphy *aphy = hw->priv;
1081 struct ath_softc *sc = aphy->sc;
1082 struct ath_hw *ah = sc->sc_ah;
1083 struct ath_common *common = ath9k_hw_common(ah);
1084 struct ieee80211_channel *curchan = hw->conf.channel;
1085 struct ath9k_channel *init_channel;
1088 ath_print(common, ATH_DBG_CONFIG,
1089 "Starting driver with initial channel: %d MHz\n",
1090 curchan->center_freq);
1092 mutex_lock(&sc->mutex);
1094 if (ath9k_wiphy_started(sc)) {
1095 if (sc->chan_idx == curchan->hw_value) {
1097 * Already on the operational channel, the new wiphy
1098 * can be marked active.
1100 aphy->state = ATH_WIPHY_ACTIVE;
1101 ieee80211_wake_queues(hw);
1104 * Another wiphy is on another channel, start the new
1105 * wiphy in paused state.
1107 aphy->state = ATH_WIPHY_PAUSED;
1108 ieee80211_stop_queues(hw);
1110 mutex_unlock(&sc->mutex);
1113 aphy->state = ATH_WIPHY_ACTIVE;
1115 /* setup initial channel */
1117 sc->chan_idx = curchan->hw_value;
1119 init_channel = ath_get_curchannel(sc, hw);
1121 /* Reset SERDES registers */
1122 ath9k_hw_configpcipowersave(ah, 0, 0);
1125 * The basic interface to setting the hardware in a good
1126 * state is ``reset''. On return the hardware is known to
1127 * be powered up and with interrupts disabled. This must
1128 * be followed by initialization of the appropriate bits
1129 * and then setup of the interrupt mask.
1131 spin_lock_bh(&sc->sc_resetlock);
1132 r = ath9k_hw_reset(ah, init_channel, false);
1134 ath_print(common, ATH_DBG_FATAL,
1135 "Unable to reset hardware; reset status %d "
1136 "(freq %u MHz)\n", r,
1137 curchan->center_freq);
1138 spin_unlock_bh(&sc->sc_resetlock);
1141 spin_unlock_bh(&sc->sc_resetlock);
1144 * This is needed only to setup initial state
1145 * but it's best done after a reset.
1147 ath_update_txpow(sc);
1150 * Setup the hardware after reset:
1151 * The receive engine is set going.
1152 * Frame transmit is handled entirely
1153 * in the frame output path; there's nothing to do
1154 * here except setup the interrupt mask.
1156 if (ath_startrecv(sc) != 0) {
1157 ath_print(common, ATH_DBG_FATAL,
1158 "Unable to start recv logic\n");
1163 /* Setup our intr mask. */
1164 sc->imask = ATH9K_INT_RX | ATH9K_INT_TX
1165 | ATH9K_INT_RXEOL | ATH9K_INT_RXORN
1166 | ATH9K_INT_FATAL | ATH9K_INT_GLOBAL;
1168 if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
1169 sc->imask |= ATH9K_INT_GTT;
1171 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1172 sc->imask |= ATH9K_INT_CST;
1174 ath_cache_conf_rate(sc, &hw->conf);
1176 sc->sc_flags &= ~SC_OP_INVALID;
1178 /* Disable BMISS interrupt when we're not associated */
1179 sc->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1180 ath9k_hw_set_interrupts(ah, sc->imask);
1182 ieee80211_wake_queues(hw);
1184 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1186 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1187 !ah->btcoex_hw.enabled) {
1188 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1189 AR_STOMP_LOW_WLAN_WGHT);
1190 ath9k_hw_btcoex_enable(ah);
1192 if (common->bus_ops->bt_coex_prep)
1193 common->bus_ops->bt_coex_prep(common);
1194 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1195 ath9k_btcoex_timer_resume(sc);
1199 mutex_unlock(&sc->mutex);
1204 static int ath9k_tx(struct ieee80211_hw *hw,
1205 struct sk_buff *skb)
1207 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1208 struct ath_wiphy *aphy = hw->priv;
1209 struct ath_softc *sc = aphy->sc;
1210 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1211 struct ath_tx_control txctl;
1212 int padpos, padsize;
1213 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1215 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1216 ath_print(common, ATH_DBG_XMIT,
1217 "ath9k: %s: TX in unexpected wiphy state "
1218 "%d\n", wiphy_name(hw->wiphy), aphy->state);
1222 if (sc->ps_enabled) {
1224 * mac80211 does not set PM field for normal data frames, so we
1225 * need to update that based on the current PS mode.
1227 if (ieee80211_is_data(hdr->frame_control) &&
1228 !ieee80211_is_nullfunc(hdr->frame_control) &&
1229 !ieee80211_has_pm(hdr->frame_control)) {
1230 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1231 "while in PS mode\n");
1232 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1236 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1238 * We are using PS-Poll and mac80211 can request TX while in
1239 * power save mode. Need to wake up hardware for the TX to be
1240 * completed and if needed, also for RX of buffered frames.
1242 ath9k_ps_wakeup(sc);
1243 ath9k_hw_setrxabort(sc->sc_ah, 0);
1244 if (ieee80211_is_pspoll(hdr->frame_control)) {
1245 ath_print(common, ATH_DBG_PS,
1246 "Sending PS-Poll to pick a buffered frame\n");
1247 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1249 ath_print(common, ATH_DBG_PS,
1250 "Wake up to complete TX\n");
1251 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1254 * The actual restore operation will happen only after
1255 * the sc_flags bit is cleared. We are just dropping
1256 * the ps_usecount here.
1258 ath9k_ps_restore(sc);
1261 memset(&txctl, 0, sizeof(struct ath_tx_control));
1264 * As a temporary workaround, assign seq# here; this will likely need
1265 * to be cleaned up to work better with Beacon transmission and virtual
1268 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1269 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1270 sc->tx.seq_no += 0x10;
1271 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1272 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1275 /* Add the padding after the header if this is not already done */
1276 padpos = ath9k_cmn_padpos(hdr->frame_control);
1277 padsize = padpos & 3;
1278 if (padsize && skb->len>padpos) {
1279 if (skb_headroom(skb) < padsize)
1281 skb_push(skb, padsize);
1282 memmove(skb->data, skb->data + padsize, padpos);
1285 /* Check if a tx queue is available */
1287 txctl.txq = ath_test_get_txq(sc, skb);
1291 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1293 if (ath_tx_start(hw, skb, &txctl) != 0) {
1294 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1300 dev_kfree_skb_any(skb);
1304 static void ath9k_stop(struct ieee80211_hw *hw)
1306 struct ath_wiphy *aphy = hw->priv;
1307 struct ath_softc *sc = aphy->sc;
1308 struct ath_hw *ah = sc->sc_ah;
1309 struct ath_common *common = ath9k_hw_common(ah);
1311 mutex_lock(&sc->mutex);
1313 aphy->state = ATH_WIPHY_INACTIVE;
1315 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1316 cancel_delayed_work_sync(&sc->tx_complete_work);
1318 if (!sc->num_sec_wiphy) {
1319 cancel_delayed_work_sync(&sc->wiphy_work);
1320 cancel_work_sync(&sc->chan_work);
1323 if (sc->sc_flags & SC_OP_INVALID) {
1324 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1325 mutex_unlock(&sc->mutex);
1329 if (ath9k_wiphy_started(sc)) {
1330 mutex_unlock(&sc->mutex);
1331 return; /* another wiphy still in use */
1334 /* Ensure HW is awake when we try to shut it down. */
1335 ath9k_ps_wakeup(sc);
1337 if (ah->btcoex_hw.enabled) {
1338 ath9k_hw_btcoex_disable(ah);
1339 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1340 ath9k_btcoex_timer_pause(sc);
1343 /* make sure h/w will not generate any interrupt
1344 * before setting the invalid flag. */
1345 ath9k_hw_set_interrupts(ah, 0);
1347 if (!(sc->sc_flags & SC_OP_INVALID)) {
1348 ath_drain_all_txq(sc, false);
1350 ath9k_hw_phy_disable(ah);
1352 sc->rx.rxlink = NULL;
1354 /* disable HAL and put h/w to sleep */
1355 ath9k_hw_disable(ah);
1356 ath9k_hw_configpcipowersave(ah, 1, 1);
1357 ath9k_ps_restore(sc);
1359 /* Finally, put the chip in FULL SLEEP mode */
1360 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1362 sc->sc_flags |= SC_OP_INVALID;
1364 mutex_unlock(&sc->mutex);
1366 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1369 static int ath9k_add_interface(struct ieee80211_hw *hw,
1370 struct ieee80211_vif *vif)
1372 struct ath_wiphy *aphy = hw->priv;
1373 struct ath_softc *sc = aphy->sc;
1374 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1375 struct ath_vif *avp = (void *)vif->drv_priv;
1376 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1379 mutex_lock(&sc->mutex);
1381 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1387 switch (vif->type) {
1388 case NL80211_IFTYPE_STATION:
1389 ic_opmode = NL80211_IFTYPE_STATION;
1391 case NL80211_IFTYPE_ADHOC:
1392 case NL80211_IFTYPE_AP:
1393 case NL80211_IFTYPE_MESH_POINT:
1394 if (sc->nbcnvifs >= ATH_BCBUF) {
1398 ic_opmode = vif->type;
1401 ath_print(common, ATH_DBG_FATAL,
1402 "Interface type %d not yet supported\n", vif->type);
1407 ath_print(common, ATH_DBG_CONFIG,
1408 "Attach a VIF of type: %d\n", ic_opmode);
1410 /* Set the VIF opmode */
1411 avp->av_opmode = ic_opmode;
1416 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1417 ath9k_set_bssid_mask(hw);
1420 goto out; /* skip global settings for secondary vif */
1422 if (ic_opmode == NL80211_IFTYPE_AP) {
1423 ath9k_hw_set_tsfadjust(sc->sc_ah, 1);
1424 sc->sc_flags |= SC_OP_TSF_RESET;
1427 /* Set the device opmode */
1428 sc->sc_ah->opmode = ic_opmode;
1431 * Enable MIB interrupts when there are hardware phy counters.
1432 * Note we only do this (at the moment) for station mode.
1434 if ((vif->type == NL80211_IFTYPE_STATION) ||
1435 (vif->type == NL80211_IFTYPE_ADHOC) ||
1436 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1437 sc->imask |= ATH9K_INT_MIB;
1438 sc->imask |= ATH9K_INT_TSFOOR;
1441 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
1443 if (vif->type == NL80211_IFTYPE_AP ||
1444 vif->type == NL80211_IFTYPE_ADHOC ||
1445 vif->type == NL80211_IFTYPE_MONITOR)
1446 ath_start_ani(common);
1449 mutex_unlock(&sc->mutex);
1453 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1454 struct ieee80211_vif *vif)
1456 struct ath_wiphy *aphy = hw->priv;
1457 struct ath_softc *sc = aphy->sc;
1458 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1459 struct ath_vif *avp = (void *)vif->drv_priv;
1462 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1464 mutex_lock(&sc->mutex);
1467 del_timer_sync(&common->ani.timer);
1469 /* Reclaim beacon resources */
1470 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1471 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1472 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1473 ath9k_ps_wakeup(sc);
1474 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1475 ath9k_ps_restore(sc);
1478 ath_beacon_return(sc, avp);
1479 sc->sc_flags &= ~SC_OP_BEACONS;
1481 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1482 if (sc->beacon.bslot[i] == vif) {
1483 printk(KERN_DEBUG "%s: vif had allocated beacon "
1484 "slot\n", __func__);
1485 sc->beacon.bslot[i] = NULL;
1486 sc->beacon.bslot_aphy[i] = NULL;
1492 mutex_unlock(&sc->mutex);
1495 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1497 struct ath_wiphy *aphy = hw->priv;
1498 struct ath_softc *sc = aphy->sc;
1499 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1500 struct ieee80211_conf *conf = &hw->conf;
1501 struct ath_hw *ah = sc->sc_ah;
1504 mutex_lock(&sc->mutex);
1507 * Leave this as the first check because we need to turn on the
1508 * radio if it was disabled before prior to processing the rest
1509 * of the changes. Likewise we must only disable the radio towards
1512 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1514 bool all_wiphys_idle;
1515 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1517 spin_lock_bh(&sc->wiphy_lock);
1518 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1519 ath9k_set_wiphy_idle(aphy, idle);
1521 if (!idle && all_wiphys_idle)
1522 enable_radio = true;
1525 * After we unlock here its possible another wiphy
1526 * can be re-renabled so to account for that we will
1527 * only disable the radio toward the end of this routine
1528 * if by then all wiphys are still idle.
1530 spin_unlock_bh(&sc->wiphy_lock);
1533 sc->ps_idle = false;
1534 ath_radio_enable(sc, hw);
1535 ath_print(common, ATH_DBG_CONFIG,
1536 "not-idle: enabling radio\n");
1541 * We just prepare to enable PS. We have to wait until our AP has
1542 * ACK'd our null data frame to disable RX otherwise we'll ignore
1543 * those ACKs and end up retransmitting the same null data frames.
1544 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1546 if (changed & IEEE80211_CONF_CHANGE_PS) {
1547 if (conf->flags & IEEE80211_CONF_PS) {
1548 sc->ps_flags |= PS_ENABLED;
1549 if (!(ah->caps.hw_caps &
1550 ATH9K_HW_CAP_AUTOSLEEP)) {
1551 if ((sc->imask & ATH9K_INT_TIM_TIMER) == 0) {
1552 sc->imask |= ATH9K_INT_TIM_TIMER;
1553 ath9k_hw_set_interrupts(sc->sc_ah,
1558 * At this point we know hardware has received an ACK
1559 * of a previously sent null data frame.
1561 if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1562 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1563 sc->ps_enabled = true;
1564 ath9k_hw_setrxabort(sc->sc_ah, 1);
1567 sc->ps_enabled = false;
1568 sc->ps_flags &= ~(PS_ENABLED |
1569 PS_NULLFUNC_COMPLETED);
1570 ath9k_setpower(sc, ATH9K_PM_AWAKE);
1571 if (!(ah->caps.hw_caps &
1572 ATH9K_HW_CAP_AUTOSLEEP)) {
1573 ath9k_hw_setrxabort(sc->sc_ah, 0);
1574 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1576 PS_WAIT_FOR_PSPOLL_DATA |
1577 PS_WAIT_FOR_TX_ACK);
1578 if (sc->imask & ATH9K_INT_TIM_TIMER) {
1579 sc->imask &= ~ATH9K_INT_TIM_TIMER;
1580 ath9k_hw_set_interrupts(sc->sc_ah,
1587 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1588 if (conf->flags & IEEE80211_CONF_MONITOR) {
1589 ath_print(common, ATH_DBG_CONFIG,
1590 "HW opmode set to Monitor mode\n");
1591 sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1595 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1596 struct ieee80211_channel *curchan = hw->conf.channel;
1597 int pos = curchan->hw_value;
1599 aphy->chan_idx = pos;
1600 aphy->chan_is_ht = conf_is_ht(conf);
1602 if (aphy->state == ATH_WIPHY_SCAN ||
1603 aphy->state == ATH_WIPHY_ACTIVE)
1604 ath9k_wiphy_pause_all_forced(sc, aphy);
1607 * Do not change operational channel based on a paused
1610 goto skip_chan_change;
1613 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1614 curchan->center_freq);
1616 /* XXX: remove me eventualy */
1617 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1619 ath_update_chainmask(sc, conf_is_ht(conf));
1621 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1622 ath_print(common, ATH_DBG_FATAL,
1623 "Unable to set channel\n");
1624 mutex_unlock(&sc->mutex);
1630 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1631 sc->config.txpowlimit = 2 * conf->power_level;
1632 ath_update_txpow(sc);
1635 spin_lock_bh(&sc->wiphy_lock);
1636 disable_radio = ath9k_all_wiphys_idle(sc);
1637 spin_unlock_bh(&sc->wiphy_lock);
1639 if (disable_radio) {
1640 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1642 ath_radio_disable(sc, hw);
1645 mutex_unlock(&sc->mutex);
1650 #define SUPPORTED_FILTERS \
1651 (FIF_PROMISC_IN_BSS | \
1656 FIF_BCN_PRBRESP_PROMISC | \
1659 /* FIXME: sc->sc_full_reset ? */
1660 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1661 unsigned int changed_flags,
1662 unsigned int *total_flags,
1665 struct ath_wiphy *aphy = hw->priv;
1666 struct ath_softc *sc = aphy->sc;
1669 changed_flags &= SUPPORTED_FILTERS;
1670 *total_flags &= SUPPORTED_FILTERS;
1672 sc->rx.rxfilter = *total_flags;
1673 ath9k_ps_wakeup(sc);
1674 rfilt = ath_calcrxfilter(sc);
1675 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1676 ath9k_ps_restore(sc);
1678 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1679 "Set HW RX filter: 0x%x\n", rfilt);
1682 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1683 struct ieee80211_vif *vif,
1684 enum sta_notify_cmd cmd,
1685 struct ieee80211_sta *sta)
1687 struct ath_wiphy *aphy = hw->priv;
1688 struct ath_softc *sc = aphy->sc;
1691 case STA_NOTIFY_ADD:
1692 ath_node_attach(sc, sta);
1694 case STA_NOTIFY_REMOVE:
1695 ath_node_detach(sc, sta);
1702 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1703 const struct ieee80211_tx_queue_params *params)
1705 struct ath_wiphy *aphy = hw->priv;
1706 struct ath_softc *sc = aphy->sc;
1707 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1708 struct ath9k_tx_queue_info qi;
1711 if (queue >= WME_NUM_AC)
1714 mutex_lock(&sc->mutex);
1716 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1718 qi.tqi_aifs = params->aifs;
1719 qi.tqi_cwmin = params->cw_min;
1720 qi.tqi_cwmax = params->cw_max;
1721 qi.tqi_burstTime = params->txop;
1722 qnum = ath_get_hal_qnum(queue, sc);
1724 ath_print(common, ATH_DBG_CONFIG,
1725 "Configure tx [queue/halq] [%d/%d], "
1726 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1727 queue, qnum, params->aifs, params->cw_min,
1728 params->cw_max, params->txop);
1730 ret = ath_txq_update(sc, qnum, &qi);
1732 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1734 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1735 if ((qnum == sc->tx.hwq_map[ATH9K_WME_AC_BE]) && !ret)
1736 ath_beaconq_config(sc);
1738 mutex_unlock(&sc->mutex);
1743 static int ath9k_set_key(struct ieee80211_hw *hw,
1744 enum set_key_cmd cmd,
1745 struct ieee80211_vif *vif,
1746 struct ieee80211_sta *sta,
1747 struct ieee80211_key_conf *key)
1749 struct ath_wiphy *aphy = hw->priv;
1750 struct ath_softc *sc = aphy->sc;
1751 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1754 if (modparam_nohwcrypt)
1757 mutex_lock(&sc->mutex);
1758 ath9k_ps_wakeup(sc);
1759 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1763 ret = ath_key_config(common, vif, sta, key);
1765 key->hw_key_idx = ret;
1766 /* push IV and Michael MIC generation to stack */
1767 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1768 if (key->alg == ALG_TKIP)
1769 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1770 if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
1771 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1776 ath_key_delete(common, key);
1782 ath9k_ps_restore(sc);
1783 mutex_unlock(&sc->mutex);
1788 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1789 struct ieee80211_vif *vif,
1790 struct ieee80211_bss_conf *bss_conf,
1793 struct ath_wiphy *aphy = hw->priv;
1794 struct ath_softc *sc = aphy->sc;
1795 struct ath_hw *ah = sc->sc_ah;
1796 struct ath_common *common = ath9k_hw_common(ah);
1797 struct ath_vif *avp = (void *)vif->drv_priv;
1801 mutex_lock(&sc->mutex);
1803 if (changed & BSS_CHANGED_BSSID) {
1805 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1806 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1808 ath9k_hw_write_associd(ah);
1810 /* Set aggregation protection mode parameters */
1811 sc->config.ath_aggr_prot = 0;
1813 /* Only legacy IBSS for now */
1814 if (vif->type == NL80211_IFTYPE_ADHOC)
1815 ath_update_chainmask(sc, 0);
1817 ath_print(common, ATH_DBG_CONFIG,
1818 "BSSID: %pM aid: 0x%x\n",
1819 common->curbssid, common->curaid);
1821 /* need to reconfigure the beacon */
1822 sc->sc_flags &= ~SC_OP_BEACONS ;
1825 /* Enable transmission of beacons (AP, IBSS, MESH) */
1826 if ((changed & BSS_CHANGED_BEACON) ||
1827 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1828 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1829 error = ath_beacon_alloc(aphy, vif);
1831 ath_beacon_config(sc, vif);
1834 if (changed & BSS_CHANGED_ERP_SLOT) {
1835 if (bss_conf->use_short_slot)
1839 if (vif->type == NL80211_IFTYPE_AP) {
1841 * Defer update, so that connected stations can adjust
1842 * their settings at the same time.
1843 * See beacon.c for more details
1845 sc->beacon.slottime = slottime;
1846 sc->beacon.updateslot = UPDATE;
1848 ah->slottime = slottime;
1849 ath9k_hw_init_global_settings(ah);
1853 /* Disable transmission of beacons */
1854 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1855 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1857 if (changed & BSS_CHANGED_BEACON_INT) {
1858 sc->beacon_interval = bss_conf->beacon_int;
1860 * In case of AP mode, the HW TSF has to be reset
1861 * when the beacon interval changes.
1863 if (vif->type == NL80211_IFTYPE_AP) {
1864 sc->sc_flags |= SC_OP_TSF_RESET;
1865 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1866 error = ath_beacon_alloc(aphy, vif);
1868 ath_beacon_config(sc, vif);
1870 ath_beacon_config(sc, vif);
1874 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1875 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1876 bss_conf->use_short_preamble);
1877 if (bss_conf->use_short_preamble)
1878 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1880 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1883 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1884 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1885 bss_conf->use_cts_prot);
1886 if (bss_conf->use_cts_prot &&
1887 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1888 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1890 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1893 if (changed & BSS_CHANGED_ASSOC) {
1894 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1896 ath9k_bss_assoc_info(sc, vif, bss_conf);
1899 mutex_unlock(&sc->mutex);
1902 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1905 struct ath_wiphy *aphy = hw->priv;
1906 struct ath_softc *sc = aphy->sc;
1908 mutex_lock(&sc->mutex);
1909 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1910 mutex_unlock(&sc->mutex);
1915 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1917 struct ath_wiphy *aphy = hw->priv;
1918 struct ath_softc *sc = aphy->sc;
1920 mutex_lock(&sc->mutex);
1921 ath9k_hw_settsf64(sc->sc_ah, tsf);
1922 mutex_unlock(&sc->mutex);
1925 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1927 struct ath_wiphy *aphy = hw->priv;
1928 struct ath_softc *sc = aphy->sc;
1930 mutex_lock(&sc->mutex);
1932 ath9k_ps_wakeup(sc);
1933 ath9k_hw_reset_tsf(sc->sc_ah);
1934 ath9k_ps_restore(sc);
1936 mutex_unlock(&sc->mutex);
1939 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1940 struct ieee80211_vif *vif,
1941 enum ieee80211_ampdu_mlme_action action,
1942 struct ieee80211_sta *sta,
1945 struct ath_wiphy *aphy = hw->priv;
1946 struct ath_softc *sc = aphy->sc;
1950 case IEEE80211_AMPDU_RX_START:
1951 if (!(sc->sc_flags & SC_OP_RXAGGR))
1954 case IEEE80211_AMPDU_RX_STOP:
1956 case IEEE80211_AMPDU_TX_START:
1957 ath9k_ps_wakeup(sc);
1958 ath_tx_aggr_start(sc, sta, tid, ssn);
1959 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1960 ath9k_ps_restore(sc);
1962 case IEEE80211_AMPDU_TX_STOP:
1963 ath9k_ps_wakeup(sc);
1964 ath_tx_aggr_stop(sc, sta, tid);
1965 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1966 ath9k_ps_restore(sc);
1968 case IEEE80211_AMPDU_TX_OPERATIONAL:
1969 ath9k_ps_wakeup(sc);
1970 ath_tx_aggr_resume(sc, sta, tid);
1971 ath9k_ps_restore(sc);
1974 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1975 "Unknown AMPDU action\n");
1981 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
1983 struct ath_wiphy *aphy = hw->priv;
1984 struct ath_softc *sc = aphy->sc;
1985 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1987 mutex_lock(&sc->mutex);
1988 if (ath9k_wiphy_scanning(sc)) {
1989 printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
1992 * Do not allow the concurrent scanning state for now. This
1993 * could be improved with scanning control moved into ath9k.
1995 mutex_unlock(&sc->mutex);
1999 aphy->state = ATH_WIPHY_SCAN;
2000 ath9k_wiphy_pause_all_forced(sc, aphy);
2001 sc->sc_flags |= SC_OP_SCANNING;
2002 del_timer_sync(&common->ani.timer);
2003 cancel_delayed_work_sync(&sc->tx_complete_work);
2004 mutex_unlock(&sc->mutex);
2007 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2009 struct ath_wiphy *aphy = hw->priv;
2010 struct ath_softc *sc = aphy->sc;
2011 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2013 mutex_lock(&sc->mutex);
2014 aphy->state = ATH_WIPHY_ACTIVE;
2015 sc->sc_flags &= ~SC_OP_SCANNING;
2016 sc->sc_flags |= SC_OP_FULL_RESET;
2017 ath_start_ani(common);
2018 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
2019 ath_beacon_config(sc, NULL);
2020 mutex_unlock(&sc->mutex);
2023 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2025 struct ath_wiphy *aphy = hw->priv;
2026 struct ath_softc *sc = aphy->sc;
2027 struct ath_hw *ah = sc->sc_ah;
2029 mutex_lock(&sc->mutex);
2030 ah->coverage_class = coverage_class;
2031 ath9k_hw_init_global_settings(ah);
2032 mutex_unlock(&sc->mutex);
2035 struct ieee80211_ops ath9k_ops = {
2037 .start = ath9k_start,
2039 .add_interface = ath9k_add_interface,
2040 .remove_interface = ath9k_remove_interface,
2041 .config = ath9k_config,
2042 .configure_filter = ath9k_configure_filter,
2043 .sta_notify = ath9k_sta_notify,
2044 .conf_tx = ath9k_conf_tx,
2045 .bss_info_changed = ath9k_bss_info_changed,
2046 .set_key = ath9k_set_key,
2047 .get_tsf = ath9k_get_tsf,
2048 .set_tsf = ath9k_set_tsf,
2049 .reset_tsf = ath9k_reset_tsf,
2050 .ampdu_action = ath9k_ampdu_action,
2051 .sw_scan_start = ath9k_sw_scan_start,
2052 .sw_scan_complete = ath9k_sw_scan_complete,
2053 .rfkill_poll = ath9k_rfkill_poll_state,
2054 .set_coverage_class = ath9k_set_coverage_class,