2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
21 static void ath_cache_conf_rate(struct ath_softc *sc,
22 struct ieee80211_conf *conf)
24 switch (conf->channel->band) {
25 case IEEE80211_BAND_2GHZ:
26 if (conf_is_ht20(conf))
27 sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
28 else if (conf_is_ht40_minus(conf))
29 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
30 else if (conf_is_ht40_plus(conf))
31 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
33 sc->cur_rate_mode = ATH9K_MODE_11G;
35 case IEEE80211_BAND_5GHZ:
36 if (conf_is_ht20(conf))
37 sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
38 else if (conf_is_ht40_minus(conf))
39 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
40 else if (conf_is_ht40_plus(conf))
41 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
43 sc->cur_rate_mode = ATH9K_MODE_11A;
51 static void ath_update_txpow(struct ath_softc *sc)
53 struct ath_hw *ah = sc->sc_ah;
56 if (sc->curtxpow != sc->config.txpowlimit) {
57 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
58 /* read back in case value is clamped */
59 ath9k_hw_getcapability(ah, ATH9K_CAP_TXPOW, 1, &txpow);
64 static u8 parse_mpdudensity(u8 mpdudensity)
67 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
68 * 0 for no restriction
77 switch (mpdudensity) {
83 /* Our lower layer calculations limit our precision to
99 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
100 struct ieee80211_hw *hw)
102 struct ieee80211_channel *curchan = hw->conf.channel;
103 struct ath9k_channel *channel;
106 chan_idx = curchan->hw_value;
107 channel = &sc->sc_ah->channels[chan_idx];
108 ath9k_update_ichannel(sc, hw, channel);
112 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
117 spin_lock_irqsave(&sc->sc_pm_lock, flags);
118 ret = ath9k_hw_setpower(sc->sc_ah, mode);
119 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
124 void ath9k_ps_wakeup(struct ath_softc *sc)
128 spin_lock_irqsave(&sc->sc_pm_lock, flags);
129 if (++sc->ps_usecount != 1)
132 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
135 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
138 void ath9k_ps_restore(struct ath_softc *sc)
142 spin_lock_irqsave(&sc->sc_pm_lock, flags);
143 if (--sc->ps_usecount != 0)
147 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
148 else if (sc->ps_enabled &&
149 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
151 PS_WAIT_FOR_PSPOLL_DATA |
152 PS_WAIT_FOR_TX_ACK)))
153 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
156 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
160 * Set/change channels. If the channel is really being changed, it's done
161 * by reseting the chip. To accomplish this we must first cleanup any pending
162 * DMA, then restart stuff.
164 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
165 struct ath9k_channel *hchan)
167 struct ath_hw *ah = sc->sc_ah;
168 struct ath_common *common = ath9k_hw_common(ah);
169 struct ieee80211_conf *conf = &common->hw->conf;
170 bool fastcc = true, stopped;
171 struct ieee80211_channel *channel = hw->conf.channel;
174 if (sc->sc_flags & SC_OP_INVALID)
180 * This is only performed if the channel settings have
183 * To switch channels clear any pending DMA operations;
184 * wait long enough for the RX fifo to drain, reset the
185 * hardware at the new frequency, and then re-enable
186 * the relevant bits of the h/w.
188 ath9k_hw_set_interrupts(ah, 0);
189 ath_drain_all_txq(sc, false);
190 stopped = ath_stoprecv(sc);
192 /* XXX: do not flush receive queue here. We don't want
193 * to flush data frames already in queue because of
194 * changing channel. */
196 if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
199 ath_print(common, ATH_DBG_CONFIG,
200 "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
201 sc->sc_ah->curchan->channel,
202 channel->center_freq, conf_is_ht40(conf));
204 spin_lock_bh(&sc->sc_resetlock);
206 r = ath9k_hw_reset(ah, hchan, fastcc);
208 ath_print(common, ATH_DBG_FATAL,
209 "Unable to reset channel (%u MHz), "
211 channel->center_freq, r);
212 spin_unlock_bh(&sc->sc_resetlock);
215 spin_unlock_bh(&sc->sc_resetlock);
217 sc->sc_flags &= ~SC_OP_FULL_RESET;
219 if (ath_startrecv(sc) != 0) {
220 ath_print(common, ATH_DBG_FATAL,
221 "Unable to restart recv logic\n");
226 ath_cache_conf_rate(sc, &hw->conf);
227 ath_update_txpow(sc);
228 ath9k_hw_set_interrupts(ah, sc->imask);
231 ath9k_ps_restore(sc);
236 * This routine performs the periodic noise floor calibration function
237 * that is used to adjust and optimize the chip performance. This
238 * takes environmental changes (location, temperature) into account.
239 * When the task is complete, it reschedules itself depending on the
240 * appropriate interval that was calculated.
242 void ath_ani_calibrate(unsigned long data)
244 struct ath_softc *sc = (struct ath_softc *)data;
245 struct ath_hw *ah = sc->sc_ah;
246 struct ath_common *common = ath9k_hw_common(ah);
247 bool longcal = false;
248 bool shortcal = false;
249 bool aniflag = false;
250 unsigned int timestamp = jiffies_to_msecs(jiffies);
251 u32 cal_interval, short_cal_interval;
253 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
254 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
256 /* Only calibrate if awake */
257 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
262 /* Long calibration runs independently of short calibration. */
263 if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
265 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
266 common->ani.longcal_timer = timestamp;
269 /* Short calibration applies only while caldone is false */
270 if (!common->ani.caldone) {
271 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
273 ath_print(common, ATH_DBG_ANI,
274 "shortcal @%lu\n", jiffies);
275 common->ani.shortcal_timer = timestamp;
276 common->ani.resetcal_timer = timestamp;
279 if ((timestamp - common->ani.resetcal_timer) >=
280 ATH_RESTART_CALINTERVAL) {
281 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
282 if (common->ani.caldone)
283 common->ani.resetcal_timer = timestamp;
287 /* Verify whether we must check ANI */
288 if ((timestamp - common->ani.checkani_timer) >= ATH_ANI_POLLINTERVAL) {
290 common->ani.checkani_timer = timestamp;
293 /* Skip all processing if there's nothing to do. */
294 if (longcal || shortcal || aniflag) {
295 /* Call ANI routine if necessary */
297 ath9k_hw_ani_monitor(ah, ah->curchan);
299 /* Perform calibration if necessary */
300 if (longcal || shortcal) {
301 common->ani.caldone =
302 ath9k_hw_calibrate(ah,
304 common->rx_chainmask,
308 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
311 ath_print(common, ATH_DBG_ANI,
312 " calibrate chan %u/%x nf: %d\n",
313 ah->curchan->channel,
314 ah->curchan->channelFlags,
315 common->ani.noise_floor);
319 ath9k_ps_restore(sc);
323 * Set timer interval based on previous results.
324 * The interval must be the shortest necessary to satisfy ANI,
325 * short calibration and long calibration.
327 cal_interval = ATH_LONG_CALINTERVAL;
328 if (sc->sc_ah->config.enable_ani)
329 cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL);
330 if (!common->ani.caldone)
331 cal_interval = min(cal_interval, (u32)short_cal_interval);
333 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
336 static void ath_start_ani(struct ath_common *common)
338 unsigned long timestamp = jiffies_to_msecs(jiffies);
340 common->ani.longcal_timer = timestamp;
341 common->ani.shortcal_timer = timestamp;
342 common->ani.checkani_timer = timestamp;
344 mod_timer(&common->ani.timer,
345 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
349 * Update tx/rx chainmask. For legacy association,
350 * hard code chainmask to 1x1, for 11n association, use
351 * the chainmask configuration, for bt coexistence, use
352 * the chainmask configuration even in legacy mode.
354 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
356 struct ath_hw *ah = sc->sc_ah;
357 struct ath_common *common = ath9k_hw_common(ah);
359 if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
360 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
361 common->tx_chainmask = ah->caps.tx_chainmask;
362 common->rx_chainmask = ah->caps.rx_chainmask;
364 common->tx_chainmask = 1;
365 common->rx_chainmask = 1;
368 ath_print(common, ATH_DBG_CONFIG,
369 "tx chmask: %d, rx chmask: %d\n",
370 common->tx_chainmask,
371 common->rx_chainmask);
374 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
378 an = (struct ath_node *)sta->drv_priv;
380 if (sc->sc_flags & SC_OP_TXAGGR) {
381 ath_tx_node_init(sc, an);
382 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
383 sta->ht_cap.ampdu_factor);
384 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
385 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
389 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
391 struct ath_node *an = (struct ath_node *)sta->drv_priv;
393 if (sc->sc_flags & SC_OP_TXAGGR)
394 ath_tx_node_cleanup(sc, an);
397 void ath9k_tasklet(unsigned long data)
399 struct ath_softc *sc = (struct ath_softc *)data;
400 struct ath_hw *ah = sc->sc_ah;
401 struct ath_common *common = ath9k_hw_common(ah);
403 u32 status = sc->intrstatus;
407 if (status & ATH9K_INT_FATAL) {
408 ath_reset(sc, false);
409 ath9k_ps_restore(sc);
413 if (status & (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN)) {
414 spin_lock_bh(&sc->rx.rxflushlock);
415 ath_rx_tasklet(sc, 0);
416 spin_unlock_bh(&sc->rx.rxflushlock);
419 if (status & ATH9K_INT_TX)
422 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
424 * TSF sync does not look correct; remain awake to sync with
427 ath_print(common, ATH_DBG_PS,
428 "TSFOOR - Sync with next Beacon\n");
429 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
432 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
433 if (status & ATH9K_INT_GENTIMER)
434 ath_gen_timer_isr(sc->sc_ah);
436 /* re-enable hardware interrupt */
437 ath9k_hw_set_interrupts(ah, sc->imask);
438 ath9k_ps_restore(sc);
441 irqreturn_t ath_isr(int irq, void *dev)
443 #define SCHED_INTR ( \
454 struct ath_softc *sc = dev;
455 struct ath_hw *ah = sc->sc_ah;
456 enum ath9k_int status;
460 * The hardware is not ready/present, don't
461 * touch anything. Note this can happen early
462 * on if the IRQ is shared.
464 if (sc->sc_flags & SC_OP_INVALID)
468 /* shared irq, not for us */
470 if (!ath9k_hw_intrpend(ah))
474 * Figure out the reason(s) for the interrupt. Note
475 * that the hal returns a pseudo-ISR that may include
476 * bits we haven't explicitly enabled so we mask the
477 * value to insure we only process bits we requested.
479 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
480 status &= sc->imask; /* discard unasked-for bits */
483 * If there are no status bits set, then this interrupt was not
484 * for me (should have been caught above).
489 /* Cache the status */
490 sc->intrstatus = status;
492 if (status & SCHED_INTR)
496 * If a FATAL or RXORN interrupt is received, we have to reset the
499 if (status & (ATH9K_INT_FATAL | ATH9K_INT_RXORN))
502 if (status & ATH9K_INT_SWBA)
503 tasklet_schedule(&sc->bcon_tasklet);
505 if (status & ATH9K_INT_TXURN)
506 ath9k_hw_updatetxtriglevel(ah, true);
508 if (status & ATH9K_INT_MIB) {
510 * Disable interrupts until we service the MIB
511 * interrupt; otherwise it will continue to
514 ath9k_hw_set_interrupts(ah, 0);
516 * Let the hal handle the event. We assume
517 * it will clear whatever condition caused
520 ath9k_hw_procmibevent(ah);
521 ath9k_hw_set_interrupts(ah, sc->imask);
524 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
525 if (status & ATH9K_INT_TIM_TIMER) {
526 /* Clear RxAbort bit so that we can
528 ath9k_setpower(sc, ATH9K_PM_AWAKE);
529 ath9k_hw_setrxabort(sc->sc_ah, 0);
530 sc->ps_flags |= PS_WAIT_FOR_BEACON;
535 ath_debug_stat_interrupt(sc, status);
538 /* turn off every interrupt except SWBA */
539 ath9k_hw_set_interrupts(ah, (sc->imask & ATH9K_INT_SWBA));
540 tasklet_schedule(&sc->intr_tq);
548 static u32 ath_get_extchanmode(struct ath_softc *sc,
549 struct ieee80211_channel *chan,
550 enum nl80211_channel_type channel_type)
554 switch (chan->band) {
555 case IEEE80211_BAND_2GHZ:
556 switch(channel_type) {
557 case NL80211_CHAN_NO_HT:
558 case NL80211_CHAN_HT20:
559 chanmode = CHANNEL_G_HT20;
561 case NL80211_CHAN_HT40PLUS:
562 chanmode = CHANNEL_G_HT40PLUS;
564 case NL80211_CHAN_HT40MINUS:
565 chanmode = CHANNEL_G_HT40MINUS;
569 case IEEE80211_BAND_5GHZ:
570 switch(channel_type) {
571 case NL80211_CHAN_NO_HT:
572 case NL80211_CHAN_HT20:
573 chanmode = CHANNEL_A_HT20;
575 case NL80211_CHAN_HT40PLUS:
576 chanmode = CHANNEL_A_HT40PLUS;
578 case NL80211_CHAN_HT40MINUS:
579 chanmode = CHANNEL_A_HT40MINUS;
590 static int ath_setkey_tkip(struct ath_common *common, u16 keyix, const u8 *key,
591 struct ath9k_keyval *hk, const u8 *addr,
594 struct ath_hw *ah = common->ah;
598 key_txmic = key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
599 key_rxmic = key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
603 * Group key installation - only two key cache entries are used
604 * regardless of splitmic capability since group key is only
605 * used either for TX or RX.
608 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
609 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_mic));
611 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
612 memcpy(hk->kv_txmic, key_rxmic, sizeof(hk->kv_mic));
614 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
616 if (!common->splitmic) {
617 /* TX and RX keys share the same key cache entry. */
618 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
619 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
620 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
623 /* Separate key cache entries for TX and RX */
625 /* TX key goes at first index, RX key at +32. */
626 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
627 if (!ath9k_hw_set_keycache_entry(ah, keyix, hk, NULL)) {
628 /* TX MIC entry failed. No need to proceed further */
629 ath_print(common, ATH_DBG_FATAL,
630 "Setting TX MIC Key Failed\n");
634 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
635 /* XXX delete tx key on failure? */
636 return ath9k_hw_set_keycache_entry(ah, keyix + 32, hk, addr);
639 static int ath_reserve_key_cache_slot_tkip(struct ath_common *common)
643 for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
644 if (test_bit(i, common->keymap) ||
645 test_bit(i + 64, common->keymap))
646 continue; /* At least one part of TKIP key allocated */
647 if (common->splitmic &&
648 (test_bit(i + 32, common->keymap) ||
649 test_bit(i + 64 + 32, common->keymap)))
650 continue; /* At least one part of TKIP key allocated */
652 /* Found a free slot for a TKIP key */
658 static int ath_reserve_key_cache_slot(struct ath_common *common)
662 /* First, try to find slots that would not be available for TKIP. */
663 if (common->splitmic) {
664 for (i = IEEE80211_WEP_NKID; i < common->keymax / 4; i++) {
665 if (!test_bit(i, common->keymap) &&
666 (test_bit(i + 32, common->keymap) ||
667 test_bit(i + 64, common->keymap) ||
668 test_bit(i + 64 + 32, common->keymap)))
670 if (!test_bit(i + 32, common->keymap) &&
671 (test_bit(i, common->keymap) ||
672 test_bit(i + 64, common->keymap) ||
673 test_bit(i + 64 + 32, common->keymap)))
675 if (!test_bit(i + 64, common->keymap) &&
676 (test_bit(i , common->keymap) ||
677 test_bit(i + 32, common->keymap) ||
678 test_bit(i + 64 + 32, common->keymap)))
680 if (!test_bit(i + 64 + 32, common->keymap) &&
681 (test_bit(i, common->keymap) ||
682 test_bit(i + 32, common->keymap) ||
683 test_bit(i + 64, common->keymap)))
687 for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
688 if (!test_bit(i, common->keymap) &&
689 test_bit(i + 64, common->keymap))
691 if (test_bit(i, common->keymap) &&
692 !test_bit(i + 64, common->keymap))
697 /* No partially used TKIP slots, pick any available slot */
698 for (i = IEEE80211_WEP_NKID; i < common->keymax; i++) {
699 /* Do not allow slots that could be needed for TKIP group keys
700 * to be used. This limitation could be removed if we know that
701 * TKIP will not be used. */
702 if (i >= 64 && i < 64 + IEEE80211_WEP_NKID)
704 if (common->splitmic) {
705 if (i >= 32 && i < 32 + IEEE80211_WEP_NKID)
707 if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID)
711 if (!test_bit(i, common->keymap))
712 return i; /* Found a free slot for a key */
715 /* No free slot found */
719 static int ath_key_config(struct ath_common *common,
720 struct ieee80211_vif *vif,
721 struct ieee80211_sta *sta,
722 struct ieee80211_key_conf *key)
724 struct ath_hw *ah = common->ah;
725 struct ath9k_keyval hk;
726 const u8 *mac = NULL;
730 memset(&hk, 0, sizeof(hk));
734 hk.kv_type = ATH9K_CIPHER_WEP;
737 hk.kv_type = ATH9K_CIPHER_TKIP;
740 hk.kv_type = ATH9K_CIPHER_AES_CCM;
746 hk.kv_len = key->keylen;
747 memcpy(hk.kv_val, key->key, key->keylen);
749 if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
750 /* For now, use the default keys for broadcast keys. This may
751 * need to change with virtual interfaces. */
753 } else if (key->keyidx) {
758 if (vif->type != NL80211_IFTYPE_AP) {
759 /* Only keyidx 0 should be used with unicast key, but
760 * allow this for client mode for now. */
769 if (key->alg == ALG_TKIP)
770 idx = ath_reserve_key_cache_slot_tkip(common);
772 idx = ath_reserve_key_cache_slot(common);
774 return -ENOSPC; /* no free key cache entries */
777 if (key->alg == ALG_TKIP)
778 ret = ath_setkey_tkip(common, idx, key->key, &hk, mac,
779 vif->type == NL80211_IFTYPE_AP);
781 ret = ath9k_hw_set_keycache_entry(ah, idx, &hk, mac);
786 set_bit(idx, common->keymap);
787 if (key->alg == ALG_TKIP) {
788 set_bit(idx + 64, common->keymap);
789 if (common->splitmic) {
790 set_bit(idx + 32, common->keymap);
791 set_bit(idx + 64 + 32, common->keymap);
798 static void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key)
800 struct ath_hw *ah = common->ah;
802 ath9k_hw_keyreset(ah, key->hw_key_idx);
803 if (key->hw_key_idx < IEEE80211_WEP_NKID)
806 clear_bit(key->hw_key_idx, common->keymap);
807 if (key->alg != ALG_TKIP)
810 clear_bit(key->hw_key_idx + 64, common->keymap);
811 if (common->splitmic) {
812 ath9k_hw_keyreset(ah, key->hw_key_idx + 32);
813 clear_bit(key->hw_key_idx + 32, common->keymap);
814 clear_bit(key->hw_key_idx + 64 + 32, common->keymap);
818 static void ath9k_bss_assoc_info(struct ath_softc *sc,
819 struct ieee80211_vif *vif,
820 struct ieee80211_bss_conf *bss_conf)
822 struct ath_hw *ah = sc->sc_ah;
823 struct ath_common *common = ath9k_hw_common(ah);
825 if (bss_conf->assoc) {
826 ath_print(common, ATH_DBG_CONFIG,
827 "Bss Info ASSOC %d, bssid: %pM\n",
828 bss_conf->aid, common->curbssid);
830 /* New association, store aid */
831 common->curaid = bss_conf->aid;
832 ath9k_hw_write_associd(ah);
835 * Request a re-configuration of Beacon related timers
836 * on the receipt of the first Beacon frame (i.e.,
837 * after time sync with the AP).
839 sc->ps_flags |= PS_BEACON_SYNC;
841 /* Configure the beacon */
842 ath_beacon_config(sc, vif);
844 /* Reset rssi stats */
845 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
847 ath_start_ani(common);
849 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
852 del_timer_sync(&common->ani.timer);
856 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
858 struct ath_hw *ah = sc->sc_ah;
859 struct ath_common *common = ath9k_hw_common(ah);
860 struct ieee80211_channel *channel = hw->conf.channel;
864 ath9k_hw_configpcipowersave(ah, 0, 0);
867 ah->curchan = ath_get_curchannel(sc, sc->hw);
869 spin_lock_bh(&sc->sc_resetlock);
870 r = ath9k_hw_reset(ah, ah->curchan, false);
872 ath_print(common, ATH_DBG_FATAL,
873 "Unable to reset channel (%u MHz), "
875 channel->center_freq, r);
877 spin_unlock_bh(&sc->sc_resetlock);
879 ath_update_txpow(sc);
880 if (ath_startrecv(sc) != 0) {
881 ath_print(common, ATH_DBG_FATAL,
882 "Unable to restart recv logic\n");
886 if (sc->sc_flags & SC_OP_BEACONS)
887 ath_beacon_config(sc, NULL); /* restart beacons */
889 /* Re-Enable interrupts */
890 ath9k_hw_set_interrupts(ah, sc->imask);
893 ath9k_hw_cfg_output(ah, ah->led_pin,
894 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
895 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
897 ieee80211_wake_queues(hw);
898 ath9k_ps_restore(sc);
901 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
903 struct ath_hw *ah = sc->sc_ah;
904 struct ieee80211_channel *channel = hw->conf.channel;
908 ieee80211_stop_queues(hw);
911 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
912 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
914 /* Disable interrupts */
915 ath9k_hw_set_interrupts(ah, 0);
917 ath_drain_all_txq(sc, false); /* clear pending tx frames */
918 ath_stoprecv(sc); /* turn off frame recv */
919 ath_flushrecv(sc); /* flush recv queue */
922 ah->curchan = ath_get_curchannel(sc, hw);
924 spin_lock_bh(&sc->sc_resetlock);
925 r = ath9k_hw_reset(ah, ah->curchan, false);
927 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
928 "Unable to reset channel (%u MHz), "
930 channel->center_freq, r);
932 spin_unlock_bh(&sc->sc_resetlock);
934 ath9k_hw_phy_disable(ah);
935 ath9k_hw_configpcipowersave(ah, 1, 1);
936 ath9k_ps_restore(sc);
937 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
940 int ath_reset(struct ath_softc *sc, bool retry_tx)
942 struct ath_hw *ah = sc->sc_ah;
943 struct ath_common *common = ath9k_hw_common(ah);
944 struct ieee80211_hw *hw = sc->hw;
948 del_timer_sync(&common->ani.timer);
950 ieee80211_stop_queues(hw);
952 ath9k_hw_set_interrupts(ah, 0);
953 ath_drain_all_txq(sc, retry_tx);
957 spin_lock_bh(&sc->sc_resetlock);
958 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
960 ath_print(common, ATH_DBG_FATAL,
961 "Unable to reset hardware; reset status %d\n", r);
962 spin_unlock_bh(&sc->sc_resetlock);
964 if (ath_startrecv(sc) != 0)
965 ath_print(common, ATH_DBG_FATAL,
966 "Unable to start recv logic\n");
969 * We may be doing a reset in response to a request
970 * that changes the channel so update any state that
971 * might change as a result.
973 ath_cache_conf_rate(sc, &hw->conf);
975 ath_update_txpow(sc);
977 if (sc->sc_flags & SC_OP_BEACONS)
978 ath_beacon_config(sc, NULL); /* restart beacons */
980 ath9k_hw_set_interrupts(ah, sc->imask);
984 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
985 if (ATH_TXQ_SETUP(sc, i)) {
986 spin_lock_bh(&sc->tx.txq[i].axq_lock);
987 ath_txq_schedule(sc, &sc->tx.txq[i]);
988 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
993 ieee80211_wake_queues(hw);
996 ath_start_ani(common);
1001 int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1007 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VO];
1010 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VI];
1013 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
1016 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BK];
1019 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
1026 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1031 case ATH9K_WME_AC_VO:
1034 case ATH9K_WME_AC_VI:
1037 case ATH9K_WME_AC_BE:
1040 case ATH9K_WME_AC_BK:
1051 /* XXX: Remove me once we don't depend on ath9k_channel for all
1052 * this redundant data */
1053 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1054 struct ath9k_channel *ichan)
1056 struct ieee80211_channel *chan = hw->conf.channel;
1057 struct ieee80211_conf *conf = &hw->conf;
1059 ichan->channel = chan->center_freq;
1062 if (chan->band == IEEE80211_BAND_2GHZ) {
1063 ichan->chanmode = CHANNEL_G;
1064 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1066 ichan->chanmode = CHANNEL_A;
1067 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1070 if (conf_is_ht(conf))
1071 ichan->chanmode = ath_get_extchanmode(sc, chan,
1072 conf->channel_type);
1075 /**********************/
1076 /* mac80211 callbacks */
1077 /**********************/
1079 static int ath9k_start(struct ieee80211_hw *hw)
1081 struct ath_wiphy *aphy = hw->priv;
1082 struct ath_softc *sc = aphy->sc;
1083 struct ath_hw *ah = sc->sc_ah;
1084 struct ath_common *common = ath9k_hw_common(ah);
1085 struct ieee80211_channel *curchan = hw->conf.channel;
1086 struct ath9k_channel *init_channel;
1089 ath_print(common, ATH_DBG_CONFIG,
1090 "Starting driver with initial channel: %d MHz\n",
1091 curchan->center_freq);
1093 mutex_lock(&sc->mutex);
1095 if (ath9k_wiphy_started(sc)) {
1096 if (sc->chan_idx == curchan->hw_value) {
1098 * Already on the operational channel, the new wiphy
1099 * can be marked active.
1101 aphy->state = ATH_WIPHY_ACTIVE;
1102 ieee80211_wake_queues(hw);
1105 * Another wiphy is on another channel, start the new
1106 * wiphy in paused state.
1108 aphy->state = ATH_WIPHY_PAUSED;
1109 ieee80211_stop_queues(hw);
1111 mutex_unlock(&sc->mutex);
1114 aphy->state = ATH_WIPHY_ACTIVE;
1116 /* setup initial channel */
1118 sc->chan_idx = curchan->hw_value;
1120 init_channel = ath_get_curchannel(sc, hw);
1122 /* Reset SERDES registers */
1123 ath9k_hw_configpcipowersave(ah, 0, 0);
1126 * The basic interface to setting the hardware in a good
1127 * state is ``reset''. On return the hardware is known to
1128 * be powered up and with interrupts disabled. This must
1129 * be followed by initialization of the appropriate bits
1130 * and then setup of the interrupt mask.
1132 spin_lock_bh(&sc->sc_resetlock);
1133 r = ath9k_hw_reset(ah, init_channel, false);
1135 ath_print(common, ATH_DBG_FATAL,
1136 "Unable to reset hardware; reset status %d "
1137 "(freq %u MHz)\n", r,
1138 curchan->center_freq);
1139 spin_unlock_bh(&sc->sc_resetlock);
1142 spin_unlock_bh(&sc->sc_resetlock);
1145 * This is needed only to setup initial state
1146 * but it's best done after a reset.
1148 ath_update_txpow(sc);
1151 * Setup the hardware after reset:
1152 * The receive engine is set going.
1153 * Frame transmit is handled entirely
1154 * in the frame output path; there's nothing to do
1155 * here except setup the interrupt mask.
1157 if (ath_startrecv(sc) != 0) {
1158 ath_print(common, ATH_DBG_FATAL,
1159 "Unable to start recv logic\n");
1164 /* Setup our intr mask. */
1165 sc->imask = ATH9K_INT_RX | ATH9K_INT_TX
1166 | ATH9K_INT_RXEOL | ATH9K_INT_RXORN
1167 | ATH9K_INT_FATAL | ATH9K_INT_GLOBAL;
1169 if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
1170 sc->imask |= ATH9K_INT_GTT;
1172 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1173 sc->imask |= ATH9K_INT_CST;
1175 ath_cache_conf_rate(sc, &hw->conf);
1177 sc->sc_flags &= ~SC_OP_INVALID;
1179 /* Disable BMISS interrupt when we're not associated */
1180 sc->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1181 ath9k_hw_set_interrupts(ah, sc->imask);
1183 ieee80211_wake_queues(hw);
1185 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1187 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1188 !ah->btcoex_hw.enabled) {
1189 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1190 AR_STOMP_LOW_WLAN_WGHT);
1191 ath9k_hw_btcoex_enable(ah);
1193 if (common->bus_ops->bt_coex_prep)
1194 common->bus_ops->bt_coex_prep(common);
1195 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1196 ath9k_btcoex_timer_resume(sc);
1200 mutex_unlock(&sc->mutex);
1205 static int ath9k_tx(struct ieee80211_hw *hw,
1206 struct sk_buff *skb)
1208 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1209 struct ath_wiphy *aphy = hw->priv;
1210 struct ath_softc *sc = aphy->sc;
1211 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1212 struct ath_tx_control txctl;
1213 int padpos, padsize;
1214 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1216 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1217 ath_print(common, ATH_DBG_XMIT,
1218 "ath9k: %s: TX in unexpected wiphy state "
1219 "%d\n", wiphy_name(hw->wiphy), aphy->state);
1223 if (sc->ps_enabled) {
1225 * mac80211 does not set PM field for normal data frames, so we
1226 * need to update that based on the current PS mode.
1228 if (ieee80211_is_data(hdr->frame_control) &&
1229 !ieee80211_is_nullfunc(hdr->frame_control) &&
1230 !ieee80211_has_pm(hdr->frame_control)) {
1231 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1232 "while in PS mode\n");
1233 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1237 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1239 * We are using PS-Poll and mac80211 can request TX while in
1240 * power save mode. Need to wake up hardware for the TX to be
1241 * completed and if needed, also for RX of buffered frames.
1243 ath9k_ps_wakeup(sc);
1244 ath9k_hw_setrxabort(sc->sc_ah, 0);
1245 if (ieee80211_is_pspoll(hdr->frame_control)) {
1246 ath_print(common, ATH_DBG_PS,
1247 "Sending PS-Poll to pick a buffered frame\n");
1248 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1250 ath_print(common, ATH_DBG_PS,
1251 "Wake up to complete TX\n");
1252 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1255 * The actual restore operation will happen only after
1256 * the sc_flags bit is cleared. We are just dropping
1257 * the ps_usecount here.
1259 ath9k_ps_restore(sc);
1262 memset(&txctl, 0, sizeof(struct ath_tx_control));
1265 * As a temporary workaround, assign seq# here; this will likely need
1266 * to be cleaned up to work better with Beacon transmission and virtual
1269 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1270 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1271 sc->tx.seq_no += 0x10;
1272 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1273 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1276 /* Add the padding after the header if this is not already done */
1277 padpos = ath9k_cmn_padpos(hdr->frame_control);
1278 padsize = padpos & 3;
1279 if (padsize && skb->len>padpos) {
1280 if (skb_headroom(skb) < padsize)
1282 skb_push(skb, padsize);
1283 memmove(skb->data, skb->data + padsize, padpos);
1286 /* Check if a tx queue is available */
1288 txctl.txq = ath_test_get_txq(sc, skb);
1292 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1294 if (ath_tx_start(hw, skb, &txctl) != 0) {
1295 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1301 dev_kfree_skb_any(skb);
1305 static void ath9k_stop(struct ieee80211_hw *hw)
1307 struct ath_wiphy *aphy = hw->priv;
1308 struct ath_softc *sc = aphy->sc;
1309 struct ath_hw *ah = sc->sc_ah;
1310 struct ath_common *common = ath9k_hw_common(ah);
1312 mutex_lock(&sc->mutex);
1314 aphy->state = ATH_WIPHY_INACTIVE;
1316 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1317 cancel_delayed_work_sync(&sc->tx_complete_work);
1319 if (!sc->num_sec_wiphy) {
1320 cancel_delayed_work_sync(&sc->wiphy_work);
1321 cancel_work_sync(&sc->chan_work);
1324 if (sc->sc_flags & SC_OP_INVALID) {
1325 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1326 mutex_unlock(&sc->mutex);
1330 if (ath9k_wiphy_started(sc)) {
1331 mutex_unlock(&sc->mutex);
1332 return; /* another wiphy still in use */
1335 /* Ensure HW is awake when we try to shut it down. */
1336 ath9k_ps_wakeup(sc);
1338 if (ah->btcoex_hw.enabled) {
1339 ath9k_hw_btcoex_disable(ah);
1340 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1341 ath9k_btcoex_timer_pause(sc);
1344 /* make sure h/w will not generate any interrupt
1345 * before setting the invalid flag. */
1346 ath9k_hw_set_interrupts(ah, 0);
1348 if (!(sc->sc_flags & SC_OP_INVALID)) {
1349 ath_drain_all_txq(sc, false);
1351 ath9k_hw_phy_disable(ah);
1353 sc->rx.rxlink = NULL;
1355 /* disable HAL and put h/w to sleep */
1356 ath9k_hw_disable(ah);
1357 ath9k_hw_configpcipowersave(ah, 1, 1);
1358 ath9k_ps_restore(sc);
1360 /* Finally, put the chip in FULL SLEEP mode */
1361 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1363 sc->sc_flags |= SC_OP_INVALID;
1365 mutex_unlock(&sc->mutex);
1367 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1370 static int ath9k_add_interface(struct ieee80211_hw *hw,
1371 struct ieee80211_vif *vif)
1373 struct ath_wiphy *aphy = hw->priv;
1374 struct ath_softc *sc = aphy->sc;
1375 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1376 struct ath_vif *avp = (void *)vif->drv_priv;
1377 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1380 mutex_lock(&sc->mutex);
1382 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1388 switch (vif->type) {
1389 case NL80211_IFTYPE_STATION:
1390 ic_opmode = NL80211_IFTYPE_STATION;
1392 case NL80211_IFTYPE_ADHOC:
1393 case NL80211_IFTYPE_AP:
1394 case NL80211_IFTYPE_MESH_POINT:
1395 if (sc->nbcnvifs >= ATH_BCBUF) {
1399 ic_opmode = vif->type;
1402 ath_print(common, ATH_DBG_FATAL,
1403 "Interface type %d not yet supported\n", vif->type);
1408 ath_print(common, ATH_DBG_CONFIG,
1409 "Attach a VIF of type: %d\n", ic_opmode);
1411 /* Set the VIF opmode */
1412 avp->av_opmode = ic_opmode;
1417 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1418 ath9k_set_bssid_mask(hw);
1421 goto out; /* skip global settings for secondary vif */
1423 if (ic_opmode == NL80211_IFTYPE_AP) {
1424 ath9k_hw_set_tsfadjust(sc->sc_ah, 1);
1425 sc->sc_flags |= SC_OP_TSF_RESET;
1428 /* Set the device opmode */
1429 sc->sc_ah->opmode = ic_opmode;
1432 * Enable MIB interrupts when there are hardware phy counters.
1433 * Note we only do this (at the moment) for station mode.
1435 if ((vif->type == NL80211_IFTYPE_STATION) ||
1436 (vif->type == NL80211_IFTYPE_ADHOC) ||
1437 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1438 sc->imask |= ATH9K_INT_MIB;
1439 sc->imask |= ATH9K_INT_TSFOOR;
1442 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
1444 if (vif->type == NL80211_IFTYPE_AP ||
1445 vif->type == NL80211_IFTYPE_ADHOC ||
1446 vif->type == NL80211_IFTYPE_MONITOR)
1447 ath_start_ani(common);
1450 mutex_unlock(&sc->mutex);
1454 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1455 struct ieee80211_vif *vif)
1457 struct ath_wiphy *aphy = hw->priv;
1458 struct ath_softc *sc = aphy->sc;
1459 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1460 struct ath_vif *avp = (void *)vif->drv_priv;
1463 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1465 mutex_lock(&sc->mutex);
1468 del_timer_sync(&common->ani.timer);
1470 /* Reclaim beacon resources */
1471 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1472 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1473 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1474 ath9k_ps_wakeup(sc);
1475 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1476 ath9k_ps_restore(sc);
1479 ath_beacon_return(sc, avp);
1480 sc->sc_flags &= ~SC_OP_BEACONS;
1482 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1483 if (sc->beacon.bslot[i] == vif) {
1484 printk(KERN_DEBUG "%s: vif had allocated beacon "
1485 "slot\n", __func__);
1486 sc->beacon.bslot[i] = NULL;
1487 sc->beacon.bslot_aphy[i] = NULL;
1493 mutex_unlock(&sc->mutex);
1496 void ath9k_enable_ps(struct ath_softc *sc)
1498 sc->ps_enabled = true;
1499 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1500 if ((sc->imask & ATH9K_INT_TIM_TIMER) == 0) {
1501 sc->imask |= ATH9K_INT_TIM_TIMER;
1502 ath9k_hw_set_interrupts(sc->sc_ah,
1506 ath9k_hw_setrxabort(sc->sc_ah, 1);
1509 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1511 struct ath_wiphy *aphy = hw->priv;
1512 struct ath_softc *sc = aphy->sc;
1513 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1514 struct ieee80211_conf *conf = &hw->conf;
1515 struct ath_hw *ah = sc->sc_ah;
1518 mutex_lock(&sc->mutex);
1521 * Leave this as the first check because we need to turn on the
1522 * radio if it was disabled before prior to processing the rest
1523 * of the changes. Likewise we must only disable the radio towards
1526 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1528 bool all_wiphys_idle;
1529 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1531 spin_lock_bh(&sc->wiphy_lock);
1532 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1533 ath9k_set_wiphy_idle(aphy, idle);
1535 enable_radio = (!idle && all_wiphys_idle);
1538 * After we unlock here its possible another wiphy
1539 * can be re-renabled so to account for that we will
1540 * only disable the radio toward the end of this routine
1541 * if by then all wiphys are still idle.
1543 spin_unlock_bh(&sc->wiphy_lock);
1546 sc->ps_idle = false;
1547 ath_radio_enable(sc, hw);
1548 ath_print(common, ATH_DBG_CONFIG,
1549 "not-idle: enabling radio\n");
1554 * We just prepare to enable PS. We have to wait until our AP has
1555 * ACK'd our null data frame to disable RX otherwise we'll ignore
1556 * those ACKs and end up retransmitting the same null data frames.
1557 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1559 if (changed & IEEE80211_CONF_CHANGE_PS) {
1560 if (conf->flags & IEEE80211_CONF_PS) {
1561 sc->ps_flags |= PS_ENABLED;
1563 * At this point we know hardware has received an ACK
1564 * of a previously sent null data frame.
1566 if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1567 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1568 ath9k_enable_ps(sc);
1571 sc->ps_enabled = false;
1572 sc->ps_flags &= ~(PS_ENABLED |
1573 PS_NULLFUNC_COMPLETED);
1574 ath9k_setpower(sc, ATH9K_PM_AWAKE);
1575 if (!(ah->caps.hw_caps &
1576 ATH9K_HW_CAP_AUTOSLEEP)) {
1577 ath9k_hw_setrxabort(sc->sc_ah, 0);
1578 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1580 PS_WAIT_FOR_PSPOLL_DATA |
1581 PS_WAIT_FOR_TX_ACK);
1582 if (sc->imask & ATH9K_INT_TIM_TIMER) {
1583 sc->imask &= ~ATH9K_INT_TIM_TIMER;
1584 ath9k_hw_set_interrupts(sc->sc_ah,
1591 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1592 if (conf->flags & IEEE80211_CONF_MONITOR) {
1593 ath_print(common, ATH_DBG_CONFIG,
1594 "HW opmode set to Monitor mode\n");
1595 sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1599 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1600 struct ieee80211_channel *curchan = hw->conf.channel;
1601 int pos = curchan->hw_value;
1603 aphy->chan_idx = pos;
1604 aphy->chan_is_ht = conf_is_ht(conf);
1606 if (aphy->state == ATH_WIPHY_SCAN ||
1607 aphy->state == ATH_WIPHY_ACTIVE)
1608 ath9k_wiphy_pause_all_forced(sc, aphy);
1611 * Do not change operational channel based on a paused
1614 goto skip_chan_change;
1617 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1618 curchan->center_freq);
1620 /* XXX: remove me eventualy */
1621 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1623 ath_update_chainmask(sc, conf_is_ht(conf));
1625 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1626 ath_print(common, ATH_DBG_FATAL,
1627 "Unable to set channel\n");
1628 mutex_unlock(&sc->mutex);
1634 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1635 sc->config.txpowlimit = 2 * conf->power_level;
1636 ath_update_txpow(sc);
1639 spin_lock_bh(&sc->wiphy_lock);
1640 disable_radio = ath9k_all_wiphys_idle(sc);
1641 spin_unlock_bh(&sc->wiphy_lock);
1643 if (disable_radio) {
1644 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1646 ath_radio_disable(sc, hw);
1649 mutex_unlock(&sc->mutex);
1654 #define SUPPORTED_FILTERS \
1655 (FIF_PROMISC_IN_BSS | \
1660 FIF_BCN_PRBRESP_PROMISC | \
1663 /* FIXME: sc->sc_full_reset ? */
1664 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1665 unsigned int changed_flags,
1666 unsigned int *total_flags,
1669 struct ath_wiphy *aphy = hw->priv;
1670 struct ath_softc *sc = aphy->sc;
1673 changed_flags &= SUPPORTED_FILTERS;
1674 *total_flags &= SUPPORTED_FILTERS;
1676 sc->rx.rxfilter = *total_flags;
1677 ath9k_ps_wakeup(sc);
1678 rfilt = ath_calcrxfilter(sc);
1679 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1680 ath9k_ps_restore(sc);
1682 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1683 "Set HW RX filter: 0x%x\n", rfilt);
1686 static int ath9k_sta_add(struct ieee80211_hw *hw,
1687 struct ieee80211_vif *vif,
1688 struct ieee80211_sta *sta)
1690 struct ath_wiphy *aphy = hw->priv;
1691 struct ath_softc *sc = aphy->sc;
1693 ath_node_attach(sc, sta);
1698 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1699 struct ieee80211_vif *vif,
1700 struct ieee80211_sta *sta)
1702 struct ath_wiphy *aphy = hw->priv;
1703 struct ath_softc *sc = aphy->sc;
1705 ath_node_detach(sc, sta);
1710 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1711 const struct ieee80211_tx_queue_params *params)
1713 struct ath_wiphy *aphy = hw->priv;
1714 struct ath_softc *sc = aphy->sc;
1715 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1716 struct ath9k_tx_queue_info qi;
1719 if (queue >= WME_NUM_AC)
1722 mutex_lock(&sc->mutex);
1724 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1726 qi.tqi_aifs = params->aifs;
1727 qi.tqi_cwmin = params->cw_min;
1728 qi.tqi_cwmax = params->cw_max;
1729 qi.tqi_burstTime = params->txop;
1730 qnum = ath_get_hal_qnum(queue, sc);
1732 ath_print(common, ATH_DBG_CONFIG,
1733 "Configure tx [queue/halq] [%d/%d], "
1734 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1735 queue, qnum, params->aifs, params->cw_min,
1736 params->cw_max, params->txop);
1738 ret = ath_txq_update(sc, qnum, &qi);
1740 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1742 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1743 if ((qnum == sc->tx.hwq_map[ATH9K_WME_AC_BE]) && !ret)
1744 ath_beaconq_config(sc);
1746 mutex_unlock(&sc->mutex);
1751 static int ath9k_set_key(struct ieee80211_hw *hw,
1752 enum set_key_cmd cmd,
1753 struct ieee80211_vif *vif,
1754 struct ieee80211_sta *sta,
1755 struct ieee80211_key_conf *key)
1757 struct ath_wiphy *aphy = hw->priv;
1758 struct ath_softc *sc = aphy->sc;
1759 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1762 if (modparam_nohwcrypt)
1765 mutex_lock(&sc->mutex);
1766 ath9k_ps_wakeup(sc);
1767 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1771 ret = ath_key_config(common, vif, sta, key);
1773 key->hw_key_idx = ret;
1774 /* push IV and Michael MIC generation to stack */
1775 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1776 if (key->alg == ALG_TKIP)
1777 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1778 if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
1779 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1784 ath_key_delete(common, key);
1790 ath9k_ps_restore(sc);
1791 mutex_unlock(&sc->mutex);
1796 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1797 struct ieee80211_vif *vif,
1798 struct ieee80211_bss_conf *bss_conf,
1801 struct ath_wiphy *aphy = hw->priv;
1802 struct ath_softc *sc = aphy->sc;
1803 struct ath_hw *ah = sc->sc_ah;
1804 struct ath_common *common = ath9k_hw_common(ah);
1805 struct ath_vif *avp = (void *)vif->drv_priv;
1809 mutex_lock(&sc->mutex);
1811 if (changed & BSS_CHANGED_BSSID) {
1813 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1814 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1816 ath9k_hw_write_associd(ah);
1818 /* Set aggregation protection mode parameters */
1819 sc->config.ath_aggr_prot = 0;
1821 /* Only legacy IBSS for now */
1822 if (vif->type == NL80211_IFTYPE_ADHOC)
1823 ath_update_chainmask(sc, 0);
1825 ath_print(common, ATH_DBG_CONFIG,
1826 "BSSID: %pM aid: 0x%x\n",
1827 common->curbssid, common->curaid);
1829 /* need to reconfigure the beacon */
1830 sc->sc_flags &= ~SC_OP_BEACONS ;
1833 /* Enable transmission of beacons (AP, IBSS, MESH) */
1834 if ((changed & BSS_CHANGED_BEACON) ||
1835 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1836 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1837 error = ath_beacon_alloc(aphy, vif);
1839 ath_beacon_config(sc, vif);
1842 if (changed & BSS_CHANGED_ERP_SLOT) {
1843 if (bss_conf->use_short_slot)
1847 if (vif->type == NL80211_IFTYPE_AP) {
1849 * Defer update, so that connected stations can adjust
1850 * their settings at the same time.
1851 * See beacon.c for more details
1853 sc->beacon.slottime = slottime;
1854 sc->beacon.updateslot = UPDATE;
1856 ah->slottime = slottime;
1857 ath9k_hw_init_global_settings(ah);
1861 /* Disable transmission of beacons */
1862 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1863 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1865 if (changed & BSS_CHANGED_BEACON_INT) {
1866 sc->beacon_interval = bss_conf->beacon_int;
1868 * In case of AP mode, the HW TSF has to be reset
1869 * when the beacon interval changes.
1871 if (vif->type == NL80211_IFTYPE_AP) {
1872 sc->sc_flags |= SC_OP_TSF_RESET;
1873 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1874 error = ath_beacon_alloc(aphy, vif);
1876 ath_beacon_config(sc, vif);
1878 ath_beacon_config(sc, vif);
1882 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1883 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1884 bss_conf->use_short_preamble);
1885 if (bss_conf->use_short_preamble)
1886 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1888 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1891 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1892 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1893 bss_conf->use_cts_prot);
1894 if (bss_conf->use_cts_prot &&
1895 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1896 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1898 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1901 if (changed & BSS_CHANGED_ASSOC) {
1902 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1904 ath9k_bss_assoc_info(sc, vif, bss_conf);
1907 mutex_unlock(&sc->mutex);
1910 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1913 struct ath_wiphy *aphy = hw->priv;
1914 struct ath_softc *sc = aphy->sc;
1916 mutex_lock(&sc->mutex);
1917 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1918 mutex_unlock(&sc->mutex);
1923 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1925 struct ath_wiphy *aphy = hw->priv;
1926 struct ath_softc *sc = aphy->sc;
1928 mutex_lock(&sc->mutex);
1929 ath9k_hw_settsf64(sc->sc_ah, tsf);
1930 mutex_unlock(&sc->mutex);
1933 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1935 struct ath_wiphy *aphy = hw->priv;
1936 struct ath_softc *sc = aphy->sc;
1938 mutex_lock(&sc->mutex);
1940 ath9k_ps_wakeup(sc);
1941 ath9k_hw_reset_tsf(sc->sc_ah);
1942 ath9k_ps_restore(sc);
1944 mutex_unlock(&sc->mutex);
1947 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1948 struct ieee80211_vif *vif,
1949 enum ieee80211_ampdu_mlme_action action,
1950 struct ieee80211_sta *sta,
1953 struct ath_wiphy *aphy = hw->priv;
1954 struct ath_softc *sc = aphy->sc;
1958 case IEEE80211_AMPDU_RX_START:
1959 if (!(sc->sc_flags & SC_OP_RXAGGR))
1962 case IEEE80211_AMPDU_RX_STOP:
1964 case IEEE80211_AMPDU_TX_START:
1965 ath9k_ps_wakeup(sc);
1966 ath_tx_aggr_start(sc, sta, tid, ssn);
1967 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1968 ath9k_ps_restore(sc);
1970 case IEEE80211_AMPDU_TX_STOP:
1971 ath9k_ps_wakeup(sc);
1972 ath_tx_aggr_stop(sc, sta, tid);
1973 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1974 ath9k_ps_restore(sc);
1976 case IEEE80211_AMPDU_TX_OPERATIONAL:
1977 ath9k_ps_wakeup(sc);
1978 ath_tx_aggr_resume(sc, sta, tid);
1979 ath9k_ps_restore(sc);
1982 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1983 "Unknown AMPDU action\n");
1989 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
1991 struct ath_wiphy *aphy = hw->priv;
1992 struct ath_softc *sc = aphy->sc;
1993 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1995 mutex_lock(&sc->mutex);
1996 if (ath9k_wiphy_scanning(sc)) {
1997 printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
2000 * Do not allow the concurrent scanning state for now. This
2001 * could be improved with scanning control moved into ath9k.
2003 mutex_unlock(&sc->mutex);
2007 aphy->state = ATH_WIPHY_SCAN;
2008 ath9k_wiphy_pause_all_forced(sc, aphy);
2009 sc->sc_flags |= SC_OP_SCANNING;
2010 del_timer_sync(&common->ani.timer);
2011 cancel_delayed_work_sync(&sc->tx_complete_work);
2012 mutex_unlock(&sc->mutex);
2015 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2017 struct ath_wiphy *aphy = hw->priv;
2018 struct ath_softc *sc = aphy->sc;
2019 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2021 mutex_lock(&sc->mutex);
2022 aphy->state = ATH_WIPHY_ACTIVE;
2023 sc->sc_flags &= ~SC_OP_SCANNING;
2024 sc->sc_flags |= SC_OP_FULL_RESET;
2025 ath_start_ani(common);
2026 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
2027 ath_beacon_config(sc, NULL);
2028 mutex_unlock(&sc->mutex);
2031 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2033 struct ath_wiphy *aphy = hw->priv;
2034 struct ath_softc *sc = aphy->sc;
2035 struct ath_hw *ah = sc->sc_ah;
2037 mutex_lock(&sc->mutex);
2038 ah->coverage_class = coverage_class;
2039 ath9k_hw_init_global_settings(ah);
2040 mutex_unlock(&sc->mutex);
2043 struct ieee80211_ops ath9k_ops = {
2045 .start = ath9k_start,
2047 .add_interface = ath9k_add_interface,
2048 .remove_interface = ath9k_remove_interface,
2049 .config = ath9k_config,
2050 .configure_filter = ath9k_configure_filter,
2051 .sta_add = ath9k_sta_add,
2052 .sta_remove = ath9k_sta_remove,
2053 .conf_tx = ath9k_conf_tx,
2054 .bss_info_changed = ath9k_bss_info_changed,
2055 .set_key = ath9k_set_key,
2056 .get_tsf = ath9k_get_tsf,
2057 .set_tsf = ath9k_set_tsf,
2058 .reset_tsf = ath9k_reset_tsf,
2059 .ampdu_action = ath9k_ampdu_action,
2060 .sw_scan_start = ath9k_sw_scan_start,
2061 .sw_scan_complete = ath9k_sw_scan_complete,
2062 .rfkill_poll = ath9k_rfkill_poll_state,
2063 .set_coverage_class = ath9k_set_coverage_class,