drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_cache_conf_rate(struct ath_softc *sc,
  22                                 struct ieee80211_conf *conf)
  23 {
  24         switch (conf->channel->band) {
  25         case IEEE80211_BAND_2GHZ:
  26                 if (conf_is_ht20(conf))
  27                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  28                 else if (conf_is_ht40_minus(conf))
  29                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  30                 else if (conf_is_ht40_plus(conf))
  31                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  32                 else
  33                         sc->cur_rate_mode = ATH9K_MODE_11G;
  34                 break;
  35         case IEEE80211_BAND_5GHZ:
  36                 if (conf_is_ht20(conf))
  37                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  38                 else if (conf_is_ht40_minus(conf))
  39                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  40                 else if (conf_is_ht40_plus(conf))
  41                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  42                 else
  43                         sc->cur_rate_mode = ATH9K_MODE_11A;
  44                 break;
  45         default:
  46                 BUG_ON(1);
  47                 break;
  48         }
  49 }
  50
  51 static void ath_update_txpow(struct ath_softc *sc)
  52 {
  53         struct ath_hw *ah = sc->sc_ah;
  54         u32 txpow;
  55
  56         if (sc->curtxpow != sc->config.txpowlimit) {
  57                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  58                 /* read back in case value is clamped */
  59                 ath9k_hw_getcapability(ah, ATH9K_CAP_TXPOW, 1, &txpow);
  60                 sc->curtxpow = txpow;
  61         }
  62 }
  63
  64 static u8 parse_mpdudensity(u8 mpdudensity)
  65 {
  66         /*
  67          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  68          *   0 for no restriction
  69          *   1 for 1/4 us
  70          *   2 for 1/2 us
  71          *   3 for 1 us
  72          *   4 for 2 us
  73          *   5 for 4 us
  74          *   6 for 8 us
  75          *   7 for 16 us
  76          */
  77         switch (mpdudensity) {
  78         case 0:
  79                 return 0;
  80         case 1:
  81         case 2:
  82         case 3:
  83                 /* Our lower layer calculations limit our precision to
  84                    1 microsecond */
  85                 return 1;
  86         case 4:
  87                 return 2;
  88         case 5:
  89                 return 4;
  90         case 6:
  91                 return 8;
  92         case 7:
  93                 return 16;
  94         default:
  95                 return 0;
  96         }
  97 }
  98
  99 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
 100                                                 struct ieee80211_hw *hw)
 101 {
 102         struct ieee80211_channel *curchan = hw->conf.channel;
 103         struct ath9k_channel *channel;
 104         u8 chan_idx;
 105
 106         chan_idx = curchan->hw_value;
 107         channel = &sc->sc_ah->channels[chan_idx];
 108         ath9k_update_ichannel(sc, hw, channel);
 109         return channel;
 110 }
 111
 112 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
 113 {
 114         unsigned long flags;
 115         bool ret;
 116
 117         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 118         ret = ath9k_hw_setpower(sc->sc_ah, mode);
 119         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 120
 121         return ret;
 122 }
 123
 124 void ath9k_ps_wakeup(struct ath_softc *sc)
 125 {
 126         unsigned long flags;
 127
 128         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 129         if (++sc->ps_usecount != 1)
 130                 goto unlock;
 131
 132         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 133
 134  unlock:
 135         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 136 }
 137
 138 void ath9k_ps_restore(struct ath_softc *sc)
 139 {
 140         unsigned long flags;
 141
 142         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 143         if (--sc->ps_usecount != 0)
 144                 goto unlock;
 145
 146         if (sc->ps_idle)
 147                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 148         else if (sc->ps_enabled &&
 149                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 150                               PS_WAIT_FOR_CAB |
 151                               PS_WAIT_FOR_PSPOLL_DATA |
 152                               PS_WAIT_FOR_TX_ACK)))
 153                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 154
 155  unlock:
 156         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 157 }
 158
 159 /*
 160  * Set/change channels.  If the channel is really being changed, it's done
 161  * by reseting the chip.  To accomplish this we must first cleanup any pending
 162  * DMA, then restart stuff.
 163 */
 164 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 165                     struct ath9k_channel *hchan)
 166 {
 167         struct ath_hw *ah = sc->sc_ah;
 168         struct ath_common *common = ath9k_hw_common(ah);
 169         struct ieee80211_conf *conf = &common->hw->conf;
 170         bool fastcc = true, stopped;
 171         struct ieee80211_channel *channel = hw->conf.channel;
 172         int r;
 173
 174         if (sc->sc_flags & SC_OP_INVALID)
 175                 return -EIO;
 176
 177         ath9k_ps_wakeup(sc);
 178
 179         /*
 180          * This is only performed if the channel settings have
 181          * actually changed.
 182          *
 183          * To switch channels clear any pending DMA operations;
 184          * wait long enough for the RX fifo to drain, reset the
 185          * hardware at the new frequency, and then re-enable
 186          * the relevant bits of the h/w.
 187          */
 188         ath9k_hw_set_interrupts(ah, 0);
 189         ath_drain_all_txq(sc, false);
 190         stopped = ath_stoprecv(sc);
 191
 192         /* XXX: do not flush receive queue here. We don't want
 193          * to flush data frames already in queue because of
 194          * changing channel. */
 195
 196         if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
 197                 fastcc = false;
 198
 199         ath_print(common, ATH_DBG_CONFIG,
 200                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
 201                   sc->sc_ah->curchan->channel,
 202                   channel->center_freq, conf_is_ht40(conf));
 203
 204         spin_lock_bh(&sc->sc_resetlock);
 205
 206         r = ath9k_hw_reset(ah, hchan, fastcc);
 207         if (r) {
 208                 ath_print(common, ATH_DBG_FATAL,
 209                           "Unable to reset channel (%u MHz), "
 210                           "reset status %d\n",
 211                           channel->center_freq, r);
 212                 spin_unlock_bh(&sc->sc_resetlock);
 213                 goto ps_restore;
 214         }
 215         spin_unlock_bh(&sc->sc_resetlock);
 216
 217         sc->sc_flags &= ~SC_OP_FULL_RESET;
 218
 219         if (ath_startrecv(sc) != 0) {
 220                 ath_print(common, ATH_DBG_FATAL,
 221                           "Unable to restart recv logic\n");
 222                 r = -EIO;
 223                 goto ps_restore;
 224         }
 225
 226         ath_cache_conf_rate(sc, &hw->conf);
 227         ath_update_txpow(sc);
 228         ath9k_hw_set_interrupts(ah, ah->imask);
 229
 230  ps_restore:
 231         ath9k_ps_restore(sc);
 232         return r;
 233 }
 234
 235 /*
 236  *  This routine performs the periodic noise floor calibration function
 237  *  that is used to adjust and optimize the chip performance.  This
 238  *  takes environmental changes (location, temperature) into account.
 239  *  When the task is complete, it reschedules itself depending on the
 240  *  appropriate interval that was calculated.
 241  */
 242 void ath_ani_calibrate(unsigned long data)
 243 {
 244         struct ath_softc *sc = (struct ath_softc *)data;
 245         struct ath_hw *ah = sc->sc_ah;
 246         struct ath_common *common = ath9k_hw_common(ah);
 247         bool longcal = false;
 248         bool shortcal = false;
 249         bool aniflag = false;
 250         unsigned int timestamp = jiffies_to_msecs(jiffies);
 251         u32 cal_interval, short_cal_interval;
 252
 253         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 254                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 255
 256         /* Only calibrate if awake */
 257         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 258                 goto set_timer;
 259
 260         ath9k_ps_wakeup(sc);
 261
 262         /* Long calibration runs independently of short calibration. */
 263         if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
 264                 longcal = true;
 265                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 266                 common->ani.longcal_timer = timestamp;
 267         }
 268
 269         /* Short calibration applies only while caldone is false */
 270         if (!common->ani.caldone) {
 271                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 272                         shortcal = true;
 273                         ath_print(common, ATH_DBG_ANI,
 274                                   "shortcal @%lu\n", jiffies);
 275                         common->ani.shortcal_timer = timestamp;
 276                         common->ani.resetcal_timer = timestamp;
 277                 }
 278         } else {
 279                 if ((timestamp - common->ani.resetcal_timer) >=
 280                     ATH_RESTART_CALINTERVAL) {
 281                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 282                         if (common->ani.caldone)
 283                                 common->ani.resetcal_timer = timestamp;
 284                 }
 285         }
 286
 287         /* Verify whether we must check ANI */
 288         if ((timestamp - common->ani.checkani_timer) >= ATH_ANI_POLLINTERVAL) {
 289                 aniflag = true;
 290                 common->ani.checkani_timer = timestamp;
 291         }
 292
 293         /* Skip all processing if there's nothing to do. */
 294         if (longcal || shortcal || aniflag) {
 295                 /* Call ANI routine if necessary */
 296                 if (aniflag)
 297                         ath9k_hw_ani_monitor(ah, ah->curchan);
 298
 299                 /* Perform calibration if necessary */
 300                 if (longcal || shortcal) {
 301                         common->ani.caldone =
 302                                 ath9k_hw_calibrate(ah,
 303                                                    ah->curchan,
 304                                                    common->rx_chainmask,
 305                                                    longcal);
 306
 307                         if (longcal)
 308                                 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
 309                                                                      ah->curchan);
 310
 311                         ath_print(common, ATH_DBG_ANI,
 312                                   " calibrate chan %u/%x nf: %d\n",
 313                                   ah->curchan->channel,
 314                                   ah->curchan->channelFlags,
 315                                   common->ani.noise_floor);
 316                 }
 317         }
 318
 319         ath9k_ps_restore(sc);
 320
 321 set_timer:
 322         /*
 323         * Set timer interval based on previous results.
 324         * The interval must be the shortest necessary to satisfy ANI,
 325         * short calibration and long calibration.
 326         */
 327         cal_interval = ATH_LONG_CALINTERVAL;
 328         if (sc->sc_ah->config.enable_ani)
 329                 cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL);
 330         if (!common->ani.caldone)
 331                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 332
 333         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 334 }
 335
 336 static void ath_start_ani(struct ath_common *common)
 337 {
 338         unsigned long timestamp = jiffies_to_msecs(jiffies);
 339
 340         common->ani.longcal_timer = timestamp;
 341         common->ani.shortcal_timer = timestamp;
 342         common->ani.checkani_timer = timestamp;
 343
 344         mod_timer(&common->ani.timer,
 345                   jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
 346 }
 347
 348 /*
 349  * Update tx/rx chainmask. For legacy association,
 350  * hard code chainmask to 1x1, for 11n association, use
 351  * the chainmask configuration, for bt coexistence, use
 352  * the chainmask configuration even in legacy mode.
 353  */
 354 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 355 {
 356         struct ath_hw *ah = sc->sc_ah;
 357         struct ath_common *common = ath9k_hw_common(ah);
 358
 359         if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
 360             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 361                 common->tx_chainmask = ah->caps.tx_chainmask;
 362                 common->rx_chainmask = ah->caps.rx_chainmask;
 363         } else {
 364                 common->tx_chainmask = 1;
 365                 common->rx_chainmask = 1;
 366         }
 367
 368         ath_print(common, ATH_DBG_CONFIG,
 369                   "tx chmask: %d, rx chmask: %d\n",
 370                   common->tx_chainmask,
 371                   common->rx_chainmask);
 372 }
 373
 374 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 375 {
 376         struct ath_node *an;
 377
 378         an = (struct ath_node *)sta->drv_priv;
 379
 380         if (sc->sc_flags & SC_OP_TXAGGR) {
 381                 ath_tx_node_init(sc, an);
 382                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 383                                      sta->ht_cap.ampdu_factor);
 384                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 385                 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
 386         }
 387 }
 388
 389 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 390 {
 391         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 392
 393         if (sc->sc_flags & SC_OP_TXAGGR)
 394                 ath_tx_node_cleanup(sc, an);
 395 }
 396
 397 void ath9k_tasklet(unsigned long data)
 398 {
 399         struct ath_softc *sc = (struct ath_softc *)data;
 400         struct ath_hw *ah = sc->sc_ah;
 401         struct ath_common *common = ath9k_hw_common(ah);
 402
 403         u32 status = sc->intrstatus;
 404         u32 rxmask;
 405
 406         ath9k_ps_wakeup(sc);
 407
 408         if (status & ATH9K_INT_FATAL) {
 409                 ath_reset(sc, false);
 410                 ath9k_ps_restore(sc);
 411                 return;
 412         }
 413
 414         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 415                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 416                           ATH9K_INT_RXORN);
 417         else
 418                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 419
 420         if (status & rxmask) {
 421                 spin_lock_bh(&sc->rx.rxflushlock);
 422
 423                 /* Check for high priority Rx first */
 424                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 425                     (status & ATH9K_INT_RXHP))
 426                         ath_rx_tasklet(sc, 0, true);
 427
 428                 ath_rx_tasklet(sc, 0, false);
 429                 spin_unlock_bh(&sc->rx.rxflushlock);
 430         }
 431
 432         if (status & ATH9K_INT_TX)
 433                 ath_tx_tasklet(sc);
 434
 435         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 436                 /*
 437                  * TSF sync does not look correct; remain awake to sync with
 438                  * the next Beacon.
 439                  */
 440                 ath_print(common, ATH_DBG_PS,
 441                           "TSFOOR - Sync with next Beacon\n");
 442                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 443         }
 444
 445         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 446                 if (status & ATH9K_INT_GENTIMER)
 447                         ath_gen_timer_isr(sc->sc_ah);
 448
 449         /* re-enable hardware interrupt */
 450         ath9k_hw_set_interrupts(ah, ah->imask);
 451         ath9k_ps_restore(sc);
 452 }
 453
 454 irqreturn_t ath_isr(int irq, void *dev)
 455 {
 456 #define SCHED_INTR (                            \
 457                 ATH9K_INT_FATAL |               \
 458                 ATH9K_INT_RXORN |               \
 459                 ATH9K_INT_RXEOL |               \
 460                 ATH9K_INT_RX |                  \
 461                 ATH9K_INT_RXLP |                \
 462                 ATH9K_INT_RXHP |                \
 463                 ATH9K_INT_TX |                  \
 464                 ATH9K_INT_BMISS |               \
 465                 ATH9K_INT_CST |                 \
 466                 ATH9K_INT_TSFOOR |              \
 467                 ATH9K_INT_GENTIMER)
 468
 469         struct ath_softc *sc = dev;
 470         struct ath_hw *ah = sc->sc_ah;
 471         enum ath9k_int status;
 472         bool sched = false;
 473
 474         /*
 475          * The hardware is not ready/present, don't
 476          * touch anything. Note this can happen early
 477          * on if the IRQ is shared.
 478          */
 479         if (sc->sc_flags & SC_OP_INVALID)
 480                 return IRQ_NONE;
 481
 482
 483         /* shared irq, not for us */
 484
 485         if (!ath9k_hw_intrpend(ah))
 486                 return IRQ_NONE;
 487
 488         /*
 489          * Figure out the reason(s) for the interrupt.  Note
 490          * that the hal returns a pseudo-ISR that may include
 491          * bits we haven't explicitly enabled so we mask the
 492          * value to insure we only process bits we requested.
 493          */
 494         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 495         status &= ah->imask;    /* discard unasked-for bits */
 496
 497         /*
 498          * If there are no status bits set, then this interrupt was not
 499          * for me (should have been caught above).
 500          */
 501         if (!status)
 502                 return IRQ_NONE;
 503
 504         /* Cache the status */
 505         sc->intrstatus = status;
 506
 507         if (status & SCHED_INTR)
 508                 sched = true;
 509
 510         /*
 511          * If a FATAL or RXORN interrupt is received, we have to reset the
 512          * chip immediately.
 513          */
 514         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 515             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 516                 goto chip_reset;
 517
 518         if (status & ATH9K_INT_SWBA)
 519                 tasklet_schedule(&sc->bcon_tasklet);
 520
 521         if (status & ATH9K_INT_TXURN)
 522                 ath9k_hw_updatetxtriglevel(ah, true);
 523
 524         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 525                 if (status & ATH9K_INT_RXEOL) {
 526                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 527                         ath9k_hw_set_interrupts(ah, ah->imask);
 528                 }
 529         }
 530
 531         if (status & ATH9K_INT_MIB) {
 532                 /*
 533                  * Disable interrupts until we service the MIB
 534                  * interrupt; otherwise it will continue to
 535                  * fire.
 536                  */
 537                 ath9k_hw_set_interrupts(ah, 0);
 538                 /*
 539                  * Let the hal handle the event. We assume
 540                  * it will clear whatever condition caused
 541                  * the interrupt.
 542                  */
 543                 ath9k_hw_procmibevent(ah);
 544                 ath9k_hw_set_interrupts(ah, ah->imask);
 545         }
 546
 547         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 548                 if (status & ATH9K_INT_TIM_TIMER) {
 549                         /* Clear RxAbort bit so that we can
 550                          * receive frames */
 551                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 552                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 553                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 554                 }
 555
 556 chip_reset:
 557
 558         ath_debug_stat_interrupt(sc, status);
 559
 560         if (sched) {
 561                 /* turn off every interrupt except SWBA */
 562                 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
 563                 tasklet_schedule(&sc->intr_tq);
 564         }
 565
 566         return IRQ_HANDLED;
 567
 568 #undef SCHED_INTR
 569 }
 570
 571 static u32 ath_get_extchanmode(struct ath_softc *sc,
 572                                struct ieee80211_channel *chan,
 573                                enum nl80211_channel_type channel_type)
 574 {
 575         u32 chanmode = 0;
 576
 577         switch (chan->band) {
 578         case IEEE80211_BAND_2GHZ:
 579                 switch(channel_type) {
 580                 case NL80211_CHAN_NO_HT:
 581                 case NL80211_CHAN_HT20:
 582                         chanmode = CHANNEL_G_HT20;
 583                         break;
 584                 case NL80211_CHAN_HT40PLUS:
 585                         chanmode = CHANNEL_G_HT40PLUS;
 586                         break;
 587                 case NL80211_CHAN_HT40MINUS:
 588                         chanmode = CHANNEL_G_HT40MINUS;
 589                         break;
 590                 }
 591                 break;
 592         case IEEE80211_BAND_5GHZ:
 593                 switch(channel_type) {
 594                 case NL80211_CHAN_NO_HT:
 595                 case NL80211_CHAN_HT20:
 596                         chanmode = CHANNEL_A_HT20;
 597                         break;
 598                 case NL80211_CHAN_HT40PLUS:
 599                         chanmode = CHANNEL_A_HT40PLUS;
 600                         break;
 601                 case NL80211_CHAN_HT40MINUS:
 602                         chanmode = CHANNEL_A_HT40MINUS;
 603                         break;
 604                 }
 605                 break;
 606         default:
 607                 break;
 608         }
 609
 610         return chanmode;
 611 }
 612
 613 static int ath_setkey_tkip(struct ath_common *common, u16 keyix, const u8 *key,
 614                            struct ath9k_keyval *hk, const u8 *addr,
 615                            bool authenticator)
 616 {
 617         struct ath_hw *ah = common->ah;
 618         const u8 *key_rxmic;
 619         const u8 *key_txmic;
 620
 621         key_txmic = key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
 622         key_rxmic = key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
 623
 624         if (addr == NULL) {
 625                 /*
 626                  * Group key installation - only two key cache entries are used
 627                  * regardless of splitmic capability since group key is only
 628                  * used either for TX or RX.
 629                  */
 630                 if (authenticator) {
 631                         memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
 632                         memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_mic));
 633                 } else {
 634                         memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 635                         memcpy(hk->kv_txmic, key_rxmic, sizeof(hk->kv_mic));
 636                 }
 637                 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
 638         }
 639         if (!common->splitmic) {
 640                 /* TX and RX keys share the same key cache entry. */
 641                 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 642                 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
 643                 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
 644         }
 645
 646         /* Separate key cache entries for TX and RX */
 647
 648         /* TX key goes at first index, RX key at +32. */
 649         memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
 650         if (!ath9k_hw_set_keycache_entry(ah, keyix, hk, NULL)) {
 651                 /* TX MIC entry failed. No need to proceed further */
 652                 ath_print(common, ATH_DBG_FATAL,
 653                           "Setting TX MIC Key Failed\n");
 654                 return 0;
 655         }
 656
 657         memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 658         /* XXX delete tx key on failure? */
 659         return ath9k_hw_set_keycache_entry(ah, keyix + 32, hk, addr);
 660 }
 661
 662 static int ath_reserve_key_cache_slot_tkip(struct ath_common *common)
 663 {
 664         int i;
 665
 666         for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
 667                 if (test_bit(i, common->keymap) ||
 668                     test_bit(i + 64, common->keymap))
 669                         continue; /* At least one part of TKIP key allocated */
 670                 if (common->splitmic &&
 671                     (test_bit(i + 32, common->keymap) ||
 672                      test_bit(i + 64 + 32, common->keymap)))
 673                         continue; /* At least one part of TKIP key allocated */
 674
 675                 /* Found a free slot for a TKIP key */
 676                 return i;
 677         }
 678         return -1;
 679 }
 680
 681 static int ath_reserve_key_cache_slot(struct ath_common *common)
 682 {
 683         int i;
 684
 685         /* First, try to find slots that would not be available for TKIP. */
 686         if (common->splitmic) {
 687                 for (i = IEEE80211_WEP_NKID; i < common->keymax / 4; i++) {
 688                         if (!test_bit(i, common->keymap) &&
 689                             (test_bit(i + 32, common->keymap) ||
 690                              test_bit(i + 64, common->keymap) ||
 691                              test_bit(i + 64 + 32, common->keymap)))
 692                                 return i;
 693                         if (!test_bit(i + 32, common->keymap) &&
 694                             (test_bit(i, common->keymap) ||
 695                              test_bit(i + 64, common->keymap) ||
 696                              test_bit(i + 64 + 32, common->keymap)))
 697                                 return i + 32;
 698                         if (!test_bit(i + 64, common->keymap) &&
 699                             (test_bit(i , common->keymap) ||
 700                              test_bit(i + 32, common->keymap) ||
 701                              test_bit(i + 64 + 32, common->keymap)))
 702                                 return i + 64;
 703                         if (!test_bit(i + 64 + 32, common->keymap) &&
 704                             (test_bit(i, common->keymap) ||
 705                              test_bit(i + 32, common->keymap) ||
 706                              test_bit(i + 64, common->keymap)))
 707                                 return i + 64 + 32;
 708                 }
 709         } else {
 710                 for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
 711                         if (!test_bit(i, common->keymap) &&
 712                             test_bit(i + 64, common->keymap))
 713                                 return i;
 714                         if (test_bit(i, common->keymap) &&
 715                             !test_bit(i + 64, common->keymap))
 716                                 return i + 64;
 717                 }
 718         }
 719
 720         /* No partially used TKIP slots, pick any available slot */
 721         for (i = IEEE80211_WEP_NKID; i < common->keymax; i++) {
 722                 /* Do not allow slots that could be needed for TKIP group keys
 723                  * to be used. This limitation could be removed if we know that
 724                  * TKIP will not be used. */
 725                 if (i >= 64 && i < 64 + IEEE80211_WEP_NKID)
 726                         continue;
 727                 if (common->splitmic) {
 728                         if (i >= 32 && i < 32 + IEEE80211_WEP_NKID)
 729                                 continue;
 730                         if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID)
 731                                 continue;
 732                 }
 733
 734                 if (!test_bit(i, common->keymap))
 735                         return i; /* Found a free slot for a key */
 736         }
 737
 738         /* No free slot found */
 739         return -1;
 740 }
 741
 742 static int ath_key_config(struct ath_common *common,
 743                           struct ieee80211_vif *vif,
 744                           struct ieee80211_sta *sta,
 745                           struct ieee80211_key_conf *key)
 746 {
 747         struct ath_hw *ah = common->ah;
 748         struct ath9k_keyval hk;
 749         const u8 *mac = NULL;
 750         int ret = 0;
 751         int idx;
 752
 753         memset(&hk, 0, sizeof(hk));
 754
 755         switch (key->alg) {
 756         case ALG_WEP:
 757                 hk.kv_type = ATH9K_CIPHER_WEP;
 758                 break;
 759         case ALG_TKIP:
 760                 hk.kv_type = ATH9K_CIPHER_TKIP;
 761                 break;
 762         case ALG_CCMP:
 763                 hk.kv_type = ATH9K_CIPHER_AES_CCM;
 764                 break;
 765         default:
 766                 return -EOPNOTSUPP;
 767         }
 768
 769         hk.kv_len = key->keylen;
 770         memcpy(hk.kv_val, key->key, key->keylen);
 771
 772         if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
 773                 /* For now, use the default keys for broadcast keys. This may
 774                  * need to change with virtual interfaces. */
 775                 idx = key->keyidx;
 776         } else if (key->keyidx) {
 777                 if (WARN_ON(!sta))
 778                         return -EOPNOTSUPP;
 779                 mac = sta->addr;
 780
 781                 if (vif->type != NL80211_IFTYPE_AP) {
 782                         /* Only keyidx 0 should be used with unicast key, but
 783                          * allow this for client mode for now. */
 784                         idx = key->keyidx;
 785                 } else
 786                         return -EIO;
 787         } else {
 788                 if (WARN_ON(!sta))
 789                         return -EOPNOTSUPP;
 790                 mac = sta->addr;
 791
 792                 if (key->alg == ALG_TKIP)
 793                         idx = ath_reserve_key_cache_slot_tkip(common);
 794                 else
 795                         idx = ath_reserve_key_cache_slot(common);
 796                 if (idx < 0)
 797                         return -ENOSPC; /* no free key cache entries */
 798         }
 799
 800         if (key->alg == ALG_TKIP)
 801                 ret = ath_setkey_tkip(common, idx, key->key, &hk, mac,
 802                                       vif->type == NL80211_IFTYPE_AP);
 803         else
 804                 ret = ath9k_hw_set_keycache_entry(ah, idx, &hk, mac);
 805
 806         if (!ret)
 807                 return -EIO;
 808
 809         set_bit(idx, common->keymap);
 810         if (key->alg == ALG_TKIP) {
 811                 set_bit(idx + 64, common->keymap);
 812                 if (common->splitmic) {
 813                         set_bit(idx + 32, common->keymap);
 814                         set_bit(idx + 64 + 32, common->keymap);
 815                 }
 816         }
 817
 818         return idx;
 819 }
 820
 821 static void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key)
 822 {
 823         struct ath_hw *ah = common->ah;
 824
 825         ath9k_hw_keyreset(ah, key->hw_key_idx);
 826         if (key->hw_key_idx < IEEE80211_WEP_NKID)
 827                 return;
 828
 829         clear_bit(key->hw_key_idx, common->keymap);
 830         if (key->alg != ALG_TKIP)
 831                 return;
 832
 833         clear_bit(key->hw_key_idx + 64, common->keymap);
 834         if (common->splitmic) {
 835                 ath9k_hw_keyreset(ah, key->hw_key_idx + 32);
 836                 clear_bit(key->hw_key_idx + 32, common->keymap);
 837                 clear_bit(key->hw_key_idx + 64 + 32, common->keymap);
 838         }
 839 }
 840
 841 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 842                                  struct ieee80211_vif *vif,
 843                                  struct ieee80211_bss_conf *bss_conf)
 844 {
 845         struct ath_hw *ah = sc->sc_ah;
 846         struct ath_common *common = ath9k_hw_common(ah);
 847
 848         if (bss_conf->assoc) {
 849                 ath_print(common, ATH_DBG_CONFIG,
 850                           "Bss Info ASSOC %d, bssid: %pM\n",
 851                            bss_conf->aid, common->curbssid);
 852
 853                 /* New association, store aid */
 854                 common->curaid = bss_conf->aid;
 855                 ath9k_hw_write_associd(ah);
 856
 857                 /*
 858                  * Request a re-configuration of Beacon related timers
 859                  * on the receipt of the first Beacon frame (i.e.,
 860                  * after time sync with the AP).
 861                  */
 862                 sc->ps_flags |= PS_BEACON_SYNC;
 863
 864                 /* Configure the beacon */
 865                 ath_beacon_config(sc, vif);
 866
 867                 /* Reset rssi stats */
 868                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 869
 870                 ath_start_ani(common);
 871         } else {
 872                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 873                 common->curaid = 0;
 874                 /* Stop ANI */
 875                 del_timer_sync(&common->ani.timer);
 876         }
 877 }
 878
 879 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 880 {
 881         struct ath_hw *ah = sc->sc_ah;
 882         struct ath_common *common = ath9k_hw_common(ah);
 883         struct ieee80211_channel *channel = hw->conf.channel;
 884         int r;
 885
 886         ath9k_ps_wakeup(sc);
 887         ath9k_hw_configpcipowersave(ah, 0, 0);
 888
 889         if (!ah->curchan)
 890                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 891
 892         spin_lock_bh(&sc->sc_resetlock);
 893         r = ath9k_hw_reset(ah, ah->curchan, false);
 894         if (r) {
 895                 ath_print(common, ATH_DBG_FATAL,
 896                           "Unable to reset channel (%u MHz), "
 897                           "reset status %d\n",
 898                           channel->center_freq, r);
 899         }
 900         spin_unlock_bh(&sc->sc_resetlock);
 901
 902         ath_update_txpow(sc);
 903         if (ath_startrecv(sc) != 0) {
 904                 ath_print(common, ATH_DBG_FATAL,
 905                           "Unable to restart recv logic\n");
 906                 return;
 907         }
 908
 909         if (sc->sc_flags & SC_OP_BEACONS)
 910                 ath_beacon_config(sc, NULL);    /* restart beacons */
 911
 912         /* Re-Enable  interrupts */
 913         ath9k_hw_set_interrupts(ah, ah->imask);
 914
 915         /* Enable LED */
 916         ath9k_hw_cfg_output(ah, ah->led_pin,
 917                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 918         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 919
 920         ieee80211_wake_queues(hw);
 921         ath9k_ps_restore(sc);
 922 }
 923
 924 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 925 {
 926         struct ath_hw *ah = sc->sc_ah;
 927         struct ieee80211_channel *channel = hw->conf.channel;
 928         int r;
 929
 930         ath9k_ps_wakeup(sc);
 931         ieee80211_stop_queues(hw);
 932
 933         /* Disable LED */
 934         ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 935         ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 936
 937         /* Disable interrupts */
 938         ath9k_hw_set_interrupts(ah, 0);
 939
 940         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 941         ath_stoprecv(sc);               /* turn off frame recv */
 942         ath_flushrecv(sc);              /* flush recv queue */
 943
 944         if (!ah->curchan)
 945                 ah->curchan = ath_get_curchannel(sc, hw);
 946
 947         spin_lock_bh(&sc->sc_resetlock);
 948         r = ath9k_hw_reset(ah, ah->curchan, false);
 949         if (r) {
 950                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 951                           "Unable to reset channel (%u MHz), "
 952                           "reset status %d\n",
 953                           channel->center_freq, r);
 954         }
 955         spin_unlock_bh(&sc->sc_resetlock);
 956
 957         ath9k_hw_phy_disable(ah);
 958         ath9k_hw_configpcipowersave(ah, 1, 1);
 959         ath9k_ps_restore(sc);
 960         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 961 }
 962
 963 int ath_reset(struct ath_softc *sc, bool retry_tx)
 964 {
 965         struct ath_hw *ah = sc->sc_ah;
 966         struct ath_common *common = ath9k_hw_common(ah);
 967         struct ieee80211_hw *hw = sc->hw;
 968         int r;
 969
 970         /* Stop ANI */
 971         del_timer_sync(&common->ani.timer);
 972
 973         ieee80211_stop_queues(hw);
 974
 975         ath9k_hw_set_interrupts(ah, 0);
 976         ath_drain_all_txq(sc, retry_tx);
 977         ath_stoprecv(sc);
 978         ath_flushrecv(sc);
 979
 980         spin_lock_bh(&sc->sc_resetlock);
 981         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
 982         if (r)
 983                 ath_print(common, ATH_DBG_FATAL,
 984                           "Unable to reset hardware; reset status %d\n", r);
 985         spin_unlock_bh(&sc->sc_resetlock);
 986
 987         if (ath_startrecv(sc) != 0)
 988                 ath_print(common, ATH_DBG_FATAL,
 989                           "Unable to start recv logic\n");
 990
 991         /*
 992          * We may be doing a reset in response to a request
 993          * that changes the channel so update any state that
 994          * might change as a result.
 995          */
 996         ath_cache_conf_rate(sc, &hw->conf);
 997
 998         ath_update_txpow(sc);
 999
1000         if (sc->sc_flags & SC_OP_BEACONS)
1001                 ath_beacon_config(sc, NULL);    /* restart beacons */
1002
1003         ath9k_hw_set_interrupts(ah, ah->imask);
1004
1005         if (retry_tx) {
1006                 int i;
1007                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1008                         if (ATH_TXQ_SETUP(sc, i)) {
1009                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1010                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1011                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1012                         }
1013                 }
1014         }
1015
1016         ieee80211_wake_queues(hw);
1017
1018         /* Start ANI */
1019         ath_start_ani(common);
1020
1021         return r;
1022 }
1023
1024 int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1025 {
1026         int qnum;
1027
1028         switch (queue) {
1029         case 0:
1030                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VO];
1031                 break;
1032         case 1:
1033                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VI];
1034                 break;
1035         case 2:
1036                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
1037                 break;
1038         case 3:
1039                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BK];
1040                 break;
1041         default:
1042                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
1043                 break;
1044         }
1045
1046         return qnum;
1047 }
1048
1049 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1050 {
1051         int qnum;
1052
1053         switch (queue) {
1054         case ATH9K_WME_AC_VO:
1055                 qnum = 0;
1056                 break;
1057         case ATH9K_WME_AC_VI:
1058                 qnum = 1;
1059                 break;
1060         case ATH9K_WME_AC_BE:
1061                 qnum = 2;
1062                 break;
1063         case ATH9K_WME_AC_BK:
1064                 qnum = 3;
1065                 break;
1066         default:
1067                 qnum = -1;
1068                 break;
1069         }
1070
1071         return qnum;
1072 }
1073
1074 /* XXX: Remove me once we don't depend on ath9k_channel for all
1075  * this redundant data */
1076 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1077                            struct ath9k_channel *ichan)
1078 {
1079         struct ieee80211_channel *chan = hw->conf.channel;
1080         struct ieee80211_conf *conf = &hw->conf;
1081
1082         ichan->channel = chan->center_freq;
1083         ichan->chan = chan;
1084
1085         if (chan->band == IEEE80211_BAND_2GHZ) {
1086                 ichan->chanmode = CHANNEL_G;
1087                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1088         } else {
1089                 ichan->chanmode = CHANNEL_A;
1090                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1091         }
1092
1093         if (conf_is_ht(conf))
1094                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1095                                             conf->channel_type);
1096 }
1097
1098 /**********************/
1099 /* mac80211 callbacks */
1100 /**********************/
1101
1102 static int ath9k_start(struct ieee80211_hw *hw)
1103 {
1104         struct ath_wiphy *aphy = hw->priv;
1105         struct ath_softc *sc = aphy->sc;
1106         struct ath_hw *ah = sc->sc_ah;
1107         struct ath_common *common = ath9k_hw_common(ah);
1108         struct ieee80211_channel *curchan = hw->conf.channel;
1109         struct ath9k_channel *init_channel;
1110         int r;
1111
1112         ath_print(common, ATH_DBG_CONFIG,
1113                   "Starting driver with initial channel: %d MHz\n",
1114                   curchan->center_freq);
1115
1116         mutex_lock(&sc->mutex);
1117
1118         if (ath9k_wiphy_started(sc)) {
1119                 if (sc->chan_idx == curchan->hw_value) {
1120                         /*
1121                          * Already on the operational channel, the new wiphy
1122                          * can be marked active.
1123                          */
1124                         aphy->state = ATH_WIPHY_ACTIVE;
1125                         ieee80211_wake_queues(hw);
1126                 } else {
1127                         /*
1128                          * Another wiphy is on another channel, start the new
1129                          * wiphy in paused state.
1130                          */
1131                         aphy->state = ATH_WIPHY_PAUSED;
1132                         ieee80211_stop_queues(hw);
1133                 }
1134                 mutex_unlock(&sc->mutex);
1135                 return 0;
1136         }
1137         aphy->state = ATH_WIPHY_ACTIVE;
1138
1139         /* setup initial channel */
1140
1141         sc->chan_idx = curchan->hw_value;
1142
1143         init_channel = ath_get_curchannel(sc, hw);
1144
1145         /* Reset SERDES registers */
1146         ath9k_hw_configpcipowersave(ah, 0, 0);
1147
1148         /*
1149          * The basic interface to setting the hardware in a good
1150          * state is ``reset''.  On return the hardware is known to
1151          * be powered up and with interrupts disabled.  This must
1152          * be followed by initialization of the appropriate bits
1153          * and then setup of the interrupt mask.
1154          */
1155         spin_lock_bh(&sc->sc_resetlock);
1156         r = ath9k_hw_reset(ah, init_channel, false);
1157         if (r) {
1158                 ath_print(common, ATH_DBG_FATAL,
1159                           "Unable to reset hardware; reset status %d "
1160                           "(freq %u MHz)\n", r,
1161                           curchan->center_freq);
1162                 spin_unlock_bh(&sc->sc_resetlock);
1163                 goto mutex_unlock;
1164         }
1165         spin_unlock_bh(&sc->sc_resetlock);
1166
1167         /*
1168          * This is needed only to setup initial state
1169          * but it's best done after a reset.
1170          */
1171         ath_update_txpow(sc);
1172
1173         /*
1174          * Setup the hardware after reset:
1175          * The receive engine is set going.
1176          * Frame transmit is handled entirely
1177          * in the frame output path; there's nothing to do
1178          * here except setup the interrupt mask.
1179          */
1180         if (ath_startrecv(sc) != 0) {
1181                 ath_print(common, ATH_DBG_FATAL,
1182                           "Unable to start recv logic\n");
1183                 r = -EIO;
1184                 goto mutex_unlock;
1185         }
1186
1187         /* Setup our intr mask. */
1188         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1189                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1190                     ATH9K_INT_GLOBAL;
1191
1192         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1193                 ah->imask |= ATH9K_INT_RXHP | ATH9K_INT_RXLP;
1194         else
1195                 ah->imask |= ATH9K_INT_RX;
1196
1197         if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
1198                 ah->imask |= ATH9K_INT_GTT;
1199
1200         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1201                 ah->imask |= ATH9K_INT_CST;
1202
1203         ath_cache_conf_rate(sc, &hw->conf);
1204
1205         sc->sc_flags &= ~SC_OP_INVALID;
1206
1207         /* Disable BMISS interrupt when we're not associated */
1208         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1209         ath9k_hw_set_interrupts(ah, ah->imask);
1210
1211         ieee80211_wake_queues(hw);
1212
1213         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1214
1215         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1216             !ah->btcoex_hw.enabled) {
1217                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1218                                            AR_STOMP_LOW_WLAN_WGHT);
1219                 ath9k_hw_btcoex_enable(ah);
1220
1221                 if (common->bus_ops->bt_coex_prep)
1222                         common->bus_ops->bt_coex_prep(common);
1223                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1224                         ath9k_btcoex_timer_resume(sc);
1225         }
1226
1227 mutex_unlock:
1228         mutex_unlock(&sc->mutex);
1229
1230         return r;
1231 }
1232
1233 static int ath9k_tx(struct ieee80211_hw *hw,
1234                     struct sk_buff *skb)
1235 {
1236         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1237         struct ath_wiphy *aphy = hw->priv;
1238         struct ath_softc *sc = aphy->sc;
1239         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1240         struct ath_tx_control txctl;
1241         int padpos, padsize;
1242         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1243
1244         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1245                 ath_print(common, ATH_DBG_XMIT,
1246                           "ath9k: %s: TX in unexpected wiphy state "
1247                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1248                 goto exit;
1249         }
1250
1251         if (sc->ps_enabled) {
1252                 /*
1253                  * mac80211 does not set PM field for normal data frames, so we
1254                  * need to update that based on the current PS mode.
1255                  */
1256                 if (ieee80211_is_data(hdr->frame_control) &&
1257                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1258                     !ieee80211_has_pm(hdr->frame_control)) {
1259                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1260                                   "while in PS mode\n");
1261                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1262                 }
1263         }
1264
1265         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1266                 /*
1267                  * We are using PS-Poll and mac80211 can request TX while in
1268                  * power save mode. Need to wake up hardware for the TX to be
1269                  * completed and if needed, also for RX of buffered frames.
1270                  */
1271                 ath9k_ps_wakeup(sc);
1272                 ath9k_hw_setrxabort(sc->sc_ah, 0);
1273                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1274                         ath_print(common, ATH_DBG_PS,
1275                                   "Sending PS-Poll to pick a buffered frame\n");
1276                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1277                 } else {
1278                         ath_print(common, ATH_DBG_PS,
1279                                   "Wake up to complete TX\n");
1280                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1281                 }
1282                 /*
1283                  * The actual restore operation will happen only after
1284                  * the sc_flags bit is cleared. We are just dropping
1285                  * the ps_usecount here.
1286                  */
1287                 ath9k_ps_restore(sc);
1288         }
1289
1290         memset(&txctl, 0, sizeof(struct ath_tx_control));
1291
1292         /*
1293          * As a temporary workaround, assign seq# here; this will likely need
1294          * to be cleaned up to work better with Beacon transmission and virtual
1295          * BSSes.
1296          */
1297         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1298                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1299                         sc->tx.seq_no += 0x10;
1300                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1301                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1302         }
1303
1304         /* Add the padding after the header if this is not already done */
1305         padpos = ath9k_cmn_padpos(hdr->frame_control);
1306         padsize = padpos & 3;
1307         if (padsize && skb->len>padpos) {
1308                 if (skb_headroom(skb) < padsize)
1309                         return -1;
1310                 skb_push(skb, padsize);
1311                 memmove(skb->data, skb->data + padsize, padpos);
1312         }
1313
1314         /* Check if a tx queue is available */
1315
1316         txctl.txq = ath_test_get_txq(sc, skb);
1317         if (!txctl.txq)
1318                 goto exit;
1319
1320         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1321
1322         if (ath_tx_start(hw, skb, &txctl) != 0) {
1323                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1324                 goto exit;
1325         }
1326
1327         return 0;
1328 exit:
1329         dev_kfree_skb_any(skb);
1330         return 0;
1331 }
1332
1333 static void ath9k_stop(struct ieee80211_hw *hw)
1334 {
1335         struct ath_wiphy *aphy = hw->priv;
1336         struct ath_softc *sc = aphy->sc;
1337         struct ath_hw *ah = sc->sc_ah;
1338         struct ath_common *common = ath9k_hw_common(ah);
1339
1340         mutex_lock(&sc->mutex);
1341
1342         aphy->state = ATH_WIPHY_INACTIVE;
1343
1344         cancel_delayed_work_sync(&sc->ath_led_blink_work);
1345         cancel_delayed_work_sync(&sc->tx_complete_work);
1346
1347         if (!sc->num_sec_wiphy) {
1348                 cancel_delayed_work_sync(&sc->wiphy_work);
1349                 cancel_work_sync(&sc->chan_work);
1350         }
1351
1352         if (sc->sc_flags & SC_OP_INVALID) {
1353                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1354                 mutex_unlock(&sc->mutex);
1355                 return;
1356         }
1357
1358         if (ath9k_wiphy_started(sc)) {
1359                 mutex_unlock(&sc->mutex);
1360                 return; /* another wiphy still in use */
1361         }
1362
1363         /* Ensure HW is awake when we try to shut it down. */
1364         ath9k_ps_wakeup(sc);
1365
1366         if (ah->btcoex_hw.enabled) {
1367                 ath9k_hw_btcoex_disable(ah);
1368                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1369                         ath9k_btcoex_timer_pause(sc);
1370         }
1371
1372         /* make sure h/w will not generate any interrupt
1373          * before setting the invalid flag. */
1374         ath9k_hw_set_interrupts(ah, 0);
1375
1376         if (!(sc->sc_flags & SC_OP_INVALID)) {
1377                 ath_drain_all_txq(sc, false);
1378                 ath_stoprecv(sc);
1379                 ath9k_hw_phy_disable(ah);
1380         } else
1381                 sc->rx.rxlink = NULL;
1382
1383         /* disable HAL and put h/w to sleep */
1384         ath9k_hw_disable(ah);
1385         ath9k_hw_configpcipowersave(ah, 1, 1);
1386         ath9k_ps_restore(sc);
1387
1388         /* Finally, put the chip in FULL SLEEP mode */
1389         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1390
1391         sc->sc_flags |= SC_OP_INVALID;
1392
1393         mutex_unlock(&sc->mutex);
1394
1395         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1396 }
1397
1398 static int ath9k_add_interface(struct ieee80211_hw *hw,
1399                                struct ieee80211_vif *vif)
1400 {
1401         struct ath_wiphy *aphy = hw->priv;
1402         struct ath_softc *sc = aphy->sc;
1403         struct ath_hw *ah = sc->sc_ah;
1404         struct ath_common *common = ath9k_hw_common(ah);
1405         struct ath_vif *avp = (void *)vif->drv_priv;
1406         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1407         int ret = 0;
1408
1409         mutex_lock(&sc->mutex);
1410
1411         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1412             sc->nvifs > 0) {
1413                 ret = -ENOBUFS;
1414                 goto out;
1415         }
1416
1417         switch (vif->type) {
1418         case NL80211_IFTYPE_STATION:
1419                 ic_opmode = NL80211_IFTYPE_STATION;
1420                 break;
1421         case NL80211_IFTYPE_ADHOC:
1422         case NL80211_IFTYPE_AP:
1423         case NL80211_IFTYPE_MESH_POINT:
1424                 if (sc->nbcnvifs >= ATH_BCBUF) {
1425                         ret = -ENOBUFS;
1426                         goto out;
1427                 }
1428                 ic_opmode = vif->type;
1429                 break;
1430         default:
1431                 ath_print(common, ATH_DBG_FATAL,
1432                         "Interface type %d not yet supported\n", vif->type);
1433                 ret = -EOPNOTSUPP;
1434                 goto out;
1435         }
1436
1437         ath_print(common, ATH_DBG_CONFIG,
1438                   "Attach a VIF of type: %d\n", ic_opmode);
1439
1440         /* Set the VIF opmode */
1441         avp->av_opmode = ic_opmode;
1442         avp->av_bslot = -1;
1443
1444         sc->nvifs++;
1445
1446         if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1447                 ath9k_set_bssid_mask(hw);
1448
1449         if (sc->nvifs > 1)
1450                 goto out; /* skip global settings for secondary vif */
1451
1452         if (ic_opmode == NL80211_IFTYPE_AP) {
1453                 ath9k_hw_set_tsfadjust(ah, 1);
1454                 sc->sc_flags |= SC_OP_TSF_RESET;
1455         }
1456
1457         /* Set the device opmode */
1458         ah->opmode = ic_opmode;
1459
1460         /*
1461          * Enable MIB interrupts when there are hardware phy counters.
1462          * Note we only do this (at the moment) for station mode.
1463          */
1464         if ((vif->type == NL80211_IFTYPE_STATION) ||
1465             (vif->type == NL80211_IFTYPE_ADHOC) ||
1466             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1467                 if (ah->config.enable_ani)
1468                         ah->imask |= ATH9K_INT_MIB;
1469                 ah->imask |= ATH9K_INT_TSFOOR;
1470         }
1471
1472         ath9k_hw_set_interrupts(ah, ah->imask);
1473
1474         if (vif->type == NL80211_IFTYPE_AP    ||
1475             vif->type == NL80211_IFTYPE_ADHOC ||
1476             vif->type == NL80211_IFTYPE_MONITOR)
1477                 ath_start_ani(common);
1478
1479 out:
1480         mutex_unlock(&sc->mutex);
1481         return ret;
1482 }
1483
1484 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1485                                    struct ieee80211_vif *vif)
1486 {
1487         struct ath_wiphy *aphy = hw->priv;
1488         struct ath_softc *sc = aphy->sc;
1489         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1490         struct ath_vif *avp = (void *)vif->drv_priv;
1491         int i;
1492
1493         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1494
1495         mutex_lock(&sc->mutex);
1496
1497         /* Stop ANI */
1498         del_timer_sync(&common->ani.timer);
1499
1500         /* Reclaim beacon resources */
1501         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1502             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1503             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1504                 ath9k_ps_wakeup(sc);
1505                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1506                 ath9k_ps_restore(sc);
1507         }
1508
1509         ath_beacon_return(sc, avp);
1510         sc->sc_flags &= ~SC_OP_BEACONS;
1511
1512         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1513                 if (sc->beacon.bslot[i] == vif) {
1514                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1515                                "slot\n", __func__);
1516                         sc->beacon.bslot[i] = NULL;
1517                         sc->beacon.bslot_aphy[i] = NULL;
1518                 }
1519         }
1520
1521         sc->nvifs--;
1522
1523         mutex_unlock(&sc->mutex);
1524 }
1525
1526 void ath9k_enable_ps(struct ath_softc *sc)
1527 {
1528         struct ath_hw *ah = sc->sc_ah;
1529
1530         sc->ps_enabled = true;
1531         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1532                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1533                         ah->imask |= ATH9K_INT_TIM_TIMER;
1534                         ath9k_hw_set_interrupts(ah, ah->imask);
1535                 }
1536         }
1537         ath9k_hw_setrxabort(ah, 1);
1538 }
1539
1540 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1541 {
1542         struct ath_wiphy *aphy = hw->priv;
1543         struct ath_softc *sc = aphy->sc;
1544         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1545         struct ieee80211_conf *conf = &hw->conf;
1546         struct ath_hw *ah = sc->sc_ah;
1547         bool disable_radio;
1548
1549         mutex_lock(&sc->mutex);
1550
1551         /*
1552          * Leave this as the first check because we need to turn on the
1553          * radio if it was disabled before prior to processing the rest
1554          * of the changes. Likewise we must only disable the radio towards
1555          * the end.
1556          */
1557         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1558                 bool enable_radio;
1559                 bool all_wiphys_idle;
1560                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1561
1562                 spin_lock_bh(&sc->wiphy_lock);
1563                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1564                 ath9k_set_wiphy_idle(aphy, idle);
1565
1566                 enable_radio = (!idle && all_wiphys_idle);
1567
1568                 /*
1569                  * After we unlock here its possible another wiphy
1570                  * can be re-renabled so to account for that we will
1571                  * only disable the radio toward the end of this routine
1572                  * if by then all wiphys are still idle.
1573                  */
1574                 spin_unlock_bh(&sc->wiphy_lock);
1575
1576                 if (enable_radio) {
1577                         sc->ps_idle = false;
1578                         ath_radio_enable(sc, hw);
1579                         ath_print(common, ATH_DBG_CONFIG,
1580                                   "not-idle: enabling radio\n");
1581                 }
1582         }
1583
1584         /*
1585          * We just prepare to enable PS. We have to wait until our AP has
1586          * ACK'd our null data frame to disable RX otherwise we'll ignore
1587          * those ACKs and end up retransmitting the same null data frames.
1588          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1589          */
1590         if (changed & IEEE80211_CONF_CHANGE_PS) {
1591                 if (conf->flags & IEEE80211_CONF_PS) {
1592                         sc->ps_flags |= PS_ENABLED;
1593                         /*
1594                          * At this point we know hardware has received an ACK
1595                          * of a previously sent null data frame.
1596                          */
1597                         if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1598                                 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1599                                 ath9k_enable_ps(sc);
1600                         }
1601                 } else {
1602                         sc->ps_enabled = false;
1603                         sc->ps_flags &= ~(PS_ENABLED |
1604                                           PS_NULLFUNC_COMPLETED);
1605                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
1606                         if (!(ah->caps.hw_caps &
1607                               ATH9K_HW_CAP_AUTOSLEEP)) {
1608                                 ath9k_hw_setrxabort(sc->sc_ah, 0);
1609                                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1610                                                   PS_WAIT_FOR_CAB |
1611                                                   PS_WAIT_FOR_PSPOLL_DATA |
1612                                                   PS_WAIT_FOR_TX_ACK);
1613                                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1614                                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1615                                         ath9k_hw_set_interrupts(sc->sc_ah,
1616                                                         ah->imask);
1617                                 }
1618                         }
1619                 }
1620         }
1621
1622         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1623                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1624                         ath_print(common, ATH_DBG_CONFIG,
1625                                   "HW opmode set to Monitor mode\n");
1626                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1627                 }
1628         }
1629
1630         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1631                 struct ieee80211_channel *curchan = hw->conf.channel;
1632                 int pos = curchan->hw_value;
1633
1634                 aphy->chan_idx = pos;
1635                 aphy->chan_is_ht = conf_is_ht(conf);
1636
1637                 if (aphy->state == ATH_WIPHY_SCAN ||
1638                     aphy->state == ATH_WIPHY_ACTIVE)
1639                         ath9k_wiphy_pause_all_forced(sc, aphy);
1640                 else {
1641                         /*
1642                          * Do not change operational channel based on a paused
1643                          * wiphy changes.
1644                          */
1645                         goto skip_chan_change;
1646                 }
1647
1648                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1649                           curchan->center_freq);
1650
1651                 /* XXX: remove me eventualy */
1652                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1653
1654                 ath_update_chainmask(sc, conf_is_ht(conf));
1655
1656                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1657                         ath_print(common, ATH_DBG_FATAL,
1658                                   "Unable to set channel\n");
1659                         mutex_unlock(&sc->mutex);
1660                         return -EINVAL;
1661                 }
1662         }
1663
1664 skip_chan_change:
1665         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1666                 sc->config.txpowlimit = 2 * conf->power_level;
1667                 ath_update_txpow(sc);
1668         }
1669
1670         spin_lock_bh(&sc->wiphy_lock);
1671         disable_radio = ath9k_all_wiphys_idle(sc);
1672         spin_unlock_bh(&sc->wiphy_lock);
1673
1674         if (disable_radio) {
1675                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1676                 sc->ps_idle = true;
1677                 ath_radio_disable(sc, hw);
1678         }
1679
1680         mutex_unlock(&sc->mutex);
1681
1682         return 0;
1683 }
1684
1685 #define SUPPORTED_FILTERS                       \
1686         (FIF_PROMISC_IN_BSS |                   \
1687         FIF_ALLMULTI |                          \
1688         FIF_CONTROL |                           \
1689         FIF_PSPOLL |                            \
1690         FIF_OTHER_BSS |                         \
1691         FIF_BCN_PRBRESP_PROMISC |               \
1692         FIF_FCSFAIL)
1693
1694 /* FIXME: sc->sc_full_reset ? */
1695 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1696                                    unsigned int changed_flags,
1697                                    unsigned int *total_flags,
1698                                    u64 multicast)
1699 {
1700         struct ath_wiphy *aphy = hw->priv;
1701         struct ath_softc *sc = aphy->sc;
1702         u32 rfilt;
1703
1704         changed_flags &= SUPPORTED_FILTERS;
1705         *total_flags &= SUPPORTED_FILTERS;
1706
1707         sc->rx.rxfilter = *total_flags;
1708         ath9k_ps_wakeup(sc);
1709         rfilt = ath_calcrxfilter(sc);
1710         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1711         ath9k_ps_restore(sc);
1712
1713         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1714                   "Set HW RX filter: 0x%x\n", rfilt);
1715 }
1716
1717 static int ath9k_sta_add(struct ieee80211_hw *hw,
1718                          struct ieee80211_vif *vif,
1719                          struct ieee80211_sta *sta)
1720 {
1721         struct ath_wiphy *aphy = hw->priv;
1722         struct ath_softc *sc = aphy->sc;
1723
1724         ath_node_attach(sc, sta);
1725
1726         return 0;
1727 }
1728
1729 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1730                             struct ieee80211_vif *vif,
1731                             struct ieee80211_sta *sta)
1732 {
1733         struct ath_wiphy *aphy = hw->priv;
1734         struct ath_softc *sc = aphy->sc;
1735
1736         ath_node_detach(sc, sta);
1737
1738         return 0;
1739 }
1740
1741 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1742                          const struct ieee80211_tx_queue_params *params)
1743 {
1744         struct ath_wiphy *aphy = hw->priv;
1745         struct ath_softc *sc = aphy->sc;
1746         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1747         struct ath9k_tx_queue_info qi;
1748         int ret = 0, qnum;
1749
1750         if (queue >= WME_NUM_AC)
1751                 return 0;
1752
1753         mutex_lock(&sc->mutex);
1754
1755         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1756
1757         qi.tqi_aifs = params->aifs;
1758         qi.tqi_cwmin = params->cw_min;
1759         qi.tqi_cwmax = params->cw_max;
1760         qi.tqi_burstTime = params->txop;
1761         qnum = ath_get_hal_qnum(queue, sc);
1762
1763         ath_print(common, ATH_DBG_CONFIG,
1764                   "Configure tx [queue/halq] [%d/%d],  "
1765                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1766                   queue, qnum, params->aifs, params->cw_min,
1767                   params->cw_max, params->txop);
1768
1769         ret = ath_txq_update(sc, qnum, &qi);
1770         if (ret)
1771                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1772
1773         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1774                 if ((qnum == sc->tx.hwq_map[ATH9K_WME_AC_BE]) && !ret)
1775                         ath_beaconq_config(sc);
1776
1777         mutex_unlock(&sc->mutex);
1778
1779         return ret;
1780 }
1781
1782 static int ath9k_set_key(struct ieee80211_hw *hw,
1783                          enum set_key_cmd cmd,
1784                          struct ieee80211_vif *vif,
1785                          struct ieee80211_sta *sta,
1786                          struct ieee80211_key_conf *key)
1787 {
1788         struct ath_wiphy *aphy = hw->priv;
1789         struct ath_softc *sc = aphy->sc;
1790         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1791         int ret = 0;
1792
1793         if (modparam_nohwcrypt)
1794                 return -ENOSPC;
1795
1796         mutex_lock(&sc->mutex);
1797         ath9k_ps_wakeup(sc);
1798         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1799
1800         switch (cmd) {
1801         case SET_KEY:
1802                 ret = ath_key_config(common, vif, sta, key);
1803                 if (ret >= 0) {
1804                         key->hw_key_idx = ret;
1805                         /* push IV and Michael MIC generation to stack */
1806                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1807                         if (key->alg == ALG_TKIP)
1808                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1809                         if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
1810                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1811                         ret = 0;
1812                 }
1813                 break;
1814         case DISABLE_KEY:
1815                 ath_key_delete(common, key);
1816                 break;
1817         default:
1818                 ret = -EINVAL;
1819         }
1820
1821         ath9k_ps_restore(sc);
1822         mutex_unlock(&sc->mutex);
1823
1824         return ret;
1825 }
1826
1827 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1828                                    struct ieee80211_vif *vif,
1829                                    struct ieee80211_bss_conf *bss_conf,
1830                                    u32 changed)
1831 {
1832         struct ath_wiphy *aphy = hw->priv;
1833         struct ath_softc *sc = aphy->sc;
1834         struct ath_hw *ah = sc->sc_ah;
1835         struct ath_common *common = ath9k_hw_common(ah);
1836         struct ath_vif *avp = (void *)vif->drv_priv;
1837         int slottime;
1838         int error;
1839
1840         mutex_lock(&sc->mutex);
1841
1842         if (changed & BSS_CHANGED_BSSID) {
1843                 /* Set BSSID */
1844                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1845                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1846                 common->curaid = 0;
1847                 ath9k_hw_write_associd(ah);
1848
1849                 /* Set aggregation protection mode parameters */
1850                 sc->config.ath_aggr_prot = 0;
1851
1852                 /* Only legacy IBSS for now */
1853                 if (vif->type == NL80211_IFTYPE_ADHOC)
1854                         ath_update_chainmask(sc, 0);
1855
1856                 ath_print(common, ATH_DBG_CONFIG,
1857                           "BSSID: %pM aid: 0x%x\n",
1858                           common->curbssid, common->curaid);
1859
1860                 /* need to reconfigure the beacon */
1861                 sc->sc_flags &= ~SC_OP_BEACONS ;
1862         }
1863
1864         /* Enable transmission of beacons (AP, IBSS, MESH) */
1865         if ((changed & BSS_CHANGED_BEACON) ||
1866             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1867                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1868                 error = ath_beacon_alloc(aphy, vif);
1869                 if (!error)
1870                         ath_beacon_config(sc, vif);
1871         }
1872
1873         if (changed & BSS_CHANGED_ERP_SLOT) {
1874                 if (bss_conf->use_short_slot)
1875                         slottime = 9;
1876                 else
1877                         slottime = 20;
1878                 if (vif->type == NL80211_IFTYPE_AP) {
1879                         /*
1880                          * Defer update, so that connected stations can adjust
1881                          * their settings at the same time.
1882                          * See beacon.c for more details
1883                          */
1884                         sc->beacon.slottime = slottime;
1885                         sc->beacon.updateslot = UPDATE;
1886                 } else {
1887                         ah->slottime = slottime;
1888                         ath9k_hw_init_global_settings(ah);
1889                 }
1890         }
1891
1892         /* Disable transmission of beacons */
1893         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1894                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1895
1896         if (changed & BSS_CHANGED_BEACON_INT) {
1897                 sc->beacon_interval = bss_conf->beacon_int;
1898                 /*
1899                  * In case of AP mode, the HW TSF has to be reset
1900                  * when the beacon interval changes.
1901                  */
1902                 if (vif->type == NL80211_IFTYPE_AP) {
1903                         sc->sc_flags |= SC_OP_TSF_RESET;
1904                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1905                         error = ath_beacon_alloc(aphy, vif);
1906                         if (!error)
1907                                 ath_beacon_config(sc, vif);
1908                 } else {
1909                         ath_beacon_config(sc, vif);
1910                 }
1911         }
1912
1913         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1914                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1915                           bss_conf->use_short_preamble);
1916                 if (bss_conf->use_short_preamble)
1917                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1918                 else
1919                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1920         }
1921
1922         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1923                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1924                           bss_conf->use_cts_prot);
1925                 if (bss_conf->use_cts_prot &&
1926                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1927                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1928                 else
1929                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1930         }
1931
1932         if (changed & BSS_CHANGED_ASSOC) {
1933                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1934                         bss_conf->assoc);
1935                 ath9k_bss_assoc_info(sc, vif, bss_conf);
1936         }
1937
1938         mutex_unlock(&sc->mutex);
1939 }
1940
1941 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1942 {
1943         u64 tsf;
1944         struct ath_wiphy *aphy = hw->priv;
1945         struct ath_softc *sc = aphy->sc;
1946
1947         mutex_lock(&sc->mutex);
1948         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1949         mutex_unlock(&sc->mutex);
1950
1951         return tsf;
1952 }
1953
1954 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1955 {
1956         struct ath_wiphy *aphy = hw->priv;
1957         struct ath_softc *sc = aphy->sc;
1958
1959         mutex_lock(&sc->mutex);
1960         ath9k_hw_settsf64(sc->sc_ah, tsf);
1961         mutex_unlock(&sc->mutex);
1962 }
1963
1964 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1965 {
1966         struct ath_wiphy *aphy = hw->priv;
1967         struct ath_softc *sc = aphy->sc;
1968
1969         mutex_lock(&sc->mutex);
1970
1971         ath9k_ps_wakeup(sc);
1972         ath9k_hw_reset_tsf(sc->sc_ah);
1973         ath9k_ps_restore(sc);
1974
1975         mutex_unlock(&sc->mutex);
1976 }
1977
1978 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1979                               struct ieee80211_vif *vif,
1980                               enum ieee80211_ampdu_mlme_action action,
1981                               struct ieee80211_sta *sta,
1982                               u16 tid, u16 *ssn)
1983 {
1984         struct ath_wiphy *aphy = hw->priv;
1985         struct ath_softc *sc = aphy->sc;
1986         int ret = 0;
1987
1988         switch (action) {
1989         case IEEE80211_AMPDU_RX_START:
1990                 if (!(sc->sc_flags & SC_OP_RXAGGR))
1991                         ret = -ENOTSUPP;
1992                 break;
1993         case IEEE80211_AMPDU_RX_STOP:
1994                 break;
1995         case IEEE80211_AMPDU_TX_START:
1996                 ath9k_ps_wakeup(sc);
1997                 ath_tx_aggr_start(sc, sta, tid, ssn);
1998                 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1999                 ath9k_ps_restore(sc);
2000                 break;
2001         case IEEE80211_AMPDU_TX_STOP:
2002                 ath9k_ps_wakeup(sc);
2003                 ath_tx_aggr_stop(sc, sta, tid);
2004                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2005                 ath9k_ps_restore(sc);
2006                 break;
2007         case IEEE80211_AMPDU_TX_OPERATIONAL:
2008                 ath9k_ps_wakeup(sc);
2009                 ath_tx_aggr_resume(sc, sta, tid);
2010                 ath9k_ps_restore(sc);
2011                 break;
2012         default:
2013                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2014                           "Unknown AMPDU action\n");
2015         }
2016
2017         return ret;
2018 }
2019
2020 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2021 {
2022         struct ath_wiphy *aphy = hw->priv;
2023         struct ath_softc *sc = aphy->sc;
2024         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2025
2026         mutex_lock(&sc->mutex);
2027         if (ath9k_wiphy_scanning(sc)) {
2028                 printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
2029                        "same time\n");
2030                 /*
2031                  * Do not allow the concurrent scanning state for now. This
2032                  * could be improved with scanning control moved into ath9k.
2033                  */
2034                 mutex_unlock(&sc->mutex);
2035                 return;
2036         }
2037
2038         aphy->state = ATH_WIPHY_SCAN;
2039         ath9k_wiphy_pause_all_forced(sc, aphy);
2040         sc->sc_flags |= SC_OP_SCANNING;
2041         del_timer_sync(&common->ani.timer);
2042         cancel_delayed_work_sync(&sc->tx_complete_work);
2043         mutex_unlock(&sc->mutex);
2044 }
2045
2046 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2047 {
2048         struct ath_wiphy *aphy = hw->priv;
2049         struct ath_softc *sc = aphy->sc;
2050         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2051
2052         mutex_lock(&sc->mutex);
2053         aphy->state = ATH_WIPHY_ACTIVE;
2054         sc->sc_flags &= ~SC_OP_SCANNING;
2055         sc->sc_flags |= SC_OP_FULL_RESET;
2056         ath_start_ani(common);
2057         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
2058         ath_beacon_config(sc, NULL);
2059         mutex_unlock(&sc->mutex);
2060 }
2061
2062 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2063 {
2064         struct ath_wiphy *aphy = hw->priv;
2065         struct ath_softc *sc = aphy->sc;
2066         struct ath_hw *ah = sc->sc_ah;
2067
2068         mutex_lock(&sc->mutex);
2069         ah->coverage_class = coverage_class;
2070         ath9k_hw_init_global_settings(ah);
2071         mutex_unlock(&sc->mutex);
2072 }
2073
2074 struct ieee80211_ops ath9k_ops = {
2075         .tx                 = ath9k_tx,
2076         .start              = ath9k_start,
2077         .stop               = ath9k_stop,
2078         .add_interface      = ath9k_add_interface,
2079         .remove_interface   = ath9k_remove_interface,
2080         .config             = ath9k_config,
2081         .configure_filter   = ath9k_configure_filter,
2082         .sta_add            = ath9k_sta_add,
2083         .sta_remove         = ath9k_sta_remove,
2084         .conf_tx            = ath9k_conf_tx,
2085         .bss_info_changed   = ath9k_bss_info_changed,
2086         .set_key            = ath9k_set_key,
2087         .get_tsf            = ath9k_get_tsf,
2088         .set_tsf            = ath9k_set_tsf,
2089         .reset_tsf          = ath9k_reset_tsf,
2090         .ampdu_action       = ath9k_ampdu_action,
2091         .sw_scan_start      = ath9k_sw_scan_start,
2092         .sw_scan_complete   = ath9k_sw_scan_complete,
2093         .rfkill_poll        = ath9k_rfkill_poll_state,
2094         .set_coverage_class = ath9k_set_coverage_class,
2095 };