drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_cache_conf_rate(struct ath_softc *sc,
  22                                 struct ieee80211_conf *conf)
  23 {
  24         switch (conf->channel->band) {
  25         case IEEE80211_BAND_2GHZ:
  26                 if (conf_is_ht20(conf))
  27                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  28                 else if (conf_is_ht40_minus(conf))
  29                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  30                 else if (conf_is_ht40_plus(conf))
  31                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  32                 else
  33                         sc->cur_rate_mode = ATH9K_MODE_11G;
  34                 break;
  35         case IEEE80211_BAND_5GHZ:
  36                 if (conf_is_ht20(conf))
  37                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  38                 else if (conf_is_ht40_minus(conf))
  39                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  40                 else if (conf_is_ht40_plus(conf))
  41                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  42                 else
  43                         sc->cur_rate_mode = ATH9K_MODE_11A;
  44                 break;
  45         default:
  46                 BUG_ON(1);
  47                 break;
  48         }
  49 }
  50
  51 static void ath_update_txpow(struct ath_softc *sc)
  52 {
  53         struct ath_hw *ah = sc->sc_ah;
  54         u32 txpow;
  55
  56         if (sc->curtxpow != sc->config.txpowlimit) {
  57                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  58                 /* read back in case value is clamped */
  59                 ath9k_hw_getcapability(ah, ATH9K_CAP_TXPOW, 1, &txpow);
  60                 sc->curtxpow = txpow;
  61         }
  62 }
  63
  64 static u8 parse_mpdudensity(u8 mpdudensity)
  65 {
  66         /*
  67          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  68          *   0 for no restriction
  69          *   1 for 1/4 us
  70          *   2 for 1/2 us
  71          *   3 for 1 us
  72          *   4 for 2 us
  73          *   5 for 4 us
  74          *   6 for 8 us
  75          *   7 for 16 us
  76          */
  77         switch (mpdudensity) {
  78         case 0:
  79                 return 0;
  80         case 1:
  81         case 2:
  82         case 3:
  83                 /* Our lower layer calculations limit our precision to
  84                    1 microsecond */
  85                 return 1;
  86         case 4:
  87                 return 2;
  88         case 5:
  89                 return 4;
  90         case 6:
  91                 return 8;
  92         case 7:
  93                 return 16;
  94         default:
  95                 return 0;
  96         }
  97 }
  98
  99 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
 100                                                 struct ieee80211_hw *hw)
 101 {
 102         struct ieee80211_channel *curchan = hw->conf.channel;
 103         struct ath9k_channel *channel;
 104         u8 chan_idx;
 105
 106         chan_idx = curchan->hw_value;
 107         channel = &sc->sc_ah->channels[chan_idx];
 108         ath9k_update_ichannel(sc, hw, channel);
 109         return channel;
 110 }
 111
 112 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
 113 {
 114         unsigned long flags;
 115         bool ret;
 116
 117         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 118         ret = ath9k_hw_setpower(sc->sc_ah, mode);
 119         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 120
 121         return ret;
 122 }
 123
 124 void ath9k_ps_wakeup(struct ath_softc *sc)
 125 {
 126         unsigned long flags;
 127
 128         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 129         if (++sc->ps_usecount != 1)
 130                 goto unlock;
 131
 132         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 133
 134  unlock:
 135         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 136 }
 137
 138 void ath9k_ps_restore(struct ath_softc *sc)
 139 {
 140         unsigned long flags;
 141
 142         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 143         if (--sc->ps_usecount != 0)
 144                 goto unlock;
 145
 146         if (sc->ps_idle)
 147                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 148         else if (sc->ps_enabled &&
 149                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 150                               PS_WAIT_FOR_CAB |
 151                               PS_WAIT_FOR_PSPOLL_DATA |
 152                               PS_WAIT_FOR_TX_ACK)))
 153                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 154
 155  unlock:
 156         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 157 }
 158
 159 /*
 160  * Set/change channels.  If the channel is really being changed, it's done
 161  * by reseting the chip.  To accomplish this we must first cleanup any pending
 162  * DMA, then restart stuff.
 163 */
 164 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 165                     struct ath9k_channel *hchan)
 166 {
 167         struct ath_hw *ah = sc->sc_ah;
 168         struct ath_common *common = ath9k_hw_common(ah);
 169         struct ieee80211_conf *conf = &common->hw->conf;
 170         bool fastcc = true, stopped;
 171         struct ieee80211_channel *channel = hw->conf.channel;
 172         int r;
 173
 174         if (sc->sc_flags & SC_OP_INVALID)
 175                 return -EIO;
 176
 177         ath9k_ps_wakeup(sc);
 178
 179         /*
 180          * This is only performed if the channel settings have
 181          * actually changed.
 182          *
 183          * To switch channels clear any pending DMA operations;
 184          * wait long enough for the RX fifo to drain, reset the
 185          * hardware at the new frequency, and then re-enable
 186          * the relevant bits of the h/w.
 187          */
 188         ath9k_hw_set_interrupts(ah, 0);
 189         ath_drain_all_txq(sc, false);
 190         stopped = ath_stoprecv(sc);
 191
 192         /* XXX: do not flush receive queue here. We don't want
 193          * to flush data frames already in queue because of
 194          * changing channel. */
 195
 196         if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
 197                 fastcc = false;
 198
 199         ath_print(common, ATH_DBG_CONFIG,
 200                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
 201                   sc->sc_ah->curchan->channel,
 202                   channel->center_freq, conf_is_ht40(conf));
 203
 204         spin_lock_bh(&sc->sc_resetlock);
 205
 206         r = ath9k_hw_reset(ah, hchan, fastcc);
 207         if (r) {
 208                 ath_print(common, ATH_DBG_FATAL,
 209                           "Unable to reset channel (%u MHz), "
 210                           "reset status %d\n",
 211                           channel->center_freq, r);
 212                 spin_unlock_bh(&sc->sc_resetlock);
 213                 goto ps_restore;
 214         }
 215         spin_unlock_bh(&sc->sc_resetlock);
 216
 217         sc->sc_flags &= ~SC_OP_FULL_RESET;
 218
 219         if (ath_startrecv(sc) != 0) {
 220                 ath_print(common, ATH_DBG_FATAL,
 221                           "Unable to restart recv logic\n");
 222                 r = -EIO;
 223                 goto ps_restore;
 224         }
 225
 226         ath_cache_conf_rate(sc, &hw->conf);
 227         ath_update_txpow(sc);
 228         ath9k_hw_set_interrupts(ah, ah->imask);
 229
 230  ps_restore:
 231         ath9k_ps_restore(sc);
 232         return r;
 233 }
 234
 235 /*
 236  *  This routine performs the periodic noise floor calibration function
 237  *  that is used to adjust and optimize the chip performance.  This
 238  *  takes environmental changes (location, temperature) into account.
 239  *  When the task is complete, it reschedules itself depending on the
 240  *  appropriate interval that was calculated.
 241  */
 242 void ath_ani_calibrate(unsigned long data)
 243 {
 244         struct ath_softc *sc = (struct ath_softc *)data;
 245         struct ath_hw *ah = sc->sc_ah;
 246         struct ath_common *common = ath9k_hw_common(ah);
 247         bool longcal = false;
 248         bool shortcal = false;
 249         bool aniflag = false;
 250         unsigned int timestamp = jiffies_to_msecs(jiffies);
 251         u32 cal_interval, short_cal_interval;
 252
 253         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 254                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 255
 256         /* Only calibrate if awake */
 257         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 258                 goto set_timer;
 259
 260         ath9k_ps_wakeup(sc);
 261
 262         /* Long calibration runs independently of short calibration. */
 263         if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
 264                 longcal = true;
 265                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 266                 common->ani.longcal_timer = timestamp;
 267         }
 268
 269         /* Short calibration applies only while caldone is false */
 270         if (!common->ani.caldone) {
 271                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 272                         shortcal = true;
 273                         ath_print(common, ATH_DBG_ANI,
 274                                   "shortcal @%lu\n", jiffies);
 275                         common->ani.shortcal_timer = timestamp;
 276                         common->ani.resetcal_timer = timestamp;
 277                 }
 278         } else {
 279                 if ((timestamp - common->ani.resetcal_timer) >=
 280                     ATH_RESTART_CALINTERVAL) {
 281                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 282                         if (common->ani.caldone)
 283                                 common->ani.resetcal_timer = timestamp;
 284                 }
 285         }
 286
 287         /* Verify whether we must check ANI */
 288         if ((timestamp - common->ani.checkani_timer) >= ATH_ANI_POLLINTERVAL) {
 289                 aniflag = true;
 290                 common->ani.checkani_timer = timestamp;
 291         }
 292
 293         /* Skip all processing if there's nothing to do. */
 294         if (longcal || shortcal || aniflag) {
 295                 /* Call ANI routine if necessary */
 296                 if (aniflag)
 297                         ath9k_hw_ani_monitor(ah, ah->curchan);
 298
 299                 /* Perform calibration if necessary */
 300                 if (longcal || shortcal) {
 301                         common->ani.caldone =
 302                                 ath9k_hw_calibrate(ah,
 303                                                    ah->curchan,
 304                                                    common->rx_chainmask,
 305                                                    longcal);
 306
 307                         if (longcal)
 308                                 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
 309                                                                      ah->curchan);
 310
 311                         ath_print(common, ATH_DBG_ANI,
 312                                   " calibrate chan %u/%x nf: %d\n",
 313                                   ah->curchan->channel,
 314                                   ah->curchan->channelFlags,
 315                                   common->ani.noise_floor);
 316                 }
 317         }
 318
 319         ath9k_ps_restore(sc);
 320
 321 set_timer:
 322         /*
 323         * Set timer interval based on previous results.
 324         * The interval must be the shortest necessary to satisfy ANI,
 325         * short calibration and long calibration.
 326         */
 327         cal_interval = ATH_LONG_CALINTERVAL;
 328         if (sc->sc_ah->config.enable_ani)
 329                 cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL);
 330         if (!common->ani.caldone)
 331                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 332
 333         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 334 }
 335
 336 static void ath_start_ani(struct ath_common *common)
 337 {
 338         unsigned long timestamp = jiffies_to_msecs(jiffies);
 339
 340         common->ani.longcal_timer = timestamp;
 341         common->ani.shortcal_timer = timestamp;
 342         common->ani.checkani_timer = timestamp;
 343
 344         mod_timer(&common->ani.timer,
 345                   jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
 346 }
 347
 348 /*
 349  * Update tx/rx chainmask. For legacy association,
 350  * hard code chainmask to 1x1, for 11n association, use
 351  * the chainmask configuration, for bt coexistence, use
 352  * the chainmask configuration even in legacy mode.
 353  */
 354 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 355 {
 356         struct ath_hw *ah = sc->sc_ah;
 357         struct ath_common *common = ath9k_hw_common(ah);
 358
 359         if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
 360             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 361                 common->tx_chainmask = ah->caps.tx_chainmask;
 362                 common->rx_chainmask = ah->caps.rx_chainmask;
 363         } else {
 364                 common->tx_chainmask = 1;
 365                 common->rx_chainmask = 1;
 366         }
 367
 368         ath_print(common, ATH_DBG_CONFIG,
 369                   "tx chmask: %d, rx chmask: %d\n",
 370                   common->tx_chainmask,
 371                   common->rx_chainmask);
 372 }
 373
 374 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 375 {
 376         struct ath_node *an;
 377
 378         an = (struct ath_node *)sta->drv_priv;
 379
 380         if (sc->sc_flags & SC_OP_TXAGGR) {
 381                 ath_tx_node_init(sc, an);
 382                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 383                                      sta->ht_cap.ampdu_factor);
 384                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 385                 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
 386         }
 387 }
 388
 389 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 390 {
 391         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 392
 393         if (sc->sc_flags & SC_OP_TXAGGR)
 394                 ath_tx_node_cleanup(sc, an);
 395 }
 396
 397 void ath9k_tasklet(unsigned long data)
 398 {
 399         struct ath_softc *sc = (struct ath_softc *)data;
 400         struct ath_hw *ah = sc->sc_ah;
 401         struct ath_common *common = ath9k_hw_common(ah);
 402
 403         u32 status = sc->intrstatus;
 404         u32 rxmask;
 405
 406         ath9k_ps_wakeup(sc);
 407
 408         if (status & ATH9K_INT_FATAL) {
 409                 ath_reset(sc, false);
 410                 ath9k_ps_restore(sc);
 411                 return;
 412         }
 413
 414         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 415                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 416                           ATH9K_INT_RXORN);
 417         else
 418                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 419
 420         if (status & rxmask) {
 421                 spin_lock_bh(&sc->rx.rxflushlock);
 422
 423                 /* Check for high priority Rx first */
 424                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 425                     (status & ATH9K_INT_RXHP))
 426                         ath_rx_tasklet(sc, 0, true);
 427
 428                 ath_rx_tasklet(sc, 0, false);
 429                 spin_unlock_bh(&sc->rx.rxflushlock);
 430         }
 431
 432         if (status & ATH9K_INT_TX) {
 433                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 434                         ath_tx_edma_tasklet(sc);
 435                 else
 436                         ath_tx_tasklet(sc);
 437         }
 438
 439         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 440                 /*
 441                  * TSF sync does not look correct; remain awake to sync with
 442                  * the next Beacon.
 443                  */
 444                 ath_print(common, ATH_DBG_PS,
 445                           "TSFOOR - Sync with next Beacon\n");
 446                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 447         }
 448
 449         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 450                 if (status & ATH9K_INT_GENTIMER)
 451                         ath_gen_timer_isr(sc->sc_ah);
 452
 453         /* re-enable hardware interrupt */
 454         ath9k_hw_set_interrupts(ah, ah->imask);
 455         ath9k_ps_restore(sc);
 456 }
 457
 458 irqreturn_t ath_isr(int irq, void *dev)
 459 {
 460 #define SCHED_INTR (                            \
 461                 ATH9K_INT_FATAL |               \
 462                 ATH9K_INT_RXORN |               \
 463                 ATH9K_INT_RXEOL |               \
 464                 ATH9K_INT_RX |                  \
 465                 ATH9K_INT_RXLP |                \
 466                 ATH9K_INT_RXHP |                \
 467                 ATH9K_INT_TX |                  \
 468                 ATH9K_INT_BMISS |               \
 469                 ATH9K_INT_CST |                 \
 470                 ATH9K_INT_TSFOOR |              \
 471                 ATH9K_INT_GENTIMER)
 472
 473         struct ath_softc *sc = dev;
 474         struct ath_hw *ah = sc->sc_ah;
 475         enum ath9k_int status;
 476         bool sched = false;
 477
 478         /*
 479          * The hardware is not ready/present, don't
 480          * touch anything. Note this can happen early
 481          * on if the IRQ is shared.
 482          */
 483         if (sc->sc_flags & SC_OP_INVALID)
 484                 return IRQ_NONE;
 485
 486
 487         /* shared irq, not for us */
 488
 489         if (!ath9k_hw_intrpend(ah))
 490                 return IRQ_NONE;
 491
 492         /*
 493          * Figure out the reason(s) for the interrupt.  Note
 494          * that the hal returns a pseudo-ISR that may include
 495          * bits we haven't explicitly enabled so we mask the
 496          * value to insure we only process bits we requested.
 497          */
 498         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 499         status &= ah->imask;    /* discard unasked-for bits */
 500
 501         /*
 502          * If there are no status bits set, then this interrupt was not
 503          * for me (should have been caught above).
 504          */
 505         if (!status)
 506                 return IRQ_NONE;
 507
 508         /* Cache the status */
 509         sc->intrstatus = status;
 510
 511         if (status & SCHED_INTR)
 512                 sched = true;
 513
 514         /*
 515          * If a FATAL or RXORN interrupt is received, we have to reset the
 516          * chip immediately.
 517          */
 518         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 519             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 520                 goto chip_reset;
 521
 522         if (status & ATH9K_INT_SWBA)
 523                 tasklet_schedule(&sc->bcon_tasklet);
 524
 525         if (status & ATH9K_INT_TXURN)
 526                 ath9k_hw_updatetxtriglevel(ah, true);
 527
 528         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 529                 if (status & ATH9K_INT_RXEOL) {
 530                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 531                         ath9k_hw_set_interrupts(ah, ah->imask);
 532                 }
 533         }
 534
 535         if (status & ATH9K_INT_MIB) {
 536                 /*
 537                  * Disable interrupts until we service the MIB
 538                  * interrupt; otherwise it will continue to
 539                  * fire.
 540                  */
 541                 ath9k_hw_set_interrupts(ah, 0);
 542                 /*
 543                  * Let the hal handle the event. We assume
 544                  * it will clear whatever condition caused
 545                  * the interrupt.
 546                  */
 547                 ath9k_hw_procmibevent(ah);
 548                 ath9k_hw_set_interrupts(ah, ah->imask);
 549         }
 550
 551         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 552                 if (status & ATH9K_INT_TIM_TIMER) {
 553                         /* Clear RxAbort bit so that we can
 554                          * receive frames */
 555                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 556                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 557                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 558                 }
 559
 560 chip_reset:
 561
 562         ath_debug_stat_interrupt(sc, status);
 563
 564         if (sched) {
 565                 /* turn off every interrupt except SWBA */
 566                 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
 567                 tasklet_schedule(&sc->intr_tq);
 568         }
 569
 570         return IRQ_HANDLED;
 571
 572 #undef SCHED_INTR
 573 }
 574
 575 static u32 ath_get_extchanmode(struct ath_softc *sc,
 576                                struct ieee80211_channel *chan,
 577                                enum nl80211_channel_type channel_type)
 578 {
 579         u32 chanmode = 0;
 580
 581         switch (chan->band) {
 582         case IEEE80211_BAND_2GHZ:
 583                 switch(channel_type) {
 584                 case NL80211_CHAN_NO_HT:
 585                 case NL80211_CHAN_HT20:
 586                         chanmode = CHANNEL_G_HT20;
 587                         break;
 588                 case NL80211_CHAN_HT40PLUS:
 589                         chanmode = CHANNEL_G_HT40PLUS;
 590                         break;
 591                 case NL80211_CHAN_HT40MINUS:
 592                         chanmode = CHANNEL_G_HT40MINUS;
 593                         break;
 594                 }
 595                 break;
 596         case IEEE80211_BAND_5GHZ:
 597                 switch(channel_type) {
 598                 case NL80211_CHAN_NO_HT:
 599                 case NL80211_CHAN_HT20:
 600                         chanmode = CHANNEL_A_HT20;
 601                         break;
 602                 case NL80211_CHAN_HT40PLUS:
 603                         chanmode = CHANNEL_A_HT40PLUS;
 604                         break;
 605                 case NL80211_CHAN_HT40MINUS:
 606                         chanmode = CHANNEL_A_HT40MINUS;
 607                         break;
 608                 }
 609                 break;
 610         default:
 611                 break;
 612         }
 613
 614         return chanmode;
 615 }
 616
 617 static int ath_setkey_tkip(struct ath_common *common, u16 keyix, const u8 *key,
 618                            struct ath9k_keyval *hk, const u8 *addr,
 619                            bool authenticator)
 620 {
 621         struct ath_hw *ah = common->ah;
 622         const u8 *key_rxmic;
 623         const u8 *key_txmic;
 624
 625         key_txmic = key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
 626         key_rxmic = key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
 627
 628         if (addr == NULL) {
 629                 /*
 630                  * Group key installation - only two key cache entries are used
 631                  * regardless of splitmic capability since group key is only
 632                  * used either for TX or RX.
 633                  */
 634                 if (authenticator) {
 635                         memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
 636                         memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_mic));
 637                 } else {
 638                         memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 639                         memcpy(hk->kv_txmic, key_rxmic, sizeof(hk->kv_mic));
 640                 }
 641                 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
 642         }
 643         if (!common->splitmic) {
 644                 /* TX and RX keys share the same key cache entry. */
 645                 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 646                 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
 647                 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
 648         }
 649
 650         /* Separate key cache entries for TX and RX */
 651
 652         /* TX key goes at first index, RX key at +32. */
 653         memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
 654         if (!ath9k_hw_set_keycache_entry(ah, keyix, hk, NULL)) {
 655                 /* TX MIC entry failed. No need to proceed further */
 656                 ath_print(common, ATH_DBG_FATAL,
 657                           "Setting TX MIC Key Failed\n");
 658                 return 0;
 659         }
 660
 661         memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 662         /* XXX delete tx key on failure? */
 663         return ath9k_hw_set_keycache_entry(ah, keyix + 32, hk, addr);
 664 }
 665
 666 static int ath_reserve_key_cache_slot_tkip(struct ath_common *common)
 667 {
 668         int i;
 669
 670         for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
 671                 if (test_bit(i, common->keymap) ||
 672                     test_bit(i + 64, common->keymap))
 673                         continue; /* At least one part of TKIP key allocated */
 674                 if (common->splitmic &&
 675                     (test_bit(i + 32, common->keymap) ||
 676                      test_bit(i + 64 + 32, common->keymap)))
 677                         continue; /* At least one part of TKIP key allocated */
 678
 679                 /* Found a free slot for a TKIP key */
 680                 return i;
 681         }
 682         return -1;
 683 }
 684
 685 static int ath_reserve_key_cache_slot(struct ath_common *common)
 686 {
 687         int i;
 688
 689         /* First, try to find slots that would not be available for TKIP. */
 690         if (common->splitmic) {
 691                 for (i = IEEE80211_WEP_NKID; i < common->keymax / 4; i++) {
 692                         if (!test_bit(i, common->keymap) &&
 693                             (test_bit(i + 32, common->keymap) ||
 694                              test_bit(i + 64, common->keymap) ||
 695                              test_bit(i + 64 + 32, common->keymap)))
 696                                 return i;
 697                         if (!test_bit(i + 32, common->keymap) &&
 698                             (test_bit(i, common->keymap) ||
 699                              test_bit(i + 64, common->keymap) ||
 700                              test_bit(i + 64 + 32, common->keymap)))
 701                                 return i + 32;
 702                         if (!test_bit(i + 64, common->keymap) &&
 703                             (test_bit(i , common->keymap) ||
 704                              test_bit(i + 32, common->keymap) ||
 705                              test_bit(i + 64 + 32, common->keymap)))
 706                                 return i + 64;
 707                         if (!test_bit(i + 64 + 32, common->keymap) &&
 708                             (test_bit(i, common->keymap) ||
 709                              test_bit(i + 32, common->keymap) ||
 710                              test_bit(i + 64, common->keymap)))
 711                                 return i + 64 + 32;
 712                 }
 713         } else {
 714                 for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
 715                         if (!test_bit(i, common->keymap) &&
 716                             test_bit(i + 64, common->keymap))
 717                                 return i;
 718                         if (test_bit(i, common->keymap) &&
 719                             !test_bit(i + 64, common->keymap))
 720                                 return i + 64;
 721                 }
 722         }
 723
 724         /* No partially used TKIP slots, pick any available slot */
 725         for (i = IEEE80211_WEP_NKID; i < common->keymax; i++) {
 726                 /* Do not allow slots that could be needed for TKIP group keys
 727                  * to be used. This limitation could be removed if we know that
 728                  * TKIP will not be used. */
 729                 if (i >= 64 && i < 64 + IEEE80211_WEP_NKID)
 730                         continue;
 731                 if (common->splitmic) {
 732                         if (i >= 32 && i < 32 + IEEE80211_WEP_NKID)
 733                                 continue;
 734                         if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID)
 735                                 continue;
 736                 }
 737
 738                 if (!test_bit(i, common->keymap))
 739                         return i; /* Found a free slot for a key */
 740         }
 741
 742         /* No free slot found */
 743         return -1;
 744 }
 745
 746 static int ath_key_config(struct ath_common *common,
 747                           struct ieee80211_vif *vif,
 748                           struct ieee80211_sta *sta,
 749                           struct ieee80211_key_conf *key)
 750 {
 751         struct ath_hw *ah = common->ah;
 752         struct ath9k_keyval hk;
 753         const u8 *mac = NULL;
 754         int ret = 0;
 755         int idx;
 756
 757         memset(&hk, 0, sizeof(hk));
 758
 759         switch (key->alg) {
 760         case ALG_WEP:
 761                 hk.kv_type = ATH9K_CIPHER_WEP;
 762                 break;
 763         case ALG_TKIP:
 764                 hk.kv_type = ATH9K_CIPHER_TKIP;
 765                 break;
 766         case ALG_CCMP:
 767                 hk.kv_type = ATH9K_CIPHER_AES_CCM;
 768                 break;
 769         default:
 770                 return -EOPNOTSUPP;
 771         }
 772
 773         hk.kv_len = key->keylen;
 774         memcpy(hk.kv_val, key->key, key->keylen);
 775
 776         if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
 777                 /* For now, use the default keys for broadcast keys. This may
 778                  * need to change with virtual interfaces. */
 779                 idx = key->keyidx;
 780         } else if (key->keyidx) {
 781                 if (WARN_ON(!sta))
 782                         return -EOPNOTSUPP;
 783                 mac = sta->addr;
 784
 785                 if (vif->type != NL80211_IFTYPE_AP) {
 786                         /* Only keyidx 0 should be used with unicast key, but
 787                          * allow this for client mode for now. */
 788                         idx = key->keyidx;
 789                 } else
 790                         return -EIO;
 791         } else {
 792                 if (WARN_ON(!sta))
 793                         return -EOPNOTSUPP;
 794                 mac = sta->addr;
 795
 796                 if (key->alg == ALG_TKIP)
 797                         idx = ath_reserve_key_cache_slot_tkip(common);
 798                 else
 799                         idx = ath_reserve_key_cache_slot(common);
 800                 if (idx < 0)
 801                         return -ENOSPC; /* no free key cache entries */
 802         }
 803
 804         if (key->alg == ALG_TKIP)
 805                 ret = ath_setkey_tkip(common, idx, key->key, &hk, mac,
 806                                       vif->type == NL80211_IFTYPE_AP);
 807         else
 808                 ret = ath9k_hw_set_keycache_entry(ah, idx, &hk, mac);
 809
 810         if (!ret)
 811                 return -EIO;
 812
 813         set_bit(idx, common->keymap);
 814         if (key->alg == ALG_TKIP) {
 815                 set_bit(idx + 64, common->keymap);
 816                 if (common->splitmic) {
 817                         set_bit(idx + 32, common->keymap);
 818                         set_bit(idx + 64 + 32, common->keymap);
 819                 }
 820         }
 821
 822         return idx;
 823 }
 824
 825 static void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key)
 826 {
 827         struct ath_hw *ah = common->ah;
 828
 829         ath9k_hw_keyreset(ah, key->hw_key_idx);
 830         if (key->hw_key_idx < IEEE80211_WEP_NKID)
 831                 return;
 832
 833         clear_bit(key->hw_key_idx, common->keymap);
 834         if (key->alg != ALG_TKIP)
 835                 return;
 836
 837         clear_bit(key->hw_key_idx + 64, common->keymap);
 838         if (common->splitmic) {
 839                 ath9k_hw_keyreset(ah, key->hw_key_idx + 32);
 840                 clear_bit(key->hw_key_idx + 32, common->keymap);
 841                 clear_bit(key->hw_key_idx + 64 + 32, common->keymap);
 842         }
 843 }
 844
 845 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 846                                  struct ieee80211_vif *vif,
 847                                  struct ieee80211_bss_conf *bss_conf)
 848 {
 849         struct ath_hw *ah = sc->sc_ah;
 850         struct ath_common *common = ath9k_hw_common(ah);
 851
 852         if (bss_conf->assoc) {
 853                 ath_print(common, ATH_DBG_CONFIG,
 854                           "Bss Info ASSOC %d, bssid: %pM\n",
 855                            bss_conf->aid, common->curbssid);
 856
 857                 /* New association, store aid */
 858                 common->curaid = bss_conf->aid;
 859                 ath9k_hw_write_associd(ah);
 860
 861                 /*
 862                  * Request a re-configuration of Beacon related timers
 863                  * on the receipt of the first Beacon frame (i.e.,
 864                  * after time sync with the AP).
 865                  */
 866                 sc->ps_flags |= PS_BEACON_SYNC;
 867
 868                 /* Configure the beacon */
 869                 ath_beacon_config(sc, vif);
 870
 871                 /* Reset rssi stats */
 872                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 873
 874                 ath_start_ani(common);
 875         } else {
 876                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 877                 common->curaid = 0;
 878                 /* Stop ANI */
 879                 del_timer_sync(&common->ani.timer);
 880         }
 881 }
 882
 883 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 884 {
 885         struct ath_hw *ah = sc->sc_ah;
 886         struct ath_common *common = ath9k_hw_common(ah);
 887         struct ieee80211_channel *channel = hw->conf.channel;
 888         int r;
 889
 890         ath9k_ps_wakeup(sc);
 891         ath9k_hw_configpcipowersave(ah, 0, 0);
 892
 893         if (!ah->curchan)
 894                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 895
 896         spin_lock_bh(&sc->sc_resetlock);
 897         r = ath9k_hw_reset(ah, ah->curchan, false);
 898         if (r) {
 899                 ath_print(common, ATH_DBG_FATAL,
 900                           "Unable to reset channel (%u MHz), "
 901                           "reset status %d\n",
 902                           channel->center_freq, r);
 903         }
 904         spin_unlock_bh(&sc->sc_resetlock);
 905
 906         ath_update_txpow(sc);
 907         if (ath_startrecv(sc) != 0) {
 908                 ath_print(common, ATH_DBG_FATAL,
 909                           "Unable to restart recv logic\n");
 910                 return;
 911         }
 912
 913         if (sc->sc_flags & SC_OP_BEACONS)
 914                 ath_beacon_config(sc, NULL);    /* restart beacons */
 915
 916         /* Re-Enable  interrupts */
 917         ath9k_hw_set_interrupts(ah, ah->imask);
 918
 919         /* Enable LED */
 920         ath9k_hw_cfg_output(ah, ah->led_pin,
 921                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 922         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 923
 924         ieee80211_wake_queues(hw);
 925         ath9k_ps_restore(sc);
 926 }
 927
 928 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 929 {
 930         struct ath_hw *ah = sc->sc_ah;
 931         struct ieee80211_channel *channel = hw->conf.channel;
 932         int r;
 933
 934         ath9k_ps_wakeup(sc);
 935         ieee80211_stop_queues(hw);
 936
 937         /* Disable LED */
 938         ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 939         ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 940
 941         /* Disable interrupts */
 942         ath9k_hw_set_interrupts(ah, 0);
 943
 944         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 945         ath_stoprecv(sc);               /* turn off frame recv */
 946         ath_flushrecv(sc);              /* flush recv queue */
 947
 948         if (!ah->curchan)
 949                 ah->curchan = ath_get_curchannel(sc, hw);
 950
 951         spin_lock_bh(&sc->sc_resetlock);
 952         r = ath9k_hw_reset(ah, ah->curchan, false);
 953         if (r) {
 954                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 955                           "Unable to reset channel (%u MHz), "
 956                           "reset status %d\n",
 957                           channel->center_freq, r);
 958         }
 959         spin_unlock_bh(&sc->sc_resetlock);
 960
 961         ath9k_hw_phy_disable(ah);
 962         ath9k_hw_configpcipowersave(ah, 1, 1);
 963         ath9k_ps_restore(sc);
 964         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 965 }
 966
 967 int ath_reset(struct ath_softc *sc, bool retry_tx)
 968 {
 969         struct ath_hw *ah = sc->sc_ah;
 970         struct ath_common *common = ath9k_hw_common(ah);
 971         struct ieee80211_hw *hw = sc->hw;
 972         int r;
 973
 974         /* Stop ANI */
 975         del_timer_sync(&common->ani.timer);
 976
 977         ieee80211_stop_queues(hw);
 978
 979         ath9k_hw_set_interrupts(ah, 0);
 980         ath_drain_all_txq(sc, retry_tx);
 981         ath_stoprecv(sc);
 982         ath_flushrecv(sc);
 983
 984         spin_lock_bh(&sc->sc_resetlock);
 985         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
 986         if (r)
 987                 ath_print(common, ATH_DBG_FATAL,
 988                           "Unable to reset hardware; reset status %d\n", r);
 989         spin_unlock_bh(&sc->sc_resetlock);
 990
 991         if (ath_startrecv(sc) != 0)
 992                 ath_print(common, ATH_DBG_FATAL,
 993                           "Unable to start recv logic\n");
 994
 995         /*
 996          * We may be doing a reset in response to a request
 997          * that changes the channel so update any state that
 998          * might change as a result.
 999          */
1000         ath_cache_conf_rate(sc, &hw->conf);
1001
1002         ath_update_txpow(sc);
1003
1004         if (sc->sc_flags & SC_OP_BEACONS)
1005                 ath_beacon_config(sc, NULL);    /* restart beacons */
1006
1007         ath9k_hw_set_interrupts(ah, ah->imask);
1008
1009         if (retry_tx) {
1010                 int i;
1011                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1012                         if (ATH_TXQ_SETUP(sc, i)) {
1013                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1014                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1015                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1016                         }
1017                 }
1018         }
1019
1020         ieee80211_wake_queues(hw);
1021
1022         /* Start ANI */
1023         ath_start_ani(common);
1024
1025         return r;
1026 }
1027
1028 int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1029 {
1030         int qnum;
1031
1032         switch (queue) {
1033         case 0:
1034                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VO];
1035                 break;
1036         case 1:
1037                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VI];
1038                 break;
1039         case 2:
1040                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
1041                 break;
1042         case 3:
1043                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BK];
1044                 break;
1045         default:
1046                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
1047                 break;
1048         }
1049
1050         return qnum;
1051 }
1052
1053 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1054 {
1055         int qnum;
1056
1057         switch (queue) {
1058         case ATH9K_WME_AC_VO:
1059                 qnum = 0;
1060                 break;
1061         case ATH9K_WME_AC_VI:
1062                 qnum = 1;
1063                 break;
1064         case ATH9K_WME_AC_BE:
1065                 qnum = 2;
1066                 break;
1067         case ATH9K_WME_AC_BK:
1068                 qnum = 3;
1069                 break;
1070         default:
1071                 qnum = -1;
1072                 break;
1073         }
1074
1075         return qnum;
1076 }
1077
1078 /* XXX: Remove me once we don't depend on ath9k_channel for all
1079  * this redundant data */
1080 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1081                            struct ath9k_channel *ichan)
1082 {
1083         struct ieee80211_channel *chan = hw->conf.channel;
1084         struct ieee80211_conf *conf = &hw->conf;
1085
1086         ichan->channel = chan->center_freq;
1087         ichan->chan = chan;
1088
1089         if (chan->band == IEEE80211_BAND_2GHZ) {
1090                 ichan->chanmode = CHANNEL_G;
1091                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1092         } else {
1093                 ichan->chanmode = CHANNEL_A;
1094                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1095         }
1096
1097         if (conf_is_ht(conf))
1098                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1099                                             conf->channel_type);
1100 }
1101
1102 /**********************/
1103 /* mac80211 callbacks */
1104 /**********************/
1105
1106 static int ath9k_start(struct ieee80211_hw *hw)
1107 {
1108         struct ath_wiphy *aphy = hw->priv;
1109         struct ath_softc *sc = aphy->sc;
1110         struct ath_hw *ah = sc->sc_ah;
1111         struct ath_common *common = ath9k_hw_common(ah);
1112         struct ieee80211_channel *curchan = hw->conf.channel;
1113         struct ath9k_channel *init_channel;
1114         int r;
1115
1116         ath_print(common, ATH_DBG_CONFIG,
1117                   "Starting driver with initial channel: %d MHz\n",
1118                   curchan->center_freq);
1119
1120         mutex_lock(&sc->mutex);
1121
1122         if (ath9k_wiphy_started(sc)) {
1123                 if (sc->chan_idx == curchan->hw_value) {
1124                         /*
1125                          * Already on the operational channel, the new wiphy
1126                          * can be marked active.
1127                          */
1128                         aphy->state = ATH_WIPHY_ACTIVE;
1129                         ieee80211_wake_queues(hw);
1130                 } else {
1131                         /*
1132                          * Another wiphy is on another channel, start the new
1133                          * wiphy in paused state.
1134                          */
1135                         aphy->state = ATH_WIPHY_PAUSED;
1136                         ieee80211_stop_queues(hw);
1137                 }
1138                 mutex_unlock(&sc->mutex);
1139                 return 0;
1140         }
1141         aphy->state = ATH_WIPHY_ACTIVE;
1142
1143         /* setup initial channel */
1144
1145         sc->chan_idx = curchan->hw_value;
1146
1147         init_channel = ath_get_curchannel(sc, hw);
1148
1149         /* Reset SERDES registers */
1150         ath9k_hw_configpcipowersave(ah, 0, 0);
1151
1152         /*
1153          * The basic interface to setting the hardware in a good
1154          * state is ``reset''.  On return the hardware is known to
1155          * be powered up and with interrupts disabled.  This must
1156          * be followed by initialization of the appropriate bits
1157          * and then setup of the interrupt mask.
1158          */
1159         spin_lock_bh(&sc->sc_resetlock);
1160         r = ath9k_hw_reset(ah, init_channel, false);
1161         if (r) {
1162                 ath_print(common, ATH_DBG_FATAL,
1163                           "Unable to reset hardware; reset status %d "
1164                           "(freq %u MHz)\n", r,
1165                           curchan->center_freq);
1166                 spin_unlock_bh(&sc->sc_resetlock);
1167                 goto mutex_unlock;
1168         }
1169         spin_unlock_bh(&sc->sc_resetlock);
1170
1171         /*
1172          * This is needed only to setup initial state
1173          * but it's best done after a reset.
1174          */
1175         ath_update_txpow(sc);
1176
1177         /*
1178          * Setup the hardware after reset:
1179          * The receive engine is set going.
1180          * Frame transmit is handled entirely
1181          * in the frame output path; there's nothing to do
1182          * here except setup the interrupt mask.
1183          */
1184         if (ath_startrecv(sc) != 0) {
1185                 ath_print(common, ATH_DBG_FATAL,
1186                           "Unable to start recv logic\n");
1187                 r = -EIO;
1188                 goto mutex_unlock;
1189         }
1190
1191         /* Setup our intr mask. */
1192         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1193                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1194                     ATH9K_INT_GLOBAL;
1195
1196         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1197                 ah->imask |= ATH9K_INT_RXHP | ATH9K_INT_RXLP;
1198         else
1199                 ah->imask |= ATH9K_INT_RX;
1200
1201         if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
1202                 ah->imask |= ATH9K_INT_GTT;
1203
1204         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1205                 ah->imask |= ATH9K_INT_CST;
1206
1207         ath_cache_conf_rate(sc, &hw->conf);
1208
1209         sc->sc_flags &= ~SC_OP_INVALID;
1210
1211         /* Disable BMISS interrupt when we're not associated */
1212         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1213         ath9k_hw_set_interrupts(ah, ah->imask);
1214
1215         ieee80211_wake_queues(hw);
1216
1217         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1218
1219         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1220             !ah->btcoex_hw.enabled) {
1221                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1222                                            AR_STOMP_LOW_WLAN_WGHT);
1223                 ath9k_hw_btcoex_enable(ah);
1224
1225                 if (common->bus_ops->bt_coex_prep)
1226                         common->bus_ops->bt_coex_prep(common);
1227                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1228                         ath9k_btcoex_timer_resume(sc);
1229         }
1230
1231 mutex_unlock:
1232         mutex_unlock(&sc->mutex);
1233
1234         return r;
1235 }
1236
1237 static int ath9k_tx(struct ieee80211_hw *hw,
1238                     struct sk_buff *skb)
1239 {
1240         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1241         struct ath_wiphy *aphy = hw->priv;
1242         struct ath_softc *sc = aphy->sc;
1243         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1244         struct ath_tx_control txctl;
1245         int padpos, padsize;
1246         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1247
1248         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1249                 ath_print(common, ATH_DBG_XMIT,
1250                           "ath9k: %s: TX in unexpected wiphy state "
1251                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1252                 goto exit;
1253         }
1254
1255         if (sc->ps_enabled) {
1256                 /*
1257                  * mac80211 does not set PM field for normal data frames, so we
1258                  * need to update that based on the current PS mode.
1259                  */
1260                 if (ieee80211_is_data(hdr->frame_control) &&
1261                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1262                     !ieee80211_has_pm(hdr->frame_control)) {
1263                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1264                                   "while in PS mode\n");
1265                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1266                 }
1267         }
1268
1269         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1270                 /*
1271                  * We are using PS-Poll and mac80211 can request TX while in
1272                  * power save mode. Need to wake up hardware for the TX to be
1273                  * completed and if needed, also for RX of buffered frames.
1274                  */
1275                 ath9k_ps_wakeup(sc);
1276                 ath9k_hw_setrxabort(sc->sc_ah, 0);
1277                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1278                         ath_print(common, ATH_DBG_PS,
1279                                   "Sending PS-Poll to pick a buffered frame\n");
1280                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1281                 } else {
1282                         ath_print(common, ATH_DBG_PS,
1283                                   "Wake up to complete TX\n");
1284                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1285                 }
1286                 /*
1287                  * The actual restore operation will happen only after
1288                  * the sc_flags bit is cleared. We are just dropping
1289                  * the ps_usecount here.
1290                  */
1291                 ath9k_ps_restore(sc);
1292         }
1293
1294         memset(&txctl, 0, sizeof(struct ath_tx_control));
1295
1296         /*
1297          * As a temporary workaround, assign seq# here; this will likely need
1298          * to be cleaned up to work better with Beacon transmission and virtual
1299          * BSSes.
1300          */
1301         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1302                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1303                         sc->tx.seq_no += 0x10;
1304                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1305                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1306         }
1307
1308         /* Add the padding after the header if this is not already done */
1309         padpos = ath9k_cmn_padpos(hdr->frame_control);
1310         padsize = padpos & 3;
1311         if (padsize && skb->len>padpos) {
1312                 if (skb_headroom(skb) < padsize)
1313                         return -1;
1314                 skb_push(skb, padsize);
1315                 memmove(skb->data, skb->data + padsize, padpos);
1316         }
1317
1318         /* Check if a tx queue is available */
1319
1320         txctl.txq = ath_test_get_txq(sc, skb);
1321         if (!txctl.txq)
1322                 goto exit;
1323
1324         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1325
1326         if (ath_tx_start(hw, skb, &txctl) != 0) {
1327                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1328                 goto exit;
1329         }
1330
1331         return 0;
1332 exit:
1333         dev_kfree_skb_any(skb);
1334         return 0;
1335 }
1336
1337 static void ath9k_stop(struct ieee80211_hw *hw)
1338 {
1339         struct ath_wiphy *aphy = hw->priv;
1340         struct ath_softc *sc = aphy->sc;
1341         struct ath_hw *ah = sc->sc_ah;
1342         struct ath_common *common = ath9k_hw_common(ah);
1343
1344         mutex_lock(&sc->mutex);
1345
1346         aphy->state = ATH_WIPHY_INACTIVE;
1347
1348         cancel_delayed_work_sync(&sc->ath_led_blink_work);
1349         cancel_delayed_work_sync(&sc->tx_complete_work);
1350
1351         if (!sc->num_sec_wiphy) {
1352                 cancel_delayed_work_sync(&sc->wiphy_work);
1353                 cancel_work_sync(&sc->chan_work);
1354         }
1355
1356         if (sc->sc_flags & SC_OP_INVALID) {
1357                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1358                 mutex_unlock(&sc->mutex);
1359                 return;
1360         }
1361
1362         if (ath9k_wiphy_started(sc)) {
1363                 mutex_unlock(&sc->mutex);
1364                 return; /* another wiphy still in use */
1365         }
1366
1367         /* Ensure HW is awake when we try to shut it down. */
1368         ath9k_ps_wakeup(sc);
1369
1370         if (ah->btcoex_hw.enabled) {
1371                 ath9k_hw_btcoex_disable(ah);
1372                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1373                         ath9k_btcoex_timer_pause(sc);
1374         }
1375
1376         /* make sure h/w will not generate any interrupt
1377          * before setting the invalid flag. */
1378         ath9k_hw_set_interrupts(ah, 0);
1379
1380         if (!(sc->sc_flags & SC_OP_INVALID)) {
1381                 ath_drain_all_txq(sc, false);
1382                 ath_stoprecv(sc);
1383                 ath9k_hw_phy_disable(ah);
1384         } else
1385                 sc->rx.rxlink = NULL;
1386
1387         /* disable HAL and put h/w to sleep */
1388         ath9k_hw_disable(ah);
1389         ath9k_hw_configpcipowersave(ah, 1, 1);
1390         ath9k_ps_restore(sc);
1391
1392         /* Finally, put the chip in FULL SLEEP mode */
1393         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1394
1395         sc->sc_flags |= SC_OP_INVALID;
1396
1397         mutex_unlock(&sc->mutex);
1398
1399         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1400 }
1401
1402 static int ath9k_add_interface(struct ieee80211_hw *hw,
1403                                struct ieee80211_vif *vif)
1404 {
1405         struct ath_wiphy *aphy = hw->priv;
1406         struct ath_softc *sc = aphy->sc;
1407         struct ath_hw *ah = sc->sc_ah;
1408         struct ath_common *common = ath9k_hw_common(ah);
1409         struct ath_vif *avp = (void *)vif->drv_priv;
1410         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1411         int ret = 0;
1412
1413         mutex_lock(&sc->mutex);
1414
1415         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1416             sc->nvifs > 0) {
1417                 ret = -ENOBUFS;
1418                 goto out;
1419         }
1420
1421         switch (vif->type) {
1422         case NL80211_IFTYPE_STATION:
1423                 ic_opmode = NL80211_IFTYPE_STATION;
1424                 break;
1425         case NL80211_IFTYPE_ADHOC:
1426         case NL80211_IFTYPE_AP:
1427         case NL80211_IFTYPE_MESH_POINT:
1428                 if (sc->nbcnvifs >= ATH_BCBUF) {
1429                         ret = -ENOBUFS;
1430                         goto out;
1431                 }
1432                 ic_opmode = vif->type;
1433                 break;
1434         default:
1435                 ath_print(common, ATH_DBG_FATAL,
1436                         "Interface type %d not yet supported\n", vif->type);
1437                 ret = -EOPNOTSUPP;
1438                 goto out;
1439         }
1440
1441         ath_print(common, ATH_DBG_CONFIG,
1442                   "Attach a VIF of type: %d\n", ic_opmode);
1443
1444         /* Set the VIF opmode */
1445         avp->av_opmode = ic_opmode;
1446         avp->av_bslot = -1;
1447
1448         sc->nvifs++;
1449
1450         if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1451                 ath9k_set_bssid_mask(hw);
1452
1453         if (sc->nvifs > 1)
1454                 goto out; /* skip global settings for secondary vif */
1455
1456         if (ic_opmode == NL80211_IFTYPE_AP) {
1457                 ath9k_hw_set_tsfadjust(ah, 1);
1458                 sc->sc_flags |= SC_OP_TSF_RESET;
1459         }
1460
1461         /* Set the device opmode */
1462         ah->opmode = ic_opmode;
1463
1464         /*
1465          * Enable MIB interrupts when there are hardware phy counters.
1466          * Note we only do this (at the moment) for station mode.
1467          */
1468         if ((vif->type == NL80211_IFTYPE_STATION) ||
1469             (vif->type == NL80211_IFTYPE_ADHOC) ||
1470             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1471                 if (ah->config.enable_ani)
1472                         ah->imask |= ATH9K_INT_MIB;
1473                 ah->imask |= ATH9K_INT_TSFOOR;
1474         }
1475
1476         ath9k_hw_set_interrupts(ah, ah->imask);
1477
1478         if (vif->type == NL80211_IFTYPE_AP    ||
1479             vif->type == NL80211_IFTYPE_ADHOC ||
1480             vif->type == NL80211_IFTYPE_MONITOR)
1481                 ath_start_ani(common);
1482
1483 out:
1484         mutex_unlock(&sc->mutex);
1485         return ret;
1486 }
1487
1488 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1489                                    struct ieee80211_vif *vif)
1490 {
1491         struct ath_wiphy *aphy = hw->priv;
1492         struct ath_softc *sc = aphy->sc;
1493         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1494         struct ath_vif *avp = (void *)vif->drv_priv;
1495         int i;
1496
1497         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1498
1499         mutex_lock(&sc->mutex);
1500
1501         /* Stop ANI */
1502         del_timer_sync(&common->ani.timer);
1503
1504         /* Reclaim beacon resources */
1505         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1506             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1507             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1508                 ath9k_ps_wakeup(sc);
1509                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1510                 ath9k_ps_restore(sc);
1511         }
1512
1513         ath_beacon_return(sc, avp);
1514         sc->sc_flags &= ~SC_OP_BEACONS;
1515
1516         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1517                 if (sc->beacon.bslot[i] == vif) {
1518                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1519                                "slot\n", __func__);
1520                         sc->beacon.bslot[i] = NULL;
1521                         sc->beacon.bslot_aphy[i] = NULL;
1522                 }
1523         }
1524
1525         sc->nvifs--;
1526
1527         mutex_unlock(&sc->mutex);
1528 }
1529
1530 void ath9k_enable_ps(struct ath_softc *sc)
1531 {
1532         struct ath_hw *ah = sc->sc_ah;
1533
1534         sc->ps_enabled = true;
1535         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1536                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1537                         ah->imask |= ATH9K_INT_TIM_TIMER;
1538                         ath9k_hw_set_interrupts(ah, ah->imask);
1539                 }
1540         }
1541         ath9k_hw_setrxabort(ah, 1);
1542 }
1543
1544 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1545 {
1546         struct ath_wiphy *aphy = hw->priv;
1547         struct ath_softc *sc = aphy->sc;
1548         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1549         struct ieee80211_conf *conf = &hw->conf;
1550         struct ath_hw *ah = sc->sc_ah;
1551         bool disable_radio;
1552
1553         mutex_lock(&sc->mutex);
1554
1555         /*
1556          * Leave this as the first check because we need to turn on the
1557          * radio if it was disabled before prior to processing the rest
1558          * of the changes. Likewise we must only disable the radio towards
1559          * the end.
1560          */
1561         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1562                 bool enable_radio;
1563                 bool all_wiphys_idle;
1564                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1565
1566                 spin_lock_bh(&sc->wiphy_lock);
1567                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1568                 ath9k_set_wiphy_idle(aphy, idle);
1569
1570                 enable_radio = (!idle && all_wiphys_idle);
1571
1572                 /*
1573                  * After we unlock here its possible another wiphy
1574                  * can be re-renabled so to account for that we will
1575                  * only disable the radio toward the end of this routine
1576                  * if by then all wiphys are still idle.
1577                  */
1578                 spin_unlock_bh(&sc->wiphy_lock);
1579
1580                 if (enable_radio) {
1581                         sc->ps_idle = false;
1582                         ath_radio_enable(sc, hw);
1583                         ath_print(common, ATH_DBG_CONFIG,
1584                                   "not-idle: enabling radio\n");
1585                 }
1586         }
1587
1588         /*
1589          * We just prepare to enable PS. We have to wait until our AP has
1590          * ACK'd our null data frame to disable RX otherwise we'll ignore
1591          * those ACKs and end up retransmitting the same null data frames.
1592          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1593          */
1594         if (changed & IEEE80211_CONF_CHANGE_PS) {
1595                 if (conf->flags & IEEE80211_CONF_PS) {
1596                         sc->ps_flags |= PS_ENABLED;
1597                         /*
1598                          * At this point we know hardware has received an ACK
1599                          * of a previously sent null data frame.
1600                          */
1601                         if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1602                                 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1603                                 ath9k_enable_ps(sc);
1604                         }
1605                 } else {
1606                         sc->ps_enabled = false;
1607                         sc->ps_flags &= ~(PS_ENABLED |
1608                                           PS_NULLFUNC_COMPLETED);
1609                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
1610                         if (!(ah->caps.hw_caps &
1611                               ATH9K_HW_CAP_AUTOSLEEP)) {
1612                                 ath9k_hw_setrxabort(sc->sc_ah, 0);
1613                                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1614                                                   PS_WAIT_FOR_CAB |
1615                                                   PS_WAIT_FOR_PSPOLL_DATA |
1616                                                   PS_WAIT_FOR_TX_ACK);
1617                                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1618                                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1619                                         ath9k_hw_set_interrupts(sc->sc_ah,
1620                                                         ah->imask);
1621                                 }
1622                         }
1623                 }
1624         }
1625
1626         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1627                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1628                         ath_print(common, ATH_DBG_CONFIG,
1629                                   "HW opmode set to Monitor mode\n");
1630                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1631                 }
1632         }
1633
1634         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1635                 struct ieee80211_channel *curchan = hw->conf.channel;
1636                 int pos = curchan->hw_value;
1637
1638                 aphy->chan_idx = pos;
1639                 aphy->chan_is_ht = conf_is_ht(conf);
1640
1641                 if (aphy->state == ATH_WIPHY_SCAN ||
1642                     aphy->state == ATH_WIPHY_ACTIVE)
1643                         ath9k_wiphy_pause_all_forced(sc, aphy);
1644                 else {
1645                         /*
1646                          * Do not change operational channel based on a paused
1647                          * wiphy changes.
1648                          */
1649                         goto skip_chan_change;
1650                 }
1651
1652                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1653                           curchan->center_freq);
1654
1655                 /* XXX: remove me eventualy */
1656                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1657
1658                 ath_update_chainmask(sc, conf_is_ht(conf));
1659
1660                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1661                         ath_print(common, ATH_DBG_FATAL,
1662                                   "Unable to set channel\n");
1663                         mutex_unlock(&sc->mutex);
1664                         return -EINVAL;
1665                 }
1666         }
1667
1668 skip_chan_change:
1669         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1670                 sc->config.txpowlimit = 2 * conf->power_level;
1671                 ath_update_txpow(sc);
1672         }
1673
1674         spin_lock_bh(&sc->wiphy_lock);
1675         disable_radio = ath9k_all_wiphys_idle(sc);
1676         spin_unlock_bh(&sc->wiphy_lock);
1677
1678         if (disable_radio) {
1679                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1680                 sc->ps_idle = true;
1681                 ath_radio_disable(sc, hw);
1682         }
1683
1684         mutex_unlock(&sc->mutex);
1685
1686         return 0;
1687 }
1688
1689 #define SUPPORTED_FILTERS                       \
1690         (FIF_PROMISC_IN_BSS |                   \
1691         FIF_ALLMULTI |                          \
1692         FIF_CONTROL |                           \
1693         FIF_PSPOLL |                            \
1694         FIF_OTHER_BSS |                         \
1695         FIF_BCN_PRBRESP_PROMISC |               \
1696         FIF_FCSFAIL)
1697
1698 /* FIXME: sc->sc_full_reset ? */
1699 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1700                                    unsigned int changed_flags,
1701                                    unsigned int *total_flags,
1702                                    u64 multicast)
1703 {
1704         struct ath_wiphy *aphy = hw->priv;
1705         struct ath_softc *sc = aphy->sc;
1706         u32 rfilt;
1707
1708         changed_flags &= SUPPORTED_FILTERS;
1709         *total_flags &= SUPPORTED_FILTERS;
1710
1711         sc->rx.rxfilter = *total_flags;
1712         ath9k_ps_wakeup(sc);
1713         rfilt = ath_calcrxfilter(sc);
1714         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1715         ath9k_ps_restore(sc);
1716
1717         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1718                   "Set HW RX filter: 0x%x\n", rfilt);
1719 }
1720
1721 static int ath9k_sta_add(struct ieee80211_hw *hw,
1722                          struct ieee80211_vif *vif,
1723                          struct ieee80211_sta *sta)
1724 {
1725         struct ath_wiphy *aphy = hw->priv;
1726         struct ath_softc *sc = aphy->sc;
1727
1728         ath_node_attach(sc, sta);
1729
1730         return 0;
1731 }
1732
1733 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1734                             struct ieee80211_vif *vif,
1735                             struct ieee80211_sta *sta)
1736 {
1737         struct ath_wiphy *aphy = hw->priv;
1738         struct ath_softc *sc = aphy->sc;
1739
1740         ath_node_detach(sc, sta);
1741
1742         return 0;
1743 }
1744
1745 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1746                          const struct ieee80211_tx_queue_params *params)
1747 {
1748         struct ath_wiphy *aphy = hw->priv;
1749         struct ath_softc *sc = aphy->sc;
1750         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1751         struct ath9k_tx_queue_info qi;
1752         int ret = 0, qnum;
1753
1754         if (queue >= WME_NUM_AC)
1755                 return 0;
1756
1757         mutex_lock(&sc->mutex);
1758
1759         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1760
1761         qi.tqi_aifs = params->aifs;
1762         qi.tqi_cwmin = params->cw_min;
1763         qi.tqi_cwmax = params->cw_max;
1764         qi.tqi_burstTime = params->txop;
1765         qnum = ath_get_hal_qnum(queue, sc);
1766
1767         ath_print(common, ATH_DBG_CONFIG,
1768                   "Configure tx [queue/halq] [%d/%d],  "
1769                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1770                   queue, qnum, params->aifs, params->cw_min,
1771                   params->cw_max, params->txop);
1772
1773         ret = ath_txq_update(sc, qnum, &qi);
1774         if (ret)
1775                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1776
1777         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1778                 if ((qnum == sc->tx.hwq_map[ATH9K_WME_AC_BE]) && !ret)
1779                         ath_beaconq_config(sc);
1780
1781         mutex_unlock(&sc->mutex);
1782
1783         return ret;
1784 }
1785
1786 static int ath9k_set_key(struct ieee80211_hw *hw,
1787                          enum set_key_cmd cmd,
1788                          struct ieee80211_vif *vif,
1789                          struct ieee80211_sta *sta,
1790                          struct ieee80211_key_conf *key)
1791 {
1792         struct ath_wiphy *aphy = hw->priv;
1793         struct ath_softc *sc = aphy->sc;
1794         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1795         int ret = 0;
1796
1797         if (modparam_nohwcrypt)
1798                 return -ENOSPC;
1799
1800         mutex_lock(&sc->mutex);
1801         ath9k_ps_wakeup(sc);
1802         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1803
1804         switch (cmd) {
1805         case SET_KEY:
1806                 ret = ath_key_config(common, vif, sta, key);
1807                 if (ret >= 0) {
1808                         key->hw_key_idx = ret;
1809                         /* push IV and Michael MIC generation to stack */
1810                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1811                         if (key->alg == ALG_TKIP)
1812                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1813                         if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
1814                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1815                         ret = 0;
1816                 }
1817                 break;
1818         case DISABLE_KEY:
1819                 ath_key_delete(common, key);
1820                 break;
1821         default:
1822                 ret = -EINVAL;
1823         }
1824
1825         ath9k_ps_restore(sc);
1826         mutex_unlock(&sc->mutex);
1827
1828         return ret;
1829 }
1830
1831 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1832                                    struct ieee80211_vif *vif,
1833                                    struct ieee80211_bss_conf *bss_conf,
1834                                    u32 changed)
1835 {
1836         struct ath_wiphy *aphy = hw->priv;
1837         struct ath_softc *sc = aphy->sc;
1838         struct ath_hw *ah = sc->sc_ah;
1839         struct ath_common *common = ath9k_hw_common(ah);
1840         struct ath_vif *avp = (void *)vif->drv_priv;
1841         int slottime;
1842         int error;
1843
1844         mutex_lock(&sc->mutex);
1845
1846         if (changed & BSS_CHANGED_BSSID) {
1847                 /* Set BSSID */
1848                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1849                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1850                 common->curaid = 0;
1851                 ath9k_hw_write_associd(ah);
1852
1853                 /* Set aggregation protection mode parameters */
1854                 sc->config.ath_aggr_prot = 0;
1855
1856                 /* Only legacy IBSS for now */
1857                 if (vif->type == NL80211_IFTYPE_ADHOC)
1858                         ath_update_chainmask(sc, 0);
1859
1860                 ath_print(common, ATH_DBG_CONFIG,
1861                           "BSSID: %pM aid: 0x%x\n",
1862                           common->curbssid, common->curaid);
1863
1864                 /* need to reconfigure the beacon */
1865                 sc->sc_flags &= ~SC_OP_BEACONS ;
1866         }
1867
1868         /* Enable transmission of beacons (AP, IBSS, MESH) */
1869         if ((changed & BSS_CHANGED_BEACON) ||
1870             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1871                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1872                 error = ath_beacon_alloc(aphy, vif);
1873                 if (!error)
1874                         ath_beacon_config(sc, vif);
1875         }
1876
1877         if (changed & BSS_CHANGED_ERP_SLOT) {
1878                 if (bss_conf->use_short_slot)
1879                         slottime = 9;
1880                 else
1881                         slottime = 20;
1882                 if (vif->type == NL80211_IFTYPE_AP) {
1883                         /*
1884                          * Defer update, so that connected stations can adjust
1885                          * their settings at the same time.
1886                          * See beacon.c for more details
1887                          */
1888                         sc->beacon.slottime = slottime;
1889                         sc->beacon.updateslot = UPDATE;
1890                 } else {
1891                         ah->slottime = slottime;
1892                         ath9k_hw_init_global_settings(ah);
1893                 }
1894         }
1895
1896         /* Disable transmission of beacons */
1897         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1898                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1899
1900         if (changed & BSS_CHANGED_BEACON_INT) {
1901                 sc->beacon_interval = bss_conf->beacon_int;
1902                 /*
1903                  * In case of AP mode, the HW TSF has to be reset
1904                  * when the beacon interval changes.
1905                  */
1906                 if (vif->type == NL80211_IFTYPE_AP) {
1907                         sc->sc_flags |= SC_OP_TSF_RESET;
1908                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1909                         error = ath_beacon_alloc(aphy, vif);
1910                         if (!error)
1911                                 ath_beacon_config(sc, vif);
1912                 } else {
1913                         ath_beacon_config(sc, vif);
1914                 }
1915         }
1916
1917         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1918                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1919                           bss_conf->use_short_preamble);
1920                 if (bss_conf->use_short_preamble)
1921                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1922                 else
1923                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1924         }
1925
1926         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1927                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1928                           bss_conf->use_cts_prot);
1929                 if (bss_conf->use_cts_prot &&
1930                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1931                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1932                 else
1933                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1934         }
1935
1936         if (changed & BSS_CHANGED_ASSOC) {
1937                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1938                         bss_conf->assoc);
1939                 ath9k_bss_assoc_info(sc, vif, bss_conf);
1940         }
1941
1942         mutex_unlock(&sc->mutex);
1943 }
1944
1945 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1946 {
1947         u64 tsf;
1948         struct ath_wiphy *aphy = hw->priv;
1949         struct ath_softc *sc = aphy->sc;
1950
1951         mutex_lock(&sc->mutex);
1952         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1953         mutex_unlock(&sc->mutex);
1954
1955         return tsf;
1956 }
1957
1958 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1959 {
1960         struct ath_wiphy *aphy = hw->priv;
1961         struct ath_softc *sc = aphy->sc;
1962
1963         mutex_lock(&sc->mutex);
1964         ath9k_hw_settsf64(sc->sc_ah, tsf);
1965         mutex_unlock(&sc->mutex);
1966 }
1967
1968 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1969 {
1970         struct ath_wiphy *aphy = hw->priv;
1971         struct ath_softc *sc = aphy->sc;
1972
1973         mutex_lock(&sc->mutex);
1974
1975         ath9k_ps_wakeup(sc);
1976         ath9k_hw_reset_tsf(sc->sc_ah);
1977         ath9k_ps_restore(sc);
1978
1979         mutex_unlock(&sc->mutex);
1980 }
1981
1982 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1983                               struct ieee80211_vif *vif,
1984                               enum ieee80211_ampdu_mlme_action action,
1985                               struct ieee80211_sta *sta,
1986                               u16 tid, u16 *ssn)
1987 {
1988         struct ath_wiphy *aphy = hw->priv;
1989         struct ath_softc *sc = aphy->sc;
1990         int ret = 0;
1991
1992         switch (action) {
1993         case IEEE80211_AMPDU_RX_START:
1994                 if (!(sc->sc_flags & SC_OP_RXAGGR))
1995                         ret = -ENOTSUPP;
1996                 break;
1997         case IEEE80211_AMPDU_RX_STOP:
1998                 break;
1999         case IEEE80211_AMPDU_TX_START:
2000                 ath9k_ps_wakeup(sc);
2001                 ath_tx_aggr_start(sc, sta, tid, ssn);
2002                 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2003                 ath9k_ps_restore(sc);
2004                 break;
2005         case IEEE80211_AMPDU_TX_STOP:
2006                 ath9k_ps_wakeup(sc);
2007                 ath_tx_aggr_stop(sc, sta, tid);
2008                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2009                 ath9k_ps_restore(sc);
2010                 break;
2011         case IEEE80211_AMPDU_TX_OPERATIONAL:
2012                 ath9k_ps_wakeup(sc);
2013                 ath_tx_aggr_resume(sc, sta, tid);
2014                 ath9k_ps_restore(sc);
2015                 break;
2016         default:
2017                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2018                           "Unknown AMPDU action\n");
2019         }
2020
2021         return ret;
2022 }
2023
2024 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2025 {
2026         struct ath_wiphy *aphy = hw->priv;
2027         struct ath_softc *sc = aphy->sc;
2028         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2029
2030         mutex_lock(&sc->mutex);
2031         if (ath9k_wiphy_scanning(sc)) {
2032                 printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
2033                        "same time\n");
2034                 /*
2035                  * Do not allow the concurrent scanning state for now. This
2036                  * could be improved with scanning control moved into ath9k.
2037                  */
2038                 mutex_unlock(&sc->mutex);
2039                 return;
2040         }
2041
2042         aphy->state = ATH_WIPHY_SCAN;
2043         ath9k_wiphy_pause_all_forced(sc, aphy);
2044         sc->sc_flags |= SC_OP_SCANNING;
2045         del_timer_sync(&common->ani.timer);
2046         cancel_delayed_work_sync(&sc->tx_complete_work);
2047         mutex_unlock(&sc->mutex);
2048 }
2049
2050 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2051 {
2052         struct ath_wiphy *aphy = hw->priv;
2053         struct ath_softc *sc = aphy->sc;
2054         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2055
2056         mutex_lock(&sc->mutex);
2057         aphy->state = ATH_WIPHY_ACTIVE;
2058         sc->sc_flags &= ~SC_OP_SCANNING;
2059         sc->sc_flags |= SC_OP_FULL_RESET;
2060         ath_start_ani(common);
2061         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
2062         ath_beacon_config(sc, NULL);
2063         mutex_unlock(&sc->mutex);
2064 }
2065
2066 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2067 {
2068         struct ath_wiphy *aphy = hw->priv;
2069         struct ath_softc *sc = aphy->sc;
2070         struct ath_hw *ah = sc->sc_ah;
2071
2072         mutex_lock(&sc->mutex);
2073         ah->coverage_class = coverage_class;
2074         ath9k_hw_init_global_settings(ah);
2075         mutex_unlock(&sc->mutex);
2076 }
2077
2078 struct ieee80211_ops ath9k_ops = {
2079         .tx                 = ath9k_tx,
2080         .start              = ath9k_start,
2081         .stop               = ath9k_stop,
2082         .add_interface      = ath9k_add_interface,
2083         .remove_interface   = ath9k_remove_interface,
2084         .config             = ath9k_config,
2085         .configure_filter   = ath9k_configure_filter,
2086         .sta_add            = ath9k_sta_add,
2087         .sta_remove         = ath9k_sta_remove,
2088         .conf_tx            = ath9k_conf_tx,
2089         .bss_info_changed   = ath9k_bss_info_changed,
2090         .set_key            = ath9k_set_key,
2091         .get_tsf            = ath9k_get_tsf,
2092         .set_tsf            = ath9k_set_tsf,
2093         .reset_tsf          = ath9k_reset_tsf,
2094         .ampdu_action       = ath9k_ampdu_action,
2095         .sw_scan_start      = ath9k_sw_scan_start,
2096         .sw_scan_complete   = ath9k_sw_scan_complete,
2097         .rfkill_poll        = ath9k_rfkill_poll_state,
2098         .set_coverage_class = ath9k_set_coverage_class,
2099 };