465574b70631c4e8c6fff819b52c7750ff682b86
[firefly-linux-kernel-4.4.55.git] / drivers / net / wireless / ath / ath9k / pci.c
1 /*
2  * Copyright (c) 2008-2011 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18
19 #include <linux/nl80211.h>
20 #include <linux/pci.h>
21 #include <linux/pci-aspm.h>
22 #include <linux/ath9k_platform.h>
23 #include <linux/module.h>
24 #include "ath9k.h"
25
26 static DEFINE_PCI_DEVICE_TABLE(ath_pci_id_table) = {
27         { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI   */
28         { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
29         { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI   */
30         { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI   */
31         { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
32
33         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
34                          0x002A,
35                          PCI_VENDOR_ID_AZWAVE,
36                          0x1C71),
37           .driver_data = ATH9K_PCI_D3_L1_WAR },
38         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
39                          0x002A,
40                          PCI_VENDOR_ID_FOXCONN,
41                          0xE01F),
42           .driver_data = ATH9K_PCI_D3_L1_WAR },
43         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
44                          0x002A,
45                          0x11AD, /* LITEON */
46                          0x6632),
47           .driver_data = ATH9K_PCI_D3_L1_WAR },
48         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
49                          0x002A,
50                          0x11AD, /* LITEON */
51                          0x6642),
52           .driver_data = ATH9K_PCI_D3_L1_WAR },
53         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
54                          0x002A,
55                          PCI_VENDOR_ID_QMI,
56                          0x0306),
57           .driver_data = ATH9K_PCI_D3_L1_WAR },
58         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
59                          0x002A,
60                          0x185F, /* WNC */
61                          0x309D),
62           .driver_data = ATH9K_PCI_D3_L1_WAR },
63         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
64                          0x002A,
65                          0x10CF, /* Fujitsu */
66                          0x147C),
67           .driver_data = ATH9K_PCI_D3_L1_WAR },
68         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
69                          0x002A,
70                          0x10CF, /* Fujitsu */
71                          0x147D),
72           .driver_data = ATH9K_PCI_D3_L1_WAR },
73         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
74                          0x002A,
75                          0x10CF, /* Fujitsu */
76                          0x1536),
77           .driver_data = ATH9K_PCI_D3_L1_WAR },
78
79         /* AR9285 card for Asus */
80         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
81                          0x002B,
82                          PCI_VENDOR_ID_AZWAVE,
83                          0x2C37),
84           .driver_data = ATH9K_PCI_BT_ANT_DIV },
85
86         { PCI_VDEVICE(ATHEROS, 0x002B) }, /* PCI-E */
87         { PCI_VDEVICE(ATHEROS, 0x002C) }, /* PCI-E 802.11n bonded out */
88         { PCI_VDEVICE(ATHEROS, 0x002D) }, /* PCI   */
89         { PCI_VDEVICE(ATHEROS, 0x002E) }, /* PCI-E */
90         { PCI_VDEVICE(ATHEROS, 0x0030) }, /* PCI-E  AR9300 */
91
92         /* PCI-E CUS198 */
93         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
94                          0x0032,
95                          PCI_VENDOR_ID_AZWAVE,
96                          0x2086),
97           .driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
98         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
99                          0x0032,
100                          PCI_VENDOR_ID_AZWAVE,
101                          0x1237),
102           .driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
103         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
104                          0x0032,
105                          PCI_VENDOR_ID_AZWAVE,
106                          0x2126),
107           .driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
108         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
109                          0x0032,
110                          PCI_VENDOR_ID_AZWAVE,
111                          0x126A),
112           .driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
113
114         /* PCI-E CUS230 */
115         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
116                          0x0032,
117                          PCI_VENDOR_ID_AZWAVE,
118                          0x2152),
119           .driver_data = ATH9K_PCI_CUS230 | ATH9K_PCI_BT_ANT_DIV },
120         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
121                          0x0032,
122                          PCI_VENDOR_ID_FOXCONN,
123                          0xE075),
124           .driver_data = ATH9K_PCI_CUS230 | ATH9K_PCI_BT_ANT_DIV },
125
126         /* WB225 */
127         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
128                          0x0032,
129                          PCI_VENDOR_ID_ATHEROS,
130                          0x3119),
131           .driver_data = ATH9K_PCI_BT_ANT_DIV },
132         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
133                          0x0032,
134                          PCI_VENDOR_ID_ATHEROS,
135                          0x3122),
136           .driver_data = ATH9K_PCI_BT_ANT_DIV },
137         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
138                          0x0032,
139                          0x185F, /* WNC */
140                          0x3119),
141           .driver_data = ATH9K_PCI_BT_ANT_DIV },
142         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
143                          0x0032,
144                          0x185F, /* WNC */
145                          0x3027),
146           .driver_data = ATH9K_PCI_BT_ANT_DIV },
147         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
148                          0x0032,
149                          PCI_VENDOR_ID_SAMSUNG,
150                          0x4105),
151           .driver_data = ATH9K_PCI_BT_ANT_DIV },
152         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
153                          0x0032,
154                          PCI_VENDOR_ID_SAMSUNG,
155                          0x4106),
156           .driver_data = ATH9K_PCI_BT_ANT_DIV },
157         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
158                          0x0032,
159                          PCI_VENDOR_ID_SAMSUNG,
160                          0x410D),
161           .driver_data = ATH9K_PCI_BT_ANT_DIV },
162         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
163                          0x0032,
164                          PCI_VENDOR_ID_SAMSUNG,
165                          0x410E),
166           .driver_data = ATH9K_PCI_BT_ANT_DIV },
167         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
168                          0x0032,
169                          PCI_VENDOR_ID_SAMSUNG,
170                          0x410F),
171           .driver_data = ATH9K_PCI_BT_ANT_DIV },
172         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
173                          0x0032,
174                          PCI_VENDOR_ID_SAMSUNG,
175                          0xC706),
176           .driver_data = ATH9K_PCI_BT_ANT_DIV },
177         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
178                          0x0032,
179                          PCI_VENDOR_ID_SAMSUNG,
180                          0xC680),
181           .driver_data = ATH9K_PCI_BT_ANT_DIV },
182         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
183                          0x0032,
184                          PCI_VENDOR_ID_SAMSUNG,
185                          0xC708),
186           .driver_data = ATH9K_PCI_BT_ANT_DIV },
187         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
188                          0x0032,
189                          PCI_VENDOR_ID_LENOVO,
190                          0x3218),
191           .driver_data = ATH9K_PCI_BT_ANT_DIV },
192         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
193                          0x0032,
194                          PCI_VENDOR_ID_LENOVO,
195                          0x3219),
196           .driver_data = ATH9K_PCI_BT_ANT_DIV },
197
198         { PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E  AR9485 */
199         { PCI_VDEVICE(ATHEROS, 0x0033) }, /* PCI-E  AR9580 */
200
201         /* PCI-E CUS217 */
202         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
203                          0x0034,
204                          PCI_VENDOR_ID_AZWAVE,
205                          0x2116),
206           .driver_data = ATH9K_PCI_CUS217 },
207         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
208                          0x0034,
209                          0x11AD, /* LITEON */
210                          0x6661),
211           .driver_data = ATH9K_PCI_CUS217 },
212
213         /* AR9462 with WoW support */
214         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
215                          0x0034,
216                          PCI_VENDOR_ID_ATHEROS,
217                          0x3117),
218           .driver_data = ATH9K_PCI_WOW },
219         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
220                          0x0034,
221                          PCI_VENDOR_ID_LENOVO,
222                          0x3214),
223           .driver_data = ATH9K_PCI_WOW },
224         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
225                          0x0034,
226                          PCI_VENDOR_ID_ATTANSIC,
227                          0x0091),
228           .driver_data = ATH9K_PCI_WOW },
229         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
230                          0x0034,
231                          PCI_VENDOR_ID_AZWAVE,
232                          0x2110),
233           .driver_data = ATH9K_PCI_WOW },
234         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
235                          0x0034,
236                          PCI_VENDOR_ID_ASUSTEK,
237                          0x850E),
238           .driver_data = ATH9K_PCI_WOW },
239         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
240                          0x0034,
241                          0x11AD, /* LITEON */
242                          0x6631),
243           .driver_data = ATH9K_PCI_WOW },
244         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
245                          0x0034,
246                          0x11AD, /* LITEON */
247                          0x6641),
248           .driver_data = ATH9K_PCI_WOW },
249         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
250                          0x0034,
251                          PCI_VENDOR_ID_HP,
252                          0x1864),
253           .driver_data = ATH9K_PCI_WOW },
254         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
255                          0x0034,
256                          0x14CD, /* USI */
257                          0x0063),
258           .driver_data = ATH9K_PCI_WOW },
259         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
260                          0x0034,
261                          0x14CD, /* USI */
262                          0x0064),
263           .driver_data = ATH9K_PCI_WOW },
264         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
265                          0x0034,
266                          0x10CF, /* Fujitsu */
267                          0x1783),
268           .driver_data = ATH9K_PCI_WOW },
269
270         { PCI_VDEVICE(ATHEROS, 0x0034) }, /* PCI-E  AR9462 */
271         { PCI_VDEVICE(ATHEROS, 0x0037) }, /* PCI-E  AR1111/AR9485 */
272
273         /* CUS252 */
274         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
275                          0x0036,
276                          PCI_VENDOR_ID_ATHEROS,
277                          0x3028),
278           .driver_data = ATH9K_PCI_CUS252 | ATH9K_PCI_BT_ANT_DIV },
279         { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
280                          0x0036,
281                          PCI_VENDOR_ID_AZWAVE,
282                          0x2176),
283           .driver_data = ATH9K_PCI_CUS252 | ATH9K_PCI_BT_ANT_DIV },
284
285         /* PCI-E AR9565 (WB335) */
286         { PCI_VDEVICE(ATHEROS, 0x0036),
287           .driver_data = ATH9K_PCI_BT_ANT_DIV },
288
289         { 0 }
290 };
291
292
293 /* return bus cachesize in 4B word units */
294 static void ath_pci_read_cachesize(struct ath_common *common, int *csz)
295 {
296         struct ath_softc *sc = (struct ath_softc *) common->priv;
297         u8 u8tmp;
298
299         pci_read_config_byte(to_pci_dev(sc->dev), PCI_CACHE_LINE_SIZE, &u8tmp);
300         *csz = (int)u8tmp;
301
302         /*
303          * This check was put in to avoid "unpleasant" consequences if
304          * the bootrom has not fully initialized all PCI devices.
305          * Sometimes the cache line size register is not set
306          */
307
308         if (*csz == 0)
309                 *csz = DEFAULT_CACHELINE >> 2;   /* Use the default size */
310 }
311
312 static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
313 {
314         struct ath_softc *sc = (struct ath_softc *) common->priv;
315         struct ath9k_platform_data *pdata = sc->dev->platform_data;
316
317         if (pdata) {
318                 if (off >= (ARRAY_SIZE(pdata->eeprom_data))) {
319                         ath_err(common,
320                                 "%s: eeprom read failed, offset %08x is out of range\n",
321                                 __func__, off);
322                 }
323
324                 *data = pdata->eeprom_data[off];
325         } else {
326                 struct ath_hw *ah = (struct ath_hw *) common->ah;
327
328                 common->ops->read(ah, AR5416_EEPROM_OFFSET +
329                                       (off << AR5416_EEPROM_S));
330
331                 if (!ath9k_hw_wait(ah,
332                                    AR_EEPROM_STATUS_DATA,
333                                    AR_EEPROM_STATUS_DATA_BUSY |
334                                    AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
335                                    AH_WAIT_TIMEOUT)) {
336                         return false;
337                 }
338
339                 *data = MS(common->ops->read(ah, AR_EEPROM_STATUS_DATA),
340                            AR_EEPROM_STATUS_DATA_VAL);
341         }
342
343         return true;
344 }
345
346 /* Need to be called after we discover btcoex capabilities */
347 static void ath_pci_aspm_init(struct ath_common *common)
348 {
349         struct ath_softc *sc = (struct ath_softc *) common->priv;
350         struct ath_hw *ah = sc->sc_ah;
351         struct pci_dev *pdev = to_pci_dev(sc->dev);
352         struct pci_dev *parent;
353         u16 aspm;
354
355         if (!ah->is_pciexpress)
356                 return;
357
358         parent = pdev->bus->self;
359         if (!parent)
360                 return;
361
362         if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) &&
363             (AR_SREV_9285(ah))) {
364                 /* Bluetooth coexistence requires disabling ASPM. */
365                 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL,
366                         PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1);
367
368                 /*
369                  * Both upstream and downstream PCIe components should
370                  * have the same ASPM settings.
371                  */
372                 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
373                         PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1);
374
375                 ath_info(common, "Disabling ASPM since BTCOEX is enabled\n");
376                 return;
377         }
378
379         /*
380          * 0x70c - Ack Frequency Register.
381          *
382          * Bits 27:29 - DEFAULT_L1_ENTRANCE_LATENCY.
383          *
384          * 000 : 1 us
385          * 001 : 2 us
386          * 010 : 4 us
387          * 011 : 8 us
388          * 100 : 16 us
389          * 101 : 32 us
390          * 110/111 : 64 us
391          */
392         if (AR_SREV_9462(ah))
393                 pci_read_config_dword(pdev, 0x70c, &ah->config.aspm_l1_fix);
394
395         pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm);
396         if (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1)) {
397                 ah->aspm_enabled = true;
398                 /* Initialize PCIe PM and SERDES registers. */
399                 ath9k_hw_configpcipowersave(ah, false);
400                 ath_info(common, "ASPM enabled: 0x%x\n", aspm);
401         }
402 }
403
404 static const struct ath_bus_ops ath_pci_bus_ops = {
405         .ath_bus_type = ATH_PCI,
406         .read_cachesize = ath_pci_read_cachesize,
407         .eeprom_read = ath_pci_eeprom_read,
408         .aspm_init = ath_pci_aspm_init,
409 };
410
411 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
412 {
413         struct ath_softc *sc;
414         struct ieee80211_hw *hw;
415         u8 csz;
416         u32 val;
417         int ret = 0;
418         char hw_name[64];
419
420         if (pcim_enable_device(pdev))
421                 return -EIO;
422
423         ret =  pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
424         if (ret) {
425                 pr_err("32-bit DMA not available\n");
426                 return ret;
427         }
428
429         ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
430         if (ret) {
431                 pr_err("32-bit DMA consistent DMA enable failed\n");
432                 return ret;
433         }
434
435         /*
436          * Cache line size is used to size and align various
437          * structures used to communicate with the hardware.
438          */
439         pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
440         if (csz == 0) {
441                 /*
442                  * Linux 2.4.18 (at least) writes the cache line size
443                  * register as a 16-bit wide register which is wrong.
444                  * We must have this setup properly for rx buffer
445                  * DMA to work so force a reasonable value here if it
446                  * comes up zero.
447                  */
448                 csz = L1_CACHE_BYTES / sizeof(u32);
449                 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
450         }
451         /*
452          * The default setting of latency timer yields poor results,
453          * set it to the value used by other systems. It may be worth
454          * tweaking this setting more.
455          */
456         pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
457
458         pci_set_master(pdev);
459
460         /*
461          * Disable the RETRY_TIMEOUT register (0x41) to keep
462          * PCI Tx retries from interfering with C3 CPU state.
463          */
464         pci_read_config_dword(pdev, 0x40, &val);
465         if ((val & 0x0000ff00) != 0)
466                 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
467
468         ret = pcim_iomap_regions(pdev, BIT(0), "ath9k");
469         if (ret) {
470                 dev_err(&pdev->dev, "PCI memory region reserve error\n");
471                 return -ENODEV;
472         }
473
474         hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
475         if (!hw) {
476                 dev_err(&pdev->dev, "No memory for ieee80211_hw\n");
477                 return -ENOMEM;
478         }
479
480         SET_IEEE80211_DEV(hw, &pdev->dev);
481         pci_set_drvdata(pdev, hw);
482
483         sc = hw->priv;
484         sc->hw = hw;
485         sc->dev = &pdev->dev;
486         sc->mem = pcim_iomap_table(pdev)[0];
487         sc->driver_data = id->driver_data;
488
489         /* Will be cleared in ath9k_start() */
490         set_bit(SC_OP_INVALID, &sc->sc_flags);
491
492         ret = request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath9k", sc);
493         if (ret) {
494                 dev_err(&pdev->dev, "request_irq failed\n");
495                 goto err_irq;
496         }
497
498         sc->irq = pdev->irq;
499
500         ret = ath9k_init_device(id->device, sc, &ath_pci_bus_ops);
501         if (ret) {
502                 dev_err(&pdev->dev, "Failed to initialize device\n");
503                 goto err_init;
504         }
505
506         ath9k_hw_name(sc->sc_ah, hw_name, sizeof(hw_name));
507         wiphy_info(hw->wiphy, "%s mem=0x%lx, irq=%d\n",
508                    hw_name, (unsigned long)sc->mem, pdev->irq);
509
510         return 0;
511
512 err_init:
513         free_irq(sc->irq, sc);
514 err_irq:
515         ieee80211_free_hw(hw);
516         return ret;
517 }
518
519 static void ath_pci_remove(struct pci_dev *pdev)
520 {
521         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
522         struct ath_softc *sc = hw->priv;
523
524         if (!is_ath9k_unloaded)
525                 sc->sc_ah->ah_flags |= AH_UNPLUGGED;
526         ath9k_deinit_device(sc);
527         free_irq(sc->irq, sc);
528         ieee80211_free_hw(sc->hw);
529 }
530
531 #ifdef CONFIG_PM_SLEEP
532
533 static int ath_pci_suspend(struct device *device)
534 {
535         struct pci_dev *pdev = to_pci_dev(device);
536         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
537         struct ath_softc *sc = hw->priv;
538
539         if (sc->wow_enabled)
540                 return 0;
541
542         /* The device has to be moved to FULLSLEEP forcibly.
543          * Otherwise the chip never moved to full sleep,
544          * when no interface is up.
545          */
546         ath9k_stop_btcoex(sc);
547         ath9k_hw_disable(sc->sc_ah);
548         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
549
550         return 0;
551 }
552
553 static int ath_pci_resume(struct device *device)
554 {
555         struct pci_dev *pdev = to_pci_dev(device);
556         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
557         struct ath_softc *sc = hw->priv;
558         struct ath_hw *ah = sc->sc_ah;
559         struct ath_common *common = ath9k_hw_common(ah);
560         u32 val;
561
562         /*
563          * Suspend/Resume resets the PCI configuration space, so we have to
564          * re-disable the RETRY_TIMEOUT register (0x41) to keep
565          * PCI Tx retries from interfering with C3 CPU state
566          */
567         pci_read_config_dword(pdev, 0x40, &val);
568         if ((val & 0x0000ff00) != 0)
569                 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
570
571         ath_pci_aspm_init(common);
572         ah->reset_power_on = false;
573
574         return 0;
575 }
576
577 static SIMPLE_DEV_PM_OPS(ath9k_pm_ops, ath_pci_suspend, ath_pci_resume);
578
579 #define ATH9K_PM_OPS    (&ath9k_pm_ops)
580
581 #else /* !CONFIG_PM_SLEEP */
582
583 #define ATH9K_PM_OPS    NULL
584
585 #endif /* !CONFIG_PM_SLEEP */
586
587
588 MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
589
590 static struct pci_driver ath_pci_driver = {
591         .name       = "ath9k",
592         .id_table   = ath_pci_id_table,
593         .probe      = ath_pci_probe,
594         .remove     = ath_pci_remove,
595         .driver.pm  = ATH9K_PM_OPS,
596 };
597
598 int ath_pci_init(void)
599 {
600         return pci_register_driver(&ath_pci_driver);
601 }
602
603 void ath_pci_exit(void)
604 {
605         pci_unregister_driver(&ath_pci_driver);
606 }