2 * Copyright (c) 2012-2014 Qualcomm Atheros, Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/netdevice.h>
21 #include <linux/wireless.h>
22 #include <net/cfg80211.h>
23 #include <linux/timex.h>
24 #include "wil_platform.h"
26 extern bool no_fw_recovery;
27 extern unsigned int mtu_max;
30 #define WIL_NAME "wil6210"
31 #define WIL_FW_NAME "wil6210.fw"
33 #define WIL_MAX_BUS_REQUEST_KBPS 800000 /* ~6.1Gbps */
37 #define WIL_BOARD_MARLON (1)
38 #define WIL_BOARD_SPARROW (2)
39 const char * const name;
43 * extract bits [@b0:@b1] (inclusive) from the value @x
44 * it should be @b0 <= @b1, or result is incorrect
46 static inline u32 WIL_GET_BITS(u32 x, int b0, int b1)
48 return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1);
51 #define WIL6210_MEM_SIZE (2*1024*1024UL)
53 #define WIL_RX_RING_SIZE_ORDER_DEFAULT (9)
54 #define WIL_TX_RING_SIZE_ORDER_DEFAULT (9)
55 /* limit ring size in range [32..32k] */
56 #define WIL_RING_SIZE_ORDER_MIN (5)
57 #define WIL_RING_SIZE_ORDER_MAX (15)
58 #define WIL6210_MAX_TX_RINGS (24) /* HW limit */
59 #define WIL6210_MAX_CID (8) /* HW limit */
60 #define WIL6210_NAPI_BUDGET (16) /* arbitrary */
61 #define WIL_MAX_AMPDU_SIZE (64 * 1024) /* FW/HW limit */
62 #define WIL_MAX_AGG_WSIZE (32) /* FW/HW limit */
63 /* Hardware offload block adds the following:
64 * 26 bytes - 3-address QoS data header
65 * 8 bytes - IV + EIV (for GCMP)
67 * 16 bytes - MIC (for GCMP)
70 #define WIL_MAX_MPDU_OVERHEAD (62)
72 /* Calculate MAC buffer size for the firmware. It includes all overhead,
73 * as it will go over the air, and need to be 8 byte aligned
75 static inline u32 wil_mtu2macbuf(u32 mtu)
77 return ALIGN(mtu + WIL_MAX_MPDU_OVERHEAD, 8);
80 /* MTU for Ethernet need to take into account 8-byte SNAP header
81 * to be added when encapsulating Ethernet frame into 802.11
83 #define WIL_MAX_ETH_MTU (IEEE80211_MAX_DATA_LEN_DMG - 8)
84 /* Max supported by wil6210 value for interrupt threshold is 5sec. */
85 #define WIL6210_ITR_TRSH_MAX (5000000)
86 #define WIL6210_ITR_TRSH_DEFAULT (300) /* usec */
87 #define WIL6210_FW_RECOVERY_RETRIES (5) /* try to recover this many times */
88 #define WIL6210_FW_RECOVERY_TO msecs_to_jiffies(5000)
89 #define WIL6210_SCAN_TO msecs_to_jiffies(10000)
91 /* Hardware definitions begin */
95 * RGF File | Host addr | FW addr
97 * user_rgf | 0x000000 | 0x880000
98 * dma_rgf | 0x001000 | 0x881000
99 * pcie_rgf | 0x002000 | 0x882000
103 /* Where various structures placed in host address space */
104 #define WIL6210_FW_HOST_OFF (0x880000UL)
106 #define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF)
109 * Interrupt control registers block
111 * each interrupt controlled by the same bit in all registers
114 u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */
115 u32 ICR; /* Cause, W1C/COR depending on ICC */
116 u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */
117 u32 ICS; /* Cause Set, WO */
118 u32 IMV; /* Mask, RW+S/C */
119 u32 IMS; /* Mask Set, write 1 to set */
120 u32 IMC; /* Mask Clear, write 1 to clear */
123 /* registers - FW addresses */
124 #define RGF_USER_USAGE_1 (0x880004)
125 #define RGF_USER_USAGE_6 (0x880018)
126 #define RGF_USER_HW_MACHINE_STATE (0x8801dc)
127 #define HW_MACHINE_BOOT_DONE (0x3fffffd)
128 #define RGF_USER_USER_CPU_0 (0x8801e0)
129 #define BIT_USER_USER_CPU_MAN_RST BIT(1) /* user_cpu_man_rst */
130 #define RGF_USER_MAC_CPU_0 (0x8801fc)
131 #define BIT_USER_MAC_CPU_MAN_RST BIT(1) /* mac_cpu_man_rst */
132 #define RGF_USER_USER_SCRATCH_PAD (0x8802bc)
133 #define RGF_USER_FW_REV_ID (0x880a8c) /* chip revision */
134 #define RGF_USER_CLKS_CTL_0 (0x880abc)
135 #define BIT_USER_CLKS_CAR_AHB_SW_SEL BIT(1) /* ref clk/PLL */
136 #define BIT_USER_CLKS_RST_PWGD BIT(11) /* reset on "power good" */
137 #define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04)
138 #define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08)
139 #define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c)
140 #define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10)
141 #define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14)
142 #define BIT_HPAL_PERST_FROM_PAD BIT(6)
143 #define BIT_CAR_PERST_RST BIT(7)
144 #define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */
145 #define BIT_USER_USER_ICR_SW_INT_2 BIT(18)
146 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0 (0x880c18)
147 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1 (0x880c2c)
148 #define RGF_USER_SPARROW_M_4 (0x880c50) /* Sparrow */
149 #define BIT_SPARROW_M_4_SEL_SLEEP_OR_REF BIT(2)
151 #define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */
152 #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0)
153 #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */
154 #define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */
155 #define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0)
156 #define BIT_DMA_EP_RX_ICR_RX_HTRSH BIT(1)
157 #define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */
158 #define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0)
159 #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1)
160 #define BIT_DMA_EP_MISC_ICR_FW_INT(n) BIT(28+n) /* n = [0..3] */
162 /* Interrupt moderation control */
163 #define RGF_DMA_ITR_CNT_TRSH (0x881c5c)
164 #define RGF_DMA_ITR_CNT_DATA (0x881c60)
165 #define RGF_DMA_ITR_CNT_CRL (0x881c64)
166 #define BIT_DMA_ITR_CNT_CRL_EN BIT(0)
167 #define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1)
168 #define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2)
169 #define BIT_DMA_ITR_CNT_CRL_CLR BIT(3)
170 #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4)
172 #define RGF_DMA_PSEUDO_CAUSE (0x881c68)
173 #define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c)
174 #define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70)
175 #define BIT_DMA_PSEUDO_CAUSE_RX BIT(0)
176 #define BIT_DMA_PSEUDO_CAUSE_TX BIT(1)
177 #define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2)
179 #define RGF_HP_CTRL (0x88265c)
180 #define RGF_PCIE_LOS_COUNTER_CTL (0x882dc4)
182 /* MAC timer, usec, for packet lifetime */
183 #define RGF_MAC_MTRL_COUNTER_0 (0x886aa8)
185 #define RGF_CAF_ICR (0x88946c) /* struct RGF_ICR */
186 #define RGF_CAF_OSC_CONTROL (0x88afa4)
187 #define BIT_CAF_OSC_XTAL_EN BIT(0)
188 #define RGF_CAF_PLL_LOCK_STATUS (0x88afec)
189 #define BIT_CAF_OSC_DIG_XTAL_STABLE BIT(0)
191 /* popular locations */
192 #define HOST_MBOX HOSTADDR(RGF_USER_USER_SCRATCH_PAD)
193 #define HOST_SW_INT (HOSTADDR(RGF_USER_USER_ICR) + \
194 offsetof(struct RGF_ICR, ICS))
195 #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2
197 /* ISR register bits */
198 #define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT(0)
199 #define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT(1)
200 #define ISR_MISC_FW_ERROR BIT_DMA_EP_MISC_ICR_FW_INT(3)
202 /* Hardware definitions end */
204 u32 from; /* linker address - from, inclusive */
205 u32 to; /* linker address - to, exclusive */
206 u32 host; /* PCI/Host address - BAR0 + 0x880000 */
207 const char *name; /* for debugfs */
210 /* array size should be in sync with actual definition in the wmi.c */
211 extern const struct fw_map fw_mapping[7];
214 * mk_cidxtid - construct @cidxtid field
218 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
220 static inline u8 mk_cidxtid(u8 cid, u8 tid)
222 return ((tid & 0xf) << 4) | (cid & 0xf);
226 * parse_cidxtid - parse @cidxtid field
227 * @cid: store CID value here
228 * @tid: store TID value here
230 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
232 static inline void parse_cidxtid(u8 cidxtid, u8 *cid, u8 *tid)
234 *cid = cidxtid & 0xf;
235 *tid = (cidxtid >> 4) & 0xf;
238 struct wil6210_mbox_ring {
240 u16 entry_size; /* max. size of mbox entry, incl. all headers */
246 struct wil6210_mbox_ring_desc {
251 /* at HOST_OFF_WIL6210_MBOX_CTL */
252 struct wil6210_mbox_ctl {
253 struct wil6210_mbox_ring tx;
254 struct wil6210_mbox_ring rx;
257 struct wil6210_mbox_hdr {
259 __le16 len; /* payload, bytes after this header */
265 #define WIL_MBOX_HDR_TYPE_WMI (0)
267 /* max. value for wil6210_mbox_hdr.len */
268 #define MAX_MBOXITEM_SIZE (240)
271 * struct wil6210_mbox_hdr_wmi - WMI header
274 * 00 - default, created by FW
275 * 01..0f - WiFi ports, driver to create
278 * @id: command/event ID
279 * @timestamp: FW fills for events, free-running msec timer
281 struct wil6210_mbox_hdr_wmi {
288 struct pending_wmi_event {
289 struct list_head list;
291 struct wil6210_mbox_hdr hdr;
292 struct wil6210_mbox_hdr_wmi wmi;
297 enum { /* for wil_ctx.mapped_as */
298 wil_mapped_as_none = 0,
299 wil_mapped_as_single = 1,
300 wil_mapped_as_page = 2,
304 * struct wil_ctx - software context for Vring descriptor
316 volatile union vring_desc *va; /* vring_desc[size], WriteBack by DMA */
317 u16 size; /* number of vring_desc elements */
320 u32 hwtail; /* write here to inform hw */
321 struct wil_ctx *ctx; /* ctx[size] - software context */
325 * Additional data for Tx Vring
327 struct vring_tx_data {
329 cycles_t idle, last_idle, begin;
330 u8 agg_wsize; /* agreed aggregation window, 0 - no agg */
333 bool addba_in_progress; /* if set, agg_xxx is for request in progress */
336 enum { /* for wil6210_priv.status */
337 wil_status_fwready = 0,
338 wil_status_fwconnecting,
339 wil_status_fwconnected,
341 wil_status_reset_done,
342 wil_status_irqen, /* FIXME: interrupts enabled - for debug */
343 wil_status_napi_en, /* NAPI enabled protected by wil->mutex */
344 wil_status_last /* keep last */
350 * struct tid_ampdu_rx - TID aggregation information (Rx).
352 * @reorder_buf: buffer to reorder incoming aggregated MPDUs
353 * @reorder_time: jiffies when skb was added
354 * @session_timer: check if peer keeps Tx-ing on the TID (by timeout value)
355 * @reorder_timer: releases expired frames from the reorder buffer.
356 * @last_rx: jiffies of last rx activity
357 * @head_seq_num: head sequence number in reordering buffer.
358 * @stored_mpdu_num: number of MPDUs in reordering buffer
359 * @ssn: Starting Sequence Number expected to be aggregated.
360 * @buf_size: buffer size for incoming A-MPDUs
361 * @timeout: reset timer value (in TUs).
362 * @dialog_token: dialog token for aggregation session
363 * @rcu_head: RCU head used for freeing this struct
365 * This structure's lifetime is managed by RCU, assignments to
366 * the array holding it must hold the aggregation mutex.
369 struct wil_tid_ampdu_rx {
370 struct sk_buff **reorder_buf;
371 unsigned long *reorder_time;
372 struct timer_list session_timer;
373 struct timer_list reorder_timer;
374 unsigned long last_rx;
382 bool first_time; /* is it 1-st time this buffer used? */
385 enum wil_sta_status {
387 wil_sta_conn_pending = 1,
388 wil_sta_connected = 2,
391 #define WIL_STA_TID_NUM (16)
393 struct wil_net_stats {
394 unsigned long rx_packets;
395 unsigned long tx_packets;
396 unsigned long rx_bytes;
397 unsigned long tx_bytes;
398 unsigned long tx_errors;
399 unsigned long rx_dropped;
404 * struct wil_sta_info - data for peer
406 * Peer identified by its CID (connection ID)
407 * NIC performs beam forming for each peer;
408 * if no beam forming done, frame exchange is not
411 struct wil_sta_info {
413 enum wil_sta_status status;
414 struct wil_net_stats stats;
415 bool data_port_open; /* can send any data, not only EAPOL */
417 struct wil_tid_ampdu_rx *tid_rx[WIL_STA_TID_NUM];
418 spinlock_t tid_rx_lock; /* guarding tid_rx array */
419 unsigned long tid_rx_timer_expired[BITS_TO_LONGS(WIL_STA_TID_NUM)];
420 unsigned long tid_rx_stop_requested[BITS_TO_LONGS(WIL_STA_TID_NUM)];
424 fw_recovery_idle = 0,
425 fw_recovery_pending = 1,
426 fw_recovery_running = 2,
430 struct list_head list;
431 /* request params, converted to CPU byte order - what we asked for */
440 struct list_head list;
441 /* request params, converted to CPU byte order - what we asked for */
447 struct wil6210_priv {
448 struct pci_dev *pdev;
450 struct wireless_dev *wdev;
452 DECLARE_BITMAP(status, wil_status_last);
455 struct wil_board *board;
456 u8 n_mids; /* number of additional MIDs as reported by FW */
457 u32 recovery_count; /* num of FW recovery attempts in a short time */
458 u32 recovery_state; /* FW recovery state machine */
459 unsigned long last_fw_recovery; /* jiffies of last fw recovery */
460 wait_queue_head_t wq; /* for all wait_event() use */
463 u32 secure_pcp; /* create secure PCP? */
466 /* cached ISR registers */
468 /* mailbox related */
469 struct mutex wmi_mutex;
470 struct wil6210_mbox_ctl mbox_ctl;
471 struct completion wmi_ready;
472 struct completion wmi_call;
474 u16 reply_id; /**< wait for this WMI event */
477 struct workqueue_struct *wmi_wq; /* for deferred calls */
478 struct work_struct wmi_event_worker;
479 struct workqueue_struct *wq_service;
480 struct work_struct connect_worker;
481 struct work_struct disconnect_worker;
482 struct work_struct fw_error_worker; /* for FW error recovery */
483 struct timer_list connect_timer;
484 struct timer_list scan_timer; /* detect scan timeout */
485 int pending_connect_cid;
486 struct list_head pending_wmi_ev;
488 * protect pending_wmi_ev
489 * - fill in IRQ from wil6210_irq_misc,
490 * - consumed in thread by wmi_event_worker
492 spinlock_t wmi_ev_lock;
493 struct napi_struct napi_rx;
494 struct napi_struct napi_tx;
496 struct list_head back_rx_pending;
497 struct mutex back_rx_mutex; /* protect @back_rx_pending */
498 struct work_struct back_rx_worker;
499 struct list_head back_tx_pending;
500 struct mutex back_tx_mutex; /* protect @back_tx_pending */
501 struct work_struct back_tx_worker;
503 struct vring vring_rx;
504 struct vring vring_tx[WIL6210_MAX_TX_RINGS];
505 struct vring_tx_data vring_tx_data[WIL6210_MAX_TX_RINGS];
506 u8 vring2cid_tid[WIL6210_MAX_TX_RINGS][2]; /* [0] - CID, [1] - TID */
507 struct wil_sta_info sta[WIL6210_MAX_CID];
509 struct cfg80211_scan_request *scan_request;
511 struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */
513 atomic_t isr_count_rx, isr_count_tx;
515 struct dentry *debug;
516 struct debugfs_blob_wrapper blobs[ARRAY_SIZE(fw_mapping)];
518 void *platform_handle;
519 struct wil_platform_ops platform_ops;
522 #define wil_to_wiphy(i) (i->wdev->wiphy)
523 #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i)))
524 #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w))
525 #define wil_to_wdev(i) (i->wdev)
526 #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w))
527 #define wil_to_ndev(i) (wil_to_wdev(i)->netdev)
528 #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr))
531 void wil_dbg_trace(struct wil6210_priv *wil, const char *fmt, ...);
533 void wil_err(struct wil6210_priv *wil, const char *fmt, ...);
535 void wil_err_ratelimited(struct wil6210_priv *wil, const char *fmt, ...);
537 void wil_info(struct wil6210_priv *wil, const char *fmt, ...);
538 #define wil_dbg(wil, fmt, arg...) do { \
539 netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \
540 wil_dbg_trace(wil, fmt, ##arg); \
543 #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
544 #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
545 #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
546 #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg)
548 #if defined(CONFIG_DYNAMIC_DEBUG)
549 #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \
550 groupsize, buf, len, ascii) \
551 print_hex_dump_debug("DBG[TXRX]" prefix_str,\
552 prefix_type, rowsize, \
553 groupsize, buf, len, ascii)
555 #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \
556 groupsize, buf, len, ascii) \
557 print_hex_dump_debug("DBG[ WMI]" prefix_str,\
558 prefix_type, rowsize, \
559 groupsize, buf, len, ascii)
560 #else /* defined(CONFIG_DYNAMIC_DEBUG) */
562 void wil_hex_dump_txrx(const char *prefix_str, int prefix_type, int rowsize,
563 int groupsize, const void *buf, size_t len, bool ascii)
568 void wil_hex_dump_wmi(const char *prefix_str, int prefix_type, int rowsize,
569 int groupsize, const void *buf, size_t len, bool ascii)
572 #endif /* defined(CONFIG_DYNAMIC_DEBUG) */
574 void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
576 void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
579 void *wil_if_alloc(struct device *dev, void __iomem *csr);
580 void wil_if_free(struct wil6210_priv *wil);
581 int wil_if_add(struct wil6210_priv *wil);
582 void wil_if_remove(struct wil6210_priv *wil);
583 int wil_priv_init(struct wil6210_priv *wil);
584 void wil_priv_deinit(struct wil6210_priv *wil);
585 int wil_reset(struct wil6210_priv *wil);
586 void wil_set_itr_trsh(struct wil6210_priv *wil);
587 void wil_fw_error_recovery(struct wil6210_priv *wil);
588 void wil_set_recovery_state(struct wil6210_priv *wil, int state);
589 void wil_link_on(struct wil6210_priv *wil);
590 void wil_link_off(struct wil6210_priv *wil);
591 int wil_up(struct wil6210_priv *wil);
592 int __wil_up(struct wil6210_priv *wil);
593 int wil_down(struct wil6210_priv *wil);
594 int __wil_down(struct wil6210_priv *wil);
595 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r);
596 int wil_find_cid(struct wil6210_priv *wil, const u8 *mac);
597 void wil_set_ethtoolops(struct net_device *ndev);
599 void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr);
600 void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr);
601 int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr,
602 struct wil6210_mbox_hdr *hdr);
603 int wmi_send(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len);
604 void wmi_recv_cmd(struct wil6210_priv *wil);
605 int wmi_call(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len,
606 u16 reply_id, void *reply, u8 reply_size, int to_msec);
607 void wmi_event_worker(struct work_struct *work);
608 void wmi_event_flush(struct wil6210_priv *wil);
609 int wmi_set_ssid(struct wil6210_priv *wil, u8 ssid_len, const void *ssid);
610 int wmi_get_ssid(struct wil6210_priv *wil, u8 *ssid_len, void *ssid);
611 int wmi_set_channel(struct wil6210_priv *wil, int channel);
612 int wmi_get_channel(struct wil6210_priv *wil, int *channel);
613 int wmi_del_cipher_key(struct wil6210_priv *wil, u8 key_index,
614 const void *mac_addr);
615 int wmi_add_cipher_key(struct wil6210_priv *wil, u8 key_index,
616 const void *mac_addr, int key_len, const void *key);
617 int wmi_echo(struct wil6210_priv *wil);
618 int wmi_set_ie(struct wil6210_priv *wil, u8 type, u16 ie_len, const void *ie);
619 int wmi_rx_chain_add(struct wil6210_priv *wil, struct vring *vring);
620 int wmi_p2p_cfg(struct wil6210_priv *wil, int channel);
621 int wmi_rxon(struct wil6210_priv *wil, bool on);
622 int wmi_get_temperature(struct wil6210_priv *wil, u32 *t_m, u32 *t_r);
623 int wmi_disconnect_sta(struct wil6210_priv *wil, const u8 *mac, u16 reason);
624 int wmi_addba(struct wil6210_priv *wil, u8 ringid, u8 size, u16 timeout);
625 int wmi_delba_tx(struct wil6210_priv *wil, u8 ringid, u16 reason);
626 int wmi_delba_rx(struct wil6210_priv *wil, u8 cidxtid, u16 reason);
627 int wmi_addba_rx_resp(struct wil6210_priv *wil, u8 cid, u8 tid, u8 token,
628 u16 status, bool amsdu, u16 agg_wsize, u16 timeout);
629 int wil_addba_rx_request(struct wil6210_priv *wil, u8 cidxtid,
630 u8 dialog_token, __le16 ba_param_set,
631 __le16 ba_timeout, __le16 ba_seq_ctrl);
632 void wil_back_rx_worker(struct work_struct *work);
633 void wil_back_rx_flush(struct wil6210_priv *wil);
634 int wil_addba_tx_request(struct wil6210_priv *wil, u8 ringid, u16 wsize);
635 void wil_back_tx_worker(struct work_struct *work);
636 void wil_back_tx_flush(struct wil6210_priv *wil);
638 void wil6210_clear_irq(struct wil6210_priv *wil);
639 int wil6210_init_irq(struct wil6210_priv *wil, int irq);
640 void wil6210_fini_irq(struct wil6210_priv *wil, int irq);
641 void wil_mask_irq(struct wil6210_priv *wil);
642 void wil_unmask_irq(struct wil6210_priv *wil);
643 void wil_disable_irq(struct wil6210_priv *wil);
644 void wil_enable_irq(struct wil6210_priv *wil);
645 int wil_cfg80211_mgmt_tx(struct wiphy *wiphy, struct wireless_dev *wdev,
646 struct cfg80211_mgmt_tx_params *params,
649 int wil6210_debugfs_init(struct wil6210_priv *wil);
650 void wil6210_debugfs_remove(struct wil6210_priv *wil);
651 int wil_cid_fill_sinfo(struct wil6210_priv *wil, int cid,
652 struct station_info *sinfo);
654 struct wireless_dev *wil_cfg80211_init(struct device *dev);
655 void wil_wdev_free(struct wil6210_priv *wil);
657 int wmi_set_mac_address(struct wil6210_priv *wil, void *addr);
658 int wmi_pcp_start(struct wil6210_priv *wil, int bi, u8 wmi_nettype, u8 chan);
659 int wmi_pcp_stop(struct wil6210_priv *wil);
660 void wil6210_disconnect(struct wil6210_priv *wil, const u8 *bssid,
661 u16 reason_code, bool from_event);
663 int wil_rx_init(struct wil6210_priv *wil, u16 size);
664 void wil_rx_fini(struct wil6210_priv *wil);
667 int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size,
669 void wil_vring_fini_tx(struct wil6210_priv *wil, int id);
671 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev);
672 int wil_tx_complete(struct wil6210_priv *wil, int ringid);
673 void wil6210_unmask_irq_tx(struct wil6210_priv *wil);
676 void wil_rx_handle(struct wil6210_priv *wil, int *quota);
677 void wil6210_unmask_irq_rx(struct wil6210_priv *wil);
679 int wil_iftype_nl2wmi(enum nl80211_iftype type);
681 int wil_ioctl(struct wil6210_priv *wil, void __user *data, int cmd);
682 int wil_request_firmware(struct wil6210_priv *wil, const char *name);
684 #endif /* __WIL6210_H__ */