2 * Copyright (c) 2008 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 * This function will modify certain transmit queue properties depending on
21 * the operating mode of the station (AP or AdHoc). Parameters are AIFS
22 * settings and channel width min/max
24 static int ath_beaconq_config(struct ath_softc *sc)
26 struct ath_hal *ah = sc->sc_ah;
27 struct ath9k_tx_queue_info qi;
29 ath9k_hw_get_txq_props(ah, sc->sc_bhalq, &qi);
30 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP) {
31 /* Always burst out beacon and CAB traffic. */
36 /* Adhoc mode; important thing is to use 2x cwmin. */
37 qi.tqi_aifs = sc->sc_beacon_qi.tqi_aifs;
38 qi.tqi_cwmin = 2*sc->sc_beacon_qi.tqi_cwmin;
39 qi.tqi_cwmax = sc->sc_beacon_qi.tqi_cwmax;
42 if (!ath9k_hw_set_txq_props(ah, sc->sc_bhalq, &qi)) {
43 DPRINTF(sc, ATH_DBG_FATAL,
44 "unable to update h/w beacon queue parameters\n");
47 ath9k_hw_resettxqueue(ah, sc->sc_bhalq); /* push to h/w */
52 static void ath_bstuck_process(struct ath_softc *sc)
54 DPRINTF(sc, ATH_DBG_BEACON,
55 "stuck beacon; resetting (bmiss count %u)\n",
61 * Associates the beacon frame buffer with a transmit descriptor. Will set
62 * up all required antenna switch parameters, rate codes, and channel flags.
63 * Beacons are always sent out at the lowest rate, and are not retried.
65 static void ath_beacon_setup(struct ath_softc *sc,
66 struct ath_vap *avp, struct ath_buf *bf)
68 struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu;
69 struct ath_hal *ah = sc->sc_ah;
71 struct ath9k_11n_rate_series series[4];
72 struct ath_rate_table *rt;
78 DPRINTF(sc, ATH_DBG_BEACON, "m %p len %u\n", skb, skb->len);
80 /* setup descriptors */
83 flags = ATH9K_TXDESC_NOACK;
85 if (sc->sc_ah->ah_opmode == ATH9K_M_IBSS &&
86 (ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) {
87 ds->ds_link = bf->bf_daddr; /* self-linked */
88 flags |= ATH9K_TXDESC_VEOL;
89 /* Let hardware handle antenna switching. */
94 * Switch antenna every beacon.
95 * Should only switch every beacon period, not for every
97 * XXX assumes two antenna
99 antenna = ((sc->ast_be_xmit / sc->sc_nbcnvaps) & 1 ? 2 : 1);
102 ds->ds_data = bf->bf_buf_addr;
105 * Calculate rate code.
106 * XXX everything at min xmit rate
109 rt = sc->hw_rate_table[sc->sc_curmode];
110 rate = rt->info[rix].ratecode;
111 if (sc->sc_flags & SC_OP_PREAMBLE_SHORT)
112 rate |= rt->info[rix].short_preamble;
114 ath9k_hw_set11n_txdesc(ah, ds,
115 skb->len + FCS_LEN, /* frame length */
116 ATH9K_PKT_TYPE_BEACON, /* Atheros packet type */
117 MAX_RATE_POWER, /* FIXME */
118 ATH9K_TXKEYIX_INVALID, /* no encryption */
119 ATH9K_KEY_TYPE_CLEAR, /* no encryption */
124 /* NB: beacon's BufLen must be a multiple of 4 bytes */
125 ath9k_hw_filltxdesc(ah, ds,
126 roundup(skb->len, 4), /* buffer length */
127 true, /* first segment */
128 true, /* last segment */
129 ds /* first descriptor */
132 memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4);
134 series[0].Rate = rate;
135 series[0].ChSel = sc->sc_tx_chainmask;
136 series[0].RateFlags = (ctsrate) ? ATH9K_RATESERIES_RTS_CTS : 0;
137 ath9k_hw_set11n_ratescenario(ah, ds, ds, 0,
138 ctsrate, ctsduration, series, 4, 0);
141 /* Generate beacon frame and queue cab data for a vap */
142 static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id)
147 struct ath_txq *cabq;
148 struct ieee80211_vif *vif;
149 struct ieee80211_tx_info *info;
152 vif = sc->sc_vaps[if_id];
155 avp = (void *)vif->drv_priv;
158 if (avp->av_bcbuf == NULL) {
159 DPRINTF(sc, ATH_DBG_BEACON, "avp=%p av_bcbuf=%p\n",
165 skb = (struct sk_buff *)bf->bf_mpdu;
167 pci_unmap_single(sc->pdev, bf->bf_dmacontext,
172 skb = ieee80211_beacon_get(sc->hw, vif);
177 info = IEEE80211_SKB_CB(skb);
178 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
180 * TODO: make sure the seq# gets assigned properly (vs. other
183 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
185 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
186 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
189 bf->bf_buf_addr = bf->bf_dmacontext =
190 pci_map_single(sc->pdev, skb->data,
194 skb = ieee80211_get_buffered_bc(sc->hw, vif);
197 * if the CABQ traffic from previous DTIM is pending and the current
198 * beacon is also a DTIM.
199 * 1) if there is only one vap let the cab traffic continue.
200 * 2) if there are more than one vap and we are using staggered
201 * beacons, then drain the cabq by dropping all the frames in
202 * the cabq so that the current vaps cab traffic can be scheduled.
204 spin_lock_bh(&cabq->axq_lock);
205 cabq_depth = cabq->axq_depth;
206 spin_unlock_bh(&cabq->axq_lock);
208 if (skb && cabq_depth) {
210 * Unlock the cabq lock as ath_tx_draintxq acquires
211 * the lock again which is a common function and that
212 * acquires txq lock inside.
214 if (sc->sc_nvaps > 1) {
215 ath_tx_draintxq(sc, cabq, false);
216 DPRINTF(sc, ATH_DBG_BEACON,
217 "flush previous cabq traffic\n");
221 /* Construct tx descriptor. */
222 ath_beacon_setup(sc, avp, bf);
225 * Enable the CAB queue before the beacon queue to
226 * insure cab frames are triggered by this beacon.
229 ath_tx_cabq(sc, skb);
230 skb = ieee80211_get_buffered_bc(sc->hw, vif);
237 * Startup beacon transmission for adhoc mode when they are sent entirely
238 * by the hardware using the self-linked descriptor + veol trick.
240 static void ath_beacon_start_adhoc(struct ath_softc *sc, int if_id)
242 struct ieee80211_vif *vif;
243 struct ath_hal *ah = sc->sc_ah;
248 vif = sc->sc_vaps[if_id];
251 avp = (void *)vif->drv_priv;
253 if (avp->av_bcbuf == NULL) {
254 DPRINTF(sc, ATH_DBG_BEACON, "avp=%p av_bcbuf=%p\n",
255 avp, avp != NULL ? avp->av_bcbuf : NULL);
259 skb = (struct sk_buff *) bf->bf_mpdu;
261 /* Construct tx descriptor. */
262 ath_beacon_setup(sc, avp, bf);
264 /* NB: caller is known to have already stopped tx dma */
265 ath9k_hw_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
266 ath9k_hw_txstart(ah, sc->sc_bhalq);
267 DPRINTF(sc, ATH_DBG_BEACON, "TXDP%u = %llx (%p)\n",
268 sc->sc_bhalq, ito64(bf->bf_daddr), bf->bf_desc);
271 int ath_beaconq_setup(struct ath_hal *ah)
273 struct ath9k_tx_queue_info qi;
275 memset(&qi, 0, sizeof(qi));
279 /* NB: don't enable any interrupts */
280 return ath9k_hw_setuptxqueue(ah, ATH9K_TX_QUEUE_BEACON, &qi);
283 int ath_beacon_alloc(struct ath_softc *sc, int if_id)
285 struct ieee80211_vif *vif;
287 struct ieee80211_hdr *hdr;
292 vif = sc->sc_vaps[if_id];
295 avp = (void *)vif->drv_priv;
297 /* Allocate a beacon descriptor if we haven't done so. */
298 if (!avp->av_bcbuf) {
299 /* Allocate beacon state for hostap/ibss. We know
300 * a buffer is available. */
301 avp->av_bcbuf = list_first_entry(&sc->sc_bbuf,
302 struct ath_buf, list);
303 list_del(&avp->av_bcbuf->list);
305 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
306 !(sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) {
309 * Assign the vap to a beacon xmit slot. As
310 * above, this cannot fail to find one.
313 for (slot = 0; slot < ATH_BCBUF; slot++)
314 if (sc->sc_bslot[slot] == ATH_IF_ID_ANY) {
316 * XXX hack, space out slots to better
319 if (slot+1 < ATH_BCBUF &&
320 sc->sc_bslot[slot+1] ==
322 avp->av_bslot = slot+1;
325 avp->av_bslot = slot;
326 /* NB: keep looking for a double slot */
328 BUG_ON(sc->sc_bslot[avp->av_bslot] != ATH_IF_ID_ANY);
329 sc->sc_bslot[avp->av_bslot] = if_id;
334 /* release the previous beacon frame , if it already exists. */
336 if (bf->bf_mpdu != NULL) {
337 skb = (struct sk_buff *)bf->bf_mpdu;
338 pci_unmap_single(sc->pdev, bf->bf_dmacontext,
341 dev_kfree_skb_any(skb);
346 * NB: the beacon data buffer must be 32-bit aligned.
347 * FIXME: Fill avp->av_btxctl.txpower and
348 * avp->av_btxctl.shortPreamble
350 skb = ieee80211_beacon_get(sc->hw, vif);
352 DPRINTF(sc, ATH_DBG_BEACON, "cannot get skb\n");
356 tstamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
357 sc->bc_tstamp = le64_to_cpu(tstamp);
360 * Calculate a TSF adjustment factor required for
361 * staggered beacons. Note that we assume the format
362 * of the beacon frame leaves the tstamp field immediately
363 * following the header.
365 if (avp->av_bslot > 0) {
370 intval = sc->hw->conf.beacon_int ?
371 sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
374 * The beacon interval is in TU's; the TSF in usecs.
375 * We figure out how many TU's to add to align the
376 * timestamp then convert to TSF units and handle
377 * byte swapping before writing it in the frame.
378 * The hardware will then add this each time a beacon
379 * frame is sent. Note that we align vap's 1..N
380 * and leave vap 0 untouched. This means vap 0
381 * has a timestamp in one beacon interval while the
382 * others get a timestamp aligned to the next interval.
384 tsfadjust = (intval * (ATH_BCBUF - avp->av_bslot)) / ATH_BCBUF;
385 val = cpu_to_le64(tsfadjust << 10); /* TU->TSF */
387 DPRINTF(sc, ATH_DBG_BEACON,
388 "stagger beacons, bslot %d intval %u tsfadjust %llu\n",
389 avp->av_bslot, intval, (unsigned long long)tsfadjust);
391 hdr = (struct ieee80211_hdr *)skb->data;
392 memcpy(&hdr[1], &val, sizeof(val));
395 bf->bf_buf_addr = bf->bf_dmacontext =
396 pci_map_single(sc->pdev, skb->data,
404 void ath_beacon_return(struct ath_softc *sc, struct ath_vap *avp)
406 if (avp->av_bcbuf != NULL) {
409 if (avp->av_bslot != -1) {
410 sc->sc_bslot[avp->av_bslot] = ATH_IF_ID_ANY;
415 if (bf->bf_mpdu != NULL) {
416 struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu;
417 pci_unmap_single(sc->pdev, bf->bf_dmacontext,
420 dev_kfree_skb_any(skb);
423 list_add_tail(&bf->list, &sc->sc_bbuf);
425 avp->av_bcbuf = NULL;
429 void ath9k_beacon_tasklet(unsigned long data)
431 struct ath_softc *sc = (struct ath_softc *)data;
432 struct ath_hal *ah = sc->sc_ah;
433 struct ath_buf *bf = NULL;
436 u32 rx_clear = 0, rx_frame = 0, tx_frame = 0;
438 u32 bc = 0; /* beacon count */
443 if (sc->sc_flags & SC_OP_NO_RESET) {
444 show_cycles = ath9k_hw_GetMibCycleCountsPct(ah,
445 &rx_clear, &rx_frame, &tx_frame);
449 * Check if the previous beacon has gone out. If
450 * not don't try to post another, skip this period
451 * and wait for the next. Missed beacons indicate
452 * a problem and should not occur. If we miss too
453 * many consecutive beacons reset the device.
455 * FIXME: Clean up this mess !!
457 if (ath9k_hw_numtxpending(ah, sc->sc_bhalq) != 0) {
459 /* XXX: doth needs the chanchange IE countdown decremented.
460 * We should consider adding a mac80211 call to indicate
461 * a beacon miss so appropriate action could be taken
464 if (sc->sc_bmisscount < BSTUCK_THRESH) {
465 if (sc->sc_flags & SC_OP_NO_RESET) {
466 DPRINTF(sc, ATH_DBG_BEACON,
467 "missed %u consecutive beacons\n",
471 * Display cycle counter stats from HW
472 * to aide in debug of stickiness.
474 DPRINTF(sc, ATH_DBG_BEACON,
475 "busy times: rx_clear=%d, "
476 "rx_frame=%d, tx_frame=%d\n",
480 DPRINTF(sc, ATH_DBG_BEACON,
485 DPRINTF(sc, ATH_DBG_BEACON,
486 "missed %u consecutive beacons\n",
489 } else if (sc->sc_bmisscount >= BSTUCK_THRESH) {
490 if (sc->sc_flags & SC_OP_NO_RESET) {
491 if (sc->sc_bmisscount == BSTUCK_THRESH) {
492 DPRINTF(sc, ATH_DBG_BEACON,
493 "beacon is officially "
495 ath9k_hw_dmaRegDump(ah);
498 DPRINTF(sc, ATH_DBG_BEACON,
499 "beacon is officially stuck\n");
500 ath_bstuck_process(sc);
506 if (sc->sc_bmisscount != 0) {
507 if (sc->sc_flags & SC_OP_NO_RESET) {
508 DPRINTF(sc, ATH_DBG_BEACON,
509 "resume beacon xmit after %u misses\n",
512 DPRINTF(sc, ATH_DBG_BEACON,
513 "resume beacon xmit after %u misses\n",
516 sc->sc_bmisscount = 0;
520 * Generate beacon frames. we are sending frames
521 * staggered so calculate the slot for this frame based
522 * on the tsf to safeguard against missing an swba.
525 intval = sc->hw->conf.beacon_int ?
526 sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
528 tsf = ath9k_hw_gettsf64(ah);
529 tsftu = TSF_TO_TU(tsf>>32, tsf);
530 slot = ((tsftu % intval) * ATH_BCBUF) / intval;
531 if_id = sc->sc_bslot[(slot + 1) % ATH_BCBUF];
533 DPRINTF(sc, ATH_DBG_BEACON,
534 "slot %d [tsf %llu tsftu %u intval %u] if_id %d\n",
535 slot, (unsigned long long)tsf, tsftu,
539 if (if_id != ATH_IF_ID_ANY) {
540 bf = ath_beacon_generate(sc, if_id);
542 bfaddr = bf->bf_daddr;
547 * Handle slot time change when a non-ERP station joins/leaves
548 * an 11g network. The 802.11 layer notifies us via callback,
549 * we mark updateslot, then wait one beacon before effecting
550 * the change. This gives associated stations at least one
551 * beacon interval to note the state change.
553 * NB: The slot time change state machine is clocked according
554 * to whether we are bursting or staggering beacons. We
555 * recognize the request to update and record the current
556 * slot then don't transition until that slot is reached
557 * again. If we miss a beacon for that slot then we'll be
558 * slow to transition but we'll be sure at least one beacon
559 * interval has passed. When bursting slot is always left
560 * set to ATH_BCBUF so this check is a noop.
563 if (sc->sc_updateslot == UPDATE) {
564 sc->sc_updateslot = COMMIT; /* commit next beacon */
565 sc->sc_slotupdate = slot;
566 } else if (sc->sc_updateslot == COMMIT && sc->sc_slotupdate == slot) {
567 ath9k_hw_setslottime(sc->sc_ah, sc->sc_slottime);
568 sc->sc_updateslot = OK;
572 * Stop any current dma and put the new frame(s) on the queue.
573 * This should never fail since we check above that no frames
574 * are still pending on the queue.
576 if (!ath9k_hw_stoptxdma(ah, sc->sc_bhalq)) {
577 DPRINTF(sc, ATH_DBG_FATAL,
578 "beacon queue %u did not stop?\n", sc->sc_bhalq);
579 /* NB: the HAL still stops DMA, so proceed */
582 /* NB: cabq traffic should already be queued and primed */
583 ath9k_hw_puttxbuf(ah, sc->sc_bhalq, bfaddr);
584 ath9k_hw_txstart(ah, sc->sc_bhalq);
586 sc->ast_be_xmit += bc; /* XXX per-vap? */
591 * Configure the beacon and sleep timers.
593 * When operating as an AP this resets the TSF and sets
594 * up the hardware to notify us when we need to issue beacons.
596 * When operating in station mode this sets up the beacon
597 * timers according to the timestamp of the last received
598 * beacon and the current TSF, configures PCF and DTIM
599 * handling, programs the sleep registers so the hardware
600 * will wakeup in time to receive beacons, and configures
601 * the beacon miss handling so we'll receive a BMISS
602 * interrupt when we stop seeing beacons from the AP
603 * we've associated with.
605 void ath_beacon_config(struct ath_softc *sc, int if_id)
607 struct ieee80211_vif *vif;
608 struct ath_hal *ah = sc->sc_ah;
609 struct ath_beacon_config conf;
611 enum ath9k_opmode av_opmode;
612 u32 nexttbtt, intval;
614 if (if_id != ATH_IF_ID_ANY) {
615 vif = sc->sc_vaps[if_id];
617 avp = (void *)vif->drv_priv;
618 av_opmode = avp->av_opmode;
620 av_opmode = sc->sc_ah->ah_opmode;
623 memset(&conf, 0, sizeof(struct ath_beacon_config));
625 conf.beacon_interval = sc->hw->conf.beacon_int ?
626 sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
627 conf.listen_interval = 1;
628 conf.dtim_period = conf.beacon_interval;
630 conf.bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf.beacon_interval;
632 /* extract tstamp from last beacon and convert to TU */
633 nexttbtt = TSF_TO_TU(sc->bc_tstamp >> 32, sc->bc_tstamp);
635 /* XXX conditionalize multi-bss support? */
636 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP) {
638 * For multi-bss ap support beacons are either staggered
639 * evenly over N slots or burst together. For the former
640 * arrange for the SWBA to be delivered for each slot.
641 * Slots that are not occupied will generate nothing.
643 /* NB: the beacon interval is kept internally in TU's */
644 intval = conf.beacon_interval & ATH9K_BEACON_PERIOD;
645 intval /= ATH_BCBUF; /* for staggered beacons */
647 intval = conf.beacon_interval & ATH9K_BEACON_PERIOD;
650 if (nexttbtt == 0) /* e.g. for ap mode */
652 else if (intval) /* NB: can be 0 for monitor mode */
653 nexttbtt = roundup(nexttbtt, intval);
655 DPRINTF(sc, ATH_DBG_BEACON, "nexttbtt %u intval %u (%u)\n",
656 nexttbtt, intval, conf.beacon_interval);
658 /* Check for ATH9K_M_HOSTAP and sc_nostabeacons for WDS client */
659 if (sc->sc_ah->ah_opmode == ATH9K_M_STA) {
660 struct ath9k_beacon_state bs;
663 int dtimperiod, dtimcount, sleepduration;
664 int cfpperiod, cfpcount;
667 * Setup dtim and cfp parameters according to
668 * last beacon we received (which may be none).
670 dtimperiod = conf.dtim_period;
671 if (dtimperiod <= 0) /* NB: 0 if not known */
673 dtimcount = conf.dtim_count;
674 if (dtimcount >= dtimperiod) /* NB: sanity check */
676 cfpperiod = 1; /* NB: no PCF support yet */
679 sleepduration = conf.listen_interval * intval;
680 if (sleepduration <= 0)
681 sleepduration = intval;
685 * Pull nexttbtt forward to reflect the current
686 * TSF and calculate dtim+cfp state for the result.
688 tsf = ath9k_hw_gettsf64(ah);
689 tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
692 if (--dtimcount < 0) {
693 dtimcount = dtimperiod - 1;
695 cfpcount = cfpperiod - 1;
697 } while (nexttbtt < tsftu);
699 memset(&bs, 0, sizeof(bs));
700 bs.bs_intval = intval;
701 bs.bs_nexttbtt = nexttbtt;
702 bs.bs_dtimperiod = dtimperiod*intval;
703 bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval;
704 bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod;
705 bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod;
706 bs.bs_cfpmaxduration = 0;
709 * Calculate the number of consecutive beacons to miss
710 * before taking a BMISS interrupt. The configuration
711 * is specified in TU so we only need calculate based
712 * on the beacon interval. Note that we clamp the
713 * result to at most 15 beacons.
715 if (sleepduration > intval) {
716 bs.bs_bmissthreshold = conf.listen_interval *
717 ATH_DEFAULT_BMISS_LIMIT / 2;
719 bs.bs_bmissthreshold =
720 DIV_ROUND_UP(conf.bmiss_timeout, intval);
721 if (bs.bs_bmissthreshold > 15)
722 bs.bs_bmissthreshold = 15;
723 else if (bs.bs_bmissthreshold <= 0)
724 bs.bs_bmissthreshold = 1;
728 * Calculate sleep duration. The configuration is
729 * given in ms. We insure a multiple of the beacon
730 * period is used. Also, if the sleep duration is
731 * greater than the DTIM period then it makes senses
732 * to make it a multiple of that.
737 bs.bs_sleepduration = roundup(IEEE80211_MS_TO_TU(100),
739 if (bs.bs_sleepduration > bs.bs_dtimperiod)
740 bs.bs_sleepduration = bs.bs_dtimperiod;
742 DPRINTF(sc, ATH_DBG_BEACON,
755 (unsigned long long)tsf, tsftu,
760 bs.bs_bmissthreshold,
763 bs.bs_cfpmaxduration,
768 ath9k_hw_set_interrupts(ah, 0);
769 ath9k_hw_set_sta_beacon_timers(ah, &bs);
770 sc->sc_imask |= ATH9K_INT_BMISS;
771 ath9k_hw_set_interrupts(ah, sc->sc_imask);
775 ath9k_hw_set_interrupts(ah, 0);
776 if (nexttbtt == intval)
777 intval |= ATH9K_BEACON_RESET_TSF;
778 if (sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
780 * Pull nexttbtt forward to reflect the current
784 if (!(intval & ATH9K_BEACON_RESET_TSF)) {
785 tsf = ath9k_hw_gettsf64(ah);
786 tsftu = TSF_TO_TU((u32)(tsf>>32),
790 } while (nexttbtt < tsftu);
793 DPRINTF(sc, ATH_DBG_BEACON,
794 "IBSS nexttbtt %u intval %u (%u)\n",
796 intval & ~ATH9K_BEACON_RESET_TSF,
797 conf.beacon_interval);
800 * In IBSS mode enable the beacon timers but only
801 * enable SWBA interrupts if we need to manually
802 * prepare beacon frames. Otherwise we use a
803 * self-linked tx descriptor and let the hardware
806 intval |= ATH9K_BEACON_ENA;
807 if (!(ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL))
808 sc->sc_imask |= ATH9K_INT_SWBA;
809 ath_beaconq_config(sc);
810 } else if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP) {
812 * In AP mode we enable the beacon timers and
813 * SWBA interrupts to prepare beacon frames.
815 intval |= ATH9K_BEACON_ENA;
816 sc->sc_imask |= ATH9K_INT_SWBA; /* beacon prepare */
817 ath_beaconq_config(sc);
819 ath9k_hw_beaconinit(ah, nexttbtt, intval);
820 sc->sc_bmisscount = 0;
821 ath9k_hw_set_interrupts(ah, sc->sc_imask);
823 * When using a self-linked beacon descriptor in
824 * ibss mode load it once here.
826 if (sc->sc_ah->ah_opmode == ATH9K_M_IBSS &&
827 (ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL))
828 ath_beacon_start_adhoc(sc, 0);
832 void ath_beacon_sync(struct ath_softc *sc, int if_id)
835 * Resync beacon timers using the tsf of the
836 * beacon frame we just received.
838 ath_beacon_config(sc, if_id);
839 sc->sc_flags |= SC_OP_BEACONS;