2 * Copyright (c) 2008 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 /* mac80211 and PCI callbacks */
19 #include <linux/nl80211.h>
23 #define ATH_PCI_VERSION "0.1"
25 static char *dev_info = "ath9k";
27 MODULE_AUTHOR("Atheros Communications");
28 MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
29 MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
30 MODULE_LICENSE("Dual BSD/GPL");
32 static struct pci_device_id ath_pci_id_table[] __devinitdata = {
33 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
34 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
35 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
36 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
41 static void ath_detach(struct ath_softc *sc);
43 static int ath_get_channel(struct ath_softc *sc,
44 struct ieee80211_channel *chan)
48 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
49 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
56 static u32 ath_get_extchanmode(struct ath_softc *sc,
57 struct ieee80211_channel *chan)
60 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
61 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
64 case IEEE80211_BAND_2GHZ:
65 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
66 (tx_chan_width == ATH9K_HT_MACMODE_20))
67 chanmode = CHANNEL_G_HT20;
68 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
69 (tx_chan_width == ATH9K_HT_MACMODE_2040))
70 chanmode = CHANNEL_G_HT40PLUS;
71 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
72 (tx_chan_width == ATH9K_HT_MACMODE_2040))
73 chanmode = CHANNEL_G_HT40MINUS;
75 case IEEE80211_BAND_5GHZ:
76 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
77 (tx_chan_width == ATH9K_HT_MACMODE_20))
78 chanmode = CHANNEL_A_HT20;
79 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
80 (tx_chan_width == ATH9K_HT_MACMODE_2040))
81 chanmode = CHANNEL_A_HT40PLUS;
82 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
83 (tx_chan_width == ATH9K_HT_MACMODE_2040))
84 chanmode = CHANNEL_A_HT40MINUS;
94 static int ath_setkey_tkip(struct ath_softc *sc,
95 struct ieee80211_key_conf *key,
96 struct ath9k_keyval *hk,
100 u8 *key_txmic = NULL;
102 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
103 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
106 /* Group key installation */
107 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
108 return ath_keyset(sc, key->keyidx, hk, addr);
110 if (!sc->sc_splitmic) {
112 * data key goes at first index,
113 * the hal handles the MIC keys at index+64.
115 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
116 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
117 return ath_keyset(sc, key->keyidx, hk, addr);
120 * TX key goes at first index, RX key at +32.
121 * The hal handles the MIC keys at index+64.
123 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
124 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
125 /* Txmic entry failed. No need to proceed further */
126 DPRINTF(sc, ATH_DBG_KEYCACHE,
127 "%s Setting TX MIC Key Failed\n", __func__);
131 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
132 /* XXX delete tx key on failure? */
133 return ath_keyset(sc, key->keyidx+32, hk, addr);
136 static int ath_key_config(struct ath_softc *sc,
138 struct ieee80211_key_conf *key)
140 struct ieee80211_vif *vif;
141 struct ath9k_keyval hk;
142 const u8 *mac = NULL;
144 enum nl80211_iftype opmode;
146 memset(&hk, 0, sizeof(hk));
150 hk.kv_type = ATH9K_CIPHER_WEP;
153 hk.kv_type = ATH9K_CIPHER_TKIP;
156 hk.kv_type = ATH9K_CIPHER_AES_CCM;
162 hk.kv_len = key->keylen;
163 memcpy(hk.kv_val, key->key, key->keylen);
168 vif = sc->sc_vaps[0];
173 * For _M_STA mc tx, we will not setup a key at all since we never
175 * _M_STA mc rx, we will use the keyID.
176 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
177 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
178 * peer node. BUT we will plumb a cleartext key so that we can do
179 * perSta default key table lookup in software.
181 if (is_broadcast_ether_addr(addr)) {
183 case NL80211_IFTYPE_STATION:
184 /* default key: could be group WPA key
185 * or could be static WEP key */
188 case NL80211_IFTYPE_ADHOC:
190 case NL80211_IFTYPE_AP:
200 if (key->alg == ALG_TKIP)
201 ret = ath_setkey_tkip(sc, key, &hk, mac);
203 ret = ath_keyset(sc, key->keyidx, &hk, mac);
211 static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
215 freeslot = (key->keyidx >= 4) ? 1 : 0;
216 ath_key_reset(sc, key->keyidx, freeslot);
219 static void setup_ht_cap(struct ieee80211_sta_ht_cap *ht_info)
221 #define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
222 #define ATH9K_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
224 ht_info->ht_supported = true;
225 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
226 IEEE80211_HT_CAP_SM_PS |
227 IEEE80211_HT_CAP_SGI_40 |
228 IEEE80211_HT_CAP_DSSSCCK40;
230 ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
231 ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
232 /* set up supported mcs set */
233 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
234 ht_info->mcs.rx_mask[0] = 0xff;
235 ht_info->mcs.rx_mask[1] = 0xff;
236 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
239 static void ath9k_ht_conf(struct ath_softc *sc,
240 struct ieee80211_bss_conf *bss_conf)
242 struct ath_ht_info *ht_info = &sc->sc_ht_info;
244 if (sc->hw->conf.ht.enabled) {
245 ht_info->ext_chan_offset = bss_conf->ht.secondary_channel_offset;
247 if (bss_conf->ht.width_40_ok)
248 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
250 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
252 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
256 static void ath9k_bss_assoc_info(struct ath_softc *sc,
257 struct ieee80211_vif *vif,
258 struct ieee80211_bss_conf *bss_conf)
260 struct ieee80211_hw *hw = sc->hw;
261 struct ieee80211_channel *curchan = hw->conf.channel;
262 struct ath_vap *avp = (void *)vif->drv_priv;
265 if (bss_conf->assoc) {
266 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
270 /* New association, store aid */
271 if (avp->av_opmode == ATH9K_M_STA) {
272 sc->sc_curaid = bss_conf->aid;
273 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
277 /* Configure the beacon */
278 ath_beacon_config(sc, 0);
279 sc->sc_flags |= SC_OP_BEACONS;
281 /* Reset rssi stats */
282 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
283 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
284 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
285 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
287 /* Update chainmask */
288 ath_update_chainmask(sc, hw->conf.ht.enabled);
290 DPRINTF(sc, ATH_DBG_CONFIG,
291 "%s: bssid %pM aid 0x%x\n",
293 sc->sc_curbssid, sc->sc_curaid);
295 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
297 curchan->center_freq);
299 pos = ath_get_channel(sc, curchan);
301 DPRINTF(sc, ATH_DBG_FATAL,
302 "%s: Invalid channel\n", __func__);
306 if (hw->conf.ht.enabled)
307 sc->sc_ah->ah_channels[pos].chanmode =
308 ath_get_extchanmode(sc, curchan);
310 sc->sc_ah->ah_channels[pos].chanmode =
311 (curchan->band == IEEE80211_BAND_2GHZ) ?
312 CHANNEL_G : CHANNEL_A;
314 /* set h/w channel */
315 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
316 DPRINTF(sc, ATH_DBG_FATAL,
317 "%s: Unable to set channel\n",
320 mod_timer(&sc->sc_ani.timer,
321 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
324 DPRINTF(sc, ATH_DBG_CONFIG,
325 "%s: Bss Info DISSOC\n", __func__);
330 void ath_get_beaconconfig(struct ath_softc *sc,
332 struct ath_beacon_config *conf)
334 struct ieee80211_hw *hw = sc->hw;
336 /* fill in beacon config data */
338 conf->beacon_interval = hw->conf.beacon_int;
339 conf->listen_interval = 100;
340 conf->dtim_count = 1;
341 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
344 void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
345 struct ath_xmit_status *tx_status)
347 struct ieee80211_hw *hw = sc->hw;
348 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
350 DPRINTF(sc, ATH_DBG_XMIT,
351 "%s: TX complete: skb: %p\n", __func__, skb);
353 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
354 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
355 if (tx_info->rate_driver_data[0] != NULL) {
356 kfree(tx_info->rate_driver_data[0]);
357 tx_info->rate_driver_data[0] = NULL;
361 if (tx_status->flags & ATH_TX_BAR) {
362 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
363 tx_status->flags &= ~ATH_TX_BAR;
366 if (!(tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY))) {
367 /* Frame was ACKed */
368 tx_info->flags |= IEEE80211_TX_STAT_ACK;
371 tx_info->status.rates[0].count = tx_status->retries + 1;
373 ieee80211_tx_status(hw, skb);
376 /********************************/
378 /********************************/
380 static void ath_led_brightness(struct led_classdev *led_cdev,
381 enum led_brightness brightness)
383 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
384 struct ath_softc *sc = led->sc;
386 switch (brightness) {
388 if (led->led_type == ATH_LED_ASSOC ||
389 led->led_type == ATH_LED_RADIO)
390 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
391 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
392 (led->led_type == ATH_LED_RADIO) ? 1 :
393 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
396 if (led->led_type == ATH_LED_ASSOC)
397 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
398 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
405 static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
411 led->led_cdev.name = led->name;
412 led->led_cdev.default_trigger = trigger;
413 led->led_cdev.brightness_set = ath_led_brightness;
415 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
417 DPRINTF(sc, ATH_DBG_FATAL,
418 "Failed to register led:%s", led->name);
424 static void ath_unregister_led(struct ath_led *led)
426 if (led->registered) {
427 led_classdev_unregister(&led->led_cdev);
432 static void ath_deinit_leds(struct ath_softc *sc)
434 ath_unregister_led(&sc->assoc_led);
435 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
436 ath_unregister_led(&sc->tx_led);
437 ath_unregister_led(&sc->rx_led);
438 ath_unregister_led(&sc->radio_led);
439 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
442 static void ath_init_leds(struct ath_softc *sc)
447 /* Configure gpio 1 for output */
448 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
449 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
450 /* LED off, active low */
451 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
453 trigger = ieee80211_get_radio_led_name(sc->hw);
454 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
455 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
456 ret = ath_register_led(sc, &sc->radio_led, trigger);
457 sc->radio_led.led_type = ATH_LED_RADIO;
461 trigger = ieee80211_get_assoc_led_name(sc->hw);
462 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
463 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
464 ret = ath_register_led(sc, &sc->assoc_led, trigger);
465 sc->assoc_led.led_type = ATH_LED_ASSOC;
469 trigger = ieee80211_get_tx_led_name(sc->hw);
470 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
471 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
472 ret = ath_register_led(sc, &sc->tx_led, trigger);
473 sc->tx_led.led_type = ATH_LED_TX;
477 trigger = ieee80211_get_rx_led_name(sc->hw);
478 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
479 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
480 ret = ath_register_led(sc, &sc->rx_led, trigger);
481 sc->rx_led.led_type = ATH_LED_RX;
491 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
493 /*******************/
495 /*******************/
497 static void ath_radio_enable(struct ath_softc *sc)
499 struct ath_hal *ah = sc->sc_ah;
502 spin_lock_bh(&sc->sc_resetlock);
503 if (!ath9k_hw_reset(ah, ah->ah_curchan,
504 sc->sc_ht_info.tx_chan_width,
507 sc->sc_ht_extprotspacing,
509 DPRINTF(sc, ATH_DBG_FATAL,
510 "%s: unable to reset channel %u (%uMhz) "
511 "flags 0x%x hal status %u\n", __func__,
512 ath9k_hw_mhz2ieee(ah,
513 ah->ah_curchan->channel,
514 ah->ah_curchan->channelFlags),
515 ah->ah_curchan->channel,
516 ah->ah_curchan->channelFlags, status);
518 spin_unlock_bh(&sc->sc_resetlock);
520 ath_update_txpow(sc);
521 if (ath_startrecv(sc) != 0) {
522 DPRINTF(sc, ATH_DBG_FATAL,
523 "%s: unable to restart recv logic\n", __func__);
527 if (sc->sc_flags & SC_OP_BEACONS)
528 ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */
530 /* Re-Enable interrupts */
531 ath9k_hw_set_interrupts(ah, sc->sc_imask);
534 ath9k_hw_cfg_output(ah, ATH_LED_PIN,
535 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
536 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 0);
538 ieee80211_wake_queues(sc->hw);
541 static void ath_radio_disable(struct ath_softc *sc)
543 struct ath_hal *ah = sc->sc_ah;
547 ieee80211_stop_queues(sc->hw);
550 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 1);
551 ath9k_hw_cfg_gpio_input(ah, ATH_LED_PIN);
553 /* Disable interrupts */
554 ath9k_hw_set_interrupts(ah, 0);
556 ath_draintxq(sc, false); /* clear pending tx frames */
557 ath_stoprecv(sc); /* turn off frame recv */
558 ath_flushrecv(sc); /* flush recv queue */
560 spin_lock_bh(&sc->sc_resetlock);
561 if (!ath9k_hw_reset(ah, ah->ah_curchan,
562 sc->sc_ht_info.tx_chan_width,
565 sc->sc_ht_extprotspacing,
567 DPRINTF(sc, ATH_DBG_FATAL,
568 "%s: unable to reset channel %u (%uMhz) "
569 "flags 0x%x hal status %u\n", __func__,
570 ath9k_hw_mhz2ieee(ah,
571 ah->ah_curchan->channel,
572 ah->ah_curchan->channelFlags),
573 ah->ah_curchan->channel,
574 ah->ah_curchan->channelFlags, status);
576 spin_unlock_bh(&sc->sc_resetlock);
578 ath9k_hw_phy_disable(ah);
579 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
582 static bool ath_is_rfkill_set(struct ath_softc *sc)
584 struct ath_hal *ah = sc->sc_ah;
586 return ath9k_hw_gpio_get(ah, ah->ah_rfkill_gpio) ==
587 ah->ah_rfkill_polarity;
590 /* h/w rfkill poll function */
591 static void ath_rfkill_poll(struct work_struct *work)
593 struct ath_softc *sc = container_of(work, struct ath_softc,
594 rf_kill.rfkill_poll.work);
597 if (sc->sc_flags & SC_OP_INVALID)
600 radio_on = !ath_is_rfkill_set(sc);
603 * enable/disable radio only when there is a
604 * state change in RF switch
606 if (radio_on == !!(sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED)) {
607 enum rfkill_state state;
609 if (sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED) {
610 state = radio_on ? RFKILL_STATE_SOFT_BLOCKED
611 : RFKILL_STATE_HARD_BLOCKED;
612 } else if (radio_on) {
613 ath_radio_enable(sc);
614 state = RFKILL_STATE_UNBLOCKED;
616 ath_radio_disable(sc);
617 state = RFKILL_STATE_HARD_BLOCKED;
620 if (state == RFKILL_STATE_HARD_BLOCKED)
621 sc->sc_flags |= SC_OP_RFKILL_HW_BLOCKED;
623 sc->sc_flags &= ~SC_OP_RFKILL_HW_BLOCKED;
625 rfkill_force_state(sc->rf_kill.rfkill, state);
628 queue_delayed_work(sc->hw->workqueue, &sc->rf_kill.rfkill_poll,
629 msecs_to_jiffies(ATH_RFKILL_POLL_INTERVAL));
632 /* s/w rfkill handler */
633 static int ath_sw_toggle_radio(void *data, enum rfkill_state state)
635 struct ath_softc *sc = data;
638 case RFKILL_STATE_SOFT_BLOCKED:
639 if (!(sc->sc_flags & (SC_OP_RFKILL_HW_BLOCKED |
640 SC_OP_RFKILL_SW_BLOCKED)))
641 ath_radio_disable(sc);
642 sc->sc_flags |= SC_OP_RFKILL_SW_BLOCKED;
644 case RFKILL_STATE_UNBLOCKED:
645 if ((sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED)) {
646 sc->sc_flags &= ~SC_OP_RFKILL_SW_BLOCKED;
647 if (sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED) {
648 DPRINTF(sc, ATH_DBG_FATAL, "Can't turn on the"
649 "radio as it is disabled by h/w \n");
652 ath_radio_enable(sc);
660 /* Init s/w rfkill */
661 static int ath_init_sw_rfkill(struct ath_softc *sc)
663 sc->rf_kill.rfkill = rfkill_allocate(wiphy_dev(sc->hw->wiphy),
665 if (!sc->rf_kill.rfkill) {
666 DPRINTF(sc, ATH_DBG_FATAL, "Failed to allocate rfkill\n");
670 snprintf(sc->rf_kill.rfkill_name, sizeof(sc->rf_kill.rfkill_name),
671 "ath9k-%s:rfkill", wiphy_name(sc->hw->wiphy));
672 sc->rf_kill.rfkill->name = sc->rf_kill.rfkill_name;
673 sc->rf_kill.rfkill->data = sc;
674 sc->rf_kill.rfkill->toggle_radio = ath_sw_toggle_radio;
675 sc->rf_kill.rfkill->state = RFKILL_STATE_UNBLOCKED;
676 sc->rf_kill.rfkill->user_claim_unsupported = 1;
681 /* Deinitialize rfkill */
682 static void ath_deinit_rfkill(struct ath_softc *sc)
684 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
685 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
687 if (sc->sc_flags & SC_OP_RFKILL_REGISTERED) {
688 rfkill_unregister(sc->rf_kill.rfkill);
689 sc->sc_flags &= ~SC_OP_RFKILL_REGISTERED;
690 sc->rf_kill.rfkill = NULL;
694 static int ath_start_rfkill_poll(struct ath_softc *sc)
696 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
697 queue_delayed_work(sc->hw->workqueue,
698 &sc->rf_kill.rfkill_poll, 0);
700 if (!(sc->sc_flags & SC_OP_RFKILL_REGISTERED)) {
701 if (rfkill_register(sc->rf_kill.rfkill)) {
702 DPRINTF(sc, ATH_DBG_FATAL,
703 "Unable to register rfkill\n");
704 rfkill_free(sc->rf_kill.rfkill);
706 /* Deinitialize the device */
709 free_irq(sc->pdev->irq, sc);
710 pci_iounmap(sc->pdev, sc->mem);
711 pci_release_region(sc->pdev, 0);
712 pci_disable_device(sc->pdev);
713 ieee80211_free_hw(sc->hw);
716 sc->sc_flags |= SC_OP_RFKILL_REGISTERED;
722 #endif /* CONFIG_RFKILL */
724 static void ath_detach(struct ath_softc *sc)
726 struct ieee80211_hw *hw = sc->hw;
729 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
731 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
732 ath_deinit_rfkill(sc);
736 ieee80211_unregister_hw(hw);
738 ath_rate_control_unregister();
743 tasklet_kill(&sc->intr_tq);
744 tasklet_kill(&sc->bcon_tasklet);
746 if (!(sc->sc_flags & SC_OP_INVALID))
747 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
749 /* cleanup tx queues */
750 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
751 if (ATH_TXQ_SETUP(sc, i))
752 ath_tx_cleanupq(sc, &sc->sc_txq[i]);
754 ath9k_hw_detach(sc->sc_ah);
757 static int ath_attach(u16 devid, struct ath_softc *sc)
759 struct ieee80211_hw *hw = sc->hw;
762 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
764 error = ath_init(devid, sc);
768 /* get mac address from hardware and set in mac80211 */
770 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
772 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
773 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
774 IEEE80211_HW_SIGNAL_DBM |
775 IEEE80211_HW_AMPDU_AGGREGATION;
777 hw->wiphy->interface_modes =
778 BIT(NL80211_IFTYPE_AP) |
779 BIT(NL80211_IFTYPE_STATION) |
780 BIT(NL80211_IFTYPE_ADHOC);
783 hw->sta_data_size = sizeof(struct ath_node);
784 hw->vif_data_size = sizeof(struct ath_vap);
786 /* Register rate control */
787 hw->rate_control_algorithm = "ath9k_rate_control";
788 error = ath_rate_control_register();
790 DPRINTF(sc, ATH_DBG_FATAL,
791 "%s: Unable to register rate control "
792 "algorithm:%d\n", __func__, error);
793 ath_rate_control_unregister();
797 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) {
798 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
799 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes))
800 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
803 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &sc->sbands[IEEE80211_BAND_2GHZ];
804 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes))
805 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
806 &sc->sbands[IEEE80211_BAND_5GHZ];
808 /* initialize tx/rx engine */
809 error = ath_tx_init(sc, ATH_TXBUF);
813 error = ath_rx_init(sc, ATH_RXBUF);
817 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
818 /* Initialze h/w Rfkill */
819 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
820 INIT_DELAYED_WORK(&sc->rf_kill.rfkill_poll, ath_rfkill_poll);
822 /* Initialize s/w rfkill */
823 if (ath_init_sw_rfkill(sc))
827 error = ieee80211_register_hw(hw);
829 ath_rate_control_unregister();
833 /* Initialize LED control */
843 static int ath9k_start(struct ieee80211_hw *hw)
845 struct ath_softc *sc = hw->priv;
846 struct ieee80211_channel *curchan = hw->conf.channel;
849 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
850 "initial channel: %d MHz\n", __func__, curchan->center_freq);
852 memset(&sc->sc_ht_info, 0, sizeof(struct ath_ht_info));
854 /* setup initial channel */
856 pos = ath_get_channel(sc, curchan);
858 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
863 sc->sc_ah->ah_channels[pos].chanmode =
864 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
866 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
868 DPRINTF(sc, ATH_DBG_FATAL,
869 "%s: Unable to complete ath_open\n", __func__);
873 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
874 error = ath_start_rfkill_poll(sc);
881 static int ath9k_tx(struct ieee80211_hw *hw,
884 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
885 struct ath_softc *sc = hw->priv;
886 struct ath_tx_control txctl;
889 memset(&txctl, 0, sizeof(struct ath_tx_control));
892 * As a temporary workaround, assign seq# here; this will likely need
893 * to be cleaned up to work better with Beacon transmission and virtual
896 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
897 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
898 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
900 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
901 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
904 /* Add the padding after the header if this is not already done */
905 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
907 padsize = hdrlen % 4;
908 if (skb_headroom(skb) < padsize)
910 skb_push(skb, padsize);
911 memmove(skb->data, skb->data + padsize, hdrlen);
914 /* Check if a tx queue is available */
916 txctl.txq = ath_test_get_txq(sc, skb);
920 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
924 if (ath_tx_start(sc, skb, &txctl) != 0) {
925 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
931 dev_kfree_skb_any(skb);
935 static void ath9k_stop(struct ieee80211_hw *hw)
937 struct ath_softc *sc = hw->priv;
939 if (sc->sc_flags & SC_OP_INVALID) {
940 DPRINTF(sc, ATH_DBG_ANY, "%s: Device not present\n", __func__);
946 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
949 static int ath9k_add_interface(struct ieee80211_hw *hw,
950 struct ieee80211_if_init_conf *conf)
952 struct ath_softc *sc = hw->priv;
953 struct ath_vap *avp = (void *)conf->vif->drv_priv;
956 /* Support only vap for now */
961 switch (conf->type) {
962 case NL80211_IFTYPE_STATION:
963 ic_opmode = ATH9K_M_STA;
965 case NL80211_IFTYPE_ADHOC:
966 ic_opmode = ATH9K_M_IBSS;
968 case NL80211_IFTYPE_AP:
969 ic_opmode = ATH9K_M_HOSTAP;
972 DPRINTF(sc, ATH_DBG_FATAL,
973 "%s: Interface type %d not yet supported\n",
974 __func__, conf->type);
978 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
982 /* Set the VAP opmode */
983 avp->av_opmode = ic_opmode;
986 if (ic_opmode == ATH9K_M_HOSTAP)
987 ath9k_hw_set_tsfadjust(sc->sc_ah, 1);
989 sc->sc_vaps[0] = conf->vif;
992 /* Set the device opmode */
993 sc->sc_ah->ah_opmode = ic_opmode;
995 if (conf->type == NL80211_IFTYPE_AP) {
996 /* TODO: is this a suitable place to start ANI for AP mode? */
998 mod_timer(&sc->sc_ani.timer,
999 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
1005 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1006 struct ieee80211_if_init_conf *conf)
1008 struct ath_softc *sc = hw->priv;
1009 struct ath_vap *avp = (void *)conf->vif->drv_priv;
1011 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
1013 #ifdef CONFIG_SLOW_ANT_DIV
1014 ath_slow_ant_div_stop(&sc->sc_antdiv);
1017 del_timer_sync(&sc->sc_ani.timer);
1019 /* Reclaim beacon resources */
1020 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
1021 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
1022 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1023 ath_beacon_return(sc, avp);
1026 sc->sc_flags &= ~SC_OP_BEACONS;
1028 sc->sc_vaps[0] = NULL;
1032 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1034 struct ath_softc *sc = hw->priv;
1035 struct ieee80211_channel *curchan = hw->conf.channel;
1036 struct ieee80211_conf *conf = &hw->conf;
1039 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
1041 curchan->center_freq);
1043 /* Update chainmask */
1044 ath_update_chainmask(sc, conf->ht.enabled);
1046 pos = ath_get_channel(sc, curchan);
1048 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1052 sc->sc_ah->ah_channels[pos].chanmode =
1053 (curchan->band == IEEE80211_BAND_2GHZ) ?
1054 CHANNEL_G : CHANNEL_A;
1056 if (sc->sc_curaid && hw->conf.ht.enabled)
1057 sc->sc_ah->ah_channels[pos].chanmode =
1058 ath_get_extchanmode(sc, curchan);
1060 if (changed & IEEE80211_CONF_CHANGE_POWER)
1061 sc->sc_config.txpowlimit = 2 * conf->power_level;
1063 /* set h/w channel */
1064 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
1065 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
1071 static int ath9k_config_interface(struct ieee80211_hw *hw,
1072 struct ieee80211_vif *vif,
1073 struct ieee80211_if_conf *conf)
1075 struct ath_softc *sc = hw->priv;
1076 struct ath_hal *ah = sc->sc_ah;
1077 struct ath_vap *avp = (void *)vif->drv_priv;
1081 /* TODO: Need to decide which hw opmode to use for multi-interface
1083 if (vif->type == NL80211_IFTYPE_AP &&
1084 ah->ah_opmode != ATH9K_M_HOSTAP) {
1085 ah->ah_opmode = ATH9K_M_HOSTAP;
1086 ath9k_hw_setopmode(ah);
1087 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
1088 /* Request full reset to get hw opmode changed properly */
1089 sc->sc_flags |= SC_OP_FULL_RESET;
1092 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
1093 !is_zero_ether_addr(conf->bssid)) {
1094 switch (vif->type) {
1095 case NL80211_IFTYPE_STATION:
1096 case NL80211_IFTYPE_ADHOC:
1098 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
1100 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
1103 /* Set aggregation protection mode parameters */
1104 sc->sc_config.ath_aggr_prot = 0;
1106 DPRINTF(sc, ATH_DBG_CONFIG,
1107 "%s: RX filter 0x%x bssid %pM aid 0x%x\n",
1109 sc->sc_curbssid, sc->sc_curaid);
1111 /* need to reconfigure the beacon */
1112 sc->sc_flags &= ~SC_OP_BEACONS ;
1120 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
1121 ((vif->type == NL80211_IFTYPE_ADHOC) ||
1122 (vif->type == NL80211_IFTYPE_AP))) {
1124 * Allocate and setup the beacon frame.
1126 * Stop any previous beacon DMA. This may be
1127 * necessary, for example, when an ibss merge
1128 * causes reconfiguration; we may be called
1129 * with beacon transmission active.
1131 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1133 error = ath_beacon_alloc(sc, 0);
1137 ath_beacon_sync(sc, 0);
1140 /* Check for WLAN_CAPABILITY_PRIVACY ? */
1141 if ((avp->av_opmode != ATH9K_M_STA)) {
1142 for (i = 0; i < IEEE80211_WEP_NKID; i++)
1143 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
1144 ath9k_hw_keysetmac(sc->sc_ah,
1149 /* Only legacy IBSS for now */
1150 if (vif->type == NL80211_IFTYPE_ADHOC)
1151 ath_update_chainmask(sc, 0);
1156 #define SUPPORTED_FILTERS \
1157 (FIF_PROMISC_IN_BSS | \
1161 FIF_BCN_PRBRESP_PROMISC | \
1164 /* FIXME: sc->sc_full_reset ? */
1165 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1166 unsigned int changed_flags,
1167 unsigned int *total_flags,
1169 struct dev_mc_list *mclist)
1171 struct ath_softc *sc = hw->priv;
1174 changed_flags &= SUPPORTED_FILTERS;
1175 *total_flags &= SUPPORTED_FILTERS;
1177 sc->rx_filter = *total_flags;
1178 rfilt = ath_calcrxfilter(sc);
1179 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1181 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1182 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1183 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
1186 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
1187 __func__, sc->rx_filter);
1190 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1191 struct ieee80211_vif *vif,
1192 enum sta_notify_cmd cmd,
1193 struct ieee80211_sta *sta)
1195 struct ath_softc *sc = hw->priv;
1198 case STA_NOTIFY_ADD:
1199 ath_node_attach(sc, sta);
1201 case STA_NOTIFY_REMOVE:
1202 ath_node_detach(sc, sta);
1209 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1211 const struct ieee80211_tx_queue_params *params)
1213 struct ath_softc *sc = hw->priv;
1214 struct ath9k_tx_queue_info qi;
1217 if (queue >= WME_NUM_AC)
1220 qi.tqi_aifs = params->aifs;
1221 qi.tqi_cwmin = params->cw_min;
1222 qi.tqi_cwmax = params->cw_max;
1223 qi.tqi_burstTime = params->txop;
1224 qnum = ath_get_hal_qnum(queue, sc);
1226 DPRINTF(sc, ATH_DBG_CONFIG,
1227 "%s: Configure tx [queue/halq] [%d/%d], "
1228 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1237 ret = ath_txq_update(sc, qnum, &qi);
1239 DPRINTF(sc, ATH_DBG_FATAL,
1240 "%s: TXQ Update failed\n", __func__);
1245 static int ath9k_set_key(struct ieee80211_hw *hw,
1246 enum set_key_cmd cmd,
1247 const u8 *local_addr,
1249 struct ieee80211_key_conf *key)
1251 struct ath_softc *sc = hw->priv;
1254 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
1258 ret = ath_key_config(sc, addr, key);
1260 set_bit(key->keyidx, sc->sc_keymap);
1261 key->hw_key_idx = key->keyidx;
1262 /* push IV and Michael MIC generation to stack */
1263 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1264 if (key->alg == ALG_TKIP)
1265 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1269 ath_key_delete(sc, key);
1270 clear_bit(key->keyidx, sc->sc_keymap);
1279 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1280 struct ieee80211_vif *vif,
1281 struct ieee80211_bss_conf *bss_conf,
1284 struct ath_softc *sc = hw->priv;
1286 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1287 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
1289 bss_conf->use_short_preamble);
1290 if (bss_conf->use_short_preamble)
1291 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1293 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1296 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1297 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
1299 bss_conf->use_cts_prot);
1300 if (bss_conf->use_cts_prot &&
1301 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1302 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1304 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1307 if (changed & BSS_CHANGED_HT) {
1308 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT\n",
1310 ath9k_ht_conf(sc, bss_conf);
1313 if (changed & BSS_CHANGED_ASSOC) {
1314 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
1317 ath9k_bss_assoc_info(sc, vif, bss_conf);
1321 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1324 struct ath_softc *sc = hw->priv;
1325 struct ath_hal *ah = sc->sc_ah;
1327 tsf = ath9k_hw_gettsf64(ah);
1332 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1334 struct ath_softc *sc = hw->priv;
1335 struct ath_hal *ah = sc->sc_ah;
1337 ath9k_hw_reset_tsf(ah);
1340 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1341 enum ieee80211_ampdu_mlme_action action,
1342 struct ieee80211_sta *sta,
1345 struct ath_softc *sc = hw->priv;
1349 case IEEE80211_AMPDU_RX_START:
1350 if (!(sc->sc_flags & SC_OP_RXAGGR))
1353 case IEEE80211_AMPDU_RX_STOP:
1355 case IEEE80211_AMPDU_TX_START:
1356 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1358 DPRINTF(sc, ATH_DBG_FATAL,
1359 "%s: Unable to start TX aggregation\n",
1362 ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1364 case IEEE80211_AMPDU_TX_STOP:
1365 ret = ath_tx_aggr_stop(sc, sta, tid);
1367 DPRINTF(sc, ATH_DBG_FATAL,
1368 "%s: Unable to stop TX aggregation\n",
1371 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1373 case IEEE80211_AMPDU_TX_RESUME:
1374 ath_tx_aggr_resume(sc, sta, tid);
1377 DPRINTF(sc, ATH_DBG_FATAL,
1378 "%s: Unknown AMPDU action\n", __func__);
1384 static int ath9k_no_fragmentation(struct ieee80211_hw *hw, u32 value)
1389 static struct ieee80211_ops ath9k_ops = {
1391 .start = ath9k_start,
1393 .add_interface = ath9k_add_interface,
1394 .remove_interface = ath9k_remove_interface,
1395 .config = ath9k_config,
1396 .config_interface = ath9k_config_interface,
1397 .configure_filter = ath9k_configure_filter,
1398 .sta_notify = ath9k_sta_notify,
1399 .conf_tx = ath9k_conf_tx,
1400 .bss_info_changed = ath9k_bss_info_changed,
1401 .set_key = ath9k_set_key,
1402 .get_tsf = ath9k_get_tsf,
1403 .reset_tsf = ath9k_reset_tsf,
1404 .ampdu_action = ath9k_ampdu_action,
1405 .set_frag_threshold = ath9k_no_fragmentation,
1411 } ath_mac_bb_names[] = {
1412 { AR_SREV_VERSION_5416_PCI, "5416" },
1413 { AR_SREV_VERSION_5416_PCIE, "5418" },
1414 { AR_SREV_VERSION_9100, "9100" },
1415 { AR_SREV_VERSION_9160, "9160" },
1416 { AR_SREV_VERSION_9280, "9280" },
1417 { AR_SREV_VERSION_9285, "9285" }
1423 } ath_rf_names[] = {
1425 { AR_RAD5133_SREV_MAJOR, "5133" },
1426 { AR_RAD5122_SREV_MAJOR, "5122" },
1427 { AR_RAD2133_SREV_MAJOR, "2133" },
1428 { AR_RAD2122_SREV_MAJOR, "2122" }
1432 * Return the MAC/BB name. "????" is returned if the MAC/BB is unknown.
1436 ath_mac_bb_name(u32 mac_bb_version)
1440 for (i=0; i<ARRAY_SIZE(ath_mac_bb_names); i++) {
1441 if (ath_mac_bb_names[i].version == mac_bb_version) {
1442 return ath_mac_bb_names[i].name;
1450 * Return the RF name. "????" is returned if the RF is unknown.
1454 ath_rf_name(u16 rf_version)
1458 for (i=0; i<ARRAY_SIZE(ath_rf_names); i++) {
1459 if (ath_rf_names[i].version == rf_version) {
1460 return ath_rf_names[i].name;
1467 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1470 struct ath_softc *sc;
1471 struct ieee80211_hw *hw;
1477 if (pci_enable_device(pdev))
1480 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1483 printk(KERN_ERR "ath9k: 32-bit DMA not available\n");
1487 ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1490 printk(KERN_ERR "ath9k: 32-bit DMA consistent "
1491 "DMA enable faled\n");
1496 * Cache line size is used to size and align various
1497 * structures used to communicate with the hardware.
1499 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1502 * Linux 2.4.18 (at least) writes the cache line size
1503 * register as a 16-bit wide register which is wrong.
1504 * We must have this setup properly for rx buffer
1505 * DMA to work so force a reasonable value here if it
1508 csz = L1_CACHE_BYTES / sizeof(u32);
1509 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1512 * The default setting of latency timer yields poor results,
1513 * set it to the value used by other systems. It may be worth
1514 * tweaking this setting more.
1516 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1518 pci_set_master(pdev);
1521 * Disable the RETRY_TIMEOUT register (0x41) to keep
1522 * PCI Tx retries from interfering with C3 CPU state.
1524 pci_read_config_dword(pdev, 0x40, &val);
1525 if ((val & 0x0000ff00) != 0)
1526 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1528 ret = pci_request_region(pdev, 0, "ath9k");
1530 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1535 mem = pci_iomap(pdev, 0, 0);
1537 printk(KERN_ERR "PCI memory map error\n") ;
1542 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1544 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1548 SET_IEEE80211_DEV(hw, &pdev->dev);
1549 pci_set_drvdata(pdev, hw);
1556 if (ath_attach(id->device, sc) != 0) {
1561 /* setup interrupt service routine */
1563 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1564 printk(KERN_ERR "%s: request_irq failed\n",
1565 wiphy_name(hw->wiphy));
1572 "%s: Atheros AR%s MAC/BB Rev:%x "
1573 "AR%s RF Rev:%x: mem=0x%lx, irq=%d\n",
1574 wiphy_name(hw->wiphy),
1575 ath_mac_bb_name(ah->ah_macVersion),
1577 ath_rf_name((ah->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR)),
1579 (unsigned long)mem, pdev->irq);
1585 ieee80211_free_hw(hw);
1587 pci_iounmap(pdev, mem);
1589 pci_release_region(pdev, 0);
1591 pci_disable_device(pdev);
1595 static void ath_pci_remove(struct pci_dev *pdev)
1597 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1598 struct ath_softc *sc = hw->priv;
1602 free_irq(pdev->irq, sc);
1603 pci_iounmap(pdev, sc->mem);
1604 pci_release_region(pdev, 0);
1605 pci_disable_device(pdev);
1606 ieee80211_free_hw(hw);
1611 static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1613 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1614 struct ath_softc *sc = hw->priv;
1616 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1618 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
1619 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1620 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1623 pci_save_state(pdev);
1624 pci_disable_device(pdev);
1625 pci_set_power_state(pdev, 3);
1630 static int ath_pci_resume(struct pci_dev *pdev)
1632 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1633 struct ath_softc *sc = hw->priv;
1637 err = pci_enable_device(pdev);
1640 pci_restore_state(pdev);
1642 * Suspend/Resume resets the PCI configuration space, so we have to
1643 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1644 * PCI Tx retries from interfering with C3 CPU state
1646 pci_read_config_dword(pdev, 0x40, &val);
1647 if ((val & 0x0000ff00) != 0)
1648 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1651 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1652 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1653 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1655 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
1657 * check the h/w rfkill state on resume
1658 * and start the rfkill poll timer
1660 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1661 queue_delayed_work(sc->hw->workqueue,
1662 &sc->rf_kill.rfkill_poll, 0);
1668 #endif /* CONFIG_PM */
1670 MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1672 static struct pci_driver ath_pci_driver = {
1674 .id_table = ath_pci_id_table,
1675 .probe = ath_pci_probe,
1676 .remove = ath_pci_remove,
1678 .suspend = ath_pci_suspend,
1679 .resume = ath_pci_resume,
1680 #endif /* CONFIG_PM */
1683 static int __init init_ath_pci(void)
1685 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1687 if (pci_register_driver(&ath_pci_driver) < 0) {
1689 "ath_pci: No devices found, driver not installed.\n");
1690 pci_unregister_driver(&ath_pci_driver);
1696 module_init(init_ath_pci);
1698 static void __exit exit_ath_pci(void)
1700 pci_unregister_driver(&ath_pci_driver);
1701 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1703 module_exit(exit_ath_pci);