2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/types.h>
20 #include <linux/kernel.h>
21 #include <linux/kthread.h>
22 #include <linux/printk.h>
23 #include <linux/pci_ids.h>
24 #include <linux/netdevice.h>
25 #include <linux/interrupt.h>
26 #include <linux/sched.h>
27 #include <linux/mmc/sdio.h>
28 #include <linux/mmc/sdio_func.h>
29 #include <linux/mmc/card.h>
30 #include <linux/semaphore.h>
31 #include <linux/firmware.h>
32 #include <linux/module.h>
33 #include <linux/bcma/bcma.h>
34 #include <linux/debugfs.h>
35 #include <linux/vmalloc.h>
36 #include <asm/unaligned.h>
38 #include <brcmu_wifi.h>
39 #include <brcmu_utils.h>
40 #include <brcm_hw_ids.h>
42 #include "sdio_host.h"
43 #include "sdio_chip.h"
45 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
49 #define BRCMF_TRAP_INFO_SIZE 80
51 #define CBUF_LEN (128)
53 /* Device console log buffer state */
54 #define CONSOLE_BUFFER_MAX 2024
57 __le32 buf; /* Can't be pointer on (64-bit) hosts */
60 char *_buf_compat; /* Redundant pointer for backward compat. */
65 * When there is no UART (e.g. Quickturn),
66 * the host should write a complete
67 * input line directly into cbuf and then write
68 * the length into vcons_in.
69 * This may also be used when there is a real UART
70 * (at risk of conflicting with
71 * the real UART). vcons_out is currently unused.
76 /* Output (logging) buffer
77 * Console output is written to a ring buffer log_buf at index log_idx.
78 * The host may read the output when it sees log_idx advance.
79 * Output will be lost if the output wraps around faster than the host
82 struct rte_log_le log_le;
84 /* Console input line buffer
85 * Characters are read one at a time into cbuf
86 * until <CR> is received, then
87 * the buffer is processed as a command line.
88 * Also used for virtual UART.
95 #include <chipcommon.h>
100 #define TXQLEN 2048 /* bulk tx queue length */
101 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
102 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
105 #define TXRETRIES 2 /* # of retries for tx frames */
107 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
110 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
113 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
115 #define MEMBLOCK 2048 /* Block size used for downloading
117 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
118 biggest possible glom */
120 #define BRCMF_FIRSTREAD (1 << 6)
123 /* SBSDIO_DEVICE_CTL */
125 /* 1: device will assert busy signal when receiving CMD53 */
126 #define SBSDIO_DEVCTL_SETBUSY 0x01
127 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
128 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
129 /* 1: mask all interrupts to host except the chipActive (rev 8) */
130 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
131 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
132 * sdio bus power cycle to clear (rev 9) */
133 #define SBSDIO_DEVCTL_PADS_ISO 0x08
134 /* Force SD->SB reset mapping (rev 11) */
135 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
136 /* Determined by CoreControl bit */
137 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
138 /* Force backplane reset */
139 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
140 /* Force no backplane reset */
141 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
143 /* direct(mapped) cis space */
145 /* MAPPED common CIS address */
146 #define SBSDIO_CIS_BASE_COMMON 0x1000
147 /* maximum bytes in one CIS */
148 #define SBSDIO_CIS_SIZE_LIMIT 0x200
149 /* cis offset addr is < 17 bits */
150 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
152 /* manfid tuple length, include tuple, link bytes */
153 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
156 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
157 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
158 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
159 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
160 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
161 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
162 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
163 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
164 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
165 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
166 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
167 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
168 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
169 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
170 #define I_PC (1 << 10) /* descriptor error */
171 #define I_PD (1 << 11) /* data error */
172 #define I_DE (1 << 12) /* Descriptor protocol Error */
173 #define I_RU (1 << 13) /* Receive descriptor Underflow */
174 #define I_RO (1 << 14) /* Receive fifo Overflow */
175 #define I_XU (1 << 15) /* Transmit fifo Underflow */
176 #define I_RI (1 << 16) /* Receive Interrupt */
177 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
178 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
179 #define I_XI (1 << 24) /* Transmit Interrupt */
180 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
181 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
182 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
183 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
184 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
185 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
186 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
187 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
188 #define I_DMA (I_RI | I_XI | I_ERRORS)
191 #define CC_CISRDY (1 << 0) /* CIS Ready */
192 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
193 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
194 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
195 #define CC_XMTDATAAVAIL_MODE (1 << 4)
196 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
199 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
200 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
201 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
202 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
205 #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
207 /* Total length of frame header for dongle protocol */
208 #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
209 #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
212 * Software allocation of To SB Mailbox resources
215 /* tosbmailbox bits corresponding to intstatus bits */
216 #define SMB_NAK (1 << 0) /* Frame NAK */
217 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
218 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
219 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
221 /* tosbmailboxdata */
222 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
225 * Software allocation of To Host Mailbox resources
229 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
230 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
231 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
232 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
234 /* tohostmailboxdata */
235 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
236 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
237 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
238 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
240 #define HMB_DATA_FCDATA_MASK 0xff000000
241 #define HMB_DATA_FCDATA_SHIFT 24
243 #define HMB_DATA_VERSION_MASK 0x00ff0000
244 #define HMB_DATA_VERSION_SHIFT 16
247 * Software-defined protocol header
250 /* Current protocol version */
251 #define SDPCM_PROT_VERSION 4
253 /* SW frame header */
254 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
256 #define SDPCM_CHANNEL_MASK 0x00000f00
257 #define SDPCM_CHANNEL_SHIFT 8
258 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
260 #define SDPCM_NEXTLEN_OFFSET 2
262 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
263 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
264 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
265 #define SDPCM_DOFFSET_MASK 0xff000000
266 #define SDPCM_DOFFSET_SHIFT 24
267 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
268 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
269 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
270 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
272 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
274 /* logical channel numbers */
275 #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
276 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
277 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
278 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
279 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
281 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
283 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
286 * Shared structure between dongle and the host.
287 * The structure contains pointers to trap or assert information.
289 #define SDPCM_SHARED_VERSION 0x0003
290 #define SDPCM_SHARED_VERSION_MASK 0x00FF
291 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
292 #define SDPCM_SHARED_ASSERT 0x0200
293 #define SDPCM_SHARED_TRAP 0x0400
295 /* Space for header read, limit for data packets */
296 #define MAX_HDR_READ (1 << 6)
297 #define MAX_RX_DATASZ 2048
299 /* Maximum milliseconds to wait for F2 to come up */
300 #define BRCMF_WAIT_F2RDY 3000
302 /* Bump up limit on waiting for HT to account for first startup;
303 * if the image is doing a CRC calculation before programming the PMU
304 * for HT availability, it could take a couple hundred ms more, so
305 * max out at a 1 second (1000000us).
307 #undef PMU_MAX_TRANSITION_DLY
308 #define PMU_MAX_TRANSITION_DLY 1000000
310 /* Value for ChipClockCSR during initial setup */
311 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
312 SBSDIO_ALP_AVAIL_REQ)
314 /* Flags for SDH calls */
315 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
317 #define BRCMF_SDIO_FW_NAME "brcm/brcmfmac-sdio.bin"
318 #define BRCMF_SDIO_NV_NAME "brcm/brcmfmac-sdio.txt"
319 MODULE_FIRMWARE(BRCMF_SDIO_FW_NAME);
320 MODULE_FIRMWARE(BRCMF_SDIO_NV_NAME);
322 #define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */
323 #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
326 #define BRCMF_IDLE_INTERVAL 1
329 * Conversion of 802.1D priority to precedence level
331 static uint prio2prec(u32 prio)
333 return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
339 u32 corecontrol; /* 0x00, rev8 */
340 u32 corestatus; /* rev8 */
342 u32 biststatus; /* rev8 */
345 u16 pcmciamesportaladdr; /* 0x010, rev8 */
347 u16 pcmciamesportalmask; /* rev8 */
349 u16 pcmciawrframebc; /* rev8 */
351 u16 pcmciaunderflowtimer; /* rev8 */
355 u32 intstatus; /* 0x020, rev8 */
356 u32 hostintmask; /* rev8 */
357 u32 intmask; /* rev8 */
358 u32 sbintstatus; /* rev8 */
359 u32 sbintmask; /* rev8 */
360 u32 funcintmask; /* rev4 */
362 u32 tosbmailbox; /* 0x040, rev8 */
363 u32 tohostmailbox; /* rev8 */
364 u32 tosbmailboxdata; /* rev8 */
365 u32 tohostmailboxdata; /* rev8 */
367 /* synchronized access to registers in SDIO clock domain */
368 u32 sdioaccess; /* 0x050, rev8 */
371 /* PCMCIA frame control */
372 u8 pcmciaframectrl; /* 0x060, rev8 */
374 u8 pcmciawatermark; /* rev8 */
377 /* interrupt batching control */
378 u32 intrcvlazy; /* 0x100, rev8 */
382 u32 cmd52rd; /* 0x110, rev8 */
383 u32 cmd52wr; /* rev8 */
384 u32 cmd53rd; /* rev8 */
385 u32 cmd53wr; /* rev8 */
386 u32 abort; /* rev8 */
387 u32 datacrcerror; /* rev8 */
388 u32 rdoutofsync; /* rev8 */
389 u32 wroutofsync; /* rev8 */
390 u32 writebusy; /* rev8 */
391 u32 readwait; /* rev8 */
392 u32 readterm; /* rev8 */
393 u32 writeterm; /* rev8 */
395 u32 clockctlstatus; /* rev8 */
398 u32 PAD[128]; /* DMA engines */
400 /* SDIO/PCMCIA CIS region */
401 char cis[512]; /* 0x400-0x5ff, rev6 */
403 /* PCMCIA function control registers */
404 char pcmciafcr[256]; /* 0x600-6ff, rev6 */
407 /* PCMCIA backplane access */
408 u16 backplanecsr; /* 0x76E, rev6 */
409 u16 backplaneaddr0; /* rev6 */
410 u16 backplaneaddr1; /* rev6 */
411 u16 backplaneaddr2; /* rev6 */
412 u16 backplaneaddr3; /* rev6 */
413 u16 backplanedata0; /* rev6 */
414 u16 backplanedata1; /* rev6 */
415 u16 backplanedata2; /* rev6 */
416 u16 backplanedata3; /* rev6 */
419 /* sprom "size" & "blank" info */
420 u16 spromstatus; /* 0x7BE, rev2 */
427 /* Device console log buffer state */
428 struct brcmf_console {
429 uint count; /* Poll interval msec counter */
430 uint log_addr; /* Log struct address (fixed) */
431 struct rte_log_le log_le; /* Log struct (host copy) */
432 uint bufsize; /* Size of log buffer */
433 u8 *buf; /* Log buffer (host copy) */
434 uint last; /* Last buffer read index */
437 struct brcmf_trap_info {
451 __le32 r9; /* sb/v6 */
452 __le32 r10; /* sl/v7 */
453 __le32 r11; /* fp/v8 */
461 struct sdpcm_shared {
465 u32 assert_file_addr;
467 u32 console_addr; /* Address of struct rte_console */
473 struct sdpcm_shared_le {
476 __le32 assert_exp_addr;
477 __le32 assert_file_addr;
479 __le32 console_addr; /* Address of struct rte_console */
480 __le32 msgtrace_addr;
486 /* misc chip info needed by some of the routines */
487 /* Private data for SDIO bus interaction */
489 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
490 struct chip_info *ci; /* Chip info struct */
491 char *vars; /* Variables (from CIS and/or other) */
492 uint varsz; /* Size of variables buffer */
494 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
496 u32 hostintmask; /* Copy of Host Interrupt Mask */
497 u32 intstatus; /* Intstatus bits (events) pending */
498 bool dpc_sched; /* Indicates DPC schedule (intrpt rcvd) */
499 bool fcstate; /* State of dongle flow-control */
501 uint blocksize; /* Block size of SDIO transfers */
502 uint roundup; /* Max roundup limit */
504 struct pktq txq; /* Queue length used for flow-control */
505 u8 flowcontrol; /* per prio flow control bitmask */
506 u8 tx_seq; /* Transmit sequence number (next) */
507 u8 tx_max; /* Maximum transmit sequence allowed */
509 u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
510 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
511 u16 nextlen; /* Next Read Len from last header */
512 u8 rx_seq; /* Receive sequence number (expected) */
513 bool rxskip; /* Skip receive (awaiting NAK ACK) */
515 uint rxbound; /* Rx frames to read before resched */
516 uint txbound; /* Tx frames to send before resched */
519 struct sk_buff *glomd; /* Packet containing glomming descriptor */
520 struct sk_buff_head glom; /* Packet list for glommed superframe */
521 uint glomerr; /* Glom packet read errors */
523 u8 *rxbuf; /* Buffer for receiving control packets */
524 uint rxblen; /* Allocated length of rxbuf */
525 u8 *rxctl; /* Aligned pointer into rxbuf */
526 u8 *databuf; /* Buffer for receiving big glom packet */
527 u8 *dataptr; /* Aligned pointer into databuf */
528 uint rxlen; /* Length of valid data in buffer */
530 u8 sdpcm_ver; /* Bus protocol reported by dongle */
532 bool intr; /* Use interrupts */
533 bool poll; /* Use polling */
534 bool ipend; /* Device interrupt is pending */
535 uint spurious; /* Count of spurious interrupts */
536 uint pollrate; /* Ticks between device polls */
537 uint polltick; /* Tick counter */
540 uint console_interval;
541 struct brcmf_console console; /* Console output polling support */
542 uint console_addr; /* Console address from shared struct */
545 uint clkstate; /* State of sd and backplane clock(s) */
546 bool activity; /* Activity flag for clock down */
547 s32 idletime; /* Control for activity timeout */
548 s32 idlecount; /* Activity timeout counter */
549 s32 idleclock; /* How to set bus driver when idle */
551 bool use_rxchain; /* If brcmf should use PKT chains */
552 bool rxflow_mode; /* Rx flow control mode */
553 bool rxflow; /* Is rx flow control on */
554 bool alp_only; /* Don't use HT clock (ALP only) */
555 /* Field to decide if rx of control frames happen in rxbuf or lb-pool */
560 bool ctrl_frame_stat;
563 wait_queue_head_t ctrl_wait;
564 wait_queue_head_t dcmd_resp_wait;
566 struct timer_list timer;
567 struct completion watchdog_wait;
568 struct task_struct *watchdog_tsk;
572 struct task_struct *dpc_tsk;
573 struct completion dpc_wait;
574 struct list_head dpc_tsklst;
575 spinlock_t dpc_tl_lock;
577 struct semaphore sdsem;
579 const struct firmware *firmware;
582 bool txoff; /* Transmit flow-controlled */
583 struct brcmf_sdio_count sdcnt;
589 #define CLK_PENDING 2 /* Not used yet */
593 static int qcount[NUMPRIO];
594 static int tx_packets[NUMPRIO];
597 #define SDIO_DRIVE_STRENGTH 6 /* in milliamps */
599 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
601 /* Retry count for register access failures */
602 static const uint retry_limit = 2;
604 /* Limit on rounding up frames */
605 static const uint max_roundup = 512;
609 static void pkt_align(struct sk_buff *p, int len, int align)
612 datalign = (unsigned long)(p->data);
613 datalign = roundup(datalign, (align)) - datalign;
615 skb_pull(p, datalign);
619 /* To check if there's window offered */
620 static bool data_ok(struct brcmf_sdio *bus)
622 return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
623 ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
627 * Reads a register in the SDIO hardware block. This block occupies a series of
628 * adresses on the 32 bit backplane bus.
631 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
633 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
636 *regvar = brcmf_sdio_regrl(bus->sdiodev,
637 bus->ci->c_inf[idx].base + offset, &ret);
643 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
645 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
648 brcmf_sdio_regwl(bus->sdiodev,
649 bus->ci->c_inf[idx].base + reg_offset,
655 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
657 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
659 /* Packet free applicable unconditionally for sdio and sdspi.
660 * Conditional if bufpool was present for gspi bus.
662 static void brcmf_sdbrcm_pktfree2(struct brcmf_sdio *bus, struct sk_buff *pkt)
665 brcmu_pkt_buf_free_skb(pkt);
668 /* Turn backplane clock on or off */
669 static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
672 u8 clkctl, clkreq, devctl;
673 unsigned long timeout;
675 brcmf_dbg(TRACE, "Enter\n");
680 /* Request HT Avail */
682 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
684 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
687 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
691 /* Check current status */
692 clkctl = brcmf_sdio_regrb(bus->sdiodev,
693 SBSDIO_FUNC1_CHIPCLKCSR, &err);
695 brcmf_dbg(ERROR, "HT Avail read error: %d\n", err);
699 /* Go to pending and await interrupt if appropriate */
700 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
701 /* Allow only clock-available interrupt */
702 devctl = brcmf_sdio_regrb(bus->sdiodev,
703 SBSDIO_DEVICE_CTL, &err);
705 brcmf_dbg(ERROR, "Devctl error setting CA: %d\n",
710 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
711 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
713 brcmf_dbg(INFO, "CLKCTL: set PENDING\n");
714 bus->clkstate = CLK_PENDING;
717 } else if (bus->clkstate == CLK_PENDING) {
718 /* Cancel CA-only interrupt filter */
719 devctl = brcmf_sdio_regrb(bus->sdiodev,
720 SBSDIO_DEVICE_CTL, &err);
721 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
722 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
726 /* Otherwise, wait here (polling) for HT Avail */
728 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
729 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
730 clkctl = brcmf_sdio_regrb(bus->sdiodev,
731 SBSDIO_FUNC1_CHIPCLKCSR,
733 if (time_after(jiffies, timeout))
736 usleep_range(5000, 10000);
739 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
742 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
743 brcmf_dbg(ERROR, "HT Avail timeout (%d): clkctl 0x%02x\n",
744 PMU_MAX_TRANSITION_DLY, clkctl);
748 /* Mark clock available */
749 bus->clkstate = CLK_AVAIL;
750 brcmf_dbg(INFO, "CLKCTL: turned ON\n");
753 if (!bus->alp_only) {
754 if (SBSDIO_ALPONLY(clkctl))
755 brcmf_dbg(ERROR, "HT Clock should be on\n");
757 #endif /* defined (DEBUG) */
759 bus->activity = true;
763 if (bus->clkstate == CLK_PENDING) {
764 /* Cancel CA-only interrupt filter */
765 devctl = brcmf_sdio_regrb(bus->sdiodev,
766 SBSDIO_DEVICE_CTL, &err);
767 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
768 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
772 bus->clkstate = CLK_SDONLY;
773 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
775 brcmf_dbg(INFO, "CLKCTL: turned OFF\n");
777 brcmf_dbg(ERROR, "Failed access turning clock off: %d\n",
785 /* Change idle/active SD state */
786 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
788 brcmf_dbg(TRACE, "Enter\n");
791 bus->clkstate = CLK_SDONLY;
793 bus->clkstate = CLK_NONE;
798 /* Transition SD and backplane clock readiness */
799 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
802 uint oldstate = bus->clkstate;
805 brcmf_dbg(TRACE, "Enter\n");
807 /* Early exit if we're already there */
808 if (bus->clkstate == target) {
809 if (target == CLK_AVAIL) {
810 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
811 bus->activity = true;
818 /* Make sure SD clock is available */
819 if (bus->clkstate == CLK_NONE)
820 brcmf_sdbrcm_sdclk(bus, true);
821 /* Now request HT Avail on the backplane */
822 brcmf_sdbrcm_htclk(bus, true, pendok);
823 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
824 bus->activity = true;
828 /* Remove HT request, or bring up SD clock */
829 if (bus->clkstate == CLK_NONE)
830 brcmf_sdbrcm_sdclk(bus, true);
831 else if (bus->clkstate == CLK_AVAIL)
832 brcmf_sdbrcm_htclk(bus, false, false);
834 brcmf_dbg(ERROR, "request for %d -> %d\n",
835 bus->clkstate, target);
836 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
840 /* Make sure to remove HT request */
841 if (bus->clkstate == CLK_AVAIL)
842 brcmf_sdbrcm_htclk(bus, false, false);
843 /* Now remove the SD clock */
844 brcmf_sdbrcm_sdclk(bus, false);
845 brcmf_sdbrcm_wd_timer(bus, 0);
849 brcmf_dbg(INFO, "%d -> %d\n", oldstate, bus->clkstate);
855 static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
862 brcmf_dbg(TRACE, "Enter\n");
864 /* Read mailbox data and ack that we did so */
865 ret = r_sdreg32(bus, &hmb_data,
866 offsetof(struct sdpcmd_regs, tohostmailboxdata));
869 w_sdreg32(bus, SMB_INT_ACK,
870 offsetof(struct sdpcmd_regs, tosbmailbox));
871 bus->sdcnt.f1regdata += 2;
873 /* Dongle recomposed rx frames, accept them again */
874 if (hmb_data & HMB_DATA_NAKHANDLED) {
875 brcmf_dbg(INFO, "Dongle reports NAK handled, expect rtx of %d\n",
878 brcmf_dbg(ERROR, "unexpected NAKHANDLED!\n");
881 intstatus |= I_HMB_FRAME_IND;
885 * DEVREADY does not occur with gSPI.
887 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
889 (hmb_data & HMB_DATA_VERSION_MASK) >>
890 HMB_DATA_VERSION_SHIFT;
891 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
892 brcmf_dbg(ERROR, "Version mismatch, dongle reports %d, "
894 bus->sdpcm_ver, SDPCM_PROT_VERSION);
896 brcmf_dbg(INFO, "Dongle ready, protocol version %d\n",
901 * Flow Control has been moved into the RX headers and this out of band
902 * method isn't used any more.
903 * remaining backward compatible with older dongles.
905 if (hmb_data & HMB_DATA_FC) {
906 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
907 HMB_DATA_FCDATA_SHIFT;
909 if (fcbits & ~bus->flowcontrol)
910 bus->sdcnt.fc_xoff++;
912 if (bus->flowcontrol & ~fcbits)
915 bus->sdcnt.fc_rcvd++;
916 bus->flowcontrol = fcbits;
919 /* Shouldn't be any others */
920 if (hmb_data & ~(HMB_DATA_DEVREADY |
921 HMB_DATA_NAKHANDLED |
924 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
925 brcmf_dbg(ERROR, "Unknown mailbox data content: 0x%02x\n",
931 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
938 brcmf_dbg(ERROR, "%sterminate frame%s\n",
939 abort ? "abort command, " : "",
940 rtx ? ", send NAK" : "");
943 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
945 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
947 bus->sdcnt.f1regdata++;
949 /* Wait until the packet has been flushed (device/FIFO stable) */
950 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
951 hi = brcmf_sdio_regrb(bus->sdiodev,
952 SBSDIO_FUNC1_RFRAMEBCHI, &err);
953 lo = brcmf_sdio_regrb(bus->sdiodev,
954 SBSDIO_FUNC1_RFRAMEBCLO, &err);
955 bus->sdcnt.f1regdata += 2;
957 if ((hi == 0) && (lo == 0))
960 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
961 brcmf_dbg(ERROR, "count growing: last 0x%04x now 0x%04x\n",
962 lastrbc, (hi << 8) + lo);
964 lastrbc = (hi << 8) + lo;
968 brcmf_dbg(ERROR, "count never zeroed: last 0x%04x\n", lastrbc);
970 brcmf_dbg(INFO, "flush took %d iterations\n", 0xffff - retries);
974 err = w_sdreg32(bus, SMB_NAK,
975 offsetof(struct sdpcmd_regs, tosbmailbox));
977 bus->sdcnt.f1regdata++;
982 /* Clear partial in any case */
985 /* If we can't reach the device, signal failure */
987 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
990 /* copy a buffer into a pkt buffer chain */
991 static uint brcmf_sdbrcm_glom_from_buf(struct brcmf_sdio *bus, uint len)
1000 skb_queue_walk(&bus->glom, p) {
1001 n = min_t(uint, p->len, len);
1002 memcpy(p->data, buf, n);
1013 /* return total length of buffer chain */
1014 static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
1020 skb_queue_walk(&bus->glom, p)
1025 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
1027 struct sk_buff *cur, *next;
1029 skb_queue_walk_safe(&bus->glom, cur, next) {
1030 skb_unlink(cur, &bus->glom);
1031 brcmu_pkt_buf_free_skb(cur);
1035 static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1041 struct sk_buff *pfirst, *pnext;
1044 u8 chan, seq, doff, sfdoff;
1048 bool usechain = bus->use_rxchain;
1050 /* If packets, issue read(s) and send up packet chain */
1051 /* Return sequence numbers consumed? */
1053 brcmf_dbg(TRACE, "start: glomd %p glom %p\n",
1054 bus->glomd, skb_peek(&bus->glom));
1056 /* If there's a descriptor, generate the packet chain */
1058 pfirst = pnext = NULL;
1059 dlen = (u16) (bus->glomd->len);
1060 dptr = bus->glomd->data;
1061 if (!dlen || (dlen & 1)) {
1062 brcmf_dbg(ERROR, "bad glomd len(%d), ignore descriptor\n",
1067 for (totlen = num = 0; dlen; num++) {
1068 /* Get (and move past) next length */
1069 sublen = get_unaligned_le16(dptr);
1070 dlen -= sizeof(u16);
1071 dptr += sizeof(u16);
1072 if ((sublen < SDPCM_HDRLEN) ||
1073 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1074 brcmf_dbg(ERROR, "descriptor len %d bad: %d\n",
1079 if (sublen % BRCMF_SDALIGN) {
1080 brcmf_dbg(ERROR, "sublen %d not multiple of %d\n",
1081 sublen, BRCMF_SDALIGN);
1086 /* For last frame, adjust read len so total
1087 is a block multiple */
1090 (roundup(totlen, bus->blocksize) - totlen);
1091 totlen = roundup(totlen, bus->blocksize);
1094 /* Allocate/chain packet for next subframe */
1095 pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
1096 if (pnext == NULL) {
1097 brcmf_dbg(ERROR, "bcm_pkt_buf_get_skb failed, num %d len %d\n",
1101 skb_queue_tail(&bus->glom, pnext);
1103 /* Adhere to start alignment requirements */
1104 pkt_align(pnext, sublen, BRCMF_SDALIGN);
1107 /* If all allocations succeeded, save packet chain
1110 brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1112 if (BRCMF_GLOM_ON() && bus->nextlen &&
1113 totlen != bus->nextlen) {
1114 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1115 bus->nextlen, totlen, rxseq);
1117 pfirst = pnext = NULL;
1119 brcmf_sdbrcm_free_glom(bus);
1123 /* Done with descriptor packet */
1124 brcmu_pkt_buf_free_skb(bus->glomd);
1129 /* Ok -- either we just generated a packet chain,
1130 or had one from before */
1131 if (!skb_queue_empty(&bus->glom)) {
1132 if (BRCMF_GLOM_ON()) {
1133 brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1134 skb_queue_walk(&bus->glom, pnext) {
1135 brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
1136 pnext, (u8 *) (pnext->data),
1137 pnext->len, pnext->len);
1141 pfirst = skb_peek(&bus->glom);
1142 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1144 /* Do an SDIO read for the superframe. Configurable iovar to
1145 * read directly into the chained packet, or allocate a large
1146 * packet and and copy into the chain.
1149 errcode = brcmf_sdcard_recv_chain(bus->sdiodev,
1150 bus->sdiodev->sbwad,
1151 SDIO_FUNC_2, F2SYNC, &bus->glom);
1152 } else if (bus->dataptr) {
1153 errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
1154 bus->sdiodev->sbwad,
1155 SDIO_FUNC_2, F2SYNC,
1156 bus->dataptr, dlen);
1157 sublen = (u16) brcmf_sdbrcm_glom_from_buf(bus, dlen);
1158 if (sublen != dlen) {
1159 brcmf_dbg(ERROR, "FAILED TO COPY, dlen %d sublen %d\n",
1165 brcmf_dbg(ERROR, "COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
1169 bus->sdcnt.f2rxdata++;
1171 /* On failure, kill the superframe, allow a couple retries */
1173 brcmf_dbg(ERROR, "glom read of %d bytes failed: %d\n",
1175 bus->sdiodev->bus_if->dstats.rx_errors++;
1177 if (bus->glomerr++ < 3) {
1178 brcmf_sdbrcm_rxfail(bus, true, true);
1181 brcmf_sdbrcm_rxfail(bus, true, false);
1182 bus->sdcnt.rxglomfail++;
1183 brcmf_sdbrcm_free_glom(bus);
1188 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1189 pfirst->data, min_t(int, pfirst->len, 48),
1192 /* Validate the superframe header */
1193 dptr = (u8 *) (pfirst->data);
1194 sublen = get_unaligned_le16(dptr);
1195 check = get_unaligned_le16(dptr + sizeof(u16));
1197 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1198 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
1199 bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1200 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1201 brcmf_dbg(INFO, "nextlen too large (%d) seq %d\n",
1205 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1206 txmax = SDPCM_WINDOW_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1209 if ((u16)~(sublen ^ check)) {
1210 brcmf_dbg(ERROR, "(superframe): HW hdr error: len/check 0x%04x/0x%04x\n",
1213 } else if (roundup(sublen, bus->blocksize) != dlen) {
1214 brcmf_dbg(ERROR, "(superframe): len 0x%04x, rounded 0x%04x, expect 0x%04x\n",
1215 sublen, roundup(sublen, bus->blocksize),
1218 } else if (SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]) !=
1219 SDPCM_GLOM_CHANNEL) {
1220 brcmf_dbg(ERROR, "(superframe): bad channel %d\n",
1221 SDPCM_PACKET_CHANNEL(
1222 &dptr[SDPCM_FRAMETAG_LEN]));
1224 } else if (SDPCM_GLOMDESC(&dptr[SDPCM_FRAMETAG_LEN])) {
1225 brcmf_dbg(ERROR, "(superframe): got 2nd descriptor?\n");
1227 } else if ((doff < SDPCM_HDRLEN) ||
1228 (doff > (pfirst->len - SDPCM_HDRLEN))) {
1229 brcmf_dbg(ERROR, "(superframe): Bad data offset %d: HW %d pkt %d min %d\n",
1230 doff, sublen, pfirst->len, SDPCM_HDRLEN);
1234 /* Check sequence number of superframe SW header */
1236 brcmf_dbg(INFO, "(superframe) rx_seq %d, expected %d\n",
1238 bus->sdcnt.rx_badseq++;
1242 /* Check window for sanity */
1243 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1244 brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
1245 txmax, bus->tx_seq);
1246 txmax = bus->tx_seq + 2;
1248 bus->tx_max = txmax;
1250 /* Remove superframe header, remember offset */
1251 skb_pull(pfirst, doff);
1255 /* Validate all the subframe headers */
1256 skb_queue_walk(&bus->glom, pnext) {
1257 /* leave when invalid subframe is found */
1261 dptr = (u8 *) (pnext->data);
1262 dlen = (u16) (pnext->len);
1263 sublen = get_unaligned_le16(dptr);
1264 check = get_unaligned_le16(dptr + sizeof(u16));
1265 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1266 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1267 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1268 dptr, 32, "subframe:\n");
1270 if ((u16)~(sublen ^ check)) {
1271 brcmf_dbg(ERROR, "(subframe %d): HW hdr error: len/check 0x%04x/0x%04x\n",
1272 num, sublen, check);
1274 } else if ((sublen > dlen) || (sublen < SDPCM_HDRLEN)) {
1275 brcmf_dbg(ERROR, "(subframe %d): length mismatch: len 0x%04x, expect 0x%04x\n",
1278 } else if ((chan != SDPCM_DATA_CHANNEL) &&
1279 (chan != SDPCM_EVENT_CHANNEL)) {
1280 brcmf_dbg(ERROR, "(subframe %d): bad channel %d\n",
1283 } else if ((doff < SDPCM_HDRLEN) || (doff > sublen)) {
1284 brcmf_dbg(ERROR, "(subframe %d): Bad data offset %d: HW %d min %d\n",
1285 num, doff, sublen, SDPCM_HDRLEN);
1288 /* increase the subframe count */
1293 /* Terminate frame on error, request
1295 if (bus->glomerr++ < 3) {
1296 /* Restore superframe header space */
1297 skb_push(pfirst, sfdoff);
1298 brcmf_sdbrcm_rxfail(bus, true, true);
1301 brcmf_sdbrcm_rxfail(bus, true, false);
1302 bus->sdcnt.rxglomfail++;
1303 brcmf_sdbrcm_free_glom(bus);
1309 /* Basic SD framing looks ok - process each packet (header) */
1311 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1312 dptr = (u8 *) (pfirst->data);
1313 sublen = get_unaligned_le16(dptr);
1314 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1315 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
1316 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1318 brcmf_dbg(GLOM, "Get subframe %d, %p(%p/%d), sublen %d chan %d seq %d\n",
1319 num, pfirst, pfirst->data,
1320 pfirst->len, sublen, chan, seq);
1322 /* precondition: chan == SDPCM_DATA_CHANNEL ||
1323 chan == SDPCM_EVENT_CHANNEL */
1326 brcmf_dbg(GLOM, "rx_seq %d, expected %d\n",
1328 bus->sdcnt.rx_badseq++;
1333 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1334 dptr, dlen, "Rx Subframe Data:\n");
1336 __skb_trim(pfirst, sublen);
1337 skb_pull(pfirst, doff);
1339 if (pfirst->len == 0) {
1340 skb_unlink(pfirst, &bus->glom);
1341 brcmu_pkt_buf_free_skb(pfirst);
1343 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev,
1344 &ifidx, pfirst) != 0) {
1345 brcmf_dbg(ERROR, "rx protocol error\n");
1346 bus->sdiodev->bus_if->dstats.rx_errors++;
1347 skb_unlink(pfirst, &bus->glom);
1348 brcmu_pkt_buf_free_skb(pfirst);
1352 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1354 min_t(int, pfirst->len, 32),
1355 "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1356 bus->glom.qlen, pfirst, pfirst->data,
1357 pfirst->len, pfirst->next,
1360 /* sent any remaining packets up */
1361 if (bus->glom.qlen) {
1363 brcmf_rx_frame(bus->sdiodev->dev, ifidx, &bus->glom);
1367 bus->sdcnt.rxglomframes++;
1368 bus->sdcnt.rxglompkts += bus->glom.qlen;
1373 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1376 DECLARE_WAITQUEUE(wait, current);
1377 int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1379 /* Wait until control frame is available */
1380 add_wait_queue(&bus->dcmd_resp_wait, &wait);
1381 set_current_state(TASK_INTERRUPTIBLE);
1383 while (!(*condition) && (!signal_pending(current) && timeout))
1384 timeout = schedule_timeout(timeout);
1386 if (signal_pending(current))
1389 set_current_state(TASK_RUNNING);
1390 remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1395 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
1397 if (waitqueue_active(&bus->dcmd_resp_wait))
1398 wake_up_interruptible(&bus->dcmd_resp_wait);
1403 brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1409 brcmf_dbg(TRACE, "Enter\n");
1411 /* Set rxctl for frame (w/optional alignment) */
1412 bus->rxctl = bus->rxbuf;
1413 bus->rxctl += BRCMF_FIRSTREAD;
1414 pad = ((unsigned long)bus->rxctl % BRCMF_SDALIGN);
1416 bus->rxctl += (BRCMF_SDALIGN - pad);
1417 bus->rxctl -= BRCMF_FIRSTREAD;
1419 /* Copy the already-read portion over */
1420 memcpy(bus->rxctl, hdr, BRCMF_FIRSTREAD);
1421 if (len <= BRCMF_FIRSTREAD)
1424 /* Raise rdlen to next SDIO block to avoid tail command */
1425 rdlen = len - BRCMF_FIRSTREAD;
1426 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1427 pad = bus->blocksize - (rdlen % bus->blocksize);
1428 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1429 ((len + pad) < bus->sdiodev->bus_if->maxctl))
1431 } else if (rdlen % BRCMF_SDALIGN) {
1432 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1435 /* Satisfy length-alignment requirements */
1436 if (rdlen & (ALIGNMENT - 1))
1437 rdlen = roundup(rdlen, ALIGNMENT);
1439 /* Drop if the read is too big or it exceeds our maximum */
1440 if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1441 brcmf_dbg(ERROR, "%d-byte control read exceeds %d-byte buffer\n",
1442 rdlen, bus->sdiodev->bus_if->maxctl);
1443 bus->sdiodev->bus_if->dstats.rx_errors++;
1444 brcmf_sdbrcm_rxfail(bus, false, false);
1448 if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1449 brcmf_dbg(ERROR, "%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1450 len, len - doff, bus->sdiodev->bus_if->maxctl);
1451 bus->sdiodev->bus_if->dstats.rx_errors++;
1452 bus->sdcnt.rx_toolong++;
1453 brcmf_sdbrcm_rxfail(bus, false, false);
1457 /* Read remainder of frame body into the rxctl buffer */
1458 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1459 bus->sdiodev->sbwad,
1461 F2SYNC, (bus->rxctl + BRCMF_FIRSTREAD), rdlen);
1462 bus->sdcnt.f2rxdata++;
1464 /* Control frame failures need retransmission */
1466 brcmf_dbg(ERROR, "read %d control bytes failed: %d\n",
1468 bus->sdcnt.rxc_errors++;
1469 brcmf_sdbrcm_rxfail(bus, true, true);
1475 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1476 bus->rxctl, len, "RxCtrl:\n");
1478 /* Point to valid data and indicate its length */
1480 bus->rxlen = len - doff;
1483 /* Awake any waiters */
1484 brcmf_sdbrcm_dcmd_resp_wake(bus);
1487 /* Pad read to blocksize for efficiency */
1488 static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1490 if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1491 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1492 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1493 *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1495 } else if (*rdlen % BRCMF_SDALIGN) {
1496 *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN);
1501 brcmf_alloc_pkt_and_read(struct brcmf_sdio *bus, u16 rdlen,
1502 struct sk_buff **pkt, u8 **rxbuf)
1504 int sdret; /* Return code from calls */
1506 *pkt = brcmu_pkt_buf_get_skb(rdlen + BRCMF_SDALIGN);
1510 pkt_align(*pkt, rdlen, BRCMF_SDALIGN);
1511 *rxbuf = (u8 *) ((*pkt)->data);
1512 /* Read the entire frame */
1513 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1514 SDIO_FUNC_2, F2SYNC, *pkt);
1515 bus->sdcnt.f2rxdata++;
1518 brcmf_dbg(ERROR, "(nextlen): read %d bytes failed: %d\n",
1520 brcmu_pkt_buf_free_skb(*pkt);
1521 bus->sdiodev->bus_if->dstats.rx_errors++;
1522 /* Force retry w/normal header read.
1523 * Don't attempt NAK for
1526 brcmf_sdbrcm_rxfail(bus, true, true);
1531 /* Checks the header */
1533 brcmf_check_rxbuf(struct brcmf_sdio *bus, struct sk_buff *pkt, u8 *rxbuf,
1534 u8 rxseq, u16 nextlen, u16 *len)
1537 bool len_consistent; /* Result of comparing readahead len and
1540 memcpy(bus->rxhdr, rxbuf, SDPCM_HDRLEN);
1542 /* Extract hardware header fields */
1543 *len = get_unaligned_le16(bus->rxhdr);
1544 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
1546 /* All zeros means readahead info was bad */
1547 if (!(*len | check)) {
1548 brcmf_dbg(INFO, "(nextlen): read zeros in HW header???\n");
1552 /* Validate check bytes */
1553 if ((u16)~(*len ^ check)) {
1554 brcmf_dbg(ERROR, "(nextlen): HW hdr error: nextlen/len/check 0x%04x/0x%04x/0x%04x\n",
1555 nextlen, *len, check);
1556 bus->sdcnt.rx_badhdr++;
1557 brcmf_sdbrcm_rxfail(bus, false, false);
1561 /* Validate frame length */
1562 if (*len < SDPCM_HDRLEN) {
1563 brcmf_dbg(ERROR, "(nextlen): HW hdr length invalid: %d\n",
1568 /* Check for consistency with readahead info */
1569 len_consistent = (nextlen != (roundup(*len, 16) >> 4));
1570 if (len_consistent) {
1571 /* Mismatch, force retry w/normal
1572 header (may be >4K) */
1573 brcmf_dbg(ERROR, "(nextlen): mismatch, nextlen %d len %d rnd %d; expected rxseq %d\n",
1574 nextlen, *len, roundup(*len, 16),
1576 brcmf_sdbrcm_rxfail(bus, true, true);
1583 brcmf_sdbrcm_pktfree2(bus, pkt);
1587 /* Return true if there may be more frames to read */
1589 brcmf_sdbrcm_readframes(struct brcmf_sdio *bus, uint maxframes, bool *finished)
1591 u16 len, check; /* Extracted hardware header fields */
1592 u8 chan, seq, doff; /* Extracted software header fields */
1593 u8 fcbits; /* Extracted fcbits from software header */
1595 struct sk_buff *pkt; /* Packet for event or data frames */
1596 u16 pad; /* Number of pad bytes to read */
1597 u16 rdlen; /* Total number of bytes to read */
1598 u8 rxseq; /* Next sequence number to expect */
1599 uint rxleft = 0; /* Remaining number of frames allowed */
1600 int sdret; /* Return code from calls */
1601 u8 txmax; /* Maximum tx sequence offered */
1604 uint rxcount = 0; /* Total frames read */
1606 brcmf_dbg(TRACE, "Enter\n");
1608 /* Not finished unless we encounter no more frames indication */
1611 for (rxseq = bus->rx_seq, rxleft = maxframes;
1612 !bus->rxskip && rxleft &&
1613 bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1614 rxseq++, rxleft--) {
1616 /* Handle glomming separately */
1617 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1619 brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1620 bus->glomd, skb_peek(&bus->glom));
1621 cnt = brcmf_sdbrcm_rxglom(bus, rxseq);
1622 brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1624 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1628 /* Try doing single read if we can */
1630 u16 nextlen = bus->nextlen;
1633 rdlen = len = nextlen << 4;
1634 brcmf_pad(bus, &pad, &rdlen);
1637 * After the frame is received we have to
1638 * distinguish whether it is data
1639 * or non-data frame.
1641 brcmf_alloc_pkt_and_read(bus, rdlen, &pkt, &rxbuf);
1643 /* Give up on data, request rtx of events */
1644 brcmf_dbg(ERROR, "(nextlen): brcmf_alloc_pkt_and_read failed: len %d rdlen %d expected rxseq %d\n",
1649 if (brcmf_check_rxbuf(bus, pkt, rxbuf, rxseq, nextlen,
1653 /* Extract software header fields */
1654 chan = SDPCM_PACKET_CHANNEL(
1655 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1656 seq = SDPCM_PACKET_SEQUENCE(
1657 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1658 doff = SDPCM_DOFFSET_VALUE(
1659 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1660 txmax = SDPCM_WINDOW_VALUE(
1661 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1664 bus->rxhdr[SDPCM_FRAMETAG_LEN +
1665 SDPCM_NEXTLEN_OFFSET];
1666 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1667 brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1672 bus->sdcnt.rx_readahead_cnt++;
1674 /* Handle Flow Control */
1675 fcbits = SDPCM_FCMASK_VALUE(
1676 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1678 if (bus->flowcontrol != fcbits) {
1679 if (~bus->flowcontrol & fcbits)
1680 bus->sdcnt.fc_xoff++;
1682 if (bus->flowcontrol & ~fcbits)
1683 bus->sdcnt.fc_xon++;
1685 bus->sdcnt.fc_rcvd++;
1686 bus->flowcontrol = fcbits;
1689 /* Check and update sequence number */
1691 brcmf_dbg(INFO, "(nextlen): rx_seq %d, expected %d\n",
1693 bus->sdcnt.rx_badseq++;
1697 /* Check window for sanity */
1698 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1699 brcmf_dbg(ERROR, "got unlikely tx max %d with tx_seq %d\n",
1700 txmax, bus->tx_seq);
1701 txmax = bus->tx_seq + 2;
1703 bus->tx_max = txmax;
1705 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1706 rxbuf, len, "Rx Data:\n");
1707 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1710 bus->rxhdr, SDPCM_HDRLEN,
1713 if (chan == SDPCM_CONTROL_CHANNEL) {
1714 brcmf_dbg(ERROR, "(nextlen): readahead on control packet %d?\n",
1716 /* Force retry w/normal header read */
1718 brcmf_sdbrcm_rxfail(bus, false, true);
1719 brcmf_sdbrcm_pktfree2(bus, pkt);
1723 /* Validate data offset */
1724 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
1725 brcmf_dbg(ERROR, "(nextlen): bad data offset %d: HW len %d min %d\n",
1726 doff, len, SDPCM_HDRLEN);
1727 brcmf_sdbrcm_rxfail(bus, false, false);
1728 brcmf_sdbrcm_pktfree2(bus, pkt);
1732 /* All done with this one -- now deliver the packet */
1736 /* Read frame header (hardware and software) */
1737 sdret = brcmf_sdcard_recv_buf(bus->sdiodev, bus->sdiodev->sbwad,
1738 SDIO_FUNC_2, F2SYNC, bus->rxhdr,
1740 bus->sdcnt.f2rxhdrs++;
1743 brcmf_dbg(ERROR, "RXHEADER FAILED: %d\n", sdret);
1744 bus->sdcnt.rx_hdrfail++;
1745 brcmf_sdbrcm_rxfail(bus, true, true);
1748 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1749 bus->rxhdr, SDPCM_HDRLEN, "RxHdr:\n");
1752 /* Extract hardware header fields */
1753 len = get_unaligned_le16(bus->rxhdr);
1754 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
1756 /* All zeros means no more frames */
1757 if (!(len | check)) {
1762 /* Validate check bytes */
1763 if ((u16) ~(len ^ check)) {
1764 brcmf_dbg(ERROR, "HW hdr err: len/check 0x%04x/0x%04x\n",
1766 bus->sdcnt.rx_badhdr++;
1767 brcmf_sdbrcm_rxfail(bus, false, false);
1771 /* Validate frame length */
1772 if (len < SDPCM_HDRLEN) {
1773 brcmf_dbg(ERROR, "HW hdr length invalid: %d\n", len);
1777 /* Extract software header fields */
1778 chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1779 seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1780 doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1781 txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1783 /* Validate data offset */
1784 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
1785 brcmf_dbg(ERROR, "Bad data offset %d: HW len %d, min %d seq %d\n",
1786 doff, len, SDPCM_HDRLEN, seq);
1787 bus->sdcnt.rx_badhdr++;
1788 brcmf_sdbrcm_rxfail(bus, false, false);
1792 /* Save the readahead length if there is one */
1794 bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1795 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1796 brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1801 /* Handle Flow Control */
1802 fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1804 if (bus->flowcontrol != fcbits) {
1805 if (~bus->flowcontrol & fcbits)
1806 bus->sdcnt.fc_xoff++;
1808 if (bus->flowcontrol & ~fcbits)
1809 bus->sdcnt.fc_xon++;
1811 bus->sdcnt.fc_rcvd++;
1812 bus->flowcontrol = fcbits;
1815 /* Check and update sequence number */
1817 brcmf_dbg(INFO, "rx_seq %d, expected %d\n", seq, rxseq);
1818 bus->sdcnt.rx_badseq++;
1822 /* Check window for sanity */
1823 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1824 brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
1825 txmax, bus->tx_seq);
1826 txmax = bus->tx_seq + 2;
1828 bus->tx_max = txmax;
1830 /* Call a separate function for control frames */
1831 if (chan == SDPCM_CONTROL_CHANNEL) {
1832 brcmf_sdbrcm_read_control(bus, bus->rxhdr, len, doff);
1836 /* precondition: chan is either SDPCM_DATA_CHANNEL,
1837 SDPCM_EVENT_CHANNEL, SDPCM_TEST_CHANNEL or
1838 SDPCM_GLOM_CHANNEL */
1840 /* Length to read */
1841 rdlen = (len > BRCMF_FIRSTREAD) ? (len - BRCMF_FIRSTREAD) : 0;
1843 /* May pad read to blocksize for efficiency */
1844 if (bus->roundup && bus->blocksize &&
1845 (rdlen > bus->blocksize)) {
1846 pad = bus->blocksize - (rdlen % bus->blocksize);
1847 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1848 ((rdlen + pad + BRCMF_FIRSTREAD) < MAX_RX_DATASZ))
1850 } else if (rdlen % BRCMF_SDALIGN) {
1851 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1854 /* Satisfy length-alignment requirements */
1855 if (rdlen & (ALIGNMENT - 1))
1856 rdlen = roundup(rdlen, ALIGNMENT);
1858 if ((rdlen + BRCMF_FIRSTREAD) > MAX_RX_DATASZ) {
1859 /* Too long -- skip this frame */
1860 brcmf_dbg(ERROR, "too long: len %d rdlen %d\n",
1862 bus->sdiodev->bus_if->dstats.rx_errors++;
1863 bus->sdcnt.rx_toolong++;
1864 brcmf_sdbrcm_rxfail(bus, false, false);
1868 pkt = brcmu_pkt_buf_get_skb(rdlen +
1869 BRCMF_FIRSTREAD + BRCMF_SDALIGN);
1871 /* Give up on data, request rtx of events */
1872 brcmf_dbg(ERROR, "brcmu_pkt_buf_get_skb failed: rdlen %d chan %d\n",
1874 bus->sdiodev->bus_if->dstats.rx_dropped++;
1875 brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan));
1879 /* Leave room for what we already read, and align remainder */
1880 skb_pull(pkt, BRCMF_FIRSTREAD);
1881 pkt_align(pkt, rdlen, BRCMF_SDALIGN);
1883 /* Read the remaining frame data */
1884 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1885 SDIO_FUNC_2, F2SYNC, pkt);
1886 bus->sdcnt.f2rxdata++;
1889 brcmf_dbg(ERROR, "read %d %s bytes failed: %d\n", rdlen,
1890 ((chan == SDPCM_EVENT_CHANNEL) ? "event"
1891 : ((chan == SDPCM_DATA_CHANNEL) ? "data"
1893 brcmu_pkt_buf_free_skb(pkt);
1894 bus->sdiodev->bus_if->dstats.rx_errors++;
1895 brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan));
1899 /* Copy the already-read portion */
1900 skb_push(pkt, BRCMF_FIRSTREAD);
1901 memcpy(pkt->data, bus->rxhdr, BRCMF_FIRSTREAD);
1903 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1904 pkt->data, len, "Rx Data:\n");
1907 /* Save superframe descriptor and allocate packet frame */
1908 if (chan == SDPCM_GLOM_CHANNEL) {
1909 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
1910 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1912 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1915 __skb_trim(pkt, len);
1916 skb_pull(pkt, SDPCM_HDRLEN);
1919 brcmf_dbg(ERROR, "%s: glom superframe w/o "
1920 "descriptor!\n", __func__);
1921 brcmf_sdbrcm_rxfail(bus, false, false);
1926 /* Fill in packet len and prio, deliver upward */
1927 __skb_trim(pkt, len);
1928 skb_pull(pkt, doff);
1930 if (pkt->len == 0) {
1931 brcmu_pkt_buf_free_skb(pkt);
1933 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev, &ifidx,
1935 brcmf_dbg(ERROR, "rx protocol error\n");
1936 brcmu_pkt_buf_free_skb(pkt);
1937 bus->sdiodev->bus_if->dstats.rx_errors++;
1941 /* Unlock during rx call */
1943 brcmf_rx_packet(bus->sdiodev->dev, ifidx, pkt);
1946 rxcount = maxframes - rxleft;
1947 /* Message if we hit the limit */
1949 brcmf_dbg(DATA, "hit rx limit of %d frames\n",
1952 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
1953 /* Back off rxseq if awaiting rtx, update rx_seq */
1956 bus->rx_seq = rxseq;
1962 brcmf_sdbrcm_wait_for_event(struct brcmf_sdio *bus, bool *lockvar)
1965 wait_event_interruptible_timeout(bus->ctrl_wait, !*lockvar, HZ * 2);
1971 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
1973 if (waitqueue_active(&bus->ctrl_wait))
1974 wake_up_interruptible(&bus->ctrl_wait);
1978 /* Writes a HW/SW header into the packet and sends it. */
1979 /* Assumes: (a) header space already there, (b) caller holds lock */
1980 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt,
1981 uint chan, bool free_pkt)
1987 struct sk_buff *new;
1990 brcmf_dbg(TRACE, "Enter\n");
1992 frame = (u8 *) (pkt->data);
1994 /* Add alignment padding, allocate new packet if needed */
1995 pad = ((unsigned long)frame % BRCMF_SDALIGN);
1997 if (skb_headroom(pkt) < pad) {
1998 brcmf_dbg(INFO, "insufficient headroom %d for %d pad\n",
1999 skb_headroom(pkt), pad);
2000 bus->sdiodev->bus_if->tx_realloc++;
2001 new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN);
2003 brcmf_dbg(ERROR, "couldn't allocate new %d-byte packet\n",
2004 pkt->len + BRCMF_SDALIGN);
2009 pkt_align(new, pkt->len, BRCMF_SDALIGN);
2010 memcpy(new->data, pkt->data, pkt->len);
2012 brcmu_pkt_buf_free_skb(pkt);
2013 /* free the pkt if canned one is not used */
2016 frame = (u8 *) (pkt->data);
2017 /* precondition: (frame % BRCMF_SDALIGN) == 0) */
2021 frame = (u8 *) (pkt->data);
2022 /* precondition: pad + SDPCM_HDRLEN <= pkt->len */
2023 memset(frame, 0, pad + SDPCM_HDRLEN);
2026 /* precondition: pad < BRCMF_SDALIGN */
2028 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2029 len = (u16) (pkt->len);
2030 *(__le16 *) frame = cpu_to_le16(len);
2031 *(((__le16 *) frame) + 1) = cpu_to_le16(~len);
2033 /* Software tag: channel, sequence number, data offset */
2035 ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
2037 SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
2039 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2040 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2043 tx_packets[pkt->priority]++;
2046 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() &&
2047 ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2048 (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)),
2049 frame, len, "Tx Frame:\n");
2050 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
2052 chan == SDPCM_CONTROL_CHANNEL) ||
2054 chan != SDPCM_CONTROL_CHANNEL))) &&
2056 frame, min_t(u16, len, 16), "TxHdr:\n");
2058 /* Raise len to next SDIO block to eliminate tail command */
2059 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2060 u16 pad = bus->blocksize - (len % bus->blocksize);
2061 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2063 } else if (len % BRCMF_SDALIGN) {
2064 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2067 /* Some controllers have trouble with odd bytes -- round to even */
2068 if (len & (ALIGNMENT - 1))
2069 len = roundup(len, ALIGNMENT);
2071 ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
2072 SDIO_FUNC_2, F2SYNC, pkt);
2073 bus->sdcnt.f2txdata++;
2076 /* On failure, abort the command and terminate the frame */
2077 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2079 bus->sdcnt.tx_sderrs++;
2081 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2082 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2084 bus->sdcnt.f1regdata++;
2086 for (i = 0; i < 3; i++) {
2088 hi = brcmf_sdio_regrb(bus->sdiodev,
2089 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2090 lo = brcmf_sdio_regrb(bus->sdiodev,
2091 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2092 bus->sdcnt.f1regdata += 2;
2093 if ((hi == 0) && (lo == 0))
2099 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2102 /* restore pkt buffer pointer before calling tx complete routine */
2103 skb_pull(pkt, SDPCM_HDRLEN + pad);
2105 brcmf_txcomplete(bus->sdiodev->dev, pkt, ret != 0);
2109 brcmu_pkt_buf_free_skb(pkt);
2114 static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2116 struct sk_buff *pkt;
2118 int ret = 0, prec_out;
2123 brcmf_dbg(TRACE, "Enter\n");
2125 tx_prec_map = ~bus->flowcontrol;
2127 /* Send frames until the limit or some other event */
2128 for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) {
2129 spin_lock_bh(&bus->txqlock);
2130 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
2132 spin_unlock_bh(&bus->txqlock);
2135 spin_unlock_bh(&bus->txqlock);
2136 datalen = pkt->len - SDPCM_HDRLEN;
2138 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
2140 bus->sdiodev->bus_if->dstats.tx_errors++;
2142 bus->sdiodev->bus_if->dstats.tx_bytes += datalen;
2144 /* In poll mode, need to check for other events */
2145 if (!bus->intr && cnt) {
2146 /* Check device status, signal pending interrupt */
2147 ret = r_sdreg32(bus, &intstatus,
2148 offsetof(struct sdpcmd_regs,
2150 bus->sdcnt.f2txdata++;
2153 if (intstatus & bus->hostintmask)
2158 /* Deflow-control stack if needed */
2159 if (bus->sdiodev->bus_if->drvr_up &&
2160 (bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2161 bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2163 brcmf_txflowblock(bus->sdiodev->dev, false);
2169 static void brcmf_sdbrcm_bus_stop(struct device *dev)
2171 u32 local_hostintmask;
2174 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2175 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2176 struct brcmf_sdio *bus = sdiodev->bus;
2178 brcmf_dbg(TRACE, "Enter\n");
2180 if (bus->watchdog_tsk) {
2181 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2182 kthread_stop(bus->watchdog_tsk);
2183 bus->watchdog_tsk = NULL;
2186 if (bus->dpc_tsk && bus->dpc_tsk != current) {
2187 send_sig(SIGTERM, bus->dpc_tsk, 1);
2188 kthread_stop(bus->dpc_tsk);
2189 bus->dpc_tsk = NULL;
2194 /* Enable clock for device interrupts */
2195 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2197 /* Disable and clear interrupts at the chip level also */
2198 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2199 local_hostintmask = bus->hostintmask;
2200 bus->hostintmask = 0;
2202 /* Change our idea of bus state */
2203 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2205 /* Force clocks on backplane to be sure F2 interrupt propagates */
2206 saveclk = brcmf_sdio_regrb(bus->sdiodev,
2207 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2209 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2210 (saveclk | SBSDIO_FORCE_HT), &err);
2213 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
2215 /* Turn off the bus (F2), free any pending packets */
2216 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2217 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1,
2220 /* Clear any pending interrupts now that F2 is disabled */
2221 w_sdreg32(bus, local_hostintmask,
2222 offsetof(struct sdpcmd_regs, intstatus));
2224 /* Turn off the backplane clock (only) */
2225 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
2227 /* Clear the data packet queues */
2228 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2230 /* Clear any held glomming stuff */
2232 brcmu_pkt_buf_free_skb(bus->glomd);
2233 brcmf_sdbrcm_free_glom(bus);
2235 /* Clear rx control and wake any waiters */
2237 brcmf_sdbrcm_dcmd_resp_wake(bus);
2239 /* Reset some F2 state stuff */
2240 bus->rxskip = false;
2241 bus->tx_seq = bus->rx_seq = 0;
2246 #ifdef CONFIG_BRCMFMAC_SDIO_OOB
2247 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2249 unsigned long flags;
2251 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2252 if (!bus->sdiodev->irq_en && !bus->ipend) {
2253 enable_irq(bus->sdiodev->irq);
2254 bus->sdiodev->irq_en = true;
2256 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2259 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2262 #endif /* CONFIG_BRCMFMAC_SDIO_OOB */
2264 static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
2266 u32 intstatus, newstatus = 0;
2267 uint rxlimit = bus->rxbound; /* Rx frames to read before resched */
2268 uint txlimit = bus->txbound; /* Tx frames to send before resched */
2269 uint framecnt = 0; /* Temporary counter of tx/rx frames */
2270 bool rxdone = true; /* Flag for no more read data */
2271 bool resched = false; /* Flag indicating resched wanted */
2274 brcmf_dbg(TRACE, "Enter\n");
2276 /* Start with leftover status bits */
2277 intstatus = bus->intstatus;
2281 /* If waiting for HTAVAIL, check status */
2282 if (bus->clkstate == CLK_PENDING) {
2283 u8 clkctl, devctl = 0;
2286 /* Check for inconsistent device control */
2287 devctl = brcmf_sdio_regrb(bus->sdiodev,
2288 SBSDIO_DEVICE_CTL, &err);
2290 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n", err);
2291 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2295 /* Read CSR, if clock on switch to AVAIL, else ignore */
2296 clkctl = brcmf_sdio_regrb(bus->sdiodev,
2297 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2299 brcmf_dbg(ERROR, "error reading CSR: %d\n",
2301 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2304 brcmf_dbg(INFO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2307 if (SBSDIO_HTAV(clkctl)) {
2308 devctl = brcmf_sdio_regrb(bus->sdiodev,
2309 SBSDIO_DEVICE_CTL, &err);
2311 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n",
2313 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2315 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2316 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2319 brcmf_dbg(ERROR, "error writing DEVCTL: %d\n",
2321 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2323 bus->clkstate = CLK_AVAIL;
2329 /* Make sure backplane clock is on */
2330 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
2331 if (bus->clkstate == CLK_PENDING)
2334 /* Pending interrupt indicates new device status */
2337 err = r_sdreg32(bus, &newstatus,
2338 offsetof(struct sdpcmd_regs, intstatus));
2339 bus->sdcnt.f1regdata++;
2342 newstatus &= bus->hostintmask;
2343 bus->fcstate = !!(newstatus & I_HMB_FC_STATE);
2345 err = w_sdreg32(bus, newstatus,
2346 offsetof(struct sdpcmd_regs,
2348 bus->sdcnt.f1regdata++;
2352 /* Merge new bits with previous */
2353 intstatus |= newstatus;
2356 /* Handle flow-control change: read new state in case our ack
2357 * crossed another change interrupt. If change still set, assume
2358 * FC ON for safety, let next loop through do the debounce.
2360 if (intstatus & I_HMB_FC_CHANGE) {
2361 intstatus &= ~I_HMB_FC_CHANGE;
2362 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2363 offsetof(struct sdpcmd_regs, intstatus));
2365 err = r_sdreg32(bus, &newstatus,
2366 offsetof(struct sdpcmd_regs, intstatus));
2367 bus->sdcnt.f1regdata += 2;
2369 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE));
2370 intstatus |= (newstatus & bus->hostintmask);
2373 /* Handle host mailbox indication */
2374 if (intstatus & I_HMB_HOST_INT) {
2375 intstatus &= ~I_HMB_HOST_INT;
2376 intstatus |= brcmf_sdbrcm_hostmail(bus);
2379 /* Generally don't ask for these, can get CRC errors... */
2380 if (intstatus & I_WR_OOSYNC) {
2381 brcmf_dbg(ERROR, "Dongle reports WR_OOSYNC\n");
2382 intstatus &= ~I_WR_OOSYNC;
2385 if (intstatus & I_RD_OOSYNC) {
2386 brcmf_dbg(ERROR, "Dongle reports RD_OOSYNC\n");
2387 intstatus &= ~I_RD_OOSYNC;
2390 if (intstatus & I_SBINT) {
2391 brcmf_dbg(ERROR, "Dongle reports SBINT\n");
2392 intstatus &= ~I_SBINT;
2395 /* Would be active due to wake-wlan in gSPI */
2396 if (intstatus & I_CHIPACTIVE) {
2397 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2398 intstatus &= ~I_CHIPACTIVE;
2401 /* Ignore frame indications if rxskip is set */
2403 intstatus &= ~I_HMB_FRAME_IND;
2405 /* On frame indication, read available frames */
2406 if (PKT_AVAILABLE()) {
2407 framecnt = brcmf_sdbrcm_readframes(bus, rxlimit, &rxdone);
2408 if (rxdone || bus->rxskip)
2409 intstatus &= ~I_HMB_FRAME_IND;
2410 rxlimit -= min(framecnt, rxlimit);
2413 /* Keep still-pending events for next scheduling */
2414 bus->intstatus = intstatus;
2417 brcmf_sdbrcm_clrintr(bus);
2419 if (data_ok(bus) && bus->ctrl_frame_stat &&
2420 (bus->clkstate == CLK_AVAIL)) {
2423 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2424 SDIO_FUNC_2, F2SYNC, bus->ctrl_frame_buf,
2425 (u32) bus->ctrl_frame_len);
2428 /* On failure, abort the command and
2429 terminate the frame */
2430 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2432 bus->sdcnt.tx_sderrs++;
2434 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2436 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2438 bus->sdcnt.f1regdata++;
2440 for (i = 0; i < 3; i++) {
2442 hi = brcmf_sdio_regrb(bus->sdiodev,
2443 SBSDIO_FUNC1_WFRAMEBCHI,
2445 lo = brcmf_sdio_regrb(bus->sdiodev,
2446 SBSDIO_FUNC1_WFRAMEBCLO,
2448 bus->sdcnt.f1regdata += 2;
2449 if ((hi == 0) && (lo == 0))
2455 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2457 brcmf_dbg(INFO, "Return_dpc value is : %d\n", ret);
2458 bus->ctrl_frame_stat = false;
2459 brcmf_sdbrcm_wait_event_wakeup(bus);
2461 /* Send queued frames (limit 1 if rx may still be pending) */
2462 else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate &&
2463 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2465 framecnt = rxdone ? txlimit : min(txlimit, bus->txminmax);
2466 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2467 txlimit -= framecnt;
2470 /* Resched if events or tx frames are pending,
2471 else await next interrupt */
2472 /* On failed register access, all bets are off:
2473 no resched or interrupts */
2474 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || (err != 0)) {
2475 brcmf_dbg(ERROR, "failed backplane access over SDIO, halting operation\n");
2476 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2478 } else if (bus->clkstate == CLK_PENDING) {
2479 brcmf_dbg(INFO, "rescheduled due to CLK_PENDING awaiting I_CHIPACTIVE interrupt\n");
2481 } else if (bus->intstatus || bus->ipend ||
2482 (!bus->fcstate && brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol)
2483 && data_ok(bus)) || PKT_AVAILABLE()) {
2487 bus->dpc_sched = resched;
2489 /* If we're done for now, turn off clock request. */
2490 if ((bus->clkstate != CLK_PENDING)
2491 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2492 bus->activity = false;
2493 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
2501 static inline void brcmf_sdbrcm_adddpctsk(struct brcmf_sdio *bus)
2503 struct list_head *new_hd;
2504 unsigned long flags;
2507 new_hd = kzalloc(sizeof(struct list_head), GFP_ATOMIC);
2509 new_hd = kzalloc(sizeof(struct list_head), GFP_KERNEL);
2513 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2514 list_add_tail(new_hd, &bus->dpc_tsklst);
2515 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2518 static int brcmf_sdbrcm_dpc_thread(void *data)
2520 struct brcmf_sdio *bus = (struct brcmf_sdio *) data;
2521 struct list_head *cur_hd, *tmp_hd;
2522 unsigned long flags;
2524 allow_signal(SIGTERM);
2525 /* Run until signal received */
2527 if (kthread_should_stop())
2530 if (list_empty(&bus->dpc_tsklst))
2531 if (wait_for_completion_interruptible(&bus->dpc_wait))
2534 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2535 list_for_each_safe(cur_hd, tmp_hd, &bus->dpc_tsklst) {
2536 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2538 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
2539 /* after stopping the bus, exit thread */
2540 brcmf_sdbrcm_bus_stop(bus->sdiodev->dev);
2541 bus->dpc_tsk = NULL;
2542 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2546 if (brcmf_sdbrcm_dpc(bus))
2547 brcmf_sdbrcm_adddpctsk(bus);
2549 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2553 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2558 static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
2562 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2563 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2564 struct brcmf_sdio *bus = sdiodev->bus;
2566 brcmf_dbg(TRACE, "Enter\n");
2570 /* Add space for the header */
2571 skb_push(pkt, SDPCM_HDRLEN);
2572 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2574 prec = prio2prec((pkt->priority & PRIOMASK));
2576 /* Check for existing queue, current flow-control,
2577 pending event, or pending clock */
2578 brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2579 bus->sdcnt.fcqueued++;
2581 /* Priority based enq */
2582 spin_lock_bh(&bus->txqlock);
2583 if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2584 skb_pull(pkt, SDPCM_HDRLEN);
2585 brcmf_txcomplete(bus->sdiodev->dev, pkt, false);
2586 brcmu_pkt_buf_free_skb(pkt);
2587 brcmf_dbg(ERROR, "out of bus->txq !!!\n");
2592 spin_unlock_bh(&bus->txqlock);
2594 if (pktq_len(&bus->txq) >= TXHI) {
2596 brcmf_txflowblock(bus->sdiodev->dev, true);
2600 if (pktq_plen(&bus->txq, prec) > qcount[prec])
2601 qcount[prec] = pktq_plen(&bus->txq, prec);
2603 /* Schedule DPC if needed to send queued packet(s) */
2604 if (!bus->dpc_sched) {
2605 bus->dpc_sched = true;
2607 brcmf_sdbrcm_adddpctsk(bus);
2608 complete(&bus->dpc_wait);
2616 brcmf_sdbrcm_membytes(struct brcmf_sdio *bus, bool write, u32 address, u8 *data,
2623 /* Determine initial transfer parameters */
2624 sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
2625 if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
2626 dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
2630 /* Set the backplane window to include the start address */
2631 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev, address);
2633 brcmf_dbg(ERROR, "window change failed\n");
2637 /* Do the transfer(s) */
2639 brcmf_dbg(INFO, "%s %d bytes at offset 0x%08x in window 0x%08x\n",
2640 write ? "write" : "read", dsize,
2641 sdaddr, address & SBSDIO_SBWINDOW_MASK);
2642 bcmerror = brcmf_sdcard_rwdata(bus->sdiodev, write,
2643 sdaddr, data, dsize);
2645 brcmf_dbg(ERROR, "membytes transfer failed\n");
2649 /* Adjust for next transfer (if any) */
2654 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev,
2657 brcmf_dbg(ERROR, "window change failed\n");
2661 dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
2666 /* Return the window to backplane enumeration space for core access */
2667 if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, bus->sdiodev->sbwad))
2668 brcmf_dbg(ERROR, "FAILED to set window back to 0x%x\n",
2669 bus->sdiodev->sbwad);
2675 #define CONSOLE_LINE_MAX 192
2677 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
2679 struct brcmf_console *c = &bus->console;
2680 u8 line[CONSOLE_LINE_MAX], ch;
2684 /* Don't do anything until FWREADY updates console address */
2685 if (bus->console_addr == 0)
2688 /* Read console log struct */
2689 addr = bus->console_addr + offsetof(struct rte_console, log_le);
2690 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log_le,
2695 /* Allocate console buffer (one time only) */
2696 if (c->buf == NULL) {
2697 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2698 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2703 idx = le32_to_cpu(c->log_le.idx);
2705 /* Protect against corrupt value */
2706 if (idx > c->bufsize)
2709 /* Skip reading the console buffer if the index pointer
2714 /* Read the console buffer */
2715 addr = le32_to_cpu(c->log_le.buf);
2716 rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
2720 while (c->last != idx) {
2721 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2722 if (c->last == idx) {
2723 /* This would output a partial line.
2725 * the buffer pointer and output this
2726 * line next time around.
2731 c->last = c->bufsize - n;
2734 ch = c->buf[c->last];
2735 c->last = (c->last + 1) % c->bufsize;
2742 if (line[n - 1] == '\r')
2745 pr_debug("CONSOLE: %s\n", line);
2754 static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2759 bus->ctrl_frame_stat = false;
2760 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2761 SDIO_FUNC_2, F2SYNC, frame, len);
2764 /* On failure, abort the command and terminate the frame */
2765 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2767 bus->sdcnt.tx_sderrs++;
2769 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2771 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2773 bus->sdcnt.f1regdata++;
2775 for (i = 0; i < 3; i++) {
2777 hi = brcmf_sdio_regrb(bus->sdiodev,
2778 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2779 lo = brcmf_sdio_regrb(bus->sdiodev,
2780 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2781 bus->sdcnt.f1regdata += 2;
2782 if (hi == 0 && lo == 0)
2788 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2794 brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2802 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2803 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2804 struct brcmf_sdio *bus = sdiodev->bus;
2806 brcmf_dbg(TRACE, "Enter\n");
2808 /* Back the pointer to make a room for bus header */
2809 frame = msg - SDPCM_HDRLEN;
2810 len = (msglen += SDPCM_HDRLEN);
2812 /* Add alignment padding (optional for ctl frames) */
2813 doff = ((unsigned long)frame % BRCMF_SDALIGN);
2818 memset(frame, 0, doff + SDPCM_HDRLEN);
2820 /* precondition: doff < BRCMF_SDALIGN */
2821 doff += SDPCM_HDRLEN;
2823 /* Round send length to next SDIO block */
2824 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2825 u16 pad = bus->blocksize - (len % bus->blocksize);
2826 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2828 } else if (len % BRCMF_SDALIGN) {
2829 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2832 /* Satisfy length-alignment requirements */
2833 if (len & (ALIGNMENT - 1))
2834 len = roundup(len, ALIGNMENT);
2836 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2838 /* Need to lock here to protect txseq and SDIO tx calls */
2841 /* Make sure backplane clock is on */
2842 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2844 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2845 *(__le16 *) frame = cpu_to_le16((u16) msglen);
2846 *(((__le16 *) frame) + 1) = cpu_to_le16(~msglen);
2848 /* Software tag: channel, sequence number, data offset */
2850 ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
2852 | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
2853 SDPCM_DOFFSET_MASK);
2854 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2855 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2857 if (!data_ok(bus)) {
2858 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2859 bus->tx_max, bus->tx_seq);
2860 bus->ctrl_frame_stat = true;
2862 bus->ctrl_frame_buf = frame;
2863 bus->ctrl_frame_len = len;
2865 brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat);
2867 if (!bus->ctrl_frame_stat) {
2868 brcmf_dbg(INFO, "ctrl_frame_stat == false\n");
2871 brcmf_dbg(INFO, "ctrl_frame_stat == true\n");
2877 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2878 frame, len, "Tx Frame:\n");
2879 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2881 frame, min_t(u16, len, 16), "TxHdr:\n");
2884 ret = brcmf_tx_frame(bus, frame, len);
2885 } while (ret < 0 && retries++ < TXRETRIES);
2888 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) {
2889 bus->activity = false;
2890 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2896 bus->sdcnt.tx_ctlerrs++;
2898 bus->sdcnt.tx_ctlpkts++;
2900 return ret ? -EIO : 0;
2904 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
2906 return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
2909 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
2910 struct sdpcm_shared *sh)
2915 struct sdpcm_shared_le sh_le;
2918 shaddr = bus->ramsize - 4;
2921 * Read last word in socram to determine
2922 * address of sdpcm_shared structure
2924 rv = brcmf_sdbrcm_membytes(bus, false, shaddr,
2929 addr = le32_to_cpu(addr_le);
2931 brcmf_dbg(INFO, "sdpcm_shared address 0x%08X\n", addr);
2934 * Check if addr is valid.
2935 * NVRAM length at the end of memory should have been overwritten.
2937 if (!brcmf_sdio_valid_shared_address(addr)) {
2938 brcmf_dbg(ERROR, "invalid sdpcm_shared address 0x%08X\n",
2943 /* Read hndrte_shared structure */
2944 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&sh_le,
2945 sizeof(struct sdpcm_shared_le));
2950 sh->flags = le32_to_cpu(sh_le.flags);
2951 sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
2952 sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
2953 sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
2954 sh->assert_line = le32_to_cpu(sh_le.assert_line);
2955 sh->console_addr = le32_to_cpu(sh_le.console_addr);
2956 sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
2958 if ((sh->flags & SDPCM_SHARED_VERSION_MASK) != SDPCM_SHARED_VERSION) {
2960 "sdpcm_shared version mismatch: dhd %d dongle %d\n",
2961 SDPCM_SHARED_VERSION,
2962 sh->flags & SDPCM_SHARED_VERSION_MASK);
2969 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2970 struct sdpcm_shared *sh, char __user *data,
2973 u32 addr, console_ptr, console_size, console_index;
2974 char *conbuf = NULL;
2980 /* obtain console information from device memory */
2981 addr = sh->console_addr + offsetof(struct rte_console, log_le);
2982 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2983 (u8 *)&sh_val, sizeof(u32));
2986 console_ptr = le32_to_cpu(sh_val);
2988 addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2989 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2990 (u8 *)&sh_val, sizeof(u32));
2993 console_size = le32_to_cpu(sh_val);
2995 addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2996 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2997 (u8 *)&sh_val, sizeof(u32));
3000 console_index = le32_to_cpu(sh_val);
3002 /* allocate buffer for console data */
3003 if (console_size <= CONSOLE_BUFFER_MAX)
3004 conbuf = vzalloc(console_size+1);
3009 /* obtain the console data from device */
3010 conbuf[console_size] = '\0';
3011 rv = brcmf_sdbrcm_membytes(bus, false, console_ptr, (u8 *)conbuf,
3016 rv = simple_read_from_buffer(data, count, &pos,
3017 conbuf + console_index,
3018 console_size - console_index);
3023 if (console_index > 0) {
3025 rv = simple_read_from_buffer(data+nbytes, count, &pos,
3026 conbuf, console_index - 1);
3036 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
3037 char __user *data, size_t count)
3041 struct brcmf_trap_info tr;
3045 if ((sh->flags & SDPCM_SHARED_TRAP) == 0)
3048 error = brcmf_sdbrcm_membytes(bus, false, sh->trap_addr, (u8 *)&tr,
3049 sizeof(struct brcmf_trap_info));
3053 nbytes = brcmf_sdio_dump_console(bus, sh, data, count);
3057 res = scnprintf(buf, sizeof(buf),
3058 "dongle trap info: type 0x%x @ epc 0x%08x\n"
3059 " cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
3060 " lr 0x%08x pc 0x%08x offset 0x%x\n"
3061 " r0 0x%08x r1 0x%08x r2 0x%08x r3 0x%08x\n"
3062 " r4 0x%08x r5 0x%08x r6 0x%08x r7 0x%08x\n",
3063 le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
3064 le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
3065 le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3066 le32_to_cpu(tr.pc), sh->trap_addr,
3067 le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3068 le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3069 le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3070 le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3072 error = simple_read_from_buffer(data+nbytes, count, &pos, buf, res);
3080 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
3081 struct sdpcm_shared *sh, char __user *data,
3086 char file[80] = "?";
3087 char expr[80] = "<???>";
3091 if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3092 brcmf_dbg(INFO, "firmware not built with -assert\n");
3094 } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3095 brcmf_dbg(INFO, "no assert in dongle\n");
3099 if (sh->assert_file_addr != 0) {
3100 error = brcmf_sdbrcm_membytes(bus, false, sh->assert_file_addr,
3105 if (sh->assert_exp_addr != 0) {
3106 error = brcmf_sdbrcm_membytes(bus, false, sh->assert_exp_addr,
3112 res = scnprintf(buf, sizeof(buf),
3113 "dongle assert: %s:%d: assert(%s)\n",
3114 file, sh->assert_line, expr);
3115 return simple_read_from_buffer(data, count, &pos, buf, res);
3118 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
3121 struct sdpcm_shared sh;
3124 error = brcmf_sdio_readshared(bus, &sh);
3130 if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3131 brcmf_dbg(INFO, "firmware not built with -assert\n");
3132 else if (sh.flags & SDPCM_SHARED_ASSERT)
3133 brcmf_dbg(ERROR, "assertion in dongle\n");
3135 if (sh.flags & SDPCM_SHARED_TRAP)
3136 brcmf_dbg(ERROR, "firmware trap in dongle\n");
3141 static int brcmf_sdbrcm_died_dump(struct brcmf_sdio *bus, char __user *data,
3142 size_t count, loff_t *ppos)
3145 struct sdpcm_shared sh;
3153 error = brcmf_sdio_readshared(bus, &sh);
3157 error = brcmf_sdio_assert_info(bus, &sh, data, count);
3162 error = brcmf_sdio_trap_info(bus, &sh, data, count);
3173 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
3174 size_t count, loff_t *ppos)
3176 struct brcmf_sdio *bus = f->private_data;
3179 res = brcmf_sdbrcm_died_dump(bus, data, count, ppos);
3182 return (ssize_t)res;
3185 static const struct file_operations brcmf_sdio_forensic_ops = {
3186 .owner = THIS_MODULE,
3187 .open = simple_open,
3188 .read = brcmf_sdio_forensic_read
3191 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3193 struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3194 struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3196 if (IS_ERR_OR_NULL(dentry))
3199 debugfs_create_file("forensics", S_IRUGO, dentry, bus,
3200 &brcmf_sdio_forensic_ops);
3201 brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
3204 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
3209 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3215 brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3220 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3221 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3222 struct brcmf_sdio *bus = sdiodev->bus;
3224 brcmf_dbg(TRACE, "Enter\n");
3226 /* Wait until control frame is available */
3227 timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3231 memcpy(msg, bus->rxctl, min(msglen, rxlen));
3236 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3238 } else if (timeleft == 0) {
3239 brcmf_dbg(ERROR, "resumed on timeout\n");
3240 brcmf_sdbrcm_checkdied(bus);
3241 } else if (pending) {
3242 brcmf_dbg(CTL, "cancelled\n");
3243 return -ERESTARTSYS;
3245 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3246 brcmf_sdbrcm_checkdied(bus);
3250 bus->sdcnt.rx_ctlpkts++;
3252 bus->sdcnt.rx_ctlerrs++;
3254 return rxlen ? (int)rxlen : -ETIMEDOUT;
3257 static int brcmf_sdbrcm_write_vars(struct brcmf_sdio *bus)
3264 char *nvram_ularray;
3267 /* Even if there are no vars are to be written, we still
3268 need to set the ramsize. */
3269 varaddr = (bus->ramsize - 4) - bus->varsz;
3272 /* Write the vars list */
3273 bcmerror = brcmf_sdbrcm_membytes(bus, true, varaddr,
3274 bus->vars, bus->varsz);
3276 /* Verify NVRAM bytes */
3277 brcmf_dbg(INFO, "Compare NVRAM dl & ul; varsize=%d\n",
3279 nvram_ularray = kmalloc(bus->varsz, GFP_ATOMIC);
3283 /* Upload image to verify downloaded contents. */
3284 memset(nvram_ularray, 0xaa, bus->varsz);
3286 /* Read the vars list to temp buffer for comparison */
3287 bcmerror = brcmf_sdbrcm_membytes(bus, false, varaddr,
3288 nvram_ularray, bus->varsz);
3290 brcmf_dbg(ERROR, "error %d on reading %d nvram bytes at 0x%08x\n",
3291 bcmerror, bus->varsz, varaddr);
3293 /* Compare the org NVRAM with the one read from RAM */
3294 if (memcmp(bus->vars, nvram_ularray, bus->varsz))
3295 brcmf_dbg(ERROR, "Downloaded NVRAM image is corrupted\n");
3297 brcmf_dbg(ERROR, "Download/Upload/Compare of NVRAM ok\n");
3299 kfree(nvram_ularray);
3303 /* adjust to the user specified RAM */
3304 brcmf_dbg(INFO, "Physical memory size: %d\n", bus->ramsize);
3305 brcmf_dbg(INFO, "Vars are at %d, orig varsize is %d\n",
3306 varaddr, bus->varsz);
3309 * Determine the length token:
3310 * Varsize, converted to words, in lower 16-bits, checksum
3315 varsizew_le = cpu_to_le32(0);
3317 varsizew = bus->varsz / 4;
3318 varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
3319 varsizew_le = cpu_to_le32(varsizew);
3322 brcmf_dbg(INFO, "New varsize is %d, length token=0x%08x\n",
3323 bus->varsz, varsizew);
3325 /* Write the length token to the last word */
3326 bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->ramsize - 4),
3327 (u8 *)&varsizew_le, 4);
3332 static int brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
3335 struct chip_info *ci = bus->ci;
3337 /* To enter download state, disable ARM and reset SOCRAM.
3338 * To exit download state, simply reset ARM (default is RAM boot).
3341 bus->alp_only = true;
3343 ci->coredisable(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3345 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM);
3347 /* Clear the top bit of memory */
3350 brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
3354 if (!ci->iscoreup(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM)) {
3355 brcmf_dbg(ERROR, "SOCRAM core is down after reset?\n");
3360 bcmerror = brcmf_sdbrcm_write_vars(bus);
3362 brcmf_dbg(ERROR, "no vars written to RAM\n");
3366 w_sdreg32(bus, 0xFFFFFFFF,
3367 offsetof(struct sdpcmd_regs, intstatus));
3369 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3371 /* Allow HT Clock now that the ARM is running. */
3372 bus->alp_only = false;
3374 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3380 static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_sdio *bus)
3382 if (bus->firmware->size < bus->fw_ptr + len)
3383 len = bus->firmware->size - bus->fw_ptr;
3385 memcpy(buf, &bus->firmware->data[bus->fw_ptr], len);
3390 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
3394 u8 *memblock = NULL, *memptr;
3397 brcmf_dbg(INFO, "Enter\n");
3399 ret = request_firmware(&bus->firmware, BRCMF_SDIO_FW_NAME,
3400 &bus->sdiodev->func[2]->dev);
3402 brcmf_dbg(ERROR, "Fail to request firmware %d\n", ret);
3407 memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
3408 if (memblock == NULL) {
3412 if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
3413 memptr += (BRCMF_SDALIGN -
3414 ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
3416 /* Download image */
3418 brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) {
3419 ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len);
3421 brcmf_dbg(ERROR, "error %d on writing %d membytes at 0x%08x\n",
3422 ret, MEMBLOCK, offset);
3432 release_firmware(bus->firmware);
3439 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3440 * and ending in a NUL.
3441 * Removes carriage returns, empty lines, comment lines, and converts
3443 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3447 static int brcmf_process_nvram_vars(struct brcmf_sdio *bus)
3454 uint buf_len, n, len;
3456 len = bus->firmware->size;
3457 varbuf = vmalloc(len);
3461 memcpy(varbuf, bus->firmware->data, len);
3464 findNewline = false;
3467 for (n = 0; n < len; n++) {
3470 if (varbuf[n] == '\r')
3472 if (findNewline && varbuf[n] != '\n')
3474 findNewline = false;
3475 if (varbuf[n] == '#') {
3479 if (varbuf[n] == '\n') {
3489 buf_len = dp - varbuf;
3490 while (dp < varbuf + n)
3494 /* roundup needed for download to device */
3495 bus->varsz = roundup(buf_len + 1, 4);
3496 bus->vars = kmalloc(bus->varsz, GFP_KERNEL);
3497 if (bus->vars == NULL) {
3503 /* copy the processed variables and add null termination */
3504 memcpy(bus->vars, varbuf, buf_len);
3505 bus->vars[buf_len] = 0;
3511 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
3515 if (bus->sdiodev->bus_if->drvr_up)
3518 ret = request_firmware(&bus->firmware, BRCMF_SDIO_NV_NAME,
3519 &bus->sdiodev->func[2]->dev);
3521 brcmf_dbg(ERROR, "Fail to request nvram %d\n", ret);
3525 ret = brcmf_process_nvram_vars(bus);
3527 release_firmware(bus->firmware);
3532 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3536 /* Keep arm in reset */
3537 if (brcmf_sdbrcm_download_state(bus, true)) {
3538 brcmf_dbg(ERROR, "error placing ARM core in reset\n");
3542 /* External image takes precedence if specified */
3543 if (brcmf_sdbrcm_download_code_file(bus)) {
3544 brcmf_dbg(ERROR, "dongle image file download failed\n");
3548 /* External nvram takes precedence if specified */
3549 if (brcmf_sdbrcm_download_nvram(bus))
3550 brcmf_dbg(ERROR, "dongle nvram file download failed\n");
3552 /* Take arm out of reset */
3553 if (brcmf_sdbrcm_download_state(bus, false)) {
3554 brcmf_dbg(ERROR, "error getting out of ARM core reset\n");
3565 brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3569 /* Download the firmware */
3570 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3572 ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3574 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3579 static int brcmf_sdbrcm_bus_init(struct device *dev)
3581 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3582 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3583 struct brcmf_sdio *bus = sdiodev->bus;
3584 unsigned long timeout;
3589 brcmf_dbg(TRACE, "Enter\n");
3591 /* try to download image and nvram to the dongle */
3592 if (bus_if->state == BRCMF_BUS_DOWN) {
3593 if (!(brcmf_sdbrcm_download_firmware(bus)))
3597 if (!bus->sdiodev->bus_if->drvr)
3600 /* Start the watchdog timer */
3601 bus->sdcnt.tickcnt = 0;
3602 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3606 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3607 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3608 if (bus->clkstate != CLK_AVAIL)
3611 /* Force clocks on backplane to be sure F2 interrupt propagates */
3612 saveclk = brcmf_sdio_regrb(bus->sdiodev,
3613 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3615 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3616 (saveclk | SBSDIO_FORCE_HT), &err);
3619 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
3623 /* Enable function 2 (frame transfers) */
3624 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3625 offsetof(struct sdpcmd_regs, tosbmailboxdata));
3626 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3628 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3630 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3632 while (enable != ready) {
3633 ready = brcmf_sdio_regrb(bus->sdiodev,
3634 SDIO_CCCR_IORx, NULL);
3635 if (time_after(jiffies, timeout))
3637 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3638 /* prevent busy waiting if it takes too long */
3639 msleep_interruptible(20);
3642 brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
3644 /* If F2 successfully enabled, set core and enable interrupts */
3645 if (ready == enable) {
3646 /* Set up the interrupt mask and enable interrupts */
3647 bus->hostintmask = HOSTINTMASK;
3648 w_sdreg32(bus, bus->hostintmask,
3649 offsetof(struct sdpcmd_regs, hostintmask));
3651 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3653 /* Disable F2 again */
3654 enable = SDIO_FUNC_ENABLE_1;
3655 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3659 /* Restore previous clock setting */
3660 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err);
3663 ret = brcmf_sdio_intr_register(bus->sdiodev);
3665 brcmf_dbg(ERROR, "intr register failed:%d\n", ret);
3668 /* If we didn't come up, turn off backplane clock */
3669 if (bus_if->state != BRCMF_BUS_DATA)
3670 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3678 void brcmf_sdbrcm_isr(void *arg)
3680 struct brcmf_sdio *bus = (struct brcmf_sdio *) arg;
3682 brcmf_dbg(TRACE, "Enter\n");
3685 brcmf_dbg(ERROR, "bus is null pointer, exiting\n");
3689 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3690 brcmf_dbg(ERROR, "bus is down. we have nothing to do\n");
3693 /* Count the interrupt call */
3694 bus->sdcnt.intrcount++;
3697 /* Disable additional interrupts (is this needed now)? */
3699 brcmf_dbg(ERROR, "isr w/o interrupt configured!\n");
3701 bus->dpc_sched = true;
3703 brcmf_sdbrcm_adddpctsk(bus);
3704 complete(&bus->dpc_wait);
3708 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)
3711 struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3714 brcmf_dbg(TIMER, "Enter\n");
3718 /* Poll period: check device if appropriate. */
3719 if (bus->poll && (++bus->polltick >= bus->pollrate)) {
3722 /* Reset poll tick */
3725 /* Check device if no interrupts */
3727 (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3729 if (!bus->dpc_sched) {
3731 devpend = brcmf_sdio_regrb(bus->sdiodev,
3735 devpend & (INTR_STATUS_FUNC1 |
3739 /* If there is something, make like the ISR and
3742 bus->sdcnt.pollcnt++;
3745 bus->dpc_sched = true;
3747 brcmf_sdbrcm_adddpctsk(bus);
3748 complete(&bus->dpc_wait);
3753 /* Update interrupt tracking */
3754 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3757 /* Poll for console output periodically */
3758 if (bus_if->state == BRCMF_BUS_DATA &&
3759 bus->console_interval != 0) {
3760 bus->console.count += BRCMF_WD_POLL_MS;
3761 if (bus->console.count >= bus->console_interval) {
3762 bus->console.count -= bus->console_interval;
3763 /* Make sure backplane clock is on */
3764 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3765 if (brcmf_sdbrcm_readconsole(bus) < 0)
3767 bus->console_interval = 0;
3772 /* On idle timeout clear activity flag and/or turn off clock */
3773 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3774 if (++bus->idlecount >= bus->idletime) {
3776 if (bus->activity) {
3777 bus->activity = false;
3778 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3780 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3790 static bool brcmf_sdbrcm_chipmatch(u16 chipid)
3792 if (chipid == BCM43241_CHIP_ID)
3794 if (chipid == BCM4329_CHIP_ID)
3796 if (chipid == BCM4330_CHIP_ID)
3798 if (chipid == BCM4334_CHIP_ID)
3803 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
3805 brcmf_dbg(TRACE, "Enter\n");
3808 bus->rxctl = bus->rxbuf = NULL;
3811 kfree(bus->databuf);
3812 bus->databuf = NULL;
3815 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
3817 brcmf_dbg(TRACE, "Enter\n");
3819 if (bus->sdiodev->bus_if->maxctl) {
3821 roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3822 ALIGNMENT) + BRCMF_SDALIGN;
3823 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3828 /* Allocate buffer to receive glomed packet */
3829 bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
3830 if (!(bus->databuf)) {
3831 /* release rxbuf which was already located as above */
3837 /* Align the buffer */
3838 if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
3839 bus->dataptr = bus->databuf + (BRCMF_SDALIGN -
3840 ((unsigned long)bus->databuf % BRCMF_SDALIGN));
3842 bus->dataptr = bus->databuf;
3851 brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
3859 bus->alp_only = true;
3861 pr_debug("F1 signature read @0x18000000=0x%4x\n",
3862 brcmf_sdio_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3865 * Force PLL off until brcmf_sdio_chip_attach()
3866 * programs PLL control regs
3869 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3870 BRCMF_INIT_CLKCTL1, &err);
3872 clkctl = brcmf_sdio_regrb(bus->sdiodev,
3873 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3875 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3876 brcmf_dbg(ERROR, "ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3877 err, BRCMF_INIT_CLKCTL1, clkctl);
3881 if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
3882 brcmf_dbg(ERROR, "brcmf_sdio_chip_attach failed!\n");
3886 if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
3887 brcmf_dbg(ERROR, "unsupported chip: 0x%04x\n", bus->ci->chip);
3891 brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci,
3892 SDIO_DRIVE_STRENGTH);
3894 /* Get info on the SOCRAM cores... */
3895 bus->ramsize = bus->ci->ramsize;
3896 if (!(bus->ramsize)) {
3897 brcmf_dbg(ERROR, "failed to find SOCRAM memory!\n");
3901 /* Set core control so an SDIO reset does a backplane reset */
3902 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3903 reg_addr = bus->ci->c_inf[idx].base +
3904 offsetof(struct sdpcmd_regs, corecontrol);
3905 reg_val = brcmf_sdio_regrl(bus->sdiodev, reg_addr, NULL);
3906 brcmf_sdio_regwl(bus->sdiodev, reg_addr, reg_val | CC_BPRESEN, NULL);
3908 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3910 /* Locate an appropriately-aligned portion of hdrbuf */
3911 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3914 /* Set the poll and/or interrupt flags */
3926 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
3928 brcmf_dbg(TRACE, "Enter\n");
3930 /* Disable F2 to clear any intermediate frame state on the dongle */
3931 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx,
3932 SDIO_FUNC_ENABLE_1, NULL);
3934 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3935 bus->rxflow = false;
3937 /* Done with backplane-dependent accesses, can drop clock... */
3938 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3940 /* ...and initialize clock/power states */
3941 bus->clkstate = CLK_SDONLY;
3942 bus->idletime = BRCMF_IDLE_INTERVAL;
3943 bus->idleclock = BRCMF_IDLE_ACTIVE;
3945 /* Query the F2 block size, set roundup accordingly */
3946 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3947 bus->roundup = min(max_roundup, bus->blocksize);
3949 /* bus module does not support packet chaining */
3950 bus->use_rxchain = false;
3951 bus->sd_rxchain = false;
3957 brcmf_sdbrcm_watchdog_thread(void *data)
3959 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3961 allow_signal(SIGTERM);
3962 /* Run until signal received */
3964 if (kthread_should_stop())
3966 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3967 brcmf_sdbrcm_bus_watchdog(bus);
3968 /* Count the tick for reference */
3969 bus->sdcnt.tickcnt++;
3977 brcmf_sdbrcm_watchdog(unsigned long data)
3979 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3981 if (bus->watchdog_tsk) {
3982 complete(&bus->watchdog_wait);
3983 /* Reschedule the watchdog */
3984 if (bus->wd_timer_valid)
3985 mod_timer(&bus->timer,
3986 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3990 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
3992 brcmf_dbg(TRACE, "Enter\n");
3995 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3996 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3997 brcmf_sdio_chip_detach(&bus->ci);
3998 if (bus->vars && bus->varsz)
4003 brcmf_dbg(TRACE, "Disconnected\n");
4006 /* Detach and free everything */
4007 static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
4009 brcmf_dbg(TRACE, "Enter\n");
4012 /* De-register interrupt handler */
4013 brcmf_sdio_intr_unregister(bus->sdiodev);
4015 if (bus->sdiodev->bus_if->drvr) {
4016 brcmf_detach(bus->sdiodev->dev);
4017 brcmf_sdbrcm_release_dongle(bus);
4020 brcmf_sdbrcm_release_malloc(bus);
4025 brcmf_dbg(TRACE, "Disconnected\n");
4028 void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
4031 struct brcmf_sdio *bus;
4032 struct brcmf_bus_dcmd *dlst;
4034 u32 dngl_txglomalign;
4037 brcmf_dbg(TRACE, "Enter\n");
4039 /* We make an assumption about address window mappings:
4040 * regsva == SI_ENUM_BASE*/
4042 /* Allocate private bus interface state */
4043 bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
4047 bus->sdiodev = sdiodev;
4049 skb_queue_head_init(&bus->glom);
4050 bus->txbound = BRCMF_TXBOUND;
4051 bus->rxbound = BRCMF_RXBOUND;
4052 bus->txminmax = BRCMF_TXMINMAX;
4053 bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
4054 bus->usebufpool = false; /* Use bufpool if allocated,
4055 else use locally malloced rxbuf */
4057 /* attempt to attach to the dongle */
4058 if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
4059 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_attach failed\n");
4063 spin_lock_init(&bus->txqlock);
4064 init_waitqueue_head(&bus->ctrl_wait);
4065 init_waitqueue_head(&bus->dcmd_resp_wait);
4067 /* Set up the watchdog timer */
4068 init_timer(&bus->timer);
4069 bus->timer.data = (unsigned long)bus;
4070 bus->timer.function = brcmf_sdbrcm_watchdog;
4072 /* Initialize thread based operation and lock */
4073 sema_init(&bus->sdsem, 1);
4075 /* Initialize watchdog thread */
4076 init_completion(&bus->watchdog_wait);
4077 bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
4078 bus, "brcmf_watchdog");
4079 if (IS_ERR(bus->watchdog_tsk)) {
4080 pr_warn("brcmf_watchdog thread failed to start\n");
4081 bus->watchdog_tsk = NULL;
4083 /* Initialize DPC thread */
4084 init_completion(&bus->dpc_wait);
4085 INIT_LIST_HEAD(&bus->dpc_tsklst);
4086 spin_lock_init(&bus->dpc_tl_lock);
4087 bus->dpc_tsk = kthread_run(brcmf_sdbrcm_dpc_thread,
4089 if (IS_ERR(bus->dpc_tsk)) {
4090 pr_warn("brcmf_dpc thread failed to start\n");
4091 bus->dpc_tsk = NULL;
4094 /* Assign bus interface call back */
4095 bus->sdiodev->bus_if->brcmf_bus_stop = brcmf_sdbrcm_bus_stop;
4096 bus->sdiodev->bus_if->brcmf_bus_init = brcmf_sdbrcm_bus_init;
4097 bus->sdiodev->bus_if->brcmf_bus_txdata = brcmf_sdbrcm_bus_txdata;
4098 bus->sdiodev->bus_if->brcmf_bus_txctl = brcmf_sdbrcm_bus_txctl;
4099 bus->sdiodev->bus_if->brcmf_bus_rxctl = brcmf_sdbrcm_bus_rxctl;
4100 /* Attach to the brcmf/OS/network interface */
4101 ret = brcmf_attach(SDPCM_RESERVE, bus->sdiodev->dev);
4103 brcmf_dbg(ERROR, "brcmf_attach failed\n");
4107 /* Allocate buffers */
4108 if (!(brcmf_sdbrcm_probe_malloc(bus))) {
4109 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_malloc failed\n");
4113 if (!(brcmf_sdbrcm_probe_init(bus))) {
4114 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_init failed\n");
4118 brcmf_sdio_debugfs_create(bus);
4119 brcmf_dbg(INFO, "completed!!\n");
4121 /* sdio bus core specific dcmd */
4122 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
4123 dlst = kzalloc(sizeof(struct brcmf_bus_dcmd), GFP_KERNEL);
4125 if (bus->ci->c_inf[idx].rev < 12) {
4126 /* for sdio core rev < 12, disable txgloming */
4128 dlst->name = "bus:txglom";
4129 dlst->param = (char *)&dngl_txglom;
4130 dlst->param_len = sizeof(u32);
4132 /* otherwise, set txglomalign */
4133 dngl_txglomalign = bus->sdiodev->bus_if->align;
4134 dlst->name = "bus:txglomalign";
4135 dlst->param = (char *)&dngl_txglomalign;
4136 dlst->param_len = sizeof(u32);
4138 list_add(&dlst->list, &bus->sdiodev->bus_if->dcmd_list);
4141 /* if firmware path present try to download and bring up bus */
4142 ret = brcmf_bus_start(bus->sdiodev->dev);
4144 if (ret == -ENOLINK) {
4145 brcmf_dbg(ERROR, "dongle is not responding\n");
4153 brcmf_sdbrcm_release(bus);
4157 void brcmf_sdbrcm_disconnect(void *ptr)
4159 struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr;
4161 brcmf_dbg(TRACE, "Enter\n");
4164 brcmf_sdbrcm_release(bus);
4166 brcmf_dbg(TRACE, "Disconnected\n");
4170 brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4172 /* Totally stop the timer */
4173 if (!wdtick && bus->wd_timer_valid) {
4174 del_timer_sync(&bus->timer);
4175 bus->wd_timer_valid = false;
4176 bus->save_ms = wdtick;
4180 /* don't start the wd until fw is loaded */
4181 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN)
4185 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4186 if (bus->wd_timer_valid)
4187 /* Stop timer and restart at new value */
4188 del_timer_sync(&bus->timer);
4190 /* Create timer again when watchdog period is
4191 dynamically changed or in the first instance
4193 bus->timer.expires =
4194 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4195 add_timer(&bus->timer);
4198 /* Re arm the timer, at last watchdog period */
4199 mod_timer(&bus->timer,
4200 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4203 bus->wd_timer_valid = true;
4204 bus->save_ms = wdtick;