2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/kthread.h>
20 #include <linux/printk.h>
21 #include <linux/pci_ids.h>
22 #include <linux/netdevice.h>
23 #include <linux/interrupt.h>
24 #include <linux/sched.h>
25 #include <linux/mmc/sdio.h>
26 #include <linux/mmc/sdio_func.h>
27 #include <linux/mmc/card.h>
28 #include <linux/semaphore.h>
29 #include <linux/firmware.h>
30 #include <linux/module.h>
31 #include <linux/bcma/bcma.h>
32 #include <linux/debugfs.h>
33 #include <linux/vmalloc.h>
34 #include <asm/unaligned.h>
36 #include <brcmu_wifi.h>
37 #include <brcmu_utils.h>
38 #include <brcm_hw_ids.h>
40 #include "sdio_host.h"
41 #include "sdio_chip.h"
43 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
47 #define BRCMF_TRAP_INFO_SIZE 80
49 #define CBUF_LEN (128)
51 /* Device console log buffer state */
52 #define CONSOLE_BUFFER_MAX 2024
55 __le32 buf; /* Can't be pointer on (64-bit) hosts */
58 char *_buf_compat; /* Redundant pointer for backward compat. */
63 * When there is no UART (e.g. Quickturn),
64 * the host should write a complete
65 * input line directly into cbuf and then write
66 * the length into vcons_in.
67 * This may also be used when there is a real UART
68 * (at risk of conflicting with
69 * the real UART). vcons_out is currently unused.
74 /* Output (logging) buffer
75 * Console output is written to a ring buffer log_buf at index log_idx.
76 * The host may read the output when it sees log_idx advance.
77 * Output will be lost if the output wraps around faster than the host
80 struct rte_log_le log_le;
82 /* Console input line buffer
83 * Characters are read one at a time into cbuf
84 * until <CR> is received, then
85 * the buffer is processed as a command line.
86 * Also used for virtual UART.
93 #include <chipcommon.h>
97 #include "tracepoint.h"
99 #define TXQLEN 2048 /* bulk tx queue length */
100 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
101 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
104 #define TXRETRIES 2 /* # of retries for tx frames */
106 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
109 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
112 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
114 #define MEMBLOCK 2048 /* Block size used for downloading
116 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
117 biggest possible glom */
119 #define BRCMF_FIRSTREAD (1 << 6)
122 /* SBSDIO_DEVICE_CTL */
124 /* 1: device will assert busy signal when receiving CMD53 */
125 #define SBSDIO_DEVCTL_SETBUSY 0x01
126 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
127 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
128 /* 1: mask all interrupts to host except the chipActive (rev 8) */
129 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
130 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
131 * sdio bus power cycle to clear (rev 9) */
132 #define SBSDIO_DEVCTL_PADS_ISO 0x08
133 /* Force SD->SB reset mapping (rev 11) */
134 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
135 /* Determined by CoreControl bit */
136 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
137 /* Force backplane reset */
138 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
139 /* Force no backplane reset */
140 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
142 /* direct(mapped) cis space */
144 /* MAPPED common CIS address */
145 #define SBSDIO_CIS_BASE_COMMON 0x1000
146 /* maximum bytes in one CIS */
147 #define SBSDIO_CIS_SIZE_LIMIT 0x200
148 /* cis offset addr is < 17 bits */
149 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
151 /* manfid tuple length, include tuple, link bytes */
152 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
155 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
156 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
157 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
158 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
159 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
160 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
161 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
162 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
163 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
164 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
165 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
166 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
167 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
168 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
169 #define I_PC (1 << 10) /* descriptor error */
170 #define I_PD (1 << 11) /* data error */
171 #define I_DE (1 << 12) /* Descriptor protocol Error */
172 #define I_RU (1 << 13) /* Receive descriptor Underflow */
173 #define I_RO (1 << 14) /* Receive fifo Overflow */
174 #define I_XU (1 << 15) /* Transmit fifo Underflow */
175 #define I_RI (1 << 16) /* Receive Interrupt */
176 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
177 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
178 #define I_XI (1 << 24) /* Transmit Interrupt */
179 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
180 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
181 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
182 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
183 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
184 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
185 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
186 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
187 #define I_DMA (I_RI | I_XI | I_ERRORS)
190 #define CC_CISRDY (1 << 0) /* CIS Ready */
191 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
192 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
193 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
194 #define CC_XMTDATAAVAIL_MODE (1 << 4)
195 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
198 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
199 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
200 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
201 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
204 #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
206 /* Total length of frame header for dongle protocol */
207 #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
208 #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
211 * Software allocation of To SB Mailbox resources
214 /* tosbmailbox bits corresponding to intstatus bits */
215 #define SMB_NAK (1 << 0) /* Frame NAK */
216 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
217 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
218 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
220 /* tosbmailboxdata */
221 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
224 * Software allocation of To Host Mailbox resources
228 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
229 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
230 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
231 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
233 /* tohostmailboxdata */
234 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
235 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
236 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
237 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
239 #define HMB_DATA_FCDATA_MASK 0xff000000
240 #define HMB_DATA_FCDATA_SHIFT 24
242 #define HMB_DATA_VERSION_MASK 0x00ff0000
243 #define HMB_DATA_VERSION_SHIFT 16
246 * Software-defined protocol header
249 /* Current protocol version */
250 #define SDPCM_PROT_VERSION 4
252 /* SW frame header */
253 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
255 #define SDPCM_CHANNEL_MASK 0x00000f00
256 #define SDPCM_CHANNEL_SHIFT 8
257 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
259 #define SDPCM_NEXTLEN_OFFSET 2
261 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
262 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
263 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
264 #define SDPCM_DOFFSET_MASK 0xff000000
265 #define SDPCM_DOFFSET_SHIFT 24
266 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
267 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
268 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
269 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
271 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
273 /* logical channel numbers */
274 #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
275 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
276 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
277 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
278 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
280 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
282 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
285 * Shared structure between dongle and the host.
286 * The structure contains pointers to trap or assert information.
288 #define SDPCM_SHARED_VERSION 0x0003
289 #define SDPCM_SHARED_VERSION_MASK 0x00FF
290 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
291 #define SDPCM_SHARED_ASSERT 0x0200
292 #define SDPCM_SHARED_TRAP 0x0400
294 /* Space for header read, limit for data packets */
295 #define MAX_HDR_READ (1 << 6)
296 #define MAX_RX_DATASZ 2048
298 /* Maximum milliseconds to wait for F2 to come up */
299 #define BRCMF_WAIT_F2RDY 3000
301 /* Bump up limit on waiting for HT to account for first startup;
302 * if the image is doing a CRC calculation before programming the PMU
303 * for HT availability, it could take a couple hundred ms more, so
304 * max out at a 1 second (1000000us).
306 #undef PMU_MAX_TRANSITION_DLY
307 #define PMU_MAX_TRANSITION_DLY 1000000
309 /* Value for ChipClockCSR during initial setup */
310 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
311 SBSDIO_ALP_AVAIL_REQ)
313 /* Flags for SDH calls */
314 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
316 #define BRCMF_SDIO_FW_NAME "brcm/brcmfmac-sdio.bin"
317 #define BRCMF_SDIO_NV_NAME "brcm/brcmfmac-sdio.txt"
318 MODULE_FIRMWARE(BRCMF_SDIO_FW_NAME);
319 MODULE_FIRMWARE(BRCMF_SDIO_NV_NAME);
321 #define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */
322 #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
325 #define BRCMF_IDLE_INTERVAL 1
328 * Conversion of 802.1D priority to precedence level
330 static uint prio2prec(u32 prio)
332 return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
338 u32 corecontrol; /* 0x00, rev8 */
339 u32 corestatus; /* rev8 */
341 u32 biststatus; /* rev8 */
344 u16 pcmciamesportaladdr; /* 0x010, rev8 */
346 u16 pcmciamesportalmask; /* rev8 */
348 u16 pcmciawrframebc; /* rev8 */
350 u16 pcmciaunderflowtimer; /* rev8 */
354 u32 intstatus; /* 0x020, rev8 */
355 u32 hostintmask; /* rev8 */
356 u32 intmask; /* rev8 */
357 u32 sbintstatus; /* rev8 */
358 u32 sbintmask; /* rev8 */
359 u32 funcintmask; /* rev4 */
361 u32 tosbmailbox; /* 0x040, rev8 */
362 u32 tohostmailbox; /* rev8 */
363 u32 tosbmailboxdata; /* rev8 */
364 u32 tohostmailboxdata; /* rev8 */
366 /* synchronized access to registers in SDIO clock domain */
367 u32 sdioaccess; /* 0x050, rev8 */
370 /* PCMCIA frame control */
371 u8 pcmciaframectrl; /* 0x060, rev8 */
373 u8 pcmciawatermark; /* rev8 */
376 /* interrupt batching control */
377 u32 intrcvlazy; /* 0x100, rev8 */
381 u32 cmd52rd; /* 0x110, rev8 */
382 u32 cmd52wr; /* rev8 */
383 u32 cmd53rd; /* rev8 */
384 u32 cmd53wr; /* rev8 */
385 u32 abort; /* rev8 */
386 u32 datacrcerror; /* rev8 */
387 u32 rdoutofsync; /* rev8 */
388 u32 wroutofsync; /* rev8 */
389 u32 writebusy; /* rev8 */
390 u32 readwait; /* rev8 */
391 u32 readterm; /* rev8 */
392 u32 writeterm; /* rev8 */
394 u32 clockctlstatus; /* rev8 */
397 u32 PAD[128]; /* DMA engines */
399 /* SDIO/PCMCIA CIS region */
400 char cis[512]; /* 0x400-0x5ff, rev6 */
402 /* PCMCIA function control registers */
403 char pcmciafcr[256]; /* 0x600-6ff, rev6 */
406 /* PCMCIA backplane access */
407 u16 backplanecsr; /* 0x76E, rev6 */
408 u16 backplaneaddr0; /* rev6 */
409 u16 backplaneaddr1; /* rev6 */
410 u16 backplaneaddr2; /* rev6 */
411 u16 backplaneaddr3; /* rev6 */
412 u16 backplanedata0; /* rev6 */
413 u16 backplanedata1; /* rev6 */
414 u16 backplanedata2; /* rev6 */
415 u16 backplanedata3; /* rev6 */
418 /* sprom "size" & "blank" info */
419 u16 spromstatus; /* 0x7BE, rev2 */
426 /* Device console log buffer state */
427 struct brcmf_console {
428 uint count; /* Poll interval msec counter */
429 uint log_addr; /* Log struct address (fixed) */
430 struct rte_log_le log_le; /* Log struct (host copy) */
431 uint bufsize; /* Size of log buffer */
432 u8 *buf; /* Log buffer (host copy) */
433 uint last; /* Last buffer read index */
436 struct brcmf_trap_info {
450 __le32 r9; /* sb/v6 */
451 __le32 r10; /* sl/v7 */
452 __le32 r11; /* fp/v8 */
460 struct sdpcm_shared {
464 u32 assert_file_addr;
466 u32 console_addr; /* Address of struct rte_console */
472 struct sdpcm_shared_le {
475 __le32 assert_exp_addr;
476 __le32 assert_file_addr;
478 __le32 console_addr; /* Address of struct rte_console */
479 __le32 msgtrace_addr;
484 /* SDIO read frame info */
485 struct brcmf_sdio_read {
494 /* misc chip info needed by some of the routines */
495 /* Private data for SDIO bus interaction */
497 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
498 struct chip_info *ci; /* Chip info struct */
499 char *vars; /* Variables (from CIS and/or other) */
500 uint varsz; /* Size of variables buffer */
502 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
504 u32 hostintmask; /* Copy of Host Interrupt Mask */
505 atomic_t intstatus; /* Intstatus bits (events) pending */
506 atomic_t fcstate; /* State of dongle flow-control */
508 uint blocksize; /* Block size of SDIO transfers */
509 uint roundup; /* Max roundup limit */
511 struct pktq txq; /* Queue length used for flow-control */
512 u8 flowcontrol; /* per prio flow control bitmask */
513 u8 tx_seq; /* Transmit sequence number (next) */
514 u8 tx_max; /* Maximum transmit sequence allowed */
516 u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
517 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
518 u8 rx_seq; /* Receive sequence number (expected) */
519 struct brcmf_sdio_read cur_read;
520 /* info of current read frame */
521 bool rxskip; /* Skip receive (awaiting NAK ACK) */
522 bool rxpending; /* Data frame pending in dongle */
524 uint rxbound; /* Rx frames to read before resched */
525 uint txbound; /* Tx frames to send before resched */
528 struct sk_buff *glomd; /* Packet containing glomming descriptor */
529 struct sk_buff_head glom; /* Packet list for glommed superframe */
530 uint glomerr; /* Glom packet read errors */
532 u8 *rxbuf; /* Buffer for receiving control packets */
533 uint rxblen; /* Allocated length of rxbuf */
534 u8 *rxctl; /* Aligned pointer into rxbuf */
535 u8 *rxctl_orig; /* pointer for freeing rxctl */
536 u8 *databuf; /* Buffer for receiving big glom packet */
537 u8 *dataptr; /* Aligned pointer into databuf */
538 uint rxlen; /* Length of valid data in buffer */
539 spinlock_t rxctl_lock; /* protection lock for ctrl frame resources */
541 u8 sdpcm_ver; /* Bus protocol reported by dongle */
543 bool intr; /* Use interrupts */
544 bool poll; /* Use polling */
545 atomic_t ipend; /* Device interrupt is pending */
546 uint spurious; /* Count of spurious interrupts */
547 uint pollrate; /* Ticks between device polls */
548 uint polltick; /* Tick counter */
551 uint console_interval;
552 struct brcmf_console console; /* Console output polling support */
553 uint console_addr; /* Console address from shared struct */
556 uint clkstate; /* State of sd and backplane clock(s) */
557 bool activity; /* Activity flag for clock down */
558 s32 idletime; /* Control for activity timeout */
559 s32 idlecount; /* Activity timeout counter */
560 s32 idleclock; /* How to set bus driver when idle */
562 bool use_rxchain; /* If brcmf should use PKT chains */
563 bool rxflow_mode; /* Rx flow control mode */
564 bool rxflow; /* Is rx flow control on */
565 bool alp_only; /* Don't use HT clock (ALP only) */
569 bool ctrl_frame_stat;
572 wait_queue_head_t ctrl_wait;
573 wait_queue_head_t dcmd_resp_wait;
575 struct timer_list timer;
576 struct completion watchdog_wait;
577 struct task_struct *watchdog_tsk;
581 struct workqueue_struct *brcmf_wq;
582 struct work_struct datawork;
583 struct list_head dpc_tsklst;
584 spinlock_t dpc_tl_lock;
586 const struct firmware *firmware;
589 bool txoff; /* Transmit flow-controlled */
590 struct brcmf_sdio_count sdcnt;
596 #define CLK_PENDING 2 /* Not used yet */
600 static int qcount[NUMPRIO];
601 static int tx_packets[NUMPRIO];
604 #define SDIO_DRIVE_STRENGTH 6 /* in milliamps */
606 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
608 /* Retry count for register access failures */
609 static const uint retry_limit = 2;
611 /* Limit on rounding up frames */
612 static const uint max_roundup = 512;
616 enum brcmf_sdio_frmtype {
617 BRCMF_SDIO_FT_NORMAL,
622 static void pkt_align(struct sk_buff *p, int len, int align)
625 datalign = (unsigned long)(p->data);
626 datalign = roundup(datalign, (align)) - datalign;
628 skb_pull(p, datalign);
632 /* To check if there's window offered */
633 static bool data_ok(struct brcmf_sdio *bus)
635 return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
636 ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
640 * Reads a register in the SDIO hardware block. This block occupies a series of
641 * adresses on the 32 bit backplane bus.
644 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
646 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
649 *regvar = brcmf_sdio_regrl(bus->sdiodev,
650 bus->ci->c_inf[idx].base + offset, &ret);
656 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
658 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
661 brcmf_sdio_regwl(bus->sdiodev,
662 bus->ci->c_inf[idx].base + reg_offset,
668 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
670 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
672 /* Turn backplane clock on or off */
673 static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
676 u8 clkctl, clkreq, devctl;
677 unsigned long timeout;
679 brcmf_dbg(SDIO, "Enter\n");
684 /* Request HT Avail */
686 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
688 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
691 brcmf_err("HT Avail request error: %d\n", err);
695 /* Check current status */
696 clkctl = brcmf_sdio_regrb(bus->sdiodev,
697 SBSDIO_FUNC1_CHIPCLKCSR, &err);
699 brcmf_err("HT Avail read error: %d\n", err);
703 /* Go to pending and await interrupt if appropriate */
704 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
705 /* Allow only clock-available interrupt */
706 devctl = brcmf_sdio_regrb(bus->sdiodev,
707 SBSDIO_DEVICE_CTL, &err);
709 brcmf_err("Devctl error setting CA: %d\n",
714 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
715 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
717 brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
718 bus->clkstate = CLK_PENDING;
721 } else if (bus->clkstate == CLK_PENDING) {
722 /* Cancel CA-only interrupt filter */
723 devctl = brcmf_sdio_regrb(bus->sdiodev,
724 SBSDIO_DEVICE_CTL, &err);
725 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
726 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
730 /* Otherwise, wait here (polling) for HT Avail */
732 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
733 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
734 clkctl = brcmf_sdio_regrb(bus->sdiodev,
735 SBSDIO_FUNC1_CHIPCLKCSR,
737 if (time_after(jiffies, timeout))
740 usleep_range(5000, 10000);
743 brcmf_err("HT Avail request error: %d\n", err);
746 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
747 brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
748 PMU_MAX_TRANSITION_DLY, clkctl);
752 /* Mark clock available */
753 bus->clkstate = CLK_AVAIL;
754 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
757 if (!bus->alp_only) {
758 if (SBSDIO_ALPONLY(clkctl))
759 brcmf_err("HT Clock should be on\n");
761 #endif /* defined (DEBUG) */
763 bus->activity = true;
767 if (bus->clkstate == CLK_PENDING) {
768 /* Cancel CA-only interrupt filter */
769 devctl = brcmf_sdio_regrb(bus->sdiodev,
770 SBSDIO_DEVICE_CTL, &err);
771 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
772 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
776 bus->clkstate = CLK_SDONLY;
777 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
779 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
781 brcmf_err("Failed access turning clock off: %d\n",
789 /* Change idle/active SD state */
790 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
792 brcmf_dbg(SDIO, "Enter\n");
795 bus->clkstate = CLK_SDONLY;
797 bus->clkstate = CLK_NONE;
802 /* Transition SD and backplane clock readiness */
803 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
806 uint oldstate = bus->clkstate;
809 brcmf_dbg(SDIO, "Enter\n");
811 /* Early exit if we're already there */
812 if (bus->clkstate == target) {
813 if (target == CLK_AVAIL) {
814 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
815 bus->activity = true;
822 /* Make sure SD clock is available */
823 if (bus->clkstate == CLK_NONE)
824 brcmf_sdbrcm_sdclk(bus, true);
825 /* Now request HT Avail on the backplane */
826 brcmf_sdbrcm_htclk(bus, true, pendok);
827 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
828 bus->activity = true;
832 /* Remove HT request, or bring up SD clock */
833 if (bus->clkstate == CLK_NONE)
834 brcmf_sdbrcm_sdclk(bus, true);
835 else if (bus->clkstate == CLK_AVAIL)
836 brcmf_sdbrcm_htclk(bus, false, false);
838 brcmf_err("request for %d -> %d\n",
839 bus->clkstate, target);
840 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
844 /* Make sure to remove HT request */
845 if (bus->clkstate == CLK_AVAIL)
846 brcmf_sdbrcm_htclk(bus, false, false);
847 /* Now remove the SD clock */
848 brcmf_sdbrcm_sdclk(bus, false);
849 brcmf_sdbrcm_wd_timer(bus, 0);
853 brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
859 static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
866 brcmf_dbg(SDIO, "Enter\n");
868 /* Read mailbox data and ack that we did so */
869 ret = r_sdreg32(bus, &hmb_data,
870 offsetof(struct sdpcmd_regs, tohostmailboxdata));
873 w_sdreg32(bus, SMB_INT_ACK,
874 offsetof(struct sdpcmd_regs, tosbmailbox));
875 bus->sdcnt.f1regdata += 2;
877 /* Dongle recomposed rx frames, accept them again */
878 if (hmb_data & HMB_DATA_NAKHANDLED) {
879 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
882 brcmf_err("unexpected NAKHANDLED!\n");
885 intstatus |= I_HMB_FRAME_IND;
889 * DEVREADY does not occur with gSPI.
891 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
893 (hmb_data & HMB_DATA_VERSION_MASK) >>
894 HMB_DATA_VERSION_SHIFT;
895 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
896 brcmf_err("Version mismatch, dongle reports %d, "
898 bus->sdpcm_ver, SDPCM_PROT_VERSION);
900 brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
905 * Flow Control has been moved into the RX headers and this out of band
906 * method isn't used any more.
907 * remaining backward compatible with older dongles.
909 if (hmb_data & HMB_DATA_FC) {
910 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
911 HMB_DATA_FCDATA_SHIFT;
913 if (fcbits & ~bus->flowcontrol)
914 bus->sdcnt.fc_xoff++;
916 if (bus->flowcontrol & ~fcbits)
919 bus->sdcnt.fc_rcvd++;
920 bus->flowcontrol = fcbits;
923 /* Shouldn't be any others */
924 if (hmb_data & ~(HMB_DATA_DEVREADY |
925 HMB_DATA_NAKHANDLED |
928 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
929 brcmf_err("Unknown mailbox data content: 0x%02x\n",
935 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
942 brcmf_err("%sterminate frame%s\n",
943 abort ? "abort command, " : "",
944 rtx ? ", send NAK" : "");
947 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
949 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
951 bus->sdcnt.f1regdata++;
953 /* Wait until the packet has been flushed (device/FIFO stable) */
954 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
955 hi = brcmf_sdio_regrb(bus->sdiodev,
956 SBSDIO_FUNC1_RFRAMEBCHI, &err);
957 lo = brcmf_sdio_regrb(bus->sdiodev,
958 SBSDIO_FUNC1_RFRAMEBCLO, &err);
959 bus->sdcnt.f1regdata += 2;
961 if ((hi == 0) && (lo == 0))
964 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
965 brcmf_err("count growing: last 0x%04x now 0x%04x\n",
966 lastrbc, (hi << 8) + lo);
968 lastrbc = (hi << 8) + lo;
972 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
974 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
978 err = w_sdreg32(bus, SMB_NAK,
979 offsetof(struct sdpcmd_regs, tosbmailbox));
981 bus->sdcnt.f1regdata++;
986 /* Clear partial in any case */
987 bus->cur_read.len = 0;
989 /* If we can't reach the device, signal failure */
991 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
994 /* copy a buffer into a pkt buffer chain */
995 static uint brcmf_sdbrcm_glom_from_buf(struct brcmf_sdio *bus, uint len)
1004 skb_queue_walk(&bus->glom, p) {
1005 n = min_t(uint, p->len, len);
1006 memcpy(p->data, buf, n);
1017 /* return total length of buffer chain */
1018 static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
1024 skb_queue_walk(&bus->glom, p)
1029 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
1031 struct sk_buff *cur, *next;
1033 skb_queue_walk_safe(&bus->glom, cur, next) {
1034 skb_unlink(cur, &bus->glom);
1035 brcmu_pkt_buf_free_skb(cur);
1039 static int brcmf_sdio_hdparser(struct brcmf_sdio *bus, u8 *header,
1040 struct brcmf_sdio_read *rd,
1041 enum brcmf_sdio_frmtype type)
1044 u8 rx_seq, fc, tx_seq_max;
1047 * 4 bytes hardware header (frame tag)
1048 * Byte 0~1: Frame length
1049 * Byte 2~3: Checksum, bit-wise inverse of frame length
1051 len = get_unaligned_le16(header);
1052 checksum = get_unaligned_le16(header + sizeof(u16));
1053 /* All zero means no more to read */
1054 if (!(len | checksum)) {
1055 bus->rxpending = false;
1058 if ((u16)(~(len ^ checksum))) {
1059 brcmf_err("HW header checksum error\n");
1060 bus->sdcnt.rx_badhdr++;
1061 brcmf_sdbrcm_rxfail(bus, false, false);
1064 if (len < SDPCM_HDRLEN) {
1065 brcmf_err("HW header length error\n");
1068 if (type == BRCMF_SDIO_FT_SUPER &&
1069 (roundup(len, bus->blocksize) != rd->len)) {
1070 brcmf_err("HW superframe header length error\n");
1073 if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1074 brcmf_err("HW subframe header length error\n");
1080 * 8 bytes hardware header
1081 * Byte 0: Rx sequence number
1082 * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1083 * Byte 2: Length of next data frame
1084 * Byte 3: Data offset
1085 * Byte 4: Flow control bits
1086 * Byte 5: Maximum Sequence number allow for Tx
1087 * Byte 6~7: Reserved
1089 if (type == BRCMF_SDIO_FT_SUPER &&
1090 SDPCM_GLOMDESC(&header[SDPCM_FRAMETAG_LEN])) {
1091 brcmf_err("Glom descriptor found in superframe head\n");
1095 rx_seq = SDPCM_PACKET_SEQUENCE(&header[SDPCM_FRAMETAG_LEN]);
1096 rd->channel = SDPCM_PACKET_CHANNEL(&header[SDPCM_FRAMETAG_LEN]);
1097 if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1098 type != BRCMF_SDIO_FT_SUPER) {
1099 brcmf_err("HW header length too long\n");
1100 bus->sdcnt.rx_toolong++;
1101 brcmf_sdbrcm_rxfail(bus, false, false);
1105 if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1106 brcmf_err("Wrong channel for superframe\n");
1110 if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1111 rd->channel != SDPCM_EVENT_CHANNEL) {
1112 brcmf_err("Wrong channel for subframe\n");
1116 rd->dat_offset = SDPCM_DOFFSET_VALUE(&header[SDPCM_FRAMETAG_LEN]);
1117 if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1118 brcmf_err("seq %d: bad data offset\n", rx_seq);
1119 bus->sdcnt.rx_badhdr++;
1120 brcmf_sdbrcm_rxfail(bus, false, false);
1124 if (rd->seq_num != rx_seq) {
1125 brcmf_err("seq %d: sequence number error, expect %d\n",
1126 rx_seq, rd->seq_num);
1127 bus->sdcnt.rx_badseq++;
1128 rd->seq_num = rx_seq;
1130 /* no need to check the reset for subframe */
1131 if (type == BRCMF_SDIO_FT_SUB)
1133 rd->len_nxtfrm = header[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1134 if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1135 /* only warm for NON glom packet */
1136 if (rd->channel != SDPCM_GLOM_CHANNEL)
1137 brcmf_err("seq %d: next length error\n", rx_seq);
1140 fc = SDPCM_FCMASK_VALUE(&header[SDPCM_FRAMETAG_LEN]);
1141 if (bus->flowcontrol != fc) {
1142 if (~bus->flowcontrol & fc)
1143 bus->sdcnt.fc_xoff++;
1144 if (bus->flowcontrol & ~fc)
1145 bus->sdcnt.fc_xon++;
1146 bus->sdcnt.fc_rcvd++;
1147 bus->flowcontrol = fc;
1149 tx_seq_max = SDPCM_WINDOW_VALUE(&header[SDPCM_FRAMETAG_LEN]);
1150 if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1151 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1152 tx_seq_max = bus->tx_seq + 2;
1154 bus->tx_max = tx_seq_max;
1159 static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1165 struct sk_buff *pfirst, *pnext;
1170 bool usechain = bus->use_rxchain;
1172 struct brcmf_sdio_read rd_new;
1174 /* If packets, issue read(s) and send up packet chain */
1175 /* Return sequence numbers consumed? */
1177 brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1178 bus->glomd, skb_peek(&bus->glom));
1180 /* If there's a descriptor, generate the packet chain */
1182 pfirst = pnext = NULL;
1183 dlen = (u16) (bus->glomd->len);
1184 dptr = bus->glomd->data;
1185 if (!dlen || (dlen & 1)) {
1186 brcmf_err("bad glomd len(%d), ignore descriptor\n",
1191 for (totlen = num = 0; dlen; num++) {
1192 /* Get (and move past) next length */
1193 sublen = get_unaligned_le16(dptr);
1194 dlen -= sizeof(u16);
1195 dptr += sizeof(u16);
1196 if ((sublen < SDPCM_HDRLEN) ||
1197 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1198 brcmf_err("descriptor len %d bad: %d\n",
1203 if (sublen % BRCMF_SDALIGN) {
1204 brcmf_err("sublen %d not multiple of %d\n",
1205 sublen, BRCMF_SDALIGN);
1210 /* For last frame, adjust read len so total
1211 is a block multiple */
1214 (roundup(totlen, bus->blocksize) - totlen);
1215 totlen = roundup(totlen, bus->blocksize);
1218 /* Allocate/chain packet for next subframe */
1219 pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
1220 if (pnext == NULL) {
1221 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1225 skb_queue_tail(&bus->glom, pnext);
1227 /* Adhere to start alignment requirements */
1228 pkt_align(pnext, sublen, BRCMF_SDALIGN);
1231 /* If all allocations succeeded, save packet chain
1234 brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1236 if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1237 totlen != bus->cur_read.len) {
1238 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1239 bus->cur_read.len, totlen, rxseq);
1241 pfirst = pnext = NULL;
1243 brcmf_sdbrcm_free_glom(bus);
1247 /* Done with descriptor packet */
1248 brcmu_pkt_buf_free_skb(bus->glomd);
1250 bus->cur_read.len = 0;
1253 /* Ok -- either we just generated a packet chain,
1254 or had one from before */
1255 if (!skb_queue_empty(&bus->glom)) {
1256 if (BRCMF_GLOM_ON()) {
1257 brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1258 skb_queue_walk(&bus->glom, pnext) {
1259 brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
1260 pnext, (u8 *) (pnext->data),
1261 pnext->len, pnext->len);
1265 pfirst = skb_peek(&bus->glom);
1266 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1268 /* Do an SDIO read for the superframe. Configurable iovar to
1269 * read directly into the chained packet, or allocate a large
1270 * packet and and copy into the chain.
1272 sdio_claim_host(bus->sdiodev->func[1]);
1274 errcode = brcmf_sdcard_recv_chain(bus->sdiodev,
1275 bus->sdiodev->sbwad,
1276 SDIO_FUNC_2, F2SYNC, &bus->glom);
1277 } else if (bus->dataptr) {
1278 errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
1279 bus->sdiodev->sbwad,
1280 SDIO_FUNC_2, F2SYNC,
1281 bus->dataptr, dlen);
1282 sublen = (u16) brcmf_sdbrcm_glom_from_buf(bus, dlen);
1283 if (sublen != dlen) {
1284 brcmf_err("FAILED TO COPY, dlen %d sublen %d\n",
1290 brcmf_err("COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
1294 sdio_release_host(bus->sdiodev->func[1]);
1295 bus->sdcnt.f2rxdata++;
1297 /* On failure, kill the superframe, allow a couple retries */
1299 brcmf_err("glom read of %d bytes failed: %d\n",
1302 sdio_claim_host(bus->sdiodev->func[1]);
1303 if (bus->glomerr++ < 3) {
1304 brcmf_sdbrcm_rxfail(bus, true, true);
1307 brcmf_sdbrcm_rxfail(bus, true, false);
1308 bus->sdcnt.rxglomfail++;
1309 brcmf_sdbrcm_free_glom(bus);
1311 sdio_release_host(bus->sdiodev->func[1]);
1315 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1316 pfirst->data, min_t(int, pfirst->len, 48),
1319 rd_new.seq_num = rxseq;
1321 sdio_claim_host(bus->sdiodev->func[1]);
1322 errcode = brcmf_sdio_hdparser(bus, pfirst->data, &rd_new,
1323 BRCMF_SDIO_FT_SUPER);
1324 sdio_release_host(bus->sdiodev->func[1]);
1325 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1327 /* Remove superframe header, remember offset */
1328 skb_pull(pfirst, rd_new.dat_offset);
1329 sfdoff = rd_new.dat_offset;
1332 /* Validate all the subframe headers */
1333 skb_queue_walk(&bus->glom, pnext) {
1334 /* leave when invalid subframe is found */
1338 rd_new.len = pnext->len;
1339 rd_new.seq_num = rxseq++;
1340 sdio_claim_host(bus->sdiodev->func[1]);
1341 errcode = brcmf_sdio_hdparser(bus, pnext->data, &rd_new,
1343 sdio_release_host(bus->sdiodev->func[1]);
1344 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1345 pnext->data, 32, "subframe:\n");
1351 /* Terminate frame on error, request
1353 sdio_claim_host(bus->sdiodev->func[1]);
1354 if (bus->glomerr++ < 3) {
1355 /* Restore superframe header space */
1356 skb_push(pfirst, sfdoff);
1357 brcmf_sdbrcm_rxfail(bus, true, true);
1360 brcmf_sdbrcm_rxfail(bus, true, false);
1361 bus->sdcnt.rxglomfail++;
1362 brcmf_sdbrcm_free_glom(bus);
1364 sdio_release_host(bus->sdiodev->func[1]);
1365 bus->cur_read.len = 0;
1369 /* Basic SD framing looks ok - process each packet (header) */
1371 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1372 dptr = (u8 *) (pfirst->data);
1373 sublen = get_unaligned_le16(dptr);
1374 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1376 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1378 "Rx Subframe Data:\n");
1380 __skb_trim(pfirst, sublen);
1381 skb_pull(pfirst, doff);
1383 if (pfirst->len == 0) {
1384 skb_unlink(pfirst, &bus->glom);
1385 brcmu_pkt_buf_free_skb(pfirst);
1389 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1391 min_t(int, pfirst->len, 32),
1392 "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1393 bus->glom.qlen, pfirst, pfirst->data,
1394 pfirst->len, pfirst->next,
1397 /* sent any remaining packets up */
1399 brcmf_rx_frames(bus->sdiodev->dev, &bus->glom);
1401 bus->sdcnt.rxglomframes++;
1402 bus->sdcnt.rxglompkts += bus->glom.qlen;
1407 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1410 DECLARE_WAITQUEUE(wait, current);
1411 int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1413 /* Wait until control frame is available */
1414 add_wait_queue(&bus->dcmd_resp_wait, &wait);
1415 set_current_state(TASK_INTERRUPTIBLE);
1417 while (!(*condition) && (!signal_pending(current) && timeout))
1418 timeout = schedule_timeout(timeout);
1420 if (signal_pending(current))
1423 set_current_state(TASK_RUNNING);
1424 remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1429 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
1431 if (waitqueue_active(&bus->dcmd_resp_wait))
1432 wake_up_interruptible(&bus->dcmd_resp_wait);
1437 brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1440 u8 *buf = NULL, *rbuf;
1443 brcmf_dbg(TRACE, "Enter\n");
1446 buf = vzalloc(bus->rxblen);
1451 pad = ((unsigned long)rbuf % BRCMF_SDALIGN);
1453 rbuf += (BRCMF_SDALIGN - pad);
1455 /* Copy the already-read portion over */
1456 memcpy(buf, hdr, BRCMF_FIRSTREAD);
1457 if (len <= BRCMF_FIRSTREAD)
1460 /* Raise rdlen to next SDIO block to avoid tail command */
1461 rdlen = len - BRCMF_FIRSTREAD;
1462 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1463 pad = bus->blocksize - (rdlen % bus->blocksize);
1464 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1465 ((len + pad) < bus->sdiodev->bus_if->maxctl))
1467 } else if (rdlen % BRCMF_SDALIGN) {
1468 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1471 /* Satisfy length-alignment requirements */
1472 if (rdlen & (ALIGNMENT - 1))
1473 rdlen = roundup(rdlen, ALIGNMENT);
1475 /* Drop if the read is too big or it exceeds our maximum */
1476 if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1477 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1478 rdlen, bus->sdiodev->bus_if->maxctl);
1479 brcmf_sdbrcm_rxfail(bus, false, false);
1483 if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1484 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1485 len, len - doff, bus->sdiodev->bus_if->maxctl);
1486 bus->sdcnt.rx_toolong++;
1487 brcmf_sdbrcm_rxfail(bus, false, false);
1491 /* Read remain of frame body */
1492 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1493 bus->sdiodev->sbwad,
1495 F2SYNC, rbuf, rdlen);
1496 bus->sdcnt.f2rxdata++;
1498 /* Control frame failures need retransmission */
1500 brcmf_err("read %d control bytes failed: %d\n",
1502 bus->sdcnt.rxc_errors++;
1503 brcmf_sdbrcm_rxfail(bus, true, true);
1506 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1510 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1511 buf, len, "RxCtrl:\n");
1513 /* Point to valid data and indicate its length */
1514 spin_lock_bh(&bus->rxctl_lock);
1516 brcmf_err("last control frame is being processed.\n");
1517 spin_unlock_bh(&bus->rxctl_lock);
1521 bus->rxctl = buf + doff;
1522 bus->rxctl_orig = buf;
1523 bus->rxlen = len - doff;
1524 spin_unlock_bh(&bus->rxctl_lock);
1527 /* Awake any waiters */
1528 brcmf_sdbrcm_dcmd_resp_wake(bus);
1531 /* Pad read to blocksize for efficiency */
1532 static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1534 if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1535 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1536 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1537 *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1539 } else if (*rdlen % BRCMF_SDALIGN) {
1540 *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN);
1544 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1546 struct sk_buff *pkt; /* Packet for event or data frames */
1547 struct sk_buff_head pktlist; /* needed for bus interface */
1548 u16 pad; /* Number of pad bytes to read */
1549 uint rxleft = 0; /* Remaining number of frames allowed */
1550 int ret; /* Return code from calls */
1551 uint rxcount = 0; /* Total frames read */
1552 struct brcmf_sdio_read *rd = &bus->cur_read, rd_new;
1555 brcmf_dbg(TRACE, "Enter\n");
1557 /* Not finished unless we encounter no more frames indication */
1558 bus->rxpending = true;
1560 for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1561 !bus->rxskip && rxleft &&
1562 bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1563 rd->seq_num++, rxleft--) {
1565 /* Handle glomming separately */
1566 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1568 brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1569 bus->glomd, skb_peek(&bus->glom));
1570 cnt = brcmf_sdbrcm_rxglom(bus, rd->seq_num);
1571 brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1572 rd->seq_num += cnt - 1;
1573 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1577 rd->len_left = rd->len;
1578 /* read header first for unknow frame length */
1579 sdio_claim_host(bus->sdiodev->func[1]);
1581 ret = brcmf_sdcard_recv_buf(bus->sdiodev,
1582 bus->sdiodev->sbwad,
1583 SDIO_FUNC_2, F2SYNC,
1586 bus->sdcnt.f2rxhdrs++;
1588 brcmf_err("RXHEADER FAILED: %d\n",
1590 bus->sdcnt.rx_hdrfail++;
1591 brcmf_sdbrcm_rxfail(bus, true, true);
1592 sdio_release_host(bus->sdiodev->func[1]);
1596 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1597 bus->rxhdr, SDPCM_HDRLEN,
1600 if (brcmf_sdio_hdparser(bus, bus->rxhdr, rd,
1601 BRCMF_SDIO_FT_NORMAL)) {
1602 sdio_release_host(bus->sdiodev->func[1]);
1603 if (!bus->rxpending)
1609 if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1610 brcmf_sdbrcm_read_control(bus, bus->rxhdr,
1613 /* prepare the descriptor for the next read */
1614 rd->len = rd->len_nxtfrm << 4;
1616 /* treat all packet as event if we don't know */
1617 rd->channel = SDPCM_EVENT_CHANNEL;
1618 sdio_release_host(bus->sdiodev->func[1]);
1621 rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1622 rd->len - BRCMF_FIRSTREAD : 0;
1623 head_read = BRCMF_FIRSTREAD;
1626 brcmf_pad(bus, &pad, &rd->len_left);
1628 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1631 /* Give up on data, request rtx of events */
1632 brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1633 brcmf_sdbrcm_rxfail(bus, false,
1634 RETRYCHAN(rd->channel));
1635 sdio_release_host(bus->sdiodev->func[1]);
1638 skb_pull(pkt, head_read);
1639 pkt_align(pkt, rd->len_left, BRCMF_SDALIGN);
1641 ret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1642 SDIO_FUNC_2, F2SYNC, pkt);
1643 bus->sdcnt.f2rxdata++;
1644 sdio_release_host(bus->sdiodev->func[1]);
1647 brcmf_err("read %d bytes from channel %d failed: %d\n",
1648 rd->len, rd->channel, ret);
1649 brcmu_pkt_buf_free_skb(pkt);
1650 sdio_claim_host(bus->sdiodev->func[1]);
1651 brcmf_sdbrcm_rxfail(bus, true,
1652 RETRYCHAN(rd->channel));
1653 sdio_release_host(bus->sdiodev->func[1]);
1658 skb_push(pkt, head_read);
1659 memcpy(pkt->data, bus->rxhdr, head_read);
1662 memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1663 rd_new.seq_num = rd->seq_num;
1664 sdio_claim_host(bus->sdiodev->func[1]);
1665 if (brcmf_sdio_hdparser(bus, bus->rxhdr, &rd_new,
1666 BRCMF_SDIO_FT_NORMAL)) {
1668 brcmu_pkt_buf_free_skb(pkt);
1670 bus->sdcnt.rx_readahead_cnt++;
1671 if (rd->len != roundup(rd_new.len, 16)) {
1672 brcmf_err("frame length mismatch:read %d, should be %d\n",
1674 roundup(rd_new.len, 16) >> 4);
1676 brcmf_sdbrcm_rxfail(bus, true, true);
1677 sdio_release_host(bus->sdiodev->func[1]);
1678 brcmu_pkt_buf_free_skb(pkt);
1681 sdio_release_host(bus->sdiodev->func[1]);
1682 rd->len_nxtfrm = rd_new.len_nxtfrm;
1683 rd->channel = rd_new.channel;
1684 rd->dat_offset = rd_new.dat_offset;
1686 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1689 bus->rxhdr, SDPCM_HDRLEN,
1692 if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1693 brcmf_err("readahead on control packet %d?\n",
1695 /* Force retry w/normal header read */
1697 sdio_claim_host(bus->sdiodev->func[1]);
1698 brcmf_sdbrcm_rxfail(bus, false, true);
1699 sdio_release_host(bus->sdiodev->func[1]);
1700 brcmu_pkt_buf_free_skb(pkt);
1705 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1706 pkt->data, rd->len, "Rx Data:\n");
1708 /* Save superframe descriptor and allocate packet frame */
1709 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1710 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
1711 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1713 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1716 __skb_trim(pkt, rd->len);
1717 skb_pull(pkt, SDPCM_HDRLEN);
1720 brcmf_err("%s: glom superframe w/o "
1721 "descriptor!\n", __func__);
1722 sdio_claim_host(bus->sdiodev->func[1]);
1723 brcmf_sdbrcm_rxfail(bus, false, false);
1724 sdio_release_host(bus->sdiodev->func[1]);
1726 /* prepare the descriptor for the next read */
1727 rd->len = rd->len_nxtfrm << 4;
1729 /* treat all packet as event if we don't know */
1730 rd->channel = SDPCM_EVENT_CHANNEL;
1734 /* Fill in packet len and prio, deliver upward */
1735 __skb_trim(pkt, rd->len);
1736 skb_pull(pkt, rd->dat_offset);
1738 /* prepare the descriptor for the next read */
1739 rd->len = rd->len_nxtfrm << 4;
1741 /* treat all packet as event if we don't know */
1742 rd->channel = SDPCM_EVENT_CHANNEL;
1744 if (pkt->len == 0) {
1745 brcmu_pkt_buf_free_skb(pkt);
1749 skb_queue_head_init(&pktlist);
1750 skb_queue_tail(&pktlist, pkt);
1751 brcmf_rx_frames(bus->sdiodev->dev, &pktlist);
1754 rxcount = maxframes - rxleft;
1755 /* Message if we hit the limit */
1757 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
1759 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
1760 /* Back off rxseq if awaiting rtx, update rx_seq */
1763 bus->rx_seq = rd->seq_num;
1769 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
1771 if (waitqueue_active(&bus->ctrl_wait))
1772 wake_up_interruptible(&bus->ctrl_wait);
1776 /* Writes a HW/SW header into the packet and sends it. */
1777 /* Assumes: (a) header space already there, (b) caller holds lock */
1778 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt,
1787 brcmf_dbg(TRACE, "Enter\n");
1789 frame = (u8 *) (pkt->data);
1791 /* Add alignment padding, allocate new packet if needed */
1792 pad = ((unsigned long)frame % BRCMF_SDALIGN);
1794 if (skb_headroom(pkt) < pad) {
1795 brcmf_dbg(INFO, "insufficient headroom %d for %d pad\n",
1796 skb_headroom(pkt), pad);
1797 bus->sdiodev->bus_if->tx_realloc++;
1798 ret = skb_cow(pkt, BRCMF_SDALIGN);
1801 pad = ((unsigned long)frame % BRCMF_SDALIGN);
1804 frame = (u8 *) (pkt->data);
1805 memset(frame, 0, pad + SDPCM_HDRLEN);
1807 /* precondition: pad < BRCMF_SDALIGN */
1809 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
1810 len = (u16) (pkt->len);
1811 *(__le16 *) frame = cpu_to_le16(len);
1812 *(((__le16 *) frame) + 1) = cpu_to_le16(~len);
1814 /* Software tag: channel, sequence number, data offset */
1816 ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
1818 SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
1820 *(((__le32 *) frame) + 1) = cpu_to_le32(swheader);
1821 *(((__le32 *) frame) + 2) = 0;
1824 tx_packets[pkt->priority]++;
1827 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() &&
1828 ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
1829 (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)),
1830 frame, len, "Tx Frame:\n");
1831 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1833 chan == SDPCM_CONTROL_CHANNEL) ||
1835 chan != SDPCM_CONTROL_CHANNEL))) &&
1837 frame, min_t(u16, len, 16), "TxHdr:\n");
1839 /* Raise len to next SDIO block to eliminate tail command */
1840 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
1841 u16 pad = bus->blocksize - (len % bus->blocksize);
1842 if ((pad <= bus->roundup) && (pad < bus->blocksize))
1844 } else if (len % BRCMF_SDALIGN) {
1845 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
1848 /* Some controllers have trouble with odd bytes -- round to even */
1849 if (len & (ALIGNMENT - 1))
1850 len = roundup(len, ALIGNMENT);
1852 sdio_claim_host(bus->sdiodev->func[1]);
1853 ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1854 SDIO_FUNC_2, F2SYNC, pkt);
1855 bus->sdcnt.f2txdata++;
1858 /* On failure, abort the command and terminate the frame */
1859 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
1861 bus->sdcnt.tx_sderrs++;
1863 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1864 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1866 bus->sdcnt.f1regdata++;
1868 for (i = 0; i < 3; i++) {
1870 hi = brcmf_sdio_regrb(bus->sdiodev,
1871 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
1872 lo = brcmf_sdio_regrb(bus->sdiodev,
1873 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
1874 bus->sdcnt.f1regdata += 2;
1875 if ((hi == 0) && (lo == 0))
1880 sdio_release_host(bus->sdiodev->func[1]);
1882 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
1885 /* restore pkt buffer pointer before calling tx complete routine */
1886 skb_pull(pkt, SDPCM_HDRLEN + pad);
1887 brcmf_txcomplete(bus->sdiodev->dev, pkt, ret == 0);
1891 static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
1893 struct sk_buff *pkt;
1895 int ret = 0, prec_out;
1900 brcmf_dbg(TRACE, "Enter\n");
1902 tx_prec_map = ~bus->flowcontrol;
1904 /* Send frames until the limit or some other event */
1905 for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) {
1906 spin_lock_bh(&bus->txqlock);
1907 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
1909 spin_unlock_bh(&bus->txqlock);
1912 spin_unlock_bh(&bus->txqlock);
1913 datalen = pkt->len - SDPCM_HDRLEN;
1915 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL);
1917 /* In poll mode, need to check for other events */
1918 if (!bus->intr && cnt) {
1919 /* Check device status, signal pending interrupt */
1920 sdio_claim_host(bus->sdiodev->func[1]);
1921 ret = r_sdreg32(bus, &intstatus,
1922 offsetof(struct sdpcmd_regs,
1924 sdio_release_host(bus->sdiodev->func[1]);
1925 bus->sdcnt.f2txdata++;
1928 if (intstatus & bus->hostintmask)
1929 atomic_set(&bus->ipend, 1);
1933 /* Deflow-control stack if needed */
1934 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
1935 bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
1937 brcmf_txflowblock(bus->sdiodev->dev, false);
1943 static void brcmf_sdbrcm_bus_stop(struct device *dev)
1945 u32 local_hostintmask;
1948 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
1949 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
1950 struct brcmf_sdio *bus = sdiodev->bus;
1952 brcmf_dbg(TRACE, "Enter\n");
1954 if (bus->watchdog_tsk) {
1955 send_sig(SIGTERM, bus->watchdog_tsk, 1);
1956 kthread_stop(bus->watchdog_tsk);
1957 bus->watchdog_tsk = NULL;
1960 sdio_claim_host(bus->sdiodev->func[1]);
1962 /* Enable clock for device interrupts */
1963 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
1965 /* Disable and clear interrupts at the chip level also */
1966 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
1967 local_hostintmask = bus->hostintmask;
1968 bus->hostintmask = 0;
1970 /* Change our idea of bus state */
1971 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
1973 /* Force clocks on backplane to be sure F2 interrupt propagates */
1974 saveclk = brcmf_sdio_regrb(bus->sdiodev,
1975 SBSDIO_FUNC1_CHIPCLKCSR, &err);
1977 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
1978 (saveclk | SBSDIO_FORCE_HT), &err);
1981 brcmf_err("Failed to force clock for F2: err %d\n", err);
1983 /* Turn off the bus (F2), free any pending packets */
1984 brcmf_dbg(INTR, "disable SDIO interrupts\n");
1985 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1,
1988 /* Clear any pending interrupts now that F2 is disabled */
1989 w_sdreg32(bus, local_hostintmask,
1990 offsetof(struct sdpcmd_regs, intstatus));
1992 /* Turn off the backplane clock (only) */
1993 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
1994 sdio_release_host(bus->sdiodev->func[1]);
1996 /* Clear the data packet queues */
1997 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
1999 /* Clear any held glomming stuff */
2001 brcmu_pkt_buf_free_skb(bus->glomd);
2002 brcmf_sdbrcm_free_glom(bus);
2004 /* Clear rx control and wake any waiters */
2005 spin_lock_bh(&bus->rxctl_lock);
2007 spin_unlock_bh(&bus->rxctl_lock);
2008 brcmf_sdbrcm_dcmd_resp_wake(bus);
2010 /* Reset some F2 state stuff */
2011 bus->rxskip = false;
2012 bus->tx_seq = bus->rx_seq = 0;
2015 #ifdef CONFIG_BRCMFMAC_SDIO_OOB
2016 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2018 unsigned long flags;
2020 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2021 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2022 enable_irq(bus->sdiodev->irq);
2023 bus->sdiodev->irq_en = true;
2025 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2028 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2031 #endif /* CONFIG_BRCMFMAC_SDIO_OOB */
2033 static inline void brcmf_sdbrcm_adddpctsk(struct brcmf_sdio *bus)
2035 struct list_head *new_hd;
2036 unsigned long flags;
2039 new_hd = kzalloc(sizeof(struct list_head), GFP_ATOMIC);
2041 new_hd = kzalloc(sizeof(struct list_head), GFP_KERNEL);
2045 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2046 list_add_tail(new_hd, &bus->dpc_tsklst);
2047 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2050 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2057 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
2058 addr = bus->ci->c_inf[idx].base +
2059 offsetof(struct sdpcmd_regs, intstatus);
2061 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, false);
2062 bus->sdcnt.f1regdata++;
2066 val &= bus->hostintmask;
2067 atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2069 /* Clear interrupts */
2071 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, true);
2072 bus->sdcnt.f1regdata++;
2076 atomic_set(&bus->intstatus, 0);
2078 for_each_set_bit(n, &val, 32)
2079 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2085 static void brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
2088 unsigned long intstatus;
2089 uint rxlimit = bus->rxbound; /* Rx frames to read before resched */
2090 uint txlimit = bus->txbound; /* Tx frames to send before resched */
2091 uint framecnt = 0; /* Temporary counter of tx/rx frames */
2094 brcmf_dbg(TRACE, "Enter\n");
2096 sdio_claim_host(bus->sdiodev->func[1]);
2098 /* If waiting for HTAVAIL, check status */
2099 if (bus->clkstate == CLK_PENDING) {
2100 u8 clkctl, devctl = 0;
2103 /* Check for inconsistent device control */
2104 devctl = brcmf_sdio_regrb(bus->sdiodev,
2105 SBSDIO_DEVICE_CTL, &err);
2107 brcmf_err("error reading DEVCTL: %d\n", err);
2108 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2112 /* Read CSR, if clock on switch to AVAIL, else ignore */
2113 clkctl = brcmf_sdio_regrb(bus->sdiodev,
2114 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2116 brcmf_err("error reading CSR: %d\n",
2118 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2121 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2124 if (SBSDIO_HTAV(clkctl)) {
2125 devctl = brcmf_sdio_regrb(bus->sdiodev,
2126 SBSDIO_DEVICE_CTL, &err);
2128 brcmf_err("error reading DEVCTL: %d\n",
2130 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2132 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2133 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2136 brcmf_err("error writing DEVCTL: %d\n",
2138 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2140 bus->clkstate = CLK_AVAIL;
2144 /* Make sure backplane clock is on */
2145 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
2147 /* Pending interrupt indicates new device status */
2148 if (atomic_read(&bus->ipend) > 0) {
2149 atomic_set(&bus->ipend, 0);
2150 err = brcmf_sdio_intr_rstatus(bus);
2153 /* Start with leftover status bits */
2154 intstatus = atomic_xchg(&bus->intstatus, 0);
2156 /* Handle flow-control change: read new state in case our ack
2157 * crossed another change interrupt. If change still set, assume
2158 * FC ON for safety, let next loop through do the debounce.
2160 if (intstatus & I_HMB_FC_CHANGE) {
2161 intstatus &= ~I_HMB_FC_CHANGE;
2162 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2163 offsetof(struct sdpcmd_regs, intstatus));
2165 err = r_sdreg32(bus, &newstatus,
2166 offsetof(struct sdpcmd_regs, intstatus));
2167 bus->sdcnt.f1regdata += 2;
2168 atomic_set(&bus->fcstate,
2169 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2170 intstatus |= (newstatus & bus->hostintmask);
2173 /* Handle host mailbox indication */
2174 if (intstatus & I_HMB_HOST_INT) {
2175 intstatus &= ~I_HMB_HOST_INT;
2176 intstatus |= brcmf_sdbrcm_hostmail(bus);
2179 sdio_release_host(bus->sdiodev->func[1]);
2181 /* Generally don't ask for these, can get CRC errors... */
2182 if (intstatus & I_WR_OOSYNC) {
2183 brcmf_err("Dongle reports WR_OOSYNC\n");
2184 intstatus &= ~I_WR_OOSYNC;
2187 if (intstatus & I_RD_OOSYNC) {
2188 brcmf_err("Dongle reports RD_OOSYNC\n");
2189 intstatus &= ~I_RD_OOSYNC;
2192 if (intstatus & I_SBINT) {
2193 brcmf_err("Dongle reports SBINT\n");
2194 intstatus &= ~I_SBINT;
2197 /* Would be active due to wake-wlan in gSPI */
2198 if (intstatus & I_CHIPACTIVE) {
2199 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2200 intstatus &= ~I_CHIPACTIVE;
2203 /* Ignore frame indications if rxskip is set */
2205 intstatus &= ~I_HMB_FRAME_IND;
2207 /* On frame indication, read available frames */
2208 if (PKT_AVAILABLE() && bus->clkstate == CLK_AVAIL) {
2209 framecnt = brcmf_sdio_readframes(bus, rxlimit);
2210 if (!bus->rxpending)
2211 intstatus &= ~I_HMB_FRAME_IND;
2212 rxlimit -= min(framecnt, rxlimit);
2215 /* Keep still-pending events for next scheduling */
2217 for_each_set_bit(n, &intstatus, 32)
2218 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2221 brcmf_sdbrcm_clrintr(bus);
2223 if (data_ok(bus) && bus->ctrl_frame_stat &&
2224 (bus->clkstate == CLK_AVAIL)) {
2227 sdio_claim_host(bus->sdiodev->func[1]);
2228 err = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2229 SDIO_FUNC_2, F2SYNC, bus->ctrl_frame_buf,
2230 (u32) bus->ctrl_frame_len);
2233 /* On failure, abort the command and
2234 terminate the frame */
2235 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2237 bus->sdcnt.tx_sderrs++;
2239 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2241 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2243 bus->sdcnt.f1regdata++;
2245 for (i = 0; i < 3; i++) {
2247 hi = brcmf_sdio_regrb(bus->sdiodev,
2248 SBSDIO_FUNC1_WFRAMEBCHI,
2250 lo = brcmf_sdio_regrb(bus->sdiodev,
2251 SBSDIO_FUNC1_WFRAMEBCLO,
2253 bus->sdcnt.f1regdata += 2;
2254 if ((hi == 0) && (lo == 0))
2259 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2261 sdio_release_host(bus->sdiodev->func[1]);
2262 bus->ctrl_frame_stat = false;
2263 brcmf_sdbrcm_wait_event_wakeup(bus);
2265 /* Send queued frames (limit 1 if rx may still be pending) */
2266 else if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2267 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2269 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2271 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2272 txlimit -= framecnt;
2275 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || (err != 0)) {
2276 brcmf_err("failed backplane access over SDIO, halting operation\n");
2277 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2278 atomic_set(&bus->intstatus, 0);
2279 } else if (atomic_read(&bus->intstatus) ||
2280 atomic_read(&bus->ipend) > 0 ||
2281 (!atomic_read(&bus->fcstate) &&
2282 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2283 data_ok(bus)) || PKT_AVAILABLE()) {
2284 brcmf_sdbrcm_adddpctsk(bus);
2287 /* If we're done for now, turn off clock request. */
2288 if ((bus->clkstate != CLK_PENDING)
2289 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2290 bus->activity = false;
2291 sdio_claim_host(bus->sdiodev->func[1]);
2292 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
2293 sdio_release_host(bus->sdiodev->func[1]);
2297 static struct pktq *brcmf_sdbrcm_bus_gettxq(struct device *dev)
2299 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2300 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2301 struct brcmf_sdio *bus = sdiodev->bus;
2306 static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
2310 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2311 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2312 struct brcmf_sdio *bus = sdiodev->bus;
2313 unsigned long flags;
2315 brcmf_dbg(TRACE, "Enter\n");
2319 /* Add space for the header */
2320 skb_push(pkt, SDPCM_HDRLEN);
2321 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2323 prec = prio2prec((pkt->priority & PRIOMASK));
2325 /* Check for existing queue, current flow-control,
2326 pending event, or pending clock */
2327 brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2328 bus->sdcnt.fcqueued++;
2330 /* Priority based enq */
2331 spin_lock_bh(&bus->txqlock);
2332 if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2333 skb_pull(pkt, SDPCM_HDRLEN);
2334 brcmf_txcomplete(bus->sdiodev->dev, pkt, false);
2335 brcmf_err("out of bus->txq !!!\n");
2340 spin_unlock_bh(&bus->txqlock);
2342 if (pktq_len(&bus->txq) >= TXHI) {
2344 brcmf_txflowblock(bus->sdiodev->dev, true);
2348 if (pktq_plen(&bus->txq, prec) > qcount[prec])
2349 qcount[prec] = pktq_plen(&bus->txq, prec);
2352 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2353 if (list_empty(&bus->dpc_tsklst)) {
2354 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2356 brcmf_sdbrcm_adddpctsk(bus);
2357 queue_work(bus->brcmf_wq, &bus->datawork);
2359 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2366 brcmf_sdbrcm_membytes(struct brcmf_sdio *bus, bool write, u32 address, u8 *data,
2373 /* Determine initial transfer parameters */
2374 sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
2375 if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
2376 dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
2380 sdio_claim_host(bus->sdiodev->func[1]);
2382 /* Set the backplane window to include the start address */
2383 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev, address);
2385 brcmf_err("window change failed\n");
2389 /* Do the transfer(s) */
2391 brcmf_dbg(SDIO, "%s %d bytes at offset 0x%08x in window 0x%08x\n",
2392 write ? "write" : "read", dsize,
2393 sdaddr, address & SBSDIO_SBWINDOW_MASK);
2394 bcmerror = brcmf_sdcard_rwdata(bus->sdiodev, write,
2395 sdaddr, data, dsize);
2397 brcmf_err("membytes transfer failed\n");
2401 /* Adjust for next transfer (if any) */
2406 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev,
2409 brcmf_err("window change failed\n");
2413 dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
2418 /* Return the window to backplane enumeration space for core access */
2419 if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, bus->sdiodev->sbwad))
2420 brcmf_err("FAILED to set window back to 0x%x\n",
2421 bus->sdiodev->sbwad);
2423 sdio_release_host(bus->sdiodev->func[1]);
2429 #define CONSOLE_LINE_MAX 192
2431 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
2433 struct brcmf_console *c = &bus->console;
2434 u8 line[CONSOLE_LINE_MAX], ch;
2438 /* Don't do anything until FWREADY updates console address */
2439 if (bus->console_addr == 0)
2442 /* Read console log struct */
2443 addr = bus->console_addr + offsetof(struct rte_console, log_le);
2444 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log_le,
2449 /* Allocate console buffer (one time only) */
2450 if (c->buf == NULL) {
2451 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2452 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2457 idx = le32_to_cpu(c->log_le.idx);
2459 /* Protect against corrupt value */
2460 if (idx > c->bufsize)
2463 /* Skip reading the console buffer if the index pointer
2468 /* Read the console buffer */
2469 addr = le32_to_cpu(c->log_le.buf);
2470 rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
2474 while (c->last != idx) {
2475 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2476 if (c->last == idx) {
2477 /* This would output a partial line.
2479 * the buffer pointer and output this
2480 * line next time around.
2485 c->last = c->bufsize - n;
2488 ch = c->buf[c->last];
2489 c->last = (c->last + 1) % c->bufsize;
2496 if (line[n - 1] == '\r')
2499 pr_debug("CONSOLE: %s\n", line);
2508 static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2513 bus->ctrl_frame_stat = false;
2514 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2515 SDIO_FUNC_2, F2SYNC, frame, len);
2518 /* On failure, abort the command and terminate the frame */
2519 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2521 bus->sdcnt.tx_sderrs++;
2523 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2525 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2527 bus->sdcnt.f1regdata++;
2529 for (i = 0; i < 3; i++) {
2531 hi = brcmf_sdio_regrb(bus->sdiodev,
2532 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2533 lo = brcmf_sdio_regrb(bus->sdiodev,
2534 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2535 bus->sdcnt.f1regdata += 2;
2536 if (hi == 0 && lo == 0)
2542 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2548 brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2556 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2557 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2558 struct brcmf_sdio *bus = sdiodev->bus;
2559 unsigned long flags;
2561 brcmf_dbg(TRACE, "Enter\n");
2563 /* Back the pointer to make a room for bus header */
2564 frame = msg - SDPCM_HDRLEN;
2565 len = (msglen += SDPCM_HDRLEN);
2567 /* Add alignment padding (optional for ctl frames) */
2568 doff = ((unsigned long)frame % BRCMF_SDALIGN);
2573 memset(frame, 0, doff + SDPCM_HDRLEN);
2575 /* precondition: doff < BRCMF_SDALIGN */
2576 doff += SDPCM_HDRLEN;
2578 /* Round send length to next SDIO block */
2579 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2580 u16 pad = bus->blocksize - (len % bus->blocksize);
2581 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2583 } else if (len % BRCMF_SDALIGN) {
2584 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2587 /* Satisfy length-alignment requirements */
2588 if (len & (ALIGNMENT - 1))
2589 len = roundup(len, ALIGNMENT);
2591 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2593 /* Make sure backplane clock is on */
2594 sdio_claim_host(bus->sdiodev->func[1]);
2595 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2596 sdio_release_host(bus->sdiodev->func[1]);
2598 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2599 *(__le16 *) frame = cpu_to_le16((u16) msglen);
2600 *(((__le16 *) frame) + 1) = cpu_to_le16(~msglen);
2602 /* Software tag: channel, sequence number, data offset */
2604 ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
2606 | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
2607 SDPCM_DOFFSET_MASK);
2608 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2609 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2611 if (!data_ok(bus)) {
2612 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2613 bus->tx_max, bus->tx_seq);
2614 bus->ctrl_frame_stat = true;
2616 bus->ctrl_frame_buf = frame;
2617 bus->ctrl_frame_len = len;
2619 wait_event_interruptible_timeout(bus->ctrl_wait,
2620 !bus->ctrl_frame_stat,
2621 msecs_to_jiffies(2000));
2623 if (!bus->ctrl_frame_stat) {
2624 brcmf_dbg(SDIO, "ctrl_frame_stat == false\n");
2627 brcmf_dbg(SDIO, "ctrl_frame_stat == true\n");
2633 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2634 frame, len, "Tx Frame:\n");
2635 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2637 frame, min_t(u16, len, 16), "TxHdr:\n");
2640 sdio_claim_host(bus->sdiodev->func[1]);
2641 ret = brcmf_tx_frame(bus, frame, len);
2642 sdio_release_host(bus->sdiodev->func[1]);
2643 } while (ret < 0 && retries++ < TXRETRIES);
2646 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2647 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) &&
2648 list_empty(&bus->dpc_tsklst)) {
2649 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2651 bus->activity = false;
2652 sdio_claim_host(bus->sdiodev->func[1]);
2653 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2654 sdio_release_host(bus->sdiodev->func[1]);
2656 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2660 bus->sdcnt.tx_ctlerrs++;
2662 bus->sdcnt.tx_ctlpkts++;
2664 return ret ? -EIO : 0;
2668 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
2670 return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
2673 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
2674 struct sdpcm_shared *sh)
2679 struct sdpcm_shared_le sh_le;
2682 shaddr = bus->ramsize - 4;
2685 * Read last word in socram to determine
2686 * address of sdpcm_shared structure
2688 sdio_claim_host(bus->sdiodev->func[1]);
2689 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2690 rv = brcmf_sdbrcm_membytes(bus, false, shaddr,
2692 sdio_release_host(bus->sdiodev->func[1]);
2696 addr = le32_to_cpu(addr_le);
2698 brcmf_dbg(SDIO, "sdpcm_shared address 0x%08X\n", addr);
2701 * Check if addr is valid.
2702 * NVRAM length at the end of memory should have been overwritten.
2704 if (!brcmf_sdio_valid_shared_address(addr)) {
2705 brcmf_err("invalid sdpcm_shared address 0x%08X\n",
2710 /* Read hndrte_shared structure */
2711 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&sh_le,
2712 sizeof(struct sdpcm_shared_le));
2717 sh->flags = le32_to_cpu(sh_le.flags);
2718 sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
2719 sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
2720 sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
2721 sh->assert_line = le32_to_cpu(sh_le.assert_line);
2722 sh->console_addr = le32_to_cpu(sh_le.console_addr);
2723 sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
2725 if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
2726 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
2727 SDPCM_SHARED_VERSION,
2728 sh->flags & SDPCM_SHARED_VERSION_MASK);
2735 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2736 struct sdpcm_shared *sh, char __user *data,
2739 u32 addr, console_ptr, console_size, console_index;
2740 char *conbuf = NULL;
2746 /* obtain console information from device memory */
2747 addr = sh->console_addr + offsetof(struct rte_console, log_le);
2748 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2749 (u8 *)&sh_val, sizeof(u32));
2752 console_ptr = le32_to_cpu(sh_val);
2754 addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2755 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2756 (u8 *)&sh_val, sizeof(u32));
2759 console_size = le32_to_cpu(sh_val);
2761 addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2762 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2763 (u8 *)&sh_val, sizeof(u32));
2766 console_index = le32_to_cpu(sh_val);
2768 /* allocate buffer for console data */
2769 if (console_size <= CONSOLE_BUFFER_MAX)
2770 conbuf = vzalloc(console_size+1);
2775 /* obtain the console data from device */
2776 conbuf[console_size] = '\0';
2777 rv = brcmf_sdbrcm_membytes(bus, false, console_ptr, (u8 *)conbuf,
2782 rv = simple_read_from_buffer(data, count, &pos,
2783 conbuf + console_index,
2784 console_size - console_index);
2789 if (console_index > 0) {
2791 rv = simple_read_from_buffer(data+nbytes, count, &pos,
2792 conbuf, console_index - 1);
2802 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
2803 char __user *data, size_t count)
2807 struct brcmf_trap_info tr;
2810 if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2811 brcmf_dbg(INFO, "no trap in firmware\n");
2815 error = brcmf_sdbrcm_membytes(bus, false, sh->trap_addr, (u8 *)&tr,
2816 sizeof(struct brcmf_trap_info));
2820 res = scnprintf(buf, sizeof(buf),
2821 "dongle trap info: type 0x%x @ epc 0x%08x\n"
2822 " cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2823 " lr 0x%08x pc 0x%08x offset 0x%x\n"
2824 " r0 0x%08x r1 0x%08x r2 0x%08x r3 0x%08x\n"
2825 " r4 0x%08x r5 0x%08x r6 0x%08x r7 0x%08x\n",
2826 le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
2827 le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
2828 le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
2829 le32_to_cpu(tr.pc), sh->trap_addr,
2830 le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
2831 le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
2832 le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
2833 le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
2835 return simple_read_from_buffer(data, count, &pos, buf, res);
2838 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
2839 struct sdpcm_shared *sh, char __user *data,
2844 char file[80] = "?";
2845 char expr[80] = "<???>";
2849 if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
2850 brcmf_dbg(INFO, "firmware not built with -assert\n");
2852 } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
2853 brcmf_dbg(INFO, "no assert in dongle\n");
2857 sdio_claim_host(bus->sdiodev->func[1]);
2858 if (sh->assert_file_addr != 0) {
2859 error = brcmf_sdbrcm_membytes(bus, false, sh->assert_file_addr,
2864 if (sh->assert_exp_addr != 0) {
2865 error = brcmf_sdbrcm_membytes(bus, false, sh->assert_exp_addr,
2870 sdio_release_host(bus->sdiodev->func[1]);
2872 res = scnprintf(buf, sizeof(buf),
2873 "dongle assert: %s:%d: assert(%s)\n",
2874 file, sh->assert_line, expr);
2875 return simple_read_from_buffer(data, count, &pos, buf, res);
2878 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
2881 struct sdpcm_shared sh;
2883 error = brcmf_sdio_readshared(bus, &sh);
2888 if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
2889 brcmf_dbg(INFO, "firmware not built with -assert\n");
2890 else if (sh.flags & SDPCM_SHARED_ASSERT)
2891 brcmf_err("assertion in dongle\n");
2893 if (sh.flags & SDPCM_SHARED_TRAP)
2894 brcmf_err("firmware trap in dongle\n");
2899 static int brcmf_sdbrcm_died_dump(struct brcmf_sdio *bus, char __user *data,
2900 size_t count, loff_t *ppos)
2903 struct sdpcm_shared sh;
2910 error = brcmf_sdio_readshared(bus, &sh);
2914 error = brcmf_sdio_assert_info(bus, &sh, data, count);
2919 error = brcmf_sdio_trap_info(bus, &sh, data+nbytes, count);
2924 error = brcmf_sdio_dump_console(bus, &sh, data+nbytes, count);
2935 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
2936 size_t count, loff_t *ppos)
2938 struct brcmf_sdio *bus = f->private_data;
2941 res = brcmf_sdbrcm_died_dump(bus, data, count, ppos);
2944 return (ssize_t)res;
2947 static const struct file_operations brcmf_sdio_forensic_ops = {
2948 .owner = THIS_MODULE,
2949 .open = simple_open,
2950 .read = brcmf_sdio_forensic_read
2953 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
2955 struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
2956 struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
2958 if (IS_ERR_OR_NULL(dentry))
2961 debugfs_create_file("forensics", S_IRUGO, dentry, bus,
2962 &brcmf_sdio_forensic_ops);
2963 brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
2966 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
2971 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
2977 brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
2983 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2984 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2985 struct brcmf_sdio *bus = sdiodev->bus;
2987 brcmf_dbg(TRACE, "Enter\n");
2989 /* Wait until control frame is available */
2990 timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
2992 spin_lock_bh(&bus->rxctl_lock);
2994 memcpy(msg, bus->rxctl, min(msglen, rxlen));
2996 buf = bus->rxctl_orig;
2997 bus->rxctl_orig = NULL;
2999 spin_unlock_bh(&bus->rxctl_lock);
3003 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3005 } else if (timeleft == 0) {
3006 brcmf_err("resumed on timeout\n");
3007 brcmf_sdbrcm_checkdied(bus);
3008 } else if (pending) {
3009 brcmf_dbg(CTL, "cancelled\n");
3010 return -ERESTARTSYS;
3012 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3013 brcmf_sdbrcm_checkdied(bus);
3017 bus->sdcnt.rx_ctlpkts++;
3019 bus->sdcnt.rx_ctlerrs++;
3021 return rxlen ? (int)rxlen : -ETIMEDOUT;
3024 static int brcmf_sdbrcm_write_vars(struct brcmf_sdio *bus)
3031 char *nvram_ularray;
3034 /* Even if there are no vars are to be written, we still
3035 need to set the ramsize. */
3036 varaddr = (bus->ramsize - 4) - bus->varsz;
3039 /* Write the vars list */
3040 bcmerror = brcmf_sdbrcm_membytes(bus, true, varaddr,
3041 bus->vars, bus->varsz);
3043 /* Verify NVRAM bytes */
3044 brcmf_dbg(INFO, "Compare NVRAM dl & ul; varsize=%d\n",
3046 nvram_ularray = kmalloc(bus->varsz, GFP_ATOMIC);
3050 /* Upload image to verify downloaded contents. */
3051 memset(nvram_ularray, 0xaa, bus->varsz);
3053 /* Read the vars list to temp buffer for comparison */
3054 bcmerror = brcmf_sdbrcm_membytes(bus, false, varaddr,
3055 nvram_ularray, bus->varsz);
3057 brcmf_err("error %d on reading %d nvram bytes at 0x%08x\n",
3058 bcmerror, bus->varsz, varaddr);
3060 /* Compare the org NVRAM with the one read from RAM */
3061 if (memcmp(bus->vars, nvram_ularray, bus->varsz))
3062 brcmf_err("Downloaded NVRAM image is corrupted\n");
3064 brcmf_err("Download/Upload/Compare of NVRAM ok\n");
3066 kfree(nvram_ularray);
3070 /* adjust to the user specified RAM */
3071 brcmf_dbg(INFO, "Physical memory size: %d\n", bus->ramsize);
3072 brcmf_dbg(INFO, "Vars are at %d, orig varsize is %d\n",
3073 varaddr, bus->varsz);
3076 * Determine the length token:
3077 * Varsize, converted to words, in lower 16-bits, checksum
3082 varsizew_le = cpu_to_le32(0);
3084 varsizew = bus->varsz / 4;
3085 varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
3086 varsizew_le = cpu_to_le32(varsizew);
3089 brcmf_dbg(INFO, "New varsize is %d, length token=0x%08x\n",
3090 bus->varsz, varsizew);
3092 /* Write the length token to the last word */
3093 bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->ramsize - 4),
3094 (u8 *)&varsizew_le, 4);
3099 static int brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
3102 struct chip_info *ci = bus->ci;
3104 /* To enter download state, disable ARM and reset SOCRAM.
3105 * To exit download state, simply reset ARM (default is RAM boot).
3108 bus->alp_only = true;
3110 ci->coredisable(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3112 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM);
3114 /* Clear the top bit of memory */
3117 brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
3121 if (!ci->iscoreup(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM)) {
3122 brcmf_err("SOCRAM core is down after reset?\n");
3127 bcmerror = brcmf_sdbrcm_write_vars(bus);
3129 brcmf_err("no vars written to RAM\n");
3133 w_sdreg32(bus, 0xFFFFFFFF,
3134 offsetof(struct sdpcmd_regs, intstatus));
3136 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3138 /* Allow HT Clock now that the ARM is running. */
3139 bus->alp_only = false;
3141 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3147 static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_sdio *bus)
3149 if (bus->firmware->size < bus->fw_ptr + len)
3150 len = bus->firmware->size - bus->fw_ptr;
3152 memcpy(buf, &bus->firmware->data[bus->fw_ptr], len);
3157 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
3161 u8 *memblock = NULL, *memptr;
3164 brcmf_dbg(INFO, "Enter\n");
3166 ret = request_firmware(&bus->firmware, BRCMF_SDIO_FW_NAME,
3167 &bus->sdiodev->func[2]->dev);
3169 brcmf_err("Fail to request firmware %d\n", ret);
3174 memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
3175 if (memblock == NULL) {
3179 if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
3180 memptr += (BRCMF_SDALIGN -
3181 ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
3183 /* Download image */
3185 brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) {
3186 ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len);
3188 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3189 ret, MEMBLOCK, offset);
3199 release_firmware(bus->firmware);
3206 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3207 * and ending in a NUL.
3208 * Removes carriage returns, empty lines, comment lines, and converts
3210 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3214 static int brcmf_process_nvram_vars(struct brcmf_sdio *bus)
3221 uint buf_len, n, len;
3223 len = bus->firmware->size;
3224 varbuf = vmalloc(len);
3228 memcpy(varbuf, bus->firmware->data, len);
3231 findNewline = false;
3234 for (n = 0; n < len; n++) {
3237 if (varbuf[n] == '\r')
3239 if (findNewline && varbuf[n] != '\n')
3241 findNewline = false;
3242 if (varbuf[n] == '#') {
3246 if (varbuf[n] == '\n') {
3256 buf_len = dp - varbuf;
3257 while (dp < varbuf + n)
3261 /* roundup needed for download to device */
3262 bus->varsz = roundup(buf_len + 1, 4);
3263 bus->vars = kmalloc(bus->varsz, GFP_KERNEL);
3264 if (bus->vars == NULL) {
3270 /* copy the processed variables and add null termination */
3271 memcpy(bus->vars, varbuf, buf_len);
3272 bus->vars[buf_len] = 0;
3278 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
3282 ret = request_firmware(&bus->firmware, BRCMF_SDIO_NV_NAME,
3283 &bus->sdiodev->func[2]->dev);
3285 brcmf_err("Fail to request nvram %d\n", ret);
3289 ret = brcmf_process_nvram_vars(bus);
3291 release_firmware(bus->firmware);
3296 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3300 /* Keep arm in reset */
3301 if (brcmf_sdbrcm_download_state(bus, true)) {
3302 brcmf_err("error placing ARM core in reset\n");
3306 if (brcmf_sdbrcm_download_code_file(bus)) {
3307 brcmf_err("dongle image file download failed\n");
3311 if (brcmf_sdbrcm_download_nvram(bus)) {
3312 brcmf_err("dongle nvram file download failed\n");
3316 /* Take arm out of reset */
3317 if (brcmf_sdbrcm_download_state(bus, false)) {
3318 brcmf_err("error getting out of ARM core reset\n");
3329 brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3333 sdio_claim_host(bus->sdiodev->func[1]);
3335 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3337 ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3339 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3341 sdio_release_host(bus->sdiodev->func[1]);
3346 static int brcmf_sdbrcm_bus_init(struct device *dev)
3348 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3349 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3350 struct brcmf_sdio *bus = sdiodev->bus;
3351 unsigned long timeout;
3356 brcmf_dbg(TRACE, "Enter\n");
3358 /* try to download image and nvram to the dongle */
3359 if (bus_if->state == BRCMF_BUS_DOWN) {
3360 if (!(brcmf_sdbrcm_download_firmware(bus)))
3364 if (!bus->sdiodev->bus_if->drvr)
3367 /* Start the watchdog timer */
3368 bus->sdcnt.tickcnt = 0;
3369 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3371 sdio_claim_host(bus->sdiodev->func[1]);
3373 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3374 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3375 if (bus->clkstate != CLK_AVAIL)
3378 /* Force clocks on backplane to be sure F2 interrupt propagates */
3379 saveclk = brcmf_sdio_regrb(bus->sdiodev,
3380 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3382 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3383 (saveclk | SBSDIO_FORCE_HT), &err);
3386 brcmf_err("Failed to force clock for F2: err %d\n", err);
3390 /* Enable function 2 (frame transfers) */
3391 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3392 offsetof(struct sdpcmd_regs, tosbmailboxdata));
3393 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3395 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3397 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3399 while (enable != ready) {
3400 ready = brcmf_sdio_regrb(bus->sdiodev,
3401 SDIO_CCCR_IORx, NULL);
3402 if (time_after(jiffies, timeout))
3404 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3405 /* prevent busy waiting if it takes too long */
3406 msleep_interruptible(20);
3409 brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
3411 /* If F2 successfully enabled, set core and enable interrupts */
3412 if (ready == enable) {
3413 /* Set up the interrupt mask and enable interrupts */
3414 bus->hostintmask = HOSTINTMASK;
3415 w_sdreg32(bus, bus->hostintmask,
3416 offsetof(struct sdpcmd_regs, hostintmask));
3418 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3420 /* Disable F2 again */
3421 enable = SDIO_FUNC_ENABLE_1;
3422 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3426 /* Restore previous clock setting */
3427 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err);
3430 ret = brcmf_sdio_intr_register(bus->sdiodev);
3432 brcmf_err("intr register failed:%d\n", ret);
3435 /* If we didn't come up, turn off backplane clock */
3436 if (bus_if->state != BRCMF_BUS_DATA)
3437 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3440 sdio_release_host(bus->sdiodev->func[1]);
3445 void brcmf_sdbrcm_isr(void *arg)
3447 struct brcmf_sdio *bus = (struct brcmf_sdio *) arg;
3449 brcmf_dbg(TRACE, "Enter\n");
3452 brcmf_err("bus is null pointer, exiting\n");
3456 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3457 brcmf_err("bus is down. we have nothing to do\n");
3460 /* Count the interrupt call */
3461 bus->sdcnt.intrcount++;
3463 atomic_set(&bus->ipend, 1);
3465 if (brcmf_sdio_intr_rstatus(bus)) {
3466 brcmf_err("failed backplane access\n");
3467 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3470 /* Disable additional interrupts (is this needed now)? */
3472 brcmf_err("isr w/o interrupt configured!\n");
3474 brcmf_sdbrcm_adddpctsk(bus);
3475 queue_work(bus->brcmf_wq, &bus->datawork);
3478 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)
3481 struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3483 unsigned long flags;
3485 brcmf_dbg(TIMER, "Enter\n");
3487 /* Poll period: check device if appropriate. */
3488 if (bus->poll && (++bus->polltick >= bus->pollrate)) {
3491 /* Reset poll tick */
3494 /* Check device if no interrupts */
3496 (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3498 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3499 if (list_empty(&bus->dpc_tsklst)) {
3501 spin_unlock_irqrestore(&bus->dpc_tl_lock,
3503 sdio_claim_host(bus->sdiodev->func[1]);
3504 devpend = brcmf_sdio_regrb(bus->sdiodev,
3507 sdio_release_host(bus->sdiodev->func[1]);
3509 devpend & (INTR_STATUS_FUNC1 |
3512 spin_unlock_irqrestore(&bus->dpc_tl_lock,
3516 /* If there is something, make like the ISR and
3519 bus->sdcnt.pollcnt++;
3520 atomic_set(&bus->ipend, 1);
3522 brcmf_sdbrcm_adddpctsk(bus);
3523 queue_work(bus->brcmf_wq, &bus->datawork);
3527 /* Update interrupt tracking */
3528 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3531 /* Poll for console output periodically */
3532 if (bus_if && bus_if->state == BRCMF_BUS_DATA &&
3533 bus->console_interval != 0) {
3534 bus->console.count += BRCMF_WD_POLL_MS;
3535 if (bus->console.count >= bus->console_interval) {
3536 bus->console.count -= bus->console_interval;
3537 sdio_claim_host(bus->sdiodev->func[1]);
3538 /* Make sure backplane clock is on */
3539 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3540 if (brcmf_sdbrcm_readconsole(bus) < 0)
3542 bus->console_interval = 0;
3543 sdio_release_host(bus->sdiodev->func[1]);
3548 /* On idle timeout clear activity flag and/or turn off clock */
3549 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3550 if (++bus->idlecount >= bus->idletime) {
3552 if (bus->activity) {
3553 bus->activity = false;
3554 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3556 sdio_claim_host(bus->sdiodev->func[1]);
3557 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3558 sdio_release_host(bus->sdiodev->func[1]);
3563 return (atomic_read(&bus->ipend) > 0);
3566 static bool brcmf_sdbrcm_chipmatch(u16 chipid)
3568 if (chipid == BCM43241_CHIP_ID)
3570 if (chipid == BCM4329_CHIP_ID)
3572 if (chipid == BCM4330_CHIP_ID)
3574 if (chipid == BCM4334_CHIP_ID)
3579 static void brcmf_sdio_dataworker(struct work_struct *work)
3581 struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3583 struct list_head *cur_hd, *tmp_hd;
3584 unsigned long flags;
3586 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3587 list_for_each_safe(cur_hd, tmp_hd, &bus->dpc_tsklst) {
3588 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
3590 brcmf_sdbrcm_dpc(bus);
3592 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3596 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
3599 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
3601 brcmf_dbg(TRACE, "Enter\n");
3604 bus->rxctl = bus->rxbuf = NULL;
3607 kfree(bus->databuf);
3608 bus->databuf = NULL;
3611 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
3613 brcmf_dbg(TRACE, "Enter\n");
3615 if (bus->sdiodev->bus_if->maxctl) {
3617 roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3618 ALIGNMENT) + BRCMF_SDALIGN;
3619 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3624 /* Allocate buffer to receive glomed packet */
3625 bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
3626 if (!(bus->databuf)) {
3627 /* release rxbuf which was already located as above */
3633 /* Align the buffer */
3634 if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
3635 bus->dataptr = bus->databuf + (BRCMF_SDALIGN -
3636 ((unsigned long)bus->databuf % BRCMF_SDALIGN));
3638 bus->dataptr = bus->databuf;
3647 brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
3655 bus->alp_only = true;
3657 sdio_claim_host(bus->sdiodev->func[1]);
3659 pr_debug("F1 signature read @0x18000000=0x%4x\n",
3660 brcmf_sdio_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3663 * Force PLL off until brcmf_sdio_chip_attach()
3664 * programs PLL control regs
3667 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3668 BRCMF_INIT_CLKCTL1, &err);
3670 clkctl = brcmf_sdio_regrb(bus->sdiodev,
3671 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3673 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3674 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3675 err, BRCMF_INIT_CLKCTL1, clkctl);
3679 if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
3680 brcmf_err("brcmf_sdio_chip_attach failed!\n");
3684 if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
3685 brcmf_err("unsupported chip: 0x%04x\n", bus->ci->chip);
3689 brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci,
3690 SDIO_DRIVE_STRENGTH);
3692 /* Get info on the SOCRAM cores... */
3693 bus->ramsize = bus->ci->ramsize;
3694 if (!(bus->ramsize)) {
3695 brcmf_err("failed to find SOCRAM memory!\n");
3699 /* Set core control so an SDIO reset does a backplane reset */
3700 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3701 reg_addr = bus->ci->c_inf[idx].base +
3702 offsetof(struct sdpcmd_regs, corecontrol);
3703 reg_val = brcmf_sdio_regrl(bus->sdiodev, reg_addr, NULL);
3704 brcmf_sdio_regwl(bus->sdiodev, reg_addr, reg_val | CC_BPRESEN, NULL);
3706 sdio_release_host(bus->sdiodev->func[1]);
3708 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3710 /* Locate an appropriately-aligned portion of hdrbuf */
3711 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3714 /* Set the poll and/or interrupt flags */
3723 sdio_release_host(bus->sdiodev->func[1]);
3727 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
3729 brcmf_dbg(TRACE, "Enter\n");
3731 sdio_claim_host(bus->sdiodev->func[1]);
3733 /* Disable F2 to clear any intermediate frame state on the dongle */
3734 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx,
3735 SDIO_FUNC_ENABLE_1, NULL);
3737 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3738 bus->rxflow = false;
3740 /* Done with backplane-dependent accesses, can drop clock... */
3741 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3743 sdio_release_host(bus->sdiodev->func[1]);
3745 /* ...and initialize clock/power states */
3746 bus->clkstate = CLK_SDONLY;
3747 bus->idletime = BRCMF_IDLE_INTERVAL;
3748 bus->idleclock = BRCMF_IDLE_ACTIVE;
3750 /* Query the F2 block size, set roundup accordingly */
3751 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3752 bus->roundup = min(max_roundup, bus->blocksize);
3754 /* bus module does not support packet chaining */
3755 bus->use_rxchain = false;
3756 bus->sd_rxchain = false;
3762 brcmf_sdbrcm_watchdog_thread(void *data)
3764 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3766 allow_signal(SIGTERM);
3767 /* Run until signal received */
3769 if (kthread_should_stop())
3771 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3772 brcmf_sdbrcm_bus_watchdog(bus);
3773 /* Count the tick for reference */
3774 bus->sdcnt.tickcnt++;
3782 brcmf_sdbrcm_watchdog(unsigned long data)
3784 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3786 if (bus->watchdog_tsk) {
3787 complete(&bus->watchdog_wait);
3788 /* Reschedule the watchdog */
3789 if (bus->wd_timer_valid)
3790 mod_timer(&bus->timer,
3791 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3795 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
3797 brcmf_dbg(TRACE, "Enter\n");
3800 sdio_claim_host(bus->sdiodev->func[1]);
3801 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3802 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3803 sdio_release_host(bus->sdiodev->func[1]);
3804 brcmf_sdio_chip_detach(&bus->ci);
3805 if (bus->vars && bus->varsz)
3810 brcmf_dbg(TRACE, "Disconnected\n");
3813 /* Detach and free everything */
3814 static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
3816 brcmf_dbg(TRACE, "Enter\n");
3819 /* De-register interrupt handler */
3820 brcmf_sdio_intr_unregister(bus->sdiodev);
3822 cancel_work_sync(&bus->datawork);
3824 destroy_workqueue(bus->brcmf_wq);
3826 if (bus->sdiodev->bus_if->drvr) {
3827 brcmf_detach(bus->sdiodev->dev);
3828 brcmf_sdbrcm_release_dongle(bus);
3831 brcmf_sdbrcm_release_malloc(bus);
3836 brcmf_dbg(TRACE, "Disconnected\n");
3839 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
3840 .stop = brcmf_sdbrcm_bus_stop,
3841 .init = brcmf_sdbrcm_bus_init,
3842 .txdata = brcmf_sdbrcm_bus_txdata,
3843 .txctl = brcmf_sdbrcm_bus_txctl,
3844 .rxctl = brcmf_sdbrcm_bus_rxctl,
3845 .gettxq = brcmf_sdbrcm_bus_gettxq,
3848 void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
3851 struct brcmf_sdio *bus;
3852 struct brcmf_bus_dcmd *dlst;
3854 u32 dngl_txglomalign;
3857 brcmf_dbg(TRACE, "Enter\n");
3859 /* We make an assumption about address window mappings:
3860 * regsva == SI_ENUM_BASE*/
3862 /* Allocate private bus interface state */
3863 bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
3867 bus->sdiodev = sdiodev;
3869 skb_queue_head_init(&bus->glom);
3870 bus->txbound = BRCMF_TXBOUND;
3871 bus->rxbound = BRCMF_RXBOUND;
3872 bus->txminmax = BRCMF_TXMINMAX;
3873 bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
3875 INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
3876 bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
3877 if (bus->brcmf_wq == NULL) {
3878 brcmf_err("insufficient memory to create txworkqueue\n");
3882 /* attempt to attach to the dongle */
3883 if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
3884 brcmf_err("brcmf_sdbrcm_probe_attach failed\n");
3888 spin_lock_init(&bus->rxctl_lock);
3889 spin_lock_init(&bus->txqlock);
3890 init_waitqueue_head(&bus->ctrl_wait);
3891 init_waitqueue_head(&bus->dcmd_resp_wait);
3893 /* Set up the watchdog timer */
3894 init_timer(&bus->timer);
3895 bus->timer.data = (unsigned long)bus;
3896 bus->timer.function = brcmf_sdbrcm_watchdog;
3898 /* Initialize watchdog thread */
3899 init_completion(&bus->watchdog_wait);
3900 bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
3901 bus, "brcmf_watchdog");
3902 if (IS_ERR(bus->watchdog_tsk)) {
3903 pr_warn("brcmf_watchdog thread failed to start\n");
3904 bus->watchdog_tsk = NULL;
3906 /* Initialize DPC thread */
3907 INIT_LIST_HEAD(&bus->dpc_tsklst);
3908 spin_lock_init(&bus->dpc_tl_lock);
3910 /* Assign bus interface call back */
3911 bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
3912 bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
3913 bus->sdiodev->bus_if->chip = bus->ci->chip;
3914 bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
3916 /* Attach to the brcmf/OS/network interface */
3917 ret = brcmf_attach(SDPCM_RESERVE, bus->sdiodev->dev);
3919 brcmf_err("brcmf_attach failed\n");
3923 /* Allocate buffers */
3924 if (!(brcmf_sdbrcm_probe_malloc(bus))) {
3925 brcmf_err("brcmf_sdbrcm_probe_malloc failed\n");
3929 if (!(brcmf_sdbrcm_probe_init(bus))) {
3930 brcmf_err("brcmf_sdbrcm_probe_init failed\n");
3934 brcmf_sdio_debugfs_create(bus);
3935 brcmf_dbg(INFO, "completed!!\n");
3937 /* sdio bus core specific dcmd */
3938 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3939 dlst = kzalloc(sizeof(struct brcmf_bus_dcmd), GFP_KERNEL);
3941 if (bus->ci->c_inf[idx].rev < 12) {
3942 /* for sdio core rev < 12, disable txgloming */
3944 dlst->name = "bus:txglom";
3945 dlst->param = (char *)&dngl_txglom;
3946 dlst->param_len = sizeof(u32);
3948 /* otherwise, set txglomalign */
3949 dngl_txglomalign = bus->sdiodev->bus_if->align;
3950 dlst->name = "bus:txglomalign";
3951 dlst->param = (char *)&dngl_txglomalign;
3952 dlst->param_len = sizeof(u32);
3954 list_add(&dlst->list, &bus->sdiodev->bus_if->dcmd_list);
3957 /* if firmware path present try to download and bring up bus */
3958 ret = brcmf_bus_start(bus->sdiodev->dev);
3960 brcmf_err("dongle is not responding\n");
3967 brcmf_sdbrcm_release(bus);
3971 void brcmf_sdbrcm_disconnect(void *ptr)
3973 struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr;
3975 brcmf_dbg(TRACE, "Enter\n");
3978 brcmf_sdbrcm_release(bus);
3980 brcmf_dbg(TRACE, "Disconnected\n");
3984 brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
3986 /* Totally stop the timer */
3987 if (!wdtick && bus->wd_timer_valid) {
3988 del_timer_sync(&bus->timer);
3989 bus->wd_timer_valid = false;
3990 bus->save_ms = wdtick;
3994 /* don't start the wd until fw is loaded */
3995 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN)
3999 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4000 if (bus->wd_timer_valid)
4001 /* Stop timer and restart at new value */
4002 del_timer_sync(&bus->timer);
4004 /* Create timer again when watchdog period is
4005 dynamically changed or in the first instance
4007 bus->timer.expires =
4008 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4009 add_timer(&bus->timer);
4012 /* Re arm the timer, at last watchdog period */
4013 mod_timer(&bus->timer,
4014 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4017 bus->wd_timer_valid = true;
4018 bus->save_ms = wdtick;
projects / firefly-linux-kernel-4.4.55.git / blob