2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/types.h>
20 #include <linux/kernel.h>
21 #include <linux/kthread.h>
22 #include <linux/printk.h>
23 #include <linux/pci_ids.h>
24 #include <linux/netdevice.h>
25 #include <linux/interrupt.h>
26 #include <linux/sched.h>
27 #include <linux/mmc/sdio.h>
28 #include <linux/mmc/sdio_func.h>
29 #include <linux/mmc/card.h>
30 #include <linux/semaphore.h>
31 #include <linux/firmware.h>
32 #include <linux/module.h>
33 #include <linux/bcma/bcma.h>
34 #include <asm/unaligned.h>
36 #include <brcmu_wifi.h>
37 #include <brcmu_utils.h>
38 #include <brcm_hw_ids.h>
40 #include "sdio_host.h"
41 #include "sdio_chip.h"
43 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
47 #define BRCMF_TRAP_INFO_SIZE 80
49 #define CBUF_LEN (128)
52 __le32 buf; /* Can't be pointer on (64-bit) hosts */
55 char *_buf_compat; /* Redundant pointer for backward compat. */
60 * When there is no UART (e.g. Quickturn),
61 * the host should write a complete
62 * input line directly into cbuf and then write
63 * the length into vcons_in.
64 * This may also be used when there is a real UART
65 * (at risk of conflicting with
66 * the real UART). vcons_out is currently unused.
71 /* Output (logging) buffer
72 * Console output is written to a ring buffer log_buf at index log_idx.
73 * The host may read the output when it sees log_idx advance.
74 * Output will be lost if the output wraps around faster than the host
77 struct rte_log_le log_le;
79 /* Console input line buffer
80 * Characters are read one at a time into cbuf
81 * until <CR> is received, then
82 * the buffer is processed as a command line.
83 * Also used for virtual UART.
90 #include <chipcommon.h>
95 #define TXQLEN 2048 /* bulk tx queue length */
96 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
97 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
100 #define TXRETRIES 2 /* # of retries for tx frames */
102 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
105 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
108 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
110 #define MEMBLOCK 2048 /* Block size used for downloading
112 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
113 biggest possible glom */
115 #define BRCMF_FIRSTREAD (1 << 6)
118 /* SBSDIO_DEVICE_CTL */
120 /* 1: device will assert busy signal when receiving CMD53 */
121 #define SBSDIO_DEVCTL_SETBUSY 0x01
122 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
123 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
124 /* 1: mask all interrupts to host except the chipActive (rev 8) */
125 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
126 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
127 * sdio bus power cycle to clear (rev 9) */
128 #define SBSDIO_DEVCTL_PADS_ISO 0x08
129 /* Force SD->SB reset mapping (rev 11) */
130 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
131 /* Determined by CoreControl bit */
132 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
133 /* Force backplane reset */
134 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
135 /* Force no backplane reset */
136 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
138 /* direct(mapped) cis space */
140 /* MAPPED common CIS address */
141 #define SBSDIO_CIS_BASE_COMMON 0x1000
142 /* maximum bytes in one CIS */
143 #define SBSDIO_CIS_SIZE_LIMIT 0x200
144 /* cis offset addr is < 17 bits */
145 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
147 /* manfid tuple length, include tuple, link bytes */
148 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
151 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
152 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
153 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
154 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
155 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
156 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
157 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
158 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
159 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
160 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
161 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
162 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
163 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
164 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
165 #define I_PC (1 << 10) /* descriptor error */
166 #define I_PD (1 << 11) /* data error */
167 #define I_DE (1 << 12) /* Descriptor protocol Error */
168 #define I_RU (1 << 13) /* Receive descriptor Underflow */
169 #define I_RO (1 << 14) /* Receive fifo Overflow */
170 #define I_XU (1 << 15) /* Transmit fifo Underflow */
171 #define I_RI (1 << 16) /* Receive Interrupt */
172 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
173 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
174 #define I_XI (1 << 24) /* Transmit Interrupt */
175 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
176 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
177 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
178 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
179 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
180 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
181 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
182 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
183 #define I_DMA (I_RI | I_XI | I_ERRORS)
186 #define CC_CISRDY (1 << 0) /* CIS Ready */
187 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
188 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
189 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
190 #define CC_XMTDATAAVAIL_MODE (1 << 4)
191 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
194 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
195 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
196 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
197 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
200 #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
202 /* Total length of frame header for dongle protocol */
203 #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
204 #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
207 * Software allocation of To SB Mailbox resources
210 /* tosbmailbox bits corresponding to intstatus bits */
211 #define SMB_NAK (1 << 0) /* Frame NAK */
212 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
213 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
214 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
216 /* tosbmailboxdata */
217 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
220 * Software allocation of To Host Mailbox resources
224 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
225 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
226 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
227 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
229 /* tohostmailboxdata */
230 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
231 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
232 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
233 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
235 #define HMB_DATA_FCDATA_MASK 0xff000000
236 #define HMB_DATA_FCDATA_SHIFT 24
238 #define HMB_DATA_VERSION_MASK 0x00ff0000
239 #define HMB_DATA_VERSION_SHIFT 16
242 * Software-defined protocol header
245 /* Current protocol version */
246 #define SDPCM_PROT_VERSION 4
248 /* SW frame header */
249 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
251 #define SDPCM_CHANNEL_MASK 0x00000f00
252 #define SDPCM_CHANNEL_SHIFT 8
253 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
255 #define SDPCM_NEXTLEN_OFFSET 2
257 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
258 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
259 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
260 #define SDPCM_DOFFSET_MASK 0xff000000
261 #define SDPCM_DOFFSET_SHIFT 24
262 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
263 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
264 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
265 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
267 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
269 /* logical channel numbers */
270 #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
271 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
272 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
273 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
274 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
276 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
278 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
281 * Shared structure between dongle and the host.
282 * The structure contains pointers to trap or assert information.
284 #define SDPCM_SHARED_VERSION 0x0002
285 #define SDPCM_SHARED_VERSION_MASK 0x00FF
286 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
287 #define SDPCM_SHARED_ASSERT 0x0200
288 #define SDPCM_SHARED_TRAP 0x0400
290 /* Space for header read, limit for data packets */
291 #define MAX_HDR_READ (1 << 6)
292 #define MAX_RX_DATASZ 2048
294 /* Maximum milliseconds to wait for F2 to come up */
295 #define BRCMF_WAIT_F2RDY 3000
297 /* Bump up limit on waiting for HT to account for first startup;
298 * if the image is doing a CRC calculation before programming the PMU
299 * for HT availability, it could take a couple hundred ms more, so
300 * max out at a 1 second (1000000us).
302 #undef PMU_MAX_TRANSITION_DLY
303 #define PMU_MAX_TRANSITION_DLY 1000000
305 /* Value for ChipClockCSR during initial setup */
306 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
307 SBSDIO_ALP_AVAIL_REQ)
309 /* Flags for SDH calls */
310 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
312 #define BRCMF_SDIO_FW_NAME "brcm/brcmfmac-sdio.bin"
313 #define BRCMF_SDIO_NV_NAME "brcm/brcmfmac-sdio.txt"
314 MODULE_FIRMWARE(BRCMF_SDIO_FW_NAME);
315 MODULE_FIRMWARE(BRCMF_SDIO_NV_NAME);
317 #define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */
318 #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
321 #define BRCMF_IDLE_INTERVAL 1
324 * Conversion of 802.1D priority to precedence level
326 static uint prio2prec(u32 prio)
328 return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
334 u32 corecontrol; /* 0x00, rev8 */
335 u32 corestatus; /* rev8 */
337 u32 biststatus; /* rev8 */
340 u16 pcmciamesportaladdr; /* 0x010, rev8 */
342 u16 pcmciamesportalmask; /* rev8 */
344 u16 pcmciawrframebc; /* rev8 */
346 u16 pcmciaunderflowtimer; /* rev8 */
350 u32 intstatus; /* 0x020, rev8 */
351 u32 hostintmask; /* rev8 */
352 u32 intmask; /* rev8 */
353 u32 sbintstatus; /* rev8 */
354 u32 sbintmask; /* rev8 */
355 u32 funcintmask; /* rev4 */
357 u32 tosbmailbox; /* 0x040, rev8 */
358 u32 tohostmailbox; /* rev8 */
359 u32 tosbmailboxdata; /* rev8 */
360 u32 tohostmailboxdata; /* rev8 */
362 /* synchronized access to registers in SDIO clock domain */
363 u32 sdioaccess; /* 0x050, rev8 */
366 /* PCMCIA frame control */
367 u8 pcmciaframectrl; /* 0x060, rev8 */
369 u8 pcmciawatermark; /* rev8 */
372 /* interrupt batching control */
373 u32 intrcvlazy; /* 0x100, rev8 */
377 u32 cmd52rd; /* 0x110, rev8 */
378 u32 cmd52wr; /* rev8 */
379 u32 cmd53rd; /* rev8 */
380 u32 cmd53wr; /* rev8 */
381 u32 abort; /* rev8 */
382 u32 datacrcerror; /* rev8 */
383 u32 rdoutofsync; /* rev8 */
384 u32 wroutofsync; /* rev8 */
385 u32 writebusy; /* rev8 */
386 u32 readwait; /* rev8 */
387 u32 readterm; /* rev8 */
388 u32 writeterm; /* rev8 */
390 u32 clockctlstatus; /* rev8 */
393 u32 PAD[128]; /* DMA engines */
395 /* SDIO/PCMCIA CIS region */
396 char cis[512]; /* 0x400-0x5ff, rev6 */
398 /* PCMCIA function control registers */
399 char pcmciafcr[256]; /* 0x600-6ff, rev6 */
402 /* PCMCIA backplane access */
403 u16 backplanecsr; /* 0x76E, rev6 */
404 u16 backplaneaddr0; /* rev6 */
405 u16 backplaneaddr1; /* rev6 */
406 u16 backplaneaddr2; /* rev6 */
407 u16 backplaneaddr3; /* rev6 */
408 u16 backplanedata0; /* rev6 */
409 u16 backplanedata1; /* rev6 */
410 u16 backplanedata2; /* rev6 */
411 u16 backplanedata3; /* rev6 */
414 /* sprom "size" & "blank" info */
415 u16 spromstatus; /* 0x7BE, rev2 */
422 /* Device console log buffer state */
423 struct brcmf_console {
424 uint count; /* Poll interval msec counter */
425 uint log_addr; /* Log struct address (fixed) */
426 struct rte_log_le log_le; /* Log struct (host copy) */
427 uint bufsize; /* Size of log buffer */
428 u8 *buf; /* Log buffer (host copy) */
429 uint last; /* Last buffer read index */
433 struct sdpcm_shared {
437 u32 assert_file_addr;
439 u32 console_addr; /* Address of struct rte_console */
444 struct sdpcm_shared_le {
447 __le32 assert_exp_addr;
448 __le32 assert_file_addr;
450 __le32 console_addr; /* Address of struct rte_console */
451 __le32 msgtrace_addr;
456 /* misc chip info needed by some of the routines */
457 /* Private data for SDIO bus interaction */
459 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
460 struct chip_info *ci; /* Chip info struct */
461 char *vars; /* Variables (from CIS and/or other) */
462 uint varsz; /* Size of variables buffer */
464 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
466 u32 hostintmask; /* Copy of Host Interrupt Mask */
467 u32 intstatus; /* Intstatus bits (events) pending */
468 bool dpc_sched; /* Indicates DPC schedule (intrpt rcvd) */
469 bool fcstate; /* State of dongle flow-control */
471 uint blocksize; /* Block size of SDIO transfers */
472 uint roundup; /* Max roundup limit */
474 struct pktq txq; /* Queue length used for flow-control */
475 u8 flowcontrol; /* per prio flow control bitmask */
476 u8 tx_seq; /* Transmit sequence number (next) */
477 u8 tx_max; /* Maximum transmit sequence allowed */
479 u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
480 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
481 u16 nextlen; /* Next Read Len from last header */
482 u8 rx_seq; /* Receive sequence number (expected) */
483 bool rxskip; /* Skip receive (awaiting NAK ACK) */
485 uint rxbound; /* Rx frames to read before resched */
486 uint txbound; /* Tx frames to send before resched */
489 struct sk_buff *glomd; /* Packet containing glomming descriptor */
490 struct sk_buff_head glom; /* Packet list for glommed superframe */
491 uint glomerr; /* Glom packet read errors */
493 u8 *rxbuf; /* Buffer for receiving control packets */
494 uint rxblen; /* Allocated length of rxbuf */
495 u8 *rxctl; /* Aligned pointer into rxbuf */
496 u8 *databuf; /* Buffer for receiving big glom packet */
497 u8 *dataptr; /* Aligned pointer into databuf */
498 uint rxlen; /* Length of valid data in buffer */
500 u8 sdpcm_ver; /* Bus protocol reported by dongle */
502 bool intr; /* Use interrupts */
503 bool poll; /* Use polling */
504 bool ipend; /* Device interrupt is pending */
505 uint intrcount; /* Count of device interrupt callbacks */
506 uint lastintrs; /* Count as of last watchdog timer */
507 uint spurious; /* Count of spurious interrupts */
508 uint pollrate; /* Ticks between device polls */
509 uint polltick; /* Tick counter */
510 uint pollcnt; /* Count of active polls */
513 uint console_interval;
514 struct brcmf_console console; /* Console output polling support */
515 uint console_addr; /* Console address from shared struct */
518 uint regfails; /* Count of R_REG failures */
520 uint clkstate; /* State of sd and backplane clock(s) */
521 bool activity; /* Activity flag for clock down */
522 s32 idletime; /* Control for activity timeout */
523 s32 idlecount; /* Activity timeout counter */
524 s32 idleclock; /* How to set bus driver when idle */
526 bool use_rxchain; /* If brcmf should use PKT chains */
527 bool sleeping; /* Is SDIO bus sleeping? */
528 bool rxflow_mode; /* Rx flow control mode */
529 bool rxflow; /* Is rx flow control on */
530 bool alp_only; /* Don't use HT clock (ALP only) */
531 /* Field to decide if rx of control frames happen in rxbuf or lb-pool */
534 /* Some additional counters */
535 uint tx_sderrs; /* Count of tx attempts with sd errors */
536 uint fcqueued; /* Tx packets that got queued */
537 uint rxrtx; /* Count of rtx requests (NAK to dongle) */
538 uint rx_toolong; /* Receive frames too long to receive */
539 uint rxc_errors; /* SDIO errors when reading control frames */
540 uint rx_hdrfail; /* SDIO errors on header reads */
541 uint rx_badhdr; /* Bad received headers (roosync?) */
542 uint rx_badseq; /* Mismatched rx sequence number */
543 uint fc_rcvd; /* Number of flow-control events received */
544 uint fc_xoff; /* Number which turned on flow-control */
545 uint fc_xon; /* Number which turned off flow-control */
546 uint rxglomfail; /* Failed deglom attempts */
547 uint rxglomframes; /* Number of glom frames (superframes) */
548 uint rxglompkts; /* Number of packets from glom frames */
549 uint f2rxhdrs; /* Number of header reads */
550 uint f2rxdata; /* Number of frame data reads */
551 uint f2txdata; /* Number of f2 frame writes */
552 uint f1regdata; /* Number of f1 register accesses */
553 uint tickcnt; /* Number of watchdog been schedule */
554 unsigned long tx_ctlerrs; /* Err of sending ctrl frames */
555 unsigned long tx_ctlpkts; /* Ctrl frames sent to dongle */
556 unsigned long rx_ctlerrs; /* Err of processing rx ctrl frames */
557 unsigned long rx_ctlpkts; /* Ctrl frames processed from dongle */
558 unsigned long rx_readahead_cnt; /* Number of packets where header
559 * read-ahead was used. */
563 bool ctrl_frame_stat;
566 wait_queue_head_t ctrl_wait;
567 wait_queue_head_t dcmd_resp_wait;
569 struct timer_list timer;
570 struct completion watchdog_wait;
571 struct task_struct *watchdog_tsk;
575 struct task_struct *dpc_tsk;
576 struct completion dpc_wait;
577 struct list_head dpc_tsklst;
578 spinlock_t dpc_tl_lock;
580 struct semaphore sdsem;
582 const struct firmware *firmware;
585 bool txoff; /* Transmit flow-controlled */
591 #define CLK_PENDING 2 /* Not used yet */
595 static int qcount[NUMPRIO];
596 static int tx_packets[NUMPRIO];
599 #define SDIO_DRIVE_STRENGTH 6 /* in milliamps */
601 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
603 /* Retry count for register access failures */
604 static const uint retry_limit = 2;
606 /* Limit on rounding up frames */
607 static const uint max_roundup = 512;
611 static void pkt_align(struct sk_buff *p, int len, int align)
614 datalign = (unsigned long)(p->data);
615 datalign = roundup(datalign, (align)) - datalign;
617 skb_pull(p, datalign);
621 /* To check if there's window offered */
622 static bool data_ok(struct brcmf_sdio *bus)
624 return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
625 ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
629 * Reads a register in the SDIO hardware block. This block occupies a series of
630 * adresses on the 32 bit backplane bus.
633 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 reg_offset, u32 *retryvar)
635 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
638 *regvar = brcmf_sdcard_reg_read(bus->sdiodev,
639 bus->ci->c_inf[idx].base + reg_offset);
640 } while (brcmf_sdcard_regfail(bus->sdiodev) &&
641 (++(*retryvar) <= retry_limit));
643 bus->regfails += (*retryvar-1);
644 if (*retryvar > retry_limit) {
645 brcmf_dbg(ERROR, "FAILED READ %Xh\n", reg_offset);
652 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset, u32 *retryvar)
654 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
657 brcmf_sdcard_reg_write(bus->sdiodev,
658 bus->ci->c_inf[idx].base + reg_offset,
660 } while (brcmf_sdcard_regfail(bus->sdiodev) &&
661 (++(*retryvar) <= retry_limit));
663 bus->regfails += (*retryvar-1);
664 if (*retryvar > retry_limit)
665 brcmf_dbg(ERROR, "FAILED REGISTER WRITE %Xh\n",
670 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
672 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
674 /* Packet free applicable unconditionally for sdio and sdspi.
675 * Conditional if bufpool was present for gspi bus.
677 static void brcmf_sdbrcm_pktfree2(struct brcmf_sdio *bus, struct sk_buff *pkt)
680 brcmu_pkt_buf_free_skb(pkt);
683 /* Turn backplane clock on or off */
684 static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
687 u8 clkctl, clkreq, devctl;
688 unsigned long timeout;
690 brcmf_dbg(TRACE, "Enter\n");
695 /* Request HT Avail */
697 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
699 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
700 SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
702 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
706 /* Check current status */
707 clkctl = brcmf_sdio_regrb(bus->sdiodev,
708 SBSDIO_FUNC1_CHIPCLKCSR, &err);
710 brcmf_dbg(ERROR, "HT Avail read error: %d\n", err);
714 /* Go to pending and await interrupt if appropriate */
715 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
716 /* Allow only clock-available interrupt */
717 devctl = brcmf_sdio_regrb(bus->sdiodev,
718 SBSDIO_DEVICE_CTL, &err);
720 brcmf_dbg(ERROR, "Devctl error setting CA: %d\n",
725 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
726 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
727 SBSDIO_DEVICE_CTL, devctl, &err);
728 brcmf_dbg(INFO, "CLKCTL: set PENDING\n");
729 bus->clkstate = CLK_PENDING;
732 } else if (bus->clkstate == CLK_PENDING) {
733 /* Cancel CA-only interrupt filter */
734 devctl = brcmf_sdio_regrb(bus->sdiodev,
735 SBSDIO_DEVICE_CTL, &err);
736 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
737 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
738 SBSDIO_DEVICE_CTL, devctl, &err);
741 /* Otherwise, wait here (polling) for HT Avail */
743 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
744 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
745 clkctl = brcmf_sdio_regrb(bus->sdiodev,
746 SBSDIO_FUNC1_CHIPCLKCSR,
748 if (time_after(jiffies, timeout))
751 usleep_range(5000, 10000);
754 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
757 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
758 brcmf_dbg(ERROR, "HT Avail timeout (%d): clkctl 0x%02x\n",
759 PMU_MAX_TRANSITION_DLY, clkctl);
763 /* Mark clock available */
764 bus->clkstate = CLK_AVAIL;
765 brcmf_dbg(INFO, "CLKCTL: turned ON\n");
768 if (!bus->alp_only) {
769 if (SBSDIO_ALPONLY(clkctl))
770 brcmf_dbg(ERROR, "HT Clock should be on\n");
772 #endif /* defined (DEBUG) */
774 bus->activity = true;
778 if (bus->clkstate == CLK_PENDING) {
779 /* Cancel CA-only interrupt filter */
780 devctl = brcmf_sdio_regrb(bus->sdiodev,
781 SBSDIO_DEVICE_CTL, &err);
782 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
783 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
784 SBSDIO_DEVICE_CTL, devctl, &err);
787 bus->clkstate = CLK_SDONLY;
788 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
789 SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
790 brcmf_dbg(INFO, "CLKCTL: turned OFF\n");
792 brcmf_dbg(ERROR, "Failed access turning clock off: %d\n",
800 /* Change idle/active SD state */
801 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
803 brcmf_dbg(TRACE, "Enter\n");
806 bus->clkstate = CLK_SDONLY;
808 bus->clkstate = CLK_NONE;
813 /* Transition SD and backplane clock readiness */
814 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
817 uint oldstate = bus->clkstate;
820 brcmf_dbg(TRACE, "Enter\n");
822 /* Early exit if we're already there */
823 if (bus->clkstate == target) {
824 if (target == CLK_AVAIL) {
825 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
826 bus->activity = true;
833 /* Make sure SD clock is available */
834 if (bus->clkstate == CLK_NONE)
835 brcmf_sdbrcm_sdclk(bus, true);
836 /* Now request HT Avail on the backplane */
837 brcmf_sdbrcm_htclk(bus, true, pendok);
838 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
839 bus->activity = true;
843 /* Remove HT request, or bring up SD clock */
844 if (bus->clkstate == CLK_NONE)
845 brcmf_sdbrcm_sdclk(bus, true);
846 else if (bus->clkstate == CLK_AVAIL)
847 brcmf_sdbrcm_htclk(bus, false, false);
849 brcmf_dbg(ERROR, "request for %d -> %d\n",
850 bus->clkstate, target);
851 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
855 /* Make sure to remove HT request */
856 if (bus->clkstate == CLK_AVAIL)
857 brcmf_sdbrcm_htclk(bus, false, false);
858 /* Now remove the SD clock */
859 brcmf_sdbrcm_sdclk(bus, false);
860 brcmf_sdbrcm_wd_timer(bus, 0);
864 brcmf_dbg(INFO, "%d -> %d\n", oldstate, bus->clkstate);
870 static int brcmf_sdbrcm_bussleep(struct brcmf_sdio *bus, bool sleep)
874 brcmf_dbg(INFO, "request %s (currently %s)\n",
875 sleep ? "SLEEP" : "WAKE",
876 bus->sleeping ? "SLEEP" : "WAKE");
878 /* Done if we're already in the requested state */
879 if (sleep == bus->sleeping)
882 /* Going to sleep: set the alarm and turn off the lights... */
884 /* Don't sleep if something is pending */
885 if (bus->dpc_sched || bus->rxskip || pktq_len(&bus->txq))
888 /* Make sure the controller has the bus up */
889 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
891 /* Tell device to start using OOB wakeup */
892 w_sdreg32(bus, SMB_USE_OOB,
893 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
894 if (retries > retry_limit)
895 brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP, WILL NOT WAKE UP!!\n");
897 /* Turn off our contribution to the HT clock request */
898 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
900 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
901 SBSDIO_FUNC1_CHIPCLKCSR,
902 SBSDIO_FORCE_HW_CLKREQ_OFF, NULL);
904 /* Isolate the bus */
905 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
907 SBSDIO_DEVCTL_PADS_ISO, NULL);
910 bus->sleeping = true;
913 /* Waking up: bus power up is ok, set local state */
915 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
916 SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
918 /* Make sure the controller has the bus up */
919 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
921 /* Send misc interrupt to indicate OOB not needed */
922 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, tosbmailboxdata),
924 if (retries <= retry_limit)
925 w_sdreg32(bus, SMB_DEV_INT,
926 offsetof(struct sdpcmd_regs, tosbmailbox),
929 if (retries > retry_limit)
930 brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP TO CLEAR OOB!!\n");
932 /* Make sure we have SD bus access */
933 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
936 bus->sleeping = false;
942 static void bus_wake(struct brcmf_sdio *bus)
945 brcmf_sdbrcm_bussleep(bus, false);
948 static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
955 brcmf_dbg(TRACE, "Enter\n");
957 /* Read mailbox data and ack that we did so */
958 r_sdreg32(bus, &hmb_data,
959 offsetof(struct sdpcmd_regs, tohostmailboxdata), &retries);
961 if (retries <= retry_limit)
962 w_sdreg32(bus, SMB_INT_ACK,
963 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
966 /* Dongle recomposed rx frames, accept them again */
967 if (hmb_data & HMB_DATA_NAKHANDLED) {
968 brcmf_dbg(INFO, "Dongle reports NAK handled, expect rtx of %d\n",
971 brcmf_dbg(ERROR, "unexpected NAKHANDLED!\n");
974 intstatus |= I_HMB_FRAME_IND;
978 * DEVREADY does not occur with gSPI.
980 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
982 (hmb_data & HMB_DATA_VERSION_MASK) >>
983 HMB_DATA_VERSION_SHIFT;
984 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
985 brcmf_dbg(ERROR, "Version mismatch, dongle reports %d, "
987 bus->sdpcm_ver, SDPCM_PROT_VERSION);
989 brcmf_dbg(INFO, "Dongle ready, protocol version %d\n",
994 * Flow Control has been moved into the RX headers and this out of band
995 * method isn't used any more.
996 * remaining backward compatible with older dongles.
998 if (hmb_data & HMB_DATA_FC) {
999 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1000 HMB_DATA_FCDATA_SHIFT;
1002 if (fcbits & ~bus->flowcontrol)
1005 if (bus->flowcontrol & ~fcbits)
1009 bus->flowcontrol = fcbits;
1012 /* Shouldn't be any others */
1013 if (hmb_data & ~(HMB_DATA_DEVREADY |
1014 HMB_DATA_NAKHANDLED |
1017 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1018 brcmf_dbg(ERROR, "Unknown mailbox data content: 0x%02x\n",
1024 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1031 brcmf_dbg(ERROR, "%sterminate frame%s\n",
1032 abort ? "abort command, " : "",
1033 rtx ? ", send NAK" : "");
1036 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1038 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1039 SBSDIO_FUNC1_FRAMECTRL,
1043 /* Wait until the packet has been flushed (device/FIFO stable) */
1044 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1045 hi = brcmf_sdio_regrb(bus->sdiodev,
1046 SBSDIO_FUNC1_RFRAMEBCHI, NULL);
1047 lo = brcmf_sdio_regrb(bus->sdiodev,
1048 SBSDIO_FUNC1_RFRAMEBCLO, NULL);
1049 bus->f1regdata += 2;
1051 if ((hi == 0) && (lo == 0))
1054 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1055 brcmf_dbg(ERROR, "count growing: last 0x%04x now 0x%04x\n",
1056 lastrbc, (hi << 8) + lo);
1058 lastrbc = (hi << 8) + lo;
1062 brcmf_dbg(ERROR, "count never zeroed: last 0x%04x\n", lastrbc);
1064 brcmf_dbg(INFO, "flush took %d iterations\n", 0xffff - retries);
1068 w_sdreg32(bus, SMB_NAK,
1069 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
1072 if (retries <= retry_limit)
1076 /* Clear partial in any case */
1079 /* If we can't reach the device, signal failure */
1080 if (err || brcmf_sdcard_regfail(bus->sdiodev))
1081 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
1084 /* copy a buffer into a pkt buffer chain */
1085 static uint brcmf_sdbrcm_glom_from_buf(struct brcmf_sdio *bus, uint len)
1094 skb_queue_walk(&bus->glom, p) {
1095 n = min_t(uint, p->len, len);
1096 memcpy(p->data, buf, n);
1107 /* return total length of buffer chain */
1108 static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
1114 skb_queue_walk(&bus->glom, p)
1119 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
1121 struct sk_buff *cur, *next;
1123 skb_queue_walk_safe(&bus->glom, cur, next) {
1124 skb_unlink(cur, &bus->glom);
1125 brcmu_pkt_buf_free_skb(cur);
1129 static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1135 struct sk_buff *pfirst, *pnext;
1138 u8 chan, seq, doff, sfdoff;
1142 bool usechain = bus->use_rxchain;
1144 /* If packets, issue read(s) and send up packet chain */
1145 /* Return sequence numbers consumed? */
1147 brcmf_dbg(TRACE, "start: glomd %p glom %p\n",
1148 bus->glomd, skb_peek(&bus->glom));
1150 /* If there's a descriptor, generate the packet chain */
1152 pfirst = pnext = NULL;
1153 dlen = (u16) (bus->glomd->len);
1154 dptr = bus->glomd->data;
1155 if (!dlen || (dlen & 1)) {
1156 brcmf_dbg(ERROR, "bad glomd len(%d), ignore descriptor\n",
1161 for (totlen = num = 0; dlen; num++) {
1162 /* Get (and move past) next length */
1163 sublen = get_unaligned_le16(dptr);
1164 dlen -= sizeof(u16);
1165 dptr += sizeof(u16);
1166 if ((sublen < SDPCM_HDRLEN) ||
1167 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1168 brcmf_dbg(ERROR, "descriptor len %d bad: %d\n",
1173 if (sublen % BRCMF_SDALIGN) {
1174 brcmf_dbg(ERROR, "sublen %d not multiple of %d\n",
1175 sublen, BRCMF_SDALIGN);
1180 /* For last frame, adjust read len so total
1181 is a block multiple */
1184 (roundup(totlen, bus->blocksize) - totlen);
1185 totlen = roundup(totlen, bus->blocksize);
1188 /* Allocate/chain packet for next subframe */
1189 pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
1190 if (pnext == NULL) {
1191 brcmf_dbg(ERROR, "bcm_pkt_buf_get_skb failed, num %d len %d\n",
1195 skb_queue_tail(&bus->glom, pnext);
1197 /* Adhere to start alignment requirements */
1198 pkt_align(pnext, sublen, BRCMF_SDALIGN);
1201 /* If all allocations succeeded, save packet chain
1204 brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1206 if (BRCMF_GLOM_ON() && bus->nextlen &&
1207 totlen != bus->nextlen) {
1208 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1209 bus->nextlen, totlen, rxseq);
1211 pfirst = pnext = NULL;
1213 brcmf_sdbrcm_free_glom(bus);
1217 /* Done with descriptor packet */
1218 brcmu_pkt_buf_free_skb(bus->glomd);
1223 /* Ok -- either we just generated a packet chain,
1224 or had one from before */
1225 if (!skb_queue_empty(&bus->glom)) {
1226 if (BRCMF_GLOM_ON()) {
1227 brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1228 skb_queue_walk(&bus->glom, pnext) {
1229 brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
1230 pnext, (u8 *) (pnext->data),
1231 pnext->len, pnext->len);
1235 pfirst = skb_peek(&bus->glom);
1236 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1238 /* Do an SDIO read for the superframe. Configurable iovar to
1239 * read directly into the chained packet, or allocate a large
1240 * packet and and copy into the chain.
1243 errcode = brcmf_sdcard_recv_chain(bus->sdiodev,
1244 bus->sdiodev->sbwad,
1245 SDIO_FUNC_2, F2SYNC, &bus->glom);
1246 } else if (bus->dataptr) {
1247 errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
1248 bus->sdiodev->sbwad,
1249 SDIO_FUNC_2, F2SYNC,
1250 bus->dataptr, dlen);
1251 sublen = (u16) brcmf_sdbrcm_glom_from_buf(bus, dlen);
1252 if (sublen != dlen) {
1253 brcmf_dbg(ERROR, "FAILED TO COPY, dlen %d sublen %d\n",
1259 brcmf_dbg(ERROR, "COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
1265 /* On failure, kill the superframe, allow a couple retries */
1267 brcmf_dbg(ERROR, "glom read of %d bytes failed: %d\n",
1269 bus->sdiodev->bus_if->dstats.rx_errors++;
1271 if (bus->glomerr++ < 3) {
1272 brcmf_sdbrcm_rxfail(bus, true, true);
1275 brcmf_sdbrcm_rxfail(bus, true, false);
1277 brcmf_sdbrcm_free_glom(bus);
1282 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1283 pfirst->data, min_t(int, pfirst->len, 48),
1286 /* Validate the superframe header */
1287 dptr = (u8 *) (pfirst->data);
1288 sublen = get_unaligned_le16(dptr);
1289 check = get_unaligned_le16(dptr + sizeof(u16));
1291 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1292 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
1293 bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1294 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1295 brcmf_dbg(INFO, "nextlen too large (%d) seq %d\n",
1299 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1300 txmax = SDPCM_WINDOW_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1303 if ((u16)~(sublen ^ check)) {
1304 brcmf_dbg(ERROR, "(superframe): HW hdr error: len/check 0x%04x/0x%04x\n",
1307 } else if (roundup(sublen, bus->blocksize) != dlen) {
1308 brcmf_dbg(ERROR, "(superframe): len 0x%04x, rounded 0x%04x, expect 0x%04x\n",
1309 sublen, roundup(sublen, bus->blocksize),
1312 } else if (SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]) !=
1313 SDPCM_GLOM_CHANNEL) {
1314 brcmf_dbg(ERROR, "(superframe): bad channel %d\n",
1315 SDPCM_PACKET_CHANNEL(
1316 &dptr[SDPCM_FRAMETAG_LEN]));
1318 } else if (SDPCM_GLOMDESC(&dptr[SDPCM_FRAMETAG_LEN])) {
1319 brcmf_dbg(ERROR, "(superframe): got 2nd descriptor?\n");
1321 } else if ((doff < SDPCM_HDRLEN) ||
1322 (doff > (pfirst->len - SDPCM_HDRLEN))) {
1323 brcmf_dbg(ERROR, "(superframe): Bad data offset %d: HW %d pkt %d min %d\n",
1324 doff, sublen, pfirst->len, SDPCM_HDRLEN);
1328 /* Check sequence number of superframe SW header */
1330 brcmf_dbg(INFO, "(superframe) rx_seq %d, expected %d\n",
1336 /* Check window for sanity */
1337 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1338 brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
1339 txmax, bus->tx_seq);
1340 txmax = bus->tx_seq + 2;
1342 bus->tx_max = txmax;
1344 /* Remove superframe header, remember offset */
1345 skb_pull(pfirst, doff);
1349 /* Validate all the subframe headers */
1350 skb_queue_walk(&bus->glom, pnext) {
1351 /* leave when invalid subframe is found */
1355 dptr = (u8 *) (pnext->data);
1356 dlen = (u16) (pnext->len);
1357 sublen = get_unaligned_le16(dptr);
1358 check = get_unaligned_le16(dptr + sizeof(u16));
1359 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1360 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1361 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1362 dptr, 32, "subframe:\n");
1364 if ((u16)~(sublen ^ check)) {
1365 brcmf_dbg(ERROR, "(subframe %d): HW hdr error: len/check 0x%04x/0x%04x\n",
1366 num, sublen, check);
1368 } else if ((sublen > dlen) || (sublen < SDPCM_HDRLEN)) {
1369 brcmf_dbg(ERROR, "(subframe %d): length mismatch: len 0x%04x, expect 0x%04x\n",
1372 } else if ((chan != SDPCM_DATA_CHANNEL) &&
1373 (chan != SDPCM_EVENT_CHANNEL)) {
1374 brcmf_dbg(ERROR, "(subframe %d): bad channel %d\n",
1377 } else if ((doff < SDPCM_HDRLEN) || (doff > sublen)) {
1378 brcmf_dbg(ERROR, "(subframe %d): Bad data offset %d: HW %d min %d\n",
1379 num, doff, sublen, SDPCM_HDRLEN);
1382 /* increase the subframe count */
1387 /* Terminate frame on error, request
1389 if (bus->glomerr++ < 3) {
1390 /* Restore superframe header space */
1391 skb_push(pfirst, sfdoff);
1392 brcmf_sdbrcm_rxfail(bus, true, true);
1395 brcmf_sdbrcm_rxfail(bus, true, false);
1397 brcmf_sdbrcm_free_glom(bus);
1403 /* Basic SD framing looks ok - process each packet (header) */
1405 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1406 dptr = (u8 *) (pfirst->data);
1407 sublen = get_unaligned_le16(dptr);
1408 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1409 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
1410 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1412 brcmf_dbg(GLOM, "Get subframe %d, %p(%p/%d), sublen %d chan %d seq %d\n",
1413 num, pfirst, pfirst->data,
1414 pfirst->len, sublen, chan, seq);
1416 /* precondition: chan == SDPCM_DATA_CHANNEL ||
1417 chan == SDPCM_EVENT_CHANNEL */
1420 brcmf_dbg(GLOM, "rx_seq %d, expected %d\n",
1427 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1428 dptr, dlen, "Rx Subframe Data:\n");
1430 __skb_trim(pfirst, sublen);
1431 skb_pull(pfirst, doff);
1433 if (pfirst->len == 0) {
1434 skb_unlink(pfirst, &bus->glom);
1435 brcmu_pkt_buf_free_skb(pfirst);
1437 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev,
1438 &ifidx, pfirst) != 0) {
1439 brcmf_dbg(ERROR, "rx protocol error\n");
1440 bus->sdiodev->bus_if->dstats.rx_errors++;
1441 skb_unlink(pfirst, &bus->glom);
1442 brcmu_pkt_buf_free_skb(pfirst);
1446 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1448 min_t(int, pfirst->len, 32),
1449 "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1450 bus->glom.qlen, pfirst, pfirst->data,
1451 pfirst->len, pfirst->next,
1454 /* sent any remaining packets up */
1455 if (bus->glom.qlen) {
1457 brcmf_rx_frame(bus->sdiodev->dev, ifidx, &bus->glom);
1461 bus->rxglomframes++;
1462 bus->rxglompkts += bus->glom.qlen;
1467 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1470 DECLARE_WAITQUEUE(wait, current);
1471 int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1473 /* Wait until control frame is available */
1474 add_wait_queue(&bus->dcmd_resp_wait, &wait);
1475 set_current_state(TASK_INTERRUPTIBLE);
1477 while (!(*condition) && (!signal_pending(current) && timeout))
1478 timeout = schedule_timeout(timeout);
1480 if (signal_pending(current))
1483 set_current_state(TASK_RUNNING);
1484 remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1489 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
1491 if (waitqueue_active(&bus->dcmd_resp_wait))
1492 wake_up_interruptible(&bus->dcmd_resp_wait);
1497 brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1503 brcmf_dbg(TRACE, "Enter\n");
1505 /* Set rxctl for frame (w/optional alignment) */
1506 bus->rxctl = bus->rxbuf;
1507 bus->rxctl += BRCMF_FIRSTREAD;
1508 pad = ((unsigned long)bus->rxctl % BRCMF_SDALIGN);
1510 bus->rxctl += (BRCMF_SDALIGN - pad);
1511 bus->rxctl -= BRCMF_FIRSTREAD;
1513 /* Copy the already-read portion over */
1514 memcpy(bus->rxctl, hdr, BRCMF_FIRSTREAD);
1515 if (len <= BRCMF_FIRSTREAD)
1518 /* Raise rdlen to next SDIO block to avoid tail command */
1519 rdlen = len - BRCMF_FIRSTREAD;
1520 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1521 pad = bus->blocksize - (rdlen % bus->blocksize);
1522 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1523 ((len + pad) < bus->sdiodev->bus_if->maxctl))
1525 } else if (rdlen % BRCMF_SDALIGN) {
1526 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1529 /* Satisfy length-alignment requirements */
1530 if (rdlen & (ALIGNMENT - 1))
1531 rdlen = roundup(rdlen, ALIGNMENT);
1533 /* Drop if the read is too big or it exceeds our maximum */
1534 if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1535 brcmf_dbg(ERROR, "%d-byte control read exceeds %d-byte buffer\n",
1536 rdlen, bus->sdiodev->bus_if->maxctl);
1537 bus->sdiodev->bus_if->dstats.rx_errors++;
1538 brcmf_sdbrcm_rxfail(bus, false, false);
1542 if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1543 brcmf_dbg(ERROR, "%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1544 len, len - doff, bus->sdiodev->bus_if->maxctl);
1545 bus->sdiodev->bus_if->dstats.rx_errors++;
1547 brcmf_sdbrcm_rxfail(bus, false, false);
1551 /* Read remainder of frame body into the rxctl buffer */
1552 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1553 bus->sdiodev->sbwad,
1555 F2SYNC, (bus->rxctl + BRCMF_FIRSTREAD), rdlen);
1558 /* Control frame failures need retransmission */
1560 brcmf_dbg(ERROR, "read %d control bytes failed: %d\n",
1563 brcmf_sdbrcm_rxfail(bus, true, true);
1569 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1570 bus->rxctl, len, "RxCtrl:\n");
1572 /* Point to valid data and indicate its length */
1574 bus->rxlen = len - doff;
1577 /* Awake any waiters */
1578 brcmf_sdbrcm_dcmd_resp_wake(bus);
1581 /* Pad read to blocksize for efficiency */
1582 static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1584 if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1585 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1586 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1587 *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1589 } else if (*rdlen % BRCMF_SDALIGN) {
1590 *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN);
1595 brcmf_alloc_pkt_and_read(struct brcmf_sdio *bus, u16 rdlen,
1596 struct sk_buff **pkt, u8 **rxbuf)
1598 int sdret; /* Return code from calls */
1600 *pkt = brcmu_pkt_buf_get_skb(rdlen + BRCMF_SDALIGN);
1604 pkt_align(*pkt, rdlen, BRCMF_SDALIGN);
1605 *rxbuf = (u8 *) ((*pkt)->data);
1606 /* Read the entire frame */
1607 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1608 SDIO_FUNC_2, F2SYNC, *pkt);
1612 brcmf_dbg(ERROR, "(nextlen): read %d bytes failed: %d\n",
1614 brcmu_pkt_buf_free_skb(*pkt);
1615 bus->sdiodev->bus_if->dstats.rx_errors++;
1616 /* Force retry w/normal header read.
1617 * Don't attempt NAK for
1620 brcmf_sdbrcm_rxfail(bus, true, true);
1625 /* Checks the header */
1627 brcmf_check_rxbuf(struct brcmf_sdio *bus, struct sk_buff *pkt, u8 *rxbuf,
1628 u8 rxseq, u16 nextlen, u16 *len)
1631 bool len_consistent; /* Result of comparing readahead len and
1634 memcpy(bus->rxhdr, rxbuf, SDPCM_HDRLEN);
1636 /* Extract hardware header fields */
1637 *len = get_unaligned_le16(bus->rxhdr);
1638 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
1640 /* All zeros means readahead info was bad */
1641 if (!(*len | check)) {
1642 brcmf_dbg(INFO, "(nextlen): read zeros in HW header???\n");
1646 /* Validate check bytes */
1647 if ((u16)~(*len ^ check)) {
1648 brcmf_dbg(ERROR, "(nextlen): HW hdr error: nextlen/len/check 0x%04x/0x%04x/0x%04x\n",
1649 nextlen, *len, check);
1651 brcmf_sdbrcm_rxfail(bus, false, false);
1655 /* Validate frame length */
1656 if (*len < SDPCM_HDRLEN) {
1657 brcmf_dbg(ERROR, "(nextlen): HW hdr length invalid: %d\n",
1662 /* Check for consistency with readahead info */
1663 len_consistent = (nextlen != (roundup(*len, 16) >> 4));
1664 if (len_consistent) {
1665 /* Mismatch, force retry w/normal
1666 header (may be >4K) */
1667 brcmf_dbg(ERROR, "(nextlen): mismatch, nextlen %d len %d rnd %d; expected rxseq %d\n",
1668 nextlen, *len, roundup(*len, 16),
1670 brcmf_sdbrcm_rxfail(bus, true, true);
1677 brcmf_sdbrcm_pktfree2(bus, pkt);
1681 /* Return true if there may be more frames to read */
1683 brcmf_sdbrcm_readframes(struct brcmf_sdio *bus, uint maxframes, bool *finished)
1685 u16 len, check; /* Extracted hardware header fields */
1686 u8 chan, seq, doff; /* Extracted software header fields */
1687 u8 fcbits; /* Extracted fcbits from software header */
1689 struct sk_buff *pkt; /* Packet for event or data frames */
1690 u16 pad; /* Number of pad bytes to read */
1691 u16 rdlen; /* Total number of bytes to read */
1692 u8 rxseq; /* Next sequence number to expect */
1693 uint rxleft = 0; /* Remaining number of frames allowed */
1694 int sdret; /* Return code from calls */
1695 u8 txmax; /* Maximum tx sequence offered */
1698 uint rxcount = 0; /* Total frames read */
1700 brcmf_dbg(TRACE, "Enter\n");
1702 /* Not finished unless we encounter no more frames indication */
1705 for (rxseq = bus->rx_seq, rxleft = maxframes;
1706 !bus->rxskip && rxleft &&
1707 bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1708 rxseq++, rxleft--) {
1710 /* Handle glomming separately */
1711 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1713 brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1714 bus->glomd, skb_peek(&bus->glom));
1715 cnt = brcmf_sdbrcm_rxglom(bus, rxseq);
1716 brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1718 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1722 /* Try doing single read if we can */
1724 u16 nextlen = bus->nextlen;
1727 rdlen = len = nextlen << 4;
1728 brcmf_pad(bus, &pad, &rdlen);
1731 * After the frame is received we have to
1732 * distinguish whether it is data
1733 * or non-data frame.
1735 brcmf_alloc_pkt_and_read(bus, rdlen, &pkt, &rxbuf);
1737 /* Give up on data, request rtx of events */
1738 brcmf_dbg(ERROR, "(nextlen): brcmf_alloc_pkt_and_read failed: len %d rdlen %d expected rxseq %d\n",
1743 if (brcmf_check_rxbuf(bus, pkt, rxbuf, rxseq, nextlen,
1747 /* Extract software header fields */
1748 chan = SDPCM_PACKET_CHANNEL(
1749 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1750 seq = SDPCM_PACKET_SEQUENCE(
1751 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1752 doff = SDPCM_DOFFSET_VALUE(
1753 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1754 txmax = SDPCM_WINDOW_VALUE(
1755 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1758 bus->rxhdr[SDPCM_FRAMETAG_LEN +
1759 SDPCM_NEXTLEN_OFFSET];
1760 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1761 brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1766 bus->rx_readahead_cnt++;
1768 /* Handle Flow Control */
1769 fcbits = SDPCM_FCMASK_VALUE(
1770 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1772 if (bus->flowcontrol != fcbits) {
1773 if (~bus->flowcontrol & fcbits)
1776 if (bus->flowcontrol & ~fcbits)
1780 bus->flowcontrol = fcbits;
1783 /* Check and update sequence number */
1785 brcmf_dbg(INFO, "(nextlen): rx_seq %d, expected %d\n",
1791 /* Check window for sanity */
1792 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1793 brcmf_dbg(ERROR, "got unlikely tx max %d with tx_seq %d\n",
1794 txmax, bus->tx_seq);
1795 txmax = bus->tx_seq + 2;
1797 bus->tx_max = txmax;
1799 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1800 rxbuf, len, "Rx Data:\n");
1801 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1804 bus->rxhdr, SDPCM_HDRLEN,
1807 if (chan == SDPCM_CONTROL_CHANNEL) {
1808 brcmf_dbg(ERROR, "(nextlen): readahead on control packet %d?\n",
1810 /* Force retry w/normal header read */
1812 brcmf_sdbrcm_rxfail(bus, false, true);
1813 brcmf_sdbrcm_pktfree2(bus, pkt);
1817 /* Validate data offset */
1818 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
1819 brcmf_dbg(ERROR, "(nextlen): bad data offset %d: HW len %d min %d\n",
1820 doff, len, SDPCM_HDRLEN);
1821 brcmf_sdbrcm_rxfail(bus, false, false);
1822 brcmf_sdbrcm_pktfree2(bus, pkt);
1826 /* All done with this one -- now deliver the packet */
1830 /* Read frame header (hardware and software) */
1831 sdret = brcmf_sdcard_recv_buf(bus->sdiodev, bus->sdiodev->sbwad,
1832 SDIO_FUNC_2, F2SYNC, bus->rxhdr,
1837 brcmf_dbg(ERROR, "RXHEADER FAILED: %d\n", sdret);
1839 brcmf_sdbrcm_rxfail(bus, true, true);
1842 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1843 bus->rxhdr, SDPCM_HDRLEN, "RxHdr:\n");
1846 /* Extract hardware header fields */
1847 len = get_unaligned_le16(bus->rxhdr);
1848 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
1850 /* All zeros means no more frames */
1851 if (!(len | check)) {
1856 /* Validate check bytes */
1857 if ((u16) ~(len ^ check)) {
1858 brcmf_dbg(ERROR, "HW hdr err: len/check 0x%04x/0x%04x\n",
1861 brcmf_sdbrcm_rxfail(bus, false, false);
1865 /* Validate frame length */
1866 if (len < SDPCM_HDRLEN) {
1867 brcmf_dbg(ERROR, "HW hdr length invalid: %d\n", len);
1871 /* Extract software header fields */
1872 chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1873 seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1874 doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1875 txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1877 /* Validate data offset */
1878 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
1879 brcmf_dbg(ERROR, "Bad data offset %d: HW len %d, min %d seq %d\n",
1880 doff, len, SDPCM_HDRLEN, seq);
1882 brcmf_sdbrcm_rxfail(bus, false, false);
1886 /* Save the readahead length if there is one */
1888 bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1889 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1890 brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1895 /* Handle Flow Control */
1896 fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1898 if (bus->flowcontrol != fcbits) {
1899 if (~bus->flowcontrol & fcbits)
1902 if (bus->flowcontrol & ~fcbits)
1906 bus->flowcontrol = fcbits;
1909 /* Check and update sequence number */
1911 brcmf_dbg(INFO, "rx_seq %d, expected %d\n", seq, rxseq);
1916 /* Check window for sanity */
1917 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1918 brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
1919 txmax, bus->tx_seq);
1920 txmax = bus->tx_seq + 2;
1922 bus->tx_max = txmax;
1924 /* Call a separate function for control frames */
1925 if (chan == SDPCM_CONTROL_CHANNEL) {
1926 brcmf_sdbrcm_read_control(bus, bus->rxhdr, len, doff);
1930 /* precondition: chan is either SDPCM_DATA_CHANNEL,
1931 SDPCM_EVENT_CHANNEL, SDPCM_TEST_CHANNEL or
1932 SDPCM_GLOM_CHANNEL */
1934 /* Length to read */
1935 rdlen = (len > BRCMF_FIRSTREAD) ? (len - BRCMF_FIRSTREAD) : 0;
1937 /* May pad read to blocksize for efficiency */
1938 if (bus->roundup && bus->blocksize &&
1939 (rdlen > bus->blocksize)) {
1940 pad = bus->blocksize - (rdlen % bus->blocksize);
1941 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1942 ((rdlen + pad + BRCMF_FIRSTREAD) < MAX_RX_DATASZ))
1944 } else if (rdlen % BRCMF_SDALIGN) {
1945 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1948 /* Satisfy length-alignment requirements */
1949 if (rdlen & (ALIGNMENT - 1))
1950 rdlen = roundup(rdlen, ALIGNMENT);
1952 if ((rdlen + BRCMF_FIRSTREAD) > MAX_RX_DATASZ) {
1953 /* Too long -- skip this frame */
1954 brcmf_dbg(ERROR, "too long: len %d rdlen %d\n",
1956 bus->sdiodev->bus_if->dstats.rx_errors++;
1958 brcmf_sdbrcm_rxfail(bus, false, false);
1962 pkt = brcmu_pkt_buf_get_skb(rdlen +
1963 BRCMF_FIRSTREAD + BRCMF_SDALIGN);
1965 /* Give up on data, request rtx of events */
1966 brcmf_dbg(ERROR, "brcmu_pkt_buf_get_skb failed: rdlen %d chan %d\n",
1968 bus->sdiodev->bus_if->dstats.rx_dropped++;
1969 brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan));
1973 /* Leave room for what we already read, and align remainder */
1974 skb_pull(pkt, BRCMF_FIRSTREAD);
1975 pkt_align(pkt, rdlen, BRCMF_SDALIGN);
1977 /* Read the remaining frame data */
1978 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1979 SDIO_FUNC_2, F2SYNC, pkt);
1983 brcmf_dbg(ERROR, "read %d %s bytes failed: %d\n", rdlen,
1984 ((chan == SDPCM_EVENT_CHANNEL) ? "event"
1985 : ((chan == SDPCM_DATA_CHANNEL) ? "data"
1987 brcmu_pkt_buf_free_skb(pkt);
1988 bus->sdiodev->bus_if->dstats.rx_errors++;
1989 brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan));
1993 /* Copy the already-read portion */
1994 skb_push(pkt, BRCMF_FIRSTREAD);
1995 memcpy(pkt->data, bus->rxhdr, BRCMF_FIRSTREAD);
1997 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1998 pkt->data, len, "Rx Data:\n");
2001 /* Save superframe descriptor and allocate packet frame */
2002 if (chan == SDPCM_GLOM_CHANNEL) {
2003 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
2004 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
2006 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
2009 __skb_trim(pkt, len);
2010 skb_pull(pkt, SDPCM_HDRLEN);
2013 brcmf_dbg(ERROR, "%s: glom superframe w/o "
2014 "descriptor!\n", __func__);
2015 brcmf_sdbrcm_rxfail(bus, false, false);
2020 /* Fill in packet len and prio, deliver upward */
2021 __skb_trim(pkt, len);
2022 skb_pull(pkt, doff);
2024 if (pkt->len == 0) {
2025 brcmu_pkt_buf_free_skb(pkt);
2027 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev, &ifidx,
2029 brcmf_dbg(ERROR, "rx protocol error\n");
2030 brcmu_pkt_buf_free_skb(pkt);
2031 bus->sdiodev->bus_if->dstats.rx_errors++;
2035 /* Unlock during rx call */
2037 brcmf_rx_packet(bus->sdiodev->dev, ifidx, pkt);
2040 rxcount = maxframes - rxleft;
2041 /* Message if we hit the limit */
2043 brcmf_dbg(DATA, "hit rx limit of %d frames\n",
2046 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2047 /* Back off rxseq if awaiting rtx, update rx_seq */
2050 bus->rx_seq = rxseq;
2056 brcmf_sdbrcm_wait_for_event(struct brcmf_sdio *bus, bool *lockvar)
2059 wait_event_interruptible_timeout(bus->ctrl_wait, !*lockvar, HZ * 2);
2065 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
2067 if (waitqueue_active(&bus->ctrl_wait))
2068 wake_up_interruptible(&bus->ctrl_wait);
2072 /* Writes a HW/SW header into the packet and sends it. */
2073 /* Assumes: (a) header space already there, (b) caller holds lock */
2074 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt,
2075 uint chan, bool free_pkt)
2081 struct sk_buff *new;
2084 brcmf_dbg(TRACE, "Enter\n");
2086 frame = (u8 *) (pkt->data);
2088 /* Add alignment padding, allocate new packet if needed */
2089 pad = ((unsigned long)frame % BRCMF_SDALIGN);
2091 if (skb_headroom(pkt) < pad) {
2092 brcmf_dbg(INFO, "insufficient headroom %d for %d pad\n",
2093 skb_headroom(pkt), pad);
2094 bus->sdiodev->bus_if->tx_realloc++;
2095 new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN);
2097 brcmf_dbg(ERROR, "couldn't allocate new %d-byte packet\n",
2098 pkt->len + BRCMF_SDALIGN);
2103 pkt_align(new, pkt->len, BRCMF_SDALIGN);
2104 memcpy(new->data, pkt->data, pkt->len);
2106 brcmu_pkt_buf_free_skb(pkt);
2107 /* free the pkt if canned one is not used */
2110 frame = (u8 *) (pkt->data);
2111 /* precondition: (frame % BRCMF_SDALIGN) == 0) */
2115 frame = (u8 *) (pkt->data);
2116 /* precondition: pad + SDPCM_HDRLEN <= pkt->len */
2117 memset(frame, 0, pad + SDPCM_HDRLEN);
2120 /* precondition: pad < BRCMF_SDALIGN */
2122 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2123 len = (u16) (pkt->len);
2124 *(__le16 *) frame = cpu_to_le16(len);
2125 *(((__le16 *) frame) + 1) = cpu_to_le16(~len);
2127 /* Software tag: channel, sequence number, data offset */
2129 ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
2131 SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
2133 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2134 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2137 tx_packets[pkt->priority]++;
2140 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() &&
2141 ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2142 (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)),
2143 frame, len, "Tx Frame:\n");
2144 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
2146 chan == SDPCM_CONTROL_CHANNEL) ||
2148 chan != SDPCM_CONTROL_CHANNEL))) &&
2150 frame, min_t(u16, len, 16), "TxHdr:\n");
2152 /* Raise len to next SDIO block to eliminate tail command */
2153 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2154 u16 pad = bus->blocksize - (len % bus->blocksize);
2155 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2157 } else if (len % BRCMF_SDALIGN) {
2158 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2161 /* Some controllers have trouble with odd bytes -- round to even */
2162 if (len & (ALIGNMENT - 1))
2163 len = roundup(len, ALIGNMENT);
2165 ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
2166 SDIO_FUNC_2, F2SYNC, pkt);
2170 /* On failure, abort the command and terminate the frame */
2171 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2175 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2176 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2177 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
2181 for (i = 0; i < 3; i++) {
2183 hi = brcmf_sdio_regrb(bus->sdiodev,
2184 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2185 lo = brcmf_sdio_regrb(bus->sdiodev,
2186 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2187 bus->f1regdata += 2;
2188 if ((hi == 0) && (lo == 0))
2194 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2197 /* restore pkt buffer pointer before calling tx complete routine */
2198 skb_pull(pkt, SDPCM_HDRLEN + pad);
2200 brcmf_txcomplete(bus->sdiodev->dev, pkt, ret != 0);
2204 brcmu_pkt_buf_free_skb(pkt);
2209 static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2211 struct sk_buff *pkt;
2214 int ret = 0, prec_out;
2219 brcmf_dbg(TRACE, "Enter\n");
2221 tx_prec_map = ~bus->flowcontrol;
2223 /* Send frames until the limit or some other event */
2224 for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) {
2225 spin_lock_bh(&bus->txqlock);
2226 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
2228 spin_unlock_bh(&bus->txqlock);
2231 spin_unlock_bh(&bus->txqlock);
2232 datalen = pkt->len - SDPCM_HDRLEN;
2234 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
2236 bus->sdiodev->bus_if->dstats.tx_errors++;
2238 bus->sdiodev->bus_if->dstats.tx_bytes += datalen;
2240 /* In poll mode, need to check for other events */
2241 if (!bus->intr && cnt) {
2242 /* Check device status, signal pending interrupt */
2243 r_sdreg32(bus, &intstatus,
2244 offsetof(struct sdpcmd_regs, intstatus),
2247 if (brcmf_sdcard_regfail(bus->sdiodev))
2249 if (intstatus & bus->hostintmask)
2254 /* Deflow-control stack if needed */
2255 if (bus->sdiodev->bus_if->drvr_up &&
2256 (bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2257 bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2259 brcmf_txflowcontrol(bus->sdiodev->dev, 0, OFF);
2265 static void brcmf_sdbrcm_bus_stop(struct device *dev)
2267 u32 local_hostintmask;
2271 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2272 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2273 struct brcmf_sdio *bus = sdiodev->bus;
2275 brcmf_dbg(TRACE, "Enter\n");
2277 if (bus->watchdog_tsk) {
2278 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2279 kthread_stop(bus->watchdog_tsk);
2280 bus->watchdog_tsk = NULL;
2283 if (bus->dpc_tsk && bus->dpc_tsk != current) {
2284 send_sig(SIGTERM, bus->dpc_tsk, 1);
2285 kthread_stop(bus->dpc_tsk);
2286 bus->dpc_tsk = NULL;
2293 /* Enable clock for device interrupts */
2294 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2296 /* Disable and clear interrupts at the chip level also */
2297 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask), &retries);
2298 local_hostintmask = bus->hostintmask;
2299 bus->hostintmask = 0;
2301 /* Change our idea of bus state */
2302 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2304 /* Force clocks on backplane to be sure F2 interrupt propagates */
2305 saveclk = brcmf_sdio_regrb(bus->sdiodev,
2306 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2308 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2309 SBSDIO_FUNC1_CHIPCLKCSR,
2310 (saveclk | SBSDIO_FORCE_HT), &err);
2313 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
2315 /* Turn off the bus (F2), free any pending packets */
2316 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2317 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
2318 SDIO_FUNC_ENABLE_1, NULL);
2320 /* Clear any pending interrupts now that F2 is disabled */
2321 w_sdreg32(bus, local_hostintmask,
2322 offsetof(struct sdpcmd_regs, intstatus), &retries);
2324 /* Turn off the backplane clock (only) */
2325 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
2327 /* Clear the data packet queues */
2328 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2330 /* Clear any held glomming stuff */
2332 brcmu_pkt_buf_free_skb(bus->glomd);
2333 brcmf_sdbrcm_free_glom(bus);
2335 /* Clear rx control and wake any waiters */
2337 brcmf_sdbrcm_dcmd_resp_wake(bus);
2339 /* Reset some F2 state stuff */
2340 bus->rxskip = false;
2341 bus->tx_seq = bus->rx_seq = 0;
2346 #ifdef CONFIG_BRCMFMAC_SDIO_OOB
2347 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2349 unsigned long flags;
2351 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2352 if (!bus->sdiodev->irq_en && !bus->ipend) {
2353 enable_irq(bus->sdiodev->irq);
2354 bus->sdiodev->irq_en = true;
2356 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2359 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2362 #endif /* CONFIG_BRCMFMAC_SDIO_OOB */
2364 static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
2366 u32 intstatus, newstatus = 0;
2368 uint rxlimit = bus->rxbound; /* Rx frames to read before resched */
2369 uint txlimit = bus->txbound; /* Tx frames to send before resched */
2370 uint framecnt = 0; /* Temporary counter of tx/rx frames */
2371 bool rxdone = true; /* Flag for no more read data */
2372 bool resched = false; /* Flag indicating resched wanted */
2374 brcmf_dbg(TRACE, "Enter\n");
2376 /* Start with leftover status bits */
2377 intstatus = bus->intstatus;
2381 /* If waiting for HTAVAIL, check status */
2382 if (bus->clkstate == CLK_PENDING) {
2384 u8 clkctl, devctl = 0;
2387 /* Check for inconsistent device control */
2388 devctl = brcmf_sdio_regrb(bus->sdiodev,
2389 SBSDIO_DEVICE_CTL, &err);
2391 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n", err);
2392 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2396 /* Read CSR, if clock on switch to AVAIL, else ignore */
2397 clkctl = brcmf_sdio_regrb(bus->sdiodev,
2398 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2400 brcmf_dbg(ERROR, "error reading CSR: %d\n",
2402 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2405 brcmf_dbg(INFO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2408 if (SBSDIO_HTAV(clkctl)) {
2409 devctl = brcmf_sdio_regrb(bus->sdiodev,
2410 SBSDIO_DEVICE_CTL, &err);
2412 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n",
2414 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2416 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2417 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2418 SBSDIO_DEVICE_CTL, devctl, &err);
2420 brcmf_dbg(ERROR, "error writing DEVCTL: %d\n",
2422 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2424 bus->clkstate = CLK_AVAIL;
2432 /* Make sure backplane clock is on */
2433 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
2434 if (bus->clkstate == CLK_PENDING)
2437 /* Pending interrupt indicates new device status */
2440 r_sdreg32(bus, &newstatus,
2441 offsetof(struct sdpcmd_regs, intstatus), &retries);
2443 if (brcmf_sdcard_regfail(bus->sdiodev))
2445 newstatus &= bus->hostintmask;
2446 bus->fcstate = !!(newstatus & I_HMB_FC_STATE);
2448 w_sdreg32(bus, newstatus,
2449 offsetof(struct sdpcmd_regs, intstatus),
2455 /* Merge new bits with previous */
2456 intstatus |= newstatus;
2459 /* Handle flow-control change: read new state in case our ack
2460 * crossed another change interrupt. If change still set, assume
2461 * FC ON for safety, let next loop through do the debounce.
2463 if (intstatus & I_HMB_FC_CHANGE) {
2464 intstatus &= ~I_HMB_FC_CHANGE;
2465 w_sdreg32(bus, I_HMB_FC_CHANGE,
2466 offsetof(struct sdpcmd_regs, intstatus), &retries);
2468 r_sdreg32(bus, &newstatus,
2469 offsetof(struct sdpcmd_regs, intstatus), &retries);
2470 bus->f1regdata += 2;
2472 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE));
2473 intstatus |= (newstatus & bus->hostintmask);
2476 /* Handle host mailbox indication */
2477 if (intstatus & I_HMB_HOST_INT) {
2478 intstatus &= ~I_HMB_HOST_INT;
2479 intstatus |= brcmf_sdbrcm_hostmail(bus);
2482 /* Generally don't ask for these, can get CRC errors... */
2483 if (intstatus & I_WR_OOSYNC) {
2484 brcmf_dbg(ERROR, "Dongle reports WR_OOSYNC\n");
2485 intstatus &= ~I_WR_OOSYNC;
2488 if (intstatus & I_RD_OOSYNC) {
2489 brcmf_dbg(ERROR, "Dongle reports RD_OOSYNC\n");
2490 intstatus &= ~I_RD_OOSYNC;
2493 if (intstatus & I_SBINT) {
2494 brcmf_dbg(ERROR, "Dongle reports SBINT\n");
2495 intstatus &= ~I_SBINT;
2498 /* Would be active due to wake-wlan in gSPI */
2499 if (intstatus & I_CHIPACTIVE) {
2500 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2501 intstatus &= ~I_CHIPACTIVE;
2504 /* Ignore frame indications if rxskip is set */
2506 intstatus &= ~I_HMB_FRAME_IND;
2508 /* On frame indication, read available frames */
2509 if (PKT_AVAILABLE()) {
2510 framecnt = brcmf_sdbrcm_readframes(bus, rxlimit, &rxdone);
2511 if (rxdone || bus->rxskip)
2512 intstatus &= ~I_HMB_FRAME_IND;
2513 rxlimit -= min(framecnt, rxlimit);
2516 /* Keep still-pending events for next scheduling */
2517 bus->intstatus = intstatus;
2520 brcmf_sdbrcm_clrintr(bus);
2522 if (data_ok(bus) && bus->ctrl_frame_stat &&
2523 (bus->clkstate == CLK_AVAIL)) {
2526 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2527 SDIO_FUNC_2, F2SYNC, (u8 *) bus->ctrl_frame_buf,
2528 (u32) bus->ctrl_frame_len);
2531 /* On failure, abort the command and
2532 terminate the frame */
2533 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2537 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2539 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2540 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
2544 for (i = 0; i < 3; i++) {
2546 hi = brcmf_sdio_regrb(bus->sdiodev,
2547 SBSDIO_FUNC1_WFRAMEBCHI,
2549 lo = brcmf_sdio_regrb(bus->sdiodev,
2550 SBSDIO_FUNC1_WFRAMEBCLO,
2552 bus->f1regdata += 2;
2553 if ((hi == 0) && (lo == 0))
2559 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2561 brcmf_dbg(INFO, "Return_dpc value is : %d\n", ret);
2562 bus->ctrl_frame_stat = false;
2563 brcmf_sdbrcm_wait_event_wakeup(bus);
2565 /* Send queued frames (limit 1 if rx may still be pending) */
2566 else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate &&
2567 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2569 framecnt = rxdone ? txlimit : min(txlimit, bus->txminmax);
2570 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2571 txlimit -= framecnt;
2574 /* Resched if events or tx frames are pending,
2575 else await next interrupt */
2576 /* On failed register access, all bets are off:
2577 no resched or interrupts */
2578 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) ||
2579 brcmf_sdcard_regfail(bus->sdiodev)) {
2580 brcmf_dbg(ERROR, "failed backplane access over SDIO, halting operation %d\n",
2581 brcmf_sdcard_regfail(bus->sdiodev));
2582 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2584 } else if (bus->clkstate == CLK_PENDING) {
2585 brcmf_dbg(INFO, "rescheduled due to CLK_PENDING awaiting I_CHIPACTIVE interrupt\n");
2587 } else if (bus->intstatus || bus->ipend ||
2588 (!bus->fcstate && brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol)
2589 && data_ok(bus)) || PKT_AVAILABLE()) {
2593 bus->dpc_sched = resched;
2595 /* If we're done for now, turn off clock request. */
2596 if ((bus->clkstate != CLK_PENDING)
2597 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2598 bus->activity = false;
2599 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
2607 static inline void brcmf_sdbrcm_adddpctsk(struct brcmf_sdio *bus)
2609 struct list_head *new_hd;
2610 unsigned long flags;
2613 new_hd = kzalloc(sizeof(struct list_head), GFP_ATOMIC);
2615 new_hd = kzalloc(sizeof(struct list_head), GFP_KERNEL);
2619 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2620 list_add_tail(new_hd, &bus->dpc_tsklst);
2621 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2624 static int brcmf_sdbrcm_dpc_thread(void *data)
2626 struct brcmf_sdio *bus = (struct brcmf_sdio *) data;
2627 struct list_head *cur_hd, *tmp_hd;
2628 unsigned long flags;
2630 allow_signal(SIGTERM);
2631 /* Run until signal received */
2633 if (kthread_should_stop())
2636 if (list_empty(&bus->dpc_tsklst))
2637 if (wait_for_completion_interruptible(&bus->dpc_wait))
2640 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2641 list_for_each_safe(cur_hd, tmp_hd, &bus->dpc_tsklst) {
2642 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2644 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
2645 /* after stopping the bus, exit thread */
2646 brcmf_sdbrcm_bus_stop(bus->sdiodev->dev);
2647 bus->dpc_tsk = NULL;
2648 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2652 if (brcmf_sdbrcm_dpc(bus))
2653 brcmf_sdbrcm_adddpctsk(bus);
2655 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2659 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2664 static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
2668 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2669 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2670 struct brcmf_sdio *bus = sdiodev->bus;
2672 brcmf_dbg(TRACE, "Enter\n");
2676 /* Add space for the header */
2677 skb_push(pkt, SDPCM_HDRLEN);
2678 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2680 prec = prio2prec((pkt->priority & PRIOMASK));
2682 /* Check for existing queue, current flow-control,
2683 pending event, or pending clock */
2684 brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2687 /* Priority based enq */
2688 spin_lock_bh(&bus->txqlock);
2689 if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2690 skb_pull(pkt, SDPCM_HDRLEN);
2691 brcmf_txcomplete(bus->sdiodev->dev, pkt, false);
2692 brcmu_pkt_buf_free_skb(pkt);
2693 brcmf_dbg(ERROR, "out of bus->txq !!!\n");
2698 spin_unlock_bh(&bus->txqlock);
2700 if (pktq_len(&bus->txq) >= TXHI) {
2702 brcmf_txflowcontrol(bus->sdiodev->dev, 0, ON);
2706 if (pktq_plen(&bus->txq, prec) > qcount[prec])
2707 qcount[prec] = pktq_plen(&bus->txq, prec);
2709 /* Schedule DPC if needed to send queued packet(s) */
2710 if (!bus->dpc_sched) {
2711 bus->dpc_sched = true;
2713 brcmf_sdbrcm_adddpctsk(bus);
2714 complete(&bus->dpc_wait);
2722 brcmf_sdbrcm_membytes(struct brcmf_sdio *bus, bool write, u32 address, u8 *data,
2729 /* Determine initial transfer parameters */
2730 sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
2731 if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
2732 dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
2736 /* Set the backplane window to include the start address */
2737 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev, address);
2739 brcmf_dbg(ERROR, "window change failed\n");
2743 /* Do the transfer(s) */
2745 brcmf_dbg(INFO, "%s %d bytes at offset 0x%08x in window 0x%08x\n",
2746 write ? "write" : "read", dsize,
2747 sdaddr, address & SBSDIO_SBWINDOW_MASK);
2748 bcmerror = brcmf_sdcard_rwdata(bus->sdiodev, write,
2749 sdaddr, data, dsize);
2751 brcmf_dbg(ERROR, "membytes transfer failed\n");
2755 /* Adjust for next transfer (if any) */
2760 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev,
2763 brcmf_dbg(ERROR, "window change failed\n");
2767 dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
2772 /* Return the window to backplane enumeration space for core access */
2773 if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, bus->sdiodev->sbwad))
2774 brcmf_dbg(ERROR, "FAILED to set window back to 0x%x\n",
2775 bus->sdiodev->sbwad);
2781 #define CONSOLE_LINE_MAX 192
2783 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
2785 struct brcmf_console *c = &bus->console;
2786 u8 line[CONSOLE_LINE_MAX], ch;
2790 /* Don't do anything until FWREADY updates console address */
2791 if (bus->console_addr == 0)
2794 /* Read console log struct */
2795 addr = bus->console_addr + offsetof(struct rte_console, log_le);
2796 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log_le,
2801 /* Allocate console buffer (one time only) */
2802 if (c->buf == NULL) {
2803 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2804 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2809 idx = le32_to_cpu(c->log_le.idx);
2811 /* Protect against corrupt value */
2812 if (idx > c->bufsize)
2815 /* Skip reading the console buffer if the index pointer
2820 /* Read the console buffer */
2821 addr = le32_to_cpu(c->log_le.buf);
2822 rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
2826 while (c->last != idx) {
2827 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2828 if (c->last == idx) {
2829 /* This would output a partial line.
2831 * the buffer pointer and output this
2832 * line next time around.
2837 c->last = c->bufsize - n;
2840 ch = c->buf[c->last];
2841 c->last = (c->last + 1) % c->bufsize;
2848 if (line[n - 1] == '\r')
2851 pr_debug("CONSOLE: %s\n", line);
2860 static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2865 bus->ctrl_frame_stat = false;
2866 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2867 SDIO_FUNC_2, F2SYNC, frame, len);
2870 /* On failure, abort the command and terminate the frame */
2871 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2875 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2877 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2878 SBSDIO_FUNC1_FRAMECTRL,
2882 for (i = 0; i < 3; i++) {
2884 hi = brcmf_sdio_regrb(bus->sdiodev,
2885 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2886 lo = brcmf_sdio_regrb(bus->sdiodev,
2887 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2888 bus->f1regdata += 2;
2889 if (hi == 0 && lo == 0)
2895 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2901 brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2909 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2910 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2911 struct brcmf_sdio *bus = sdiodev->bus;
2913 brcmf_dbg(TRACE, "Enter\n");
2915 /* Back the pointer to make a room for bus header */
2916 frame = msg - SDPCM_HDRLEN;
2917 len = (msglen += SDPCM_HDRLEN);
2919 /* Add alignment padding (optional for ctl frames) */
2920 doff = ((unsigned long)frame % BRCMF_SDALIGN);
2925 memset(frame, 0, doff + SDPCM_HDRLEN);
2927 /* precondition: doff < BRCMF_SDALIGN */
2928 doff += SDPCM_HDRLEN;
2930 /* Round send length to next SDIO block */
2931 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2932 u16 pad = bus->blocksize - (len % bus->blocksize);
2933 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2935 } else if (len % BRCMF_SDALIGN) {
2936 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2939 /* Satisfy length-alignment requirements */
2940 if (len & (ALIGNMENT - 1))
2941 len = roundup(len, ALIGNMENT);
2943 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2945 /* Need to lock here to protect txseq and SDIO tx calls */
2950 /* Make sure backplane clock is on */
2951 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2953 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2954 *(__le16 *) frame = cpu_to_le16((u16) msglen);
2955 *(((__le16 *) frame) + 1) = cpu_to_le16(~msglen);
2957 /* Software tag: channel, sequence number, data offset */
2959 ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
2961 | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
2962 SDPCM_DOFFSET_MASK);
2963 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2964 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2966 if (!data_ok(bus)) {
2967 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2968 bus->tx_max, bus->tx_seq);
2969 bus->ctrl_frame_stat = true;
2971 bus->ctrl_frame_buf = frame;
2972 bus->ctrl_frame_len = len;
2974 brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat);
2976 if (!bus->ctrl_frame_stat) {
2977 brcmf_dbg(INFO, "ctrl_frame_stat == false\n");
2980 brcmf_dbg(INFO, "ctrl_frame_stat == true\n");
2986 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2987 frame, len, "Tx Frame:\n");
2988 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2990 frame, min_t(u16, len, 16), "TxHdr:\n");
2993 ret = brcmf_tx_frame(bus, frame, len);
2994 } while (ret < 0 && retries++ < TXRETRIES);
2997 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) {
2998 bus->activity = false;
2999 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
3009 return ret ? -EIO : 0;
3013 brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3018 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3019 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3020 struct brcmf_sdio *bus = sdiodev->bus;
3022 brcmf_dbg(TRACE, "Enter\n");
3024 /* Wait until control frame is available */
3025 timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3029 memcpy(msg, bus->rxctl, min(msglen, rxlen));
3034 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3036 } else if (timeleft == 0) {
3037 brcmf_dbg(ERROR, "resumed on timeout\n");
3038 } else if (pending) {
3039 brcmf_dbg(CTL, "cancelled\n");
3040 return -ERESTARTSYS;
3042 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3050 return rxlen ? (int)rxlen : -ETIMEDOUT;
3053 static int brcmf_sdbrcm_downloadvars(struct brcmf_sdio *bus, void *arg, int len)
3057 brcmf_dbg(TRACE, "Enter\n");
3059 /* Basic sanity checks */
3060 if (bus->sdiodev->bus_if->drvr_up) {
3061 bcmerror = -EISCONN;
3065 bcmerror = -EOVERFLOW;
3069 /* Free the old ones and replace with passed variables */
3072 bus->vars = kmalloc(len, GFP_ATOMIC);
3073 bus->varsz = bus->vars ? len : 0;
3074 if (bus->vars == NULL) {
3079 /* Copy the passed variables, which should include the
3080 terminating double-null */
3081 memcpy(bus->vars, arg, bus->varsz);
3086 static int brcmf_sdbrcm_write_vars(struct brcmf_sdio *bus)
3095 char *nvram_ularray;
3098 /* Even if there are no vars are to be written, we still
3099 need to set the ramsize. */
3100 varsize = bus->varsz ? roundup(bus->varsz, 4) : 0;
3101 varaddr = (bus->ramsize - 4) - varsize;
3104 vbuffer = kzalloc(varsize, GFP_ATOMIC);
3108 memcpy(vbuffer, bus->vars, bus->varsz);
3110 /* Write the vars list */
3112 brcmf_sdbrcm_membytes(bus, true, varaddr, vbuffer, varsize);
3114 /* Verify NVRAM bytes */
3115 brcmf_dbg(INFO, "Compare NVRAM dl & ul; varsize=%d\n", varsize);
3116 nvram_ularray = kmalloc(varsize, GFP_ATOMIC);
3117 if (!nvram_ularray) {
3122 /* Upload image to verify downloaded contents. */
3123 memset(nvram_ularray, 0xaa, varsize);
3125 /* Read the vars list to temp buffer for comparison */
3127 brcmf_sdbrcm_membytes(bus, false, varaddr, nvram_ularray,
3130 brcmf_dbg(ERROR, "error %d on reading %d nvram bytes at 0x%08x\n",
3131 bcmerror, varsize, varaddr);
3133 /* Compare the org NVRAM with the one read from RAM */
3134 if (memcmp(vbuffer, nvram_ularray, varsize))
3135 brcmf_dbg(ERROR, "Downloaded NVRAM image is corrupted\n");
3137 brcmf_dbg(ERROR, "Download/Upload/Compare of NVRAM ok\n");
3139 kfree(nvram_ularray);
3145 /* adjust to the user specified RAM */
3146 brcmf_dbg(INFO, "Physical memory size: %d\n", bus->ramsize);
3147 brcmf_dbg(INFO, "Vars are at %d, orig varsize is %d\n",
3149 varsize = ((bus->ramsize - 4) - varaddr);
3152 * Determine the length token:
3153 * Varsize, converted to words, in lower 16-bits, checksum
3158 varsizew_le = cpu_to_le32(0);
3160 varsizew = varsize / 4;
3161 varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
3162 varsizew_le = cpu_to_le32(varsizew);
3165 brcmf_dbg(INFO, "New varsize is %d, length token=0x%08x\n",
3168 /* Write the length token to the last word */
3169 bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->ramsize - 4),
3170 (u8 *)&varsizew_le, 4);
3175 static int brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
3179 struct chip_info *ci = bus->ci;
3181 /* To enter download state, disable ARM and reset SOCRAM.
3182 * To exit download state, simply reset ARM (default is RAM boot).
3185 bus->alp_only = true;
3187 ci->coredisable(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3189 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM);
3191 /* Clear the top bit of memory */
3194 brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
3198 if (!ci->iscoreup(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM)) {
3199 brcmf_dbg(ERROR, "SOCRAM core is down after reset?\n");
3204 bcmerror = brcmf_sdbrcm_write_vars(bus);
3206 brcmf_dbg(ERROR, "no vars written to RAM\n");
3210 w_sdreg32(bus, 0xFFFFFFFF,
3211 offsetof(struct sdpcmd_regs, intstatus), &retries);
3213 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3215 /* Allow HT Clock now that the ARM is running. */
3216 bus->alp_only = false;
3218 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3224 static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_sdio *bus)
3226 if (bus->firmware->size < bus->fw_ptr + len)
3227 len = bus->firmware->size - bus->fw_ptr;
3229 memcpy(buf, &bus->firmware->data[bus->fw_ptr], len);
3234 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
3238 u8 *memblock = NULL, *memptr;
3241 brcmf_dbg(INFO, "Enter\n");
3243 ret = request_firmware(&bus->firmware, BRCMF_SDIO_FW_NAME,
3244 &bus->sdiodev->func[2]->dev);
3246 brcmf_dbg(ERROR, "Fail to request firmware %d\n", ret);
3251 memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
3252 if (memblock == NULL) {
3256 if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
3257 memptr += (BRCMF_SDALIGN -
3258 ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
3260 /* Download image */
3262 brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) {
3263 ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len);
3265 brcmf_dbg(ERROR, "error %d on writing %d membytes at 0x%08x\n",
3266 ret, MEMBLOCK, offset);
3276 release_firmware(bus->firmware);
3283 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3284 * and ending in a NUL.
3285 * Removes carriage returns, empty lines, comment lines, and converts
3287 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3291 static uint brcmf_process_nvram_vars(char *varbuf, uint len)
3300 findNewline = false;
3303 for (n = 0; n < len; n++) {
3306 if (varbuf[n] == '\r')
3308 if (findNewline && varbuf[n] != '\n')
3310 findNewline = false;
3311 if (varbuf[n] == '#') {
3315 if (varbuf[n] == '\n') {
3325 buf_len = dp - varbuf;
3327 while (dp < varbuf + n)
3333 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
3336 char *memblock = NULL;
3340 ret = request_firmware(&bus->firmware, BRCMF_SDIO_NV_NAME,
3341 &bus->sdiodev->func[2]->dev);
3343 brcmf_dbg(ERROR, "Fail to request nvram %d\n", ret);
3348 memblock = kmalloc(MEMBLOCK, GFP_ATOMIC);
3349 if (memblock == NULL) {
3354 len = brcmf_sdbrcm_get_image(memblock, MEMBLOCK, bus);
3356 if (len > 0 && len < MEMBLOCK) {
3357 bufp = (char *)memblock;
3359 len = brcmf_process_nvram_vars(bufp, len);
3363 ret = brcmf_sdbrcm_downloadvars(bus, memblock, len + 1);
3365 brcmf_dbg(ERROR, "error downloading vars: %d\n", ret);
3367 brcmf_dbg(ERROR, "error reading nvram file: %d\n", len);
3374 release_firmware(bus->firmware);
3380 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3384 /* Keep arm in reset */
3385 if (brcmf_sdbrcm_download_state(bus, true)) {
3386 brcmf_dbg(ERROR, "error placing ARM core in reset\n");
3390 /* External image takes precedence if specified */
3391 if (brcmf_sdbrcm_download_code_file(bus)) {
3392 brcmf_dbg(ERROR, "dongle image file download failed\n");
3396 /* External nvram takes precedence if specified */
3397 if (brcmf_sdbrcm_download_nvram(bus))
3398 brcmf_dbg(ERROR, "dongle nvram file download failed\n");
3400 /* Take arm out of reset */
3401 if (brcmf_sdbrcm_download_state(bus, false)) {
3402 brcmf_dbg(ERROR, "error getting out of ARM core reset\n");
3413 brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3417 /* Download the firmware */
3418 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3420 ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3422 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3427 static int brcmf_sdbrcm_bus_init(struct device *dev)
3429 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3430 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3431 struct brcmf_sdio *bus = sdiodev->bus;
3432 unsigned long timeout;
3438 brcmf_dbg(TRACE, "Enter\n");
3440 /* try to download image and nvram to the dongle */
3441 if (bus_if->state == BRCMF_BUS_DOWN) {
3442 if (!(brcmf_sdbrcm_download_firmware(bus)))
3446 if (!bus->sdiodev->bus_if->drvr)
3449 /* Start the watchdog timer */
3451 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3455 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3456 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3457 if (bus->clkstate != CLK_AVAIL)
3460 /* Force clocks on backplane to be sure F2 interrupt propagates */
3461 saveclk = brcmf_sdio_regrb(bus->sdiodev,
3462 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3464 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3465 SBSDIO_FUNC1_CHIPCLKCSR,
3466 (saveclk | SBSDIO_FORCE_HT), &err);
3469 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
3473 /* Enable function 2 (frame transfers) */
3474 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3475 offsetof(struct sdpcmd_regs, tosbmailboxdata), &retries);
3476 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3478 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3481 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3483 while (enable != ready) {
3484 ready = brcmf_sdio_regrb(bus->sdiodev,
3485 SDIO_CCCR_IORx, NULL);
3486 if (time_after(jiffies, timeout))
3488 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3489 /* prevent busy waiting if it takes too long */
3490 msleep_interruptible(20);
3493 brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
3495 /* If F2 successfully enabled, set core and enable interrupts */
3496 if (ready == enable) {
3497 /* Set up the interrupt mask and enable interrupts */
3498 bus->hostintmask = HOSTINTMASK;
3499 w_sdreg32(bus, bus->hostintmask,
3500 offsetof(struct sdpcmd_regs, hostintmask), &retries);
3502 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3503 SBSDIO_WATERMARK, 8, &err);
3505 /* Disable F2 again */
3506 enable = SDIO_FUNC_ENABLE_1;
3507 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0,
3508 SDIO_CCCR_IOEx, enable, NULL);
3512 /* Restore previous clock setting */
3513 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3514 SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err);
3517 ret = brcmf_sdio_intr_register(bus->sdiodev);
3519 brcmf_dbg(ERROR, "intr register failed:%d\n", ret);
3522 /* If we didn't come up, turn off backplane clock */
3523 if (bus_if->state != BRCMF_BUS_DATA)
3524 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3532 void brcmf_sdbrcm_isr(void *arg)
3534 struct brcmf_sdio *bus = (struct brcmf_sdio *) arg;
3536 brcmf_dbg(TRACE, "Enter\n");
3539 brcmf_dbg(ERROR, "bus is null pointer, exiting\n");
3543 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3544 brcmf_dbg(ERROR, "bus is down. we have nothing to do\n");
3547 /* Count the interrupt call */
3551 /* Shouldn't get this interrupt if we're sleeping? */
3552 if (bus->sleeping) {
3553 brcmf_dbg(ERROR, "INTERRUPT WHILE SLEEPING??\n");
3557 /* Disable additional interrupts (is this needed now)? */
3559 brcmf_dbg(ERROR, "isr w/o interrupt configured!\n");
3561 bus->dpc_sched = true;
3563 brcmf_sdbrcm_adddpctsk(bus);
3564 complete(&bus->dpc_wait);
3568 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)
3571 struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3574 brcmf_dbg(TIMER, "Enter\n");
3576 /* Ignore the timer if simulating bus down */
3582 /* Poll period: check device if appropriate. */
3583 if (bus->poll && (++bus->polltick >= bus->pollrate)) {
3586 /* Reset poll tick */
3589 /* Check device if no interrupts */
3590 if (!bus->intr || (bus->intrcount == bus->lastintrs)) {
3592 if (!bus->dpc_sched) {
3594 devpend = brcmf_sdio_regrb(bus->sdiodev,
3598 devpend & (INTR_STATUS_FUNC1 |
3602 /* If there is something, make like the ISR and
3608 bus->dpc_sched = true;
3610 brcmf_sdbrcm_adddpctsk(bus);
3611 complete(&bus->dpc_wait);
3616 /* Update interrupt tracking */
3617 bus->lastintrs = bus->intrcount;
3620 /* Poll for console output periodically */
3621 if (bus_if->state == BRCMF_BUS_DATA &&
3622 bus->console_interval != 0) {
3623 bus->console.count += BRCMF_WD_POLL_MS;
3624 if (bus->console.count >= bus->console_interval) {
3625 bus->console.count -= bus->console_interval;
3626 /* Make sure backplane clock is on */
3627 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3628 if (brcmf_sdbrcm_readconsole(bus) < 0)
3630 bus->console_interval = 0;
3635 /* On idle timeout clear activity flag and/or turn off clock */
3636 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3637 if (++bus->idlecount >= bus->idletime) {
3639 if (bus->activity) {
3640 bus->activity = false;
3641 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3643 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3653 static bool brcmf_sdbrcm_chipmatch(u16 chipid)
3655 if (chipid == BCM4329_CHIP_ID)
3657 if (chipid == BCM4330_CHIP_ID)
3662 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
3664 brcmf_dbg(TRACE, "Enter\n");
3667 bus->rxctl = bus->rxbuf = NULL;
3670 kfree(bus->databuf);
3671 bus->databuf = NULL;
3674 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
3676 brcmf_dbg(TRACE, "Enter\n");
3678 if (bus->sdiodev->bus_if->maxctl) {
3680 roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3681 ALIGNMENT) + BRCMF_SDALIGN;
3682 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3687 /* Allocate buffer to receive glomed packet */
3688 bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
3689 if (!(bus->databuf)) {
3690 /* release rxbuf which was already located as above */
3696 /* Align the buffer */
3697 if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
3698 bus->dataptr = bus->databuf + (BRCMF_SDALIGN -
3699 ((unsigned long)bus->databuf % BRCMF_SDALIGN));
3701 bus->dataptr = bus->databuf;
3710 brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
3718 bus->alp_only = true;
3720 /* Return the window to backplane enumeration space for core access */
3721 if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, SI_ENUM_BASE))
3722 brcmf_dbg(ERROR, "FAILED to return to SI_ENUM_BASE\n");
3724 pr_debug("F1 signature read @0x18000000=0x%4x\n",
3725 brcmf_sdcard_reg_read(bus->sdiodev, SI_ENUM_BASE));
3728 * Force PLL off until brcmf_sdio_chip_attach()
3729 * programs PLL control regs
3732 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3733 SBSDIO_FUNC1_CHIPCLKCSR,
3734 BRCMF_INIT_CLKCTL1, &err);
3736 clkctl = brcmf_sdio_regrb(bus->sdiodev,
3737 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3739 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3740 brcmf_dbg(ERROR, "ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3741 err, BRCMF_INIT_CLKCTL1, clkctl);
3745 if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
3746 brcmf_dbg(ERROR, "brcmf_sdio_chip_attach failed!\n");
3750 if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
3751 brcmf_dbg(ERROR, "unsupported chip: 0x%04x\n", bus->ci->chip);
3755 brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci,
3756 SDIO_DRIVE_STRENGTH);
3758 /* Get info on the SOCRAM cores... */
3759 bus->ramsize = bus->ci->ramsize;
3760 if (!(bus->ramsize)) {
3761 brcmf_dbg(ERROR, "failed to find SOCRAM memory!\n");
3765 /* Set core control so an SDIO reset does a backplane reset */
3766 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3767 reg_addr = bus->ci->c_inf[idx].base +
3768 offsetof(struct sdpcmd_regs, corecontrol);
3769 reg_val = brcmf_sdcard_reg_read(bus->sdiodev, reg_addr);
3770 brcmf_sdcard_reg_write(bus->sdiodev, reg_addr, reg_val | CC_BPRESEN);
3772 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3774 /* Locate an appropriately-aligned portion of hdrbuf */
3775 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3778 /* Set the poll and/or interrupt flags */
3790 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
3792 brcmf_dbg(TRACE, "Enter\n");
3794 /* Disable F2 to clear any intermediate frame state on the dongle */
3795 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3796 SDIO_FUNC_ENABLE_1, NULL);
3798 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3799 bus->sleeping = false;
3800 bus->rxflow = false;
3802 /* Done with backplane-dependent accesses, can drop clock... */
3803 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3804 SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3806 /* ...and initialize clock/power states */
3807 bus->clkstate = CLK_SDONLY;
3808 bus->idletime = BRCMF_IDLE_INTERVAL;
3809 bus->idleclock = BRCMF_IDLE_ACTIVE;
3811 /* Query the F2 block size, set roundup accordingly */
3812 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3813 bus->roundup = min(max_roundup, bus->blocksize);
3815 /* bus module does not support packet chaining */
3816 bus->use_rxchain = false;
3817 bus->sd_rxchain = false;
3823 brcmf_sdbrcm_watchdog_thread(void *data)
3825 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3827 allow_signal(SIGTERM);
3828 /* Run until signal received */
3830 if (kthread_should_stop())
3832 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3833 brcmf_sdbrcm_bus_watchdog(bus);
3834 /* Count the tick for reference */
3843 brcmf_sdbrcm_watchdog(unsigned long data)
3845 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3847 if (bus->watchdog_tsk) {
3848 complete(&bus->watchdog_wait);
3849 /* Reschedule the watchdog */
3850 if (bus->wd_timer_valid)
3851 mod_timer(&bus->timer,
3852 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3856 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
3858 brcmf_dbg(TRACE, "Enter\n");
3861 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3862 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3863 brcmf_sdio_chip_detach(&bus->ci);
3864 if (bus->vars && bus->varsz)
3869 brcmf_dbg(TRACE, "Disconnected\n");
3872 /* Detach and free everything */
3873 static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
3875 brcmf_dbg(TRACE, "Enter\n");
3878 /* De-register interrupt handler */
3879 brcmf_sdio_intr_unregister(bus->sdiodev);
3881 if (bus->sdiodev->bus_if->drvr) {
3882 brcmf_detach(bus->sdiodev->dev);
3883 brcmf_sdbrcm_release_dongle(bus);
3886 brcmf_sdbrcm_release_malloc(bus);
3891 brcmf_dbg(TRACE, "Disconnected\n");
3894 void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
3897 struct brcmf_sdio *bus;
3899 brcmf_dbg(TRACE, "Enter\n");
3901 /* We make an assumption about address window mappings:
3902 * regsva == SI_ENUM_BASE*/
3904 /* Allocate private bus interface state */
3905 bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
3909 bus->sdiodev = sdiodev;
3911 skb_queue_head_init(&bus->glom);
3912 bus->txbound = BRCMF_TXBOUND;
3913 bus->rxbound = BRCMF_RXBOUND;
3914 bus->txminmax = BRCMF_TXMINMAX;
3915 bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
3916 bus->usebufpool = false; /* Use bufpool if allocated,
3917 else use locally malloced rxbuf */
3919 /* attempt to attach to the dongle */
3920 if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
3921 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_attach failed\n");
3925 spin_lock_init(&bus->txqlock);
3926 init_waitqueue_head(&bus->ctrl_wait);
3927 init_waitqueue_head(&bus->dcmd_resp_wait);
3929 /* Set up the watchdog timer */
3930 init_timer(&bus->timer);
3931 bus->timer.data = (unsigned long)bus;
3932 bus->timer.function = brcmf_sdbrcm_watchdog;
3934 /* Initialize thread based operation and lock */
3935 sema_init(&bus->sdsem, 1);
3937 /* Initialize watchdog thread */
3938 init_completion(&bus->watchdog_wait);
3939 bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
3940 bus, "brcmf_watchdog");
3941 if (IS_ERR(bus->watchdog_tsk)) {
3942 pr_warn("brcmf_watchdog thread failed to start\n");
3943 bus->watchdog_tsk = NULL;
3945 /* Initialize DPC thread */
3946 init_completion(&bus->dpc_wait);
3947 INIT_LIST_HEAD(&bus->dpc_tsklst);
3948 spin_lock_init(&bus->dpc_tl_lock);
3949 bus->dpc_tsk = kthread_run(brcmf_sdbrcm_dpc_thread,
3951 if (IS_ERR(bus->dpc_tsk)) {
3952 pr_warn("brcmf_dpc thread failed to start\n");
3953 bus->dpc_tsk = NULL;
3956 /* Assign bus interface call back */
3957 bus->sdiodev->bus_if->brcmf_bus_stop = brcmf_sdbrcm_bus_stop;
3958 bus->sdiodev->bus_if->brcmf_bus_init = brcmf_sdbrcm_bus_init;
3959 bus->sdiodev->bus_if->brcmf_bus_txdata = brcmf_sdbrcm_bus_txdata;
3960 bus->sdiodev->bus_if->brcmf_bus_txctl = brcmf_sdbrcm_bus_txctl;
3961 bus->sdiodev->bus_if->brcmf_bus_rxctl = brcmf_sdbrcm_bus_rxctl;
3962 /* Attach to the brcmf/OS/network interface */
3963 ret = brcmf_attach(SDPCM_RESERVE, bus->sdiodev->dev);
3965 brcmf_dbg(ERROR, "brcmf_attach failed\n");
3969 /* Allocate buffers */
3970 if (!(brcmf_sdbrcm_probe_malloc(bus))) {
3971 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_malloc failed\n");
3975 if (!(brcmf_sdbrcm_probe_init(bus))) {
3976 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_init failed\n");
3980 brcmf_dbg(INFO, "completed!!\n");
3982 /* if firmware path present try to download and bring up bus */
3983 ret = brcmf_bus_start(bus->sdiodev->dev);
3985 if (ret == -ENOLINK) {
3986 brcmf_dbg(ERROR, "dongle is not responding\n");
3994 brcmf_sdbrcm_release(bus);
3998 void brcmf_sdbrcm_disconnect(void *ptr)
4000 struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr;
4002 brcmf_dbg(TRACE, "Enter\n");
4005 brcmf_sdbrcm_release(bus);
4007 brcmf_dbg(TRACE, "Disconnected\n");
4011 brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4013 /* Totally stop the timer */
4014 if (!wdtick && bus->wd_timer_valid) {
4015 del_timer_sync(&bus->timer);
4016 bus->wd_timer_valid = false;
4017 bus->save_ms = wdtick;
4021 /* don't start the wd until fw is loaded */
4022 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN)
4026 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4027 if (bus->wd_timer_valid)
4028 /* Stop timer and restart at new value */
4029 del_timer_sync(&bus->timer);
4031 /* Create timer again when watchdog period is
4032 dynamically changed or in the first instance
4034 bus->timer.expires =
4035 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4036 add_timer(&bus->timer);
4039 /* Re arm the timer, at last watchdog period */
4040 mod_timer(&bus->timer,
4041 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4044 bus->wd_timer_valid = true;
4045 bus->save_ms = wdtick;