drivers/net/wireless/brcm80211/brcmfmac/sdio.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/kernel.h>
  19 #include <linux/kthread.h>
  20 #include <linux/printk.h>
  21 #include <linux/pci_ids.h>
  22 #include <linux/netdevice.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/sched.h>
  25 #include <linux/mmc/sdio.h>
  26 #include <linux/mmc/sdio_ids.h>
  27 #include <linux/mmc/sdio_func.h>
  28 #include <linux/mmc/card.h>
  29 #include <linux/semaphore.h>
  30 #include <linux/firmware.h>
  31 #include <linux/module.h>
  32 #include <linux/bcma/bcma.h>
  33 #include <linux/debugfs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/platform_data/brcmfmac-sdio.h>
  36 #include <linux/moduleparam.h>
  37 #include <asm/unaligned.h>
  38 #include <defs.h>
  39 #include <brcmu_wifi.h>
  40 #include <brcmu_utils.h>
  41 #include <brcm_hw_ids.h>
  42 #include <soc.h>
  43 #include "sdio.h"
  44 #include "chip.h"
  45 #include "firmware.h"
  46
  47 #define DCMD_RESP_TIMEOUT       2000    /* In milli second */
  48 #define CTL_DONE_TIMEOUT        2000    /* In milli second */
  49
  50 #ifdef DEBUG
  51
  52 #define BRCMF_TRAP_INFO_SIZE    80
  53
  54 #define CBUF_LEN        (128)
  55
  56 /* Device console log buffer state */
  57 #define CONSOLE_BUFFER_MAX      2024
  58
  59 struct rte_log_le {
  60         __le32 buf;             /* Can't be pointer on (64-bit) hosts */
  61         __le32 buf_size;
  62         __le32 idx;
  63         char *_buf_compat;      /* Redundant pointer for backward compat. */
  64 };
  65
  66 struct rte_console {
  67         /* Virtual UART
  68          * When there is no UART (e.g. Quickturn),
  69          * the host should write a complete
  70          * input line directly into cbuf and then write
  71          * the length into vcons_in.
  72          * This may also be used when there is a real UART
  73          * (at risk of conflicting with
  74          * the real UART).  vcons_out is currently unused.
  75          */
  76         uint vcons_in;
  77         uint vcons_out;
  78
  79         /* Output (logging) buffer
  80          * Console output is written to a ring buffer log_buf at index log_idx.
  81          * The host may read the output when it sees log_idx advance.
  82          * Output will be lost if the output wraps around faster than the host
  83          * polls.
  84          */
  85         struct rte_log_le log_le;
  86
  87         /* Console input line buffer
  88          * Characters are read one at a time into cbuf
  89          * until <CR> is received, then
  90          * the buffer is processed as a command line.
  91          * Also used for virtual UART.
  92          */
  93         uint cbuf_idx;
  94         char cbuf[CBUF_LEN];
  95 };
  96
  97 #endif                          /* DEBUG */
  98 #include <chipcommon.h>
  99
 100 #include "bus.h"
 101 #include "debug.h"
 102 #include "tracepoint.h"
 103
 104 #define TXQLEN          2048    /* bulk tx queue length */
 105 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 106 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 107 #define PRIOMASK        7
 108
 109 #define TXRETRIES       2       /* # of retries for tx frames */
 110
 111 #define BRCMF_RXBOUND   50      /* Default for max rx frames in
 112                                  one scheduling */
 113
 114 #define BRCMF_TXBOUND   20      /* Default for max tx frames in
 115                                  one scheduling */
 116
 117 #define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
 118
 119 #define MEMBLOCK        2048    /* Block size used for downloading
 120                                  of dongle image */
 121 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 122                                  biggest possible glom */
 123
 124 #define BRCMF_FIRSTREAD (1 << 6)
 125
 126
 127 /* SBSDIO_DEVICE_CTL */
 128
 129 /* 1: device will assert busy signal when receiving CMD53 */
 130 #define SBSDIO_DEVCTL_SETBUSY           0x01
 131 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
 132 #define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
 133 /* 1: mask all interrupts to host except the chipActive (rev 8) */
 134 #define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
 135 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
 136  * sdio bus power cycle to clear (rev 9) */
 137 #define SBSDIO_DEVCTL_PADS_ISO          0x08
 138 /* Force SD->SB reset mapping (rev 11) */
 139 #define SBSDIO_DEVCTL_SB_RST_CTL        0x30
 140 /*   Determined by CoreControl bit */
 141 #define SBSDIO_DEVCTL_RST_CORECTL       0x00
 142 /*   Force backplane reset */
 143 #define SBSDIO_DEVCTL_RST_BPRESET       0x10
 144 /*   Force no backplane reset */
 145 #define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
 146
 147 /* direct(mapped) cis space */
 148
 149 /* MAPPED common CIS address */
 150 #define SBSDIO_CIS_BASE_COMMON          0x1000
 151 /* maximum bytes in one CIS */
 152 #define SBSDIO_CIS_SIZE_LIMIT           0x200
 153 /* cis offset addr is < 17 bits */
 154 #define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
 155
 156 /* manfid tuple length, include tuple, link bytes */
 157 #define SBSDIO_CIS_MANFID_TUPLE_LEN     6
 158
 159 #define CORE_BUS_REG(base, field) \
 160                 (base + offsetof(struct sdpcmd_regs, field))
 161
 162 /* SDIO function 1 register CHIPCLKCSR */
 163 /* Force ALP request to backplane */
 164 #define SBSDIO_FORCE_ALP                0x01
 165 /* Force HT request to backplane */
 166 #define SBSDIO_FORCE_HT                 0x02
 167 /* Force ILP request to backplane */
 168 #define SBSDIO_FORCE_ILP                0x04
 169 /* Make ALP ready (power up xtal) */
 170 #define SBSDIO_ALP_AVAIL_REQ            0x08
 171 /* Make HT ready (power up PLL) */
 172 #define SBSDIO_HT_AVAIL_REQ             0x10
 173 /* Squelch clock requests from HW */
 174 #define SBSDIO_FORCE_HW_CLKREQ_OFF      0x20
 175 /* Status: ALP is ready */
 176 #define SBSDIO_ALP_AVAIL                0x40
 177 /* Status: HT is ready */
 178 #define SBSDIO_HT_AVAIL                 0x80
 179 #define SBSDIO_CSR_MASK                 0x1F
 180 #define SBSDIO_AVBITS           (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
 181 #define SBSDIO_ALPAV(regval)    ((regval) & SBSDIO_AVBITS)
 182 #define SBSDIO_HTAV(regval)     (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
 183 #define SBSDIO_ALPONLY(regval)  (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
 184 #define SBSDIO_CLKAV(regval, alponly) \
 185         (SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
 186
 187 /* intstatus */
 188 #define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
 189 #define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
 190 #define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
 191 #define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
 192 #define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
 193 #define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
 194 #define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
 195 #define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
 196 #define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
 197 #define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
 198 #define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
 199 #define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
 200 #define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
 201 #define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
 202 #define I_PC            (1 << 10)       /* descriptor error */
 203 #define I_PD            (1 << 11)       /* data error */
 204 #define I_DE            (1 << 12)       /* Descriptor protocol Error */
 205 #define I_RU            (1 << 13)       /* Receive descriptor Underflow */
 206 #define I_RO            (1 << 14)       /* Receive fifo Overflow */
 207 #define I_XU            (1 << 15)       /* Transmit fifo Underflow */
 208 #define I_RI            (1 << 16)       /* Receive Interrupt */
 209 #define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
 210 #define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
 211 #define I_XI            (1 << 24)       /* Transmit Interrupt */
 212 #define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
 213 #define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
 214 #define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
 215 #define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
 216 #define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
 217 #define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
 218 #define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
 219 #define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
 220 #define I_DMA           (I_RI | I_XI | I_ERRORS)
 221
 222 /* corecontrol */
 223 #define CC_CISRDY               (1 << 0)        /* CIS Ready */
 224 #define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
 225 #define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
 226 #define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
 227 #define CC_XMTDATAAVAIL_MODE    (1 << 4)
 228 #define CC_XMTDATAAVAIL_CTRL    (1 << 5)
 229
 230 /* SDA_FRAMECTRL */
 231 #define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
 232 #define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
 233 #define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
 234 #define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
 235
 236 /*
 237  * Software allocation of To SB Mailbox resources
 238  */
 239
 240 /* tosbmailbox bits corresponding to intstatus bits */
 241 #define SMB_NAK         (1 << 0)        /* Frame NAK */
 242 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 243 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 244 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 245
 246 /* tosbmailboxdata */
 247 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 248
 249 /*
 250  * Software allocation of To Host Mailbox resources
 251  */
 252
 253 /* intstatus bits */
 254 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 255 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 256 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 257 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 258
 259 /* tohostmailboxdata */
 260 #define HMB_DATA_NAKHANDLED     1       /* retransmit NAK'd frame */
 261 #define HMB_DATA_DEVREADY       2       /* talk to host after enable */
 262 #define HMB_DATA_FC             4       /* per prio flowcontrol update flag */
 263 #define HMB_DATA_FWREADY        8       /* fw ready for protocol activity */
 264
 265 #define HMB_DATA_FCDATA_MASK    0xff000000
 266 #define HMB_DATA_FCDATA_SHIFT   24
 267
 268 #define HMB_DATA_VERSION_MASK   0x00ff0000
 269 #define HMB_DATA_VERSION_SHIFT  16
 270
 271 /*
 272  * Software-defined protocol header
 273  */
 274
 275 /* Current protocol version */
 276 #define SDPCM_PROT_VERSION      4
 277
 278 /*
 279  * Shared structure between dongle and the host.
 280  * The structure contains pointers to trap or assert information.
 281  */
 282 #define SDPCM_SHARED_VERSION       0x0003
 283 #define SDPCM_SHARED_VERSION_MASK  0x00FF
 284 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
 285 #define SDPCM_SHARED_ASSERT        0x0200
 286 #define SDPCM_SHARED_TRAP          0x0400
 287
 288 /* Space for header read, limit for data packets */
 289 #define MAX_HDR_READ    (1 << 6)
 290 #define MAX_RX_DATASZ   2048
 291
 292 /* Bump up limit on waiting for HT to account for first startup;
 293  * if the image is doing a CRC calculation before programming the PMU
 294  * for HT availability, it could take a couple hundred ms more, so
 295  * max out at a 1 second (1000000us).
 296  */
 297 #undef PMU_MAX_TRANSITION_DLY
 298 #define PMU_MAX_TRANSITION_DLY 1000000
 299
 300 /* Value for ChipClockCSR during initial setup */
 301 #define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 302                                         SBSDIO_ALP_AVAIL_REQ)
 303
 304 /* Flags for SDH calls */
 305 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 306
 307 #define BRCMF_IDLE_ACTIVE       0       /* Do not request any SD clock change
 308                                          * when idle
 309                                          */
 310 #define BRCMF_IDLE_INTERVAL     1
 311
 312 #define KSO_WAIT_US 50
 313 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
 314
 315 /*
 316  * Conversion of 802.1D priority to precedence level
 317  */
 318 static uint prio2prec(u32 prio)
 319 {
 320         return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
 321                (prio^2) : prio;
 322 }
 323
 324 #ifdef DEBUG
 325 /* Device console log buffer state */
 326 struct brcmf_console {
 327         uint count;             /* Poll interval msec counter */
 328         uint log_addr;          /* Log struct address (fixed) */
 329         struct rte_log_le log_le;       /* Log struct (host copy) */
 330         uint bufsize;           /* Size of log buffer */
 331         u8 *buf;                /* Log buffer (host copy) */
 332         uint last;              /* Last buffer read index */
 333 };
 334
 335 struct brcmf_trap_info {
 336         __le32          type;
 337         __le32          epc;
 338         __le32          cpsr;
 339         __le32          spsr;
 340         __le32          r0;     /* a1 */
 341         __le32          r1;     /* a2 */
 342         __le32          r2;     /* a3 */
 343         __le32          r3;     /* a4 */
 344         __le32          r4;     /* v1 */
 345         __le32          r5;     /* v2 */
 346         __le32          r6;     /* v3 */
 347         __le32          r7;     /* v4 */
 348         __le32          r8;     /* v5 */
 349         __le32          r9;     /* sb/v6 */
 350         __le32          r10;    /* sl/v7 */
 351         __le32          r11;    /* fp/v8 */
 352         __le32          r12;    /* ip */
 353         __le32          r13;    /* sp */
 354         __le32          r14;    /* lr */
 355         __le32          pc;     /* r15 */
 356 };
 357 #endif                          /* DEBUG */
 358
 359 struct sdpcm_shared {
 360         u32 flags;
 361         u32 trap_addr;
 362         u32 assert_exp_addr;
 363         u32 assert_file_addr;
 364         u32 assert_line;
 365         u32 console_addr;       /* Address of struct rte_console */
 366         u32 msgtrace_addr;
 367         u8 tag[32];
 368         u32 brpt_addr;
 369 };
 370
 371 struct sdpcm_shared_le {
 372         __le32 flags;
 373         __le32 trap_addr;
 374         __le32 assert_exp_addr;
 375         __le32 assert_file_addr;
 376         __le32 assert_line;
 377         __le32 console_addr;    /* Address of struct rte_console */
 378         __le32 msgtrace_addr;
 379         u8 tag[32];
 380         __le32 brpt_addr;
 381 };
 382
 383 /* dongle SDIO bus specific header info */
 384 struct brcmf_sdio_hdrinfo {
 385         u8 seq_num;
 386         u8 channel;
 387         u16 len;
 388         u16 len_left;
 389         u16 len_nxtfrm;
 390         u8 dat_offset;
 391         bool lastfrm;
 392         u16 tail_pad;
 393 };
 394
 395 /*
 396  * hold counter variables
 397  */
 398 struct brcmf_sdio_count {
 399         uint intrcount;         /* Count of device interrupt callbacks */
 400         uint lastintrs;         /* Count as of last watchdog timer */
 401         uint pollcnt;           /* Count of active polls */
 402         uint regfails;          /* Count of R_REG failures */
 403         uint tx_sderrs;         /* Count of tx attempts with sd errors */
 404         uint fcqueued;          /* Tx packets that got queued */
 405         uint rxrtx;             /* Count of rtx requests (NAK to dongle) */
 406         uint rx_toolong;        /* Receive frames too long to receive */
 407         uint rxc_errors;        /* SDIO errors when reading control frames */
 408         uint rx_hdrfail;        /* SDIO errors on header reads */
 409         uint rx_badhdr;         /* Bad received headers (roosync?) */
 410         uint rx_badseq;         /* Mismatched rx sequence number */
 411         uint fc_rcvd;           /* Number of flow-control events received */
 412         uint fc_xoff;           /* Number which turned on flow-control */
 413         uint fc_xon;            /* Number which turned off flow-control */
 414         uint rxglomfail;        /* Failed deglom attempts */
 415         uint rxglomframes;      /* Number of glom frames (superframes) */
 416         uint rxglompkts;        /* Number of packets from glom frames */
 417         uint f2rxhdrs;          /* Number of header reads */
 418         uint f2rxdata;          /* Number of frame data reads */
 419         uint f2txdata;          /* Number of f2 frame writes */
 420         uint f1regdata;         /* Number of f1 register accesses */
 421         uint tickcnt;           /* Number of watchdog been schedule */
 422         ulong tx_ctlerrs;       /* Err of sending ctrl frames */
 423         ulong tx_ctlpkts;       /* Ctrl frames sent to dongle */
 424         ulong rx_ctlerrs;       /* Err of processing rx ctrl frames */
 425         ulong rx_ctlpkts;       /* Ctrl frames processed from dongle */
 426         ulong rx_readahead_cnt; /* packets where header read-ahead was used */
 427 };
 428
 429 /* misc chip info needed by some of the routines */
 430 /* Private data for SDIO bus interaction */
 431 struct brcmf_sdio {
 432         struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
 433         struct brcmf_chip *ci;  /* Chip info struct */
 434
 435         u32 hostintmask;        /* Copy of Host Interrupt Mask */
 436         atomic_t intstatus;     /* Intstatus bits (events) pending */
 437         atomic_t fcstate;       /* State of dongle flow-control */
 438
 439         uint blocksize;         /* Block size of SDIO transfers */
 440         uint roundup;           /* Max roundup limit */
 441
 442         struct pktq txq;        /* Queue length used for flow-control */
 443         u8 flowcontrol; /* per prio flow control bitmask */
 444         u8 tx_seq;              /* Transmit sequence number (next) */
 445         u8 tx_max;              /* Maximum transmit sequence allowed */
 446
 447         u8 *hdrbuf;             /* buffer for handling rx frame */
 448         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 449         u8 rx_seq;              /* Receive sequence number (expected) */
 450         struct brcmf_sdio_hdrinfo cur_read;
 451                                 /* info of current read frame */
 452         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 453         bool rxpending;         /* Data frame pending in dongle */
 454
 455         uint rxbound;           /* Rx frames to read before resched */
 456         uint txbound;           /* Tx frames to send before resched */
 457         uint txminmax;
 458
 459         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 460         struct sk_buff_head glom; /* Packet list for glommed superframe */
 461         uint glomerr;           /* Glom packet read errors */
 462
 463         u8 *rxbuf;              /* Buffer for receiving control packets */
 464         uint rxblen;            /* Allocated length of rxbuf */
 465         u8 *rxctl;              /* Aligned pointer into rxbuf */
 466         u8 *rxctl_orig;         /* pointer for freeing rxctl */
 467         uint rxlen;             /* Length of valid data in buffer */
 468         spinlock_t rxctl_lock;  /* protection lock for ctrl frame resources */
 469
 470         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 471
 472         bool intr;              /* Use interrupts */
 473         bool poll;              /* Use polling */
 474         atomic_t ipend;         /* Device interrupt is pending */
 475         uint spurious;          /* Count of spurious interrupts */
 476         uint pollrate;          /* Ticks between device polls */
 477         uint polltick;          /* Tick counter */
 478
 479 #ifdef DEBUG
 480         uint console_interval;
 481         struct brcmf_console console;   /* Console output polling support */
 482         uint console_addr;      /* Console address from shared struct */
 483 #endif                          /* DEBUG */
 484
 485         uint clkstate;          /* State of sd and backplane clock(s) */
 486         s32 idletime;           /* Control for activity timeout */
 487         s32 idlecount;          /* Activity timeout counter */
 488         s32 idleclock;          /* How to set bus driver when idle */
 489         bool rxflow_mode;       /* Rx flow control mode */
 490         bool rxflow;            /* Is rx flow control on */
 491         bool alp_only;          /* Don't use HT clock (ALP only) */
 492
 493         u8 *ctrl_frame_buf;
 494         u16 ctrl_frame_len;
 495         bool ctrl_frame_stat;
 496         int ctrl_frame_err;
 497
 498         spinlock_t txq_lock;            /* protect bus->txq */
 499         wait_queue_head_t ctrl_wait;
 500         wait_queue_head_t dcmd_resp_wait;
 501
 502         struct timer_list timer;
 503         struct completion watchdog_wait;
 504         struct task_struct *watchdog_tsk;
 505         bool wd_timer_valid;
 506         uint save_ms;
 507
 508         struct workqueue_struct *brcmf_wq;
 509         struct work_struct datawork;
 510         bool dpc_triggered;
 511         bool dpc_running;
 512
 513         bool txoff;             /* Transmit flow-controlled */
 514         struct brcmf_sdio_count sdcnt;
 515         bool sr_enabled; /* SaveRestore enabled */
 516         bool sleeping;
 517
 518         u8 tx_hdrlen;           /* sdio bus header length for tx packet */
 519         bool txglom;            /* host tx glomming enable flag */
 520         u16 head_align;         /* buffer pointer alignment */
 521         u16 sgentry_align;      /* scatter-gather buffer alignment */
 522 };
 523
 524 /* clkstate */
 525 #define CLK_NONE        0
 526 #define CLK_SDONLY      1
 527 #define CLK_PENDING     2
 528 #define CLK_AVAIL       3
 529
 530 #ifdef DEBUG
 531 static int qcount[NUMPRIO];
 532 #endif                          /* DEBUG */
 533
 534 #define DEFAULT_SDIO_DRIVE_STRENGTH     6       /* in milliamps */
 535
 536 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
 537
 538 /* Retry count for register access failures */
 539 static const uint retry_limit = 2;
 540
 541 /* Limit on rounding up frames */
 542 static const uint max_roundup = 512;
 543
 544 #define ALIGNMENT  4
 545
 546 enum brcmf_sdio_frmtype {
 547         BRCMF_SDIO_FT_NORMAL,
 548         BRCMF_SDIO_FT_SUPER,
 549         BRCMF_SDIO_FT_SUB,
 550 };
 551
 552 #define SDIOD_DRVSTR_KEY(chip, pmu)     (((chip) << 16) | (pmu))
 553
 554 /* SDIO Pad drive strength to select value mappings */
 555 struct sdiod_drive_str {
 556         u8 strength;    /* Pad Drive Strength in mA */
 557         u8 sel;         /* Chip-specific select value */
 558 };
 559
 560 /* SDIO Drive Strength to sel value table for PMU Rev 11 (1.8V) */
 561 static const struct sdiod_drive_str sdiod_drvstr_tab1_1v8[] = {
 562         {32, 0x6},
 563         {26, 0x7},
 564         {22, 0x4},
 565         {16, 0x5},
 566         {12, 0x2},
 567         {8, 0x3},
 568         {4, 0x0},
 569         {0, 0x1}
 570 };
 571
 572 /* SDIO Drive Strength to sel value table for PMU Rev 13 (1.8v) */
 573 static const struct sdiod_drive_str sdiod_drive_strength_tab5_1v8[] = {
 574         {6, 0x7},
 575         {5, 0x6},
 576         {4, 0x5},
 577         {3, 0x4},
 578         {2, 0x2},
 579         {1, 0x1},
 580         {0, 0x0}
 581 };
 582
 583 /* SDIO Drive Strength to sel value table for PMU Rev 17 (1.8v) */
 584 static const struct sdiod_drive_str sdiod_drvstr_tab6_1v8[] = {
 585         {3, 0x3},
 586         {2, 0x2},
 587         {1, 0x1},
 588         {0, 0x0} };
 589
 590 /* SDIO Drive Strength to sel value table for 43143 PMU Rev 17 (3.3V) */
 591 static const struct sdiod_drive_str sdiod_drvstr_tab2_3v3[] = {
 592         {16, 0x7},
 593         {12, 0x5},
 594         {8,  0x3},
 595         {4,  0x1}
 596 };
 597
 598 #define BCM43143_FIRMWARE_NAME          "brcm/brcmfmac43143-sdio.bin"
 599 #define BCM43143_NVRAM_NAME             "brcm/brcmfmac43143-sdio.txt"
 600 #define BCM43241B0_FIRMWARE_NAME        "brcm/brcmfmac43241b0-sdio.bin"
 601 #define BCM43241B0_NVRAM_NAME           "brcm/brcmfmac43241b0-sdio.txt"
 602 #define BCM43241B4_FIRMWARE_NAME        "brcm/brcmfmac43241b4-sdio.bin"
 603 #define BCM43241B4_NVRAM_NAME           "brcm/brcmfmac43241b4-sdio.txt"
 604 #define BCM43241B5_FIRMWARE_NAME        "brcm/brcmfmac43241b5-sdio.bin"
 605 #define BCM43241B5_NVRAM_NAME           "brcm/brcmfmac43241b5-sdio.txt"
 606 #define BCM4329_FIRMWARE_NAME           "brcm/brcmfmac4329-sdio.bin"
 607 #define BCM4329_NVRAM_NAME              "brcm/brcmfmac4329-sdio.txt"
 608 #define BCM4330_FIRMWARE_NAME           "brcm/brcmfmac4330-sdio.bin"
 609 #define BCM4330_NVRAM_NAME              "brcm/brcmfmac4330-sdio.txt"
 610 #define BCM4334_FIRMWARE_NAME           "brcm/brcmfmac4334-sdio.bin"
 611 #define BCM4334_NVRAM_NAME              "brcm/brcmfmac4334-sdio.txt"
 612 #define BCM43340_FIRMWARE_NAME          "brcm/brcmfmac43340-sdio.bin"
 613 #define BCM43340_NVRAM_NAME             "brcm/brcmfmac43340-sdio.txt"
 614 #define BCM4335_FIRMWARE_NAME           "brcm/brcmfmac4335-sdio.bin"
 615 #define BCM4335_NVRAM_NAME              "brcm/brcmfmac4335-sdio.txt"
 616 #define BCM43362_FIRMWARE_NAME          "brcm/brcmfmac43362-sdio.bin"
 617 #define BCM43362_NVRAM_NAME             "brcm/brcmfmac43362-sdio.txt"
 618 #define BCM4339_FIRMWARE_NAME           "brcm/brcmfmac4339-sdio.bin"
 619 #define BCM4339_NVRAM_NAME              "brcm/brcmfmac4339-sdio.txt"
 620 #define BCM43430_FIRMWARE_NAME          "brcm/brcmfmac43430-sdio.bin"
 621 #define BCM43430_NVRAM_NAME             "brcm/brcmfmac43430-sdio.txt"
 622 #define BCM43455_FIRMWARE_NAME          "brcm/brcmfmac43455-sdio.bin"
 623 #define BCM43455_NVRAM_NAME             "brcm/brcmfmac43455-sdio.txt"
 624 #define BCM4354_FIRMWARE_NAME           "brcm/brcmfmac4354-sdio.bin"
 625 #define BCM4354_NVRAM_NAME              "brcm/brcmfmac4354-sdio.txt"
 626
 627 MODULE_FIRMWARE(BCM43143_FIRMWARE_NAME);
 628 MODULE_FIRMWARE(BCM43143_NVRAM_NAME);
 629 MODULE_FIRMWARE(BCM43241B0_FIRMWARE_NAME);
 630 MODULE_FIRMWARE(BCM43241B0_NVRAM_NAME);
 631 MODULE_FIRMWARE(BCM43241B4_FIRMWARE_NAME);
 632 MODULE_FIRMWARE(BCM43241B4_NVRAM_NAME);
 633 MODULE_FIRMWARE(BCM43241B5_FIRMWARE_NAME);
 634 MODULE_FIRMWARE(BCM43241B5_NVRAM_NAME);
 635 MODULE_FIRMWARE(BCM4329_FIRMWARE_NAME);
 636 MODULE_FIRMWARE(BCM4329_NVRAM_NAME);
 637 MODULE_FIRMWARE(BCM4330_FIRMWARE_NAME);
 638 MODULE_FIRMWARE(BCM4330_NVRAM_NAME);
 639 MODULE_FIRMWARE(BCM4334_FIRMWARE_NAME);
 640 MODULE_FIRMWARE(BCM4334_NVRAM_NAME);
 641 MODULE_FIRMWARE(BCM43340_FIRMWARE_NAME);
 642 MODULE_FIRMWARE(BCM43340_NVRAM_NAME);
 643 MODULE_FIRMWARE(BCM4335_FIRMWARE_NAME);
 644 MODULE_FIRMWARE(BCM4335_NVRAM_NAME);
 645 MODULE_FIRMWARE(BCM43362_FIRMWARE_NAME);
 646 MODULE_FIRMWARE(BCM43362_NVRAM_NAME);
 647 MODULE_FIRMWARE(BCM4339_FIRMWARE_NAME);
 648 MODULE_FIRMWARE(BCM4339_NVRAM_NAME);
 649 MODULE_FIRMWARE(BCM43430_FIRMWARE_NAME);
 650 MODULE_FIRMWARE(BCM43430_NVRAM_NAME);
 651 MODULE_FIRMWARE(BCM43455_FIRMWARE_NAME);
 652 MODULE_FIRMWARE(BCM43455_NVRAM_NAME);
 653 MODULE_FIRMWARE(BCM4354_FIRMWARE_NAME);
 654 MODULE_FIRMWARE(BCM4354_NVRAM_NAME);
 655
 656 struct brcmf_firmware_names {
 657         u32 chipid;
 658         u32 revmsk;
 659         const char *bin;
 660         const char *nv;
 661 };
 662
 663 enum brcmf_firmware_type {
 664         BRCMF_FIRMWARE_BIN,
 665         BRCMF_FIRMWARE_NVRAM
 666 };
 667
 668 #define BRCMF_FIRMWARE_NVRAM(name) \
 669         name ## _FIRMWARE_NAME, name ## _NVRAM_NAME
 670
 671 static const struct brcmf_firmware_names brcmf_fwname_data[] = {
 672         { BRCM_CC_43143_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43143) },
 673         { BRCM_CC_43241_CHIP_ID, 0x0000001F, BRCMF_FIRMWARE_NVRAM(BCM43241B0) },
 674         { BRCM_CC_43241_CHIP_ID, 0x00000020, BRCMF_FIRMWARE_NVRAM(BCM43241B4) },
 675         { BRCM_CC_43241_CHIP_ID, 0xFFFFFFC0, BRCMF_FIRMWARE_NVRAM(BCM43241B5) },
 676         { BRCM_CC_4329_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4329) },
 677         { BRCM_CC_4330_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4330) },
 678         { BRCM_CC_4334_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4334) },
 679         { BRCM_CC_43340_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43340) },
 680         { BRCM_CC_4335_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4335) },
 681         { BRCM_CC_43362_CHIP_ID, 0xFFFFFFFE, BRCMF_FIRMWARE_NVRAM(BCM43362) },
 682         { BRCM_CC_4339_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4339) },
 683         { BRCM_CC_43430_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43430) },
 684         { BRCM_CC_4345_CHIP_ID, 0xFFFFFFC0, BRCMF_FIRMWARE_NVRAM(BCM43455) },
 685         { BRCM_CC_4354_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4354) }
 686 };
 687
 688 static int brcmf_sdio_get_fwnames(struct brcmf_chip *ci,
 689                                   struct brcmf_sdio_dev *sdiodev)
 690 {
 691         int i;
 692         char end;
 693
 694         for (i = 0; i < ARRAY_SIZE(brcmf_fwname_data); i++) {
 695                 if (brcmf_fwname_data[i].chipid == ci->chip &&
 696                     brcmf_fwname_data[i].revmsk & BIT(ci->chiprev))
 697                         break;
 698         }
 699
 700         if (i == ARRAY_SIZE(brcmf_fwname_data)) {
 701                 brcmf_err("Unknown chipid %d [%d]\n", ci->chip, ci->chiprev);
 702                 return -ENODEV;
 703         }
 704
 705         /* check if firmware path is provided by module parameter */
 706         if (brcmf_firmware_path[0] != '\0') {
 707                 strlcpy(sdiodev->fw_name, brcmf_firmware_path,
 708                         sizeof(sdiodev->fw_name));
 709                 strlcpy(sdiodev->nvram_name, brcmf_firmware_path,
 710                         sizeof(sdiodev->nvram_name));
 711
 712                 end = brcmf_firmware_path[strlen(brcmf_firmware_path) - 1];
 713                 if (end != '/') {
 714                         strlcat(sdiodev->fw_name, "/",
 715                                 sizeof(sdiodev->fw_name));
 716                         strlcat(sdiodev->nvram_name, "/",
 717                                 sizeof(sdiodev->nvram_name));
 718                 }
 719         }
 720         strlcat(sdiodev->fw_name, brcmf_fwname_data[i].bin,
 721                 sizeof(sdiodev->fw_name));
 722         strlcat(sdiodev->nvram_name, brcmf_fwname_data[i].nv,
 723                 sizeof(sdiodev->nvram_name));
 724
 725         return 0;
 726 }
 727
 728 static void pkt_align(struct sk_buff *p, int len, int align)
 729 {
 730         uint datalign;
 731         datalign = (unsigned long)(p->data);
 732         datalign = roundup(datalign, (align)) - datalign;
 733         if (datalign)
 734                 skb_pull(p, datalign);
 735         __skb_trim(p, len);
 736 }
 737
 738 /* To check if there's window offered */
 739 static bool data_ok(struct brcmf_sdio *bus)
 740 {
 741         return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
 742                ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
 743 }
 744
 745 /*
 746  * Reads a register in the SDIO hardware block. This block occupies a series of
 747  * adresses on the 32 bit backplane bus.
 748  */
 749 static int r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
 750 {
 751         struct brcmf_core *core;
 752         int ret;
 753
 754         core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
 755         *regvar = brcmf_sdiod_regrl(bus->sdiodev, core->base + offset, &ret);
 756
 757         return ret;
 758 }
 759
 760 static int w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
 761 {
 762         struct brcmf_core *core;
 763         int ret;
 764
 765         core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
 766         brcmf_sdiod_regwl(bus->sdiodev, core->base + reg_offset, regval, &ret);
 767
 768         return ret;
 769 }
 770
 771 static int
 772 brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
 773 {
 774         u8 wr_val = 0, rd_val, cmp_val, bmask;
 775         int err = 0;
 776         int try_cnt = 0;
 777
 778         brcmf_dbg(TRACE, "Enter: on=%d\n", on);
 779
 780         wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 781         /* 1st KSO write goes to AOS wake up core if device is asleep  */
 782         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 783                           wr_val, &err);
 784
 785         if (on) {
 786                 /* device WAKEUP through KSO:
 787                  * write bit 0 & read back until
 788                  * both bits 0 (kso bit) & 1 (dev on status) are set
 789                  */
 790                 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
 791                           SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
 792                 bmask = cmp_val;
 793                 usleep_range(2000, 3000);
 794         } else {
 795                 /* Put device to sleep, turn off KSO */
 796                 cmp_val = 0;
 797                 /* only check for bit0, bit1(dev on status) may not
 798                  * get cleared right away
 799                  */
 800                 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
 801         }
 802
 803         do {
 804                 /* reliable KSO bit set/clr:
 805                  * the sdiod sleep write access is synced to PMU 32khz clk
 806                  * just one write attempt may fail,
 807                  * read it back until it matches written value
 808                  */
 809                 rd_val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 810                                            &err);
 811                 if (((rd_val & bmask) == cmp_val) && !err)
 812                         break;
 813
 814                 udelay(KSO_WAIT_US);
 815                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 816                                   wr_val, &err);
 817         } while (try_cnt++ < MAX_KSO_ATTEMPTS);
 818
 819         if (try_cnt > 2)
 820                 brcmf_dbg(SDIO, "try_cnt=%d rd_val=0x%x err=%d\n", try_cnt,
 821                           rd_val, err);
 822
 823         if (try_cnt > MAX_KSO_ATTEMPTS)
 824                 brcmf_err("max tries: rd_val=0x%x err=%d\n", rd_val, err);
 825
 826         return err;
 827 }
 828
 829 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 830
 831 /* Turn backplane clock on or off */
 832 static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
 833 {
 834         int err;
 835         u8 clkctl, clkreq, devctl;
 836         unsigned long timeout;
 837
 838         brcmf_dbg(SDIO, "Enter\n");
 839
 840         clkctl = 0;
 841
 842         if (bus->sr_enabled) {
 843                 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
 844                 return 0;
 845         }
 846
 847         if (on) {
 848                 /* Request HT Avail */
 849                 clkreq =
 850                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 851
 852                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 853                                   clkreq, &err);
 854                 if (err) {
 855                         brcmf_err("HT Avail request error: %d\n", err);
 856                         return -EBADE;
 857                 }
 858
 859                 /* Check current status */
 860                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 861                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
 862                 if (err) {
 863                         brcmf_err("HT Avail read error: %d\n", err);
 864                         return -EBADE;
 865                 }
 866
 867                 /* Go to pending and await interrupt if appropriate */
 868                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 869                         /* Allow only clock-available interrupt */
 870                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 871                                                    SBSDIO_DEVICE_CTL, &err);
 872                         if (err) {
 873                                 brcmf_err("Devctl error setting CA: %d\n",
 874                                           err);
 875                                 return -EBADE;
 876                         }
 877
 878                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 879                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 880                                           devctl, &err);
 881                         brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
 882                         bus->clkstate = CLK_PENDING;
 883
 884                         return 0;
 885                 } else if (bus->clkstate == CLK_PENDING) {
 886                         /* Cancel CA-only interrupt filter */
 887                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 888                                                    SBSDIO_DEVICE_CTL, &err);
 889                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 890                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 891                                           devctl, &err);
 892                 }
 893
 894                 /* Otherwise, wait here (polling) for HT Avail */
 895                 timeout = jiffies +
 896                           msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
 897                 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 898                         clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 899                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 900                                                    &err);
 901                         if (time_after(jiffies, timeout))
 902                                 break;
 903                         else
 904                                 usleep_range(5000, 10000);
 905                 }
 906                 if (err) {
 907                         brcmf_err("HT Avail request error: %d\n", err);
 908                         return -EBADE;
 909                 }
 910                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 911                         brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
 912                                   PMU_MAX_TRANSITION_DLY, clkctl);
 913                         return -EBADE;
 914                 }
 915
 916                 /* Mark clock available */
 917                 bus->clkstate = CLK_AVAIL;
 918                 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
 919
 920 #if defined(DEBUG)
 921                 if (!bus->alp_only) {
 922                         if (SBSDIO_ALPONLY(clkctl))
 923                                 brcmf_err("HT Clock should be on\n");
 924                 }
 925 #endif                          /* defined (DEBUG) */
 926
 927         } else {
 928                 clkreq = 0;
 929
 930                 if (bus->clkstate == CLK_PENDING) {
 931                         /* Cancel CA-only interrupt filter */
 932                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 933                                                    SBSDIO_DEVICE_CTL, &err);
 934                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 935                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 936                                           devctl, &err);
 937                 }
 938
 939                 bus->clkstate = CLK_SDONLY;
 940                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 941                                   clkreq, &err);
 942                 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
 943                 if (err) {
 944                         brcmf_err("Failed access turning clock off: %d\n",
 945                                   err);
 946                         return -EBADE;
 947                 }
 948         }
 949         return 0;
 950 }
 951
 952 /* Change idle/active SD state */
 953 static int brcmf_sdio_sdclk(struct brcmf_sdio *bus, bool on)
 954 {
 955         brcmf_dbg(SDIO, "Enter\n");
 956
 957         if (on)
 958                 bus->clkstate = CLK_SDONLY;
 959         else
 960                 bus->clkstate = CLK_NONE;
 961
 962         return 0;
 963 }
 964
 965 /* Transition SD and backplane clock readiness */
 966 static int brcmf_sdio_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
 967 {
 968 #ifdef DEBUG
 969         uint oldstate = bus->clkstate;
 970 #endif                          /* DEBUG */
 971
 972         brcmf_dbg(SDIO, "Enter\n");
 973
 974         /* Early exit if we're already there */
 975         if (bus->clkstate == target)
 976                 return 0;
 977
 978         switch (target) {
 979         case CLK_AVAIL:
 980                 /* Make sure SD clock is available */
 981                 if (bus->clkstate == CLK_NONE)
 982                         brcmf_sdio_sdclk(bus, true);
 983                 /* Now request HT Avail on the backplane */
 984                 brcmf_sdio_htclk(bus, true, pendok);
 985                 break;
 986
 987         case CLK_SDONLY:
 988                 /* Remove HT request, or bring up SD clock */
 989                 if (bus->clkstate == CLK_NONE)
 990                         brcmf_sdio_sdclk(bus, true);
 991                 else if (bus->clkstate == CLK_AVAIL)
 992                         brcmf_sdio_htclk(bus, false, false);
 993                 else
 994                         brcmf_err("request for %d -> %d\n",
 995                                   bus->clkstate, target);
 996                 break;
 997
 998         case CLK_NONE:
 999                 /* Make sure to remove HT request */
1000                 if (bus->clkstate == CLK_AVAIL)
1001                         brcmf_sdio_htclk(bus, false, false);
1002                 /* Now remove the SD clock */
1003                 brcmf_sdio_sdclk(bus, false);
1004                 break;
1005         }
1006 #ifdef DEBUG
1007         brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
1008 #endif                          /* DEBUG */
1009
1010         return 0;
1011 }
1012
1013 static int
1014 brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
1015 {
1016         int err = 0;
1017         u8 clkcsr;
1018
1019         brcmf_dbg(SDIO, "Enter: request %s currently %s\n",
1020                   (sleep ? "SLEEP" : "WAKE"),
1021                   (bus->sleeping ? "SLEEP" : "WAKE"));
1022
1023         /* If SR is enabled control bus state with KSO */
1024         if (bus->sr_enabled) {
1025                 /* Done if we're already in the requested state */
1026                 if (sleep == bus->sleeping)
1027                         goto end;
1028
1029                 /* Going to sleep */
1030                 if (sleep) {
1031                         clkcsr = brcmf_sdiod_regrb(bus->sdiodev,
1032                                                    SBSDIO_FUNC1_CHIPCLKCSR,
1033                                                    &err);
1034                         if ((clkcsr & SBSDIO_CSR_MASK) == 0) {
1035                                 brcmf_dbg(SDIO, "no clock, set ALP\n");
1036                                 brcmf_sdiod_regwb(bus->sdiodev,
1037                                                   SBSDIO_FUNC1_CHIPCLKCSR,
1038                                                   SBSDIO_ALP_AVAIL_REQ, &err);
1039                         }
1040                         err = brcmf_sdio_kso_control(bus, false);
1041                 } else {
1042                         err = brcmf_sdio_kso_control(bus, true);
1043                 }
1044                 if (err) {
1045                         brcmf_err("error while changing bus sleep state %d\n",
1046                                   err);
1047                         goto done;
1048                 }
1049         }
1050
1051 end:
1052         /* control clocks */
1053         if (sleep) {
1054                 if (!bus->sr_enabled)
1055                         brcmf_sdio_clkctl(bus, CLK_NONE, pendok);
1056         } else {
1057                 brcmf_sdio_clkctl(bus, CLK_AVAIL, pendok);
1058                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
1059         }
1060         bus->sleeping = sleep;
1061         brcmf_dbg(SDIO, "new state %s\n",
1062                   (sleep ? "SLEEP" : "WAKE"));
1063 done:
1064         brcmf_dbg(SDIO, "Exit: err=%d\n", err);
1065         return err;
1066
1067 }
1068
1069 #ifdef DEBUG
1070 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
1071 {
1072         return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
1073 }
1074
1075 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
1076                                  struct sdpcm_shared *sh)
1077 {
1078         u32 addr = 0;
1079         int rv;
1080         u32 shaddr = 0;
1081         struct sdpcm_shared_le sh_le;
1082         __le32 addr_le;
1083
1084         sdio_claim_host(bus->sdiodev->func[1]);
1085         brcmf_sdio_bus_sleep(bus, false, false);
1086
1087         /*
1088          * Read last word in socram to determine
1089          * address of sdpcm_shared structure
1090          */
1091         shaddr = bus->ci->rambase + bus->ci->ramsize - 4;
1092         if (!bus->ci->rambase && brcmf_chip_sr_capable(bus->ci))
1093                 shaddr -= bus->ci->srsize;
1094         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr,
1095                                (u8 *)&addr_le, 4);
1096         if (rv < 0)
1097                 goto fail;
1098
1099         /*
1100          * Check if addr is valid.
1101          * NVRAM length at the end of memory should have been overwritten.
1102          */
1103         addr = le32_to_cpu(addr_le);
1104         if (!brcmf_sdio_valid_shared_address(addr)) {
1105                 brcmf_err("invalid sdpcm_shared address 0x%08X\n", addr);
1106                 rv = -EINVAL;
1107                 goto fail;
1108         }
1109
1110         brcmf_dbg(INFO, "sdpcm_shared address 0x%08X\n", addr);
1111
1112         /* Read hndrte_shared structure */
1113         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
1114                                sizeof(struct sdpcm_shared_le));
1115         if (rv < 0)
1116                 goto fail;
1117
1118         sdio_release_host(bus->sdiodev->func[1]);
1119
1120         /* Endianness */
1121         sh->flags = le32_to_cpu(sh_le.flags);
1122         sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
1123         sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
1124         sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
1125         sh->assert_line = le32_to_cpu(sh_le.assert_line);
1126         sh->console_addr = le32_to_cpu(sh_le.console_addr);
1127         sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
1128
1129         if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
1130                 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
1131                           SDPCM_SHARED_VERSION,
1132                           sh->flags & SDPCM_SHARED_VERSION_MASK);
1133                 return -EPROTO;
1134         }
1135         return 0;
1136
1137 fail:
1138         brcmf_err("unable to obtain sdpcm_shared info: rv=%d (addr=0x%x)\n",
1139                   rv, addr);
1140         sdio_release_host(bus->sdiodev->func[1]);
1141         return rv;
1142 }
1143
1144 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1145 {
1146         struct sdpcm_shared sh;
1147
1148         if (brcmf_sdio_readshared(bus, &sh) == 0)
1149                 bus->console_addr = sh.console_addr;
1150 }
1151 #else
1152 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1153 {
1154 }
1155 #endif /* DEBUG */
1156
1157 static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus)
1158 {
1159         u32 intstatus = 0;
1160         u32 hmb_data;
1161         u8 fcbits;
1162         int ret;
1163
1164         brcmf_dbg(SDIO, "Enter\n");
1165
1166         /* Read mailbox data and ack that we did so */
1167         ret = r_sdreg32(bus, &hmb_data,
1168                         offsetof(struct sdpcmd_regs, tohostmailboxdata));
1169
1170         if (ret == 0)
1171                 w_sdreg32(bus, SMB_INT_ACK,
1172                           offsetof(struct sdpcmd_regs, tosbmailbox));
1173         bus->sdcnt.f1regdata += 2;
1174
1175         /* Dongle recomposed rx frames, accept them again */
1176         if (hmb_data & HMB_DATA_NAKHANDLED) {
1177                 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
1178                           bus->rx_seq);
1179                 if (!bus->rxskip)
1180                         brcmf_err("unexpected NAKHANDLED!\n");
1181
1182                 bus->rxskip = false;
1183                 intstatus |= I_HMB_FRAME_IND;
1184         }
1185
1186         /*
1187          * DEVREADY does not occur with gSPI.
1188          */
1189         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
1190                 bus->sdpcm_ver =
1191                     (hmb_data & HMB_DATA_VERSION_MASK) >>
1192                     HMB_DATA_VERSION_SHIFT;
1193                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
1194                         brcmf_err("Version mismatch, dongle reports %d, "
1195                                   "expecting %d\n",
1196                                   bus->sdpcm_ver, SDPCM_PROT_VERSION);
1197                 else
1198                         brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
1199                                   bus->sdpcm_ver);
1200
1201                 /*
1202                  * Retrieve console state address now that firmware should have
1203                  * updated it.
1204                  */
1205                 brcmf_sdio_get_console_addr(bus);
1206         }
1207
1208         /*
1209          * Flow Control has been moved into the RX headers and this out of band
1210          * method isn't used any more.
1211          * remaining backward compatible with older dongles.
1212          */
1213         if (hmb_data & HMB_DATA_FC) {
1214                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1215                                                         HMB_DATA_FCDATA_SHIFT;
1216
1217                 if (fcbits & ~bus->flowcontrol)
1218                         bus->sdcnt.fc_xoff++;
1219
1220                 if (bus->flowcontrol & ~fcbits)
1221                         bus->sdcnt.fc_xon++;
1222
1223                 bus->sdcnt.fc_rcvd++;
1224                 bus->flowcontrol = fcbits;
1225         }
1226
1227         /* Shouldn't be any others */
1228         if (hmb_data & ~(HMB_DATA_DEVREADY |
1229                          HMB_DATA_NAKHANDLED |
1230                          HMB_DATA_FC |
1231                          HMB_DATA_FWREADY |
1232                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1233                 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1234                           hmb_data);
1235
1236         return intstatus;
1237 }
1238
1239 static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1240 {
1241         uint retries = 0;
1242         u16 lastrbc;
1243         u8 hi, lo;
1244         int err;
1245
1246         brcmf_err("%sterminate frame%s\n",
1247                   abort ? "abort command, " : "",
1248                   rtx ? ", send NAK" : "");
1249
1250         if (abort)
1251                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
1252
1253         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1254                           SFC_RF_TERM, &err);
1255         bus->sdcnt.f1regdata++;
1256
1257         /* Wait until the packet has been flushed (device/FIFO stable) */
1258         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1259                 hi = brcmf_sdiod_regrb(bus->sdiodev,
1260                                        SBSDIO_FUNC1_RFRAMEBCHI, &err);
1261                 lo = brcmf_sdiod_regrb(bus->sdiodev,
1262                                        SBSDIO_FUNC1_RFRAMEBCLO, &err);
1263                 bus->sdcnt.f1regdata += 2;
1264
1265                 if ((hi == 0) && (lo == 0))
1266                         break;
1267
1268                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1269                         brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1270                                   lastrbc, (hi << 8) + lo);
1271                 }
1272                 lastrbc = (hi << 8) + lo;
1273         }
1274
1275         if (!retries)
1276                 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1277         else
1278                 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1279
1280         if (rtx) {
1281                 bus->sdcnt.rxrtx++;
1282                 err = w_sdreg32(bus, SMB_NAK,
1283                                 offsetof(struct sdpcmd_regs, tosbmailbox));
1284
1285                 bus->sdcnt.f1regdata++;
1286                 if (err == 0)
1287                         bus->rxskip = true;
1288         }
1289
1290         /* Clear partial in any case */
1291         bus->cur_read.len = 0;
1292 }
1293
1294 static void brcmf_sdio_txfail(struct brcmf_sdio *bus)
1295 {
1296         struct brcmf_sdio_dev *sdiodev = bus->sdiodev;
1297         u8 i, hi, lo;
1298
1299         /* On failure, abort the command and terminate the frame */
1300         brcmf_err("sdio error, abort command and terminate frame\n");
1301         bus->sdcnt.tx_sderrs++;
1302
1303         brcmf_sdiod_abort(sdiodev, SDIO_FUNC_2);
1304         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
1305         bus->sdcnt.f1regdata++;
1306
1307         for (i = 0; i < 3; i++) {
1308                 hi = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
1309                 lo = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
1310                 bus->sdcnt.f1regdata += 2;
1311                 if ((hi == 0) && (lo == 0))
1312                         break;
1313         }
1314 }
1315
1316 /* return total length of buffer chain */
1317 static uint brcmf_sdio_glom_len(struct brcmf_sdio *bus)
1318 {
1319         struct sk_buff *p;
1320         uint total;
1321
1322         total = 0;
1323         skb_queue_walk(&bus->glom, p)
1324                 total += p->len;
1325         return total;
1326 }
1327
1328 static void brcmf_sdio_free_glom(struct brcmf_sdio *bus)
1329 {
1330         struct sk_buff *cur, *next;
1331
1332         skb_queue_walk_safe(&bus->glom, cur, next) {
1333                 skb_unlink(cur, &bus->glom);
1334                 brcmu_pkt_buf_free_skb(cur);
1335         }
1336 }
1337
1338 /**
1339  * brcmfmac sdio bus specific header
1340  * This is the lowest layer header wrapped on the packets transmitted between
1341  * host and WiFi dongle which contains information needed for SDIO core and
1342  * firmware
1343  *
1344  * It consists of 3 parts: hardware header, hardware extension header and
1345  * software header
1346  * hardware header (frame tag) - 4 bytes
1347  * Byte 0~1: Frame length
1348  * Byte 2~3: Checksum, bit-wise inverse of frame length
1349  * hardware extension header - 8 bytes
1350  * Tx glom mode only, N/A for Rx or normal Tx
1351  * Byte 0~1: Packet length excluding hw frame tag
1352  * Byte 2: Reserved
1353  * Byte 3: Frame flags, bit 0: last frame indication
1354  * Byte 4~5: Reserved
1355  * Byte 6~7: Tail padding length
1356  * software header - 8 bytes
1357  * Byte 0: Rx/Tx sequence number
1358  * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1359  * Byte 2: Length of next data frame, reserved for Tx
1360  * Byte 3: Data offset
1361  * Byte 4: Flow control bits, reserved for Tx
1362  * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1363  * Byte 6~7: Reserved
1364  */
1365 #define SDPCM_HWHDR_LEN                 4
1366 #define SDPCM_HWEXT_LEN                 8
1367 #define SDPCM_SWHDR_LEN                 8
1368 #define SDPCM_HDRLEN                    (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1369 /* software header */
1370 #define SDPCM_SEQ_MASK                  0x000000ff
1371 #define SDPCM_SEQ_WRAP                  256
1372 #define SDPCM_CHANNEL_MASK              0x00000f00
1373 #define SDPCM_CHANNEL_SHIFT             8
1374 #define SDPCM_CONTROL_CHANNEL           0       /* Control */
1375 #define SDPCM_EVENT_CHANNEL             1       /* Asyc Event Indication */
1376 #define SDPCM_DATA_CHANNEL              2       /* Data Xmit/Recv */
1377 #define SDPCM_GLOM_CHANNEL              3       /* Coalesced packets */
1378 #define SDPCM_TEST_CHANNEL              15      /* Test/debug packets */
1379 #define SDPCM_GLOMDESC(p)               (((u8 *)p)[1] & 0x80)
1380 #define SDPCM_NEXTLEN_MASK              0x00ff0000
1381 #define SDPCM_NEXTLEN_SHIFT             16
1382 #define SDPCM_DOFFSET_MASK              0xff000000
1383 #define SDPCM_DOFFSET_SHIFT             24
1384 #define SDPCM_FCMASK_MASK               0x000000ff
1385 #define SDPCM_WINDOW_MASK               0x0000ff00
1386 #define SDPCM_WINDOW_SHIFT              8
1387
1388 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1389 {
1390         u32 hdrvalue;
1391         hdrvalue = *(u32 *)swheader;
1392         return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1393 }
1394
1395 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1396                               struct brcmf_sdio_hdrinfo *rd,
1397                               enum brcmf_sdio_frmtype type)
1398 {
1399         u16 len, checksum;
1400         u8 rx_seq, fc, tx_seq_max;
1401         u32 swheader;
1402
1403         trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1404
1405         /* hw header */
1406         len = get_unaligned_le16(header);
1407         checksum = get_unaligned_le16(header + sizeof(u16));
1408         /* All zero means no more to read */
1409         if (!(len | checksum)) {
1410                 bus->rxpending = false;
1411                 return -ENODATA;
1412         }
1413         if ((u16)(~(len ^ checksum))) {
1414                 brcmf_err("HW header checksum error\n");
1415                 bus->sdcnt.rx_badhdr++;
1416                 brcmf_sdio_rxfail(bus, false, false);
1417                 return -EIO;
1418         }
1419         if (len < SDPCM_HDRLEN) {
1420                 brcmf_err("HW header length error\n");
1421                 return -EPROTO;
1422         }
1423         if (type == BRCMF_SDIO_FT_SUPER &&
1424             (roundup(len, bus->blocksize) != rd->len)) {
1425                 brcmf_err("HW superframe header length error\n");
1426                 return -EPROTO;
1427         }
1428         if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1429                 brcmf_err("HW subframe header length error\n");
1430                 return -EPROTO;
1431         }
1432         rd->len = len;
1433
1434         /* software header */
1435         header += SDPCM_HWHDR_LEN;
1436         swheader = le32_to_cpu(*(__le32 *)header);
1437         if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1438                 brcmf_err("Glom descriptor found in superframe head\n");
1439                 rd->len = 0;
1440                 return -EINVAL;
1441         }
1442         rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1443         rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1444         if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1445             type != BRCMF_SDIO_FT_SUPER) {
1446                 brcmf_err("HW header length too long\n");
1447                 bus->sdcnt.rx_toolong++;
1448                 brcmf_sdio_rxfail(bus, false, false);
1449                 rd->len = 0;
1450                 return -EPROTO;
1451         }
1452         if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1453                 brcmf_err("Wrong channel for superframe\n");
1454                 rd->len = 0;
1455                 return -EINVAL;
1456         }
1457         if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1458             rd->channel != SDPCM_EVENT_CHANNEL) {
1459                 brcmf_err("Wrong channel for subframe\n");
1460                 rd->len = 0;
1461                 return -EINVAL;
1462         }
1463         rd->dat_offset = brcmf_sdio_getdatoffset(header);
1464         if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1465                 brcmf_err("seq %d: bad data offset\n", rx_seq);
1466                 bus->sdcnt.rx_badhdr++;
1467                 brcmf_sdio_rxfail(bus, false, false);
1468                 rd->len = 0;
1469                 return -ENXIO;
1470         }
1471         if (rd->seq_num != rx_seq) {
1472                 brcmf_err("seq %d: sequence number error, expect %d\n",
1473                           rx_seq, rd->seq_num);
1474                 bus->sdcnt.rx_badseq++;
1475                 rd->seq_num = rx_seq;
1476         }
1477         /* no need to check the reset for subframe */
1478         if (type == BRCMF_SDIO_FT_SUB)
1479                 return 0;
1480         rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1481         if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1482                 /* only warm for NON glom packet */
1483                 if (rd->channel != SDPCM_GLOM_CHANNEL)
1484                         brcmf_err("seq %d: next length error\n", rx_seq);
1485                 rd->len_nxtfrm = 0;
1486         }
1487         swheader = le32_to_cpu(*(__le32 *)(header + 4));
1488         fc = swheader & SDPCM_FCMASK_MASK;
1489         if (bus->flowcontrol != fc) {
1490                 if (~bus->flowcontrol & fc)
1491                         bus->sdcnt.fc_xoff++;
1492                 if (bus->flowcontrol & ~fc)
1493                         bus->sdcnt.fc_xon++;
1494                 bus->sdcnt.fc_rcvd++;
1495                 bus->flowcontrol = fc;
1496         }
1497         tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1498         if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1499                 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1500                 tx_seq_max = bus->tx_seq + 2;
1501         }
1502         bus->tx_max = tx_seq_max;
1503
1504         return 0;
1505 }
1506
1507 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1508 {
1509         *(__le16 *)header = cpu_to_le16(frm_length);
1510         *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1511 }
1512
1513 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1514                               struct brcmf_sdio_hdrinfo *hd_info)
1515 {
1516         u32 hdrval;
1517         u8 hdr_offset;
1518
1519         brcmf_sdio_update_hwhdr(header, hd_info->len);
1520         hdr_offset = SDPCM_HWHDR_LEN;
1521
1522         if (bus->txglom) {
1523                 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1524                 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1525                 hdrval = (u16)hd_info->tail_pad << 16;
1526                 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1527                 hdr_offset += SDPCM_HWEXT_LEN;
1528         }
1529
1530         hdrval = hd_info->seq_num;
1531         hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1532                   SDPCM_CHANNEL_MASK;
1533         hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1534                   SDPCM_DOFFSET_MASK;
1535         *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1536         *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1537         trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1538 }
1539
1540 static u8 brcmf_sdio_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1541 {
1542         u16 dlen, totlen;
1543         u8 *dptr, num = 0;
1544         u16 sublen;
1545         struct sk_buff *pfirst, *pnext;
1546
1547         int errcode;
1548         u8 doff, sfdoff;
1549
1550         struct brcmf_sdio_hdrinfo rd_new;
1551
1552         /* If packets, issue read(s) and send up packet chain */
1553         /* Return sequence numbers consumed? */
1554
1555         brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1556                   bus->glomd, skb_peek(&bus->glom));
1557
1558         /* If there's a descriptor, generate the packet chain */
1559         if (bus->glomd) {
1560                 pfirst = pnext = NULL;
1561                 dlen = (u16) (bus->glomd->len);
1562                 dptr = bus->glomd->data;
1563                 if (!dlen || (dlen & 1)) {
1564                         brcmf_err("bad glomd len(%d), ignore descriptor\n",
1565                                   dlen);
1566                         dlen = 0;
1567                 }
1568
1569                 for (totlen = num = 0; dlen; num++) {
1570                         /* Get (and move past) next length */
1571                         sublen = get_unaligned_le16(dptr);
1572                         dlen -= sizeof(u16);
1573                         dptr += sizeof(u16);
1574                         if ((sublen < SDPCM_HDRLEN) ||
1575                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1576                                 brcmf_err("descriptor len %d bad: %d\n",
1577                                           num, sublen);
1578                                 pnext = NULL;
1579                                 break;
1580                         }
1581                         if (sublen % bus->sgentry_align) {
1582                                 brcmf_err("sublen %d not multiple of %d\n",
1583                                           sublen, bus->sgentry_align);
1584                         }
1585                         totlen += sublen;
1586
1587                         /* For last frame, adjust read len so total
1588                                  is a block multiple */
1589                         if (!dlen) {
1590                                 sublen +=
1591                                     (roundup(totlen, bus->blocksize) - totlen);
1592                                 totlen = roundup(totlen, bus->blocksize);
1593                         }
1594
1595                         /* Allocate/chain packet for next subframe */
1596                         pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1597                         if (pnext == NULL) {
1598                                 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1599                                           num, sublen);
1600                                 break;
1601                         }
1602                         skb_queue_tail(&bus->glom, pnext);
1603
1604                         /* Adhere to start alignment requirements */
1605                         pkt_align(pnext, sublen, bus->sgentry_align);
1606                 }
1607
1608                 /* If all allocations succeeded, save packet chain
1609                          in bus structure */
1610                 if (pnext) {
1611                         brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1612                                   totlen, num);
1613                         if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1614                             totlen != bus->cur_read.len) {
1615                                 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1616                                           bus->cur_read.len, totlen, rxseq);
1617                         }
1618                         pfirst = pnext = NULL;
1619                 } else {
1620                         brcmf_sdio_free_glom(bus);
1621                         num = 0;
1622                 }
1623
1624                 /* Done with descriptor packet */
1625                 brcmu_pkt_buf_free_skb(bus->glomd);
1626                 bus->glomd = NULL;
1627                 bus->cur_read.len = 0;
1628         }
1629
1630         /* Ok -- either we just generated a packet chain,
1631                  or had one from before */
1632         if (!skb_queue_empty(&bus->glom)) {
1633                 if (BRCMF_GLOM_ON()) {
1634                         brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1635                         skb_queue_walk(&bus->glom, pnext) {
1636                                 brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1637                                           pnext, (u8 *) (pnext->data),
1638                                           pnext->len, pnext->len);
1639                         }
1640                 }
1641
1642                 pfirst = skb_peek(&bus->glom);
1643                 dlen = (u16) brcmf_sdio_glom_len(bus);
1644
1645                 /* Do an SDIO read for the superframe.  Configurable iovar to
1646                  * read directly into the chained packet, or allocate a large
1647                  * packet and and copy into the chain.
1648                  */
1649                 sdio_claim_host(bus->sdiodev->func[1]);
1650                 errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1651                                                  &bus->glom, dlen);
1652                 sdio_release_host(bus->sdiodev->func[1]);
1653                 bus->sdcnt.f2rxdata++;
1654
1655                 /* On failure, kill the superframe, allow a couple retries */
1656                 if (errcode < 0) {
1657                         brcmf_err("glom read of %d bytes failed: %d\n",
1658                                   dlen, errcode);
1659
1660                         sdio_claim_host(bus->sdiodev->func[1]);
1661                         if (bus->glomerr++ < 3) {
1662                                 brcmf_sdio_rxfail(bus, true, true);
1663                         } else {
1664                                 bus->glomerr = 0;
1665                                 brcmf_sdio_rxfail(bus, true, false);
1666                                 bus->sdcnt.rxglomfail++;
1667                                 brcmf_sdio_free_glom(bus);
1668                         }
1669                         sdio_release_host(bus->sdiodev->func[1]);
1670                         return 0;
1671                 }
1672
1673                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1674                                    pfirst->data, min_t(int, pfirst->len, 48),
1675                                    "SUPERFRAME:\n");
1676
1677                 rd_new.seq_num = rxseq;
1678                 rd_new.len = dlen;
1679                 sdio_claim_host(bus->sdiodev->func[1]);
1680                 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1681                                              BRCMF_SDIO_FT_SUPER);
1682                 sdio_release_host(bus->sdiodev->func[1]);
1683                 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1684
1685                 /* Remove superframe header, remember offset */
1686                 skb_pull(pfirst, rd_new.dat_offset);
1687                 sfdoff = rd_new.dat_offset;
1688                 num = 0;
1689
1690                 /* Validate all the subframe headers */
1691                 skb_queue_walk(&bus->glom, pnext) {
1692                         /* leave when invalid subframe is found */
1693                         if (errcode)
1694                                 break;
1695
1696                         rd_new.len = pnext->len;
1697                         rd_new.seq_num = rxseq++;
1698                         sdio_claim_host(bus->sdiodev->func[1]);
1699                         errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1700                                                      BRCMF_SDIO_FT_SUB);
1701                         sdio_release_host(bus->sdiodev->func[1]);
1702                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1703                                            pnext->data, 32, "subframe:\n");
1704
1705                         num++;
1706                 }
1707
1708                 if (errcode) {
1709                         /* Terminate frame on error, request
1710                                  a couple retries */
1711                         sdio_claim_host(bus->sdiodev->func[1]);
1712                         if (bus->glomerr++ < 3) {
1713                                 /* Restore superframe header space */
1714                                 skb_push(pfirst, sfdoff);
1715                                 brcmf_sdio_rxfail(bus, true, true);
1716                         } else {
1717                                 bus->glomerr = 0;
1718                                 brcmf_sdio_rxfail(bus, true, false);
1719                                 bus->sdcnt.rxglomfail++;
1720                                 brcmf_sdio_free_glom(bus);
1721                         }
1722                         sdio_release_host(bus->sdiodev->func[1]);
1723                         bus->cur_read.len = 0;
1724                         return 0;
1725                 }
1726
1727                 /* Basic SD framing looks ok - process each packet (header) */
1728
1729                 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1730                         dptr = (u8 *) (pfirst->data);
1731                         sublen = get_unaligned_le16(dptr);
1732                         doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1733
1734                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1735                                            dptr, pfirst->len,
1736                                            "Rx Subframe Data:\n");
1737
1738                         __skb_trim(pfirst, sublen);
1739                         skb_pull(pfirst, doff);
1740
1741                         if (pfirst->len == 0) {
1742                                 skb_unlink(pfirst, &bus->glom);
1743                                 brcmu_pkt_buf_free_skb(pfirst);
1744                                 continue;
1745                         }
1746
1747                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1748                                            pfirst->data,
1749                                            min_t(int, pfirst->len, 32),
1750                                            "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1751                                            bus->glom.qlen, pfirst, pfirst->data,
1752                                            pfirst->len, pfirst->next,
1753                                            pfirst->prev);
1754                         skb_unlink(pfirst, &bus->glom);
1755                         brcmf_rx_frame(bus->sdiodev->dev, pfirst);
1756                         bus->sdcnt.rxglompkts++;
1757                 }
1758
1759                 bus->sdcnt.rxglomframes++;
1760         }
1761         return num;
1762 }
1763
1764 static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1765                                      bool *pending)
1766 {
1767         DECLARE_WAITQUEUE(wait, current);
1768         int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1769
1770         /* Wait until control frame is available */
1771         add_wait_queue(&bus->dcmd_resp_wait, &wait);
1772         set_current_state(TASK_INTERRUPTIBLE);
1773
1774         while (!(*condition) && (!signal_pending(current) && timeout))
1775                 timeout = schedule_timeout(timeout);
1776
1777         if (signal_pending(current))
1778                 *pending = true;
1779
1780         set_current_state(TASK_RUNNING);
1781         remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1782
1783         return timeout;
1784 }
1785
1786 static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio *bus)
1787 {
1788         if (waitqueue_active(&bus->dcmd_resp_wait))
1789                 wake_up_interruptible(&bus->dcmd_resp_wait);
1790
1791         return 0;
1792 }
1793 static void
1794 brcmf_sdio_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1795 {
1796         uint rdlen, pad;
1797         u8 *buf = NULL, *rbuf;
1798         int sdret;
1799
1800         brcmf_dbg(TRACE, "Enter\n");
1801
1802         if (bus->rxblen)
1803                 buf = vzalloc(bus->rxblen);
1804         if (!buf)
1805                 goto done;
1806
1807         rbuf = bus->rxbuf;
1808         pad = ((unsigned long)rbuf % bus->head_align);
1809         if (pad)
1810                 rbuf += (bus->head_align - pad);
1811
1812         /* Copy the already-read portion over */
1813         memcpy(buf, hdr, BRCMF_FIRSTREAD);
1814         if (len <= BRCMF_FIRSTREAD)
1815                 goto gotpkt;
1816
1817         /* Raise rdlen to next SDIO block to avoid tail command */
1818         rdlen = len - BRCMF_FIRSTREAD;
1819         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1820                 pad = bus->blocksize - (rdlen % bus->blocksize);
1821                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1822                     ((len + pad) < bus->sdiodev->bus_if->maxctl))
1823                         rdlen += pad;
1824         } else if (rdlen % bus->head_align) {
1825                 rdlen += bus->head_align - (rdlen % bus->head_align);
1826         }
1827
1828         /* Drop if the read is too big or it exceeds our maximum */
1829         if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1830                 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1831                           rdlen, bus->sdiodev->bus_if->maxctl);
1832                 brcmf_sdio_rxfail(bus, false, false);
1833                 goto done;
1834         }
1835
1836         if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1837                 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1838                           len, len - doff, bus->sdiodev->bus_if->maxctl);
1839                 bus->sdcnt.rx_toolong++;
1840                 brcmf_sdio_rxfail(bus, false, false);
1841                 goto done;
1842         }
1843
1844         /* Read remain of frame body */
1845         sdret = brcmf_sdiod_recv_buf(bus->sdiodev, rbuf, rdlen);
1846         bus->sdcnt.f2rxdata++;
1847
1848         /* Control frame failures need retransmission */
1849         if (sdret < 0) {
1850                 brcmf_err("read %d control bytes failed: %d\n",
1851                           rdlen, sdret);
1852                 bus->sdcnt.rxc_errors++;
1853                 brcmf_sdio_rxfail(bus, true, true);
1854                 goto done;
1855         } else
1856                 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1857
1858 gotpkt:
1859
1860         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1861                            buf, len, "RxCtrl:\n");
1862
1863         /* Point to valid data and indicate its length */
1864         spin_lock_bh(&bus->rxctl_lock);
1865         if (bus->rxctl) {
1866                 brcmf_err("last control frame is being processed.\n");
1867                 spin_unlock_bh(&bus->rxctl_lock);
1868                 vfree(buf);
1869                 goto done;
1870         }
1871         bus->rxctl = buf + doff;
1872         bus->rxctl_orig = buf;
1873         bus->rxlen = len - doff;
1874         spin_unlock_bh(&bus->rxctl_lock);
1875
1876 done:
1877         /* Awake any waiters */
1878         brcmf_sdio_dcmd_resp_wake(bus);
1879 }
1880
1881 /* Pad read to blocksize for efficiency */
1882 static void brcmf_sdio_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1883 {
1884         if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1885                 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1886                 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1887                     *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1888                         *rdlen += *pad;
1889         } else if (*rdlen % bus->head_align) {
1890                 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1891         }
1892 }
1893
1894 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1895 {
1896         struct sk_buff *pkt;            /* Packet for event or data frames */
1897         u16 pad;                /* Number of pad bytes to read */
1898         uint rxleft = 0;        /* Remaining number of frames allowed */
1899         int ret;                /* Return code from calls */
1900         uint rxcount = 0;       /* Total frames read */
1901         struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1902         u8 head_read = 0;
1903
1904         brcmf_dbg(TRACE, "Enter\n");
1905
1906         /* Not finished unless we encounter no more frames indication */
1907         bus->rxpending = true;
1908
1909         for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1910              !bus->rxskip && rxleft && bus->sdiodev->state == BRCMF_SDIOD_DATA;
1911              rd->seq_num++, rxleft--) {
1912
1913                 /* Handle glomming separately */
1914                 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1915                         u8 cnt;
1916                         brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1917                                   bus->glomd, skb_peek(&bus->glom));
1918                         cnt = brcmf_sdio_rxglom(bus, rd->seq_num);
1919                         brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1920                         rd->seq_num += cnt - 1;
1921                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1922                         continue;
1923                 }
1924
1925                 rd->len_left = rd->len;
1926                 /* read header first for unknow frame length */
1927                 sdio_claim_host(bus->sdiodev->func[1]);
1928                 if (!rd->len) {
1929                         ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1930                                                    bus->rxhdr, BRCMF_FIRSTREAD);
1931                         bus->sdcnt.f2rxhdrs++;
1932                         if (ret < 0) {
1933                                 brcmf_err("RXHEADER FAILED: %d\n",
1934                                           ret);
1935                                 bus->sdcnt.rx_hdrfail++;
1936                                 brcmf_sdio_rxfail(bus, true, true);
1937                                 sdio_release_host(bus->sdiodev->func[1]);
1938                                 continue;
1939                         }
1940
1941                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1942                                            bus->rxhdr, SDPCM_HDRLEN,
1943                                            "RxHdr:\n");
1944
1945                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1946                                                BRCMF_SDIO_FT_NORMAL)) {
1947                                 sdio_release_host(bus->sdiodev->func[1]);
1948                                 if (!bus->rxpending)
1949                                         break;
1950                                 else
1951                                         continue;
1952                         }
1953
1954                         if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1955                                 brcmf_sdio_read_control(bus, bus->rxhdr,
1956                                                         rd->len,
1957                                                         rd->dat_offset);
1958                                 /* prepare the descriptor for the next read */
1959                                 rd->len = rd->len_nxtfrm << 4;
1960                                 rd->len_nxtfrm = 0;
1961                                 /* treat all packet as event if we don't know */
1962                                 rd->channel = SDPCM_EVENT_CHANNEL;
1963                                 sdio_release_host(bus->sdiodev->func[1]);
1964                                 continue;
1965                         }
1966                         rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1967                                        rd->len - BRCMF_FIRSTREAD : 0;
1968                         head_read = BRCMF_FIRSTREAD;
1969                 }
1970
1971                 brcmf_sdio_pad(bus, &pad, &rd->len_left);
1972
1973                 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1974                                             bus->head_align);
1975                 if (!pkt) {
1976                         /* Give up on data, request rtx of events */
1977                         brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1978                         brcmf_sdio_rxfail(bus, false,
1979                                             RETRYCHAN(rd->channel));
1980                         sdio_release_host(bus->sdiodev->func[1]);
1981                         continue;
1982                 }
1983                 skb_pull(pkt, head_read);
1984                 pkt_align(pkt, rd->len_left, bus->head_align);
1985
1986                 ret = brcmf_sdiod_recv_pkt(bus->sdiodev, pkt);
1987                 bus->sdcnt.f2rxdata++;
1988                 sdio_release_host(bus->sdiodev->func[1]);
1989
1990                 if (ret < 0) {
1991                         brcmf_err("read %d bytes from channel %d failed: %d\n",
1992                                   rd->len, rd->channel, ret);
1993                         brcmu_pkt_buf_free_skb(pkt);
1994                         sdio_claim_host(bus->sdiodev->func[1]);
1995                         brcmf_sdio_rxfail(bus, true,
1996                                             RETRYCHAN(rd->channel));
1997                         sdio_release_host(bus->sdiodev->func[1]);
1998                         continue;
1999                 }
2000
2001                 if (head_read) {
2002                         skb_push(pkt, head_read);
2003                         memcpy(pkt->data, bus->rxhdr, head_read);
2004                         head_read = 0;
2005                 } else {
2006                         memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
2007                         rd_new.seq_num = rd->seq_num;
2008                         sdio_claim_host(bus->sdiodev->func[1]);
2009                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
2010                                                BRCMF_SDIO_FT_NORMAL)) {
2011                                 rd->len = 0;
2012                                 brcmu_pkt_buf_free_skb(pkt);
2013                         }
2014                         bus->sdcnt.rx_readahead_cnt++;
2015                         if (rd->len != roundup(rd_new.len, 16)) {
2016                                 brcmf_err("frame length mismatch:read %d, should be %d\n",
2017                                           rd->len,
2018                                           roundup(rd_new.len, 16) >> 4);
2019                                 rd->len = 0;
2020                                 brcmf_sdio_rxfail(bus, true, true);
2021                                 sdio_release_host(bus->sdiodev->func[1]);
2022                                 brcmu_pkt_buf_free_skb(pkt);
2023                                 continue;
2024                         }
2025                         sdio_release_host(bus->sdiodev->func[1]);
2026                         rd->len_nxtfrm = rd_new.len_nxtfrm;
2027                         rd->channel = rd_new.channel;
2028                         rd->dat_offset = rd_new.dat_offset;
2029
2030                         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
2031                                              BRCMF_DATA_ON()) &&
2032                                            BRCMF_HDRS_ON(),
2033                                            bus->rxhdr, SDPCM_HDRLEN,
2034                                            "RxHdr:\n");
2035
2036                         if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
2037                                 brcmf_err("readahead on control packet %d?\n",
2038                                           rd_new.seq_num);
2039                                 /* Force retry w/normal header read */
2040                                 rd->len = 0;
2041                                 sdio_claim_host(bus->sdiodev->func[1]);
2042                                 brcmf_sdio_rxfail(bus, false, true);
2043                                 sdio_release_host(bus->sdiodev->func[1]);
2044                                 brcmu_pkt_buf_free_skb(pkt);
2045                                 continue;
2046                         }
2047                 }
2048
2049                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
2050                                    pkt->data, rd->len, "Rx Data:\n");
2051
2052                 /* Save superframe descriptor and allocate packet frame */
2053                 if (rd->channel == SDPCM_GLOM_CHANNEL) {
2054                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
2055                                 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
2056                                           rd->len);
2057                                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
2058                                                    pkt->data, rd->len,
2059                                                    "Glom Data:\n");
2060                                 __skb_trim(pkt, rd->len);
2061                                 skb_pull(pkt, SDPCM_HDRLEN);
2062                                 bus->glomd = pkt;
2063                         } else {
2064                                 brcmf_err("%s: glom superframe w/o "
2065                                           "descriptor!\n", __func__);
2066                                 sdio_claim_host(bus->sdiodev->func[1]);
2067                                 brcmf_sdio_rxfail(bus, false, false);
2068                                 sdio_release_host(bus->sdiodev->func[1]);
2069                         }
2070                         /* prepare the descriptor for the next read */
2071                         rd->len = rd->len_nxtfrm << 4;
2072                         rd->len_nxtfrm = 0;
2073                         /* treat all packet as event if we don't know */
2074                         rd->channel = SDPCM_EVENT_CHANNEL;
2075                         continue;
2076                 }
2077
2078                 /* Fill in packet len and prio, deliver upward */
2079                 __skb_trim(pkt, rd->len);
2080                 skb_pull(pkt, rd->dat_offset);
2081
2082                 /* prepare the descriptor for the next read */
2083                 rd->len = rd->len_nxtfrm << 4;
2084                 rd->len_nxtfrm = 0;
2085                 /* treat all packet as event if we don't know */
2086                 rd->channel = SDPCM_EVENT_CHANNEL;
2087
2088                 if (pkt->len == 0) {
2089                         brcmu_pkt_buf_free_skb(pkt);
2090                         continue;
2091                 }
2092
2093                 brcmf_rx_frame(bus->sdiodev->dev, pkt);
2094         }
2095
2096         rxcount = maxframes - rxleft;
2097         /* Message if we hit the limit */
2098         if (!rxleft)
2099                 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
2100         else
2101                 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2102         /* Back off rxseq if awaiting rtx, update rx_seq */
2103         if (bus->rxskip)
2104                 rd->seq_num--;
2105         bus->rx_seq = rd->seq_num;
2106
2107         return rxcount;
2108 }
2109
2110 static void
2111 brcmf_sdio_wait_event_wakeup(struct brcmf_sdio *bus)
2112 {
2113         if (waitqueue_active(&bus->ctrl_wait))
2114                 wake_up_interruptible(&bus->ctrl_wait);
2115         return;
2116 }
2117
2118 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
2119 {
2120         u16 head_pad;
2121         u8 *dat_buf;
2122
2123         dat_buf = (u8 *)(pkt->data);
2124
2125         /* Check head padding */
2126         head_pad = ((unsigned long)dat_buf % bus->head_align);
2127         if (head_pad) {
2128                 if (skb_headroom(pkt) < head_pad) {
2129                         bus->sdiodev->bus_if->tx_realloc++;
2130                         head_pad = 0;
2131                         if (skb_cow(pkt, head_pad))
2132                                 return -ENOMEM;
2133                 }
2134                 skb_push(pkt, head_pad);
2135                 dat_buf = (u8 *)(pkt->data);
2136                 memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
2137         }
2138         return head_pad;
2139 }
2140
2141 /**
2142  * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
2143  * bus layer usage.
2144  */
2145 /* flag marking a dummy skb added for DMA alignment requirement */
2146 #define ALIGN_SKB_FLAG          0x8000
2147 /* bit mask of data length chopped from the previous packet */
2148 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
2149
2150 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
2151                                     struct sk_buff_head *pktq,
2152                                     struct sk_buff *pkt, u16 total_len)
2153 {
2154         struct brcmf_sdio_dev *sdiodev;
2155         struct sk_buff *pkt_pad;
2156         u16 tail_pad, tail_chop, chain_pad;
2157         unsigned int blksize;
2158         bool lastfrm;
2159         int ntail, ret;
2160
2161         sdiodev = bus->sdiodev;
2162         blksize = sdiodev->func[SDIO_FUNC_2]->cur_blksize;
2163         /* sg entry alignment should be a divisor of block size */
2164         WARN_ON(blksize % bus->sgentry_align);
2165
2166         /* Check tail padding */
2167         lastfrm = skb_queue_is_last(pktq, pkt);
2168         tail_pad = 0;
2169         tail_chop = pkt->len % bus->sgentry_align;
2170         if (tail_chop)
2171                 tail_pad = bus->sgentry_align - tail_chop;
2172         chain_pad = (total_len + tail_pad) % blksize;
2173         if (lastfrm && chain_pad)
2174                 tail_pad += blksize - chain_pad;
2175         if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
2176                 pkt_pad = brcmu_pkt_buf_get_skb(tail_pad + tail_chop +
2177                                                 bus->head_align);
2178                 if (pkt_pad == NULL)
2179                         return -ENOMEM;
2180                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
2181                 if (unlikely(ret < 0)) {
2182                         kfree_skb(pkt_pad);
2183                         return ret;
2184                 }
2185                 memcpy(pkt_pad->data,
2186                        pkt->data + pkt->len - tail_chop,
2187                        tail_chop);
2188                 *(u16 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
2189                 skb_trim(pkt, pkt->len - tail_chop);
2190                 skb_trim(pkt_pad, tail_pad + tail_chop);
2191                 __skb_queue_after(pktq, pkt, pkt_pad);
2192         } else {
2193                 ntail = pkt->data_len + tail_pad -
2194                         (pkt->end - pkt->tail);
2195                 if (skb_cloned(pkt) || ntail > 0)
2196                         if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
2197                                 return -ENOMEM;
2198                 if (skb_linearize(pkt))
2199                         return -ENOMEM;
2200                 __skb_put(pkt, tail_pad);
2201         }
2202
2203         return tail_pad;
2204 }
2205
2206 /**
2207  * brcmf_sdio_txpkt_prep - packet preparation for transmit
2208  * @bus: brcmf_sdio structure pointer
2209  * @pktq: packet list pointer
2210  * @chan: virtual channel to transmit the packet
2211  *
2212  * Processes to be applied to the packet
2213  *      - Align data buffer pointer
2214  *      - Align data buffer length
2215  *      - Prepare header
2216  * Return: negative value if there is error
2217  */
2218 static int
2219 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2220                       uint chan)
2221 {
2222         u16 head_pad, total_len;
2223         struct sk_buff *pkt_next;
2224         u8 txseq;
2225         int ret;
2226         struct brcmf_sdio_hdrinfo hd_info = {0};
2227
2228         txseq = bus->tx_seq;
2229         total_len = 0;
2230         skb_queue_walk(pktq, pkt_next) {
2231                 /* alignment packet inserted in previous
2232                  * loop cycle can be skipped as it is
2233                  * already properly aligned and does not
2234                  * need an sdpcm header.
2235                  */
2236                 if (*(u16 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2237                         continue;
2238
2239                 /* align packet data pointer */
2240                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2241                 if (ret < 0)
2242                         return ret;
2243                 head_pad = (u16)ret;
2244                 if (head_pad)
2245                         memset(pkt_next->data + bus->tx_hdrlen, 0, head_pad);
2246
2247                 total_len += pkt_next->len;
2248
2249                 hd_info.len = pkt_next->len;
2250                 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2251                 if (bus->txglom && pktq->qlen > 1) {
2252                         ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2253                                                        pkt_next, total_len);
2254                         if (ret < 0)
2255                                 return ret;
2256                         hd_info.tail_pad = (u16)ret;
2257                         total_len += (u16)ret;
2258                 }
2259
2260                 hd_info.channel = chan;
2261                 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2262                 hd_info.seq_num = txseq++;
2263
2264                 /* Now fill the header */
2265                 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2266
2267                 if (BRCMF_BYTES_ON() &&
2268                     ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2269                      (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2270                         brcmf_dbg_hex_dump(true, pkt_next->data, hd_info.len,
2271                                            "Tx Frame:\n");
2272                 else if (BRCMF_HDRS_ON())
2273                         brcmf_dbg_hex_dump(true, pkt_next->data,
2274                                            head_pad + bus->tx_hdrlen,
2275                                            "Tx Header:\n");
2276         }
2277         /* Hardware length tag of the first packet should be total
2278          * length of the chain (including padding)
2279          */
2280         if (bus->txglom)
2281                 brcmf_sdio_update_hwhdr(pktq->next->data, total_len);
2282         return 0;
2283 }
2284
2285 /**
2286  * brcmf_sdio_txpkt_postp - packet post processing for transmit
2287  * @bus: brcmf_sdio structure pointer
2288  * @pktq: packet list pointer
2289  *
2290  * Processes to be applied to the packet
2291  *      - Remove head padding
2292  *      - Remove tail padding
2293  */
2294 static void
2295 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2296 {
2297         u8 *hdr;
2298         u32 dat_offset;
2299         u16 tail_pad;
2300         u16 dummy_flags, chop_len;
2301         struct sk_buff *pkt_next, *tmp, *pkt_prev;
2302
2303         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2304                 dummy_flags = *(u16 *)(pkt_next->cb);
2305                 if (dummy_flags & ALIGN_SKB_FLAG) {
2306                         chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2307                         if (chop_len) {
2308                                 pkt_prev = pkt_next->prev;
2309                                 skb_put(pkt_prev, chop_len);
2310                         }
2311                         __skb_unlink(pkt_next, pktq);
2312                         brcmu_pkt_buf_free_skb(pkt_next);
2313                 } else {
2314                         hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2315                         dat_offset = le32_to_cpu(*(__le32 *)hdr);
2316                         dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2317                                      SDPCM_DOFFSET_SHIFT;
2318                         skb_pull(pkt_next, dat_offset);
2319                         if (bus->txglom) {
2320                                 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2321                                 skb_trim(pkt_next, pkt_next->len - tail_pad);
2322                         }
2323                 }
2324         }
2325 }
2326
2327 /* Writes a HW/SW header into the packet and sends it. */
2328 /* Assumes: (a) header space already there, (b) caller holds lock */
2329 static int brcmf_sdio_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2330                             uint chan)
2331 {
2332         int ret;
2333         struct sk_buff *pkt_next, *tmp;
2334
2335         brcmf_dbg(TRACE, "Enter\n");
2336
2337         ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2338         if (ret)
2339                 goto done;
2340
2341         sdio_claim_host(bus->sdiodev->func[1]);
2342         ret = brcmf_sdiod_send_pkt(bus->sdiodev, pktq);
2343         bus->sdcnt.f2txdata++;
2344
2345         if (ret < 0)
2346                 brcmf_sdio_txfail(bus);
2347
2348         sdio_release_host(bus->sdiodev->func[1]);
2349
2350 done:
2351         brcmf_sdio_txpkt_postp(bus, pktq);
2352         if (ret == 0)
2353                 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2354         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2355                 __skb_unlink(pkt_next, pktq);
2356                 brcmf_txcomplete(bus->sdiodev->dev, pkt_next, ret == 0);
2357         }
2358         return ret;
2359 }
2360
2361 static uint brcmf_sdio_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2362 {
2363         struct sk_buff *pkt;
2364         struct sk_buff_head pktq;
2365         u32 intstatus = 0;
2366         int ret = 0, prec_out, i;
2367         uint cnt = 0;
2368         u8 tx_prec_map, pkt_num;
2369
2370         brcmf_dbg(TRACE, "Enter\n");
2371
2372         tx_prec_map = ~bus->flowcontrol;
2373
2374         /* Send frames until the limit or some other event */
2375         for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2376                 pkt_num = 1;
2377                 if (bus->txglom)
2378                         pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2379                                         bus->sdiodev->txglomsz);
2380                 pkt_num = min_t(u32, pkt_num,
2381                                 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2382                 __skb_queue_head_init(&pktq);
2383                 spin_lock_bh(&bus->txq_lock);
2384                 for (i = 0; i < pkt_num; i++) {
2385                         pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2386                                               &prec_out);
2387                         if (pkt == NULL)
2388                                 break;
2389                         __skb_queue_tail(&pktq, pkt);
2390                 }
2391                 spin_unlock_bh(&bus->txq_lock);
2392                 if (i == 0)
2393                         break;
2394
2395                 ret = brcmf_sdio_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2396
2397                 cnt += i;
2398
2399                 /* In poll mode, need to check for other events */
2400                 if (!bus->intr) {
2401                         /* Check device status, signal pending interrupt */
2402                         sdio_claim_host(bus->sdiodev->func[1]);
2403                         ret = r_sdreg32(bus, &intstatus,
2404                                         offsetof(struct sdpcmd_regs,
2405                                                  intstatus));
2406                         sdio_release_host(bus->sdiodev->func[1]);
2407                         bus->sdcnt.f2txdata++;
2408                         if (ret != 0)
2409                                 break;
2410                         if (intstatus & bus->hostintmask)
2411                                 atomic_set(&bus->ipend, 1);
2412                 }
2413         }
2414
2415         /* Deflow-control stack if needed */
2416         if ((bus->sdiodev->state == BRCMF_SDIOD_DATA) &&
2417             bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2418                 bus->txoff = false;
2419                 brcmf_txflowblock(bus->sdiodev->dev, false);
2420         }
2421
2422         return cnt;
2423 }
2424
2425 static int brcmf_sdio_tx_ctrlframe(struct brcmf_sdio *bus, u8 *frame, u16 len)
2426 {
2427         u8 doff;
2428         u16 pad;
2429         uint retries = 0;
2430         struct brcmf_sdio_hdrinfo hd_info = {0};
2431         int ret;
2432
2433         brcmf_dbg(TRACE, "Enter\n");
2434
2435         /* Back the pointer to make room for bus header */
2436         frame -= bus->tx_hdrlen;
2437         len += bus->tx_hdrlen;
2438
2439         /* Add alignment padding (optional for ctl frames) */
2440         doff = ((unsigned long)frame % bus->head_align);
2441         if (doff) {
2442                 frame -= doff;
2443                 len += doff;
2444                 memset(frame + bus->tx_hdrlen, 0, doff);
2445         }
2446
2447         /* Round send length to next SDIO block */
2448         pad = 0;
2449         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2450                 pad = bus->blocksize - (len % bus->blocksize);
2451                 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2452                         pad = 0;
2453         } else if (len % bus->head_align) {
2454                 pad = bus->head_align - (len % bus->head_align);
2455         }
2456         len += pad;
2457
2458         hd_info.len = len - pad;
2459         hd_info.channel = SDPCM_CONTROL_CHANNEL;
2460         hd_info.dat_offset = doff + bus->tx_hdrlen;
2461         hd_info.seq_num = bus->tx_seq;
2462         hd_info.lastfrm = true;
2463         hd_info.tail_pad = pad;
2464         brcmf_sdio_hdpack(bus, frame, &hd_info);
2465
2466         if (bus->txglom)
2467                 brcmf_sdio_update_hwhdr(frame, len);
2468
2469         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2470                            frame, len, "Tx Frame:\n");
2471         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2472                            BRCMF_HDRS_ON(),
2473                            frame, min_t(u16, len, 16), "TxHdr:\n");
2474
2475         do {
2476                 ret = brcmf_sdiod_send_buf(bus->sdiodev, frame, len);
2477
2478                 if (ret < 0)
2479                         brcmf_sdio_txfail(bus);
2480                 else
2481                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2482         } while (ret < 0 && retries++ < TXRETRIES);
2483
2484         return ret;
2485 }
2486
2487 static void brcmf_sdio_bus_stop(struct device *dev)
2488 {
2489         u32 local_hostintmask;
2490         u8 saveclk;
2491         int err;
2492         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2493         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2494         struct brcmf_sdio *bus = sdiodev->bus;
2495
2496         brcmf_dbg(TRACE, "Enter\n");
2497
2498         if (bus->watchdog_tsk) {
2499                 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2500                 kthread_stop(bus->watchdog_tsk);
2501                 bus->watchdog_tsk = NULL;
2502         }
2503
2504         if (sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
2505                 sdio_claim_host(sdiodev->func[1]);
2506
2507                 /* Enable clock for device interrupts */
2508                 brcmf_sdio_bus_sleep(bus, false, false);
2509
2510                 /* Disable and clear interrupts at the chip level also */
2511                 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2512                 local_hostintmask = bus->hostintmask;
2513                 bus->hostintmask = 0;
2514
2515                 /* Force backplane clocks to assure F2 interrupt propagates */
2516                 saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2517                                             &err);
2518                 if (!err)
2519                         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2520                                           (saveclk | SBSDIO_FORCE_HT), &err);
2521                 if (err)
2522                         brcmf_err("Failed to force clock for F2: err %d\n",
2523                                   err);
2524
2525                 /* Turn off the bus (F2), free any pending packets */
2526                 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2527                 sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
2528
2529                 /* Clear any pending interrupts now that F2 is disabled */
2530                 w_sdreg32(bus, local_hostintmask,
2531                           offsetof(struct sdpcmd_regs, intstatus));
2532
2533                 sdio_release_host(sdiodev->func[1]);
2534         }
2535         /* Clear the data packet queues */
2536         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2537
2538         /* Clear any held glomming stuff */
2539         brcmu_pkt_buf_free_skb(bus->glomd);
2540         brcmf_sdio_free_glom(bus);
2541
2542         /* Clear rx control and wake any waiters */
2543         spin_lock_bh(&bus->rxctl_lock);
2544         bus->rxlen = 0;
2545         spin_unlock_bh(&bus->rxctl_lock);
2546         brcmf_sdio_dcmd_resp_wake(bus);
2547
2548         /* Reset some F2 state stuff */
2549         bus->rxskip = false;
2550         bus->tx_seq = bus->rx_seq = 0;
2551 }
2552
2553 static inline void brcmf_sdio_clrintr(struct brcmf_sdio *bus)
2554 {
2555         unsigned long flags;
2556
2557         if (bus->sdiodev->oob_irq_requested) {
2558                 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2559                 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2560                         enable_irq(bus->sdiodev->pdata->oob_irq_nr);
2561                         bus->sdiodev->irq_en = true;
2562                 }
2563                 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2564         }
2565 }
2566
2567 static void atomic_orr(int val, atomic_t *v)
2568 {
2569         int old_val;
2570
2571         old_val = atomic_read(v);
2572         while (atomic_cmpxchg(v, old_val, val | old_val) != old_val)
2573                 old_val = atomic_read(v);
2574 }
2575
2576 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2577 {
2578         struct brcmf_core *buscore;
2579         u32 addr;
2580         unsigned long val;
2581         int ret;
2582
2583         buscore = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
2584         addr = buscore->base + offsetof(struct sdpcmd_regs, intstatus);
2585
2586         val = brcmf_sdiod_regrl(bus->sdiodev, addr, &ret);
2587         bus->sdcnt.f1regdata++;
2588         if (ret != 0)
2589                 return ret;
2590
2591         val &= bus->hostintmask;
2592         atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2593
2594         /* Clear interrupts */
2595         if (val) {
2596                 brcmf_sdiod_regwl(bus->sdiodev, addr, val, &ret);
2597                 bus->sdcnt.f1regdata++;
2598                 atomic_orr(val, &bus->intstatus);
2599         }
2600
2601         return ret;
2602 }
2603
2604 static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
2605 {
2606         u32 newstatus = 0;
2607         unsigned long intstatus;
2608         uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2609         uint framecnt;                  /* Temporary counter of tx/rx frames */
2610         int err = 0;
2611
2612         brcmf_dbg(TRACE, "Enter\n");
2613
2614         sdio_claim_host(bus->sdiodev->func[1]);
2615
2616         /* If waiting for HTAVAIL, check status */
2617         if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2618                 u8 clkctl, devctl = 0;
2619
2620 #ifdef DEBUG
2621                 /* Check for inconsistent device control */
2622                 devctl = brcmf_sdiod_regrb(bus->sdiodev,
2623                                            SBSDIO_DEVICE_CTL, &err);
2624 #endif                          /* DEBUG */
2625
2626                 /* Read CSR, if clock on switch to AVAIL, else ignore */
2627                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
2628                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
2629
2630                 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2631                           devctl, clkctl);
2632
2633                 if (SBSDIO_HTAV(clkctl)) {
2634                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
2635                                                    SBSDIO_DEVICE_CTL, &err);
2636                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2637                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2638                                           devctl, &err);
2639                         bus->clkstate = CLK_AVAIL;
2640                 }
2641         }
2642
2643         /* Make sure backplane clock is on */
2644         brcmf_sdio_bus_sleep(bus, false, true);
2645
2646         /* Pending interrupt indicates new device status */
2647         if (atomic_read(&bus->ipend) > 0) {
2648                 atomic_set(&bus->ipend, 0);
2649                 err = brcmf_sdio_intr_rstatus(bus);
2650         }
2651
2652         /* Start with leftover status bits */
2653         intstatus = atomic_xchg(&bus->intstatus, 0);
2654
2655         /* Handle flow-control change: read new state in case our ack
2656          * crossed another change interrupt.  If change still set, assume
2657          * FC ON for safety, let next loop through do the debounce.
2658          */
2659         if (intstatus & I_HMB_FC_CHANGE) {
2660                 intstatus &= ~I_HMB_FC_CHANGE;
2661                 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2662                                 offsetof(struct sdpcmd_regs, intstatus));
2663
2664                 err = r_sdreg32(bus, &newstatus,
2665                                 offsetof(struct sdpcmd_regs, intstatus));
2666                 bus->sdcnt.f1regdata += 2;
2667                 atomic_set(&bus->fcstate,
2668                            !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2669                 intstatus |= (newstatus & bus->hostintmask);
2670         }
2671
2672         /* Handle host mailbox indication */
2673         if (intstatus & I_HMB_HOST_INT) {
2674                 intstatus &= ~I_HMB_HOST_INT;
2675                 intstatus |= brcmf_sdio_hostmail(bus);
2676         }
2677
2678         sdio_release_host(bus->sdiodev->func[1]);
2679
2680         /* Generally don't ask for these, can get CRC errors... */
2681         if (intstatus & I_WR_OOSYNC) {
2682                 brcmf_err("Dongle reports WR_OOSYNC\n");
2683                 intstatus &= ~I_WR_OOSYNC;
2684         }
2685
2686         if (intstatus & I_RD_OOSYNC) {
2687                 brcmf_err("Dongle reports RD_OOSYNC\n");
2688                 intstatus &= ~I_RD_OOSYNC;
2689         }
2690
2691         if (intstatus & I_SBINT) {
2692                 brcmf_err("Dongle reports SBINT\n");
2693                 intstatus &= ~I_SBINT;
2694         }
2695
2696         /* Would be active due to wake-wlan in gSPI */
2697         if (intstatus & I_CHIPACTIVE) {
2698                 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2699                 intstatus &= ~I_CHIPACTIVE;
2700         }
2701
2702         /* Ignore frame indications if rxskip is set */
2703         if (bus->rxskip)
2704                 intstatus &= ~I_HMB_FRAME_IND;
2705
2706         /* On frame indication, read available frames */
2707         if ((intstatus & I_HMB_FRAME_IND) && (bus->clkstate == CLK_AVAIL)) {
2708                 brcmf_sdio_readframes(bus, bus->rxbound);
2709                 if (!bus->rxpending)
2710                         intstatus &= ~I_HMB_FRAME_IND;
2711         }
2712
2713         /* Keep still-pending events for next scheduling */
2714         if (intstatus)
2715                 atomic_orr(intstatus, &bus->intstatus);
2716
2717         brcmf_sdio_clrintr(bus);
2718
2719         if (bus->ctrl_frame_stat && (bus->clkstate == CLK_AVAIL) &&
2720             data_ok(bus)) {
2721                 sdio_claim_host(bus->sdiodev->func[1]);
2722                 if (bus->ctrl_frame_stat) {
2723                         err = brcmf_sdio_tx_ctrlframe(bus,  bus->ctrl_frame_buf,
2724                                                       bus->ctrl_frame_len);
2725                         bus->ctrl_frame_err = err;
2726                         wmb();
2727                         bus->ctrl_frame_stat = false;
2728                 }
2729                 sdio_release_host(bus->sdiodev->func[1]);
2730                 brcmf_sdio_wait_event_wakeup(bus);
2731         }
2732         /* Send queued frames (limit 1 if rx may still be pending) */
2733         if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2734             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit &&
2735             data_ok(bus)) {
2736                 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2737                                             txlimit;
2738                 brcmf_sdio_sendfromq(bus, framecnt);
2739         }
2740
2741         if ((bus->sdiodev->state != BRCMF_SDIOD_DATA) || (err != 0)) {
2742                 brcmf_err("failed backplane access over SDIO, halting operation\n");
2743                 atomic_set(&bus->intstatus, 0);
2744                 if (bus->ctrl_frame_stat) {
2745                         sdio_claim_host(bus->sdiodev->func[1]);
2746                         if (bus->ctrl_frame_stat) {
2747                                 bus->ctrl_frame_err = -ENODEV;
2748                                 wmb();
2749                                 bus->ctrl_frame_stat = false;
2750                                 brcmf_sdio_wait_event_wakeup(bus);
2751                         }
2752                         sdio_release_host(bus->sdiodev->func[1]);
2753                 }
2754         } else if (atomic_read(&bus->intstatus) ||
2755                    atomic_read(&bus->ipend) > 0 ||
2756                    (!atomic_read(&bus->fcstate) &&
2757                     brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2758                     data_ok(bus))) {
2759                 bus->dpc_triggered = true;
2760         }
2761 }
2762
2763 static struct pktq *brcmf_sdio_bus_gettxq(struct device *dev)
2764 {
2765         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2766         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2767         struct brcmf_sdio *bus = sdiodev->bus;
2768
2769         return &bus->txq;
2770 }
2771
2772 static bool brcmf_sdio_prec_enq(struct pktq *q, struct sk_buff *pkt, int prec)
2773 {
2774         struct sk_buff *p;
2775         int eprec = -1;         /* precedence to evict from */
2776
2777         /* Fast case, precedence queue is not full and we are also not
2778          * exceeding total queue length
2779          */
2780         if (!pktq_pfull(q, prec) && !pktq_full(q)) {
2781                 brcmu_pktq_penq(q, prec, pkt);
2782                 return true;
2783         }
2784
2785         /* Determine precedence from which to evict packet, if any */
2786         if (pktq_pfull(q, prec)) {
2787                 eprec = prec;
2788         } else if (pktq_full(q)) {
2789                 p = brcmu_pktq_peek_tail(q, &eprec);
2790                 if (eprec > prec)
2791                         return false;
2792         }
2793
2794         /* Evict if needed */
2795         if (eprec >= 0) {
2796                 /* Detect queueing to unconfigured precedence */
2797                 if (eprec == prec)
2798                         return false;   /* refuse newer (incoming) packet */
2799                 /* Evict packet according to discard policy */
2800                 p = brcmu_pktq_pdeq_tail(q, eprec);
2801                 if (p == NULL)
2802                         brcmf_err("brcmu_pktq_pdeq_tail() failed\n");
2803                 brcmu_pkt_buf_free_skb(p);
2804         }
2805
2806         /* Enqueue */
2807         p = brcmu_pktq_penq(q, prec, pkt);
2808         if (p == NULL)
2809                 brcmf_err("brcmu_pktq_penq() failed\n");
2810
2811         return p != NULL;
2812 }
2813
2814 static int brcmf_sdio_bus_txdata(struct device *dev, struct sk_buff *pkt)
2815 {
2816         int ret = -EBADE;
2817         uint prec;
2818         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2819         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2820         struct brcmf_sdio *bus = sdiodev->bus;
2821
2822         brcmf_dbg(TRACE, "Enter: pkt: data %p len %d\n", pkt->data, pkt->len);
2823         if (sdiodev->state != BRCMF_SDIOD_DATA)
2824                 return -EIO;
2825
2826         /* Add space for the header */
2827         skb_push(pkt, bus->tx_hdrlen);
2828         /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2829
2830         prec = prio2prec((pkt->priority & PRIOMASK));
2831
2832         /* Check for existing queue, current flow-control,
2833                          pending event, or pending clock */
2834         brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2835         bus->sdcnt.fcqueued++;
2836
2837         /* Priority based enq */
2838         spin_lock_bh(&bus->txq_lock);
2839         /* reset bus_flags in packet cb */
2840         *(u16 *)(pkt->cb) = 0;
2841         if (!brcmf_sdio_prec_enq(&bus->txq, pkt, prec)) {
2842                 skb_pull(pkt, bus->tx_hdrlen);
2843                 brcmf_err("out of bus->txq !!!\n");
2844                 ret = -ENOSR;
2845         } else {
2846                 ret = 0;
2847         }
2848
2849         if (pktq_len(&bus->txq) >= TXHI) {
2850                 bus->txoff = true;
2851                 brcmf_txflowblock(dev, true);
2852         }
2853         spin_unlock_bh(&bus->txq_lock);
2854
2855 #ifdef DEBUG
2856         if (pktq_plen(&bus->txq, prec) > qcount[prec])
2857                 qcount[prec] = pktq_plen(&bus->txq, prec);
2858 #endif
2859
2860         brcmf_sdio_trigger_dpc(bus);
2861         return ret;
2862 }
2863
2864 #ifdef DEBUG
2865 #define CONSOLE_LINE_MAX        192
2866
2867 static int brcmf_sdio_readconsole(struct brcmf_sdio *bus)
2868 {
2869         struct brcmf_console *c = &bus->console;
2870         u8 line[CONSOLE_LINE_MAX], ch;
2871         u32 n, idx, addr;
2872         int rv;
2873
2874         /* Don't do anything until FWREADY updates console address */
2875         if (bus->console_addr == 0)
2876                 return 0;
2877
2878         /* Read console log struct */
2879         addr = bus->console_addr + offsetof(struct rte_console, log_le);
2880         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2881                                sizeof(c->log_le));
2882         if (rv < 0)
2883                 return rv;
2884
2885         /* Allocate console buffer (one time only) */
2886         if (c->buf == NULL) {
2887                 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2888                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2889                 if (c->buf == NULL)
2890                         return -ENOMEM;
2891         }
2892
2893         idx = le32_to_cpu(c->log_le.idx);
2894
2895         /* Protect against corrupt value */
2896         if (idx > c->bufsize)
2897                 return -EBADE;
2898
2899         /* Skip reading the console buffer if the index pointer
2900          has not moved */
2901         if (idx == c->last)
2902                 return 0;
2903
2904         /* Read the console buffer */
2905         addr = le32_to_cpu(c->log_le.buf);
2906         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2907         if (rv < 0)
2908                 return rv;
2909
2910         while (c->last != idx) {
2911                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2912                         if (c->last == idx) {
2913                                 /* This would output a partial line.
2914                                  * Instead, back up
2915                                  * the buffer pointer and output this
2916                                  * line next time around.
2917                                  */
2918                                 if (c->last >= n)
2919                                         c->last -= n;
2920                                 else
2921                                         c->last = c->bufsize - n;
2922                                 goto break2;
2923                         }
2924                         ch = c->buf[c->last];
2925                         c->last = (c->last + 1) % c->bufsize;
2926                         if (ch == '\n')
2927                                 break;
2928                         line[n] = ch;
2929                 }
2930
2931                 if (n > 0) {
2932                         if (line[n - 1] == '\r')
2933                                 n--;
2934                         line[n] = 0;
2935                         pr_debug("CONSOLE: %s\n", line);
2936                 }
2937         }
2938 break2:
2939
2940         return 0;
2941 }
2942 #endif                          /* DEBUG */
2943
2944 static int
2945 brcmf_sdio_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2946 {
2947         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2948         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2949         struct brcmf_sdio *bus = sdiodev->bus;
2950         int ret;
2951
2952         brcmf_dbg(TRACE, "Enter\n");
2953         if (sdiodev->state != BRCMF_SDIOD_DATA)
2954                 return -EIO;
2955
2956         /* Send from dpc */
2957         bus->ctrl_frame_buf = msg;
2958         bus->ctrl_frame_len = msglen;
2959         wmb();
2960         bus->ctrl_frame_stat = true;
2961
2962         brcmf_sdio_trigger_dpc(bus);
2963         wait_event_interruptible_timeout(bus->ctrl_wait, !bus->ctrl_frame_stat,
2964                                          msecs_to_jiffies(CTL_DONE_TIMEOUT));
2965         ret = 0;
2966         if (bus->ctrl_frame_stat) {
2967                 sdio_claim_host(bus->sdiodev->func[1]);
2968                 if (bus->ctrl_frame_stat) {
2969                         brcmf_dbg(SDIO, "ctrl_frame timeout\n");
2970                         bus->ctrl_frame_stat = false;
2971                         ret = -ETIMEDOUT;
2972                 }
2973                 sdio_release_host(bus->sdiodev->func[1]);
2974         }
2975         if (!ret) {
2976                 brcmf_dbg(SDIO, "ctrl_frame complete, err=%d\n",
2977                           bus->ctrl_frame_err);
2978                 rmb();
2979                 ret = bus->ctrl_frame_err;
2980         }
2981
2982         if (ret)
2983                 bus->sdcnt.tx_ctlerrs++;
2984         else
2985                 bus->sdcnt.tx_ctlpkts++;
2986
2987         return ret;
2988 }
2989
2990 #ifdef DEBUG
2991 static int brcmf_sdio_dump_console(struct seq_file *seq, struct brcmf_sdio *bus,
2992                                    struct sdpcm_shared *sh)
2993 {
2994         u32 addr, console_ptr, console_size, console_index;
2995         char *conbuf = NULL;
2996         __le32 sh_val;
2997         int rv;
2998
2999         /* obtain console information from device memory */
3000         addr = sh->console_addr + offsetof(struct rte_console, log_le);
3001         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
3002                                (u8 *)&sh_val, sizeof(u32));
3003         if (rv < 0)
3004                 return rv;
3005         console_ptr = le32_to_cpu(sh_val);
3006
3007         addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
3008         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
3009                                (u8 *)&sh_val, sizeof(u32));
3010         if (rv < 0)
3011                 return rv;
3012         console_size = le32_to_cpu(sh_val);
3013
3014         addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
3015         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
3016                                (u8 *)&sh_val, sizeof(u32));
3017         if (rv < 0)
3018                 return rv;
3019         console_index = le32_to_cpu(sh_val);
3020
3021         /* allocate buffer for console data */
3022         if (console_size <= CONSOLE_BUFFER_MAX)
3023                 conbuf = vzalloc(console_size+1);
3024
3025         if (!conbuf)
3026                 return -ENOMEM;
3027
3028         /* obtain the console data from device */
3029         conbuf[console_size] = '\0';
3030         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
3031                                console_size);
3032         if (rv < 0)
3033                 goto done;
3034
3035         rv = seq_write(seq, conbuf + console_index,
3036                        console_size - console_index);
3037         if (rv < 0)
3038                 goto done;
3039
3040         if (console_index > 0)
3041                 rv = seq_write(seq, conbuf, console_index - 1);
3042
3043 done:
3044         vfree(conbuf);
3045         return rv;
3046 }
3047
3048 static int brcmf_sdio_trap_info(struct seq_file *seq, struct brcmf_sdio *bus,
3049                                 struct sdpcm_shared *sh)
3050 {
3051         int error;
3052         struct brcmf_trap_info tr;
3053
3054         if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
3055                 brcmf_dbg(INFO, "no trap in firmware\n");
3056                 return 0;
3057         }
3058
3059         error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
3060                                   sizeof(struct brcmf_trap_info));
3061         if (error < 0)
3062                 return error;
3063
3064         seq_printf(seq,
3065                    "dongle trap info: type 0x%x @ epc 0x%08x\n"
3066                    "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
3067                    "  lr   0x%08x pc   0x%08x offset 0x%x\n"
3068                    "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
3069                    "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
3070                    le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
3071                    le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
3072                    le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3073                    le32_to_cpu(tr.pc), sh->trap_addr,
3074                    le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3075                    le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3076                    le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3077                    le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3078
3079         return 0;
3080 }
3081
3082 static int brcmf_sdio_assert_info(struct seq_file *seq, struct brcmf_sdio *bus,
3083                                   struct sdpcm_shared *sh)
3084 {
3085         int error = 0;
3086         char file[80] = "?";
3087         char expr[80] = "<???>";
3088
3089         if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3090                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3091                 return 0;
3092         } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3093                 brcmf_dbg(INFO, "no assert in dongle\n");
3094                 return 0;
3095         }
3096
3097         sdio_claim_host(bus->sdiodev->func[1]);
3098         if (sh->assert_file_addr != 0) {
3099                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3100                                           sh->assert_file_addr, (u8 *)file, 80);
3101                 if (error < 0)
3102                         return error;
3103         }
3104         if (sh->assert_exp_addr != 0) {
3105                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3106                                           sh->assert_exp_addr, (u8 *)expr, 80);
3107                 if (error < 0)
3108                         return error;
3109         }
3110         sdio_release_host(bus->sdiodev->func[1]);
3111
3112         seq_printf(seq, "dongle assert: %s:%d: assert(%s)\n",
3113                    file, sh->assert_line, expr);
3114         return 0;
3115 }
3116
3117 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3118 {
3119         int error;
3120         struct sdpcm_shared sh;
3121
3122         error = brcmf_sdio_readshared(bus, &sh);
3123
3124         if (error < 0)
3125                 return error;
3126
3127         if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3128                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3129         else if (sh.flags & SDPCM_SHARED_ASSERT)
3130                 brcmf_err("assertion in dongle\n");
3131
3132         if (sh.flags & SDPCM_SHARED_TRAP)
3133                 brcmf_err("firmware trap in dongle\n");
3134
3135         return 0;
3136 }
3137
3138 static int brcmf_sdio_died_dump(struct seq_file *seq, struct brcmf_sdio *bus)
3139 {
3140         int error = 0;
3141         struct sdpcm_shared sh;
3142
3143         error = brcmf_sdio_readshared(bus, &sh);
3144         if (error < 0)
3145                 goto done;
3146
3147         error = brcmf_sdio_assert_info(seq, bus, &sh);
3148         if (error < 0)
3149                 goto done;
3150
3151         error = brcmf_sdio_trap_info(seq, bus, &sh);
3152         if (error < 0)
3153                 goto done;
3154
3155         error = brcmf_sdio_dump_console(seq, bus, &sh);
3156
3157 done:
3158         return error;
3159 }
3160
3161 static int brcmf_sdio_forensic_read(struct seq_file *seq, void *data)
3162 {
3163         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3164         struct brcmf_sdio *bus = bus_if->bus_priv.sdio->bus;
3165
3166         return brcmf_sdio_died_dump(seq, bus);
3167 }
3168
3169 static int brcmf_debugfs_sdio_count_read(struct seq_file *seq, void *data)
3170 {
3171         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3172         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3173         struct brcmf_sdio_count *sdcnt = &sdiodev->bus->sdcnt;
3174
3175         seq_printf(seq,
3176                    "intrcount:    %u\nlastintrs:    %u\n"
3177                    "pollcnt:      %u\nregfails:     %u\n"
3178                    "tx_sderrs:    %u\nfcqueued:     %u\n"
3179                    "rxrtx:        %u\nrx_toolong:   %u\n"
3180                    "rxc_errors:   %u\nrx_hdrfail:   %u\n"
3181                    "rx_badhdr:    %u\nrx_badseq:    %u\n"
3182                    "fc_rcvd:      %u\nfc_xoff:      %u\n"
3183                    "fc_xon:       %u\nrxglomfail:   %u\n"
3184                    "rxglomframes: %u\nrxglompkts:   %u\n"
3185                    "f2rxhdrs:     %u\nf2rxdata:     %u\n"
3186                    "f2txdata:     %u\nf1regdata:    %u\n"
3187                    "tickcnt:      %u\ntx_ctlerrs:   %lu\n"
3188                    "tx_ctlpkts:   %lu\nrx_ctlerrs:   %lu\n"
3189                    "rx_ctlpkts:   %lu\nrx_readahead: %lu\n",
3190                    sdcnt->intrcount, sdcnt->lastintrs,
3191                    sdcnt->pollcnt, sdcnt->regfails,
3192                    sdcnt->tx_sderrs, sdcnt->fcqueued,
3193                    sdcnt->rxrtx, sdcnt->rx_toolong,
3194                    sdcnt->rxc_errors, sdcnt->rx_hdrfail,
3195                    sdcnt->rx_badhdr, sdcnt->rx_badseq,
3196                    sdcnt->fc_rcvd, sdcnt->fc_xoff,
3197                    sdcnt->fc_xon, sdcnt->rxglomfail,
3198                    sdcnt->rxglomframes, sdcnt->rxglompkts,
3199                    sdcnt->f2rxhdrs, sdcnt->f2rxdata,
3200                    sdcnt->f2txdata, sdcnt->f1regdata,
3201                    sdcnt->tickcnt, sdcnt->tx_ctlerrs,
3202                    sdcnt->tx_ctlpkts, sdcnt->rx_ctlerrs,
3203                    sdcnt->rx_ctlpkts, sdcnt->rx_readahead_cnt);
3204
3205         return 0;
3206 }
3207
3208 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3209 {
3210         struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3211         struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3212
3213         if (IS_ERR_OR_NULL(dentry))
3214                 return;
3215
3216         brcmf_debugfs_add_entry(drvr, "forensics", brcmf_sdio_forensic_read);
3217         brcmf_debugfs_add_entry(drvr, "counters",
3218                                 brcmf_debugfs_sdio_count_read);
3219         debugfs_create_u32("console_interval", 0644, dentry,
3220                            &bus->console_interval);
3221 }
3222 #else
3223 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3224 {
3225         return 0;
3226 }
3227
3228 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3229 {
3230 }
3231 #endif /* DEBUG */
3232
3233 static int
3234 brcmf_sdio_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3235 {
3236         int timeleft;
3237         uint rxlen = 0;
3238         bool pending;
3239         u8 *buf;
3240         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3241         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3242         struct brcmf_sdio *bus = sdiodev->bus;
3243
3244         brcmf_dbg(TRACE, "Enter\n");
3245         if (sdiodev->state != BRCMF_SDIOD_DATA)
3246                 return -EIO;
3247
3248         /* Wait until control frame is available */
3249         timeleft = brcmf_sdio_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3250
3251         spin_lock_bh(&bus->rxctl_lock);
3252         rxlen = bus->rxlen;
3253         memcpy(msg, bus->rxctl, min(msglen, rxlen));
3254         bus->rxctl = NULL;
3255         buf = bus->rxctl_orig;
3256         bus->rxctl_orig = NULL;
3257         bus->rxlen = 0;
3258         spin_unlock_bh(&bus->rxctl_lock);
3259         vfree(buf);
3260
3261         if (rxlen) {
3262                 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3263                           rxlen, msglen);
3264         } else if (timeleft == 0) {
3265                 brcmf_err("resumed on timeout\n");
3266                 brcmf_sdio_checkdied(bus);
3267         } else if (pending) {
3268                 brcmf_dbg(CTL, "cancelled\n");
3269                 return -ERESTARTSYS;
3270         } else {
3271                 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3272                 brcmf_sdio_checkdied(bus);
3273         }
3274
3275         if (rxlen)
3276                 bus->sdcnt.rx_ctlpkts++;
3277         else
3278                 bus->sdcnt.rx_ctlerrs++;
3279
3280         return rxlen ? (int)rxlen : -ETIMEDOUT;
3281 }
3282
3283 #ifdef DEBUG
3284 static bool
3285 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3286                         u8 *ram_data, uint ram_sz)
3287 {
3288         char *ram_cmp;
3289         int err;
3290         bool ret = true;
3291         int address;
3292         int offset;
3293         int len;
3294
3295         /* read back and verify */
3296         brcmf_dbg(INFO, "Compare RAM dl & ul at 0x%08x; size=%d\n", ram_addr,
3297                   ram_sz);
3298         ram_cmp = kmalloc(MEMBLOCK, GFP_KERNEL);
3299         /* do not proceed while no memory but  */
3300         if (!ram_cmp)
3301                 return true;
3302
3303         address = ram_addr;
3304         offset = 0;
3305         while (offset < ram_sz) {
3306                 len = ((offset + MEMBLOCK) < ram_sz) ? MEMBLOCK :
3307                       ram_sz - offset;
3308                 err = brcmf_sdiod_ramrw(sdiodev, false, address, ram_cmp, len);
3309                 if (err) {
3310                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3311                                   err, len, address);
3312                         ret = false;
3313                         break;
3314                 } else if (memcmp(ram_cmp, &ram_data[offset], len)) {
3315                         brcmf_err("Downloaded RAM image is corrupted, block offset is %d, len is %d\n",
3316                                   offset, len);
3317                         ret = false;
3318                         break;
3319                 }
3320                 offset += len;
3321                 address += len;
3322         }
3323
3324         kfree(ram_cmp);
3325
3326         return ret;
3327 }
3328 #else   /* DEBUG */
3329 static bool
3330 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3331                         u8 *ram_data, uint ram_sz)
3332 {
3333         return true;
3334 }
3335 #endif  /* DEBUG */
3336
3337 static int brcmf_sdio_download_code_file(struct brcmf_sdio *bus,
3338                                          const struct firmware *fw)
3339 {
3340         int err;
3341
3342         brcmf_dbg(TRACE, "Enter\n");
3343
3344         err = brcmf_sdiod_ramrw(bus->sdiodev, true, bus->ci->rambase,
3345                                 (u8 *)fw->data, fw->size);
3346         if (err)
3347                 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3348                           err, (int)fw->size, bus->ci->rambase);
3349         else if (!brcmf_sdio_verifymemory(bus->sdiodev, bus->ci->rambase,
3350                                           (u8 *)fw->data, fw->size))
3351                 err = -EIO;
3352
3353         return err;
3354 }
3355
3356 static int brcmf_sdio_download_nvram(struct brcmf_sdio *bus,
3357                                      void *vars, u32 varsz)
3358 {
3359         int address;
3360         int err;
3361
3362         brcmf_dbg(TRACE, "Enter\n");
3363
3364         address = bus->ci->ramsize - varsz + bus->ci->rambase;
3365         err = brcmf_sdiod_ramrw(bus->sdiodev, true, address, vars, varsz);
3366         if (err)
3367                 brcmf_err("error %d on writing %d nvram bytes at 0x%08x\n",
3368                           err, varsz, address);
3369         else if (!brcmf_sdio_verifymemory(bus->sdiodev, address, vars, varsz))
3370                 err = -EIO;
3371
3372         return err;
3373 }
3374
3375 static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus,
3376                                         const struct firmware *fw,
3377                                         void *nvram, u32 nvlen)
3378 {
3379         int bcmerror = -EFAULT;
3380         u32 rstvec;
3381
3382         sdio_claim_host(bus->sdiodev->func[1]);
3383         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3384
3385         rstvec = get_unaligned_le32(fw->data);
3386         brcmf_dbg(SDIO, "firmware rstvec: %x\n", rstvec);
3387
3388         bcmerror = brcmf_sdio_download_code_file(bus, fw);
3389         release_firmware(fw);
3390         if (bcmerror) {
3391                 brcmf_err("dongle image file download failed\n");
3392                 brcmf_fw_nvram_free(nvram);
3393                 goto err;
3394         }
3395
3396         bcmerror = brcmf_sdio_download_nvram(bus, nvram, nvlen);
3397         brcmf_fw_nvram_free(nvram);
3398         if (bcmerror) {
3399                 brcmf_err("dongle nvram file download failed\n");
3400                 goto err;
3401         }
3402
3403         /* Take arm out of reset */
3404         if (!brcmf_chip_set_active(bus->ci, rstvec)) {
3405                 brcmf_err("error getting out of ARM core reset\n");
3406                 goto err;
3407         }
3408
3409         /* Allow full data communication using DPC from now on. */
3410         brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
3411         bcmerror = 0;
3412
3413 err:
3414         brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
3415         sdio_release_host(bus->sdiodev->func[1]);
3416         return bcmerror;
3417 }
3418
3419 static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
3420 {
3421         int err = 0;
3422         u8 val;
3423
3424         brcmf_dbg(TRACE, "Enter\n");
3425
3426         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3427         if (err) {
3428                 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3429                 return;
3430         }
3431
3432         val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3433         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3434         if (err) {
3435                 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3436                 return;
3437         }
3438
3439         /* Add CMD14 Support */
3440         brcmf_sdiod_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3441                           (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3442                            SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3443                           &err);
3444         if (err) {
3445                 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3446                 return;
3447         }
3448
3449         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3450                           SBSDIO_FORCE_HT, &err);
3451         if (err) {
3452                 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3453                 return;
3454         }
3455
3456         /* set flag */
3457         bus->sr_enabled = true;
3458         brcmf_dbg(INFO, "SR enabled\n");
3459 }
3460
3461 /* enable KSO bit */
3462 static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
3463 {
3464         u8 val;
3465         int err = 0;
3466
3467         brcmf_dbg(TRACE, "Enter\n");
3468
3469         /* KSO bit added in SDIO core rev 12 */
3470         if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12)
3471                 return 0;
3472
3473         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3474         if (err) {
3475                 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3476                 return err;
3477         }
3478
3479         if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3480                 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3481                         SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3482                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3483                                   val, &err);
3484                 if (err) {
3485                         brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3486                         return err;
3487                 }
3488         }
3489
3490         return 0;
3491 }
3492
3493
3494 static int brcmf_sdio_bus_preinit(struct device *dev)
3495 {
3496         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3497         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3498         struct brcmf_sdio *bus = sdiodev->bus;
3499         uint pad_size;
3500         u32 value;
3501         int err;
3502
3503         /* the commands below use the terms tx and rx from
3504          * a device perspective, ie. bus:txglom affects the
3505          * bus transfers from device to host.
3506          */
3507         if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12) {
3508                 /* for sdio core rev < 12, disable txgloming */
3509                 value = 0;
3510                 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3511                                            sizeof(u32));
3512         } else {
3513                 /* otherwise, set txglomalign */
3514                 value = 4;
3515                 if (sdiodev->pdata)
3516                         value = sdiodev->pdata->sd_sgentry_align;
3517                 /* SDIO ADMA requires at least 32 bit alignment */
3518                 value = max_t(u32, value, 4);
3519                 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3520                                            sizeof(u32));
3521         }
3522
3523         if (err < 0)
3524                 goto done;
3525
3526         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3527         if (sdiodev->sg_support) {
3528                 bus->txglom = false;
3529                 value = 1;
3530                 pad_size = bus->sdiodev->func[2]->cur_blksize << 1;
3531                 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3532                                            &value, sizeof(u32));
3533                 if (err < 0) {
3534                         /* bus:rxglom is allowed to fail */
3535                         err = 0;
3536                 } else {
3537                         bus->txglom = true;
3538                         bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3539                 }
3540         }
3541         brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3542
3543 done:
3544         return err;
3545 }
3546
3547 void brcmf_sdio_trigger_dpc(struct brcmf_sdio *bus)
3548 {
3549         if (!bus->dpc_triggered) {
3550                 bus->dpc_triggered = true;
3551                 queue_work(bus->brcmf_wq, &bus->datawork);
3552         }
3553 }
3554
3555 void brcmf_sdio_isr(struct brcmf_sdio *bus)
3556 {
3557         brcmf_dbg(TRACE, "Enter\n");
3558
3559         if (!bus) {
3560                 brcmf_err("bus is null pointer, exiting\n");
3561                 return;
3562         }
3563
3564         /* Count the interrupt call */
3565         bus->sdcnt.intrcount++;
3566         if (in_interrupt())
3567                 atomic_set(&bus->ipend, 1);
3568         else
3569                 if (brcmf_sdio_intr_rstatus(bus)) {
3570                         brcmf_err("failed backplane access\n");
3571                 }
3572
3573         /* Disable additional interrupts (is this needed now)? */
3574         if (!bus->intr)
3575                 brcmf_err("isr w/o interrupt configured!\n");
3576
3577         bus->dpc_triggered = true;
3578         queue_work(bus->brcmf_wq, &bus->datawork);
3579 }
3580
3581 static void brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
3582 {
3583         brcmf_dbg(TIMER, "Enter\n");
3584
3585         /* Poll period: check device if appropriate. */
3586         if (!bus->sr_enabled &&
3587             bus->poll && (++bus->polltick >= bus->pollrate)) {
3588                 u32 intstatus = 0;
3589
3590                 /* Reset poll tick */
3591                 bus->polltick = 0;
3592
3593                 /* Check device if no interrupts */
3594                 if (!bus->intr ||
3595                     (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3596
3597                         if (!bus->dpc_triggered) {
3598                                 u8 devpend;
3599
3600                                 sdio_claim_host(bus->sdiodev->func[1]);
3601                                 devpend = brcmf_sdiod_regrb(bus->sdiodev,
3602                                                             SDIO_CCCR_INTx,
3603                                                             NULL);
3604                                 sdio_release_host(bus->sdiodev->func[1]);
3605                                 intstatus = devpend & (INTR_STATUS_FUNC1 |
3606                                                        INTR_STATUS_FUNC2);
3607                         }
3608
3609                         /* If there is something, make like the ISR and
3610                                  schedule the DPC */
3611                         if (intstatus) {
3612                                 bus->sdcnt.pollcnt++;
3613                                 atomic_set(&bus->ipend, 1);
3614
3615                                 bus->dpc_triggered = true;
3616                                 queue_work(bus->brcmf_wq, &bus->datawork);
3617                         }
3618                 }
3619
3620                 /* Update interrupt tracking */
3621                 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3622         }
3623 #ifdef DEBUG
3624         /* Poll for console output periodically */
3625         if (bus->sdiodev->state == BRCMF_SDIOD_DATA &&
3626             bus->console_interval != 0) {
3627                 bus->console.count += BRCMF_WD_POLL_MS;
3628                 if (bus->console.count >= bus->console_interval) {
3629                         bus->console.count -= bus->console_interval;
3630                         sdio_claim_host(bus->sdiodev->func[1]);
3631                         /* Make sure backplane clock is on */
3632                         brcmf_sdio_bus_sleep(bus, false, false);
3633                         if (brcmf_sdio_readconsole(bus) < 0)
3634                                 /* stop on error */
3635                                 bus->console_interval = 0;
3636                         sdio_release_host(bus->sdiodev->func[1]);
3637                 }
3638         }
3639 #endif                          /* DEBUG */
3640
3641         /* On idle timeout clear activity flag and/or turn off clock */
3642         if (!bus->dpc_triggered) {
3643                 rmb();
3644                 if ((!bus->dpc_running) && (bus->idletime > 0) &&
3645                     (bus->clkstate == CLK_AVAIL)) {
3646                         bus->idlecount++;
3647                         if (bus->idlecount > bus->idletime) {
3648                                 brcmf_dbg(SDIO, "idle\n");
3649                                 sdio_claim_host(bus->sdiodev->func[1]);
3650                                 brcmf_sdio_wd_timer(bus, 0);
3651                                 bus->idlecount = 0;
3652                                 brcmf_sdio_bus_sleep(bus, true, false);
3653                                 sdio_release_host(bus->sdiodev->func[1]);
3654                         }
3655                 } else {
3656                         bus->idlecount = 0;
3657                 }
3658         } else {
3659                 bus->idlecount = 0;
3660         }
3661 }
3662
3663 static void brcmf_sdio_dataworker(struct work_struct *work)
3664 {
3665         struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3666                                               datawork);
3667
3668         bus->dpc_running = true;
3669         wmb();
3670         while (ACCESS_ONCE(bus->dpc_triggered)) {
3671                 bus->dpc_triggered = false;
3672                 brcmf_sdio_dpc(bus);
3673                 bus->idlecount = 0;
3674         }
3675         bus->dpc_running = false;
3676         if (brcmf_sdiod_freezing(bus->sdiodev)) {
3677                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DOWN);
3678                 brcmf_sdiod_try_freeze(bus->sdiodev);
3679                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
3680         }
3681 }
3682
3683 static void
3684 brcmf_sdio_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,
3685                              struct brcmf_chip *ci, u32 drivestrength)
3686 {
3687         const struct sdiod_drive_str *str_tab = NULL;
3688         u32 str_mask;
3689         u32 str_shift;
3690         u32 base;
3691         u32 i;
3692         u32 drivestrength_sel = 0;
3693         u32 cc_data_temp;
3694         u32 addr;
3695
3696         if (!(ci->cc_caps & CC_CAP_PMU))
3697                 return;
3698
3699         switch (SDIOD_DRVSTR_KEY(ci->chip, ci->pmurev)) {
3700         case SDIOD_DRVSTR_KEY(BRCM_CC_4330_CHIP_ID, 12):
3701                 str_tab = sdiod_drvstr_tab1_1v8;
3702                 str_mask = 0x00003800;
3703                 str_shift = 11;
3704                 break;
3705         case SDIOD_DRVSTR_KEY(BRCM_CC_4334_CHIP_ID, 17):
3706                 str_tab = sdiod_drvstr_tab6_1v8;
3707                 str_mask = 0x00001800;
3708                 str_shift = 11;
3709                 break;
3710         case SDIOD_DRVSTR_KEY(BRCM_CC_43143_CHIP_ID, 17):
3711                 /* note: 43143 does not support tristate */
3712                 i = ARRAY_SIZE(sdiod_drvstr_tab2_3v3) - 1;
3713                 if (drivestrength >= sdiod_drvstr_tab2_3v3[i].strength) {
3714                         str_tab = sdiod_drvstr_tab2_3v3;
3715                         str_mask = 0x00000007;
3716                         str_shift = 0;
3717                 } else
3718                         brcmf_err("Invalid SDIO Drive strength for chip %s, strength=%d\n",
3719                                   ci->name, drivestrength);
3720                 break;
3721         case SDIOD_DRVSTR_KEY(BRCM_CC_43362_CHIP_ID, 13):
3722                 str_tab = sdiod_drive_strength_tab5_1v8;
3723                 str_mask = 0x00003800;
3724                 str_shift = 11;
3725                 break;
3726         default:
3727                 brcmf_err("No SDIO Drive strength init done for chip %s rev %d pmurev %d\n",
3728                           ci->name, ci->chiprev, ci->pmurev);
3729                 break;
3730         }
3731
3732         if (str_tab != NULL) {
3733                 for (i = 0; str_tab[i].strength != 0; i++) {
3734                         if (drivestrength >= str_tab[i].strength) {
3735                                 drivestrength_sel = str_tab[i].sel;
3736                                 break;
3737                         }
3738                 }
3739                 base = brcmf_chip_get_chipcommon(ci)->base;
3740                 addr = CORE_CC_REG(base, chipcontrol_addr);
3741                 brcmf_sdiod_regwl(sdiodev, addr, 1, NULL);
3742                 cc_data_temp = brcmf_sdiod_regrl(sdiodev, addr, NULL);
3743                 cc_data_temp &= ~str_mask;
3744                 drivestrength_sel <<= str_shift;
3745                 cc_data_temp |= drivestrength_sel;
3746                 brcmf_sdiod_regwl(sdiodev, addr, cc_data_temp, NULL);
3747
3748                 brcmf_dbg(INFO, "SDIO: %d mA (req=%d mA) drive strength selected, set to 0x%08x\n",
3749                           str_tab[i].strength, drivestrength, cc_data_temp);
3750         }
3751 }
3752
3753 static int brcmf_sdio_buscoreprep(void *ctx)
3754 {
3755         struct brcmf_sdio_dev *sdiodev = ctx;
3756         int err = 0;
3757         u8 clkval, clkset;
3758
3759         /* Try forcing SDIO core to do ALPAvail request only */
3760         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
3761         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3762         if (err) {
3763                 brcmf_err("error writing for HT off\n");
3764                 return err;
3765         }
3766
3767         /* If register supported, wait for ALPAvail and then force ALP */
3768         /* This may take up to 15 milliseconds */
3769         clkval = brcmf_sdiod_regrb(sdiodev,
3770                                    SBSDIO_FUNC1_CHIPCLKCSR, NULL);
3771
3772         if ((clkval & ~SBSDIO_AVBITS) != clkset) {
3773                 brcmf_err("ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
3774                           clkset, clkval);
3775                 return -EACCES;
3776         }
3777
3778         SPINWAIT(((clkval = brcmf_sdiod_regrb(sdiodev,
3779                                               SBSDIO_FUNC1_CHIPCLKCSR, NULL)),
3780                         !SBSDIO_ALPAV(clkval)),
3781                         PMU_MAX_TRANSITION_DLY);
3782         if (!SBSDIO_ALPAV(clkval)) {
3783                 brcmf_err("timeout on ALPAV wait, clkval 0x%02x\n",
3784                           clkval);
3785                 return -EBUSY;
3786         }
3787
3788         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP;
3789         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3790         udelay(65);
3791
3792         /* Also, disable the extra SDIO pull-ups */
3793         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
3794
3795         return 0;
3796 }
3797
3798 static void brcmf_sdio_buscore_activate(void *ctx, struct brcmf_chip *chip,
3799                                         u32 rstvec)
3800 {
3801         struct brcmf_sdio_dev *sdiodev = ctx;
3802         struct brcmf_core *core;
3803         u32 reg_addr;
3804
3805         /* clear all interrupts */
3806         core = brcmf_chip_get_core(chip, BCMA_CORE_SDIO_DEV);
3807         reg_addr = core->base + offsetof(struct sdpcmd_regs, intstatus);
3808         brcmf_sdiod_regwl(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
3809
3810         if (rstvec)
3811                 /* Write reset vector to address 0 */
3812                 brcmf_sdiod_ramrw(sdiodev, true, 0, (void *)&rstvec,
3813                                   sizeof(rstvec));
3814 }
3815
3816 static u32 brcmf_sdio_buscore_read32(void *ctx, u32 addr)
3817 {
3818         struct brcmf_sdio_dev *sdiodev = ctx;
3819         u32 val, rev;
3820
3821         val = brcmf_sdiod_regrl(sdiodev, addr, NULL);
3822         if (sdiodev->func[0]->device == SDIO_DEVICE_ID_BROADCOM_4335_4339 &&
3823             addr == CORE_CC_REG(SI_ENUM_BASE, chipid)) {
3824                 rev = (val & CID_REV_MASK) >> CID_REV_SHIFT;
3825                 if (rev >= 2) {
3826                         val &= ~CID_ID_MASK;
3827                         val |= BRCM_CC_4339_CHIP_ID;
3828                 }
3829         }
3830         return val;
3831 }
3832
3833 static void brcmf_sdio_buscore_write32(void *ctx, u32 addr, u32 val)
3834 {
3835         struct brcmf_sdio_dev *sdiodev = ctx;
3836
3837         brcmf_sdiod_regwl(sdiodev, addr, val, NULL);
3838 }
3839
3840 static const struct brcmf_buscore_ops brcmf_sdio_buscore_ops = {
3841         .prepare = brcmf_sdio_buscoreprep,
3842         .activate = brcmf_sdio_buscore_activate,
3843         .read32 = brcmf_sdio_buscore_read32,
3844         .write32 = brcmf_sdio_buscore_write32,
3845 };
3846
3847 static bool
3848 brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
3849 {
3850         u8 clkctl = 0;
3851         int err = 0;
3852         int reg_addr;
3853         u32 reg_val;
3854         u32 drivestrength;
3855
3856         sdio_claim_host(bus->sdiodev->func[1]);
3857
3858         pr_debug("F1 signature read @0x18000000=0x%4x\n",
3859                  brcmf_sdiod_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3860
3861         /*
3862          * Force PLL off until brcmf_chip_attach()
3863          * programs PLL control regs
3864          */
3865
3866         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3867                           BRCMF_INIT_CLKCTL1, &err);
3868         if (!err)
3869                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
3870                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
3871
3872         if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3873                 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3874                           err, BRCMF_INIT_CLKCTL1, clkctl);
3875                 goto fail;
3876         }
3877
3878         bus->ci = brcmf_chip_attach(bus->sdiodev, &brcmf_sdio_buscore_ops);
3879         if (IS_ERR(bus->ci)) {
3880                 brcmf_err("brcmf_chip_attach failed!\n");
3881                 bus->ci = NULL;
3882                 goto fail;
3883         }
3884
3885         if (brcmf_sdio_kso_init(bus)) {
3886                 brcmf_err("error enabling KSO\n");
3887                 goto fail;
3888         }
3889
3890         if ((bus->sdiodev->pdata) && (bus->sdiodev->pdata->drive_strength))
3891                 drivestrength = bus->sdiodev->pdata->drive_strength;
3892         else
3893                 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3894         brcmf_sdio_drivestrengthinit(bus->sdiodev, bus->ci, drivestrength);
3895
3896         /* Set card control so an SDIO card reset does a WLAN backplane reset */
3897         reg_val = brcmf_sdiod_regrb(bus->sdiodev,
3898                                     SDIO_CCCR_BRCM_CARDCTRL, &err);
3899         if (err)
3900                 goto fail;
3901
3902         reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3903
3904         brcmf_sdiod_regwb(bus->sdiodev,
3905                           SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3906         if (err)
3907                 goto fail;
3908
3909         /* set PMUControl so a backplane reset does PMU state reload */
3910         reg_addr = CORE_CC_REG(brcmf_chip_get_chipcommon(bus->ci)->base,
3911                                pmucontrol);
3912         reg_val = brcmf_sdiod_regrl(bus->sdiodev, reg_addr, &err);
3913         if (err)
3914                 goto fail;
3915
3916         reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3917
3918         brcmf_sdiod_regwl(bus->sdiodev, reg_addr, reg_val, &err);
3919         if (err)
3920                 goto fail;
3921
3922         sdio_release_host(bus->sdiodev->func[1]);
3923
3924         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3925
3926         /* allocate header buffer */
3927         bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
3928         if (!bus->hdrbuf)
3929                 return false;
3930         /* Locate an appropriately-aligned portion of hdrbuf */
3931         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3932                                     bus->head_align);
3933
3934         /* Set the poll and/or interrupt flags */
3935         bus->intr = true;
3936         bus->poll = false;
3937         if (bus->poll)
3938                 bus->pollrate = 1;
3939
3940         return true;
3941
3942 fail:
3943         sdio_release_host(bus->sdiodev->func[1]);
3944         return false;
3945 }
3946
3947 static int
3948 brcmf_sdio_watchdog_thread(void *data)
3949 {
3950         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3951         int wait;
3952
3953         allow_signal(SIGTERM);
3954         /* Run until signal received */
3955         brcmf_sdiod_freezer_count(bus->sdiodev);
3956         while (1) {
3957                 if (kthread_should_stop())
3958                         break;
3959                 brcmf_sdiod_freezer_uncount(bus->sdiodev);
3960                 wait = wait_for_completion_interruptible(&bus->watchdog_wait);
3961                 brcmf_sdiod_freezer_count(bus->sdiodev);
3962                 brcmf_sdiod_try_freeze(bus->sdiodev);
3963                 if (!wait) {
3964                         brcmf_sdio_bus_watchdog(bus);
3965                         /* Count the tick for reference */
3966                         bus->sdcnt.tickcnt++;
3967                         reinit_completion(&bus->watchdog_wait);
3968                 } else
3969                         break;
3970         }
3971         return 0;
3972 }
3973
3974 static void
3975 brcmf_sdio_watchdog(unsigned long data)
3976 {
3977         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3978
3979         if (bus->watchdog_tsk) {
3980                 complete(&bus->watchdog_wait);
3981                 /* Reschedule the watchdog */
3982                 if (bus->wd_timer_valid)
3983                         mod_timer(&bus->timer,
3984                                   jiffies + msecs_to_jiffies(BRCMF_WD_POLL_MS));
3985         }
3986 }
3987
3988 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
3989         .stop = brcmf_sdio_bus_stop,
3990         .preinit = brcmf_sdio_bus_preinit,
3991         .txdata = brcmf_sdio_bus_txdata,
3992         .txctl = brcmf_sdio_bus_txctl,
3993         .rxctl = brcmf_sdio_bus_rxctl,
3994         .gettxq = brcmf_sdio_bus_gettxq,
3995         .wowl_config = brcmf_sdio_wowl_config
3996 };
3997
3998 static void brcmf_sdio_firmware_callback(struct device *dev,
3999                                          const struct firmware *code,
4000                                          void *nvram, u32 nvram_len)
4001 {
4002         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
4003         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
4004         struct brcmf_sdio *bus = sdiodev->bus;
4005         int err = 0;
4006         u8 saveclk;
4007
4008         brcmf_dbg(TRACE, "Enter: dev=%s\n", dev_name(dev));
4009
4010         if (!bus_if->drvr)
4011                 return;
4012
4013         /* try to download image and nvram to the dongle */
4014         bus->alp_only = true;
4015         err = brcmf_sdio_download_firmware(bus, code, nvram, nvram_len);
4016         if (err)
4017                 goto fail;
4018         bus->alp_only = false;
4019
4020         /* Start the watchdog timer */
4021         bus->sdcnt.tickcnt = 0;
4022         brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
4023
4024         sdio_claim_host(sdiodev->func[1]);
4025
4026         /* Make sure backplane clock is on, needed to generate F2 interrupt */
4027         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4028         if (bus->clkstate != CLK_AVAIL)
4029                 goto release;
4030
4031         /* Force clocks on backplane to be sure F2 interrupt propagates */
4032         saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, &err);
4033         if (!err) {
4034                 brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
4035                                   (saveclk | SBSDIO_FORCE_HT), &err);
4036         }
4037         if (err) {
4038                 brcmf_err("Failed to force clock for F2: err %d\n", err);
4039                 goto release;
4040         }
4041
4042         /* Enable function 2 (frame transfers) */
4043         w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
4044                   offsetof(struct sdpcmd_regs, tosbmailboxdata));
4045         err = sdio_enable_func(sdiodev->func[SDIO_FUNC_2]);
4046
4047
4048         brcmf_dbg(INFO, "enable F2: err=%d\n", err);
4049
4050         /* If F2 successfully enabled, set core and enable interrupts */
4051         if (!err) {
4052                 /* Set up the interrupt mask and enable interrupts */
4053                 bus->hostintmask = HOSTINTMASK;
4054                 w_sdreg32(bus, bus->hostintmask,
4055                           offsetof(struct sdpcmd_regs, hostintmask));
4056
4057                 brcmf_sdiod_regwb(sdiodev, SBSDIO_WATERMARK, 8, &err);
4058         } else {
4059                 /* Disable F2 again */
4060                 sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
4061                 goto release;
4062         }
4063
4064         if (brcmf_chip_sr_capable(bus->ci)) {
4065                 brcmf_sdio_sr_init(bus);
4066         } else {
4067                 /* Restore previous clock setting */
4068                 brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
4069                                   saveclk, &err);
4070         }
4071
4072         if (err == 0) {
4073                 err = brcmf_sdiod_intr_register(sdiodev);
4074                 if (err != 0)
4075                         brcmf_err("intr register failed:%d\n", err);
4076         }
4077
4078         /* If we didn't come up, turn off backplane clock */
4079         if (err != 0)
4080                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4081
4082         sdio_release_host(sdiodev->func[1]);
4083
4084         err = brcmf_bus_start(dev);
4085         if (err != 0) {
4086                 brcmf_err("dongle is not responding\n");
4087                 goto fail;
4088         }
4089         return;
4090
4091 release:
4092         sdio_release_host(sdiodev->func[1]);
4093 fail:
4094         brcmf_dbg(TRACE, "failed: dev=%s, err=%d\n", dev_name(dev), err);
4095         device_release_driver(dev);
4096 }
4097
4098 struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
4099 {
4100         int ret;
4101         struct brcmf_sdio *bus;
4102         struct workqueue_struct *wq;
4103
4104         brcmf_dbg(TRACE, "Enter\n");
4105
4106         /* Allocate private bus interface state */
4107         bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
4108         if (!bus)
4109                 goto fail;
4110
4111         bus->sdiodev = sdiodev;
4112         sdiodev->bus = bus;
4113         skb_queue_head_init(&bus->glom);
4114         bus->txbound = BRCMF_TXBOUND;
4115         bus->rxbound = BRCMF_RXBOUND;
4116         bus->txminmax = BRCMF_TXMINMAX;
4117         bus->tx_seq = SDPCM_SEQ_WRAP - 1;
4118
4119         /* platform specific configuration:
4120          *   alignments must be at least 4 bytes for ADMA
4121          */
4122         bus->head_align = ALIGNMENT;
4123         bus->sgentry_align = ALIGNMENT;
4124         if (sdiodev->pdata) {
4125                 if (sdiodev->pdata->sd_head_align > ALIGNMENT)
4126                         bus->head_align = sdiodev->pdata->sd_head_align;
4127                 if (sdiodev->pdata->sd_sgentry_align > ALIGNMENT)
4128                         bus->sgentry_align = sdiodev->pdata->sd_sgentry_align;
4129         }
4130
4131         /* single-threaded workqueue */
4132         wq = alloc_ordered_workqueue("brcmf_wq/%s", WQ_MEM_RECLAIM,
4133                                      dev_name(&sdiodev->func[1]->dev));
4134         if (!wq) {
4135                 brcmf_err("insufficient memory to create txworkqueue\n");
4136                 goto fail;
4137         }
4138         brcmf_sdiod_freezer_count(sdiodev);
4139         INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
4140         bus->brcmf_wq = wq;
4141
4142         /* attempt to attach to the dongle */
4143         if (!(brcmf_sdio_probe_attach(bus))) {
4144                 brcmf_err("brcmf_sdio_probe_attach failed\n");
4145                 goto fail;
4146         }
4147
4148         spin_lock_init(&bus->rxctl_lock);
4149         spin_lock_init(&bus->txq_lock);
4150         init_waitqueue_head(&bus->ctrl_wait);
4151         init_waitqueue_head(&bus->dcmd_resp_wait);
4152
4153         /* Set up the watchdog timer */
4154         init_timer(&bus->timer);
4155         bus->timer.data = (unsigned long)bus;
4156         bus->timer.function = brcmf_sdio_watchdog;
4157
4158         /* Initialize watchdog thread */
4159         init_completion(&bus->watchdog_wait);
4160         bus->watchdog_tsk = kthread_run(brcmf_sdio_watchdog_thread,
4161                                         bus, "brcmf_wdog/%s",
4162                                         dev_name(&sdiodev->func[1]->dev));
4163         if (IS_ERR(bus->watchdog_tsk)) {
4164                 pr_warn("brcmf_watchdog thread failed to start\n");
4165                 bus->watchdog_tsk = NULL;
4166         }
4167         /* Initialize DPC thread */
4168         bus->dpc_triggered = false;
4169         bus->dpc_running = false;
4170
4171         /* Assign bus interface call back */
4172         bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
4173         bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
4174         bus->sdiodev->bus_if->chip = bus->ci->chip;
4175         bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
4176
4177         /* default sdio bus header length for tx packet */
4178         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4179
4180         /* Attach to the common layer, reserve hdr space */
4181         ret = brcmf_attach(bus->sdiodev->dev);
4182         if (ret != 0) {
4183                 brcmf_err("brcmf_attach failed\n");
4184                 goto fail;
4185         }
4186
4187         /* Query the F2 block size, set roundup accordingly */
4188         bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
4189         bus->roundup = min(max_roundup, bus->blocksize);
4190
4191         /* Allocate buffers */
4192         if (bus->sdiodev->bus_if->maxctl) {
4193                 bus->sdiodev->bus_if->maxctl += bus->roundup;
4194                 bus->rxblen =
4195                     roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
4196                             ALIGNMENT) + bus->head_align;
4197                 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
4198                 if (!(bus->rxbuf)) {
4199                         brcmf_err("rxbuf allocation failed\n");
4200                         goto fail;
4201                 }
4202         }
4203
4204         sdio_claim_host(bus->sdiodev->func[1]);
4205
4206         /* Disable F2 to clear any intermediate frame state on the dongle */
4207         sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
4208
4209         bus->rxflow = false;
4210
4211         /* Done with backplane-dependent accesses, can drop clock... */
4212         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
4213
4214         sdio_release_host(bus->sdiodev->func[1]);
4215
4216         /* ...and initialize clock/power states */
4217         bus->clkstate = CLK_SDONLY;
4218         bus->idletime = BRCMF_IDLE_INTERVAL;
4219         bus->idleclock = BRCMF_IDLE_ACTIVE;
4220
4221         /* SR state */
4222         bus->sr_enabled = false;
4223
4224         brcmf_sdio_debugfs_create(bus);
4225         brcmf_dbg(INFO, "completed!!\n");
4226
4227         ret = brcmf_sdio_get_fwnames(bus->ci, sdiodev);
4228         if (ret)
4229                 goto fail;
4230
4231         ret = brcmf_fw_get_firmwares(sdiodev->dev, BRCMF_FW_REQUEST_NVRAM,
4232                                      sdiodev->fw_name, sdiodev->nvram_name,
4233                                      brcmf_sdio_firmware_callback);
4234         if (ret != 0) {
4235                 brcmf_err("async firmware request failed: %d\n", ret);
4236                 goto fail;
4237         }
4238
4239         return bus;
4240
4241 fail:
4242         brcmf_sdio_remove(bus);
4243         return NULL;
4244 }
4245
4246 /* Detach and free everything */
4247 void brcmf_sdio_remove(struct brcmf_sdio *bus)
4248 {
4249         brcmf_dbg(TRACE, "Enter\n");
4250
4251         if (bus) {
4252                 /* De-register interrupt handler */
4253                 brcmf_sdiod_intr_unregister(bus->sdiodev);
4254
4255                 brcmf_detach(bus->sdiodev->dev);
4256
4257                 cancel_work_sync(&bus->datawork);
4258                 if (bus->brcmf_wq)
4259                         destroy_workqueue(bus->brcmf_wq);
4260
4261                 if (bus->ci) {
4262                         if (bus->sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
4263                                 sdio_claim_host(bus->sdiodev->func[1]);
4264                                 brcmf_sdio_wd_timer(bus, 0);
4265                                 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4266                                 /* Leave the device in state where it is
4267                                  * 'passive'. This is done by resetting all
4268                                  * necessary cores.
4269                                  */
4270                                 msleep(20);
4271                                 brcmf_chip_set_passive(bus->ci);
4272                                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4273                                 sdio_release_host(bus->sdiodev->func[1]);
4274                         }
4275                         brcmf_chip_detach(bus->ci);
4276                 }
4277
4278                 kfree(bus->rxbuf);
4279                 kfree(bus->hdrbuf);
4280                 kfree(bus);
4281         }
4282
4283         brcmf_dbg(TRACE, "Disconnected\n");
4284 }
4285
4286 void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4287 {
4288         /* Totally stop the timer */
4289         if (!wdtick && bus->wd_timer_valid) {
4290                 del_timer_sync(&bus->timer);
4291                 bus->wd_timer_valid = false;
4292                 bus->save_ms = wdtick;
4293                 return;
4294         }
4295
4296         /* don't start the wd until fw is loaded */
4297         if (bus->sdiodev->state != BRCMF_SDIOD_DATA)
4298                 return;
4299
4300         if (wdtick) {
4301                 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4302                         if (bus->wd_timer_valid)
4303                                 /* Stop timer and restart at new value */
4304                                 del_timer_sync(&bus->timer);
4305
4306                         /* Create timer again when watchdog period is
4307                            dynamically changed or in the first instance
4308                          */
4309                         bus->timer.expires =
4310                                 jiffies + msecs_to_jiffies(BRCMF_WD_POLL_MS);
4311                         add_timer(&bus->timer);
4312
4313                 } else {
4314                         /* Re arm the timer, at last watchdog period */
4315                         mod_timer(&bus->timer,
4316                                 jiffies + msecs_to_jiffies(BRCMF_WD_POLL_MS));
4317                 }
4318
4319                 bus->wd_timer_valid = true;
4320                 bus->save_ms = wdtick;
4321         }
4322 }
4323
4324 int brcmf_sdio_sleep(struct brcmf_sdio *bus, bool sleep)
4325 {
4326         int ret;
4327
4328         sdio_claim_host(bus->sdiodev->func[1]);
4329         ret = brcmf_sdio_bus_sleep(bus, sleep, false);
4330         sdio_release_host(bus->sdiodev->func[1]);
4331
4332         return ret;
4333 }
4334