Merge tag 'renesas-soc-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git...
[firefly-linux-kernel-4.4.55.git] / drivers / net / wireless / cw1200 / cw1200_spi.c
1 /*
2  * Mac80211 SPI driver for ST-Ericsson CW1200 device
3  *
4  * Copyright (c) 2011, Sagrad Inc.
5  * Author:  Solomon Peachy <speachy@sagrad.com>
6  *
7  * Based on cw1200_sdio.c
8  * Copyright (c) 2010, ST-Ericsson
9  * Author: Dmitry Tarnyagin <dmitry.tarnyagin@lockless.no>
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License version 2 as
13  * published by the Free Software Foundation.
14  */
15
16 #include <linux/module.h>
17 #include <linux/gpio.h>
18 #include <linux/delay.h>
19 #include <linux/spinlock.h>
20 #include <linux/interrupt.h>
21 #include <net/mac80211.h>
22
23 #include <linux/spi/spi.h>
24 #include <linux/device.h>
25
26 #include "cw1200.h"
27 #include "hwbus.h"
28 #include <linux/platform_data/net-cw1200.h>
29 #include "hwio.h"
30
31 MODULE_AUTHOR("Solomon Peachy <speachy@sagrad.com>");
32 MODULE_DESCRIPTION("mac80211 ST-Ericsson CW1200 SPI driver");
33 MODULE_LICENSE("GPL");
34 MODULE_ALIAS("spi:cw1200_wlan_spi");
35
36 /* #define SPI_DEBUG */
37
38 struct hwbus_priv {
39         struct spi_device       *func;
40         struct cw1200_common    *core;
41         const struct cw1200_platform_data_spi *pdata;
42         spinlock_t              lock; /* Serialize all bus operations */
43         wait_queue_head_t       wq;
44         int claimed;
45         int irq_disabled;
46 };
47
48 #define SDIO_TO_SPI_ADDR(addr) ((addr & 0x1f)>>2)
49 #define SET_WRITE 0x7FFF /* usage: and operation */
50 #define SET_READ 0x8000  /* usage: or operation */
51
52 /* Notes on byte ordering:
53    LE:  B0 B1 B2 B3
54    BE:  B3 B2 B1 B0
55
56    Hardware expects 32-bit data to be written as 16-bit BE words:
57
58    B1 B0 B3 B2
59 */
60
61 static int cw1200_spi_memcpy_fromio(struct hwbus_priv *self,
62                                      unsigned int addr,
63                                      void *dst, int count)
64 {
65         int ret, i;
66         u16 regaddr;
67         struct spi_message      m;
68
69         struct spi_transfer     t_addr = {
70                 .tx_buf         = &regaddr,
71                 .len            = sizeof(regaddr),
72         };
73         struct spi_transfer     t_msg = {
74                 .rx_buf         = dst,
75                 .len            = count,
76         };
77
78         regaddr = (SDIO_TO_SPI_ADDR(addr))<<12;
79         regaddr |= SET_READ;
80         regaddr |= (count>>1);
81
82 #ifdef SPI_DEBUG
83         pr_info("READ : %04d from 0x%02x (%04x)\n", count, addr, regaddr);
84 #endif
85
86         /* Header is LE16 */
87         regaddr = cpu_to_le16(regaddr);
88
89         /* We have to byteswap if the SPI bus is limited to 8b operation
90            or we are running on a Big Endian system
91         */
92 #if defined(__LITTLE_ENDIAN)
93         if (self->func->bits_per_word == 8)
94 #endif
95                 regaddr = swab16(regaddr);
96
97         spi_message_init(&m);
98         spi_message_add_tail(&t_addr, &m);
99         spi_message_add_tail(&t_msg, &m);
100         ret = spi_sync(self->func, &m);
101
102 #ifdef SPI_DEBUG
103         pr_info("READ : ");
104         for (i = 0; i < t_addr.len; i++)
105                 printk("%02x ", ((u8 *)t_addr.tx_buf)[i]);
106         printk(" : ");
107         for (i = 0; i < t_msg.len; i++)
108                 printk("%02x ", ((u8 *)t_msg.rx_buf)[i]);
109         printk("\n");
110 #endif
111
112         /* We have to byteswap if the SPI bus is limited to 8b operation
113            or we are running on a Big Endian system
114         */
115 #if defined(__LITTLE_ENDIAN)
116         if (self->func->bits_per_word == 8)
117 #endif
118         {
119                 uint16_t *buf = (uint16_t *)dst;
120                 for (i = 0; i < ((count + 1) >> 1); i++)
121                         buf[i] = swab16(buf[i]);
122         }
123
124         return ret;
125 }
126
127 static int cw1200_spi_memcpy_toio(struct hwbus_priv *self,
128                                    unsigned int addr,
129                                    const void *src, int count)
130 {
131         int rval, i;
132         u16 regaddr;
133         struct spi_transfer     t_addr = {
134                 .tx_buf         = &regaddr,
135                 .len            = sizeof(regaddr),
136         };
137         struct spi_transfer     t_msg = {
138                 .tx_buf         = src,
139                 .len            = count,
140         };
141         struct spi_message      m;
142
143         regaddr = (SDIO_TO_SPI_ADDR(addr))<<12;
144         regaddr &= SET_WRITE;
145         regaddr |= (count>>1);
146
147 #ifdef SPI_DEBUG
148         pr_info("WRITE: %04d  to  0x%02x (%04x)\n", count, addr, regaddr);
149 #endif
150
151         /* Header is LE16 */
152         regaddr = cpu_to_le16(regaddr);
153
154         /* We have to byteswap if the SPI bus is limited to 8b operation
155            or we are running on a Big Endian system
156         */
157 #if defined(__LITTLE_ENDIAN)
158         if (self->func->bits_per_word == 8)
159 #endif
160         {
161                 uint16_t *buf = (uint16_t *)src;
162                 regaddr = swab16(regaddr);
163                 for (i = 0; i < ((count + 1) >> 1); i++)
164                         buf[i] = swab16(buf[i]);
165         }
166
167 #ifdef SPI_DEBUG
168         pr_info("WRITE: ");
169         for (i = 0; i < t_addr.len; i++)
170                 printk("%02x ", ((u8 *)t_addr.tx_buf)[i]);
171         printk(" : ");
172         for (i = 0; i < t_msg.len; i++)
173                 printk("%02x ", ((u8 *)t_msg.tx_buf)[i]);
174         printk("\n");
175 #endif
176
177         spi_message_init(&m);
178         spi_message_add_tail(&t_addr, &m);
179         spi_message_add_tail(&t_msg, &m);
180         rval = spi_sync(self->func, &m);
181
182 #ifdef SPI_DEBUG
183         pr_info("WROTE: %d\n", m.actual_length);
184 #endif
185
186 #if defined(__LITTLE_ENDIAN)
187         /* We have to byteswap if the SPI bus is limited to 8b operation */
188         if (self->func->bits_per_word == 8)
189 #endif
190         {
191                 uint16_t *buf = (uint16_t *)src;
192                 for (i = 0; i < ((count + 1) >> 1); i++)
193                         buf[i] = swab16(buf[i]);
194         }
195         return rval;
196 }
197
198 static void cw1200_spi_lock(struct hwbus_priv *self)
199 {
200         unsigned long flags;
201
202         DECLARE_WAITQUEUE(wait, current);
203
204         might_sleep();
205
206         add_wait_queue(&self->wq, &wait);
207         spin_lock_irqsave(&self->lock, flags);
208         while (1) {
209                 set_current_state(TASK_UNINTERRUPTIBLE);
210                 if (!self->claimed)
211                         break;
212                 spin_unlock_irqrestore(&self->lock, flags);
213                 schedule();
214                 spin_lock_irqsave(&self->lock, flags);
215         }
216         set_current_state(TASK_RUNNING);
217         self->claimed = 1;
218         spin_unlock_irqrestore(&self->lock, flags);
219         remove_wait_queue(&self->wq, &wait);
220
221         return;
222 }
223
224 static void cw1200_spi_unlock(struct hwbus_priv *self)
225 {
226         unsigned long flags;
227
228         spin_lock_irqsave(&self->lock, flags);
229         self->claimed = 0;
230         spin_unlock_irqrestore(&self->lock, flags);
231         wake_up(&self->wq);
232
233         return;
234 }
235
236 static irqreturn_t cw1200_spi_irq_handler(int irq, void *dev_id)
237 {
238         struct hwbus_priv *self = dev_id;
239
240         if (self->core) {
241                 disable_irq_nosync(self->func->irq);
242                 self->irq_disabled = 1;
243                 cw1200_irq_handler(self->core);
244                 return IRQ_HANDLED;
245         } else {
246                 return IRQ_NONE;
247         }
248 }
249
250 static int cw1200_spi_irq_subscribe(struct hwbus_priv *self)
251 {
252         int ret;
253
254         pr_debug("SW IRQ subscribe\n");
255
256         ret = request_any_context_irq(self->func->irq, cw1200_spi_irq_handler,
257                                       IRQF_TRIGGER_HIGH,
258                                       "cw1200_wlan_irq", self);
259         if (WARN_ON(ret < 0))
260                 goto exit;
261
262         ret = enable_irq_wake(self->func->irq);
263         if (WARN_ON(ret))
264                 goto free_irq;
265
266         return 0;
267
268 free_irq:
269         free_irq(self->func->irq, self);
270 exit:
271         return ret;
272 }
273
274 static int cw1200_spi_irq_unsubscribe(struct hwbus_priv *self)
275 {
276         pr_debug("SW IRQ unsubscribe\n");
277         disable_irq_wake(self->func->irq);
278         free_irq(self->func->irq, self);
279
280         return 0;
281 }
282
283 static int cw1200_spi_irq_enable(struct hwbus_priv *self, int enable)
284 {
285         /* Disables are handled by the interrupt handler */
286         if (enable && self->irq_disabled) {
287                 enable_irq(self->func->irq);
288                 self->irq_disabled = 0;
289         }
290
291         return 0;
292 }
293
294 static int cw1200_spi_off(const struct cw1200_platform_data_spi *pdata)
295 {
296         if (pdata->reset) {
297                 gpio_set_value(pdata->reset, 0);
298                 msleep(30); /* Min is 2 * CLK32K cycles */
299                 gpio_free(pdata->reset);
300         }
301
302         if (pdata->power_ctrl)
303                 pdata->power_ctrl(pdata, false);
304         if (pdata->clk_ctrl)
305                 pdata->clk_ctrl(pdata, false);
306
307         return 0;
308 }
309
310 static int cw1200_spi_on(const struct cw1200_platform_data_spi *pdata)
311 {
312         /* Ensure I/Os are pulled low */
313         if (pdata->reset) {
314                 gpio_request(pdata->reset, "cw1200_wlan_reset");
315                 gpio_direction_output(pdata->reset, 0);
316         }
317         if (pdata->powerup) {
318                 gpio_request(pdata->powerup, "cw1200_wlan_powerup");
319                 gpio_direction_output(pdata->powerup, 0);
320         }
321         if (pdata->reset || pdata->powerup)
322                 msleep(10); /* Settle time? */
323
324         /* Enable 3v3 and 1v8 to hardware */
325         if (pdata->power_ctrl) {
326                 if (pdata->power_ctrl(pdata, true)) {
327                         pr_err("power_ctrl() failed!\n");
328                         return -1;
329                 }
330         }
331
332         /* Enable CLK32K */
333         if (pdata->clk_ctrl) {
334                 if (pdata->clk_ctrl(pdata, true)) {
335                         pr_err("clk_ctrl() failed!\n");
336                         return -1;
337                 }
338                 msleep(10); /* Delay until clock is stable for 2 cycles */
339         }
340
341         /* Enable POWERUP signal */
342         if (pdata->powerup) {
343                 gpio_set_value(pdata->powerup, 1);
344                 msleep(250); /* or more..? */
345         }
346         /* Enable RSTn signal */
347         if (pdata->reset) {
348                 gpio_set_value(pdata->reset, 1);
349                 msleep(50); /* Or more..? */
350         }
351         return 0;
352 }
353
354 static size_t cw1200_spi_align_size(struct hwbus_priv *self, size_t size)
355 {
356         return size & 1 ? size + 1 : size;
357 }
358
359 static int cw1200_spi_pm(struct hwbus_priv *self, bool suspend)
360 {
361         return irq_set_irq_wake(self->func->irq, suspend);
362 }
363
364 static struct hwbus_ops cw1200_spi_hwbus_ops = {
365         .hwbus_memcpy_fromio    = cw1200_spi_memcpy_fromio,
366         .hwbus_memcpy_toio      = cw1200_spi_memcpy_toio,
367         .lock                   = cw1200_spi_lock,
368         .unlock                 = cw1200_spi_unlock,
369         .align_size             = cw1200_spi_align_size,
370         .power_mgmt             = cw1200_spi_pm,
371         .irq_enable             = cw1200_spi_irq_enable,
372 };
373
374 /* Probe Function to be called by SPI stack when device is discovered */
375 static int cw1200_spi_probe(struct spi_device *func)
376 {
377         const struct cw1200_platform_data_spi *plat_data =
378                 func->dev.platform_data;
379         struct hwbus_priv *self;
380         int status;
381
382         /* Sanity check speed */
383         if (func->max_speed_hz > 52000000)
384                 func->max_speed_hz = 52000000;
385         if (func->max_speed_hz < 1000000)
386                 func->max_speed_hz = 1000000;
387
388         /* Fix up transfer size */
389         if (plat_data->spi_bits_per_word)
390                 func->bits_per_word = plat_data->spi_bits_per_word;
391         if (!func->bits_per_word)
392                 func->bits_per_word = 16;
393
394         /* And finally.. */
395         func->mode = SPI_MODE_0;
396
397         pr_info("cw1200_wlan_spi: Probe called (CS %d M %d BPW %d CLK %d)\n",
398                 func->chip_select, func->mode, func->bits_per_word,
399                 func->max_speed_hz);
400
401         if (cw1200_spi_on(plat_data)) {
402                 pr_err("spi_on() failed!\n");
403                 return -1;
404         }
405
406         if (spi_setup(func)) {
407                 pr_err("spi_setup() failed!\n");
408                 return -1;
409         }
410
411         self = kzalloc(sizeof(*self), GFP_KERNEL);
412         if (!self) {
413                 pr_err("Can't allocate SPI hwbus_priv.");
414                 return -ENOMEM;
415         }
416
417         self->pdata = plat_data;
418         self->func = func;
419         spin_lock_init(&self->lock);
420
421         spi_set_drvdata(func, self);
422
423         init_waitqueue_head(&self->wq);
424
425         status = cw1200_spi_irq_subscribe(self);
426
427         status = cw1200_core_probe(&cw1200_spi_hwbus_ops,
428                                    self, &func->dev, &self->core,
429                                    self->pdata->ref_clk,
430                                    self->pdata->macaddr,
431                                    self->pdata->sdd_file,
432                                    self->pdata->have_5ghz);
433
434         if (status) {
435                 cw1200_spi_irq_unsubscribe(self);
436                 cw1200_spi_off(plat_data);
437                 kfree(self);
438         }
439
440         return status;
441 }
442
443 /* Disconnect Function to be called by SPI stack when device is disconnected */
444 static int cw1200_spi_disconnect(struct spi_device *func)
445 {
446         struct hwbus_priv *self = spi_get_drvdata(func);
447
448         if (self) {
449                 cw1200_spi_irq_unsubscribe(self);
450                 if (self->core) {
451                         cw1200_core_release(self->core);
452                         self->core = NULL;
453                 }
454                 kfree(self);
455         }
456         cw1200_spi_off(func->dev.platform_data);
457
458         return 0;
459 }
460
461 #ifdef CONFIG_PM
462 static int cw1200_spi_suspend(struct device *dev, pm_message_t state)
463 {
464         struct hwbus_priv *self = spi_get_drvdata(to_spi_device(dev));
465
466         if (!cw1200_can_suspend(self->core))
467                 return -EAGAIN;
468
469         /* XXX notify host that we have to keep CW1200 powered on? */
470         return 0;
471 }
472
473 static int cw1200_spi_resume(struct device *dev)
474 {
475         return 0;
476 }
477 #endif
478
479 static struct spi_driver spi_driver = {
480         .probe          = cw1200_spi_probe,
481         .remove         = cw1200_spi_disconnect,
482         .driver = {
483                 .name           = "cw1200_wlan_spi",
484                 .bus            = &spi_bus_type,
485                 .owner          = THIS_MODULE,
486 #ifdef CONFIG_PM
487                 .suspend        = cw1200_spi_suspend,
488                 .resume         = cw1200_spi_resume,
489 #endif
490         },
491 };
492
493 module_spi_driver(spi_driver);