drivers/net/wireless/iwlegacy/4965.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  *  Intel Linux Wireless <ilw@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/sched.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <net/mac80211.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39
  40 #include "common.h"
  41 #include "4965.h"
  42
  43 /**
  44  * il_verify_inst_sparse - verify runtime uCode image in card vs. host,
  45  *   using sample data 100 bytes apart.  If these sample points are good,
  46  *   it's a pretty good bet that everything between them is good, too.
  47  */
  48 static int
  49 il4965_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
  50 {
  51         u32 val;
  52         int ret = 0;
  53         u32 errcnt = 0;
  54         u32 i;
  55
  56         D_INFO("ucode inst image size is %u\n", len);
  57
  58         for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
  59                 /* read data comes through single port, auto-incr addr */
  60                 /* NOTE: Use the debugless read so we don't flood kernel log
  61                  * if IL_DL_IO is set */
  62                 il_wr(il, HBUS_TARG_MEM_RADDR, i + IL4965_RTC_INST_LOWER_BOUND);
  63                 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  64                 if (val != le32_to_cpu(*image)) {
  65                         ret = -EIO;
  66                         errcnt++;
  67                         if (errcnt >= 3)
  68                                 break;
  69                 }
  70         }
  71
  72         return ret;
  73 }
  74
  75 /**
  76  * il4965_verify_inst_full - verify runtime uCode image in card vs. host,
  77  *     looking at all data.
  78  */
  79 static int
  80 il4965_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
  81 {
  82         u32 val;
  83         u32 save_len = len;
  84         int ret = 0;
  85         u32 errcnt;
  86
  87         D_INFO("ucode inst image size is %u\n", len);
  88
  89         il_wr(il, HBUS_TARG_MEM_RADDR, IL4965_RTC_INST_LOWER_BOUND);
  90
  91         errcnt = 0;
  92         for (; len > 0; len -= sizeof(u32), image++) {
  93                 /* read data comes through single port, auto-incr addr */
  94                 /* NOTE: Use the debugless read so we don't flood kernel log
  95                  * if IL_DL_IO is set */
  96                 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  97                 if (val != le32_to_cpu(*image)) {
  98                         IL_ERR("uCode INST section is invalid at "
  99                                "offset 0x%x, is 0x%x, s/b 0x%x\n",
 100                                save_len - len, val, le32_to_cpu(*image));
 101                         ret = -EIO;
 102                         errcnt++;
 103                         if (errcnt >= 20)
 104                                 break;
 105                 }
 106         }
 107
 108         if (!errcnt)
 109                 D_INFO("ucode image in INSTRUCTION memory is good\n");
 110
 111         return ret;
 112 }
 113
 114 /**
 115  * il4965_verify_ucode - determine which instruction image is in SRAM,
 116  *    and verify its contents
 117  */
 118 int
 119 il4965_verify_ucode(struct il_priv *il)
 120 {
 121         __le32 *image;
 122         u32 len;
 123         int ret;
 124
 125         /* Try bootstrap */
 126         image = (__le32 *) il->ucode_boot.v_addr;
 127         len = il->ucode_boot.len;
 128         ret = il4965_verify_inst_sparse(il, image, len);
 129         if (!ret) {
 130                 D_INFO("Bootstrap uCode is good in inst SRAM\n");
 131                 return 0;
 132         }
 133
 134         /* Try initialize */
 135         image = (__le32 *) il->ucode_init.v_addr;
 136         len = il->ucode_init.len;
 137         ret = il4965_verify_inst_sparse(il, image, len);
 138         if (!ret) {
 139                 D_INFO("Initialize uCode is good in inst SRAM\n");
 140                 return 0;
 141         }
 142
 143         /* Try runtime/protocol */
 144         image = (__le32 *) il->ucode_code.v_addr;
 145         len = il->ucode_code.len;
 146         ret = il4965_verify_inst_sparse(il, image, len);
 147         if (!ret) {
 148                 D_INFO("Runtime uCode is good in inst SRAM\n");
 149                 return 0;
 150         }
 151
 152         IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
 153
 154         /* Since nothing seems to match, show first several data entries in
 155          * instruction SRAM, so maybe visual inspection will give a clue.
 156          * Selection of bootstrap image (vs. other images) is arbitrary. */
 157         image = (__le32 *) il->ucode_boot.v_addr;
 158         len = il->ucode_boot.len;
 159         ret = il4965_verify_inst_full(il, image, len);
 160
 161         return ret;
 162 }
 163
 164 /******************************************************************************
 165  *
 166  * EEPROM related functions
 167  *
 168 ******************************************************************************/
 169
 170 /*
 171  * The device's EEPROM semaphore prevents conflicts between driver and uCode
 172  * when accessing the EEPROM; each access is a series of pulses to/from the
 173  * EEPROM chip, not a single event, so even reads could conflict if they
 174  * weren't arbitrated by the semaphore.
 175  */
 176 int
 177 il4965_eeprom_acquire_semaphore(struct il_priv *il)
 178 {
 179         u16 count;
 180         int ret;
 181
 182         for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
 183                 /* Request semaphore */
 184                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 185                            CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 186
 187                 /* See if we got it */
 188                 ret =
 189                     _il_poll_bit(il, CSR_HW_IF_CONFIG_REG,
 190                                  CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 191                                  CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 192                                  EEPROM_SEM_TIMEOUT);
 193                 if (ret >= 0)
 194                         return ret;
 195         }
 196
 197         return ret;
 198 }
 199
 200 void
 201 il4965_eeprom_release_semaphore(struct il_priv *il)
 202 {
 203         il_clear_bit(il, CSR_HW_IF_CONFIG_REG,
 204                      CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 205
 206 }
 207
 208 int
 209 il4965_eeprom_check_version(struct il_priv *il)
 210 {
 211         u16 eeprom_ver;
 212         u16 calib_ver;
 213
 214         eeprom_ver = il_eeprom_query16(il, EEPROM_VERSION);
 215         calib_ver = il_eeprom_query16(il, EEPROM_4965_CALIB_VERSION_OFFSET);
 216
 217         if (eeprom_ver < il->cfg->eeprom_ver ||
 218             calib_ver < il->cfg->eeprom_calib_ver)
 219                 goto err;
 220
 221         IL_INFO("device EEPROM VER=0x%x, CALIB=0x%x\n", eeprom_ver, calib_ver);
 222
 223         return 0;
 224 err:
 225         IL_ERR("Unsupported (too old) EEPROM VER=0x%x < 0x%x "
 226                "CALIB=0x%x < 0x%x\n", eeprom_ver, il->cfg->eeprom_ver,
 227                calib_ver, il->cfg->eeprom_calib_ver);
 228         return -EINVAL;
 229
 230 }
 231
 232 void
 233 il4965_eeprom_get_mac(const struct il_priv *il, u8 * mac)
 234 {
 235         const u8 *addr = il_eeprom_query_addr(il,
 236                                               EEPROM_MAC_ADDRESS);
 237         memcpy(mac, addr, ETH_ALEN);
 238 }
 239
 240 /* Send led command */
 241 static int
 242 il4965_send_led_cmd(struct il_priv *il, struct il_led_cmd *led_cmd)
 243 {
 244         struct il_host_cmd cmd = {
 245                 .id = C_LEDS,
 246                 .len = sizeof(struct il_led_cmd),
 247                 .data = led_cmd,
 248                 .flags = CMD_ASYNC,
 249                 .callback = NULL,
 250         };
 251         u32 reg;
 252
 253         reg = _il_rd(il, CSR_LED_REG);
 254         if (reg != (reg & CSR_LED_BSM_CTRL_MSK))
 255                 _il_wr(il, CSR_LED_REG, reg & CSR_LED_BSM_CTRL_MSK);
 256
 257         return il_send_cmd(il, &cmd);
 258 }
 259
 260 /* Set led register off */
 261 void
 262 il4965_led_enable(struct il_priv *il)
 263 {
 264         _il_wr(il, CSR_LED_REG, CSR_LED_REG_TRUN_ON);
 265 }
 266
 267 const struct il_led_ops il4965_led_ops = {
 268         .cmd = il4965_send_led_cmd,
 269 };
 270
 271 static int il4965_send_tx_power(struct il_priv *il);
 272 static int il4965_hw_get_temperature(struct il_priv *il);
 273
 274 /* Highest firmware API version supported */
 275 #define IL4965_UCODE_API_MAX 2
 276
 277 /* Lowest firmware API version supported */
 278 #define IL4965_UCODE_API_MIN 2
 279
 280 #define IL4965_FW_PRE "iwlwifi-4965-"
 281 #define _IL4965_MODULE_FIRMWARE(api) IL4965_FW_PRE #api ".ucode"
 282 #define IL4965_MODULE_FIRMWARE(api) _IL4965_MODULE_FIRMWARE(api)
 283
 284 /* check contents of special bootstrap uCode SRAM */
 285 static int
 286 il4965_verify_bsm(struct il_priv *il)
 287 {
 288         __le32 *image = il->ucode_boot.v_addr;
 289         u32 len = il->ucode_boot.len;
 290         u32 reg;
 291         u32 val;
 292
 293         D_INFO("Begin verify bsm\n");
 294
 295         /* verify BSM SRAM contents */
 296         val = il_rd_prph(il, BSM_WR_DWCOUNT_REG);
 297         for (reg = BSM_SRAM_LOWER_BOUND; reg < BSM_SRAM_LOWER_BOUND + len;
 298              reg += sizeof(u32), image++) {
 299                 val = il_rd_prph(il, reg);
 300                 if (val != le32_to_cpu(*image)) {
 301                         IL_ERR("BSM uCode verification failed at "
 302                                "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
 303                                BSM_SRAM_LOWER_BOUND, reg - BSM_SRAM_LOWER_BOUND,
 304                                len, val, le32_to_cpu(*image));
 305                         return -EIO;
 306                 }
 307         }
 308
 309         D_INFO("BSM bootstrap uCode image OK\n");
 310
 311         return 0;
 312 }
 313
 314 /**
 315  * il4965_load_bsm - Load bootstrap instructions
 316  *
 317  * BSM operation:
 318  *
 319  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
 320  * in special SRAM that does not power down during RFKILL.  When powering back
 321  * up after power-saving sleeps (or during initial uCode load), the BSM loads
 322  * the bootstrap program into the on-board processor, and starts it.
 323  *
 324  * The bootstrap program loads (via DMA) instructions and data for a new
 325  * program from host DRAM locations indicated by the host driver in the
 326  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
 327  * automatically.
 328  *
 329  * When initializing the NIC, the host driver points the BSM to the
 330  * "initialize" uCode image.  This uCode sets up some internal data, then
 331  * notifies host via "initialize alive" that it is complete.
 332  *
 333  * The host then replaces the BSM_DRAM_* pointer values to point to the
 334  * normal runtime uCode instructions and a backup uCode data cache buffer
 335  * (filled initially with starting data values for the on-board processor),
 336  * then triggers the "initialize" uCode to load and launch the runtime uCode,
 337  * which begins normal operation.
 338  *
 339  * When doing a power-save shutdown, runtime uCode saves data SRAM into
 340  * the backup data cache in DRAM before SRAM is powered down.
 341  *
 342  * When powering back up, the BSM loads the bootstrap program.  This reloads
 343  * the runtime uCode instructions and the backup data cache into SRAM,
 344  * and re-launches the runtime uCode from where it left off.
 345  */
 346 static int
 347 il4965_load_bsm(struct il_priv *il)
 348 {
 349         __le32 *image = il->ucode_boot.v_addr;
 350         u32 len = il->ucode_boot.len;
 351         dma_addr_t pinst;
 352         dma_addr_t pdata;
 353         u32 inst_len;
 354         u32 data_len;
 355         int i;
 356         u32 done;
 357         u32 reg_offset;
 358         int ret;
 359
 360         D_INFO("Begin load bsm\n");
 361
 362         il->ucode_type = UCODE_RT;
 363
 364         /* make sure bootstrap program is no larger than BSM's SRAM size */
 365         if (len > IL49_MAX_BSM_SIZE)
 366                 return -EINVAL;
 367
 368         /* Tell bootstrap uCode where to find the "Initialize" uCode
 369          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
 370          * NOTE:  il_init_alive_start() will replace these values,
 371          *        after the "initialize" uCode has run, to point to
 372          *        runtime/protocol instructions and backup data cache.
 373          */
 374         pinst = il->ucode_init.p_addr >> 4;
 375         pdata = il->ucode_init_data.p_addr >> 4;
 376         inst_len = il->ucode_init.len;
 377         data_len = il->ucode_init_data.len;
 378
 379         il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
 380         il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
 381         il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
 382         il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
 383
 384         /* Fill BSM memory with bootstrap instructions */
 385         for (reg_offset = BSM_SRAM_LOWER_BOUND;
 386              reg_offset < BSM_SRAM_LOWER_BOUND + len;
 387              reg_offset += sizeof(u32), image++)
 388                 _il_wr_prph(il, reg_offset, le32_to_cpu(*image));
 389
 390         ret = il4965_verify_bsm(il);
 391         if (ret)
 392                 return ret;
 393
 394         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
 395         il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0);
 396         il_wr_prph(il, BSM_WR_MEM_DST_REG, IL49_RTC_INST_LOWER_BOUND);
 397         il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
 398
 399         /* Load bootstrap code into instruction SRAM now,
 400          *   to prepare to load "initialize" uCode */
 401         il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
 402
 403         /* Wait for load of bootstrap uCode to finish */
 404         for (i = 0; i < 100; i++) {
 405                 done = il_rd_prph(il, BSM_WR_CTRL_REG);
 406                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
 407                         break;
 408                 udelay(10);
 409         }
 410         if (i < 100)
 411                 D_INFO("BSM write complete, poll %d iterations\n", i);
 412         else {
 413                 IL_ERR("BSM write did not complete!\n");
 414                 return -EIO;
 415         }
 416
 417         /* Enable future boot loads whenever power management unit triggers it
 418          *   (e.g. when powering back up after power-save shutdown) */
 419         il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
 420
 421         return 0;
 422 }
 423
 424 /**
 425  * il4965_set_ucode_ptrs - Set uCode address location
 426  *
 427  * Tell initialization uCode where to find runtime uCode.
 428  *
 429  * BSM registers initially contain pointers to initialization uCode.
 430  * We need to replace them to load runtime uCode inst and data,
 431  * and to save runtime data when powering down.
 432  */
 433 static int
 434 il4965_set_ucode_ptrs(struct il_priv *il)
 435 {
 436         dma_addr_t pinst;
 437         dma_addr_t pdata;
 438         int ret = 0;
 439
 440         /* bits 35:4 for 4965 */
 441         pinst = il->ucode_code.p_addr >> 4;
 442         pdata = il->ucode_data_backup.p_addr >> 4;
 443
 444         /* Tell bootstrap uCode where to find image to load */
 445         il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
 446         il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
 447         il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
 448
 449         /* Inst byte count must be last to set up, bit 31 signals uCode
 450          *   that all new ptr/size info is in place */
 451         il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
 452                    il->ucode_code.len | BSM_DRAM_INST_LOAD);
 453         D_INFO("Runtime uCode pointers are set.\n");
 454
 455         return ret;
 456 }
 457
 458 /**
 459  * il4965_init_alive_start - Called after N_ALIVE notification received
 460  *
 461  * Called after N_ALIVE notification received from "initialize" uCode.
 462  *
 463  * The 4965 "initialize" ALIVE reply contains calibration data for:
 464  *   Voltage, temperature, and MIMO tx gain correction, now stored in il
 465  *   (3945 does not contain this data).
 466  *
 467  * Tell "initialize" uCode to go ahead and load the runtime uCode.
 468 */
 469 static void
 470 il4965_init_alive_start(struct il_priv *il)
 471 {
 472         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
 473          * This is a paranoid check, because we would not have gotten the
 474          * "initialize" alive if code weren't properly loaded.  */
 475         if (il4965_verify_ucode(il)) {
 476                 /* Runtime instruction load was bad;
 477                  * take it all the way back down so we can try again */
 478                 D_INFO("Bad \"initialize\" uCode load.\n");
 479                 goto restart;
 480         }
 481
 482         /* Calculate temperature */
 483         il->temperature = il4965_hw_get_temperature(il);
 484
 485         /* Send pointers to protocol/runtime uCode image ... init code will
 486          * load and launch runtime uCode, which will send us another "Alive"
 487          * notification. */
 488         D_INFO("Initialization Alive received.\n");
 489         if (il4965_set_ucode_ptrs(il)) {
 490                 /* Runtime instruction load won't happen;
 491                  * take it all the way back down so we can try again */
 492                 D_INFO("Couldn't set up uCode pointers.\n");
 493                 goto restart;
 494         }
 495         return;
 496
 497 restart:
 498         queue_work(il->workqueue, &il->restart);
 499 }
 500
 501 static bool
 502 iw4965_is_ht40_channel(__le32 rxon_flags)
 503 {
 504         int chan_mod =
 505             le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK) >>
 506             RXON_FLG_CHANNEL_MODE_POS;
 507         return (chan_mod == CHANNEL_MODE_PURE_40 ||
 508                 chan_mod == CHANNEL_MODE_MIXED);
 509 }
 510
 511 static void
 512 il4965_nic_config(struct il_priv *il)
 513 {
 514         unsigned long flags;
 515         u16 radio_cfg;
 516
 517         spin_lock_irqsave(&il->lock, flags);
 518
 519         radio_cfg = il_eeprom_query16(il, EEPROM_RADIO_CONFIG);
 520
 521         /* write radio config values to register */
 522         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
 523                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 524                            EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
 525                            EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
 526                            EEPROM_RF_CFG_DASH_MSK(radio_cfg));
 527
 528         /* set CSR_HW_CONFIG_REG for uCode use */
 529         il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 530                    CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
 531                    CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
 532
 533         il->calib_info =
 534             (struct il_eeprom_calib_info *)
 535             il_eeprom_query_addr(il, EEPROM_4965_CALIB_TXPOWER_OFFSET);
 536
 537         spin_unlock_irqrestore(&il->lock, flags);
 538 }
 539
 540 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
 541  * Called after every association, but this runs only once!
 542  *  ... once chain noise is calibrated the first time, it's good forever.  */
 543 static void
 544 il4965_chain_noise_reset(struct il_priv *il)
 545 {
 546         struct il_chain_noise_data *data = &(il->chain_noise_data);
 547
 548         if (data->state == IL_CHAIN_NOISE_ALIVE && il_is_any_associated(il)) {
 549                 struct il_calib_diff_gain_cmd cmd;
 550
 551                 /* clear data for chain noise calibration algorithm */
 552                 data->chain_noise_a = 0;
 553                 data->chain_noise_b = 0;
 554                 data->chain_noise_c = 0;
 555                 data->chain_signal_a = 0;
 556                 data->chain_signal_b = 0;
 557                 data->chain_signal_c = 0;
 558                 data->beacon_count = 0;
 559
 560                 memset(&cmd, 0, sizeof(cmd));
 561                 cmd.hdr.op_code = IL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 562                 cmd.diff_gain_a = 0;
 563                 cmd.diff_gain_b = 0;
 564                 cmd.diff_gain_c = 0;
 565                 if (il_send_cmd_pdu(il, C_PHY_CALIBRATION, sizeof(cmd), &cmd))
 566                         IL_ERR("Could not send C_PHY_CALIBRATION\n");
 567                 data->state = IL_CHAIN_NOISE_ACCUMULATE;
 568                 D_CALIB("Run chain_noise_calibrate\n");
 569         }
 570 }
 571
 572 static struct il_sensitivity_ranges il4965_sensitivity = {
 573         .min_nrg_cck = 97,
 574         .max_nrg_cck = 0,       /* not used, set to 0 */
 575
 576         .auto_corr_min_ofdm = 85,
 577         .auto_corr_min_ofdm_mrc = 170,
 578         .auto_corr_min_ofdm_x1 = 105,
 579         .auto_corr_min_ofdm_mrc_x1 = 220,
 580
 581         .auto_corr_max_ofdm = 120,
 582         .auto_corr_max_ofdm_mrc = 210,
 583         .auto_corr_max_ofdm_x1 = 140,
 584         .auto_corr_max_ofdm_mrc_x1 = 270,
 585
 586         .auto_corr_min_cck = 125,
 587         .auto_corr_max_cck = 200,
 588         .auto_corr_min_cck_mrc = 200,
 589         .auto_corr_max_cck_mrc = 400,
 590
 591         .nrg_th_cck = 100,
 592         .nrg_th_ofdm = 100,
 593
 594         .barker_corr_th_min = 190,
 595         .barker_corr_th_min_mrc = 390,
 596         .nrg_th_cca = 62,
 597 };
 598
 599 static void
 600 il4965_set_ct_threshold(struct il_priv *il)
 601 {
 602         /* want Kelvin */
 603         il->hw_params.ct_kill_threshold =
 604             CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
 605 }
 606
 607 /**
 608  * il4965_hw_set_hw_params
 609  *
 610  * Called when initializing driver
 611  */
 612 static int
 613 il4965_hw_set_hw_params(struct il_priv *il)
 614 {
 615         if (il->cfg->mod_params->num_of_queues >= IL_MIN_NUM_QUEUES &&
 616             il->cfg->mod_params->num_of_queues <= IL49_NUM_QUEUES)
 617                 il->cfg->base_params->num_of_queues =
 618                     il->cfg->mod_params->num_of_queues;
 619
 620         il->hw_params.max_txq_num = il->cfg->base_params->num_of_queues;
 621         il->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
 622         il->hw_params.scd_bc_tbls_size =
 623             il->cfg->base_params->num_of_queues *
 624             sizeof(struct il4965_scd_bc_tbl);
 625         il->hw_params.tfd_size = sizeof(struct il_tfd);
 626         il->hw_params.max_stations = IL4965_STATION_COUNT;
 627         il->ctx.bcast_sta_id = IL4965_BROADCAST_ID;
 628         il->hw_params.max_data_size = IL49_RTC_DATA_SIZE;
 629         il->hw_params.max_inst_size = IL49_RTC_INST_SIZE;
 630         il->hw_params.max_bsm_size = BSM_SRAM_SIZE;
 631         il->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
 632
 633         il->hw_params.rx_wrt_ptr_reg = FH49_RSCSR_CHNL0_WPTR;
 634
 635         il->hw_params.tx_chains_num = il4965_num_of_ant(il->cfg->valid_tx_ant);
 636         il->hw_params.rx_chains_num = il4965_num_of_ant(il->cfg->valid_rx_ant);
 637         il->hw_params.valid_tx_ant = il->cfg->valid_tx_ant;
 638         il->hw_params.valid_rx_ant = il->cfg->valid_rx_ant;
 639
 640         il4965_set_ct_threshold(il);
 641
 642         il->hw_params.sens = &il4965_sensitivity;
 643         il->hw_params.beacon_time_tsf_bits = IL4965_EXT_BEACON_TIME_POS;
 644
 645         return 0;
 646 }
 647
 648 static s32
 649 il4965_math_div_round(s32 num, s32 denom, s32 * res)
 650 {
 651         s32 sign = 1;
 652
 653         if (num < 0) {
 654                 sign = -sign;
 655                 num = -num;
 656         }
 657         if (denom < 0) {
 658                 sign = -sign;
 659                 denom = -denom;
 660         }
 661         *res = 1;
 662         *res = ((num * 2 + denom) / (denom * 2)) * sign;
 663
 664         return 1;
 665 }
 666
 667 /**
 668  * il4965_get_voltage_compensation - Power supply voltage comp for txpower
 669  *
 670  * Determines power supply voltage compensation for txpower calculations.
 671  * Returns number of 1/2-dB steps to subtract from gain table idx,
 672  * to compensate for difference between power supply voltage during
 673  * factory measurements, vs. current power supply voltage.
 674  *
 675  * Voltage indication is higher for lower voltage.
 676  * Lower voltage requires more gain (lower gain table idx).
 677  */
 678 static s32
 679 il4965_get_voltage_compensation(s32 eeprom_voltage, s32 current_voltage)
 680 {
 681         s32 comp = 0;
 682
 683         if (TX_POWER_IL_ILLEGAL_VOLTAGE == eeprom_voltage ||
 684             TX_POWER_IL_ILLEGAL_VOLTAGE == current_voltage)
 685                 return 0;
 686
 687         il4965_math_div_round(current_voltage - eeprom_voltage,
 688                               TX_POWER_IL_VOLTAGE_CODES_PER_03V, &comp);
 689
 690         if (current_voltage > eeprom_voltage)
 691                 comp *= 2;
 692         if ((comp < -2) || (comp > 2))
 693                 comp = 0;
 694
 695         return comp;
 696 }
 697
 698 static s32
 699 il4965_get_tx_atten_grp(u16 channel)
 700 {
 701         if (channel >= CALIB_IL_TX_ATTEN_GR5_FCH &&
 702             channel <= CALIB_IL_TX_ATTEN_GR5_LCH)
 703                 return CALIB_CH_GROUP_5;
 704
 705         if (channel >= CALIB_IL_TX_ATTEN_GR1_FCH &&
 706             channel <= CALIB_IL_TX_ATTEN_GR1_LCH)
 707                 return CALIB_CH_GROUP_1;
 708
 709         if (channel >= CALIB_IL_TX_ATTEN_GR2_FCH &&
 710             channel <= CALIB_IL_TX_ATTEN_GR2_LCH)
 711                 return CALIB_CH_GROUP_2;
 712
 713         if (channel >= CALIB_IL_TX_ATTEN_GR3_FCH &&
 714             channel <= CALIB_IL_TX_ATTEN_GR3_LCH)
 715                 return CALIB_CH_GROUP_3;
 716
 717         if (channel >= CALIB_IL_TX_ATTEN_GR4_FCH &&
 718             channel <= CALIB_IL_TX_ATTEN_GR4_LCH)
 719                 return CALIB_CH_GROUP_4;
 720
 721         return -EINVAL;
 722 }
 723
 724 static u32
 725 il4965_get_sub_band(const struct il_priv *il, u32 channel)
 726 {
 727         s32 b = -1;
 728
 729         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
 730                 if (il->calib_info->band_info[b].ch_from == 0)
 731                         continue;
 732
 733                 if (channel >= il->calib_info->band_info[b].ch_from &&
 734                     channel <= il->calib_info->band_info[b].ch_to)
 735                         break;
 736         }
 737
 738         return b;
 739 }
 740
 741 static s32
 742 il4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
 743 {
 744         s32 val;
 745
 746         if (x2 == x1)
 747                 return y1;
 748         else {
 749                 il4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
 750                 return val + y2;
 751         }
 752 }
 753
 754 /**
 755  * il4965_interpolate_chan - Interpolate factory measurements for one channel
 756  *
 757  * Interpolates factory measurements from the two sample channels within a
 758  * sub-band, to apply to channel of interest.  Interpolation is proportional to
 759  * differences in channel frequencies, which is proportional to differences
 760  * in channel number.
 761  */
 762 static int
 763 il4965_interpolate_chan(struct il_priv *il, u32 channel,
 764                         struct il_eeprom_calib_ch_info *chan_info)
 765 {
 766         s32 s = -1;
 767         u32 c;
 768         u32 m;
 769         const struct il_eeprom_calib_measure *m1;
 770         const struct il_eeprom_calib_measure *m2;
 771         struct il_eeprom_calib_measure *omeas;
 772         u32 ch_i1;
 773         u32 ch_i2;
 774
 775         s = il4965_get_sub_band(il, channel);
 776         if (s >= EEPROM_TX_POWER_BANDS) {
 777                 IL_ERR("Tx Power can not find channel %d\n", channel);
 778                 return -1;
 779         }
 780
 781         ch_i1 = il->calib_info->band_info[s].ch1.ch_num;
 782         ch_i2 = il->calib_info->band_info[s].ch2.ch_num;
 783         chan_info->ch_num = (u8) channel;
 784
 785         D_TXPOWER("channel %d subband %d factory cal ch %d & %d\n", channel, s,
 786                   ch_i1, ch_i2);
 787
 788         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
 789                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
 790                         m1 = &(il->calib_info->band_info[s].ch1.
 791                                measurements[c][m]);
 792                         m2 = &(il->calib_info->band_info[s].ch2.
 793                                measurements[c][m]);
 794                         omeas = &(chan_info->measurements[c][m]);
 795
 796                         omeas->actual_pow =
 797                             (u8) il4965_interpolate_value(channel, ch_i1,
 798                                                           m1->actual_pow, ch_i2,
 799                                                           m2->actual_pow);
 800                         omeas->gain_idx =
 801                             (u8) il4965_interpolate_value(channel, ch_i1,
 802                                                           m1->gain_idx, ch_i2,
 803                                                           m2->gain_idx);
 804                         omeas->temperature =
 805                             (u8) il4965_interpolate_value(channel, ch_i1,
 806                                                           m1->temperature,
 807                                                           ch_i2,
 808                                                           m2->temperature);
 809                         omeas->pa_det =
 810                             (s8) il4965_interpolate_value(channel, ch_i1,
 811                                                           m1->pa_det, ch_i2,
 812                                                           m2->pa_det);
 813
 814                         D_TXPOWER("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c,
 815                                   m, m1->actual_pow, m2->actual_pow,
 816                                   omeas->actual_pow);
 817                         D_TXPOWER("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c,
 818                                   m, m1->gain_idx, m2->gain_idx,
 819                                   omeas->gain_idx);
 820                         D_TXPOWER("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c,
 821                                   m, m1->pa_det, m2->pa_det, omeas->pa_det);
 822                         D_TXPOWER("chain %d meas %d  T1=%d  T2=%d  T=%d\n", c,
 823                                   m, m1->temperature, m2->temperature,
 824                                   omeas->temperature);
 825                 }
 826         }
 827
 828         return 0;
 829 }
 830
 831 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
 832  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
 833 static s32 back_off_table[] = {
 834         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
 835         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
 836         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
 837         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
 838         10                      /* CCK */
 839 };
 840
 841 /* Thermal compensation values for txpower for various frequency ranges ...
 842  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
 843 static struct il4965_txpower_comp_entry {
 844         s32 degrees_per_05db_a;
 845         s32 degrees_per_05db_a_denom;
 846 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
 847         {
 848         9, 2},                  /* group 0 5.2, ch  34-43 */
 849         {
 850         4, 1},                  /* group 1 5.2, ch  44-70 */
 851         {
 852         4, 1},                  /* group 2 5.2, ch  71-124 */
 853         {
 854         4, 1},                  /* group 3 5.2, ch 125-200 */
 855         {
 856         3, 1}                   /* group 4 2.4, ch   all */
 857 };
 858
 859 static s32
 860 get_min_power_idx(s32 rate_power_idx, u32 band)
 861 {
 862         if (!band) {
 863                 if ((rate_power_idx & 7) <= 4)
 864                         return MIN_TX_GAIN_IDX_52GHZ_EXT;
 865         }
 866         return MIN_TX_GAIN_IDX;
 867 }
 868
 869 struct gain_entry {
 870         u8 dsp;
 871         u8 radio;
 872 };
 873
 874 static const struct gain_entry gain_table[2][108] = {
 875         /* 5.2GHz power gain idx table */
 876         {
 877          {123, 0x3F},           /* highest txpower */
 878          {117, 0x3F},
 879          {110, 0x3F},
 880          {104, 0x3F},
 881          {98, 0x3F},
 882          {110, 0x3E},
 883          {104, 0x3E},
 884          {98, 0x3E},
 885          {110, 0x3D},
 886          {104, 0x3D},
 887          {98, 0x3D},
 888          {110, 0x3C},
 889          {104, 0x3C},
 890          {98, 0x3C},
 891          {110, 0x3B},
 892          {104, 0x3B},
 893          {98, 0x3B},
 894          {110, 0x3A},
 895          {104, 0x3A},
 896          {98, 0x3A},
 897          {110, 0x39},
 898          {104, 0x39},
 899          {98, 0x39},
 900          {110, 0x38},
 901          {104, 0x38},
 902          {98, 0x38},
 903          {110, 0x37},
 904          {104, 0x37},
 905          {98, 0x37},
 906          {110, 0x36},
 907          {104, 0x36},
 908          {98, 0x36},
 909          {110, 0x35},
 910          {104, 0x35},
 911          {98, 0x35},
 912          {110, 0x34},
 913          {104, 0x34},
 914          {98, 0x34},
 915          {110, 0x33},
 916          {104, 0x33},
 917          {98, 0x33},
 918          {110, 0x32},
 919          {104, 0x32},
 920          {98, 0x32},
 921          {110, 0x31},
 922          {104, 0x31},
 923          {98, 0x31},
 924          {110, 0x30},
 925          {104, 0x30},
 926          {98, 0x30},
 927          {110, 0x25},
 928          {104, 0x25},
 929          {98, 0x25},
 930          {110, 0x24},
 931          {104, 0x24},
 932          {98, 0x24},
 933          {110, 0x23},
 934          {104, 0x23},
 935          {98, 0x23},
 936          {110, 0x22},
 937          {104, 0x18},
 938          {98, 0x18},
 939          {110, 0x17},
 940          {104, 0x17},
 941          {98, 0x17},
 942          {110, 0x16},
 943          {104, 0x16},
 944          {98, 0x16},
 945          {110, 0x15},
 946          {104, 0x15},
 947          {98, 0x15},
 948          {110, 0x14},
 949          {104, 0x14},
 950          {98, 0x14},
 951          {110, 0x13},
 952          {104, 0x13},
 953          {98, 0x13},
 954          {110, 0x12},
 955          {104, 0x08},
 956          {98, 0x08},
 957          {110, 0x07},
 958          {104, 0x07},
 959          {98, 0x07},
 960          {110, 0x06},
 961          {104, 0x06},
 962          {98, 0x06},
 963          {110, 0x05},
 964          {104, 0x05},
 965          {98, 0x05},
 966          {110, 0x04},
 967          {104, 0x04},
 968          {98, 0x04},
 969          {110, 0x03},
 970          {104, 0x03},
 971          {98, 0x03},
 972          {110, 0x02},
 973          {104, 0x02},
 974          {98, 0x02},
 975          {110, 0x01},
 976          {104, 0x01},
 977          {98, 0x01},
 978          {110, 0x00},
 979          {104, 0x00},
 980          {98, 0x00},
 981          {93, 0x00},
 982          {88, 0x00},
 983          {83, 0x00},
 984          {78, 0x00},
 985          },
 986         /* 2.4GHz power gain idx table */
 987         {
 988          {110, 0x3f},           /* highest txpower */
 989          {104, 0x3f},
 990          {98, 0x3f},
 991          {110, 0x3e},
 992          {104, 0x3e},
 993          {98, 0x3e},
 994          {110, 0x3d},
 995          {104, 0x3d},
 996          {98, 0x3d},
 997          {110, 0x3c},
 998          {104, 0x3c},
 999          {98, 0x3c},
1000          {110, 0x3b},
1001          {104, 0x3b},
1002          {98, 0x3b},
1003          {110, 0x3a},
1004          {104, 0x3a},
1005          {98, 0x3a},
1006          {110, 0x39},
1007          {104, 0x39},
1008          {98, 0x39},
1009          {110, 0x38},
1010          {104, 0x38},
1011          {98, 0x38},
1012          {110, 0x37},
1013          {104, 0x37},
1014          {98, 0x37},
1015          {110, 0x36},
1016          {104, 0x36},
1017          {98, 0x36},
1018          {110, 0x35},
1019          {104, 0x35},
1020          {98, 0x35},
1021          {110, 0x34},
1022          {104, 0x34},
1023          {98, 0x34},
1024          {110, 0x33},
1025          {104, 0x33},
1026          {98, 0x33},
1027          {110, 0x32},
1028          {104, 0x32},
1029          {98, 0x32},
1030          {110, 0x31},
1031          {104, 0x31},
1032          {98, 0x31},
1033          {110, 0x30},
1034          {104, 0x30},
1035          {98, 0x30},
1036          {110, 0x6},
1037          {104, 0x6},
1038          {98, 0x6},
1039          {110, 0x5},
1040          {104, 0x5},
1041          {98, 0x5},
1042          {110, 0x4},
1043          {104, 0x4},
1044          {98, 0x4},
1045          {110, 0x3},
1046          {104, 0x3},
1047          {98, 0x3},
1048          {110, 0x2},
1049          {104, 0x2},
1050          {98, 0x2},
1051          {110, 0x1},
1052          {104, 0x1},
1053          {98, 0x1},
1054          {110, 0x0},
1055          {104, 0x0},
1056          {98, 0x0},
1057          {97, 0},
1058          {96, 0},
1059          {95, 0},
1060          {94, 0},
1061          {93, 0},
1062          {92, 0},
1063          {91, 0},
1064          {90, 0},
1065          {89, 0},
1066          {88, 0},
1067          {87, 0},
1068          {86, 0},
1069          {85, 0},
1070          {84, 0},
1071          {83, 0},
1072          {82, 0},
1073          {81, 0},
1074          {80, 0},
1075          {79, 0},
1076          {78, 0},
1077          {77, 0},
1078          {76, 0},
1079          {75, 0},
1080          {74, 0},
1081          {73, 0},
1082          {72, 0},
1083          {71, 0},
1084          {70, 0},
1085          {69, 0},
1086          {68, 0},
1087          {67, 0},
1088          {66, 0},
1089          {65, 0},
1090          {64, 0},
1091          {63, 0},
1092          {62, 0},
1093          {61, 0},
1094          {60, 0},
1095          {59, 0},
1096          }
1097 };
1098
1099 static int
1100 il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel, u8 is_ht40,
1101                         u8 ctrl_chan_high,
1102                         struct il4965_tx_power_db *tx_power_tbl)
1103 {
1104         u8 saturation_power;
1105         s32 target_power;
1106         s32 user_target_power;
1107         s32 power_limit;
1108         s32 current_temp;
1109         s32 reg_limit;
1110         s32 current_regulatory;
1111         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1112         int i;
1113         int c;
1114         const struct il_channel_info *ch_info = NULL;
1115         struct il_eeprom_calib_ch_info ch_eeprom_info;
1116         const struct il_eeprom_calib_measure *measurement;
1117         s16 voltage;
1118         s32 init_voltage;
1119         s32 voltage_compensation;
1120         s32 degrees_per_05db_num;
1121         s32 degrees_per_05db_denom;
1122         s32 factory_temp;
1123         s32 temperature_comp[2];
1124         s32 factory_gain_idx[2];
1125         s32 factory_actual_pwr[2];
1126         s32 power_idx;
1127
1128         /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1129          *   are used for idxing into txpower table) */
1130         user_target_power = 2 * il->tx_power_user_lmt;
1131
1132         /* Get current (RXON) channel, band, width */
1133         D_TXPOWER("chan %d band %d is_ht40 %d\n", channel, band, is_ht40);
1134
1135         ch_info = il_get_channel_info(il, il->band, channel);
1136
1137         if (!il_is_channel_valid(ch_info))
1138                 return -EINVAL;
1139
1140         /* get txatten group, used to select 1) thermal txpower adjustment
1141          *   and 2) mimo txpower balance between Tx chains. */
1142         txatten_grp = il4965_get_tx_atten_grp(channel);
1143         if (txatten_grp < 0) {
1144                 IL_ERR("Can't find txatten group for channel %d.\n", channel);
1145                 return txatten_grp;
1146         }
1147
1148         D_TXPOWER("channel %d belongs to txatten group %d\n", channel,
1149                   txatten_grp);
1150
1151         if (is_ht40) {
1152                 if (ctrl_chan_high)
1153                         channel -= 2;
1154                 else
1155                         channel += 2;
1156         }
1157
1158         /* hardware txpower limits ...
1159          * saturation (clipping distortion) txpowers are in half-dBm */
1160         if (band)
1161                 saturation_power = il->calib_info->saturation_power24;
1162         else
1163                 saturation_power = il->calib_info->saturation_power52;
1164
1165         if (saturation_power < IL_TX_POWER_SATURATION_MIN ||
1166             saturation_power > IL_TX_POWER_SATURATION_MAX) {
1167                 if (band)
1168                         saturation_power = IL_TX_POWER_DEFAULT_SATURATION_24;
1169                 else
1170                         saturation_power = IL_TX_POWER_DEFAULT_SATURATION_52;
1171         }
1172
1173         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1174          *   max_power_avg values are in dBm, convert * 2 */
1175         if (is_ht40)
1176                 reg_limit = ch_info->ht40_max_power_avg * 2;
1177         else
1178                 reg_limit = ch_info->max_power_avg * 2;
1179
1180         if ((reg_limit < IL_TX_POWER_REGULATORY_MIN) ||
1181             (reg_limit > IL_TX_POWER_REGULATORY_MAX)) {
1182                 if (band)
1183                         reg_limit = IL_TX_POWER_DEFAULT_REGULATORY_24;
1184                 else
1185                         reg_limit = IL_TX_POWER_DEFAULT_REGULATORY_52;
1186         }
1187
1188         /* Interpolate txpower calibration values for this channel,
1189          *   based on factory calibration tests on spaced channels. */
1190         il4965_interpolate_chan(il, channel, &ch_eeprom_info);
1191
1192         /* calculate tx gain adjustment based on power supply voltage */
1193         voltage = le16_to_cpu(il->calib_info->voltage);
1194         init_voltage = (s32) le32_to_cpu(il->card_alive_init.voltage);
1195         voltage_compensation =
1196             il4965_get_voltage_compensation(voltage, init_voltage);
1197
1198         D_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n", init_voltage,
1199                   voltage, voltage_compensation);
1200
1201         /* get current temperature (Celsius) */
1202         current_temp = max(il->temperature, IL_TX_POWER_TEMPERATURE_MIN);
1203         current_temp = min(il->temperature, IL_TX_POWER_TEMPERATURE_MAX);
1204         current_temp = KELVIN_TO_CELSIUS(current_temp);
1205
1206         /* select thermal txpower adjustment params, based on channel group
1207          *   (same frequency group used for mimo txatten adjustment) */
1208         degrees_per_05db_num =
1209             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1210         degrees_per_05db_denom =
1211             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1212
1213         /* get per-chain txpower values from factory measurements */
1214         for (c = 0; c < 2; c++) {
1215                 measurement = &ch_eeprom_info.measurements[c][1];
1216
1217                 /* txgain adjustment (in half-dB steps) based on difference
1218                  *   between factory and current temperature */
1219                 factory_temp = measurement->temperature;
1220                 il4965_math_div_round((current_temp -
1221                                        factory_temp) * degrees_per_05db_denom,
1222                                       degrees_per_05db_num,
1223                                       &temperature_comp[c]);
1224
1225                 factory_gain_idx[c] = measurement->gain_idx;
1226                 factory_actual_pwr[c] = measurement->actual_pow;
1227
1228                 D_TXPOWER("chain = %d\n", c);
1229                 D_TXPOWER("fctry tmp %d, " "curr tmp %d, comp %d steps\n",
1230                           factory_temp, current_temp, temperature_comp[c]);
1231
1232                 D_TXPOWER("fctry idx %d, fctry pwr %d\n", factory_gain_idx[c],
1233                           factory_actual_pwr[c]);
1234         }
1235
1236         /* for each of 33 bit-rates (including 1 for CCK) */
1237         for (i = 0; i < POWER_TBL_NUM_ENTRIES; i++) {
1238                 u8 is_mimo_rate;
1239                 union il4965_tx_power_dual_stream tx_power;
1240
1241                 /* for mimo, reduce each chain's txpower by half
1242                  * (3dB, 6 steps), so total output power is regulatory
1243                  * compliant. */
1244                 if (i & 0x8) {
1245                         current_regulatory =
1246                             reg_limit -
1247                             IL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1248                         is_mimo_rate = 1;
1249                 } else {
1250                         current_regulatory = reg_limit;
1251                         is_mimo_rate = 0;
1252                 }
1253
1254                 /* find txpower limit, either hardware or regulatory */
1255                 power_limit = saturation_power - back_off_table[i];
1256                 if (power_limit > current_regulatory)
1257                         power_limit = current_regulatory;
1258
1259                 /* reduce user's txpower request if necessary
1260                  * for this rate on this channel */
1261                 target_power = user_target_power;
1262                 if (target_power > power_limit)
1263                         target_power = power_limit;
1264
1265                 D_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n", i,
1266                           saturation_power - back_off_table[i],
1267                           current_regulatory, user_target_power, target_power);
1268
1269                 /* for each of 2 Tx chains (radio transmitters) */
1270                 for (c = 0; c < 2; c++) {
1271                         s32 atten_value;
1272
1273                         if (is_mimo_rate)
1274                                 atten_value =
1275                                     (s32) le32_to_cpu(il->card_alive_init.
1276                                                       tx_atten[txatten_grp][c]);
1277                         else
1278                                 atten_value = 0;
1279
1280                         /* calculate idx; higher idx means lower txpower */
1281                         power_idx =
1282                             (u8) (factory_gain_idx[c] -
1283                                   (target_power - factory_actual_pwr[c]) -
1284                                   temperature_comp[c] - voltage_compensation +
1285                                   atten_value);
1286
1287 /*                      D_TXPOWER("calculated txpower idx %d\n",
1288                                                 power_idx); */
1289
1290                         if (power_idx < get_min_power_idx(i, band))
1291                                 power_idx = get_min_power_idx(i, band);
1292
1293                         /* adjust 5 GHz idx to support negative idxes */
1294                         if (!band)
1295                                 power_idx += 9;
1296
1297                         /* CCK, rate 32, reduce txpower for CCK */
1298                         if (i == POWER_TBL_CCK_ENTRY)
1299                                 power_idx +=
1300                                     IL_TX_POWER_CCK_COMPENSATION_C_STEP;
1301
1302                         /* stay within the table! */
1303                         if (power_idx > 107) {
1304                                 IL_WARN("txpower idx %d > 107\n", power_idx);
1305                                 power_idx = 107;
1306                         }
1307                         if (power_idx < 0) {
1308                                 IL_WARN("txpower idx %d < 0\n", power_idx);
1309                                 power_idx = 0;
1310                         }
1311
1312                         /* fill txpower command for this rate/chain */
1313                         tx_power.s.radio_tx_gain[c] =
1314                             gain_table[band][power_idx].radio;
1315                         tx_power.s.dsp_predis_atten[c] =
1316                             gain_table[band][power_idx].dsp;
1317
1318                         D_TXPOWER("chain %d mimo %d idx %d "
1319                                   "gain 0x%02x dsp %d\n", c, atten_value,
1320                                   power_idx, tx_power.s.radio_tx_gain[c],
1321                                   tx_power.s.dsp_predis_atten[c]);
1322                 }               /* for each chain */
1323
1324                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1325
1326         }                       /* for each rate */
1327
1328         return 0;
1329 }
1330
1331 /**
1332  * il4965_send_tx_power - Configure the TXPOWER level user limit
1333  *
1334  * Uses the active RXON for channel, band, and characteristics (ht40, high)
1335  * The power limit is taken from il->tx_power_user_lmt.
1336  */
1337 static int
1338 il4965_send_tx_power(struct il_priv *il)
1339 {
1340         struct il4965_txpowertable_cmd cmd = { 0 };
1341         int ret;
1342         u8 band = 0;
1343         bool is_ht40 = false;
1344         u8 ctrl_chan_high = 0;
1345         struct il_rxon_context *ctx = &il->ctx;
1346
1347         if (WARN_ONCE
1348             (test_bit(S_SCAN_HW, &il->status),
1349              "TX Power requested while scanning!\n"))
1350                 return -EAGAIN;
1351
1352         band = il->band == IEEE80211_BAND_2GHZ;
1353
1354         is_ht40 = iw4965_is_ht40_channel(ctx->active.flags);
1355
1356         if (is_ht40 && (ctx->active.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1357                 ctrl_chan_high = 1;
1358
1359         cmd.band = band;
1360         cmd.channel = ctx->active.channel;
1361
1362         ret =
1363             il4965_fill_txpower_tbl(il, band, le16_to_cpu(ctx->active.channel),
1364                                     is_ht40, ctrl_chan_high, &cmd.tx_power);
1365         if (ret)
1366                 goto out;
1367
1368         ret = il_send_cmd_pdu(il, C_TX_PWR_TBL, sizeof(cmd), &cmd);
1369
1370 out:
1371         return ret;
1372 }
1373
1374 static int
1375 il4965_send_rxon_assoc(struct il_priv *il, struct il_rxon_context *ctx)
1376 {
1377         int ret = 0;
1378         struct il4965_rxon_assoc_cmd rxon_assoc;
1379         const struct il_rxon_cmd *rxon1 = &ctx->staging;
1380         const struct il_rxon_cmd *rxon2 = &ctx->active;
1381
1382         if (rxon1->flags == rxon2->flags &&
1383             rxon1->filter_flags == rxon2->filter_flags &&
1384             rxon1->cck_basic_rates == rxon2->cck_basic_rates &&
1385             rxon1->ofdm_ht_single_stream_basic_rates ==
1386             rxon2->ofdm_ht_single_stream_basic_rates &&
1387             rxon1->ofdm_ht_dual_stream_basic_rates ==
1388             rxon2->ofdm_ht_dual_stream_basic_rates &&
1389             rxon1->rx_chain == rxon2->rx_chain &&
1390             rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates) {
1391                 D_INFO("Using current RXON_ASSOC.  Not resending.\n");
1392                 return 0;
1393         }
1394
1395         rxon_assoc.flags = ctx->staging.flags;
1396         rxon_assoc.filter_flags = ctx->staging.filter_flags;
1397         rxon_assoc.ofdm_basic_rates = ctx->staging.ofdm_basic_rates;
1398         rxon_assoc.cck_basic_rates = ctx->staging.cck_basic_rates;
1399         rxon_assoc.reserved = 0;
1400         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1401             ctx->staging.ofdm_ht_single_stream_basic_rates;
1402         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1403             ctx->staging.ofdm_ht_dual_stream_basic_rates;
1404         rxon_assoc.rx_chain_select_flags = ctx->staging.rx_chain;
1405
1406         ret =
1407             il_send_cmd_pdu_async(il, C_RXON_ASSOC, sizeof(rxon_assoc),
1408                                   &rxon_assoc, NULL);
1409
1410         return ret;
1411 }
1412
1413 static int
1414 il4965_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx)
1415 {
1416         /* cast away the const for active_rxon in this function */
1417         struct il_rxon_cmd *active_rxon = (void *)&ctx->active;
1418         int ret;
1419         bool new_assoc = !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK);
1420
1421         if (!il_is_alive(il))
1422                 return -EBUSY;
1423
1424         if (!ctx->is_active)
1425                 return 0;
1426
1427         /* always get timestamp with Rx frame */
1428         ctx->staging.flags |= RXON_FLG_TSF2HOST_MSK;
1429
1430         ret = il_check_rxon_cmd(il, ctx);
1431         if (ret) {
1432                 IL_ERR("Invalid RXON configuration.  Not committing.\n");
1433                 return -EINVAL;
1434         }
1435
1436         /*
1437          * receive commit_rxon request
1438          * abort any previous channel switch if still in process
1439          */
1440         if (test_bit(S_CHANNEL_SWITCH_PENDING, &il->status) &&
1441             il->switch_channel != ctx->staging.channel) {
1442                 D_11H("abort channel switch on %d\n",
1443                       le16_to_cpu(il->switch_channel));
1444                 il_chswitch_done(il, false);
1445         }
1446
1447         /* If we don't need to send a full RXON, we can use
1448          * il_rxon_assoc_cmd which is used to reconfigure filter
1449          * and other flags for the current radio configuration. */
1450         if (!il_full_rxon_required(il, ctx)) {
1451                 ret = il_send_rxon_assoc(il, ctx);
1452                 if (ret) {
1453                         IL_ERR("Error setting RXON_ASSOC (%d)\n", ret);
1454                         return ret;
1455                 }
1456
1457                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
1458                 il_print_rx_config_cmd(il, ctx);
1459                 /*
1460                  * We do not commit tx power settings while channel changing,
1461                  * do it now if tx power changed.
1462                  */
1463                 il_set_tx_power(il, il->tx_power_next, false);
1464                 return 0;
1465         }
1466
1467         /* If we are currently associated and the new config requires
1468          * an RXON_ASSOC and the new config wants the associated mask enabled,
1469          * we must clear the associated from the active configuration
1470          * before we apply the new config */
1471         if (il_is_associated_ctx(ctx) && new_assoc) {
1472                 D_INFO("Toggling associated bit on current RXON\n");
1473                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1474
1475                 ret =
1476                     il_send_cmd_pdu(il, ctx->rxon_cmd,
1477                                     sizeof(struct il_rxon_cmd), active_rxon);
1478
1479                 /* If the mask clearing failed then we set
1480                  * active_rxon back to what it was previously */
1481                 if (ret) {
1482                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1483                         IL_ERR("Error clearing ASSOC_MSK (%d)\n", ret);
1484                         return ret;
1485                 }
1486                 il_clear_ucode_stations(il, ctx);
1487                 il_restore_stations(il, ctx);
1488                 ret = il4965_restore_default_wep_keys(il, ctx);
1489                 if (ret) {
1490                         IL_ERR("Failed to restore WEP keys (%d)\n", ret);
1491                         return ret;
1492                 }
1493         }
1494
1495         D_INFO("Sending RXON\n" "* with%s RXON_FILTER_ASSOC_MSK\n"
1496                "* channel = %d\n" "* bssid = %pM\n", (new_assoc ? "" : "out"),
1497                le16_to_cpu(ctx->staging.channel), ctx->staging.bssid_addr);
1498
1499         il_set_rxon_hwcrypto(il, ctx, !il->cfg->mod_params->sw_crypto);
1500
1501         /* Apply the new configuration
1502          * RXON unassoc clears the station table in uCode so restoration of
1503          * stations is needed after it (the RXON command) completes
1504          */
1505         if (!new_assoc) {
1506                 ret =
1507                     il_send_cmd_pdu(il, ctx->rxon_cmd,
1508                                     sizeof(struct il_rxon_cmd), &ctx->staging);
1509                 if (ret) {
1510                         IL_ERR("Error setting new RXON (%d)\n", ret);
1511                         return ret;
1512                 }
1513                 D_INFO("Return from !new_assoc RXON.\n");
1514                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
1515                 il_clear_ucode_stations(il, ctx);
1516                 il_restore_stations(il, ctx);
1517                 ret = il4965_restore_default_wep_keys(il, ctx);
1518                 if (ret) {
1519                         IL_ERR("Failed to restore WEP keys (%d)\n", ret);
1520                         return ret;
1521                 }
1522         }
1523         if (new_assoc) {
1524                 il->start_calib = 0;
1525                 /* Apply the new configuration
1526                  * RXON assoc doesn't clear the station table in uCode,
1527                  */
1528                 ret =
1529                     il_send_cmd_pdu(il, ctx->rxon_cmd,
1530                                     sizeof(struct il_rxon_cmd), &ctx->staging);
1531                 if (ret) {
1532                         IL_ERR("Error setting new RXON (%d)\n", ret);
1533                         return ret;
1534                 }
1535                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
1536         }
1537         il_print_rx_config_cmd(il, ctx);
1538
1539         il4965_init_sensitivity(il);
1540
1541         /* If we issue a new RXON command which required a tune then we must
1542          * send a new TXPOWER command or we won't be able to Tx any frames */
1543         ret = il_set_tx_power(il, il->tx_power_next, true);
1544         if (ret) {
1545                 IL_ERR("Error sending TX power (%d)\n", ret);
1546                 return ret;
1547         }
1548
1549         return 0;
1550 }
1551
1552 static int
1553 il4965_hw_channel_switch(struct il_priv *il,
1554                          struct ieee80211_channel_switch *ch_switch)
1555 {
1556         struct il_rxon_context *ctx = &il->ctx;
1557         int rc;
1558         u8 band = 0;
1559         bool is_ht40 = false;
1560         u8 ctrl_chan_high = 0;
1561         struct il4965_channel_switch_cmd cmd;
1562         const struct il_channel_info *ch_info;
1563         u32 switch_time_in_usec, ucode_switch_time;
1564         u16 ch;
1565         u32 tsf_low;
1566         u8 switch_count;
1567         u16 beacon_interval = le16_to_cpu(ctx->timing.beacon_interval);
1568         struct ieee80211_vif *vif = ctx->vif;
1569         band = il->band == IEEE80211_BAND_2GHZ;
1570
1571         is_ht40 = iw4965_is_ht40_channel(ctx->staging.flags);
1572
1573         if (is_ht40 && (ctx->staging.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1574                 ctrl_chan_high = 1;
1575
1576         cmd.band = band;
1577         cmd.expect_beacon = 0;
1578         ch = ch_switch->channel->hw_value;
1579         cmd.channel = cpu_to_le16(ch);
1580         cmd.rxon_flags = ctx->staging.flags;
1581         cmd.rxon_filter_flags = ctx->staging.filter_flags;
1582         switch_count = ch_switch->count;
1583         tsf_low = ch_switch->timestamp & 0x0ffffffff;
1584         /*
1585          * calculate the ucode channel switch time
1586          * adding TSF as one of the factor for when to switch
1587          */
1588         if (il->ucode_beacon_time > tsf_low && beacon_interval) {
1589                 if (switch_count >
1590                     ((il->ucode_beacon_time - tsf_low) / beacon_interval)) {
1591                         switch_count -=
1592                             (il->ucode_beacon_time - tsf_low) / beacon_interval;
1593                 } else
1594                         switch_count = 0;
1595         }
1596         if (switch_count <= 1)
1597                 cmd.switch_time = cpu_to_le32(il->ucode_beacon_time);
1598         else {
1599                 switch_time_in_usec =
1600                     vif->bss_conf.beacon_int * switch_count * TIME_UNIT;
1601                 ucode_switch_time =
1602                     il_usecs_to_beacons(il, switch_time_in_usec,
1603                                         beacon_interval);
1604                 cmd.switch_time =
1605                     il_add_beacon_time(il, il->ucode_beacon_time,
1606                                        ucode_switch_time, beacon_interval);
1607         }
1608         D_11H("uCode time for the switch is 0x%x\n", cmd.switch_time);
1609         ch_info = il_get_channel_info(il, il->band, ch);
1610         if (ch_info)
1611                 cmd.expect_beacon = il_is_channel_radar(ch_info);
1612         else {
1613                 IL_ERR("invalid channel switch from %u to %u\n",
1614                        ctx->active.channel, ch);
1615                 return -EFAULT;
1616         }
1617
1618         rc = il4965_fill_txpower_tbl(il, band, ch, is_ht40, ctrl_chan_high,
1619                                      &cmd.tx_power);
1620         if (rc) {
1621                 D_11H("error:%d  fill txpower_tbl\n", rc);
1622                 return rc;
1623         }
1624
1625         return il_send_cmd_pdu(il, C_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1626 }
1627
1628 /**
1629  * il4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1630  */
1631 static void
1632 il4965_txq_update_byte_cnt_tbl(struct il_priv *il, struct il_tx_queue *txq,
1633                                u16 byte_cnt)
1634 {
1635         struct il4965_scd_bc_tbl *scd_bc_tbl = il->scd_bc_tbls.addr;
1636         int txq_id = txq->q.id;
1637         int write_ptr = txq->q.write_ptr;
1638         int len = byte_cnt + IL_TX_CRC_SIZE + IL_TX_DELIMITER_SIZE;
1639         __le16 bc_ent;
1640
1641         WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1642
1643         bc_ent = cpu_to_le16(len & 0xFFF);
1644         /* Set up byte count within first 256 entries */
1645         scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1646
1647         /* If within first 64 entries, duplicate at end */
1648         if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1649                 scd_bc_tbl[txq_id].tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] =
1650                     bc_ent;
1651 }
1652
1653 /**
1654  * il4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1655  * @stats: Provides the temperature reading from the uCode
1656  *
1657  * A return of <0 indicates bogus data in the stats
1658  */
1659 static int
1660 il4965_hw_get_temperature(struct il_priv *il)
1661 {
1662         s32 temperature;
1663         s32 vt;
1664         s32 R1, R2, R3;
1665         u32 R4;
1666
1667         if (test_bit(S_TEMPERATURE, &il->status) &&
1668             (il->_4965.stats.flag & STATS_REPLY_FLG_HT40_MODE_MSK)) {
1669                 D_TEMP("Running HT40 temperature calibration\n");
1670                 R1 = (s32) le32_to_cpu(il->card_alive_init.therm_r1[1]);
1671                 R2 = (s32) le32_to_cpu(il->card_alive_init.therm_r2[1]);
1672                 R3 = (s32) le32_to_cpu(il->card_alive_init.therm_r3[1]);
1673                 R4 = le32_to_cpu(il->card_alive_init.therm_r4[1]);
1674         } else {
1675                 D_TEMP("Running temperature calibration\n");
1676                 R1 = (s32) le32_to_cpu(il->card_alive_init.therm_r1[0]);
1677                 R2 = (s32) le32_to_cpu(il->card_alive_init.therm_r2[0]);
1678                 R3 = (s32) le32_to_cpu(il->card_alive_init.therm_r3[0]);
1679                 R4 = le32_to_cpu(il->card_alive_init.therm_r4[0]);
1680         }
1681
1682         /*
1683          * Temperature is only 23 bits, so sign extend out to 32.
1684          *
1685          * NOTE If we haven't received a stats notification yet
1686          * with an updated temperature, use R4 provided to us in the
1687          * "initialize" ALIVE response.
1688          */
1689         if (!test_bit(S_TEMPERATURE, &il->status))
1690                 vt = sign_extend32(R4, 23);
1691         else
1692                 vt = sign_extend32(le32_to_cpu
1693                                    (il->_4965.stats.general.common.temperature),
1694                                    23);
1695
1696         D_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1697
1698         if (R3 == R1) {
1699                 IL_ERR("Calibration conflict R1 == R3\n");
1700                 return -1;
1701         }
1702
1703         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1704          * Add offset to center the adjustment around 0 degrees Centigrade. */
1705         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1706         temperature /= (R3 - R1);
1707         temperature =
1708             (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1709
1710         D_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
1711                KELVIN_TO_CELSIUS(temperature));
1712
1713         return temperature;
1714 }
1715
1716 /* Adjust Txpower only if temperature variance is greater than threshold. */
1717 #define IL_TEMPERATURE_THRESHOLD   3
1718
1719 /**
1720  * il4965_is_temp_calib_needed - determines if new calibration is needed
1721  *
1722  * If the temperature changed has changed sufficiently, then a recalibration
1723  * is needed.
1724  *
1725  * Assumes caller will replace il->last_temperature once calibration
1726  * executed.
1727  */
1728 static int
1729 il4965_is_temp_calib_needed(struct il_priv *il)
1730 {
1731         int temp_diff;
1732
1733         if (!test_bit(S_STATS, &il->status)) {
1734                 D_TEMP("Temperature not updated -- no stats.\n");
1735                 return 0;
1736         }
1737
1738         temp_diff = il->temperature - il->last_temperature;
1739
1740         /* get absolute value */
1741         if (temp_diff < 0) {
1742                 D_POWER("Getting cooler, delta %d\n", temp_diff);
1743                 temp_diff = -temp_diff;
1744         } else if (temp_diff == 0)
1745                 D_POWER("Temperature unchanged\n");
1746         else
1747                 D_POWER("Getting warmer, delta %d\n", temp_diff);
1748
1749         if (temp_diff < IL_TEMPERATURE_THRESHOLD) {
1750                 D_POWER(" => thermal txpower calib not needed\n");
1751                 return 0;
1752         }
1753
1754         D_POWER(" => thermal txpower calib needed\n");
1755
1756         return 1;
1757 }
1758
1759 static void
1760 il4965_temperature_calib(struct il_priv *il)
1761 {
1762         s32 temp;
1763
1764         temp = il4965_hw_get_temperature(il);
1765         if (IL_TX_POWER_TEMPERATURE_OUT_OF_RANGE(temp))
1766                 return;
1767
1768         if (il->temperature != temp) {
1769                 if (il->temperature)
1770                         D_TEMP("Temperature changed " "from %dC to %dC\n",
1771                                KELVIN_TO_CELSIUS(il->temperature),
1772                                KELVIN_TO_CELSIUS(temp));
1773                 else
1774                         D_TEMP("Temperature " "initialized to %dC\n",
1775                                KELVIN_TO_CELSIUS(temp));
1776         }
1777
1778         il->temperature = temp;
1779         set_bit(S_TEMPERATURE, &il->status);
1780
1781         if (!il->disable_tx_power_cal &&
1782             unlikely(!test_bit(S_SCANNING, &il->status)) &&
1783             il4965_is_temp_calib_needed(il))
1784                 queue_work(il->workqueue, &il->txpower_work);
1785 }
1786
1787 static u16
1788 il4965_get_hcmd_size(u8 cmd_id, u16 len)
1789 {
1790         switch (cmd_id) {
1791         case C_RXON:
1792                 return (u16) sizeof(struct il4965_rxon_cmd);
1793         default:
1794                 return len;
1795         }
1796 }
1797
1798 static u16
1799 il4965_build_addsta_hcmd(const struct il_addsta_cmd *cmd, u8 * data)
1800 {
1801         struct il4965_addsta_cmd *addsta = (struct il4965_addsta_cmd *)data;
1802         addsta->mode = cmd->mode;
1803         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1804         memcpy(&addsta->key, &cmd->key, sizeof(struct il4965_keyinfo));
1805         addsta->station_flags = cmd->station_flags;
1806         addsta->station_flags_msk = cmd->station_flags_msk;
1807         addsta->tid_disable_tx = cmd->tid_disable_tx;
1808         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1809         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1810         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1811         addsta->sleep_tx_count = cmd->sleep_tx_count;
1812         addsta->reserved1 = cpu_to_le16(0);
1813         addsta->reserved2 = cpu_to_le16(0);
1814
1815         return (u16) sizeof(struct il4965_addsta_cmd);
1816 }
1817
1818 static inline u32
1819 il4965_get_scd_ssn(struct il4965_tx_resp *tx_resp)
1820 {
1821         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
1822 }
1823
1824 static inline u32
1825 il4965_tx_status_to_mac80211(u32 status)
1826 {
1827         status &= TX_STATUS_MSK;
1828
1829         switch (status) {
1830         case TX_STATUS_SUCCESS:
1831         case TX_STATUS_DIRECT_DONE:
1832                 return IEEE80211_TX_STAT_ACK;
1833         case TX_STATUS_FAIL_DEST_PS:
1834                 return IEEE80211_TX_STAT_TX_FILTERED;
1835         default:
1836                 return 0;
1837         }
1838 }
1839
1840 static inline bool
1841 il4965_is_tx_success(u32 status)
1842 {
1843         status &= TX_STATUS_MSK;
1844         return (status == TX_STATUS_SUCCESS || status == TX_STATUS_DIRECT_DONE);
1845 }
1846
1847 /**
1848  * il4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
1849  */
1850 static int
1851 il4965_tx_status_reply_tx(struct il_priv *il, struct il_ht_agg *agg,
1852                           struct il4965_tx_resp *tx_resp, int txq_id,
1853                           u16 start_idx)
1854 {
1855         u16 status;
1856         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
1857         struct ieee80211_tx_info *info = NULL;
1858         struct ieee80211_hdr *hdr = NULL;
1859         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
1860         int i, sh, idx;
1861         u16 seq;
1862         if (agg->wait_for_ba)
1863                 D_TX_REPLY("got tx response w/o block-ack\n");
1864
1865         agg->frame_count = tx_resp->frame_count;
1866         agg->start_idx = start_idx;
1867         agg->rate_n_flags = rate_n_flags;
1868         agg->bitmap = 0;
1869
1870         /* num frames attempted by Tx command */
1871         if (agg->frame_count == 1) {
1872                 /* Only one frame was attempted; no block-ack will arrive */
1873                 status = le16_to_cpu(frame_status[0].status);
1874                 idx = start_idx;
1875
1876                 D_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
1877                            agg->frame_count, agg->start_idx, idx);
1878
1879                 info = IEEE80211_SKB_CB(il->txq[txq_id].txb[idx].skb);
1880                 info->status.rates[0].count = tx_resp->failure_frame + 1;
1881                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
1882                 info->flags |= il4965_tx_status_to_mac80211(status);
1883                 il4965_hwrate_to_tx_control(il, rate_n_flags, info);
1884
1885                 D_TX_REPLY("1 Frame 0x%x failure :%d\n", status & 0xff,
1886                            tx_resp->failure_frame);
1887                 D_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
1888
1889                 agg->wait_for_ba = 0;
1890         } else {
1891                 /* Two or more frames were attempted; expect block-ack */
1892                 u64 bitmap = 0;
1893                 int start = agg->start_idx;
1894
1895                 /* Construct bit-map of pending frames within Tx win */
1896                 for (i = 0; i < agg->frame_count; i++) {
1897                         u16 sc;
1898                         status = le16_to_cpu(frame_status[i].status);
1899                         seq = le16_to_cpu(frame_status[i].sequence);
1900                         idx = SEQ_TO_IDX(seq);
1901                         txq_id = SEQ_TO_QUEUE(seq);
1902
1903                         if (status &
1904                             (AGG_TX_STATE_FEW_BYTES_MSK |
1905                              AGG_TX_STATE_ABORT_MSK))
1906                                 continue;
1907
1908                         D_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
1909                                    agg->frame_count, txq_id, idx);
1910
1911                         hdr = il_tx_queue_get_hdr(il, txq_id, idx);
1912                         if (!hdr) {
1913                                 IL_ERR("BUG_ON idx doesn't point to valid skb"
1914                                        " idx=%d, txq_id=%d\n", idx, txq_id);
1915                                 return -1;
1916                         }
1917
1918                         sc = le16_to_cpu(hdr->seq_ctrl);
1919                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
1920                                 IL_ERR("BUG_ON idx doesn't match seq control"
1921                                        " idx=%d, seq_idx=%d, seq=%d\n", idx,
1922                                        SEQ_TO_SN(sc), hdr->seq_ctrl);
1923                                 return -1;
1924                         }
1925
1926                         D_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n", i, idx,
1927                                    SEQ_TO_SN(sc));
1928
1929                         sh = idx - start;
1930                         if (sh > 64) {
1931                                 sh = (start - idx) + 0xff;
1932                                 bitmap = bitmap << sh;
1933                                 sh = 0;
1934                                 start = idx;
1935                         } else if (sh < -64)
1936                                 sh = 0xff - (start - idx);
1937                         else if (sh < 0) {
1938                                 sh = start - idx;
1939                                 start = idx;
1940                                 bitmap = bitmap << sh;
1941                                 sh = 0;
1942                         }
1943                         bitmap |= 1ULL << sh;
1944                         D_TX_REPLY("start=%d bitmap=0x%llx\n", start,
1945                                    (unsigned long long)bitmap);
1946                 }
1947
1948                 agg->bitmap = bitmap;
1949                 agg->start_idx = start;
1950                 D_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
1951                            agg->frame_count, agg->start_idx,
1952                            (unsigned long long)agg->bitmap);
1953
1954                 if (bitmap)
1955                         agg->wait_for_ba = 1;
1956         }
1957         return 0;
1958 }
1959
1960 static u8
1961 il4965_find_station(struct il_priv *il, const u8 * addr)
1962 {
1963         int i;
1964         int start = 0;
1965         int ret = IL_INVALID_STATION;
1966         unsigned long flags;
1967
1968         if ((il->iw_mode == NL80211_IFTYPE_ADHOC))
1969                 start = IL_STA_ID;
1970
1971         if (is_broadcast_ether_addr(addr))
1972                 return il->ctx.bcast_sta_id;
1973
1974         spin_lock_irqsave(&il->sta_lock, flags);
1975         for (i = start; i < il->hw_params.max_stations; i++)
1976                 if (il->stations[i].used &&
1977                     (!compare_ether_addr(il->stations[i].sta.sta.addr, addr))) {
1978                         ret = i;
1979                         goto out;
1980                 }
1981
1982         D_ASSOC("can not find STA %pM total %d\n", addr, il->num_stations);
1983
1984 out:
1985         /*
1986          * It may be possible that more commands interacting with stations
1987          * arrive before we completed processing the adding of
1988          * station
1989          */
1990         if (ret != IL_INVALID_STATION &&
1991             (!(il->stations[ret].used & IL_STA_UCODE_ACTIVE) ||
1992              ((il->stations[ret].used & IL_STA_UCODE_ACTIVE) &&
1993               (il->stations[ret].used & IL_STA_UCODE_INPROGRESS)))) {
1994                 IL_ERR("Requested station info for sta %d before ready.\n",
1995                        ret);
1996                 ret = IL_INVALID_STATION;
1997         }
1998         spin_unlock_irqrestore(&il->sta_lock, flags);
1999         return ret;
2000 }
2001
2002 static int
2003 il4965_get_ra_sta_id(struct il_priv *il, struct ieee80211_hdr *hdr)
2004 {
2005         if (il->iw_mode == NL80211_IFTYPE_STATION) {
2006                 return IL_AP_ID;
2007         } else {
2008                 u8 *da = ieee80211_get_DA(hdr);
2009                 return il4965_find_station(il, da);
2010         }
2011 }
2012
2013 /**
2014  * il4965_hdl_tx - Handle standard (non-aggregation) Tx response
2015  */
2016 static void
2017 il4965_hdl_tx(struct il_priv *il, struct il_rx_buf *rxb)
2018 {
2019         struct il_rx_pkt *pkt = rxb_addr(rxb);
2020         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2021         int txq_id = SEQ_TO_QUEUE(sequence);
2022         int idx = SEQ_TO_IDX(sequence);
2023         struct il_tx_queue *txq = &il->txq[txq_id];
2024         struct ieee80211_hdr *hdr;
2025         struct ieee80211_tx_info *info;
2026         struct il4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2027         u32 status = le32_to_cpu(tx_resp->u.status);
2028         int uninitialized_var(tid);
2029         int sta_id;
2030         int freed;
2031         u8 *qc = NULL;
2032         unsigned long flags;
2033
2034         if (idx >= txq->q.n_bd || il_queue_used(&txq->q, idx) == 0) {
2035                 IL_ERR("Read idx for DMA queue txq_id (%d) idx %d "
2036                        "is out of range [0-%d] %d %d\n", txq_id, idx,
2037                        txq->q.n_bd, txq->q.write_ptr, txq->q.read_ptr);
2038                 return;
2039         }
2040
2041         txq->time_stamp = jiffies;
2042         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb);
2043         memset(&info->status, 0, sizeof(info->status));
2044
2045         hdr = il_tx_queue_get_hdr(il, txq_id, idx);
2046         if (ieee80211_is_data_qos(hdr->frame_control)) {
2047                 qc = ieee80211_get_qos_ctl(hdr);
2048                 tid = qc[0] & 0xf;
2049         }
2050
2051         sta_id = il4965_get_ra_sta_id(il, hdr);
2052         if (txq->sched_retry && unlikely(sta_id == IL_INVALID_STATION)) {
2053                 IL_ERR("Station not known\n");
2054                 return;
2055         }
2056
2057         spin_lock_irqsave(&il->sta_lock, flags);
2058         if (txq->sched_retry) {
2059                 const u32 scd_ssn = il4965_get_scd_ssn(tx_resp);
2060                 struct il_ht_agg *agg = NULL;
2061                 WARN_ON(!qc);
2062
2063                 agg = &il->stations[sta_id].tid[tid].agg;
2064
2065                 il4965_tx_status_reply_tx(il, agg, tx_resp, txq_id, idx);
2066
2067                 /* check if BAR is needed */
2068                 if ((tx_resp->frame_count == 1) &&
2069                     !il4965_is_tx_success(status))
2070                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2071
2072                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2073                         idx = il_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2074                         D_TX_REPLY("Retry scheduler reclaim scd_ssn "
2075                                    "%d idx %d\n", scd_ssn, idx);
2076                         freed = il4965_tx_queue_reclaim(il, txq_id, idx);
2077                         if (qc)
2078                                 il4965_free_tfds_in_queue(il, sta_id, tid,
2079                                                           freed);
2080
2081                         if (il->mac80211_registered &&
2082                             il_queue_space(&txq->q) > txq->q.low_mark &&
2083                             agg->state != IL_EMPTYING_HW_QUEUE_DELBA)
2084                                 il_wake_queue(il, txq);
2085                 }
2086         } else {
2087                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2088                 info->flags |= il4965_tx_status_to_mac80211(status);
2089                 il4965_hwrate_to_tx_control(il,
2090                                             le32_to_cpu(tx_resp->rate_n_flags),
2091                                             info);
2092
2093                 D_TX_REPLY("TXQ %d status %s (0x%08x) "
2094                            "rate_n_flags 0x%x retries %d\n", txq_id,
2095                            il4965_get_tx_fail_reason(status), status,
2096                            le32_to_cpu(tx_resp->rate_n_flags),
2097                            tx_resp->failure_frame);
2098
2099                 freed = il4965_tx_queue_reclaim(il, txq_id, idx);
2100                 if (qc && likely(sta_id != IL_INVALID_STATION))
2101                         il4965_free_tfds_in_queue(il, sta_id, tid, freed);
2102                 else if (sta_id == IL_INVALID_STATION)
2103                         D_TX_REPLY("Station not known\n");
2104
2105                 if (il->mac80211_registered &&
2106                     il_queue_space(&txq->q) > txq->q.low_mark)
2107                         il_wake_queue(il, txq);
2108         }
2109         if (qc && likely(sta_id != IL_INVALID_STATION))
2110                 il4965_txq_check_empty(il, sta_id, tid, txq_id);
2111
2112         il4965_check_abort_status(il, tx_resp->frame_count, status);
2113
2114         spin_unlock_irqrestore(&il->sta_lock, flags);
2115 }
2116
2117 static void
2118 il4965_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
2119 {
2120         struct il_rx_pkt *pkt = rxb_addr(rxb);
2121         struct il4965_beacon_notif *beacon = (void *)pkt->u.raw;
2122         u8 rate __maybe_unused =
2123             il4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
2124
2125         D_RX("beacon status %#x, retries:%d ibssmgr:%d "
2126              "tsf:0x%.8x%.8x rate:%d\n",
2127              le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
2128              beacon->beacon_notify_hdr.failure_frame,
2129              le32_to_cpu(beacon->ibss_mgr_status),
2130              le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
2131
2132         il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
2133 }
2134
2135 /* Set up 4965-specific Rx frame reply handlers */
2136 static void
2137 il4965_handler_setup(struct il_priv *il)
2138 {
2139         /* Legacy Rx frames */
2140         il->handlers[N_RX] = il4965_hdl_rx;
2141         /* Tx response */
2142         il->handlers[C_TX] = il4965_hdl_tx;
2143         il->handlers[N_BEACON] = il4965_hdl_beacon;
2144 }
2145
2146 static struct il_hcmd_ops il4965_hcmd = {
2147         .rxon_assoc = il4965_send_rxon_assoc,
2148         .commit_rxon = il4965_commit_rxon,
2149         .set_rxon_chain = il4965_set_rxon_chain,
2150 };
2151
2152 static void
2153 il4965_post_scan(struct il_priv *il)
2154 {
2155         struct il_rxon_context *ctx = &il->ctx;
2156
2157         /*
2158          * Since setting the RXON may have been deferred while
2159          * performing the scan, fire one off if needed
2160          */
2161         if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
2162                 il_commit_rxon(il, ctx);
2163 }
2164
2165 static void
2166 il4965_post_associate(struct il_priv *il)
2167 {
2168         struct il_rxon_context *ctx = &il->ctx;
2169         struct ieee80211_vif *vif = ctx->vif;
2170         struct ieee80211_conf *conf = NULL;
2171         int ret = 0;
2172
2173         if (!vif || !il->is_open)
2174                 return;
2175
2176         if (test_bit(S_EXIT_PENDING, &il->status))
2177                 return;
2178
2179         il_scan_cancel_timeout(il, 200);
2180
2181         conf = &il->hw->conf;
2182
2183         ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2184         il_commit_rxon(il, ctx);
2185
2186         ret = il_send_rxon_timing(il, ctx);
2187         if (ret)
2188                 IL_WARN("RXON timing - " "Attempting to continue.\n");
2189
2190         ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2191
2192         il_set_rxon_ht(il, &il->current_ht_config);
2193
2194         if (il->cfg->ops->hcmd->set_rxon_chain)
2195                 il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
2196
2197         ctx->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid);
2198
2199         D_ASSOC("assoc id %d beacon interval %d\n", vif->bss_conf.aid,
2200                 vif->bss_conf.beacon_int);
2201
2202         if (vif->bss_conf.use_short_preamble)
2203                 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2204         else
2205                 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2206
2207         if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
2208                 if (vif->bss_conf.use_short_slot)
2209                         ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2210                 else
2211                         ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2212         }
2213
2214         il_commit_rxon(il, ctx);
2215
2216         D_ASSOC("Associated as %d to: %pM\n", vif->bss_conf.aid,
2217                 ctx->active.bssid_addr);
2218
2219         switch (vif->type) {
2220         case NL80211_IFTYPE_STATION:
2221                 break;
2222         case NL80211_IFTYPE_ADHOC:
2223                 il4965_send_beacon_cmd(il);
2224                 break;
2225         default:
2226                 IL_ERR("%s Should not be called in %d mode\n", __func__,
2227                        vif->type);
2228                 break;
2229         }
2230
2231         /* the chain noise calibration will enabled PM upon completion
2232          * If chain noise has already been run, then we need to enable
2233          * power management here */
2234         if (il->chain_noise_data.state == IL_CHAIN_NOISE_DONE)
2235                 il_power_update_mode(il, false);
2236
2237         /* Enable Rx differential gain and sensitivity calibrations */
2238         il4965_chain_noise_reset(il);
2239         il->start_calib = 1;
2240 }
2241
2242 static void
2243 il4965_config_ap(struct il_priv *il)
2244 {
2245         struct il_rxon_context *ctx = &il->ctx;
2246         struct ieee80211_vif *vif = ctx->vif;
2247         int ret = 0;
2248
2249         lockdep_assert_held(&il->mutex);
2250
2251         if (test_bit(S_EXIT_PENDING, &il->status))
2252                 return;
2253
2254         /* The following should be done only at AP bring up */
2255         if (!il_is_associated_ctx(ctx)) {
2256
2257                 /* RXON - unassoc (to set timing command) */
2258                 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2259                 il_commit_rxon(il, ctx);
2260
2261                 /* RXON Timing */
2262                 ret = il_send_rxon_timing(il, ctx);
2263                 if (ret)
2264                         IL_WARN("RXON timing failed - "
2265                                 "Attempting to continue.\n");
2266
2267                 /* AP has all antennas */
2268                 il->chain_noise_data.active_chains = il->hw_params.valid_rx_ant;
2269                 il_set_rxon_ht(il, &il->current_ht_config);
2270                 if (il->cfg->ops->hcmd->set_rxon_chain)
2271                         il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
2272
2273                 ctx->staging.assoc_id = 0;
2274
2275                 if (vif->bss_conf.use_short_preamble)
2276                         ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2277                 else
2278                         ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2279
2280                 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
2281                         if (vif->bss_conf.use_short_slot)
2282                                 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2283                         else
2284                                 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2285                 }
2286                 /* need to send beacon cmd before committing assoc RXON! */
2287                 il4965_send_beacon_cmd(il);
2288                 /* restore RXON assoc */
2289                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2290                 il_commit_rxon(il, ctx);
2291         }
2292         il4965_send_beacon_cmd(il);
2293 }
2294
2295 static struct il_hcmd_utils_ops il4965_hcmd_utils = {
2296         .get_hcmd_size = il4965_get_hcmd_size,
2297         .build_addsta_hcmd = il4965_build_addsta_hcmd,
2298         .request_scan = il4965_request_scan,
2299         .post_scan = il4965_post_scan,
2300 };
2301
2302 static struct il_lib_ops il4965_lib = {
2303         .set_hw_params = il4965_hw_set_hw_params,
2304         .txq_update_byte_cnt_tbl = il4965_txq_update_byte_cnt_tbl,
2305         .txq_attach_buf_to_tfd = il4965_hw_txq_attach_buf_to_tfd,
2306         .txq_free_tfd = il4965_hw_txq_free_tfd,
2307         .txq_init = il4965_hw_tx_queue_init,
2308         .handler_setup = il4965_handler_setup,
2309         .is_valid_rtc_data_addr = il4965_hw_valid_rtc_data_addr,
2310         .init_alive_start = il4965_init_alive_start,
2311         .load_ucode = il4965_load_bsm,
2312         .dump_nic_error_log = il4965_dump_nic_error_log,
2313         .dump_fh = il4965_dump_fh,
2314         .set_channel_switch = il4965_hw_channel_switch,
2315         .apm_ops = {
2316                     .init = il_apm_init,
2317                     .config = il4965_nic_config,
2318                     },
2319         .eeprom_ops = {
2320                        .regulatory_bands = {
2321                                             EEPROM_REGULATORY_BAND_1_CHANNELS,
2322                                             EEPROM_REGULATORY_BAND_2_CHANNELS,
2323                                             EEPROM_REGULATORY_BAND_3_CHANNELS,
2324                                             EEPROM_REGULATORY_BAND_4_CHANNELS,
2325                                             EEPROM_REGULATORY_BAND_5_CHANNELS,
2326                                             EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
2327                                             EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS},
2328                        .acquire_semaphore = il4965_eeprom_acquire_semaphore,
2329                        .release_semaphore = il4965_eeprom_release_semaphore,
2330                        },
2331         .send_tx_power = il4965_send_tx_power,
2332         .update_chain_flags = il4965_update_chain_flags,
2333         .temp_ops = {
2334                      .temperature = il4965_temperature_calib,
2335                      },
2336         .debugfs_ops = {
2337                         .rx_stats_read = il4965_ucode_rx_stats_read,
2338                         .tx_stats_read = il4965_ucode_tx_stats_read,
2339                         .general_stats_read = il4965_ucode_general_stats_read,
2340                         },
2341 };
2342
2343 static const struct il_legacy_ops il4965_legacy_ops = {
2344         .post_associate = il4965_post_associate,
2345         .config_ap = il4965_config_ap,
2346         .manage_ibss_station = il4965_manage_ibss_station,
2347         .update_bcast_stations = il4965_update_bcast_stations,
2348 };
2349
2350 struct ieee80211_ops il4965_hw_ops = {
2351         .tx = il4965_mac_tx,
2352         .start = il4965_mac_start,
2353         .stop = il4965_mac_stop,
2354         .add_interface = il_mac_add_interface,
2355         .remove_interface = il_mac_remove_interface,
2356         .change_interface = il_mac_change_interface,
2357         .config = il_mac_config,
2358         .configure_filter = il4965_configure_filter,
2359         .set_key = il4965_mac_set_key,
2360         .update_tkip_key = il4965_mac_update_tkip_key,
2361         .conf_tx = il_mac_conf_tx,
2362         .reset_tsf = il_mac_reset_tsf,
2363         .bss_info_changed = il_mac_bss_info_changed,
2364         .ampdu_action = il4965_mac_ampdu_action,
2365         .hw_scan = il_mac_hw_scan,
2366         .sta_add = il4965_mac_sta_add,
2367         .sta_remove = il_mac_sta_remove,
2368         .channel_switch = il4965_mac_channel_switch,
2369         .tx_last_beacon = il_mac_tx_last_beacon,
2370 };
2371
2372 static const struct il_ops il4965_ops = {
2373         .lib = &il4965_lib,
2374         .hcmd = &il4965_hcmd,
2375         .utils = &il4965_hcmd_utils,
2376         .led = &il4965_led_ops,
2377         .legacy = &il4965_legacy_ops,
2378         .ieee80211_ops = &il4965_hw_ops,
2379 };
2380
2381 static struct il_base_params il4965_base_params = {
2382         .eeprom_size = IL4965_EEPROM_IMG_SIZE,
2383         .num_of_queues = IL49_NUM_QUEUES,
2384         .num_of_ampdu_queues = IL49_NUM_AMPDU_QUEUES,
2385         .pll_cfg_val = 0,
2386         .set_l0s = true,
2387         .use_bsm = true,
2388         .led_compensation = 61,
2389         .chain_noise_num_beacons = IL4965_CAL_NUM_BEACONS,
2390         .wd_timeout = IL_DEF_WD_TIMEOUT,
2391         .temperature_kelvin = true,
2392         .ucode_tracing = true,
2393         .sensitivity_calib_by_driver = true,
2394         .chain_noise_calib_by_driver = true,
2395 };
2396
2397 struct il_cfg il4965_cfg = {
2398         .name = "Intel(R) Wireless WiFi Link 4965AGN",
2399         .fw_name_pre = IL4965_FW_PRE,
2400         .ucode_api_max = IL4965_UCODE_API_MAX,
2401         .ucode_api_min = IL4965_UCODE_API_MIN,
2402         .sku = IL_SKU_A | IL_SKU_G | IL_SKU_N,
2403         .valid_tx_ant = ANT_AB,
2404         .valid_rx_ant = ANT_ABC,
2405         .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2406         .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2407         .ops = &il4965_ops,
2408         .mod_params = &il4965_mod_params,
2409         .base_params = &il4965_base_params,
2410         .led_mode = IL_LED_BLINK,
2411         /*
2412          * Force use of chains B and C for scan RX on 5 GHz band
2413          * because the device has off-channel reception on chain A.
2414          */
2415         .scan_rx_antennas[IEEE80211_BAND_5GHZ] = ANT_BC,
2416 };
2417
2418 /* Module firmware */
2419 MODULE_FIRMWARE(IL4965_MODULE_FIRMWARE(IL4965_UCODE_API_MAX));