1 /******************************************************************************
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
29 #include <linux/interrupt.h>
30 #include <linux/pci.h> /* for struct pci_device_id */
31 #include <linux/kernel.h>
32 #include <linux/leds.h>
33 #include <linux/wait.h>
34 #include <net/mac80211.h>
35 #include <net/ieee80211_radiotap.h>
45 #define IL_ERR(f, a...) dev_err(&il->pci_dev->dev, f, ## a)
46 #define IL_WARN(f, a...) dev_warn(&il->pci_dev->dev, f, ## a)
47 #define IL_INFO(f, a...) dev_info(&il->pci_dev->dev, f, ## a)
49 #define RX_QUEUE_SIZE 256
50 #define RX_QUEUE_MASK 255
51 #define RX_QUEUE_SIZE_LOG 8
54 * RX related structures and functions
56 #define RX_FREE_BUFFERS 64
57 #define RX_LOW_WATERMARK 8
59 #define U32_PAD(n) ((4-(n))&0x3)
61 /* CT-KILL constants */
62 #define CT_KILL_THRESHOLD_LEGACY 110 /* in Celsius */
64 /* Default noise level to report when noise measurement is not available.
65 * This may be because we're:
66 * 1) Not associated (4965, no beacon stats being sent to driver)
67 * 2) Scanning (noise measurement does not apply to associated channel)
68 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
69 * Use default noise value of -127 ... this is below the range of measurable
70 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
71 * Also, -127 works better than 0 when averaging frames with/without
72 * noise info (e.g. averaging might be done in app); measured dBm values are
73 * always negative ... using a negative value as the default keeps all
74 * averages within an s8's (used in some apps) range of negative values. */
75 #define IL_NOISE_MEAS_NOT_AVAILABLE (-127)
78 * RTS threshold here is total size [2347] minus 4 FCS bytes
80 * a value of 0 means RTS on all data/management packets
81 * a value > max MSDU size means no RTS
82 * else RTS for data/management frames where MPDU is larger
85 #define DEFAULT_RTS_THRESHOLD 2347U
86 #define MIN_RTS_THRESHOLD 0U
87 #define MAX_RTS_THRESHOLD 2347U
88 #define MAX_MSDU_SIZE 2304U
89 #define MAX_MPDU_SIZE 2346U
90 #define DEFAULT_BEACON_INTERVAL 100U
91 #define DEFAULT_SHORT_RETRY_LIMIT 7U
92 #define DEFAULT_LONG_RETRY_LIMIT 4U
97 struct list_head list;
100 #define rxb_addr(r) page_address(r->page)
103 struct il_device_cmd;
106 /* only for SYNC commands, iff the reply skb is wanted */
107 struct il_host_cmd *source;
109 * only for ASYNC commands
110 * (which is somewhat stupid -- look at common.c for instance
111 * which duplicates a bunch of code because the callback isn't
112 * invoked for SYNC commands, if it were and its result passed
113 * through it would be simpler...)
115 void (*callback) (struct il_priv *il, struct il_device_cmd *cmd,
116 struct il_rx_pkt *pkt);
118 /* The CMD_SIZE_HUGE flag bit indicates that the command
119 * structure is stored at the end of the shared queue memory. */
122 DEFINE_DMA_UNMAP_ADDR(mapping);
123 DEFINE_DMA_UNMAP_LEN(len);
127 * Generic queue structure
129 * Contains common data for Rx and Tx queues
132 int n_bd; /* number of BDs in this queue */
133 int write_ptr; /* 1-st empty entry (idx) host_w */
134 int read_ptr; /* last used entry (idx) host_r */
135 /* use for monitoring and recovering the stuck queue */
136 dma_addr_t dma_addr; /* physical addr for BD's */
137 int n_win; /* safe queue win */
139 int low_mark; /* low watermark, resume queue if free
140 * space more than this */
141 int high_mark; /* high watermark, stop queue if free
142 * space less than this */
145 /* One for each TFD */
148 struct il_rxon_context *ctx;
152 * struct il_tx_queue - Tx Queue for DMA
153 * @q: generic Rx/Tx queue descriptor
154 * @bd: base of circular buffer of TFDs
155 * @cmd: array of command/TX buffer pointers
156 * @meta: array of meta data for each command/tx buffer
157 * @dma_addr_cmd: physical address of cmd/tx buffer array
158 * @txb: array of per-TFD driver data
159 * @time_stamp: time (in jiffies) of last read_ptr change
160 * @need_update: indicates need to update read/write idx
161 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
163 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
164 * descriptors) and required locking structures.
166 #define TFD_TX_CMD_SLOTS 256
167 #define TFD_CMD_SLOTS 32
172 struct il_device_cmd **cmd;
173 struct il_cmd_meta *meta;
174 struct il_tx_info *txb;
175 unsigned long time_stamp;
183 * EEPROM access time values:
185 * Driver initiates EEPROM read by writing byte address << 1 to CSR_EEPROM_REG.
186 * Driver then polls CSR_EEPROM_REG for CSR_EEPROM_REG_READ_VALID_MSK (0x1).
187 * When polling, wait 10 uSec between polling loops, up to a maximum 5000 uSec.
188 * Driver reads 16-bit value from bits 31-16 of CSR_EEPROM_REG.
190 #define IL_EEPROM_ACCESS_TIMEOUT 5000 /* uSec */
192 #define IL_EEPROM_SEM_TIMEOUT 10 /* microseconds */
193 #define IL_EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
196 * Regulatory channel usage flags in EEPROM struct il4965_eeprom_channel.flags.
198 * IBSS and/or AP operation is allowed *only* on those channels with
199 * (VALID && IBSS && ACTIVE && !RADAR). This restriction is in place because
200 * RADAR detection is not supported by the 4965 driver, but is a
201 * requirement for establishing a new network for legal operation on channels
202 * requiring RADAR detection or restricting ACTIVE scanning.
204 * NOTE: "WIDE" flag does not indicate anything about "HT40" 40 MHz channels.
205 * It only indicates that 20 MHz channel use is supported; HT40 channel
206 * usage is indicated by a separate set of regulatory flags for each
209 * NOTE: Using a channel inappropriately will result in a uCode error!
211 #define IL_NUM_TX_CALIB_GROUPS 5
213 EEPROM_CHANNEL_VALID = (1 << 0), /* usable for this SKU/geo */
214 EEPROM_CHANNEL_IBSS = (1 << 1), /* usable as an IBSS channel */
216 EEPROM_CHANNEL_ACTIVE = (1 << 3), /* active scanning allowed */
217 EEPROM_CHANNEL_RADAR = (1 << 4), /* radar detection required */
218 EEPROM_CHANNEL_WIDE = (1 << 5), /* 20 MHz channel okay */
219 /* Bit 6 Reserved (was Narrow Channel) */
220 EEPROM_CHANNEL_DFS = (1 << 7), /* dynamic freq selection candidate */
223 /* SKU Capabilities */
225 #define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0)
226 #define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1)
228 /* *regulatory* channel data format in eeprom, one for each channel.
229 * There are separate entries for HT40 (40 MHz) vs. normal (20 MHz) channels. */
230 struct il_eeprom_channel {
231 u8 flags; /* EEPROM_CHANNEL_* flags copied from EEPROM */
232 s8 max_power_avg; /* max power (dBm) on this chnl, limit 31 */
236 #define EEPROM_3945_EEPROM_VERSION (0x2f)
238 /* 4965 has two radio transmitters (and 3 radio receivers) */
239 #define EEPROM_TX_POWER_TX_CHAINS (2)
241 /* 4965 has room for up to 8 sets of txpower calibration data */
242 #define EEPROM_TX_POWER_BANDS (8)
244 /* 4965 factory calibration measures txpower gain settings for
245 * each of 3 target output levels */
246 #define EEPROM_TX_POWER_MEASUREMENTS (3)
249 /* 4965 driver does not work with txpower calibration version < 5 */
250 #define EEPROM_4965_TX_POWER_VERSION (5)
251 #define EEPROM_4965_EEPROM_VERSION (0x2f)
252 #define EEPROM_4965_CALIB_VERSION_OFFSET (2*0xB6) /* 2 bytes */
253 #define EEPROM_4965_CALIB_TXPOWER_OFFSET (2*0xE8) /* 48 bytes */
254 #define EEPROM_4965_BOARD_REVISION (2*0x4F) /* 2 bytes */
255 #define EEPROM_4965_BOARD_PBA (2*0x56+1) /* 9 bytes */
258 extern const u8 il_eeprom_band_1[14];
261 * factory calibration data for one txpower level, on one channel,
262 * measured on one of the 2 tx chains (radio transmitter and associated
263 * antenna). EEPROM contains:
265 * 1) Temperature (degrees Celsius) of device when measurement was made.
267 * 2) Gain table idx used to achieve the target measurement power.
268 * This refers to the "well-known" gain tables (see 4965.h).
270 * 3) Actual measured output power, in half-dBm ("34" = 17 dBm).
272 * 4) RF power amplifier detector level measurement (not used).
274 struct il_eeprom_calib_measure {
275 u8 temperature; /* Device temperature (Celsius) */
276 u8 gain_idx; /* Index into gain table */
277 u8 actual_pow; /* Measured RF output power, half-dBm */
278 s8 pa_det; /* Power amp detector level (not used) */
282 * measurement set for one channel. EEPROM contains:
284 * 1) Channel number measured
286 * 2) Measurements for each of 3 power levels for each of 2 radio transmitters
287 * (a.k.a. "tx chains") (6 measurements altogether)
289 struct il_eeprom_calib_ch_info {
291 struct il_eeprom_calib_measure
292 measurements[EEPROM_TX_POWER_TX_CHAINS]
293 [EEPROM_TX_POWER_MEASUREMENTS];
297 * txpower subband info.
299 * For each frequency subband, EEPROM contains the following:
301 * 1) First and last channels within range of the subband. "0" values
302 * indicate that this sample set is not being used.
304 * 2) Sample measurement sets for 2 channels close to the range endpoints.
306 struct il_eeprom_calib_subband_info {
307 u8 ch_from; /* channel number of lowest channel in subband */
308 u8 ch_to; /* channel number of highest channel in subband */
309 struct il_eeprom_calib_ch_info ch1;
310 struct il_eeprom_calib_ch_info ch2;
314 * txpower calibration info. EEPROM contains:
316 * 1) Factory-measured saturation power levels (maximum levels at which
317 * tx power amplifier can output a signal without too much distortion).
318 * There is one level for 2.4 GHz band and one for 5 GHz band. These
319 * values apply to all channels within each of the bands.
321 * 2) Factory-measured power supply voltage level. This is assumed to be
322 * constant (i.e. same value applies to all channels/bands) while the
323 * factory measurements are being made.
325 * 3) Up to 8 sets of factory-measured txpower calibration values.
326 * These are for different frequency ranges, since txpower gain
327 * characteristics of the analog radio circuitry vary with frequency.
329 * Not all sets need to be filled with data;
330 * struct il_eeprom_calib_subband_info contains range of channels
331 * (0 if unused) for each set of data.
333 struct il_eeprom_calib_info {
334 u8 saturation_power24; /* half-dBm (e.g. "34" = 17 dBm) */
335 u8 saturation_power52; /* half-dBm */
336 __le16 voltage; /* signed */
337 struct il_eeprom_calib_subband_info band_info[EEPROM_TX_POWER_BANDS];
341 #define EEPROM_DEVICE_ID (2*0x08) /* 2 bytes */
342 #define EEPROM_MAC_ADDRESS (2*0x15) /* 6 bytes */
343 #define EEPROM_BOARD_REVISION (2*0x35) /* 2 bytes */
344 #define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */
345 #define EEPROM_VERSION (2*0x44) /* 2 bytes */
346 #define EEPROM_SKU_CAP (2*0x45) /* 2 bytes */
347 #define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */
348 #define EEPROM_WOWLAN_MODE (2*0x47) /* 2 bytes */
349 #define EEPROM_RADIO_CONFIG (2*0x48) /* 2 bytes */
350 #define EEPROM_NUM_MAC_ADDRESS (2*0x4C) /* 2 bytes */
352 /* The following masks are to be applied on EEPROM_RADIO_CONFIG */
353 #define EEPROM_RF_CFG_TYPE_MSK(x) (x & 0x3) /* bits 0-1 */
354 #define EEPROM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */
355 #define EEPROM_RF_CFG_DASH_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */
356 #define EEPROM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */
357 #define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */
358 #define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */
360 #define EEPROM_3945_RF_CFG_TYPE_MAX 0x0
361 #define EEPROM_4965_RF_CFG_TYPE_MAX 0x1
364 * Per-channel regulatory data.
366 * Each channel that *might* be supported by iwl has a fixed location
367 * in EEPROM containing EEPROM_CHANNEL_* usage flags (LSB) and max regulatory
370 * Entries immediately below are for 20 MHz channel width. HT40 (40 MHz)
371 * channels (only for 4965, not supported by 3945) appear later in the EEPROM.
373 * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
375 #define EEPROM_REGULATORY_SKU_ID (2*0x60) /* 4 bytes */
376 #define EEPROM_REGULATORY_BAND_1 (2*0x62) /* 2 bytes */
377 #define EEPROM_REGULATORY_BAND_1_CHANNELS (2*0x63) /* 28 bytes */
380 * 4.9 GHz channels 183, 184, 185, 187, 188, 189, 192, 196,
381 * 5.0 GHz channels 7, 8, 11, 12, 16
382 * (4915-5080MHz) (none of these is ever supported)
384 #define EEPROM_REGULATORY_BAND_2 (2*0x71) /* 2 bytes */
385 #define EEPROM_REGULATORY_BAND_2_CHANNELS (2*0x72) /* 26 bytes */
388 * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
391 #define EEPROM_REGULATORY_BAND_3 (2*0x7F) /* 2 bytes */
392 #define EEPROM_REGULATORY_BAND_3_CHANNELS (2*0x80) /* 24 bytes */
395 * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
398 #define EEPROM_REGULATORY_BAND_4 (2*0x8C) /* 2 bytes */
399 #define EEPROM_REGULATORY_BAND_4_CHANNELS (2*0x8D) /* 22 bytes */
402 * 5.7 GHz channels 145, 149, 153, 157, 161, 165
405 #define EEPROM_REGULATORY_BAND_5 (2*0x98) /* 2 bytes */
406 #define EEPROM_REGULATORY_BAND_5_CHANNELS (2*0x99) /* 12 bytes */
409 * 2.4 GHz HT40 channels 1 (5), 2 (6), 3 (7), 4 (8), 5 (9), 6 (10), 7 (11)
411 * The channel listed is the center of the lower 20 MHz half of the channel.
412 * The overall center frequency is actually 2 channels (10 MHz) above that,
413 * and the upper half of each HT40 channel is centered 4 channels (20 MHz) away
414 * from the lower half; e.g. the upper half of HT40 channel 1 is channel 5,
415 * and the overall HT40 channel width centers on channel 3.
417 * NOTE: The RXON command uses 20 MHz channel numbers to specify the
418 * control channel to which to tune. RXON also specifies whether the
419 * control channel is the upper or lower half of a HT40 channel.
421 * NOTE: 4965 does not support HT40 channels on 2.4 GHz.
423 #define EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS (2*0xA0) /* 14 bytes */
426 * 5.2 GHz HT40 channels 36 (40), 44 (48), 52 (56), 60 (64),
427 * 100 (104), 108 (112), 116 (120), 124 (128), 132 (136), 149 (153), 157 (161)
429 #define EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS (2*0xA8) /* 22 bytes */
431 #define EEPROM_REGULATORY_BAND_NO_HT40 (0)
433 struct il_eeprom_ops {
434 const u32 regulatory_bands[7];
435 int (*acquire_semaphore) (struct il_priv *il);
436 void (*release_semaphore) (struct il_priv *il);
439 int il_eeprom_init(struct il_priv *il);
440 void il_eeprom_free(struct il_priv *il);
441 const u8 *il_eeprom_query_addr(const struct il_priv *il, size_t offset);
442 u16 il_eeprom_query16(const struct il_priv *il, size_t offset);
443 int il_init_channel_map(struct il_priv *il);
444 void il_free_channel_map(struct il_priv *il);
445 const struct il_channel_info *il_get_channel_info(const struct il_priv *il,
446 enum ieee80211_band band,
449 #define IL_NUM_SCAN_RATES (2)
451 struct il4965_channel_tgd_info {
456 struct il4965_channel_tgh_info {
460 #define IL4965_MAX_RATE (33)
462 struct il3945_clip_group {
463 /* maximum power level to prevent clipping for each rate, derived by
464 * us from this band's saturation power in EEPROM */
465 const s8 clip_powers[IL_MAX_RATES];
468 /* current Tx power values to use, one for each rate for each channel.
469 * requested power is limited by:
470 * -- regulatory EEPROM limits for this channel
471 * -- hardware capabilities (clip-powers)
472 * -- spectrum management
473 * -- user preference (e.g. iwconfig)
474 * when requested power is set, base power idx must also be set. */
475 struct il3945_channel_power_info {
476 struct il3945_tx_power tpc; /* actual radio and DSP gain settings */
477 s8 power_table_idx; /* actual (compenst'd) idx into gain table */
478 s8 base_power_idx; /* gain idx for power at factory temp. */
479 s8 requested_power; /* power (dBm) requested for this chnl/rate */
482 /* current scan Tx power values to use, one for each scan rate for each
484 struct il3945_scan_power_info {
485 struct il3945_tx_power tpc; /* actual radio and DSP gain settings */
486 s8 power_table_idx; /* actual (compenst'd) idx into gain table */
487 s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */
491 * One for each channel, holds all channel setup data
492 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
495 struct il_channel_info {
496 struct il4965_channel_tgd_info tgd;
497 struct il4965_channel_tgh_info tgh;
498 struct il_eeprom_channel eeprom; /* EEPROM regulatory limit */
499 struct il_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for
502 u8 channel; /* channel number */
503 u8 flags; /* flags copied from EEPROM */
504 s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
505 s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */
506 s8 min_power; /* always 0 */
507 s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */
509 u8 group_idx; /* 0-4, maps channel to group1/2/3/4/5 */
510 u8 band_idx; /* 0-4, maps channel to band1/2/3/4/5 */
511 enum ieee80211_band band;
513 /* HT40 channel info */
514 s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
515 u8 ht40_flags; /* flags copied from EEPROM */
516 u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */
518 /* Radio/DSP gain settings for each "normal" data Tx rate.
519 * These include, in addition to RF and DSP gain, a few fields for
520 * remembering/modifying gain settings (idxes). */
521 struct il3945_channel_power_info power_info[IL4965_MAX_RATE];
523 /* Radio/DSP gain settings for each scan rate, for directed scans. */
524 struct il3945_scan_power_info scan_pwr_info[IL_NUM_SCAN_RATES];
527 #define IL_TX_FIFO_BK 0 /* shared */
528 #define IL_TX_FIFO_BE 1
529 #define IL_TX_FIFO_VI 2 /* shared */
530 #define IL_TX_FIFO_VO 3
531 #define IL_TX_FIFO_UNUSED -1
533 /* Minimum number of queues. MAX_NUM is defined in hw specific files.
534 * Set the minimum to accommodate the 4 standard TX queues, 1 command
535 * queue, 2 (unused) HCCA queues, and 4 HT queues (one for each AC) */
536 #define IL_MIN_NUM_QUEUES 10
538 #define IL_DEFAULT_CMD_QUEUE_NUM 4
540 #define IEEE80211_DATA_LEN 2304
541 #define IEEE80211_4ADDR_LEN 30
542 #define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
543 #define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
547 struct ieee80211_hdr frame;
548 struct il_tx_beacon_cmd beacon;
549 u8 raw[IEEE80211_FRAME_LEN];
552 struct list_head list;
555 #define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
556 #define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
557 #define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
563 CMD_SIZE_HUGE = (1 << 0),
564 CMD_ASYNC = (1 << 1),
565 CMD_WANT_SKB = (1 << 2),
566 CMD_MAPPED = (1 << 3),
569 #define DEF_CMD_PAYLOAD_SIZE 320
572 * struct il_device_cmd
574 * For allocation of the command and tx queues, this establishes the overall
575 * size of the largest command we send to uCode, except for a scan command
576 * (which is relatively huge; space is allocated separately).
578 struct il_device_cmd {
579 struct il_cmd_header hdr; /* uCode API */
586 u8 payload[DEF_CMD_PAYLOAD_SIZE];
590 #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct il_device_cmd))
594 unsigned long reply_page;
595 void (*callback) (struct il_priv *il, struct il_device_cmd *cmd,
596 struct il_rx_pkt *pkt);
602 #define SUP_RATE_11A_MAX_NUM_CHANNELS 8
603 #define SUP_RATE_11B_MAX_NUM_CHANNELS 4
604 #define SUP_RATE_11G_MAX_NUM_CHANNELS 12
607 * struct il_rx_queue - Rx queue
608 * @bd: driver's pointer to buffer of receive buffer descriptors (rbd)
609 * @bd_dma: bus address of buffer of receive buffer descriptors (rbd)
610 * @read: Shared idx to newest available Rx buffer
611 * @write: Shared idx to oldest written Rx packet
612 * @free_count: Number of pre-allocated buffers in rx_free
613 * @rx_free: list of free SKBs for use
614 * @rx_used: List of Rx buffers with no SKB
615 * @need_update: flag to indicate we need to update read/write idx
616 * @rb_stts: driver's pointer to receive buffer status
617 * @rb_stts_dma: bus address of receive buffer status
619 * NOTE: rx_free and rx_used are used as a FIFO for il_rx_bufs
624 struct il_rx_buf pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
625 struct il_rx_buf *queue[RX_QUEUE_SIZE];
630 struct list_head rx_free;
631 struct list_head rx_used;
633 struct il_rb_status *rb_stts;
634 dma_addr_t rb_stts_dma;
638 #define IL_SUPPORTED_RATES_IE_LEN 8
640 #define MAX_TID_COUNT 9
642 #define IL_INVALID_RATE 0xFF
643 #define IL_INVALID_VALUE -1
646 * struct il_ht_agg -- aggregation status while waiting for block-ack
647 * @txq_id: Tx queue used for Tx attempt
648 * @frame_count: # frames attempted by Tx command
649 * @wait_for_ba: Expect block-ack before next Tx reply
650 * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx win
651 * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx win
652 * @bitmap1: High order, one bit for each frame pending ACK in Tx win
653 * @rate_n_flags: Rate at which Tx was attempted
655 * If C_TX indicates that aggregation was attempted, driver must wait
656 * for block ack (N_COMPRESSED_BA). This struct stores tx reply info
657 * until block ack arrives.
668 #define IL_EMPTYING_HW_QUEUE_ADDBA 2
669 #define IL_EMPTYING_HW_QUEUE_DELBA 3
674 u16 seq_number; /* 4965 only */
676 struct il_ht_agg agg;
686 union il_ht_rate_supp {
694 #define CFG_HT_RX_AMPDU_FACTOR_8K (0x0)
695 #define CFG_HT_RX_AMPDU_FACTOR_16K (0x1)
696 #define CFG_HT_RX_AMPDU_FACTOR_32K (0x2)
697 #define CFG_HT_RX_AMPDU_FACTOR_64K (0x3)
698 #define CFG_HT_RX_AMPDU_FACTOR_DEF CFG_HT_RX_AMPDU_FACTOR_64K
699 #define CFG_HT_RX_AMPDU_FACTOR_MAX CFG_HT_RX_AMPDU_FACTOR_64K
700 #define CFG_HT_RX_AMPDU_FACTOR_MIN CFG_HT_RX_AMPDU_FACTOR_8K
703 * Maximal MPDU density for TX aggregation
709 #define CFG_HT_MPDU_DENSITY_2USEC (0x4)
710 #define CFG_HT_MPDU_DENSITY_4USEC (0x5)
711 #define CFG_HT_MPDU_DENSITY_8USEC (0x6)
712 #define CFG_HT_MPDU_DENSITY_16USEC (0x7)
713 #define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC
714 #define CFG_HT_MPDU_DENSITY_MAX CFG_HT_MPDU_DENSITY_16USEC
715 #define CFG_HT_MPDU_DENSITY_MIN (0x1)
717 struct il_ht_config {
718 bool single_chain_sufficient;
719 enum ieee80211_smps_mode smps; /* current smps mode */
725 struct il_qosparam_cmd def_qos_parm;
729 * Structure should be accessed with sta_lock held. When station addition
730 * is in progress (IL_STA_UCODE_INPROGRESS) it is possible to access only
731 * the commands (il_addsta_cmd and il_link_quality_cmd) without
734 struct il_station_entry {
735 struct il_addsta_cmd sta;
736 struct il_tid_data tid[MAX_TID_COUNT];
738 struct il_hw_key keyinfo;
739 struct il_link_quality_cmd *lq;
742 struct il_station_priv_common {
743 struct il_rxon_context *ctx;
748 * struct il_vif_priv - driver's ilate per-interface information
750 * When mac80211 allocates a virtual interface, it can allocate
751 * space for us to put data into.
754 struct il_rxon_context *ctx;
755 u8 ibss_bssid_sta_id;
758 /* one for each uCode image (inst/data, boot/init/runtime) */
760 void *v_addr; /* access by driver */
761 dma_addr_t p_addr; /* access by card's busmaster DMA */
765 /* uCode file layout */
766 struct il_ucode_header {
767 __le32 ver; /* major/minor/API/serial */
769 __le32 inst_size; /* bytes of runtime code */
770 __le32 data_size; /* bytes of runtime data */
771 __le32 init_size; /* bytes of init code */
772 __le32 init_data_size; /* bytes of init data */
773 __le32 boot_size; /* bytes of bootstrap code */
774 u8 data[0]; /* in same order as sizes */
778 struct il4965_ibss_seq {
782 unsigned long packet_time;
783 struct list_head list;
786 struct il_sensitivity_ranges {
793 u16 auto_corr_min_ofdm;
794 u16 auto_corr_min_ofdm_mrc;
795 u16 auto_corr_min_ofdm_x1;
796 u16 auto_corr_min_ofdm_mrc_x1;
798 u16 auto_corr_max_ofdm;
799 u16 auto_corr_max_ofdm_mrc;
800 u16 auto_corr_max_ofdm_x1;
801 u16 auto_corr_max_ofdm_mrc_x1;
803 u16 auto_corr_max_cck;
804 u16 auto_corr_max_cck_mrc;
805 u16 auto_corr_min_cck;
806 u16 auto_corr_min_cck_mrc;
808 u16 barker_corr_th_min;
809 u16 barker_corr_th_min_mrc;
813 #define KELVIN_TO_CELSIUS(x) ((x)-273)
814 #define CELSIUS_TO_KELVIN(x) ((x)+273)
817 * struct il_hw_params
818 * @max_txq_num: Max # Tx queues supported
819 * @dma_chnl_num: Number of Tx DMA/FIFO channels
820 * @scd_bc_tbls_size: size of scheduler byte count tables
821 * @tfd_size: TFD size
822 * @tx/rx_chains_num: Number of TX/RX chains
823 * @valid_tx/rx_ant: usable antennas
824 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
825 * @max_rxq_log: Log-base-2 of max_rxq_size
826 * @rx_page_order: Rx buffer page order
827 * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR
829 * @ht40_channel: is 40MHz width possible in band 2.4
830 * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ)
831 * @sw_crypto: 0 for hw, 1 for sw
832 * @max_xxx_size: for ucode uses
833 * @ct_kill_threshold: temperature threshold
834 * @beacon_time_tsf_bits: number of valid tsf bits for beacon time
835 * @struct il_sensitivity_ranges: range of sensitivity values
837 struct il_hw_params {
840 u16 scd_bc_tbls_size;
852 u8 max_beacon_itrvl; /* in 1024 ms */
856 u32 ct_kill_threshold; /* value in hw-dependent units */
857 u16 beacon_time_tsf_bits;
858 const struct il_sensitivity_ranges *sens;
861 /******************************************************************************
863 * Functions implemented in core module which are forward declared here
864 * for use by iwl-[4-5].c
866 * NOTE: The implementation of these functions are not hardware specific
867 * which is why they are in the core module files.
869 * Naming convention --
870 * il_ <-- Is part of iwlwifi
871 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
872 * il4965_bg_ <-- Called from work queue context
873 * il4965_mac_ <-- mac80211 callback
875 ****************************************************************************/
876 extern void il4965_update_chain_flags(struct il_priv *il);
877 extern const u8 il_bcast_addr[ETH_ALEN];
878 extern int il_queue_space(const struct il_queue *q);
880 il_queue_used(const struct il_queue *q, int i)
882 return q->write_ptr >= q->read_ptr ? (i >= q->read_ptr &&
883 i < q->write_ptr) : !(i <
891 il_get_cmd_idx(struct il_queue *q, u32 idx, int is_huge)
894 * This is for init calibration result and scan command which
895 * required buffer > TFD_MAX_PAYLOAD_SIZE,
896 * the big buffer at end of command array
899 return q->n_win; /* must be power of 2 */
901 /* Otherwise, use normal size buffers */
902 return idx & (q->n_win - 1);
911 #define IL_OPERATION_MODE_AUTO 0
912 #define IL_OPERATION_MODE_HT_ONLY 1
913 #define IL_OPERATION_MODE_MIXED 2
914 #define IL_OPERATION_MODE_20MHZ 3
916 #define IL_TX_CRC_SIZE 4
917 #define IL_TX_DELIMITER_SIZE 4
919 #define TX_POWER_IL_ILLEGAL_VOLTAGE -10000
921 /* Sensitivity and chain noise calibration */
922 #define INITIALIZATION_VALUE 0xFFFF
923 #define IL4965_CAL_NUM_BEACONS 20
924 #define IL_CAL_NUM_BEACONS 16
925 #define MAXIMUM_ALLOWED_PATHLOSS 15
927 #define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
929 #define MAX_FA_OFDM 50
930 #define MIN_FA_OFDM 5
931 #define MAX_FA_CCK 50
934 #define AUTO_CORR_STEP_OFDM 1
936 #define AUTO_CORR_STEP_CCK 3
937 #define AUTO_CORR_MAX_TH_CCK 160
940 #define NRG_STEP_CCK 2
942 #define MAX_NUMBER_CCK_NO_FA 100
944 #define AUTO_CORR_CCK_MIN_VAL_DEF (125)
949 #define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
950 #define ALL_BAND_FILTER 0xFF00
951 #define IN_BAND_FILTER 0xFF
952 #define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF
954 #define NRG_NUM_PREV_STAT_L 20
955 #define NUM_RX_CHAINS 3
957 enum il4965_false_alarm_state {
960 IL_FA_GOOD_RANGE = 2,
963 enum il4965_chain_noise_state {
964 IL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */
965 IL_CHAIN_NOISE_ACCUMULATE,
966 IL_CHAIN_NOISE_CALIBRATED,
970 enum il4965_calib_enabled_state {
971 IL_CALIB_DISABLED = 0, /* must be 0 */
972 IL_CALIB_ENABLED = 1,
977 * defines the order in which results of initial calibrations
978 * should be sent to the runtime uCode
984 /* Opaque calibration results */
985 struct il_calib_result {
996 /* Sensitivity calib data */
997 struct il_sensitivity_data {
999 u32 auto_corr_ofdm_mrc;
1000 u32 auto_corr_ofdm_x1;
1001 u32 auto_corr_ofdm_mrc_x1;
1003 u32 auto_corr_cck_mrc;
1005 u32 last_bad_plcp_cnt_ofdm;
1006 u32 last_fa_cnt_ofdm;
1007 u32 last_bad_plcp_cnt_cck;
1008 u32 last_fa_cnt_cck;
1013 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
1014 u32 nrg_silence_ref;
1016 u32 nrg_silence_idx;
1018 s32 nrg_auto_corr_silence_diff;
1019 u32 num_in_cck_no_fa;
1022 u16 barker_corr_th_min;
1023 u16 barker_corr_th_min_mrc;
1027 /* Chain noise (differential Rx gain) calib data */
1028 struct il_chain_noise_data {
1037 u8 disconn_array[NUM_RX_CHAINS];
1038 u8 delta_gain_code[NUM_RX_CHAINS];
1043 #define EEPROM_SEM_TIMEOUT 10 /* milliseconds */
1044 #define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
1046 #define IL_TRAFFIC_ENTRIES (256)
1047 #define IL_TRAFFIC_ENTRY_SIZE (64)
1050 MEASUREMENT_READY = (1 << 0),
1051 MEASUREMENT_ACTIVE = (1 << 1),
1054 /* interrupt stats */
1065 u32 handlers[IL_CN_MAX];
1070 /* management stats */
1071 enum il_mgmt_stats {
1072 MANAGEMENT_ASSOC_REQ = 0,
1073 MANAGEMENT_ASSOC_RESP,
1074 MANAGEMENT_REASSOC_REQ,
1075 MANAGEMENT_REASSOC_RESP,
1076 MANAGEMENT_PROBE_REQ,
1077 MANAGEMENT_PROBE_RESP,
1080 MANAGEMENT_DISASSOC,
1087 enum il_ctrl_stats {
1088 CONTROL_BACK_REQ = 0,
1099 struct traffic_stats {
1100 #ifdef CONFIG_IWLEGACY_DEBUGFS
1101 u32 mgmt[MANAGEMENT_MAX];
1102 u32 ctrl[CONTROL_MAX];
1109 * host interrupt timeout value
1110 * used with setting interrupt coalescing timer
1111 * the CSR_INT_COALESCING is an 8 bit register in 32-usec unit
1113 * default interrupt coalescing timer is 64 x 32 = 2048 usecs
1114 * default interrupt coalescing calibration timer is 16 x 32 = 512 usecs
1116 #define IL_HOST_INT_TIMEOUT_MAX (0xFF)
1117 #define IL_HOST_INT_TIMEOUT_DEF (0x40)
1118 #define IL_HOST_INT_TIMEOUT_MIN (0x0)
1119 #define IL_HOST_INT_CALIB_TIMEOUT_MAX (0xFF)
1120 #define IL_HOST_INT_CALIB_TIMEOUT_DEF (0x10)
1121 #define IL_HOST_INT_CALIB_TIMEOUT_MIN (0x0)
1123 #define IL_DELAY_NEXT_FORCE_FW_RELOAD (HZ*5)
1125 /* TX queue watchdog timeouts in mSecs */
1126 #define IL_DEF_WD_TIMEOUT (2000)
1127 #define IL_LONG_WD_TIMEOUT (10000)
1128 #define IL_MAX_WD_TIMEOUT (120000)
1130 struct il_force_reset {
1131 int reset_request_count;
1132 int reset_success_count;
1133 int reset_reject_count;
1134 unsigned long reset_duration;
1135 unsigned long last_force_reset_jiffies;
1138 /* extend beacon time format bit shifting */
1141 * bits 31:24 - extended
1142 * bits 23:0 - interval
1144 #define IL3945_EXT_BEACON_TIME_POS 24
1147 * bits 31:22 - extended
1148 * bits 21:0 - interval
1150 #define IL4965_EXT_BEACON_TIME_POS 22
1152 struct il_rxon_context {
1153 struct ieee80211_vif *vif;
1155 const u8 *ac_to_fifo;
1156 const u8 *ac_to_queue;
1160 * We could use the vif to indicate active, but we
1161 * also need it to be active during disabling when
1162 * we already removed the vif for type setting.
1164 bool always_active, is_active;
1166 bool ht_need_multiple_chains;
1170 u32 interface_modes, exclusive_interface_modes;
1171 u8 unused_devtype, ap_devtype, ibss_devtype, station_devtype;
1174 * We declare this const so it can only be
1175 * changed via explicit cast within the
1176 * routines that actually update the physical
1179 const struct il_rxon_cmd active;
1180 struct il_rxon_cmd staging;
1182 struct il_rxon_time_cmd timing;
1184 struct il_qos_info qos_data;
1186 u8 bcast_sta_id, ap_sta_id;
1188 u8 rxon_cmd, rxon_assoc_cmd, rxon_timing_cmd;
1192 struct il_wep_key wep_keys[WEP_KEYS_MAX];
1193 u8 key_mapping_keys;
1195 __le32 station_flags;
1198 bool non_gf_sta_present;
1200 bool enabled, is_40mhz;
1201 u8 extension_chan_offset;
1205 struct il_power_mgr {
1206 struct il_powertable_cmd sleep_cmd;
1207 struct il_powertable_cmd sleep_cmd_next;
1208 int debug_sleep_level_override;
1214 /* ieee device used by generic ieee processing code */
1215 struct ieee80211_hw *hw;
1216 struct ieee80211_channel *ieee_channels;
1217 struct ieee80211_rate *ieee_rates;
1220 /* temporary frame storage list */
1221 struct list_head free_frames;
1224 enum ieee80211_band band;
1227 void (*handlers[IL_CN_MAX]) (struct il_priv *il,
1228 struct il_rx_buf *rxb);
1230 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
1232 /* spectrum measurement report caching */
1233 struct il_spectrum_notification measure_report;
1234 u8 measurement_status;
1236 /* ucode beacon time */
1237 u32 ucode_beacon_time;
1238 int missed_beacon_threshold;
1240 /* track IBSS manager (last beacon) status */
1244 struct il_force_reset force_reset;
1246 /* we allocate array of il_channel_info for NIC's valid channels.
1247 * Access via channel # using indirect idx array */
1248 struct il_channel_info *channel_info; /* channel info array */
1249 u8 channel_count; /* # of channels */
1251 /* thermal calibration */
1252 s32 temperature; /* degrees Kelvin */
1253 s32 last_temperature;
1255 /* init calibration results */
1256 struct il_calib_result calib_results[IL_CALIB_MAX];
1258 /* Scan related variables */
1259 unsigned long scan_start;
1260 unsigned long scan_start_tsf;
1262 enum ieee80211_band scan_band;
1263 struct cfg80211_scan_request *scan_request;
1264 struct ieee80211_vif *scan_vif;
1265 u8 scan_tx_ant[IEEE80211_NUM_BANDS];
1269 spinlock_t lock; /* protect general shared data */
1270 spinlock_t hcmd_lock; /* protect hcmd */
1271 spinlock_t reg_lock; /* protect hw register access */
1274 /* basic pci-network driver stuff */
1275 struct pci_dev *pci_dev;
1277 /* pci hardware address support */
1278 void __iomem *hw_base;
1283 /* command queue number */
1286 /* max number of station keys */
1289 /* EEPROM MAC addresses */
1290 struct mac_address addresses[1];
1292 /* uCode images, save to reload in case of failure */
1293 int fw_idx; /* firmware we're trying to load */
1294 u32 ucode_ver; /* version of ucode, copy of
1296 struct fw_desc ucode_code; /* runtime inst */
1297 struct fw_desc ucode_data; /* runtime data original */
1298 struct fw_desc ucode_data_backup; /* runtime data save/restore */
1299 struct fw_desc ucode_init; /* initialization inst */
1300 struct fw_desc ucode_init_data; /* initialization data */
1301 struct fw_desc ucode_boot; /* bootstrap inst */
1302 enum ucode_type ucode_type;
1303 u8 ucode_write_complete; /* the image write is complete */
1304 char firmware_name[25];
1306 struct il_rxon_context ctx;
1308 __le16 switch_channel;
1310 /* 1st responses from initialize and runtime uCode images.
1311 * _4965's initialize alive response contains some calibration data. */
1312 struct il_init_alive_resp card_alive_init;
1313 struct il_alive_resp card_alive;
1318 struct il_sensitivity_data sensitivity_data;
1319 struct il_chain_noise_data chain_noise_data;
1320 __le16 sensitivity_tbl[HD_TBL_SIZE];
1322 struct il_ht_config current_ht_config;
1324 /* Rate scaling data */
1327 wait_queue_head_t wait_command_queue;
1329 int activity_timer_active;
1331 /* Rx and Tx DMA processing queues */
1332 struct il_rx_queue rxq;
1333 struct il_tx_queue *txq;
1334 unsigned long txq_ctx_active_msk;
1335 struct il_dma_ptr kw; /* keep warm address */
1336 struct il_dma_ptr scd_bc_tbls;
1338 u32 scd_base_addr; /* scheduler sram base address */
1340 unsigned long status;
1342 /* counts mgmt, ctl, and data packets */
1343 struct traffic_stats tx_stats;
1344 struct traffic_stats rx_stats;
1346 /* counts interrupts */
1347 struct isr_stats isr_stats;
1349 struct il_power_mgr power_data;
1351 /* context information */
1352 u8 bssid[ETH_ALEN]; /* used only on 3945 but filled by core */
1354 /* station table variables */
1356 /* Note: if lock and sta_lock are needed, lock must be acquired first */
1357 spinlock_t sta_lock;
1359 struct il_station_entry stations[IL_STATION_COUNT];
1360 unsigned long ucode_key_table;
1362 /* queue refcounts */
1363 #define IL_MAX_HW_QUEUES 32
1364 unsigned long queue_stopped[BITS_TO_LONGS(IL_MAX_HW_QUEUES)];
1366 atomic_t queue_stop_count[4];
1368 /* Indication if ieee80211_ops->open has been called */
1371 u8 mac80211_registered;
1373 /* eeprom -- this is in the card's little endian byte order */
1375 struct il_eeprom_calib_info *calib_info;
1377 enum nl80211_iftype iw_mode;
1379 /* Last Rx'd beacon timestamp */
1383 #if defined(CONFIG_IWL3945) || defined(CONFIG_IWL3945_MODULE)
1386 dma_addr_t shared_phys;
1388 struct delayed_work thermal_periodic;
1389 struct delayed_work rfkill_poll;
1391 struct il3945_notif_stats stats;
1392 #ifdef CONFIG_IWLEGACY_DEBUGFS
1393 struct il3945_notif_stats accum_stats;
1394 struct il3945_notif_stats delta_stats;
1395 struct il3945_notif_stats max_delta;
1399 int last_rx_rssi; /* From Rx packet stats */
1401 /* Rx'd packet timing information */
1402 u32 last_beacon_time;
1406 * each calibration channel group in the
1407 * EEPROM has a derived clip setting for
1410 const struct il3945_clip_group clip_groups[5];
1414 #if defined(CONFIG_IWL4965) || defined(CONFIG_IWL4965_MODULE)
1416 struct il_rx_phy_res last_phy_res;
1417 bool last_phy_res_valid;
1419 struct completion firmware_loading_complete;
1422 * chain noise reset and gain commands are the
1423 * two extra calibration commands follows the standard
1424 * phy calibration commands
1426 u8 phy_calib_chain_noise_reset_cmd;
1427 u8 phy_calib_chain_noise_gain_cmd;
1429 struct il_notif_stats stats;
1430 #ifdef CONFIG_IWLEGACY_DEBUGFS
1431 struct il_notif_stats accum_stats;
1432 struct il_notif_stats delta_stats;
1433 struct il_notif_stats max_delta;
1440 struct il_hw_params hw_params;
1444 struct workqueue_struct *workqueue;
1446 struct work_struct restart;
1447 struct work_struct scan_completed;
1448 struct work_struct rx_replenish;
1449 struct work_struct abort_scan;
1451 struct il_rxon_context *beacon_ctx;
1452 struct sk_buff *beacon_skb;
1454 struct work_struct tx_flush;
1456 struct tasklet_struct irq_tasklet;
1458 struct delayed_work init_alive_start;
1459 struct delayed_work alive_start;
1460 struct delayed_work scan_check;
1463 s8 tx_power_user_lmt;
1464 s8 tx_power_device_lmt;
1467 #ifdef CONFIG_IWLEGACY_DEBUG
1468 /* debugging info */
1469 u32 debug_level; /* per device debugging will override global
1470 il_debug_level if set */
1471 #endif /* CONFIG_IWLEGACY_DEBUG */
1472 #ifdef CONFIG_IWLEGACY_DEBUGFS
1478 struct dentry *debugfs_dir;
1479 u32 dbgfs_sram_offset, dbgfs_sram_len;
1481 #endif /* CONFIG_IWLEGACY_DEBUGFS */
1483 struct work_struct txpower_work;
1484 u32 disable_sens_cal;
1485 u32 disable_chain_noise_cal;
1486 u32 disable_tx_power_cal;
1487 struct work_struct run_time_calib_work;
1488 struct timer_list stats_periodic;
1489 struct timer_list watchdog;
1492 struct led_classdev led;
1493 unsigned long blink_on, blink_off;
1494 bool led_registered;
1498 il_txq_ctx_activate(struct il_priv *il, int txq_id)
1500 set_bit(txq_id, &il->txq_ctx_active_msk);
1504 il_txq_ctx_deactivate(struct il_priv *il, int txq_id)
1506 clear_bit(txq_id, &il->txq_ctx_active_msk);
1509 static inline struct ieee80211_hdr *
1510 il_tx_queue_get_hdr(struct il_priv *il, int txq_id, int idx)
1512 if (il->txq[txq_id].txb[idx].skb)
1513 return (struct ieee80211_hdr *)il->txq[txq_id].txb[idx].skb->
1518 static inline struct il_rxon_context *
1519 il_rxon_ctx_from_vif(struct ieee80211_vif *vif)
1521 struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
1523 return vif_priv->ctx;
1526 #define for_each_context(il, _ctx) \
1527 for (_ctx = &il->ctx; _ctx == &il->ctx; _ctx++)
1530 il_is_associated(struct il_priv *il)
1532 return (il->ctx.active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1536 il_is_any_associated(struct il_priv *il)
1538 return il_is_associated(il);
1542 il_is_associated_ctx(struct il_rxon_context *ctx)
1544 return (ctx->active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1548 il_is_channel_valid(const struct il_channel_info *ch_info)
1550 if (ch_info == NULL)
1552 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
1556 il_is_channel_radar(const struct il_channel_info *ch_info)
1558 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
1562 il_is_channel_a_band(const struct il_channel_info *ch_info)
1564 return ch_info->band == IEEE80211_BAND_5GHZ;
1568 il_is_channel_passive(const struct il_channel_info *ch)
1570 return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
1574 il_is_channel_ibss(const struct il_channel_info *ch)
1576 return (ch->flags & EEPROM_CHANNEL_IBSS) ? 1 : 0;
1580 __il_free_pages(struct il_priv *il, struct page *page)
1582 __free_pages(page, il->hw_params.rx_page_order);
1583 il->alloc_rxb_page--;
1587 il_free_pages(struct il_priv *il, unsigned long page)
1589 free_pages(page, il->hw_params.rx_page_order);
1590 il->alloc_rxb_page--;
1593 #define IWLWIFI_VERSION "in-tree:"
1594 #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
1595 #define DRV_AUTHOR "<ilw@linux.intel.com>"
1597 #define IL_PCI_DEVICE(dev, subdev, cfg) \
1598 .vendor = PCI_VENDOR_ID_INTEL, .device = (dev), \
1599 .subvendor = PCI_ANY_ID, .subdevice = (subdev), \
1600 .driver_data = (kernel_ulong_t)&(cfg)
1602 #define TIME_UNIT 1024
1604 #define IL_SKU_G 0x1
1605 #define IL_SKU_A 0x2
1606 #define IL_SKU_N 0x8
1608 #define IL_CMD(x) case x: return #x
1610 /* Size of one Rx buffer in host DRAM */
1611 #define IL_RX_BUF_SIZE_3K (3 * 1000) /* 3945 only */
1612 #define IL_RX_BUF_SIZE_4K (4 * 1024)
1613 #define IL_RX_BUF_SIZE_8K (8 * 1024)
1615 struct il_hcmd_ops {
1616 int (*rxon_assoc) (struct il_priv *il, struct il_rxon_context *ctx);
1617 int (*commit_rxon) (struct il_priv *il, struct il_rxon_context *ctx);
1618 void (*set_rxon_chain) (struct il_priv *il,
1619 struct il_rxon_context *ctx);
1622 struct il_hcmd_utils_ops {
1623 u16(*get_hcmd_size) (u8 cmd_id, u16 len);
1624 u16(*build_addsta_hcmd) (const struct il_addsta_cmd *cmd, u8 *data);
1625 int (*request_scan) (struct il_priv *il, struct ieee80211_vif *vif);
1626 void (*post_scan) (struct il_priv *il);
1630 int (*init) (struct il_priv *il);
1631 void (*config) (struct il_priv *il);
1634 struct il_debugfs_ops {
1635 ssize_t(*rx_stats_read) (struct file *file, char __user *user_buf,
1636 size_t count, loff_t *ppos);
1637 ssize_t(*tx_stats_read) (struct file *file, char __user *user_buf,
1638 size_t count, loff_t *ppos);
1639 ssize_t(*general_stats_read) (struct file *file,
1640 char __user *user_buf, size_t count,
1644 struct il_temp_ops {
1645 void (*temperature) (struct il_priv *il);
1649 /* set hw dependent parameters */
1650 int (*set_hw_params) (struct il_priv *il);
1652 void (*txq_update_byte_cnt_tbl) (struct il_priv *il,
1653 struct il_tx_queue *txq,
1655 int (*txq_attach_buf_to_tfd) (struct il_priv *il,
1656 struct il_tx_queue *txq, dma_addr_t addr,
1657 u16 len, u8 reset, u8 pad);
1658 void (*txq_free_tfd) (struct il_priv *il, struct il_tx_queue *txq);
1659 int (*txq_init) (struct il_priv *il, struct il_tx_queue *txq);
1660 /* setup Rx handler */
1661 void (*handler_setup) (struct il_priv *il);
1662 /* alive notification after init uCode load */
1663 void (*init_alive_start) (struct il_priv *il);
1664 /* check validity of rtc data address */
1665 int (*is_valid_rtc_data_addr) (u32 addr);
1666 /* 1st ucode load */
1667 int (*load_ucode) (struct il_priv *il);
1669 void (*dump_nic_error_log) (struct il_priv *il);
1670 int (*dump_fh) (struct il_priv *il, char **buf, bool display);
1671 int (*set_channel_switch) (struct il_priv *il,
1672 struct ieee80211_channel_switch *ch_switch);
1673 /* power management */
1674 struct il_apm_ops apm_ops;
1677 int (*send_tx_power) (struct il_priv *il);
1678 void (*update_chain_flags) (struct il_priv *il);
1680 /* eeprom operations */
1681 struct il_eeprom_ops eeprom_ops;
1684 struct il_temp_ops temp_ops;
1686 struct il_debugfs_ops debugfs_ops;
1691 int (*cmd) (struct il_priv *il, struct il_led_cmd *led_cmd);
1694 struct il_legacy_ops {
1695 void (*post_associate) (struct il_priv *il);
1696 void (*config_ap) (struct il_priv *il);
1697 /* station management */
1698 int (*update_bcast_stations) (struct il_priv *il);
1699 int (*manage_ibss_station) (struct il_priv *il,
1700 struct ieee80211_vif *vif, bool add);
1704 const struct il_lib_ops *lib;
1705 const struct il_hcmd_ops *hcmd;
1706 const struct il_hcmd_utils_ops *utils;
1707 const struct il_led_ops *led;
1708 const struct il_nic_ops *nic;
1709 const struct il_legacy_ops *legacy;
1710 const struct ieee80211_ops *ieee80211_ops;
1713 struct il_mod_params {
1714 int sw_crypto; /* def: 0 = using hardware encryption */
1715 int disable_hw_scan; /* def: 0 = use h/w scan */
1716 int num_of_queues; /* def: HW dependent */
1717 int disable_11n; /* def: 0 = 11n capabilities enabled */
1718 int amsdu_size_8K; /* def: 1 = enable 8K amsdu size */
1719 int antenna; /* def: 0 = both antennas (use diversity) */
1720 int restart_fw; /* def: 1 = restart firmware */
1724 * @led_compensation: compensate on the led on/off time per HW according
1725 * to the deviation to achieve the desired led frequency.
1726 * The detail algorithm is described in common.c
1727 * @chain_noise_num_beacons: number of beacons used to compute chain noise
1728 * @wd_timeout: TX queues watchdog timeout
1729 * @temperature_kelvin: temperature report by uCode in kelvin
1730 * @ucode_tracing: support ucode continuous tracing
1731 * @sensitivity_calib_by_driver: driver has the capability to perform
1732 * sensitivity calibration operation
1733 * @chain_noise_calib_by_driver: driver has the capability to perform
1734 * chain noise calibration operation
1736 struct il_base_params {
1738 int num_of_queues; /* def: HW dependent */
1739 int num_of_ampdu_queues; /* def: HW dependent */
1740 /* for il_apm_init() */
1745 u16 led_compensation;
1746 int chain_noise_num_beacons;
1747 unsigned int wd_timeout;
1748 bool temperature_kelvin;
1749 const bool ucode_tracing;
1750 const bool sensitivity_calib_by_driver;
1751 const bool chain_noise_calib_by_driver;
1754 #define IL_LED_SOLID 11
1755 #define IL_DEF_LED_INTRVL cpu_to_le32(1000)
1757 #define IL_LED_ACTIVITY (0<<1)
1758 #define IL_LED_LINK (1<<1)
1762 * IL_LED_DEFAULT: use device default
1763 * IL_LED_RF_STATE: turn LED on/off based on RF state
1766 * IL_LED_BLINK: adjust led blink rate based on blink table
1774 void il_leds_init(struct il_priv *il);
1775 void il_leds_exit(struct il_priv *il);
1779 * @fw_name_pre: Firmware filename prefix. The api version and extension
1780 * (.ucode) will be added to filename before loading from disk. The
1781 * filename is constructed as fw_name_pre<api>.ucode.
1782 * @ucode_api_max: Highest version of uCode API supported by driver.
1783 * @ucode_api_min: Lowest version of uCode API supported by driver.
1784 * @scan_antennas: available antenna for scan operation
1785 * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off)
1787 * We enable the driver to be backward compatible wrt API version. The
1788 * driver specifies which APIs it supports (with @ucode_api_max being the
1789 * highest and @ucode_api_min the lowest). Firmware will only be loaded if
1790 * it has a supported API version. The firmware's API version will be
1791 * stored in @il_priv, enabling the driver to make runtime changes based
1792 * on firmware version used.
1795 * if (IL_UCODE_API(il->ucode_ver) >= 2) {
1796 * Driver interacts with Firmware API version >= 2.
1798 * Driver interacts with Firmware API version 1.
1801 * The ideal usage of this infrastructure is to treat a new ucode API
1802 * release as a new hardware revision. That is, through utilizing the
1803 * il_hcmd_utils_ops etc. we accommodate different command structures
1804 * and flows between hardware versions as well as their API
1809 /* params specific to an individual device within a device family */
1811 const char *fw_name_pre;
1812 const unsigned int ucode_api_max;
1813 const unsigned int ucode_api_min;
1818 u16 eeprom_calib_ver;
1819 const struct il_ops *ops;
1820 /* module based parameters which can be set from modprobe cmd */
1821 const struct il_mod_params *mod_params;
1822 /* params not likely to change within a device family */
1823 struct il_base_params *base_params;
1824 /* params likely to change within a device family */
1825 u8 scan_rx_antennas[IEEE80211_NUM_BANDS];
1826 enum il_led_mode led_mode;
1829 /***************************
1831 ***************************/
1833 struct ieee80211_hw *il_alloc_all(struct il_cfg *cfg);
1834 int il_mac_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1835 u16 queue, const struct ieee80211_tx_queue_params *params);
1836 int il_mac_tx_last_beacon(struct ieee80211_hw *hw);
1838 void il_set_rxon_hwcrypto(struct il_priv *il, struct il_rxon_context *ctx,
1840 int il_check_rxon_cmd(struct il_priv *il, struct il_rxon_context *ctx);
1841 int il_full_rxon_required(struct il_priv *il, struct il_rxon_context *ctx);
1842 int il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch,
1843 struct il_rxon_context *ctx);
1844 void il_set_flags_for_band(struct il_priv *il, struct il_rxon_context *ctx,
1845 enum ieee80211_band band, struct ieee80211_vif *vif);
1846 u8 il_get_single_channel_number(struct il_priv *il, enum ieee80211_band band);
1847 void il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf);
1848 bool il_is_ht40_tx_allowed(struct il_priv *il, struct il_rxon_context *ctx,
1849 struct ieee80211_sta_ht_cap *ht_cap);
1850 void il_connection_init_rx_config(struct il_priv *il,
1851 struct il_rxon_context *ctx);
1852 void il_set_rate(struct il_priv *il);
1853 int il_set_decrypted_flag(struct il_priv *il, struct ieee80211_hdr *hdr,
1854 u32 decrypt_res, struct ieee80211_rx_status *stats);
1855 void il_irq_handle_error(struct il_priv *il);
1856 int il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
1857 void il_mac_remove_interface(struct ieee80211_hw *hw,
1858 struct ieee80211_vif *vif);
1859 int il_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1860 enum nl80211_iftype newtype, bool newp2p);
1861 int il_alloc_txq_mem(struct il_priv *il);
1862 void il_txq_mem(struct il_priv *il);
1864 #ifdef CONFIG_IWLEGACY_DEBUGFS
1865 int il_alloc_traffic_mem(struct il_priv *il);
1866 void il_free_traffic_mem(struct il_priv *il);
1867 void il_reset_traffic_log(struct il_priv *il);
1868 void il_dbg_log_tx_data_frame(struct il_priv *il, u16 length,
1869 struct ieee80211_hdr *header);
1870 void il_dbg_log_rx_data_frame(struct il_priv *il, u16 length,
1871 struct ieee80211_hdr *header);
1872 const char *il_get_mgmt_string(int cmd);
1873 const char *il_get_ctrl_string(int cmd);
1874 void il_clear_traffic_stats(struct il_priv *il);
1875 void il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len);
1878 il_alloc_traffic_mem(struct il_priv *il)
1884 il_free_traffic_mem(struct il_priv *il)
1889 il_reset_traffic_log(struct il_priv *il)
1894 il_dbg_log_tx_data_frame(struct il_priv *il, u16 length,
1895 struct ieee80211_hdr *header)
1900 il_dbg_log_rx_data_frame(struct il_priv *il, u16 length,
1901 struct ieee80211_hdr *header)
1906 il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len)
1910 /*****************************************************
1912 * **************************************************/
1913 void il_hdl_pm_sleep(struct il_priv *il, struct il_rx_buf *rxb);
1914 void il_hdl_pm_debug_stats(struct il_priv *il, struct il_rx_buf *rxb);
1915 void il_hdl_error(struct il_priv *il, struct il_rx_buf *rxb);
1917 /*****************************************************
1919 ******************************************************/
1920 void il_cmd_queue_unmap(struct il_priv *il);
1921 void il_cmd_queue_free(struct il_priv *il);
1922 int il_rx_queue_alloc(struct il_priv *il);
1923 void il_rx_queue_update_write_ptr(struct il_priv *il, struct il_rx_queue *q);
1924 int il_rx_queue_space(const struct il_rx_queue *q);
1925 void il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb);
1927 void il_hdl_spectrum_measurement(struct il_priv *il, struct il_rx_buf *rxb);
1928 void il_recover_from_stats(struct il_priv *il, struct il_rx_pkt *pkt);
1929 void il_chswitch_done(struct il_priv *il, bool is_success);
1930 void il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb);
1934 /*****************************************************
1936 ******************************************************/
1937 void il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq);
1938 int il_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq, int slots_num,
1940 void il_tx_queue_reset(struct il_priv *il, struct il_tx_queue *txq,
1941 int slots_num, u32 txq_id);
1942 void il_tx_queue_unmap(struct il_priv *il, int txq_id);
1943 void il_tx_queue_free(struct il_priv *il, int txq_id);
1944 void il_setup_watchdog(struct il_priv *il);
1945 /*****************************************************
1947 ****************************************************/
1948 int il_set_tx_power(struct il_priv *il, s8 tx_power, bool force);
1950 /*******************************************************************************
1952 ******************************************************************************/
1954 u8 il_get_lowest_plcp(struct il_priv *il, struct il_rxon_context *ctx);
1956 /*******************************************************************************
1958 ******************************************************************************/
1959 void il_init_scan_params(struct il_priv *il);
1960 int il_scan_cancel(struct il_priv *il);
1961 int il_scan_cancel_timeout(struct il_priv *il, unsigned long ms);
1962 void il_force_scan_end(struct il_priv *il);
1963 int il_mac_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1964 struct cfg80211_scan_request *req);
1965 void il_internal_short_hw_scan(struct il_priv *il);
1966 int il_force_reset(struct il_priv *il, bool external);
1967 u16 il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame,
1968 const u8 *ta, const u8 *ie, int ie_len, int left);
1969 void il_setup_rx_scan_handlers(struct il_priv *il);
1970 u16 il_get_active_dwell_time(struct il_priv *il, enum ieee80211_band band,
1972 u16 il_get_passive_dwell_time(struct il_priv *il, enum ieee80211_band band,
1973 struct ieee80211_vif *vif);
1974 void il_setup_scan_deferred_work(struct il_priv *il);
1975 void il_cancel_scan_deferred_work(struct il_priv *il);
1977 /* For faster active scanning, scan will move to the next channel if fewer than
1978 * PLCP_QUIET_THRESH packets are heard on this channel within
1979 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
1980 * time if it's a quiet channel (nothing responded to our probe, and there's
1981 * no other traffic).
1982 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
1983 #define IL_ACTIVE_QUIET_TIME cpu_to_le16(10) /* msec */
1984 #define IL_PLCP_QUIET_THRESH cpu_to_le16(1) /* packets */
1986 #define IL_SCAN_CHECK_WATCHDOG (HZ * 7)
1988 /*****************************************************
1989 * S e n d i n g H o s t C o m m a n d s *
1990 *****************************************************/
1992 const char *il_get_cmd_string(u8 cmd);
1993 int __must_check il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd);
1994 int il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd);
1995 int __must_check il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len,
1997 int il_send_cmd_pdu_async(struct il_priv *il, u8 id, u16 len, const void *data,
1998 void (*callback) (struct il_priv *il,
1999 struct il_device_cmd *cmd,
2000 struct il_rx_pkt *pkt));
2002 int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd);
2004 /*****************************************************
2006 *****************************************************/
2009 il_pcie_link_ctl(struct il_priv *il)
2013 pos = pci_pcie_cap(il->pci_dev);
2014 pci_read_config_word(il->pci_dev, pos + PCI_EXP_LNKCTL, &pci_lnk_ctl);
2018 void il_bg_watchdog(unsigned long data);
2019 u32 il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval);
2020 __le32 il_add_beacon_time(struct il_priv *il, u32 base, u32 addon,
2021 u32 beacon_interval);
2024 int il_pci_suspend(struct device *device);
2025 int il_pci_resume(struct device *device);
2026 extern const struct dev_pm_ops il_pm_ops;
2028 #define IL_LEGACY_PM_OPS (&il_pm_ops)
2030 #else /* !CONFIG_PM */
2032 #define IL_LEGACY_PM_OPS NULL
2034 #endif /* !CONFIG_PM */
2036 /*****************************************************
2037 * Error Handling Debugging
2038 ******************************************************/
2039 void il4965_dump_nic_error_log(struct il_priv *il);
2040 #ifdef CONFIG_IWLEGACY_DEBUG
2041 void il_print_rx_config_cmd(struct il_priv *il, struct il_rxon_context *ctx);
2044 il_print_rx_config_cmd(struct il_priv *il, struct il_rxon_context *ctx)
2049 void il_clear_isr_stats(struct il_priv *il);
2051 /*****************************************************
2053 ******************************************************/
2054 int il_init_geos(struct il_priv *il);
2055 void il_free_geos(struct il_priv *il);
2057 /*************** DRIVER STATUS FUNCTIONS *****/
2059 #define S_HCMD_ACTIVE 0 /* host command in progress */
2060 /* 1 is unused (used to be S_HCMD_SYNC_ACTIVE) */
2061 #define S_INT_ENABLED 2
2062 #define S_RF_KILL_HW 3
2067 #define S_TEMPERATURE 8
2068 #define S_GEO_CONFIGURED 9
2069 #define S_EXIT_PENDING 10
2071 #define S_SCANNING 13
2072 #define S_SCAN_ABORTING 14
2073 #define S_SCAN_HW 15
2074 #define S_POWER_PMI 16
2075 #define S_FW_ERROR 17
2076 #define S_CHANNEL_SWITCH_PENDING 18
2079 il_is_ready(struct il_priv *il)
2081 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
2082 * set but EXIT_PENDING is not */
2083 return test_bit(S_READY, &il->status) &&
2084 test_bit(S_GEO_CONFIGURED, &il->status) &&
2085 !test_bit(S_EXIT_PENDING, &il->status);
2089 il_is_alive(struct il_priv *il)
2091 return test_bit(S_ALIVE, &il->status);
2095 il_is_init(struct il_priv *il)
2097 return test_bit(S_INIT, &il->status);
2101 il_is_rfkill_hw(struct il_priv *il)
2103 return test_bit(S_RF_KILL_HW, &il->status);
2107 il_is_rfkill(struct il_priv *il)
2109 return il_is_rfkill_hw(il);
2113 il_is_ctkill(struct il_priv *il)
2115 return test_bit(S_CT_KILL, &il->status);
2119 il_is_ready_rf(struct il_priv *il)
2122 if (il_is_rfkill(il))
2125 return il_is_ready(il);
2128 extern void il_send_bt_config(struct il_priv *il);
2129 extern int il_send_stats_request(struct il_priv *il, u8 flags, bool clear);
2130 void il_apm_stop(struct il_priv *il);
2131 int il_apm_init(struct il_priv *il);
2133 int il_send_rxon_timing(struct il_priv *il, struct il_rxon_context *ctx);
2135 il_send_rxon_assoc(struct il_priv *il, struct il_rxon_context *ctx)
2137 return il->cfg->ops->hcmd->rxon_assoc(il, ctx);
2141 il_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx)
2143 return il->cfg->ops->hcmd->commit_rxon(il, ctx);
2146 static inline const struct ieee80211_supported_band *
2147 il_get_hw_mode(struct il_priv *il, enum ieee80211_band band)
2149 return il->hw->wiphy->bands[band];
2152 /* mac80211 handlers */
2153 int il_mac_config(struct ieee80211_hw *hw, u32 changed);
2154 void il_mac_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
2155 void il_mac_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2156 struct ieee80211_bss_conf *bss_conf, u32 changes);
2157 void il_tx_cmd_protection(struct il_priv *il, struct ieee80211_tx_info *info,
2158 __le16 fc, __le32 *tx_flags);
2160 irqreturn_t il_isr(int irq, void *data);
2162 #include <linux/io.h>
2165 _il_write8(struct il_priv *il, u32 ofs, u8 val)
2167 iowrite8(val, il->hw_base + ofs);
2169 #define il_write8(il, ofs, val) _il_write8(il, ofs, val)
2172 _il_wr(struct il_priv *il, u32 ofs, u32 val)
2174 iowrite32(val, il->hw_base + ofs);
2178 _il_rd(struct il_priv *il, u32 ofs)
2180 return ioread32(il->hw_base + ofs);
2183 #define IL_POLL_INTERVAL 10 /* microseconds */
2185 _il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout)
2190 if ((_il_rd(il, addr) & mask) == (bits & mask))
2192 udelay(IL_POLL_INTERVAL);
2193 t += IL_POLL_INTERVAL;
2194 } while (t < timeout);
2200 _il_set_bit(struct il_priv *il, u32 reg, u32 mask)
2202 _il_wr(il, reg, _il_rd(il, reg) | mask);
2206 il_set_bit(struct il_priv *p, u32 r, u32 m)
2208 unsigned long reg_flags;
2210 spin_lock_irqsave(&p->reg_lock, reg_flags);
2211 _il_set_bit(p, r, m);
2212 spin_unlock_irqrestore(&p->reg_lock, reg_flags);
2216 _il_clear_bit(struct il_priv *il, u32 reg, u32 mask)
2218 _il_wr(il, reg, _il_rd(il, reg) & ~mask);
2222 il_clear_bit(struct il_priv *p, u32 r, u32 m)
2224 unsigned long reg_flags;
2226 spin_lock_irqsave(&p->reg_lock, reg_flags);
2227 _il_clear_bit(p, r, m);
2228 spin_unlock_irqrestore(&p->reg_lock, reg_flags);
2232 _il_grab_nic_access(struct il_priv *il)
2237 /* this bit wakes up the NIC */
2238 _il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2241 * These bits say the device is running, and should keep running for
2242 * at least a short while (at least as long as MAC_ACCESS_REQ stays 1),
2243 * but they do not indicate that embedded SRAM is restored yet;
2244 * 3945 and 4965 have volatile SRAM, and must save/restore contents
2245 * to/from host DRAM when sleeping/waking for power-saving.
2246 * Each direction takes approximately 1/4 millisecond; with this
2247 * overhead, it's a good idea to grab and hold MAC_ACCESS_REQUEST if a
2248 * series of register accesses are expected (e.g. reading Event Log),
2249 * to keep device from sleeping.
2251 * CSR_UCODE_DRV_GP1 register bit MAC_SLEEP == 0 indicates that
2252 * SRAM is okay/restored. We don't check that here because this call
2253 * is just for hardware register access; but GP1 MAC_SLEEP check is a
2254 * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log).
2258 _il_poll_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
2259 (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
2260 CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000);
2262 val = _il_rd(il, CSR_GP_CNTRL);
2263 IL_ERR("MAC is in deep sleep!. CSR_GP_CNTRL = 0x%08X\n", val);
2264 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI);
2272 _il_release_nic_access(struct il_priv *il)
2274 _il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2278 il_rd(struct il_priv *il, u32 reg)
2281 unsigned long reg_flags;
2283 spin_lock_irqsave(&il->reg_lock, reg_flags);
2284 _il_grab_nic_access(il);
2285 value = _il_rd(il, reg);
2286 _il_release_nic_access(il);
2287 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2293 il_wr(struct il_priv *il, u32 reg, u32 value)
2295 unsigned long reg_flags;
2297 spin_lock_irqsave(&il->reg_lock, reg_flags);
2298 if (!_il_grab_nic_access(il)) {
2299 _il_wr(il, reg, value);
2300 _il_release_nic_access(il);
2302 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2306 il_write_reg_buf(struct il_priv *il, u32 reg, u32 len, u32 * values)
2308 u32 count = sizeof(u32);
2310 if (il != NULL && values != NULL) {
2311 for (; 0 < len; len -= count, reg += count, values++)
2312 il_wr(il, reg, *values);
2317 il_poll_bit(struct il_priv *il, u32 addr, u32 mask, int timeout)
2322 if ((il_rd(il, addr) & mask) == mask)
2324 udelay(IL_POLL_INTERVAL);
2325 t += IL_POLL_INTERVAL;
2326 } while (t < timeout);
2332 _il_rd_prph(struct il_priv *il, u32 reg)
2334 _il_wr(il, HBUS_TARG_PRPH_RADDR, reg | (3 << 24));
2336 return _il_rd(il, HBUS_TARG_PRPH_RDAT);
2340 il_rd_prph(struct il_priv *il, u32 reg)
2342 unsigned long reg_flags;
2345 spin_lock_irqsave(&il->reg_lock, reg_flags);
2346 _il_grab_nic_access(il);
2347 val = _il_rd_prph(il, reg);
2348 _il_release_nic_access(il);
2349 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2354 _il_wr_prph(struct il_priv *il, u32 addr, u32 val)
2356 _il_wr(il, HBUS_TARG_PRPH_WADDR, ((addr & 0x0000FFFF) | (3 << 24)));
2358 _il_wr(il, HBUS_TARG_PRPH_WDAT, val);
2362 il_wr_prph(struct il_priv *il, u32 addr, u32 val)
2364 unsigned long reg_flags;
2366 spin_lock_irqsave(&il->reg_lock, reg_flags);
2367 if (!_il_grab_nic_access(il)) {
2368 _il_wr_prph(il, addr, val);
2369 _il_release_nic_access(il);
2371 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2374 #define _il_set_bits_prph(il, reg, mask) \
2375 _il_wr_prph(il, reg, (_il_rd_prph(il, reg) | mask))
2378 il_set_bits_prph(struct il_priv *il, u32 reg, u32 mask)
2380 unsigned long reg_flags;
2382 spin_lock_irqsave(&il->reg_lock, reg_flags);
2383 _il_grab_nic_access(il);
2384 _il_set_bits_prph(il, reg, mask);
2385 _il_release_nic_access(il);
2386 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2389 #define _il_set_bits_mask_prph(il, reg, bits, mask) \
2390 _il_wr_prph(il, reg, \
2391 ((_il_rd_prph(il, reg) & mask) | bits))
2394 il_set_bits_mask_prph(struct il_priv *il, u32 reg, u32 bits, u32 mask)
2396 unsigned long reg_flags;
2398 spin_lock_irqsave(&il->reg_lock, reg_flags);
2399 _il_grab_nic_access(il);
2400 _il_set_bits_mask_prph(il, reg, bits, mask);
2401 _il_release_nic_access(il);
2402 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2406 il_clear_bits_prph(struct il_priv *il, u32 reg, u32 mask)
2408 unsigned long reg_flags;
2411 spin_lock_irqsave(&il->reg_lock, reg_flags);
2412 _il_grab_nic_access(il);
2413 val = _il_rd_prph(il, reg);
2414 _il_wr_prph(il, reg, (val & ~mask));
2415 _il_release_nic_access(il);
2416 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2420 il_read_targ_mem(struct il_priv *il, u32 addr)
2422 unsigned long reg_flags;
2425 spin_lock_irqsave(&il->reg_lock, reg_flags);
2426 _il_grab_nic_access(il);
2428 _il_wr(il, HBUS_TARG_MEM_RADDR, addr);
2430 value = _il_rd(il, HBUS_TARG_MEM_RDAT);
2432 _il_release_nic_access(il);
2433 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2438 il_write_targ_mem(struct il_priv *il, u32 addr, u32 val)
2440 unsigned long reg_flags;
2442 spin_lock_irqsave(&il->reg_lock, reg_flags);
2443 if (!_il_grab_nic_access(il)) {
2444 _il_wr(il, HBUS_TARG_MEM_WADDR, addr);
2446 _il_wr(il, HBUS_TARG_MEM_WDAT, val);
2447 _il_release_nic_access(il);
2449 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2453 il_write_targ_mem_buf(struct il_priv *il, u32 addr, u32 len, u32 * values)
2455 unsigned long reg_flags;
2457 spin_lock_irqsave(&il->reg_lock, reg_flags);
2458 if (!_il_grab_nic_access(il)) {
2459 _il_wr(il, HBUS_TARG_MEM_WADDR, addr);
2461 for (; 0 < len; len -= sizeof(u32), values++)
2462 _il_wr(il, HBUS_TARG_MEM_WDAT, *values);
2464 _il_release_nic_access(il);
2466 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2469 #define HW_KEY_DYNAMIC 0
2470 #define HW_KEY_DEFAULT 1
2472 #define IL_STA_DRIVER_ACTIVE BIT(0) /* driver entry is active */
2473 #define IL_STA_UCODE_ACTIVE BIT(1) /* ucode entry is active */
2474 #define IL_STA_UCODE_INPROGRESS BIT(2) /* ucode entry is in process of
2476 #define IL_STA_LOCAL BIT(3) /* station state not directed by mac80211;
2477 (this is for the IBSS BSSID stations) */
2478 #define IL_STA_BCAST BIT(4) /* this station is the special bcast station */
2480 void il_restore_stations(struct il_priv *il, struct il_rxon_context *ctx);
2481 void il_clear_ucode_stations(struct il_priv *il, struct il_rxon_context *ctx);
2482 void il_dealloc_bcast_stations(struct il_priv *il);
2483 int il_get_free_ucode_key_idx(struct il_priv *il);
2484 int il_send_add_sta(struct il_priv *il, struct il_addsta_cmd *sta, u8 flags);
2485 int il_add_station_common(struct il_priv *il, struct il_rxon_context *ctx,
2486 const u8 *addr, bool is_ap,
2487 struct ieee80211_sta *sta, u8 *sta_id_r);
2488 int il_remove_station(struct il_priv *il, const u8 sta_id, const u8 * addr);
2489 int il_mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2490 struct ieee80211_sta *sta);
2492 u8 il_prep_station(struct il_priv *il, struct il_rxon_context *ctx,
2493 const u8 *addr, bool is_ap, struct ieee80211_sta *sta);
2495 int il_send_lq_cmd(struct il_priv *il, struct il_rxon_context *ctx,
2496 struct il_link_quality_cmd *lq, u8 flags, bool init);
2499 * il_clear_driver_stations - clear knowledge of all stations from driver
2500 * @il: iwl il struct
2502 * This is called during il_down() to make sure that in the case
2503 * we're coming there from a hardware restart mac80211 will be
2504 * able to reconfigure stations -- if we're getting there in the
2505 * normal down flow then the stations will already be cleared.
2508 il_clear_driver_stations(struct il_priv *il)
2510 unsigned long flags;
2511 struct il_rxon_context *ctx = &il->ctx;
2513 spin_lock_irqsave(&il->sta_lock, flags);
2514 memset(il->stations, 0, sizeof(il->stations));
2515 il->num_stations = 0;
2517 il->ucode_key_table = 0;
2520 * Remove all key information that is not stored as part
2521 * of station information since mac80211 may not have had
2522 * a chance to remove all the keys. When device is
2523 * reconfigured by mac80211 after an error all keys will
2526 memset(ctx->wep_keys, 0, sizeof(ctx->wep_keys));
2527 ctx->key_mapping_keys = 0;
2529 spin_unlock_irqrestore(&il->sta_lock, flags);
2533 il_sta_id(struct ieee80211_sta *sta)
2536 return IL_INVALID_STATION;
2538 return ((struct il_station_priv_common *)sta->drv_priv)->sta_id;
2542 * il_sta_id_or_broadcast - return sta_id or broadcast sta
2544 * @context: the current context
2545 * @sta: mac80211 station
2547 * In certain circumstances mac80211 passes a station pointer
2548 * that may be %NULL, for example during TX or key setup. In
2549 * that case, we need to use the broadcast station, so this
2550 * inline wraps that pattern.
2553 il_sta_id_or_broadcast(struct il_priv *il, struct il_rxon_context *context,
2554 struct ieee80211_sta *sta)
2559 return context->bcast_sta_id;
2561 sta_id = il_sta_id(sta);
2564 * mac80211 should not be passing a partially
2565 * initialised station!
2567 WARN_ON(sta_id == IL_INVALID_STATION);
2573 * il_queue_inc_wrap - increment queue idx, wrap back to beginning
2574 * @idx -- current idx
2575 * @n_bd -- total number of entries in queue (must be power of 2)
2578 il_queue_inc_wrap(int idx, int n_bd)
2580 return ++idx & (n_bd - 1);
2584 * il_queue_dec_wrap - decrement queue idx, wrap back to end
2585 * @idx -- current idx
2586 * @n_bd -- total number of entries in queue (must be power of 2)
2589 il_queue_dec_wrap(int idx, int n_bd)
2591 return --idx & (n_bd - 1);
2594 /* TODO: Move fw_desc functions to iwl-pci.ko */
2596 il_free_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
2599 dma_free_coherent(&pci_dev->dev, desc->len, desc->v_addr,
2601 desc->v_addr = NULL;
2606 il_alloc_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
2609 desc->v_addr = NULL;
2614 dma_alloc_coherent(&pci_dev->dev, desc->len, &desc->p_addr,
2616 return (desc->v_addr != NULL) ? 0 : -ENOMEM;
2620 * we have 8 bits used like this:
2624 * | | | | | | +-+-------- AC queue (0-3)
2626 * | +-+-+-+-+------------ HW queue ID
2628 * +---------------------- unused
2631 il_set_swq_id(struct il_tx_queue *txq, u8 ac, u8 hwq)
2633 BUG_ON(ac > 3); /* only have 2 bits */
2634 BUG_ON(hwq > 31); /* only use 5 bits */
2636 txq->swq_id = (hwq << 2) | ac;
2640 il_wake_queue(struct il_priv *il, struct il_tx_queue *txq)
2642 u8 queue = txq->swq_id;
2644 u8 hwq = (queue >> 2) & 0x1f;
2646 if (test_and_clear_bit(hwq, il->queue_stopped))
2647 if (atomic_dec_return(&il->queue_stop_count[ac]) <= 0)
2648 ieee80211_wake_queue(il->hw, ac);
2652 il_stop_queue(struct il_priv *il, struct il_tx_queue *txq)
2654 u8 queue = txq->swq_id;
2656 u8 hwq = (queue >> 2) & 0x1f;
2658 if (!test_and_set_bit(hwq, il->queue_stopped))
2659 if (atomic_inc_return(&il->queue_stop_count[ac]) > 0)
2660 ieee80211_stop_queue(il->hw, ac);
2663 #ifdef ieee80211_stop_queue
2664 #undef ieee80211_stop_queue
2667 #define ieee80211_stop_queue DO_NOT_USE_ieee80211_stop_queue
2669 #ifdef ieee80211_wake_queue
2670 #undef ieee80211_wake_queue
2673 #define ieee80211_wake_queue DO_NOT_USE_ieee80211_wake_queue
2676 il_disable_interrupts(struct il_priv *il)
2678 clear_bit(S_INT_ENABLED, &il->status);
2680 /* disable interrupts from uCode/NIC to host */
2681 _il_wr(il, CSR_INT_MASK, 0x00000000);
2683 /* acknowledge/clear/reset any interrupts still pending
2684 * from uCode or flow handler (Rx/Tx DMA) */
2685 _il_wr(il, CSR_INT, 0xffffffff);
2686 _il_wr(il, CSR_FH_INT_STATUS, 0xffffffff);
2690 il_enable_rfkill_int(struct il_priv *il)
2692 _il_wr(il, CSR_INT_MASK, CSR_INT_BIT_RF_KILL);
2696 il_enable_interrupts(struct il_priv *il)
2698 set_bit(S_INT_ENABLED, &il->status);
2699 _il_wr(il, CSR_INT_MASK, il->inta_mask);
2703 * il_beacon_time_mask_low - mask of lower 32 bit of beacon time
2704 * @il -- pointer to il_priv data structure
2705 * @tsf_bits -- number of bits need to shift for masking)
2708 il_beacon_time_mask_low(struct il_priv *il, u16 tsf_bits)
2710 return (1 << tsf_bits) - 1;
2714 * il_beacon_time_mask_high - mask of higher 32 bit of beacon time
2715 * @il -- pointer to il_priv data structure
2716 * @tsf_bits -- number of bits need to shift for masking)
2719 il_beacon_time_mask_high(struct il_priv *il, u16 tsf_bits)
2721 return ((1 << (32 - tsf_bits)) - 1) << tsf_bits;
2725 * struct il_rb_status - reseve buffer status host memory mapped FH registers
2727 * @closed_rb_num [0:11] - Indicates the idx of the RB which was closed
2728 * @closed_fr_num [0:11] - Indicates the idx of the RX Frame which was closed
2729 * @finished_rb_num [0:11] - Indicates the idx of the current RB
2730 * in which the last frame was written to
2731 * @finished_fr_num [0:11] - Indicates the idx of the RX Frame
2732 * which was transferred
2734 struct il_rb_status {
2735 __le16 closed_rb_num;
2736 __le16 closed_fr_num;
2737 __le16 finished_rb_num;
2738 __le16 finished_fr_nam;
2739 __le32 __unused; /* 3945 only */
2742 #define TFD_QUEUE_SIZE_MAX (256)
2743 #define TFD_QUEUE_SIZE_BC_DUP (64)
2744 #define TFD_QUEUE_BC_SIZE (TFD_QUEUE_SIZE_MAX + TFD_QUEUE_SIZE_BC_DUP)
2745 #define IL_TX_DMA_MASK DMA_BIT_MASK(36)
2746 #define IL_NUM_OF_TBS 20
2749 il_get_dma_hi_addr(dma_addr_t addr)
2751 return (sizeof(addr) > sizeof(u32) ? (addr >> 16) >> 16 : 0) & 0xF;
2755 * struct il_tfd_tb transmit buffer descriptor within transmit frame descriptor
2757 * This structure contains dma address and length of transmission address
2759 * @lo: low [31:0] portion of the dma address of TX buffer every even is
2760 * unaligned on 16 bit boundary
2761 * @hi_n_len: 0-3 [35:32] portion of dma
2762 * 4-15 length of the tx buffer
2772 * Transmit Frame Descriptor (TFD)
2774 * @ __reserved1[3] reserved
2775 * @ num_tbs 0-4 number of active tbs
2777 * 6-7 padding (not used)
2778 * @ tbs[20] transmit frame buffer descriptors
2781 * Each Tx queue uses a circular buffer of 256 TFDs stored in host DRAM.
2782 * Both driver and device share these circular buffers, each of which must be
2783 * contiguous 256 TFDs x 128 bytes-per-TFD = 32 KBytes
2785 * Driver must indicate the physical address of the base of each
2786 * circular buffer via the FH49_MEM_CBBC_QUEUE registers.
2788 * Each TFD contains pointer/size information for up to 20 data buffers
2789 * in host DRAM. These buffers collectively contain the (one) frame described
2790 * by the TFD. Each buffer must be a single contiguous block of memory within
2791 * itself, but buffers may be scattered in host DRAM. Each buffer has max size
2792 * of (4K - 4). The concatenates all of a TFD's buffers into a single
2793 * Tx frame, up to 8 KBytes in size.
2795 * A maximum of 255 (not 256!) TFDs may be on a queue waiting for Tx.
2800 struct il_tfd_tb tbs[IL_NUM_OF_TBS];
2804 #define PCI_CFG_RETRY_TIMEOUT 0x041
2806 /* PCI register values */
2807 #define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01
2808 #define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02
2810 struct il_rate_info {
2811 u8 plcp; /* uCode API: RATE_6M_PLCP, etc. */
2812 u8 plcp_siso; /* uCode API: RATE_SISO_6M_PLCP, etc. */
2813 u8 plcp_mimo2; /* uCode API: RATE_MIMO2_6M_PLCP, etc. */
2814 u8 ieee; /* MAC header: RATE_6M_IEEE, etc. */
2815 u8 prev_ieee; /* previous rate in IEEE speeds */
2816 u8 next_ieee; /* next rate in IEEE speeds */
2817 u8 prev_rs; /* previous rate used in rs algo */
2818 u8 next_rs; /* next rate used in rs algo */
2819 u8 prev_rs_tgg; /* previous rate used in TGG rs algo */
2820 u8 next_rs_tgg; /* next rate used in TGG rs algo */
2823 struct il3945_rate_info {
2824 u8 plcp; /* uCode API: RATE_6M_PLCP, etc. */
2825 u8 ieee; /* MAC header: RATE_6M_IEEE, etc. */
2826 u8 prev_ieee; /* previous rate in IEEE speeds */
2827 u8 next_ieee; /* next rate in IEEE speeds */
2828 u8 prev_rs; /* previous rate used in rs algo */
2829 u8 next_rs; /* next rate used in rs algo */
2830 u8 prev_rs_tgg; /* previous rate used in TGG rs algo */
2831 u8 next_rs_tgg; /* next rate used in TGG rs algo */
2832 u8 table_rs_idx; /* idx in rate scale table cmd */
2833 u8 prev_table_rs; /* prev in rate table cmd */
2837 * These serve as idxes into
2838 * struct il_rate_info il_rates[RATE_COUNT];
2855 RATE_COUNT_LEGACY = RATE_COUNT - 1, /* Excluding 60M */
2856 RATE_COUNT_3945 = RATE_COUNT - 1,
2857 RATE_INVM_IDX = RATE_COUNT,
2858 RATE_INVALID = RATE_COUNT,
2862 RATE_6M_IDX_TBL = 0,
2874 RATE_INVM_IDX_TBL = RATE_INVM_IDX - 1,
2878 IL_FIRST_OFDM_RATE = RATE_6M_IDX,
2879 IL39_LAST_OFDM_RATE = RATE_54M_IDX,
2880 IL_LAST_OFDM_RATE = RATE_60M_IDX,
2881 IL_FIRST_CCK_RATE = RATE_1M_IDX,
2882 IL_LAST_CCK_RATE = RATE_11M_IDX,
2885 /* #define vs. enum to keep from defaulting to 'large integer' */
2886 #define RATE_6M_MASK (1 << RATE_6M_IDX)
2887 #define RATE_9M_MASK (1 << RATE_9M_IDX)
2888 #define RATE_12M_MASK (1 << RATE_12M_IDX)
2889 #define RATE_18M_MASK (1 << RATE_18M_IDX)
2890 #define RATE_24M_MASK (1 << RATE_24M_IDX)
2891 #define RATE_36M_MASK (1 << RATE_36M_IDX)
2892 #define RATE_48M_MASK (1 << RATE_48M_IDX)
2893 #define RATE_54M_MASK (1 << RATE_54M_IDX)
2894 #define RATE_60M_MASK (1 << RATE_60M_IDX)
2895 #define RATE_1M_MASK (1 << RATE_1M_IDX)
2896 #define RATE_2M_MASK (1 << RATE_2M_IDX)
2897 #define RATE_5M_MASK (1 << RATE_5M_IDX)
2898 #define RATE_11M_MASK (1 << RATE_11M_IDX)
2900 /* uCode API values for legacy bit rates, both OFDM and CCK */
2910 RATE_60M_PLCP = 3, /*FIXME:RS:should be removed */
2914 RATE_11M_PLCP = 110,
2915 /*FIXME:RS:add RATE_LEGACY_INVM_PLCP = 0, */
2918 /* uCode API values for OFDM high-throughput (HT) bit rates */
2920 RATE_SISO_6M_PLCP = 0,
2921 RATE_SISO_12M_PLCP = 1,
2922 RATE_SISO_18M_PLCP = 2,
2923 RATE_SISO_24M_PLCP = 3,
2924 RATE_SISO_36M_PLCP = 4,
2925 RATE_SISO_48M_PLCP = 5,
2926 RATE_SISO_54M_PLCP = 6,
2927 RATE_SISO_60M_PLCP = 7,
2928 RATE_MIMO2_6M_PLCP = 0x8,
2929 RATE_MIMO2_12M_PLCP = 0x9,
2930 RATE_MIMO2_18M_PLCP = 0xa,
2931 RATE_MIMO2_24M_PLCP = 0xb,
2932 RATE_MIMO2_36M_PLCP = 0xc,
2933 RATE_MIMO2_48M_PLCP = 0xd,
2934 RATE_MIMO2_54M_PLCP = 0xe,
2935 RATE_MIMO2_60M_PLCP = 0xf,
2936 RATE_SISO_INVM_PLCP,
2937 RATE_MIMO2_INVM_PLCP = RATE_SISO_INVM_PLCP,
2940 /* MAC header values for bit rates */
2949 RATE_54M_IEEE = 108,
2950 RATE_60M_IEEE = 120,
2957 #define IL_CCK_BASIC_RATES_MASK \
2961 #define IL_CCK_RATES_MASK \
2962 (IL_CCK_BASIC_RATES_MASK | \
2966 #define IL_OFDM_BASIC_RATES_MASK \
2971 #define IL_OFDM_RATES_MASK \
2972 (IL_OFDM_BASIC_RATES_MASK | \
2979 #define IL_BASIC_RATES_MASK \
2980 (IL_OFDM_BASIC_RATES_MASK | \
2981 IL_CCK_BASIC_RATES_MASK)
2983 #define RATES_MASK ((1 << RATE_COUNT) - 1)
2984 #define RATES_MASK_3945 ((1 << RATE_COUNT_3945) - 1)
2986 #define IL_INVALID_VALUE -1
2988 #define IL_MIN_RSSI_VAL -100
2989 #define IL_MAX_RSSI_VAL 0
2991 /* These values specify how many Tx frame attempts before
2992 * searching for a new modulation mode */
2993 #define IL_LEGACY_FAILURE_LIMIT 160
2994 #define IL_LEGACY_SUCCESS_LIMIT 480
2995 #define IL_LEGACY_TBL_COUNT 160
2997 #define IL_NONE_LEGACY_FAILURE_LIMIT 400
2998 #define IL_NONE_LEGACY_SUCCESS_LIMIT 4500
2999 #define IL_NONE_LEGACY_TBL_COUNT 1500
3001 /* Success ratio (ACKed / attempted tx frames) values (perfect is 128 * 100) */
3002 #define IL_RS_GOOD_RATIO 12800 /* 100% */
3003 #define RATE_SCALE_SWITCH 10880 /* 85% */
3004 #define RATE_HIGH_TH 10880 /* 85% */
3005 #define RATE_INCREASE_TH 6400 /* 50% */
3006 #define RATE_DECREASE_TH 1920 /* 15% */
3008 /* possible actions when in legacy mode */
3009 #define IL_LEGACY_SWITCH_ANTENNA1 0
3010 #define IL_LEGACY_SWITCH_ANTENNA2 1
3011 #define IL_LEGACY_SWITCH_SISO 2
3012 #define IL_LEGACY_SWITCH_MIMO2_AB 3
3013 #define IL_LEGACY_SWITCH_MIMO2_AC 4
3014 #define IL_LEGACY_SWITCH_MIMO2_BC 5
3016 /* possible actions when in siso mode */
3017 #define IL_SISO_SWITCH_ANTENNA1 0
3018 #define IL_SISO_SWITCH_ANTENNA2 1
3019 #define IL_SISO_SWITCH_MIMO2_AB 2
3020 #define IL_SISO_SWITCH_MIMO2_AC 3
3021 #define IL_SISO_SWITCH_MIMO2_BC 4
3022 #define IL_SISO_SWITCH_GI 5
3024 /* possible actions when in mimo mode */
3025 #define IL_MIMO2_SWITCH_ANTENNA1 0
3026 #define IL_MIMO2_SWITCH_ANTENNA2 1
3027 #define IL_MIMO2_SWITCH_SISO_A 2
3028 #define IL_MIMO2_SWITCH_SISO_B 3
3029 #define IL_MIMO2_SWITCH_SISO_C 4
3030 #define IL_MIMO2_SWITCH_GI 5
3032 #define IL_MAX_SEARCH IL_MIMO2_SWITCH_GI
3034 #define IL_ACTION_LIMIT 3 /* # possible actions */
3036 #define LQ_SIZE 2 /* 2 mode tables: "Active" and "Search" */
3038 /* load per tid defines for A-MPDU activation */
3039 #define IL_AGG_TPT_THREHOLD 0
3040 #define IL_AGG_LOAD_THRESHOLD 10
3041 #define IL_AGG_ALL_TID 0xff
3042 #define TID_QUEUE_CELL_SPACING 50 /*mS */
3043 #define TID_QUEUE_MAX_SIZE 20
3044 #define TID_ROUND_VALUE 5 /* mS */
3045 #define TID_MAX_LOAD_COUNT 8
3047 #define TID_MAX_TIME_DIFF ((TID_QUEUE_MAX_SIZE - 1) * TID_QUEUE_CELL_SPACING)
3048 #define TIME_WRAP_AROUND(x, y) (((y) > (x)) ? (y) - (x) : (0-(x)) + (y))
3050 extern const struct il_rate_info il_rates[RATE_COUNT];
3052 enum il_table_type {
3054 LQ_G, /* legacy types */
3056 LQ_SISO, /* high-throughput types */
3061 #define is_legacy(tbl) ((tbl) == LQ_G || (tbl) == LQ_A)
3062 #define is_siso(tbl) ((tbl) == LQ_SISO)
3063 #define is_mimo2(tbl) ((tbl) == LQ_MIMO2)
3064 #define is_mimo(tbl) (is_mimo2(tbl))
3065 #define is_Ht(tbl) (is_siso(tbl) || is_mimo(tbl))
3066 #define is_a_band(tbl) ((tbl) == LQ_A)
3067 #define is_g_and(tbl) ((tbl) == LQ_G)
3069 #define ANT_NONE 0x0
3070 #define ANT_A BIT(0)
3071 #define ANT_B BIT(1)
3072 #define ANT_AB (ANT_A | ANT_B)
3073 #define ANT_C BIT(2)
3074 #define ANT_AC (ANT_A | ANT_C)
3075 #define ANT_BC (ANT_B | ANT_C)
3076 #define ANT_ABC (ANT_AB | ANT_C)
3078 #define IL_MAX_MCS_DISPLAY_SIZE 12
3080 struct il_rate_mcs_info {
3081 char mbps[IL_MAX_MCS_DISPLAY_SIZE];
3082 char mcs[IL_MAX_MCS_DISPLAY_SIZE];
3086 * struct il_rate_scale_data -- tx success history for one rate
3088 struct il_rate_scale_data {
3089 u64 data; /* bitmap of successful frames */
3090 s32 success_counter; /* number of frames successful */
3091 s32 success_ratio; /* per-cent * 128 */
3092 s32 counter; /* number of frames attempted */
3093 s32 average_tpt; /* success ratio * expected throughput */
3094 unsigned long stamp;
3098 * struct il_scale_tbl_info -- tx params and success history for all rates
3100 * There are two of these in struct il_lq_sta,
3101 * one for "active", and one for "search".
3103 struct il_scale_tbl_info {
3104 enum il_table_type lq_type;
3106 u8 is_SGI; /* 1 = short guard interval */
3107 u8 is_ht40; /* 1 = 40 MHz channel width */
3108 u8 is_dup; /* 1 = duplicated data streams */
3109 u8 action; /* change modulation; IL_[LEGACY/SISO/MIMO]_SWITCH_* */
3110 u8 max_search; /* maximun number of tables we can search */
3111 s32 *expected_tpt; /* throughput metrics; expected_tpt_G, etc. */
3112 u32 current_rate; /* rate_n_flags, uCode API format */
3113 struct il_rate_scale_data win[RATE_COUNT]; /* rate histories */
3116 struct il_traffic_load {
3117 unsigned long time_stamp; /* age of the oldest stats */
3118 u32 packet_count[TID_QUEUE_MAX_SIZE]; /* packet count in this time
3120 u32 total; /* total num of packets during the
3121 * last TID_MAX_TIME_DIFF */
3122 u8 queue_count; /* number of queues that has
3123 * been used since the last cleanup */
3124 u8 head; /* start of the circular buffer */
3128 * struct il_lq_sta -- driver's rate scaling ilate structure
3130 * Pointer to this gets passed back and forth between driver and mac80211.
3133 u8 active_tbl; /* idx of active table, range 0-1 */
3134 u8 enable_counter; /* indicates HT mode */
3135 u8 stay_in_tbl; /* 1: disallow, 0: allow search for new mode */
3136 u8 search_better_tbl; /* 1: currently trying alternate mode */
3139 /* The following determine when to search for a new mode */
3140 u32 table_count_limit;
3141 u32 max_failure_limit; /* # failed frames before new search */
3142 u32 max_success_limit; /* # successful frames before new search */
3144 u32 total_failed; /* total failed frames, any/all rates */
3145 u32 total_success; /* total successful frames, any/all rates */
3146 u64 flush_timer; /* time staying in mode before new search */
3148 u8 action_counter; /* # mode-switch actions tried */
3151 enum ieee80211_band band;
3153 /* The following are bitmaps of rates; RATE_6M_MASK, etc. */
3155 u16 active_legacy_rate;
3156 u16 active_siso_rate;
3157 u16 active_mimo2_rate;
3158 s8 max_rate_idx; /* Max rate set by user */
3159 u8 missed_rate_counter;
3161 struct il_link_quality_cmd lq;
3162 struct il_scale_tbl_info lq_info[LQ_SIZE]; /* "active", "search" */
3163 struct il_traffic_load load[TID_MAX_LOAD_COUNT];
3165 #ifdef CONFIG_MAC80211_DEBUGFS
3166 struct dentry *rs_sta_dbgfs_scale_table_file;
3167 struct dentry *rs_sta_dbgfs_stats_table_file;
3168 struct dentry *rs_sta_dbgfs_rate_scale_data_file;
3169 struct dentry *rs_sta_dbgfs_tx_agg_tid_en_file;
3172 struct il_priv *drv;
3174 /* used to be in sta_info */
3175 int last_txrate_idx;
3176 /* last tx rate_n_flags */
3177 u32 last_rate_n_flags;
3178 /* packets destined for this STA are aggregated */
3183 * il_station_priv: Driver's ilate station information
3185 * When mac80211 creates a station it reserves some space (hw->sta_data_size)
3186 * in the structure for use by driver. This structure is places in that
3189 * The common struct MUST be first because it is shared between
3192 struct il_station_priv {
3193 struct il_station_priv_common common;
3194 struct il_lq_sta lq_sta;
3195 atomic_t pending_frames;
3201 il4965_num_of_ant(u8 m)
3203 return !!(m & ANT_A) + !!(m & ANT_B) + !!(m & ANT_C);
3207 il4965_first_antenna(u8 mask)
3217 * il3945_rate_scale_init - Initialize the rate scale table based on assoc info
3219 * The specific throughput table used is based on the type of network
3220 * the associated with, including A, B, G, and G w/ TGG protection
3222 extern void il3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id);
3224 /* Initialize station's rate scaling information after adding station */
3225 extern void il4965_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta,
3227 extern void il3945_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta,
3231 * il_rate_control_register - Register the rate control algorithm callbacks
3233 * Since the rate control algorithm is hardware specific, there is no need
3234 * or reason to place it as a stand alone module. The driver can call
3235 * il_rate_control_register in order to register the rate control callbacks
3236 * with the mac80211 subsystem. This should be performed prior to calling
3237 * ieee80211_register_hw
3240 extern int il4965_rate_control_register(void);
3241 extern int il3945_rate_control_register(void);
3244 * il_rate_control_unregister - Unregister the rate control callbacks
3246 * This should be called after calling ieee80211_unregister_hw, but before
3247 * the driver is unloaded.
3249 extern void il4965_rate_control_unregister(void);
3250 extern void il3945_rate_control_unregister(void);
3252 extern int il_power_update_mode(struct il_priv *il, bool force);
3253 extern void il_power_initialize(struct il_priv *il);
3255 extern u32 il_debug_level;
3257 #ifdef CONFIG_IWLEGACY_DEBUG
3259 * il_get_debug_level: Return active debug level for device
3261 * Using sysfs it is possible to set per device debug level. This debug
3262 * level will be used if set, otherwise the global debug level which can be
3263 * set via module parameter is used.
3266 il_get_debug_level(struct il_priv *il)
3268 if (il->debug_level)
3269 return il->debug_level;
3271 return il_debug_level;
3275 il_get_debug_level(struct il_priv *il)
3277 return il_debug_level;
3281 #define il_print_hex_error(il, p, len) \
3283 print_hex_dump(KERN_ERR, "iwl data: ", \
3284 DUMP_PREFIX_OFFSET, 16, 1, p, len, 1); \
3287 #ifdef CONFIG_IWLEGACY_DEBUG
3288 #define IL_DBG(level, fmt, args...) \
3290 if (il_get_debug_level(il) & level) \
3291 dev_printk(KERN_ERR, &il->hw->wiphy->dev, \
3292 "%c %s " fmt, in_interrupt() ? 'I' : 'U', \
3293 __func__ , ## args); \
3296 #define il_print_hex_dump(il, level, p, len) \
3298 if (il_get_debug_level(il) & level) \
3299 print_hex_dump(KERN_DEBUG, "iwl data: ", \
3300 DUMP_PREFIX_OFFSET, 16, 1, p, len, 1); \
3304 #define IL_DBG(level, fmt, args...)
3306 il_print_hex_dump(struct il_priv *il, int level, const void *p, u32 len)
3309 #endif /* CONFIG_IWLEGACY_DEBUG */
3311 #ifdef CONFIG_IWLEGACY_DEBUGFS
3312 int il_dbgfs_register(struct il_priv *il, const char *name);
3313 void il_dbgfs_unregister(struct il_priv *il);
3316 il_dbgfs_register(struct il_priv *il, const char *name)
3322 il_dbgfs_unregister(struct il_priv *il)
3325 #endif /* CONFIG_IWLEGACY_DEBUGFS */
3328 * To use the debug system:
3330 * If you are defining a new debug classification, simply add it to the #define
3331 * list here in the form of
3333 * #define IL_DL_xxxx VALUE
3335 * where xxxx should be the name of the classification (for example, WEP).
3337 * You then need to either add a IL_xxxx_DEBUG() macro definition for your
3338 * classification, or use IL_DBG(IL_DL_xxxx, ...) whenever you want
3339 * to send output to that classification.
3341 * The active debug levels can be accessed via files
3343 * /sys/module/iwl4965/parameters/debug
3344 * /sys/module/iwl3945/parameters/debug
3345 * /sys/class/net/wlan0/device/debug_level
3347 * when CONFIG_IWLEGACY_DEBUG=y.
3350 /* 0x0000000F - 0x00000001 */
3351 #define IL_DL_INFO (1 << 0)
3352 #define IL_DL_MAC80211 (1 << 1)
3353 #define IL_DL_HCMD (1 << 2)
3354 #define IL_DL_STATE (1 << 3)
3355 /* 0x000000F0 - 0x00000010 */
3356 #define IL_DL_MACDUMP (1 << 4)
3357 #define IL_DL_HCMD_DUMP (1 << 5)
3358 #define IL_DL_EEPROM (1 << 6)
3359 #define IL_DL_RADIO (1 << 7)
3360 /* 0x00000F00 - 0x00000100 */
3361 #define IL_DL_POWER (1 << 8)
3362 #define IL_DL_TEMP (1 << 9)
3363 #define IL_DL_NOTIF (1 << 10)
3364 #define IL_DL_SCAN (1 << 11)
3365 /* 0x0000F000 - 0x00001000 */
3366 #define IL_DL_ASSOC (1 << 12)
3367 #define IL_DL_DROP (1 << 13)
3368 #define IL_DL_TXPOWER (1 << 14)
3369 #define IL_DL_AP (1 << 15)
3370 /* 0x000F0000 - 0x00010000 */
3371 #define IL_DL_FW (1 << 16)
3372 #define IL_DL_RF_KILL (1 << 17)
3373 #define IL_DL_FW_ERRORS (1 << 18)
3374 #define IL_DL_LED (1 << 19)
3375 /* 0x00F00000 - 0x00100000 */
3376 #define IL_DL_RATE (1 << 20)
3377 #define IL_DL_CALIB (1 << 21)
3378 #define IL_DL_WEP (1 << 22)
3379 #define IL_DL_TX (1 << 23)
3380 /* 0x0F000000 - 0x01000000 */
3381 #define IL_DL_RX (1 << 24)
3382 #define IL_DL_ISR (1 << 25)
3383 #define IL_DL_HT (1 << 26)
3384 /* 0xF0000000 - 0x10000000 */
3385 #define IL_DL_11H (1 << 28)
3386 #define IL_DL_STATS (1 << 29)
3387 #define IL_DL_TX_REPLY (1 << 30)
3388 #define IL_DL_QOS (1 << 31)
3390 #define D_INFO(f, a...) IL_DBG(IL_DL_INFO, f, ## a)
3391 #define D_MAC80211(f, a...) IL_DBG(IL_DL_MAC80211, f, ## a)
3392 #define D_MACDUMP(f, a...) IL_DBG(IL_DL_MACDUMP, f, ## a)
3393 #define D_TEMP(f, a...) IL_DBG(IL_DL_TEMP, f, ## a)
3394 #define D_SCAN(f, a...) IL_DBG(IL_DL_SCAN, f, ## a)
3395 #define D_RX(f, a...) IL_DBG(IL_DL_RX, f, ## a)
3396 #define D_TX(f, a...) IL_DBG(IL_DL_TX, f, ## a)
3397 #define D_ISR(f, a...) IL_DBG(IL_DL_ISR, f, ## a)
3398 #define D_LED(f, a...) IL_DBG(IL_DL_LED, f, ## a)
3399 #define D_WEP(f, a...) IL_DBG(IL_DL_WEP, f, ## a)
3400 #define D_HC(f, a...) IL_DBG(IL_DL_HCMD, f, ## a)
3401 #define D_HC_DUMP(f, a...) IL_DBG(IL_DL_HCMD_DUMP, f, ## a)
3402 #define D_EEPROM(f, a...) IL_DBG(IL_DL_EEPROM, f, ## a)
3403 #define D_CALIB(f, a...) IL_DBG(IL_DL_CALIB, f, ## a)
3404 #define D_FW(f, a...) IL_DBG(IL_DL_FW, f, ## a)
3405 #define D_RF_KILL(f, a...) IL_DBG(IL_DL_RF_KILL, f, ## a)
3406 #define D_DROP(f, a...) IL_DBG(IL_DL_DROP, f, ## a)
3407 #define D_AP(f, a...) IL_DBG(IL_DL_AP, f, ## a)
3408 #define D_TXPOWER(f, a...) IL_DBG(IL_DL_TXPOWER, f, ## a)
3409 #define D_RATE(f, a...) IL_DBG(IL_DL_RATE, f, ## a)
3410 #define D_NOTIF(f, a...) IL_DBG(IL_DL_NOTIF, f, ## a)
3411 #define D_ASSOC(f, a...) IL_DBG(IL_DL_ASSOC, f, ## a)
3412 #define D_HT(f, a...) IL_DBG(IL_DL_HT, f, ## a)
3413 #define D_STATS(f, a...) IL_DBG(IL_DL_STATS, f, ## a)
3414 #define D_TX_REPLY(f, a...) IL_DBG(IL_DL_TX_REPLY, f, ## a)
3415 #define D_QOS(f, a...) IL_DBG(IL_DL_QOS, f, ## a)
3416 #define D_RADIO(f, a...) IL_DBG(IL_DL_RADIO, f, ## a)
3417 #define D_POWER(f, a...) IL_DBG(IL_DL_POWER, f, ## a)
3418 #define D_11H(f, a...) IL_DBG(IL_DL_11H, f, ## a)
3420 #endif /* __il_core_h__ */