drivers/net/wireless/iwlwifi/iwl-3945.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/skbuff.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/wireless.h>
  36 #include <linux/firmware.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39 #include <net/mac80211.h>
  40
  41 #include "iwl-3945-core.h"
  42 #include "iwl-3945.h"
  43 #include "iwl-helpers.h"
  44 #include "iwl-3945-rs.h"
  45
  46 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
  47         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,   \
  48                                     IWL_RATE_##r##M_IEEE,   \
  49                                     IWL_RATE_##ip##M_INDEX, \
  50                                     IWL_RATE_##in##M_INDEX, \
  51                                     IWL_RATE_##rp##M_INDEX, \
  52                                     IWL_RATE_##rn##M_INDEX, \
  53                                     IWL_RATE_##pp##M_INDEX, \
  54                                     IWL_RATE_##np##M_INDEX, \
  55                                     IWL_RATE_##r##M_INDEX_TABLE, \
  56                                     IWL_RATE_##ip##M_INDEX_TABLE }
  57
  58 /*
  59  * Parameter order:
  60  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
  61  *
  62  * If there isn't a valid next or previous rate then INV is used which
  63  * maps to IWL_RATE_INVALID
  64  *
  65  */
  66 const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT] = {
  67         IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  68         IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  69         IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  70         IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
  71         IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  72         IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
  73         IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  74         IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  75         IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  76         IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
  77         IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
  78         IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  79 };
  80
  81 /* 1 = enable the iwl3945_disable_events() function */
  82 #define IWL_EVT_DISABLE (0)
  83 #define IWL_EVT_DISABLE_SIZE (1532/32)
  84
  85 /**
  86  * iwl3945_disable_events - Disable selected events in uCode event log
  87  *
  88  * Disable an event by writing "1"s into "disable"
  89  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
  90  *   Default values of 0 enable uCode events to be logged.
  91  * Use for only special debugging.  This function is just a placeholder as-is,
  92  *   you'll need to provide the special bits! ...
  93  *   ... and set IWL_EVT_DISABLE to 1. */
  94 void iwl3945_disable_events(struct iwl3945_priv *priv)
  95 {
  96         int ret;
  97         int i;
  98         u32 base;               /* SRAM address of event log header */
  99         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
 100         u32 array_size;         /* # of u32 entries in array */
 101         u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
 102                 0x00000000,     /*   31 -    0  Event id numbers */
 103                 0x00000000,     /*   63 -   32 */
 104                 0x00000000,     /*   95 -   64 */
 105                 0x00000000,     /*  127 -   96 */
 106                 0x00000000,     /*  159 -  128 */
 107                 0x00000000,     /*  191 -  160 */
 108                 0x00000000,     /*  223 -  192 */
 109                 0x00000000,     /*  255 -  224 */
 110                 0x00000000,     /*  287 -  256 */
 111                 0x00000000,     /*  319 -  288 */
 112                 0x00000000,     /*  351 -  320 */
 113                 0x00000000,     /*  383 -  352 */
 114                 0x00000000,     /*  415 -  384 */
 115                 0x00000000,     /*  447 -  416 */
 116                 0x00000000,     /*  479 -  448 */
 117                 0x00000000,     /*  511 -  480 */
 118                 0x00000000,     /*  543 -  512 */
 119                 0x00000000,     /*  575 -  544 */
 120                 0x00000000,     /*  607 -  576 */
 121                 0x00000000,     /*  639 -  608 */
 122                 0x00000000,     /*  671 -  640 */
 123                 0x00000000,     /*  703 -  672 */
 124                 0x00000000,     /*  735 -  704 */
 125                 0x00000000,     /*  767 -  736 */
 126                 0x00000000,     /*  799 -  768 */
 127                 0x00000000,     /*  831 -  800 */
 128                 0x00000000,     /*  863 -  832 */
 129                 0x00000000,     /*  895 -  864 */
 130                 0x00000000,     /*  927 -  896 */
 131                 0x00000000,     /*  959 -  928 */
 132                 0x00000000,     /*  991 -  960 */
 133                 0x00000000,     /* 1023 -  992 */
 134                 0x00000000,     /* 1055 - 1024 */
 135                 0x00000000,     /* 1087 - 1056 */
 136                 0x00000000,     /* 1119 - 1088 */
 137                 0x00000000,     /* 1151 - 1120 */
 138                 0x00000000,     /* 1183 - 1152 */
 139                 0x00000000,     /* 1215 - 1184 */
 140                 0x00000000,     /* 1247 - 1216 */
 141                 0x00000000,     /* 1279 - 1248 */
 142                 0x00000000,     /* 1311 - 1280 */
 143                 0x00000000,     /* 1343 - 1312 */
 144                 0x00000000,     /* 1375 - 1344 */
 145                 0x00000000,     /* 1407 - 1376 */
 146                 0x00000000,     /* 1439 - 1408 */
 147                 0x00000000,     /* 1471 - 1440 */
 148                 0x00000000,     /* 1503 - 1472 */
 149         };
 150
 151         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 152         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
 153                 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
 154                 return;
 155         }
 156
 157         ret = iwl3945_grab_nic_access(priv);
 158         if (ret) {
 159                 IWL_WARNING("Can not read from adapter at this time.\n");
 160                 return;
 161         }
 162
 163         disable_ptr = iwl3945_read_targ_mem(priv, base + (4 * sizeof(u32)));
 164         array_size = iwl3945_read_targ_mem(priv, base + (5 * sizeof(u32)));
 165         iwl3945_release_nic_access(priv);
 166
 167         if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
 168                 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
 169                                disable_ptr);
 170                 ret = iwl3945_grab_nic_access(priv);
 171                 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
 172                         iwl3945_write_targ_mem(priv,
 173                                            disable_ptr + (i * sizeof(u32)),
 174                                            evt_disable[i]);
 175
 176                 iwl3945_release_nic_access(priv);
 177         } else {
 178                 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
 179                 IWL_DEBUG_INFO("  by writing \"1\"s into disable bitmap\n");
 180                 IWL_DEBUG_INFO("  in SRAM at 0x%x, size %d u32s\n",
 181                                disable_ptr, array_size);
 182         }
 183
 184 }
 185
 186 static int iwl3945_hwrate_to_plcp_idx(u8 plcp)
 187 {
 188         int idx;
 189
 190         for (idx = 0; idx < IWL_RATE_COUNT; idx++)
 191                 if (iwl3945_rates[idx].plcp == plcp)
 192                         return idx;
 193         return -1;
 194 }
 195
 196 /**
 197  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
 198  * @priv: eeprom and antenna fields are used to determine antenna flags
 199  *
 200  * priv->eeprom  is used to determine if antenna AUX/MAIN are reversed
 201  * priv->antenna specifies the antenna diversity mode:
 202  *
 203  * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
 204  * IWL_ANTENNA_MAIN      - Force MAIN antenna
 205  * IWL_ANTENNA_AUX       - Force AUX antenna
 206  */
 207 __le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv)
 208 {
 209         switch (priv->antenna) {
 210         case IWL_ANTENNA_DIVERSITY:
 211                 return 0;
 212
 213         case IWL_ANTENNA_MAIN:
 214                 if (priv->eeprom.antenna_switch_type)
 215                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 216                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 217
 218         case IWL_ANTENNA_AUX:
 219                 if (priv->eeprom.antenna_switch_type)
 220                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 221                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 222         }
 223
 224         /* bad antenna selector value */
 225         IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
 226         return 0;               /* "diversity" is default if error */
 227 }
 228
 229 #ifdef CONFIG_IWL3945_DEBUG
 230 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
 231
 232 static const char *iwl3945_get_tx_fail_reason(u32 status)
 233 {
 234         switch (status & TX_STATUS_MSK) {
 235         case TX_STATUS_SUCCESS:
 236                 return "SUCCESS";
 237                 TX_STATUS_ENTRY(SHORT_LIMIT);
 238                 TX_STATUS_ENTRY(LONG_LIMIT);
 239                 TX_STATUS_ENTRY(FIFO_UNDERRUN);
 240                 TX_STATUS_ENTRY(MGMNT_ABORT);
 241                 TX_STATUS_ENTRY(NEXT_FRAG);
 242                 TX_STATUS_ENTRY(LIFE_EXPIRE);
 243                 TX_STATUS_ENTRY(DEST_PS);
 244                 TX_STATUS_ENTRY(ABORTED);
 245                 TX_STATUS_ENTRY(BT_RETRY);
 246                 TX_STATUS_ENTRY(STA_INVALID);
 247                 TX_STATUS_ENTRY(FRAG_DROPPED);
 248                 TX_STATUS_ENTRY(TID_DISABLE);
 249                 TX_STATUS_ENTRY(FRAME_FLUSHED);
 250                 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
 251                 TX_STATUS_ENTRY(TX_LOCKED);
 252                 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
 253         }
 254
 255         return "UNKNOWN";
 256 }
 257 #else
 258 static inline const char *iwl3945_get_tx_fail_reason(u32 status)
 259 {
 260         return "";
 261 }
 262 #endif
 263
 264 /*
 265  * get ieee prev rate from rate scale table.
 266  * for A and B mode we need to overright prev
 267  * value
 268  */
 269 int iwl3945_rs_next_rate(struct iwl3945_priv *priv, int rate)
 270 {
 271         int next_rate = iwl3945_get_prev_ieee_rate(rate);
 272
 273         switch (priv->band) {
 274         case IEEE80211_BAND_5GHZ:
 275                 if (rate == IWL_RATE_12M_INDEX)
 276                         next_rate = IWL_RATE_9M_INDEX;
 277                 else if (rate == IWL_RATE_6M_INDEX)
 278                         next_rate = IWL_RATE_6M_INDEX;
 279                 break;
 280         case IEEE80211_BAND_2GHZ:
 281                 if (!(priv->sta_supp_rates & IWL_OFDM_RATES_MASK) &&
 282                     iwl3945_is_associated(priv)) {
 283                         if (rate == IWL_RATE_11M_INDEX)
 284                                 next_rate = IWL_RATE_5M_INDEX;
 285                 }
 286                 break;
 287
 288         default:
 289                 break;
 290         }
 291
 292         return next_rate;
 293 }
 294
 295
 296 /**
 297  * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
 298  *
 299  * When FW advances 'R' index, all entries between old and new 'R' index
 300  * need to be reclaimed. As result, some free space forms. If there is
 301  * enough free space (> low mark), wake the stack that feeds us.
 302  */
 303 static void iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv,
 304                                      int txq_id, int index)
 305 {
 306         struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
 307         struct iwl3945_queue *q = &txq->q;
 308         struct iwl3945_tx_info *tx_info;
 309
 310         BUG_ON(txq_id == IWL_CMD_QUEUE_NUM);
 311
 312         for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
 313                 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
 314
 315                 tx_info = &txq->txb[txq->q.read_ptr];
 316                 ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0]);
 317                 tx_info->skb[0] = NULL;
 318                 iwl3945_hw_txq_free_tfd(priv, txq);
 319         }
 320
 321         if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
 322                         (txq_id != IWL_CMD_QUEUE_NUM) &&
 323                         priv->mac80211_registered)
 324                 ieee80211_wake_queue(priv->hw, txq_id);
 325 }
 326
 327 /**
 328  * iwl3945_rx_reply_tx - Handle Tx response
 329  */
 330 static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
 331                             struct iwl3945_rx_mem_buffer *rxb)
 332 {
 333         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 334         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
 335         int txq_id = SEQ_TO_QUEUE(sequence);
 336         int index = SEQ_TO_INDEX(sequence);
 337         struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
 338         struct ieee80211_tx_info *info;
 339         struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
 340         u32  status = le32_to_cpu(tx_resp->status);
 341         int rate_idx;
 342         int fail;
 343
 344         if ((index >= txq->q.n_bd) || (iwl3945_x2_queue_used(&txq->q, index) == 0)) {
 345                 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
 346                           "is out of range [0-%d] %d %d\n", txq_id,
 347                           index, txq->q.n_bd, txq->q.write_ptr,
 348                           txq->q.read_ptr);
 349                 return;
 350         }
 351
 352         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
 353         ieee80211_tx_info_clear_status(info);
 354
 355         /* Fill the MRR chain with some info about on-chip retransmissions */
 356         rate_idx = iwl3945_hwrate_to_plcp_idx(tx_resp->rate);
 357         if (info->band == IEEE80211_BAND_5GHZ)
 358                 rate_idx -= IWL_FIRST_OFDM_RATE;
 359
 360         fail = tx_resp->failure_frame;
 361
 362         info->status.rates[0].idx = rate_idx;
 363         info->status.rates[0].count = fail + 1; /* add final attempt */
 364
 365         /* tx_status->rts_retry_count = tx_resp->failure_rts; */
 366         info->flags |= ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ?
 367                                 IEEE80211_TX_STAT_ACK : 0;
 368
 369         IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
 370                         txq_id, iwl3945_get_tx_fail_reason(status), status,
 371                         tx_resp->rate, tx_resp->failure_frame);
 372
 373         IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
 374         iwl3945_tx_queue_reclaim(priv, txq_id, index);
 375
 376         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
 377                 IWL_ERROR("TODO:  Implement Tx ABORT REQUIRED!!!\n");
 378 }
 379
 380
 381
 382 /*****************************************************************************
 383  *
 384  * Intel PRO/Wireless 3945ABG/BG Network Connection
 385  *
 386  *  RX handler implementations
 387  *
 388  *****************************************************************************/
 389
 390 void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
 391 {
 392         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 393         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
 394                      (int)sizeof(struct iwl3945_notif_statistics),
 395                      le32_to_cpu(pkt->len));
 396
 397         memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
 398
 399         iwl3945_led_background(priv);
 400
 401         priv->last_statistics_time = jiffies;
 402 }
 403
 404 /******************************************************************************
 405  *
 406  * Misc. internal state and helper functions
 407  *
 408  ******************************************************************************/
 409 #ifdef CONFIG_IWL3945_DEBUG
 410
 411 /**
 412  * iwl3945_report_frame - dump frame to syslog during debug sessions
 413  *
 414  * You may hack this function to show different aspects of received frames,
 415  * including selective frame dumps.
 416  * group100 parameter selects whether to show 1 out of 100 good frames.
 417  */
 418 static void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
 419                       struct iwl3945_rx_packet *pkt,
 420                       struct ieee80211_hdr *header, int group100)
 421 {
 422         u32 to_us;
 423         u32 print_summary = 0;
 424         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
 425         u32 hundred = 0;
 426         u32 dataframe = 0;
 427         __le16 fc;
 428         u16 seq_ctl;
 429         u16 channel;
 430         u16 phy_flags;
 431         u16 length;
 432         u16 status;
 433         u16 bcn_tmr;
 434         u32 tsf_low;
 435         u64 tsf;
 436         u8 rssi;
 437         u8 agc;
 438         u16 sig_avg;
 439         u16 noise_diff;
 440         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 441         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 442         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 443         u8 *data = IWL_RX_DATA(pkt);
 444
 445         /* MAC header */
 446         fc = header->frame_control;
 447         seq_ctl = le16_to_cpu(header->seq_ctrl);
 448
 449         /* metadata */
 450         channel = le16_to_cpu(rx_hdr->channel);
 451         phy_flags = le16_to_cpu(rx_hdr->phy_flags);
 452         length = le16_to_cpu(rx_hdr->len);
 453
 454         /* end-of-frame status and timestamp */
 455         status = le32_to_cpu(rx_end->status);
 456         bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
 457         tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
 458         tsf = le64_to_cpu(rx_end->timestamp);
 459
 460         /* signal statistics */
 461         rssi = rx_stats->rssi;
 462         agc = rx_stats->agc;
 463         sig_avg = le16_to_cpu(rx_stats->sig_avg);
 464         noise_diff = le16_to_cpu(rx_stats->noise_diff);
 465
 466         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
 467
 468         /* if data frame is to us and all is good,
 469          *   (optionally) print summary for only 1 out of every 100 */
 470         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
 471             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
 472                 dataframe = 1;
 473                 if (!group100)
 474                         print_summary = 1;      /* print each frame */
 475                 else if (priv->framecnt_to_us < 100) {
 476                         priv->framecnt_to_us++;
 477                         print_summary = 0;
 478                 } else {
 479                         priv->framecnt_to_us = 0;
 480                         print_summary = 1;
 481                         hundred = 1;
 482                 }
 483         } else {
 484                 /* print summary for all other frames */
 485                 print_summary = 1;
 486         }
 487
 488         if (print_summary) {
 489                 char *title;
 490                 int rate;
 491
 492                 if (hundred)
 493                         title = "100Frames";
 494                 else if (ieee80211_has_retry(fc))
 495                         title = "Retry";
 496                 else if (ieee80211_is_assoc_resp(fc))
 497                         title = "AscRsp";
 498                 else if (ieee80211_is_reassoc_resp(fc))
 499                         title = "RasRsp";
 500                 else if (ieee80211_is_probe_resp(fc)) {
 501                         title = "PrbRsp";
 502                         print_dump = 1; /* dump frame contents */
 503                 } else if (ieee80211_is_beacon(fc)) {
 504                         title = "Beacon";
 505                         print_dump = 1; /* dump frame contents */
 506                 } else if (ieee80211_is_atim(fc))
 507                         title = "ATIM";
 508                 else if (ieee80211_is_auth(fc))
 509                         title = "Auth";
 510                 else if (ieee80211_is_deauth(fc))
 511                         title = "DeAuth";
 512                 else if (ieee80211_is_disassoc(fc))
 513                         title = "DisAssoc";
 514                 else
 515                         title = "Frame";
 516
 517                 rate = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 518                 if (rate == -1)
 519                         rate = 0;
 520                 else
 521                         rate = iwl3945_rates[rate].ieee / 2;
 522
 523                 /* print frame summary.
 524                  * MAC addresses show just the last byte (for brevity),
 525                  *    but you can hack it to show more, if you'd like to. */
 526                 if (dataframe)
 527                         IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
 528                                      "len=%u, rssi=%d, chnl=%d, rate=%d, \n",
 529                                      title, le16_to_cpu(fc), header->addr1[5],
 530                                      length, rssi, channel, rate);
 531                 else {
 532                         /* src/dst addresses assume managed mode */
 533                         IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
 534                                      "src=0x%02x, rssi=%u, tim=%lu usec, "
 535                                      "phy=0x%02x, chnl=%d\n",
 536                                      title, le16_to_cpu(fc), header->addr1[5],
 537                                      header->addr3[5], rssi,
 538                                      tsf_low - priv->scan_start_tsf,
 539                                      phy_flags, channel);
 540                 }
 541         }
 542         if (print_dump)
 543                 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
 544 }
 545 #else
 546 static inline void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
 547                       struct iwl3945_rx_packet *pkt,
 548                       struct ieee80211_hdr *header, int group100)
 549 {
 550 }
 551 #endif
 552
 553 /* This is necessary only for a number of statistics, see the caller. */
 554 static int iwl3945_is_network_packet(struct iwl3945_priv *priv,
 555                 struct ieee80211_hdr *header)
 556 {
 557         /* Filter incoming packets to determine if they are targeted toward
 558          * this network, discarding packets coming from ourselves */
 559         switch (priv->iw_mode) {
 560         case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source    | BSSID */
 561                 /* packets to our IBSS update information */
 562                 return !compare_ether_addr(header->addr3, priv->bssid);
 563         case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
 564                 /* packets to our IBSS update information */
 565                 return !compare_ether_addr(header->addr2, priv->bssid);
 566         default:
 567                 return 1;
 568         }
 569 }
 570
 571 static void iwl3945_pass_packet_to_mac80211(struct iwl3945_priv *priv,
 572                                    struct iwl3945_rx_mem_buffer *rxb,
 573                                    struct ieee80211_rx_status *stats)
 574 {
 575         struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
 576 #ifdef CONFIG_IWL3945_LEDS
 577         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 578 #endif
 579         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 580         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 581         short len = le16_to_cpu(rx_hdr->len);
 582
 583         /* We received data from the HW, so stop the watchdog */
 584         if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
 585                 IWL_DEBUG_DROP("Corruption detected!\n");
 586                 return;
 587         }
 588
 589         /* We only process data packets if the interface is open */
 590         if (unlikely(!priv->is_open)) {
 591                 IWL_DEBUG_DROP_LIMIT
 592                     ("Dropping packet while interface is not open.\n");
 593                 return;
 594         }
 595
 596         skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
 597         /* Set the size of the skb to the size of the frame */
 598         skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
 599
 600         if (iwl3945_param_hwcrypto)
 601                 iwl3945_set_decrypted_flag(priv, rxb->skb,
 602                                        le32_to_cpu(rx_end->status), stats);
 603
 604 #ifdef CONFIG_IWL3945_LEDS
 605         if (ieee80211_is_data(hdr->frame_control))
 606                 priv->rxtxpackets += len;
 607 #endif
 608         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
 609         rxb->skb = NULL;
 610 }
 611
 612 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
 613
 614 static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv,
 615                                 struct iwl3945_rx_mem_buffer *rxb)
 616 {
 617         struct ieee80211_hdr *header;
 618         struct ieee80211_rx_status rx_status;
 619         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 620         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 621         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 622         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 623         int snr;
 624         u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
 625         u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
 626         u8 network_packet;
 627
 628         rx_status.flag = 0;
 629         rx_status.mactime = le64_to_cpu(rx_end->timestamp);
 630         rx_status.freq =
 631                 ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel));
 632         rx_status.band = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 633                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
 634
 635         rx_status.rate_idx = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 636         if (rx_status.band == IEEE80211_BAND_5GHZ)
 637                 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
 638
 639         rx_status.antenna = le16_to_cpu(rx_hdr->phy_flags &
 640                                         RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
 641
 642         /* set the preamble flag if appropriate */
 643         if (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
 644                 rx_status.flag |= RX_FLAG_SHORTPRE;
 645
 646         if ((unlikely(rx_stats->phy_count > 20))) {
 647                 IWL_DEBUG_DROP
 648                     ("dsp size out of range [0,20]: "
 649                      "%d/n", rx_stats->phy_count);
 650                 return;
 651         }
 652
 653         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
 654             || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 655                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
 656                 return;
 657         }
 658
 659
 660
 661         /* Convert 3945's rssi indicator to dBm */
 662         rx_status.signal = rx_stats->rssi - IWL_RSSI_OFFSET;
 663
 664         /* Set default noise value to -127 */
 665         if (priv->last_rx_noise == 0)
 666                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
 667
 668         /* 3945 provides noise info for OFDM frames only.
 669          * sig_avg and noise_diff are measured by the 3945's digital signal
 670          *   processor (DSP), and indicate linear levels of signal level and
 671          *   distortion/noise within the packet preamble after
 672          *   automatic gain control (AGC).  sig_avg should stay fairly
 673          *   constant if the radio's AGC is working well.
 674          * Since these values are linear (not dB or dBm), linear
 675          *   signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
 676          * Convert linear SNR to dB SNR, then subtract that from rssi dBm
 677          *   to obtain noise level in dBm.
 678          * Calculate rx_status.signal (quality indicator in %) based on SNR. */
 679         if (rx_stats_noise_diff) {
 680                 snr = rx_stats_sig_avg / rx_stats_noise_diff;
 681                 rx_status.noise = rx_status.signal -
 682                                         iwl3945_calc_db_from_ratio(snr);
 683                 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal,
 684                                                          rx_status.noise);
 685
 686         /* If noise info not available, calculate signal quality indicator (%)
 687          *   using just the dBm signal level. */
 688         } else {
 689                 rx_status.noise = priv->last_rx_noise;
 690                 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal, 0);
 691         }
 692
 693
 694         IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
 695                         rx_status.signal, rx_status.noise, rx_status.qual,
 696                         rx_stats_sig_avg, rx_stats_noise_diff);
 697
 698         header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 699
 700         network_packet = iwl3945_is_network_packet(priv, header);
 701
 702         IWL_DEBUG_STATS_LIMIT("[%c] %d RSSI:%d Signal:%u, Noise:%u, Rate:%u\n",
 703                               network_packet ? '*' : ' ',
 704                               le16_to_cpu(rx_hdr->channel),
 705                               rx_status.signal, rx_status.signal,
 706                               rx_status.noise, rx_status.rate_idx);
 707
 708 #ifdef CONFIG_IWL3945_DEBUG
 709         if (iwl3945_debug_level & (IWL_DL_RX))
 710                 /* Set "1" to report good data frames in groups of 100 */
 711                 iwl3945_dbg_report_frame(priv, pkt, header, 1);
 712 #endif
 713
 714         if (network_packet) {
 715                 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
 716                 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
 717                 priv->last_rx_rssi = rx_status.signal;
 718                 priv->last_rx_noise = rx_status.noise;
 719         }
 720
 721         iwl3945_pass_packet_to_mac80211(priv, rxb, &rx_status);
 722 }
 723
 724 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *ptr,
 725                                  dma_addr_t addr, u16 len)
 726 {
 727         int count;
 728         u32 pad;
 729         struct iwl3945_tfd_frame *tfd = (struct iwl3945_tfd_frame *)ptr;
 730
 731         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 732         pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
 733
 734         if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
 735                 IWL_ERROR("Error can not send more than %d chunks\n",
 736                           NUM_TFD_CHUNKS);
 737                 return -EINVAL;
 738         }
 739
 740         tfd->pa[count].addr = cpu_to_le32(addr);
 741         tfd->pa[count].len = cpu_to_le32(len);
 742
 743         count++;
 744
 745         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
 746                                          TFD_CTL_PAD_SET(pad));
 747
 748         return 0;
 749 }
 750
 751 /**
 752  * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
 753  *
 754  * Does NOT advance any indexes
 755  */
 756 int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
 757 {
 758         struct iwl3945_tfd_frame *bd_tmp = (struct iwl3945_tfd_frame *)&txq->bd[0];
 759         struct iwl3945_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
 760         struct pci_dev *dev = priv->pci_dev;
 761         int i;
 762         int counter;
 763
 764         /* classify bd */
 765         if (txq->q.id == IWL_CMD_QUEUE_NUM)
 766                 /* nothing to cleanup after for host commands */
 767                 return 0;
 768
 769         /* sanity check */
 770         counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
 771         if (counter > NUM_TFD_CHUNKS) {
 772                 IWL_ERROR("Too many chunks: %i\n", counter);
 773                 /* @todo issue fatal error, it is quite serious situation */
 774                 return 0;
 775         }
 776
 777         /* unmap chunks if any */
 778
 779         for (i = 1; i < counter; i++) {
 780                 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
 781                                  le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
 782                 if (txq->txb[txq->q.read_ptr].skb[0]) {
 783                         struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
 784                         if (txq->txb[txq->q.read_ptr].skb[0]) {
 785                                 /* Can be called from interrupt context */
 786                                 dev_kfree_skb_any(skb);
 787                                 txq->txb[txq->q.read_ptr].skb[0] = NULL;
 788                         }
 789                 }
 790         }
 791         return 0;
 792 }
 793
 794 u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr)
 795 {
 796         int i, start = IWL_AP_ID;
 797         int ret = IWL_INVALID_STATION;
 798         unsigned long flags;
 799
 800         if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) ||
 801             (priv->iw_mode == NL80211_IFTYPE_AP))
 802                 start = IWL_STA_ID;
 803
 804         if (is_broadcast_ether_addr(addr))
 805                 return priv->hw_setting.bcast_sta_id;
 806
 807         spin_lock_irqsave(&priv->sta_lock, flags);
 808         for (i = start; i < priv->hw_setting.max_stations; i++)
 809                 if ((priv->stations[i].used) &&
 810                     (!compare_ether_addr
 811                      (priv->stations[i].sta.sta.addr, addr))) {
 812                         ret = i;
 813                         goto out;
 814                 }
 815
 816         IWL_DEBUG_INFO("can not find STA %pM (total %d)\n",
 817                        addr, priv->num_stations);
 818  out:
 819         spin_unlock_irqrestore(&priv->sta_lock, flags);
 820         return ret;
 821 }
 822
 823 /**
 824  * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
 825  *
 826 */
 827 void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv,
 828                               struct iwl3945_cmd *cmd,
 829                               struct ieee80211_tx_info *info,
 830                               struct ieee80211_hdr *hdr, int sta_id, int tx_id)
 831 {
 832         unsigned long flags;
 833         u16 hw_value = ieee80211_get_tx_rate(priv->hw, info)->hw_value;
 834         u16 rate_index = min(hw_value & 0xffff, IWL_RATE_COUNT - 1);
 835         u16 rate_mask;
 836         int rate;
 837         u8 rts_retry_limit;
 838         u8 data_retry_limit;
 839         __le32 tx_flags;
 840         __le16 fc = hdr->frame_control;
 841
 842         rate = iwl3945_rates[rate_index].plcp;
 843         tx_flags = cmd->cmd.tx.tx_flags;
 844
 845         /* We need to figure out how to get the sta->supp_rates while
 846          * in this running context */
 847         rate_mask = IWL_RATES_MASK;
 848
 849         spin_lock_irqsave(&priv->sta_lock, flags);
 850
 851         priv->stations[sta_id].current_rate.rate_n_flags = rate;
 852
 853         if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
 854             (sta_id != priv->hw_setting.bcast_sta_id) &&
 855                 (sta_id != IWL_MULTICAST_ID))
 856                 priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
 857
 858         spin_unlock_irqrestore(&priv->sta_lock, flags);
 859
 860         if (tx_id >= IWL_CMD_QUEUE_NUM)
 861                 rts_retry_limit = 3;
 862         else
 863                 rts_retry_limit = 7;
 864
 865         if (ieee80211_is_probe_resp(fc)) {
 866                 data_retry_limit = 3;
 867                 if (data_retry_limit < rts_retry_limit)
 868                         rts_retry_limit = data_retry_limit;
 869         } else
 870                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
 871
 872         if (priv->data_retry_limit != -1)
 873                 data_retry_limit = priv->data_retry_limit;
 874
 875         if (ieee80211_is_mgmt(fc)) {
 876                 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
 877                 case cpu_to_le16(IEEE80211_STYPE_AUTH):
 878                 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
 879                 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
 880                 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
 881                         if (tx_flags & TX_CMD_FLG_RTS_MSK) {
 882                                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 883                                 tx_flags |= TX_CMD_FLG_CTS_MSK;
 884                         }
 885                         break;
 886                 default:
 887                         break;
 888                 }
 889         }
 890
 891         cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
 892         cmd->cmd.tx.data_retry_limit = data_retry_limit;
 893         cmd->cmd.tx.rate = rate;
 894         cmd->cmd.tx.tx_flags = tx_flags;
 895
 896         /* OFDM */
 897         cmd->cmd.tx.supp_rates[0] =
 898            ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
 899
 900         /* CCK */
 901         cmd->cmd.tx.supp_rates[1] = (rate_mask & 0xF);
 902
 903         IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
 904                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
 905                        cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
 906                        cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
 907 }
 908
 909 u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, u16 tx_rate, u8 flags)
 910 {
 911         unsigned long flags_spin;
 912         struct iwl3945_station_entry *station;
 913
 914         if (sta_id == IWL_INVALID_STATION)
 915                 return IWL_INVALID_STATION;
 916
 917         spin_lock_irqsave(&priv->sta_lock, flags_spin);
 918         station = &priv->stations[sta_id];
 919
 920         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
 921         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
 922         station->current_rate.rate_n_flags = tx_rate;
 923         station->sta.mode = STA_CONTROL_MODIFY_MSK;
 924
 925         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
 926
 927         iwl3945_send_add_station(priv, &station->sta, flags);
 928         IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
 929                         sta_id, tx_rate);
 930         return sta_id;
 931 }
 932
 933 static int iwl3945_nic_set_pwr_src(struct iwl3945_priv *priv, int pwr_max)
 934 {
 935         int rc;
 936         unsigned long flags;
 937
 938         spin_lock_irqsave(&priv->lock, flags);
 939         rc = iwl3945_grab_nic_access(priv);
 940         if (rc) {
 941                 spin_unlock_irqrestore(&priv->lock, flags);
 942                 return rc;
 943         }
 944
 945         if (!pwr_max) {
 946                 u32 val;
 947
 948                 rc = pci_read_config_dword(priv->pci_dev,
 949                                 PCI_POWER_SOURCE, &val);
 950                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
 951                         iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 952                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 953                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
 954                         iwl3945_release_nic_access(priv);
 955
 956                         iwl3945_poll_bit(priv, CSR_GPIO_IN,
 957                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
 958                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
 959                 } else
 960                         iwl3945_release_nic_access(priv);
 961         } else {
 962                 iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 963                                 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 964                                 ~APMG_PS_CTRL_MSK_PWR_SRC);
 965
 966                 iwl3945_release_nic_access(priv);
 967                 iwl3945_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
 968                              CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
 969         }
 970         spin_unlock_irqrestore(&priv->lock, flags);
 971
 972         return rc;
 973 }
 974
 975 static int iwl3945_rx_init(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
 976 {
 977         int rc;
 978         unsigned long flags;
 979
 980         spin_lock_irqsave(&priv->lock, flags);
 981         rc = iwl3945_grab_nic_access(priv);
 982         if (rc) {
 983                 spin_unlock_irqrestore(&priv->lock, flags);
 984                 return rc;
 985         }
 986
 987         iwl3945_write_direct32(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
 988         iwl3945_write_direct32(priv, FH_RCSR_RPTR_ADDR(0),
 989                              priv->hw_setting.shared_phys +
 990                              offsetof(struct iwl3945_shared, rx_read_ptr[0]));
 991         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), 0);
 992         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0),
 993                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
 994                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
 995                 ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
 996                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
 997                 (RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
 998                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
 999                 (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
1000                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
1001
1002         /* fake read to flush all prev I/O */
1003         iwl3945_read_direct32(priv, FH_RSSR_CTRL);
1004
1005         iwl3945_release_nic_access(priv);
1006         spin_unlock_irqrestore(&priv->lock, flags);
1007
1008         return 0;
1009 }
1010
1011 static int iwl3945_tx_reset(struct iwl3945_priv *priv)
1012 {
1013         int rc;
1014         unsigned long flags;
1015
1016         spin_lock_irqsave(&priv->lock, flags);
1017         rc = iwl3945_grab_nic_access(priv);
1018         if (rc) {
1019                 spin_unlock_irqrestore(&priv->lock, flags);
1020                 return rc;
1021         }
1022
1023         /* bypass mode */
1024         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
1025
1026         /* RA 0 is active */
1027         iwl3945_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
1028
1029         /* all 6 fifo are active */
1030         iwl3945_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
1031
1032         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
1033         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
1034         iwl3945_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
1035         iwl3945_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
1036
1037         iwl3945_write_direct32(priv, FH_TSSR_CBB_BASE,
1038                              priv->hw_setting.shared_phys);
1039
1040         iwl3945_write_direct32(priv, FH_TSSR_MSG_CONFIG,
1041                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
1042                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
1043                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
1044                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
1045                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
1046                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
1047                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
1048
1049         iwl3945_release_nic_access(priv);
1050         spin_unlock_irqrestore(&priv->lock, flags);
1051
1052         return 0;
1053 }
1054
1055 /**
1056  * iwl3945_txq_ctx_reset - Reset TX queue context
1057  *
1058  * Destroys all DMA structures and initialize them again
1059  */
1060 static int iwl3945_txq_ctx_reset(struct iwl3945_priv *priv)
1061 {
1062         int rc;
1063         int txq_id, slots_num;
1064
1065         iwl3945_hw_txq_ctx_free(priv);
1066
1067         /* Tx CMD queue */
1068         rc = iwl3945_tx_reset(priv);
1069         if (rc)
1070                 goto error;
1071
1072         /* Tx queue(s) */
1073         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
1074                 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
1075                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
1076                 rc = iwl3945_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
1077                                 txq_id);
1078                 if (rc) {
1079                         IWL_ERROR("Tx %d queue init failed\n", txq_id);
1080                         goto error;
1081                 }
1082         }
1083
1084         return rc;
1085
1086  error:
1087         iwl3945_hw_txq_ctx_free(priv);
1088         return rc;
1089 }
1090
1091 int iwl3945_hw_nic_init(struct iwl3945_priv *priv)
1092 {
1093         u8 rev_id;
1094         int rc;
1095         unsigned long flags;
1096         struct iwl3945_rx_queue *rxq = &priv->rxq;
1097
1098         iwl3945_power_init_handle(priv);
1099
1100         spin_lock_irqsave(&priv->lock, flags);
1101         iwl3945_set_bit(priv, CSR_ANA_PLL_CFG, CSR39_ANA_PLL_CFG_VAL);
1102         iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1103                     CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1104
1105         iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1106         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1107                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1108                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1109         if (rc < 0) {
1110                 spin_unlock_irqrestore(&priv->lock, flags);
1111                 IWL_DEBUG_INFO("Failed to init the card\n");
1112                 return rc;
1113         }
1114
1115         rc = iwl3945_grab_nic_access(priv);
1116         if (rc) {
1117                 spin_unlock_irqrestore(&priv->lock, flags);
1118                 return rc;
1119         }
1120         iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1121                                  APMG_CLK_VAL_DMA_CLK_RQT |
1122                                  APMG_CLK_VAL_BSM_CLK_RQT);
1123         udelay(20);
1124         iwl3945_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1125                                     APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1126         iwl3945_release_nic_access(priv);
1127         spin_unlock_irqrestore(&priv->lock, flags);
1128
1129         /* Determine HW type */
1130         rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
1131         if (rc)
1132                 return rc;
1133         IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
1134
1135         iwl3945_nic_set_pwr_src(priv, 1);
1136         spin_lock_irqsave(&priv->lock, flags);
1137
1138         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
1139                 IWL_DEBUG_INFO("RTP type \n");
1140         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
1141                 IWL_DEBUG_INFO("3945 RADIO-MB type\n");
1142                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1143                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
1144         } else {
1145                 IWL_DEBUG_INFO("3945 RADIO-MM type\n");
1146                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1147                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
1148         }
1149
1150         if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
1151                 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
1152                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1153                             CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
1154         } else
1155                 IWL_DEBUG_INFO("SKU OP mode is basic\n");
1156
1157         if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
1158                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1159                                priv->eeprom.board_revision);
1160                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1161                             CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1162         } else {
1163                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1164                                priv->eeprom.board_revision);
1165                 iwl3945_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1166                               CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1167         }
1168
1169         if (priv->eeprom.almgor_m_version <= 1) {
1170                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1171                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
1172                 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
1173                                priv->eeprom.almgor_m_version);
1174         } else {
1175                 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
1176                                priv->eeprom.almgor_m_version);
1177                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1178                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
1179         }
1180         spin_unlock_irqrestore(&priv->lock, flags);
1181
1182         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
1183                 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
1184
1185         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
1186                 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
1187
1188         /* Allocate the RX queue, or reset if it is already allocated */
1189         if (!rxq->bd) {
1190                 rc = iwl3945_rx_queue_alloc(priv);
1191                 if (rc) {
1192                         IWL_ERROR("Unable to initialize Rx queue\n");
1193                         return -ENOMEM;
1194                 }
1195         } else
1196                 iwl3945_rx_queue_reset(priv, rxq);
1197
1198         iwl3945_rx_replenish(priv);
1199
1200         iwl3945_rx_init(priv, rxq);
1201
1202         spin_lock_irqsave(&priv->lock, flags);
1203
1204         /* Look at using this instead:
1205         rxq->need_update = 1;
1206         iwl3945_rx_queue_update_write_ptr(priv, rxq);
1207         */
1208
1209         rc = iwl3945_grab_nic_access(priv);
1210         if (rc) {
1211                 spin_unlock_irqrestore(&priv->lock, flags);
1212                 return rc;
1213         }
1214         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
1215         iwl3945_release_nic_access(priv);
1216
1217         spin_unlock_irqrestore(&priv->lock, flags);
1218
1219         rc = iwl3945_txq_ctx_reset(priv);
1220         if (rc)
1221                 return rc;
1222
1223         set_bit(STATUS_INIT, &priv->status);
1224
1225         return 0;
1226 }
1227
1228 /**
1229  * iwl3945_hw_txq_ctx_free - Free TXQ Context
1230  *
1231  * Destroy all TX DMA queues and structures
1232  */
1233 void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv)
1234 {
1235         int txq_id;
1236
1237         /* Tx queues */
1238         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1239                 iwl3945_tx_queue_free(priv, &priv->txq[txq_id]);
1240 }
1241
1242 void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv)
1243 {
1244         int queue;
1245         unsigned long flags;
1246
1247         spin_lock_irqsave(&priv->lock, flags);
1248         if (iwl3945_grab_nic_access(priv)) {
1249                 spin_unlock_irqrestore(&priv->lock, flags);
1250                 iwl3945_hw_txq_ctx_free(priv);
1251                 return;
1252         }
1253
1254         /* stop SCD */
1255         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0);
1256
1257         /* reset TFD queues */
1258         for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
1259                 iwl3945_write_direct32(priv, FH_TCSR_CONFIG(queue), 0x0);
1260                 iwl3945_poll_direct_bit(priv, FH_TSSR_TX_STATUS,
1261                                 ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1262                                 1000);
1263         }
1264
1265         iwl3945_release_nic_access(priv);
1266         spin_unlock_irqrestore(&priv->lock, flags);
1267
1268         iwl3945_hw_txq_ctx_free(priv);
1269 }
1270
1271 int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv)
1272 {
1273         int rc = 0;
1274         u32 reg_val;
1275         unsigned long flags;
1276
1277         spin_lock_irqsave(&priv->lock, flags);
1278
1279         /* set stop master bit */
1280         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1281
1282         reg_val = iwl3945_read32(priv, CSR_GP_CNTRL);
1283
1284         if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1285             (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1286                 IWL_DEBUG_INFO("Card in power save, master is already "
1287                                "stopped\n");
1288         else {
1289                 rc = iwl3945_poll_bit(priv, CSR_RESET,
1290                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
1291                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1292                 if (rc < 0) {
1293                         spin_unlock_irqrestore(&priv->lock, flags);
1294                         return rc;
1295                 }
1296         }
1297
1298         spin_unlock_irqrestore(&priv->lock, flags);
1299         IWL_DEBUG_INFO("stop master\n");
1300
1301         return rc;
1302 }
1303
1304 int iwl3945_hw_nic_reset(struct iwl3945_priv *priv)
1305 {
1306         int rc;
1307         unsigned long flags;
1308
1309         iwl3945_hw_nic_stop_master(priv);
1310
1311         spin_lock_irqsave(&priv->lock, flags);
1312
1313         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1314
1315         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1316                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1317                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1318
1319         rc = iwl3945_grab_nic_access(priv);
1320         if (!rc) {
1321                 iwl3945_write_prph(priv, APMG_CLK_CTRL_REG,
1322                                          APMG_CLK_VAL_BSM_CLK_RQT);
1323
1324                 udelay(10);
1325
1326                 iwl3945_set_bit(priv, CSR_GP_CNTRL,
1327                             CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1328
1329                 iwl3945_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1330                 iwl3945_write_prph(priv, APMG_RTC_INT_STT_REG,
1331                                         0xFFFFFFFF);
1332
1333                 /* enable DMA */
1334                 iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1335                                          APMG_CLK_VAL_DMA_CLK_RQT |
1336                                          APMG_CLK_VAL_BSM_CLK_RQT);
1337                 udelay(10);
1338
1339                 iwl3945_set_bits_prph(priv, APMG_PS_CTRL_REG,
1340                                 APMG_PS_CTRL_VAL_RESET_REQ);
1341                 udelay(5);
1342                 iwl3945_clear_bits_prph(priv, APMG_PS_CTRL_REG,
1343                                 APMG_PS_CTRL_VAL_RESET_REQ);
1344                 iwl3945_release_nic_access(priv);
1345         }
1346
1347         /* Clear the 'host command active' bit... */
1348         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1349
1350         wake_up_interruptible(&priv->wait_command_queue);
1351         spin_unlock_irqrestore(&priv->lock, flags);
1352
1353         return rc;
1354 }
1355
1356 /**
1357  * iwl3945_hw_reg_adjust_power_by_temp
1358  * return index delta into power gain settings table
1359 */
1360 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1361 {
1362         return (new_reading - old_reading) * (-11) / 100;
1363 }
1364
1365 /**
1366  * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1367  */
1368 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1369 {
1370         return ((temperature < -260) || (temperature > 25)) ? 1 : 0;
1371 }
1372
1373 int iwl3945_hw_get_temperature(struct iwl3945_priv *priv)
1374 {
1375         return iwl3945_read32(priv, CSR_UCODE_DRV_GP2);
1376 }
1377
1378 /**
1379  * iwl3945_hw_reg_txpower_get_temperature
1380  * get the current temperature by reading from NIC
1381 */
1382 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv *priv)
1383 {
1384         int temperature;
1385
1386         temperature = iwl3945_hw_get_temperature(priv);
1387
1388         /* driver's okay range is -260 to +25.
1389          *   human readable okay range is 0 to +285 */
1390         IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1391
1392         /* handle insane temp reading */
1393         if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1394                 IWL_ERROR("Error bad temperature value  %d\n", temperature);
1395
1396                 /* if really really hot(?),
1397                  *   substitute the 3rd band/group's temp measured at factory */
1398                 if (priv->last_temperature > 100)
1399                         temperature = priv->eeprom.groups[2].temperature;
1400                 else /* else use most recent "sane" value from driver */
1401                         temperature = priv->last_temperature;
1402         }
1403
1404         return temperature;     /* raw, not "human readable" */
1405 }
1406
1407 /* Adjust Txpower only if temperature variance is greater than threshold.
1408  *
1409  * Both are lower than older versions' 9 degrees */
1410 #define IWL_TEMPERATURE_LIMIT_TIMER   6
1411
1412 /**
1413  * is_temp_calib_needed - determines if new calibration is needed
1414  *
1415  * records new temperature in tx_mgr->temperature.
1416  * replaces tx_mgr->last_temperature *only* if calib needed
1417  *    (assumes caller will actually do the calibration!). */
1418 static int is_temp_calib_needed(struct iwl3945_priv *priv)
1419 {
1420         int temp_diff;
1421
1422         priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1423         temp_diff = priv->temperature - priv->last_temperature;
1424
1425         /* get absolute value */
1426         if (temp_diff < 0) {
1427                 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1428                 temp_diff = -temp_diff;
1429         } else if (temp_diff == 0)
1430                 IWL_DEBUG_POWER("Same temp,\n");
1431         else
1432                 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1433
1434         /* if we don't need calibration, *don't* update last_temperature */
1435         if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1436                 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1437                 return 0;
1438         }
1439
1440         IWL_DEBUG_POWER("Timed thermal calib needed\n");
1441
1442         /* assume that caller will actually do calib ...
1443          *   update the "last temperature" value */
1444         priv->last_temperature = priv->temperature;
1445         return 1;
1446 }
1447
1448 #define IWL_MAX_GAIN_ENTRIES 78
1449 #define IWL_CCK_FROM_OFDM_POWER_DIFF  -5
1450 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1451
1452 /* radio and DSP power table, each step is 1/2 dB.
1453  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1454 static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1455         {
1456          {251, 127},            /* 2.4 GHz, highest power */
1457          {251, 127},
1458          {251, 127},
1459          {251, 127},
1460          {251, 125},
1461          {251, 110},
1462          {251, 105},
1463          {251, 98},
1464          {187, 125},
1465          {187, 115},
1466          {187, 108},
1467          {187, 99},
1468          {243, 119},
1469          {243, 111},
1470          {243, 105},
1471          {243, 97},
1472          {243, 92},
1473          {211, 106},
1474          {211, 100},
1475          {179, 120},
1476          {179, 113},
1477          {179, 107},
1478          {147, 125},
1479          {147, 119},
1480          {147, 112},
1481          {147, 106},
1482          {147, 101},
1483          {147, 97},
1484          {147, 91},
1485          {115, 107},
1486          {235, 121},
1487          {235, 115},
1488          {235, 109},
1489          {203, 127},
1490          {203, 121},
1491          {203, 115},
1492          {203, 108},
1493          {203, 102},
1494          {203, 96},
1495          {203, 92},
1496          {171, 110},
1497          {171, 104},
1498          {171, 98},
1499          {139, 116},
1500          {227, 125},
1501          {227, 119},
1502          {227, 113},
1503          {227, 107},
1504          {227, 101},
1505          {227, 96},
1506          {195, 113},
1507          {195, 106},
1508          {195, 102},
1509          {195, 95},
1510          {163, 113},
1511          {163, 106},
1512          {163, 102},
1513          {163, 95},
1514          {131, 113},
1515          {131, 106},
1516          {131, 102},
1517          {131, 95},
1518          {99, 113},
1519          {99, 106},
1520          {99, 102},
1521          {99, 95},
1522          {67, 113},
1523          {67, 106},
1524          {67, 102},
1525          {67, 95},
1526          {35, 113},
1527          {35, 106},
1528          {35, 102},
1529          {35, 95},
1530          {3, 113},
1531          {3, 106},
1532          {3, 102},
1533          {3, 95} },             /* 2.4 GHz, lowest power */
1534         {
1535          {251, 127},            /* 5.x GHz, highest power */
1536          {251, 120},
1537          {251, 114},
1538          {219, 119},
1539          {219, 101},
1540          {187, 113},
1541          {187, 102},
1542          {155, 114},
1543          {155, 103},
1544          {123, 117},
1545          {123, 107},
1546          {123, 99},
1547          {123, 92},
1548          {91, 108},
1549          {59, 125},
1550          {59, 118},
1551          {59, 109},
1552          {59, 102},
1553          {59, 96},
1554          {59, 90},
1555          {27, 104},
1556          {27, 98},
1557          {27, 92},
1558          {115, 118},
1559          {115, 111},
1560          {115, 104},
1561          {83, 126},
1562          {83, 121},
1563          {83, 113},
1564          {83, 105},
1565          {83, 99},
1566          {51, 118},
1567          {51, 111},
1568          {51, 104},
1569          {51, 98},
1570          {19, 116},
1571          {19, 109},
1572          {19, 102},
1573          {19, 98},
1574          {19, 93},
1575          {171, 113},
1576          {171, 107},
1577          {171, 99},
1578          {139, 120},
1579          {139, 113},
1580          {139, 107},
1581          {139, 99},
1582          {107, 120},
1583          {107, 113},
1584          {107, 107},
1585          {107, 99},
1586          {75, 120},
1587          {75, 113},
1588          {75, 107},
1589          {75, 99},
1590          {43, 120},
1591          {43, 113},
1592          {43, 107},
1593          {43, 99},
1594          {11, 120},
1595          {11, 113},
1596          {11, 107},
1597          {11, 99},
1598          {131, 107},
1599          {131, 99},
1600          {99, 120},
1601          {99, 113},
1602          {99, 107},
1603          {99, 99},
1604          {67, 120},
1605          {67, 113},
1606          {67, 107},
1607          {67, 99},
1608          {35, 120},
1609          {35, 113},
1610          {35, 107},
1611          {35, 99},
1612          {3, 120} }             /* 5.x GHz, lowest power */
1613 };
1614
1615 static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1616 {
1617         if (index < 0)
1618                 return 0;
1619         if (index >= IWL_MAX_GAIN_ENTRIES)
1620                 return IWL_MAX_GAIN_ENTRIES - 1;
1621         return (u8) index;
1622 }
1623
1624 /* Kick off thermal recalibration check every 60 seconds */
1625 #define REG_RECALIB_PERIOD (60)
1626
1627 /**
1628  * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1629  *
1630  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1631  * or 6 Mbit (OFDM) rates.
1632  */
1633 static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv *priv, u32 scan_tbl_index,
1634                                s32 rate_index, const s8 *clip_pwrs,
1635                                struct iwl3945_channel_info *ch_info,
1636                                int band_index)
1637 {
1638         struct iwl3945_scan_power_info *scan_power_info;
1639         s8 power;
1640         u8 power_index;
1641
1642         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1643
1644         /* use this channel group's 6Mbit clipping/saturation pwr,
1645          *   but cap at regulatory scan power restriction (set during init
1646          *   based on eeprom channel data) for this channel.  */
1647         power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1648
1649         /* further limit to user's max power preference.
1650          * FIXME:  Other spectrum management power limitations do not
1651          *   seem to apply?? */
1652         power = min(power, priv->user_txpower_limit);
1653         scan_power_info->requested_power = power;
1654
1655         /* find difference between new scan *power* and current "normal"
1656          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1657          *   current "normal" temperature-compensated Tx power *index* for
1658          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1659          *   *index*. */
1660         power_index = ch_info->power_info[rate_index].power_table_index
1661             - (power - ch_info->power_info
1662                [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1663
1664         /* store reference index that we use when adjusting *all* scan
1665          *   powers.  So we can accommodate user (all channel) or spectrum
1666          *   management (single channel) power changes "between" temperature
1667          *   feedback compensation procedures.
1668          * don't force fit this reference index into gain table; it may be a
1669          *   negative number.  This will help avoid errors when we're at
1670          *   the lower bounds (highest gains, for warmest temperatures)
1671          *   of the table. */
1672
1673         /* don't exceed table bounds for "real" setting */
1674         power_index = iwl3945_hw_reg_fix_power_index(power_index);
1675
1676         scan_power_info->power_table_index = power_index;
1677         scan_power_info->tpc.tx_gain =
1678             power_gain_table[band_index][power_index].tx_gain;
1679         scan_power_info->tpc.dsp_atten =
1680             power_gain_table[band_index][power_index].dsp_atten;
1681 }
1682
1683 /**
1684  * iwl3945_hw_reg_send_txpower - fill in Tx Power command with gain settings
1685  *
1686  * Configures power settings for all rates for the current channel,
1687  * using values from channel info struct, and send to NIC
1688  */
1689 int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv)
1690 {
1691         int rate_idx, i;
1692         const struct iwl3945_channel_info *ch_info = NULL;
1693         struct iwl3945_txpowertable_cmd txpower = {
1694                 .channel = priv->active_rxon.channel,
1695         };
1696
1697         txpower.band = (priv->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1698         ch_info = iwl3945_get_channel_info(priv,
1699                                        priv->band,
1700                                        le16_to_cpu(priv->active_rxon.channel));
1701         if (!ch_info) {
1702                 IWL_ERROR
1703                     ("Failed to get channel info for channel %d [%d]\n",
1704                      le16_to_cpu(priv->active_rxon.channel), priv->band);
1705                 return -EINVAL;
1706         }
1707
1708         if (!is_channel_valid(ch_info)) {
1709                 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1710                                 "non-Tx channel.\n");
1711                 return 0;
1712         }
1713
1714         /* fill cmd with power settings for all rates for current channel */
1715         /* Fill OFDM rate */
1716         for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1717              rate_idx <= IWL_LAST_OFDM_RATE; rate_idx++, i++) {
1718
1719                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1720                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1721
1722                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1723                                 le16_to_cpu(txpower.channel),
1724                                 txpower.band,
1725                                 txpower.power[i].tpc.tx_gain,
1726                                 txpower.power[i].tpc.dsp_atten,
1727                                 txpower.power[i].rate);
1728         }
1729         /* Fill CCK rates */
1730         for (rate_idx = IWL_FIRST_CCK_RATE;
1731              rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1732                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1733                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1734
1735                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1736                                 le16_to_cpu(txpower.channel),
1737                                 txpower.band,
1738                                 txpower.power[i].tpc.tx_gain,
1739                                 txpower.power[i].tpc.dsp_atten,
1740                                 txpower.power[i].rate);
1741         }
1742
1743         return iwl3945_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1744                         sizeof(struct iwl3945_txpowertable_cmd), &txpower);
1745
1746 }
1747
1748 /**
1749  * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1750  * @ch_info: Channel to update.  Uses power_info.requested_power.
1751  *
1752  * Replace requested_power and base_power_index ch_info fields for
1753  * one channel.
1754  *
1755  * Called if user or spectrum management changes power preferences.
1756  * Takes into account h/w and modulation limitations (clip power).
1757  *
1758  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1759  *
1760  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1761  *       properly fill out the scan powers, and actual h/w gain settings,
1762  *       and send changes to NIC
1763  */
1764 static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv *priv,
1765                              struct iwl3945_channel_info *ch_info)
1766 {
1767         struct iwl3945_channel_power_info *power_info;
1768         int power_changed = 0;
1769         int i;
1770         const s8 *clip_pwrs;
1771         int power;
1772
1773         /* Get this chnlgrp's rate-to-max/clip-powers table */
1774         clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1775
1776         /* Get this channel's rate-to-current-power settings table */
1777         power_info = ch_info->power_info;
1778
1779         /* update OFDM Txpower settings */
1780         for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1781              i++, ++power_info) {
1782                 int delta_idx;
1783
1784                 /* limit new power to be no more than h/w capability */
1785                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1786                 if (power == power_info->requested_power)
1787                         continue;
1788
1789                 /* find difference between old and new requested powers,
1790                  *    update base (non-temp-compensated) power index */
1791                 delta_idx = (power - power_info->requested_power) * 2;
1792                 power_info->base_power_index -= delta_idx;
1793
1794                 /* save new requested power value */
1795                 power_info->requested_power = power;
1796
1797                 power_changed = 1;
1798         }
1799
1800         /* update CCK Txpower settings, based on OFDM 12M setting ...
1801          *    ... all CCK power settings for a given channel are the *same*. */
1802         if (power_changed) {
1803                 power =
1804                     ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1805                     requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1806
1807                 /* do all CCK rates' iwl3945_channel_power_info structures */
1808                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1809                         power_info->requested_power = power;
1810                         power_info->base_power_index =
1811                             ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1812                             base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1813                         ++power_info;
1814                 }
1815         }
1816
1817         return 0;
1818 }
1819
1820 /**
1821  * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1822  *
1823  * NOTE: Returned power limit may be less (but not more) than requested,
1824  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1825  *       (no consideration for h/w clipping limitations).
1826  */
1827 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl3945_channel_info *ch_info)
1828 {
1829         s8 max_power;
1830
1831 #if 0
1832         /* if we're using TGd limits, use lower of TGd or EEPROM */
1833         if (ch_info->tgd_data.max_power != 0)
1834                 max_power = min(ch_info->tgd_data.max_power,
1835                                 ch_info->eeprom.max_power_avg);
1836
1837         /* else just use EEPROM limits */
1838         else
1839 #endif
1840                 max_power = ch_info->eeprom.max_power_avg;
1841
1842         return min(max_power, ch_info->max_power_avg);
1843 }
1844
1845 /**
1846  * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1847  *
1848  * Compensate txpower settings of *all* channels for temperature.
1849  * This only accounts for the difference between current temperature
1850  *   and the factory calibration temperatures, and bases the new settings
1851  *   on the channel's base_power_index.
1852  *
1853  * If RxOn is "associated", this sends the new Txpower to NIC!
1854  */
1855 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv)
1856 {
1857         struct iwl3945_channel_info *ch_info = NULL;
1858         int delta_index;
1859         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1860         u8 a_band;
1861         u8 rate_index;
1862         u8 scan_tbl_index;
1863         u8 i;
1864         int ref_temp;
1865         int temperature = priv->temperature;
1866
1867         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1868         for (i = 0; i < priv->channel_count; i++) {
1869                 ch_info = &priv->channel_info[i];
1870                 a_band = is_channel_a_band(ch_info);
1871
1872                 /* Get this chnlgrp's factory calibration temperature */
1873                 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
1874                     temperature;
1875
1876                 /* get power index adjustment based on current and factory
1877                  * temps */
1878                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
1879                                                               ref_temp);
1880
1881                 /* set tx power value for all rates, OFDM and CCK */
1882                 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
1883                      rate_index++) {
1884                         int power_idx =
1885                             ch_info->power_info[rate_index].base_power_index;
1886
1887                         /* temperature compensate */
1888                         power_idx += delta_index;
1889
1890                         /* stay within table range */
1891                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
1892                         ch_info->power_info[rate_index].
1893                             power_table_index = (u8) power_idx;
1894                         ch_info->power_info[rate_index].tpc =
1895                             power_gain_table[a_band][power_idx];
1896                 }
1897
1898                 /* Get this chnlgrp's rate-to-max/clip-powers table */
1899                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1900
1901                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1902                 for (scan_tbl_index = 0;
1903                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
1904                         s32 actual_index = (scan_tbl_index == 0) ?
1905                             IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
1906                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
1907                                            actual_index, clip_pwrs,
1908                                            ch_info, a_band);
1909                 }
1910         }
1911
1912         /* send Txpower command for current channel to ucode */
1913         return iwl3945_hw_reg_send_txpower(priv);
1914 }
1915
1916 int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power)
1917 {
1918         struct iwl3945_channel_info *ch_info;
1919         s8 max_power;
1920         u8 a_band;
1921         u8 i;
1922
1923         if (priv->user_txpower_limit == power) {
1924                 IWL_DEBUG_POWER("Requested Tx power same as current "
1925                                 "limit: %ddBm.\n", power);
1926                 return 0;
1927         }
1928
1929         IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
1930         priv->user_txpower_limit = power;
1931
1932         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1933
1934         for (i = 0; i < priv->channel_count; i++) {
1935                 ch_info = &priv->channel_info[i];
1936                 a_band = is_channel_a_band(ch_info);
1937
1938                 /* find minimum power of all user and regulatory constraints
1939                  *    (does not consider h/w clipping limitations) */
1940                 max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
1941                 max_power = min(power, max_power);
1942                 if (max_power != ch_info->curr_txpow) {
1943                         ch_info->curr_txpow = max_power;
1944
1945                         /* this considers the h/w clipping limitations */
1946                         iwl3945_hw_reg_set_new_power(priv, ch_info);
1947                 }
1948         }
1949
1950         /* update txpower settings for all channels,
1951          *   send to NIC if associated. */
1952         is_temp_calib_needed(priv);
1953         iwl3945_hw_reg_comp_txpower_temp(priv);
1954
1955         return 0;
1956 }
1957
1958 /* will add 3945 channel switch cmd handling later */
1959 int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel)
1960 {
1961         return 0;
1962 }
1963
1964 /**
1965  * iwl3945_reg_txpower_periodic -  called when time to check our temperature.
1966  *
1967  * -- reset periodic timer
1968  * -- see if temp has changed enough to warrant re-calibration ... if so:
1969  *     -- correct coeffs for temp (can reset temp timer)
1970  *     -- save this temp as "last",
1971  *     -- send new set of gain settings to NIC
1972  * NOTE:  This should continue working, even when we're not associated,
1973  *   so we can keep our internal table of scan powers current. */
1974 void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv)
1975 {
1976         /* This will kick in the "brute force"
1977          * iwl3945_hw_reg_comp_txpower_temp() below */
1978         if (!is_temp_calib_needed(priv))
1979                 goto reschedule;
1980
1981         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1982          * This is based *only* on current temperature,
1983          * ignoring any previous power measurements */
1984         iwl3945_hw_reg_comp_txpower_temp(priv);
1985
1986  reschedule:
1987         queue_delayed_work(priv->workqueue,
1988                            &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
1989 }
1990
1991 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
1992 {
1993         struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv,
1994                                              thermal_periodic.work);
1995
1996         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1997                 return;
1998
1999         mutex_lock(&priv->mutex);
2000         iwl3945_reg_txpower_periodic(priv);
2001         mutex_unlock(&priv->mutex);
2002 }
2003
2004 /**
2005  * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
2006  *                                 for the channel.
2007  *
2008  * This function is used when initializing channel-info structs.
2009  *
2010  * NOTE: These channel groups do *NOT* match the bands above!
2011  *       These channel groups are based on factory-tested channels;
2012  *       on A-band, EEPROM's "group frequency" entries represent the top
2013  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
2014  */
2015 static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl3945_priv *priv,
2016                                        const struct iwl3945_channel_info *ch_info)
2017 {
2018         struct iwl3945_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
2019         u8 group;
2020         u16 group_index = 0;    /* based on factory calib frequencies */
2021         u8 grp_channel;
2022
2023         /* Find the group index for the channel ... don't use index 1(?) */
2024         if (is_channel_a_band(ch_info)) {
2025                 for (group = 1; group < 5; group++) {
2026                         grp_channel = ch_grp[group].group_channel;
2027                         if (ch_info->channel <= grp_channel) {
2028                                 group_index = group;
2029                                 break;
2030                         }
2031                 }
2032                 /* group 4 has a few channels *above* its factory cal freq */
2033                 if (group == 5)
2034                         group_index = 4;
2035         } else
2036                 group_index = 0;        /* 2.4 GHz, group 0 */
2037
2038         IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
2039                         group_index);
2040         return group_index;
2041 }
2042
2043 /**
2044  * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
2045  *
2046  * Interpolate to get nominal (i.e. at factory calibration temperature) index
2047  *   into radio/DSP gain settings table for requested power.
2048  */
2049 static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv *priv,
2050                                        s8 requested_power,
2051                                        s32 setting_index, s32 *new_index)
2052 {
2053         const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
2054         s32 index0, index1;
2055         s32 power = 2 * requested_power;
2056         s32 i;
2057         const struct iwl3945_eeprom_txpower_sample *samples;
2058         s32 gains0, gains1;
2059         s32 res;
2060         s32 denominator;
2061
2062         chnl_grp = &priv->eeprom.groups[setting_index];
2063         samples = chnl_grp->samples;
2064         for (i = 0; i < 5; i++) {
2065                 if (power == samples[i].power) {
2066                         *new_index = samples[i].gain_index;
2067                         return 0;
2068                 }
2069         }
2070
2071         if (power > samples[1].power) {
2072                 index0 = 0;
2073                 index1 = 1;
2074         } else if (power > samples[2].power) {
2075                 index0 = 1;
2076                 index1 = 2;
2077         } else if (power > samples[3].power) {
2078                 index0 = 2;
2079                 index1 = 3;
2080         } else {
2081                 index0 = 3;
2082                 index1 = 4;
2083         }
2084
2085         denominator = (s32) samples[index1].power - (s32) samples[index0].power;
2086         if (denominator == 0)
2087                 return -EINVAL;
2088         gains0 = (s32) samples[index0].gain_index * (1 << 19);
2089         gains1 = (s32) samples[index1].gain_index * (1 << 19);
2090         res = gains0 + (gains1 - gains0) *
2091             ((s32) power - (s32) samples[index0].power) / denominator +
2092             (1 << 18);
2093         *new_index = res >> 19;
2094         return 0;
2095 }
2096
2097 static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv)
2098 {
2099         u32 i;
2100         s32 rate_index;
2101         const struct iwl3945_eeprom_txpower_group *group;
2102
2103         IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
2104
2105         for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
2106                 s8 *clip_pwrs;  /* table of power levels for each rate */
2107                 s8 satur_pwr;   /* saturation power for each chnl group */
2108                 group = &priv->eeprom.groups[i];
2109
2110                 /* sanity check on factory saturation power value */
2111                 if (group->saturation_power < 40) {
2112                         IWL_WARNING("Error: saturation power is %d, "
2113                                     "less than minimum expected 40\n",
2114                                     group->saturation_power);
2115                         return;
2116                 }
2117
2118                 /*
2119                  * Derive requested power levels for each rate, based on
2120                  *   hardware capabilities (saturation power for band).
2121                  * Basic value is 3dB down from saturation, with further
2122                  *   power reductions for highest 3 data rates.  These
2123                  *   backoffs provide headroom for high rate modulation
2124                  *   power peaks, without too much distortion (clipping).
2125                  */
2126                 /* we'll fill in this array with h/w max power levels */
2127                 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
2128
2129                 /* divide factory saturation power by 2 to find -3dB level */
2130                 satur_pwr = (s8) (group->saturation_power >> 1);
2131
2132                 /* fill in channel group's nominal powers for each rate */
2133                 for (rate_index = 0;
2134                      rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
2135                         switch (rate_index) {
2136                         case IWL_RATE_36M_INDEX_TABLE:
2137                                 if (i == 0)     /* B/G */
2138                                         *clip_pwrs = satur_pwr;
2139                                 else    /* A */
2140                                         *clip_pwrs = satur_pwr - 5;
2141                                 break;
2142                         case IWL_RATE_48M_INDEX_TABLE:
2143                                 if (i == 0)
2144                                         *clip_pwrs = satur_pwr - 7;
2145                                 else
2146                                         *clip_pwrs = satur_pwr - 10;
2147                                 break;
2148                         case IWL_RATE_54M_INDEX_TABLE:
2149                                 if (i == 0)
2150                                         *clip_pwrs = satur_pwr - 9;
2151                                 else
2152                                         *clip_pwrs = satur_pwr - 12;
2153                                 break;
2154                         default:
2155                                 *clip_pwrs = satur_pwr;
2156                                 break;
2157                         }
2158                 }
2159         }
2160 }
2161
2162 /**
2163  * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2164  *
2165  * Second pass (during init) to set up priv->channel_info
2166  *
2167  * Set up Tx-power settings in our channel info database for each VALID
2168  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2169  * and current temperature.
2170  *
2171  * Since this is based on current temperature (at init time), these values may
2172  * not be valid for very long, but it gives us a starting/default point,
2173  * and allows us to active (i.e. using Tx) scan.
2174  *
2175  * This does *not* write values to NIC, just sets up our internal table.
2176  */
2177 int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv)
2178 {
2179         struct iwl3945_channel_info *ch_info = NULL;
2180         struct iwl3945_channel_power_info *pwr_info;
2181         int delta_index;
2182         u8 rate_index;
2183         u8 scan_tbl_index;
2184         const s8 *clip_pwrs;    /* array of power levels for each rate */
2185         u8 gain, dsp_atten;
2186         s8 power;
2187         u8 pwr_index, base_pwr_index, a_band;
2188         u8 i;
2189         int temperature;
2190
2191         /* save temperature reference,
2192          *   so we can determine next time to calibrate */
2193         temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
2194         priv->last_temperature = temperature;
2195
2196         iwl3945_hw_reg_init_channel_groups(priv);
2197
2198         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2199         for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
2200              i++, ch_info++) {
2201                 a_band = is_channel_a_band(ch_info);
2202                 if (!is_channel_valid(ch_info))
2203                         continue;
2204
2205                 /* find this channel's channel group (*not* "band") index */
2206                 ch_info->group_index =
2207                         iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
2208
2209                 /* Get this chnlgrp's rate->max/clip-powers table */
2210                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2211
2212                 /* calculate power index *adjustment* value according to
2213                  *  diff between current temperature and factory temperature */
2214                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2215                                 priv->eeprom.groups[ch_info->group_index].
2216                                 temperature);
2217
2218                 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
2219                                 ch_info->channel, delta_index, temperature +
2220                                 IWL_TEMP_CONVERT);
2221
2222                 /* set tx power value for all OFDM rates */
2223                 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2224                      rate_index++) {
2225                         s32 power_idx;
2226                         int rc;
2227
2228                         /* use channel group's clip-power table,
2229                          *   but don't exceed channel's max power */
2230                         s8 pwr = min(ch_info->max_power_avg,
2231                                      clip_pwrs[rate_index]);
2232
2233                         pwr_info = &ch_info->power_info[rate_index];
2234
2235                         /* get base (i.e. at factory-measured temperature)
2236                          *    power table index for this rate's power */
2237                         rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2238                                                          ch_info->group_index,
2239                                                          &power_idx);
2240                         if (rc) {
2241                                 IWL_ERROR("Invalid power index\n");
2242                                 return rc;
2243                         }
2244                         pwr_info->base_power_index = (u8) power_idx;
2245
2246                         /* temperature compensate */
2247                         power_idx += delta_index;
2248
2249                         /* stay within range of gain table */
2250                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2251
2252                         /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2253                         pwr_info->requested_power = pwr;
2254                         pwr_info->power_table_index = (u8) power_idx;
2255                         pwr_info->tpc.tx_gain =
2256                             power_gain_table[a_band][power_idx].tx_gain;
2257                         pwr_info->tpc.dsp_atten =
2258                             power_gain_table[a_band][power_idx].dsp_atten;
2259                 }
2260
2261                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2262                 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2263                 power = pwr_info->requested_power +
2264                         IWL_CCK_FROM_OFDM_POWER_DIFF;
2265                 pwr_index = pwr_info->power_table_index +
2266                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2267                 base_pwr_index = pwr_info->base_power_index +
2268                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2269
2270                 /* stay within table range */
2271                 pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2272                 gain = power_gain_table[a_band][pwr_index].tx_gain;
2273                 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2274
2275                 /* fill each CCK rate's iwl3945_channel_power_info structure
2276                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2277                  * NOTE:  CCK rates start at end of OFDM rates! */
2278                 for (rate_index = 0;
2279                      rate_index < IWL_CCK_RATES; rate_index++) {
2280                         pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2281                         pwr_info->requested_power = power;
2282                         pwr_info->power_table_index = pwr_index;
2283                         pwr_info->base_power_index = base_pwr_index;
2284                         pwr_info->tpc.tx_gain = gain;
2285                         pwr_info->tpc.dsp_atten = dsp_atten;
2286                 }
2287
2288                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2289                 for (scan_tbl_index = 0;
2290                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2291                         s32 actual_index = (scan_tbl_index == 0) ?
2292                                 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2293                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2294                                 actual_index, clip_pwrs, ch_info, a_band);
2295                 }
2296         }
2297
2298         return 0;
2299 }
2300
2301 int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv)
2302 {
2303         int rc;
2304         unsigned long flags;
2305
2306         spin_lock_irqsave(&priv->lock, flags);
2307         rc = iwl3945_grab_nic_access(priv);
2308         if (rc) {
2309                 spin_unlock_irqrestore(&priv->lock, flags);
2310                 return rc;
2311         }
2312
2313         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0), 0);
2314         rc = iwl3945_poll_direct_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
2315         if (rc < 0)
2316                 IWL_ERROR("Can't stop Rx DMA.\n");
2317
2318         iwl3945_release_nic_access(priv);
2319         spin_unlock_irqrestore(&priv->lock, flags);
2320
2321         return 0;
2322 }
2323
2324 int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
2325 {
2326         int rc;
2327         unsigned long flags;
2328         int txq_id = txq->q.id;
2329
2330         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2331
2332         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2333
2334         spin_lock_irqsave(&priv->lock, flags);
2335         rc = iwl3945_grab_nic_access(priv);
2336         if (rc) {
2337                 spin_unlock_irqrestore(&priv->lock, flags);
2338                 return rc;
2339         }
2340         iwl3945_write_direct32(priv, FH_CBCC_CTRL(txq_id), 0);
2341         iwl3945_write_direct32(priv, FH_CBCC_BASE(txq_id), 0);
2342
2343         iwl3945_write_direct32(priv, FH_TCSR_CONFIG(txq_id),
2344                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2345                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2346                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2347                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2348                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2349         iwl3945_release_nic_access(priv);
2350
2351         /* fake read to flush all prev. writes */
2352         iwl3945_read32(priv, FH_TSSR_CBB_BASE);
2353         spin_unlock_irqrestore(&priv->lock, flags);
2354
2355         return 0;
2356 }
2357
2358 int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv)
2359 {
2360         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2361
2362         return le32_to_cpu(shared_data->rx_read_ptr[0]);
2363 }
2364
2365 /**
2366  * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2367  */
2368 int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv)
2369 {
2370         int rc, i, index, prev_index;
2371         struct iwl3945_rate_scaling_cmd rate_cmd = {
2372                 .reserved = {0, 0, 0},
2373         };
2374         struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2375
2376         for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2377                 index = iwl3945_rates[i].table_rs_index;
2378
2379                 table[index].rate_n_flags =
2380                         iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2381                 table[index].try_cnt = priv->retry_rate;
2382                 prev_index = iwl3945_get_prev_ieee_rate(i);
2383                 table[index].next_rate_index =
2384                                 iwl3945_rates[prev_index].table_rs_index;
2385         }
2386
2387         switch (priv->band) {
2388         case IEEE80211_BAND_5GHZ:
2389                 IWL_DEBUG_RATE("Select A mode rate scale\n");
2390                 /* If one of the following CCK rates is used,
2391                  * have it fall back to the 6M OFDM rate */
2392                 for (i = IWL_RATE_1M_INDEX_TABLE;
2393                         i <= IWL_RATE_11M_INDEX_TABLE; i++)
2394                         table[i].next_rate_index =
2395                           iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2396
2397                 /* Don't fall back to CCK rates */
2398                 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index =
2399                                                 IWL_RATE_9M_INDEX_TABLE;
2400
2401                 /* Don't drop out of OFDM rates */
2402                 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2403                     iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2404                 break;
2405
2406         case IEEE80211_BAND_2GHZ:
2407                 IWL_DEBUG_RATE("Select B/G mode rate scale\n");
2408                 /* If an OFDM rate is used, have it fall back to the
2409                  * 1M CCK rates */
2410
2411                 if (!(priv->sta_supp_rates & IWL_OFDM_RATES_MASK) &&
2412                     iwl3945_is_associated(priv)) {
2413
2414                         index = IWL_FIRST_CCK_RATE;
2415                         for (i = IWL_RATE_6M_INDEX_TABLE;
2416                              i <= IWL_RATE_54M_INDEX_TABLE; i++)
2417                                 table[i].next_rate_index =
2418                                         iwl3945_rates[index].table_rs_index;
2419
2420                         index = IWL_RATE_11M_INDEX_TABLE;
2421                         /* CCK shouldn't fall back to OFDM... */
2422                         table[index].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2423                 }
2424                 break;
2425
2426         default:
2427                 WARN_ON(1);
2428                 break;
2429         }
2430
2431         /* Update the rate scaling for control frame Tx */
2432         rate_cmd.table_id = 0;
2433         rc = iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2434                               &rate_cmd);
2435         if (rc)
2436                 return rc;
2437
2438         /* Update the rate scaling for data frame Tx */
2439         rate_cmd.table_id = 1;
2440         return iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2441                                 &rate_cmd);
2442 }
2443
2444 /* Called when initializing driver */
2445 int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv)
2446 {
2447         memset((void *)&priv->hw_setting, 0,
2448                sizeof(struct iwl3945_driver_hw_info));
2449
2450         priv->hw_setting.shared_virt =
2451             pci_alloc_consistent(priv->pci_dev,
2452                                  sizeof(struct iwl3945_shared),
2453                                  &priv->hw_setting.shared_phys);
2454
2455         if (!priv->hw_setting.shared_virt) {
2456                 IWL_ERROR("failed to allocate pci memory\n");
2457                 mutex_unlock(&priv->mutex);
2458                 return -ENOMEM;
2459         }
2460
2461         priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE;
2462         priv->hw_setting.max_pkt_size = 2342;
2463         priv->hw_setting.tx_cmd_len = sizeof(struct iwl3945_tx_cmd);
2464         priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2465         priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2466         priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2467         priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2468
2469         priv->hw_setting.tx_ant_num = 2;
2470         return 0;
2471 }
2472
2473 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv,
2474                           struct iwl3945_frame *frame, u8 rate)
2475 {
2476         struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2477         unsigned int frame_size;
2478
2479         tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2480         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2481
2482         tx_beacon_cmd->tx.sta_id = priv->hw_setting.bcast_sta_id;
2483         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2484
2485         frame_size = iwl3945_fill_beacon_frame(priv,
2486                                 tx_beacon_cmd->frame,
2487                                 iwl3945_broadcast_addr,
2488                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2489
2490         BUG_ON(frame_size > MAX_MPDU_SIZE);
2491         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2492
2493         tx_beacon_cmd->tx.rate = rate;
2494         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2495                                       TX_CMD_FLG_TSF_MSK);
2496
2497         /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2498         tx_beacon_cmd->tx.supp_rates[0] =
2499                 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2500
2501         tx_beacon_cmd->tx.supp_rates[1] =
2502                 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2503
2504         return sizeof(struct iwl3945_tx_beacon_cmd) + frame_size;
2505 }
2506
2507 void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv)
2508 {
2509         priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
2510         priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2511 }
2512
2513 void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv)
2514 {
2515         INIT_DELAYED_WORK(&priv->thermal_periodic,
2516                           iwl3945_bg_reg_txpower_periodic);
2517 }
2518
2519 void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv)
2520 {
2521         cancel_delayed_work(&priv->thermal_periodic);
2522 }
2523
2524 static struct iwl_3945_cfg iwl3945_bg_cfg = {
2525         .name = "3945BG",
2526         .fw_name_pre = IWL3945_FW_PRE,
2527         .ucode_api_max = IWL3945_UCODE_API_MAX,
2528         .ucode_api_min = IWL3945_UCODE_API_MIN,
2529         .sku = IWL_SKU_G,
2530 };
2531
2532 static struct iwl_3945_cfg iwl3945_abg_cfg = {
2533         .name = "3945ABG",
2534         .fw_name_pre = IWL3945_FW_PRE,
2535         .ucode_api_max = IWL3945_UCODE_API_MAX,
2536         .ucode_api_min = IWL3945_UCODE_API_MIN,
2537         .sku = IWL_SKU_A|IWL_SKU_G,
2538 };
2539
2540 struct pci_device_id iwl3945_hw_card_ids[] = {
2541         {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg)},
2542         {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg)},
2543         {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg)},
2544         {IWL_PCI_DEVICE(0x4227, 0x1014, iwl3945_bg_cfg)},
2545         {IWL_PCI_DEVICE(0x4222, PCI_ANY_ID, iwl3945_abg_cfg)},
2546         {IWL_PCI_DEVICE(0x4227, PCI_ANY_ID, iwl3945_abg_cfg)},
2547         {0}
2548 };
2549
2550 MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);