drivers/net/wireless/iwlwifi/iwl-3945.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/version.h>
  30 #include <linux/init.h>
  31 #include <linux/pci.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/delay.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/wireless.h>
  37 #include <linux/firmware.h>
  38 #include <linux/etherdevice.h>
  39 #include <asm/unaligned.h>
  40 #include <net/mac80211.h>
  41
  42 #include "iwl-3945-core.h"
  43 #include "iwl-3945.h"
  44 #include "iwl-helpers.h"
  45 #include "iwl-3945-rs.h"
  46
  47 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
  48         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,   \
  49                                     IWL_RATE_##r##M_IEEE,   \
  50                                     IWL_RATE_##ip##M_INDEX, \
  51                                     IWL_RATE_##in##M_INDEX, \
  52                                     IWL_RATE_##rp##M_INDEX, \
  53                                     IWL_RATE_##rn##M_INDEX, \
  54                                     IWL_RATE_##pp##M_INDEX, \
  55                                     IWL_RATE_##np##M_INDEX, \
  56                                     IWL_RATE_##r##M_INDEX_TABLE, \
  57                                     IWL_RATE_##ip##M_INDEX_TABLE }
  58
  59 /*
  60  * Parameter order:
  61  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
  62  *
  63  * If there isn't a valid next or previous rate then INV is used which
  64  * maps to IWL_RATE_INVALID
  65  *
  66  */
  67 const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT] = {
  68         IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  69         IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  70         IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  71         IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
  72         IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  73         IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
  74         IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  75         IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  76         IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  77         IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
  78         IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
  79         IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  80 };
  81
  82 /* 1 = enable the iwl3945_disable_events() function */
  83 #define IWL_EVT_DISABLE (0)
  84 #define IWL_EVT_DISABLE_SIZE (1532/32)
  85
  86 /**
  87  * iwl3945_disable_events - Disable selected events in uCode event log
  88  *
  89  * Disable an event by writing "1"s into "disable"
  90  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
  91  *   Default values of 0 enable uCode events to be logged.
  92  * Use for only special debugging.  This function is just a placeholder as-is,
  93  *   you'll need to provide the special bits! ...
  94  *   ... and set IWL_EVT_DISABLE to 1. */
  95 void iwl3945_disable_events(struct iwl3945_priv *priv)
  96 {
  97         int ret;
  98         int i;
  99         u32 base;               /* SRAM address of event log header */
 100         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
 101         u32 array_size;         /* # of u32 entries in array */
 102         u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
 103                 0x00000000,     /*   31 -    0  Event id numbers */
 104                 0x00000000,     /*   63 -   32 */
 105                 0x00000000,     /*   95 -   64 */
 106                 0x00000000,     /*  127 -   96 */
 107                 0x00000000,     /*  159 -  128 */
 108                 0x00000000,     /*  191 -  160 */
 109                 0x00000000,     /*  223 -  192 */
 110                 0x00000000,     /*  255 -  224 */
 111                 0x00000000,     /*  287 -  256 */
 112                 0x00000000,     /*  319 -  288 */
 113                 0x00000000,     /*  351 -  320 */
 114                 0x00000000,     /*  383 -  352 */
 115                 0x00000000,     /*  415 -  384 */
 116                 0x00000000,     /*  447 -  416 */
 117                 0x00000000,     /*  479 -  448 */
 118                 0x00000000,     /*  511 -  480 */
 119                 0x00000000,     /*  543 -  512 */
 120                 0x00000000,     /*  575 -  544 */
 121                 0x00000000,     /*  607 -  576 */
 122                 0x00000000,     /*  639 -  608 */
 123                 0x00000000,     /*  671 -  640 */
 124                 0x00000000,     /*  703 -  672 */
 125                 0x00000000,     /*  735 -  704 */
 126                 0x00000000,     /*  767 -  736 */
 127                 0x00000000,     /*  799 -  768 */
 128                 0x00000000,     /*  831 -  800 */
 129                 0x00000000,     /*  863 -  832 */
 130                 0x00000000,     /*  895 -  864 */
 131                 0x00000000,     /*  927 -  896 */
 132                 0x00000000,     /*  959 -  928 */
 133                 0x00000000,     /*  991 -  960 */
 134                 0x00000000,     /* 1023 -  992 */
 135                 0x00000000,     /* 1055 - 1024 */
 136                 0x00000000,     /* 1087 - 1056 */
 137                 0x00000000,     /* 1119 - 1088 */
 138                 0x00000000,     /* 1151 - 1120 */
 139                 0x00000000,     /* 1183 - 1152 */
 140                 0x00000000,     /* 1215 - 1184 */
 141                 0x00000000,     /* 1247 - 1216 */
 142                 0x00000000,     /* 1279 - 1248 */
 143                 0x00000000,     /* 1311 - 1280 */
 144                 0x00000000,     /* 1343 - 1312 */
 145                 0x00000000,     /* 1375 - 1344 */
 146                 0x00000000,     /* 1407 - 1376 */
 147                 0x00000000,     /* 1439 - 1408 */
 148                 0x00000000,     /* 1471 - 1440 */
 149                 0x00000000,     /* 1503 - 1472 */
 150         };
 151
 152         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 153         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
 154                 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
 155                 return;
 156         }
 157
 158         ret = iwl3945_grab_nic_access(priv);
 159         if (ret) {
 160                 IWL_WARNING("Can not read from adapter at this time.\n");
 161                 return;
 162         }
 163
 164         disable_ptr = iwl3945_read_targ_mem(priv, base + (4 * sizeof(u32)));
 165         array_size = iwl3945_read_targ_mem(priv, base + (5 * sizeof(u32)));
 166         iwl3945_release_nic_access(priv);
 167
 168         if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
 169                 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
 170                                disable_ptr);
 171                 ret = iwl3945_grab_nic_access(priv);
 172                 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
 173                         iwl3945_write_targ_mem(priv,
 174                                            disable_ptr + (i * sizeof(u32)),
 175                                            evt_disable[i]);
 176
 177                 iwl3945_release_nic_access(priv);
 178         } else {
 179                 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
 180                 IWL_DEBUG_INFO("  by writing \"1\"s into disable bitmap\n");
 181                 IWL_DEBUG_INFO("  in SRAM at 0x%x, size %d u32s\n",
 182                                disable_ptr, array_size);
 183         }
 184
 185 }
 186
 187 static int iwl3945_hwrate_to_plcp_idx(u8 plcp)
 188 {
 189         int idx;
 190
 191         for (idx = 0; idx < IWL_RATE_COUNT; idx++)
 192                 if (iwl3945_rates[idx].plcp == plcp)
 193                         return idx;
 194         return -1;
 195 }
 196
 197 /**
 198  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
 199  * @priv: eeprom and antenna fields are used to determine antenna flags
 200  *
 201  * priv->eeprom  is used to determine if antenna AUX/MAIN are reversed
 202  * priv->antenna specifies the antenna diversity mode:
 203  *
 204  * IWL_ANTENNA_DIVERISTY - NIC selects best antenna by itself
 205  * IWL_ANTENNA_MAIN      - Force MAIN antenna
 206  * IWL_ANTENNA_AUX       - Force AUX antenna
 207  */
 208 __le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv)
 209 {
 210         switch (priv->antenna) {
 211         case IWL_ANTENNA_DIVERSITY:
 212                 return 0;
 213
 214         case IWL_ANTENNA_MAIN:
 215                 if (priv->eeprom.antenna_switch_type)
 216                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 217                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 218
 219         case IWL_ANTENNA_AUX:
 220                 if (priv->eeprom.antenna_switch_type)
 221                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 222                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 223         }
 224
 225         /* bad antenna selector value */
 226         IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
 227         return 0;               /* "diversity" is default if error */
 228 }
 229
 230 /*****************************************************************************
 231  *
 232  * Intel PRO/Wireless 3945ABG/BG Network Connection
 233  *
 234  *  RX handler implementations
 235  *
 236  *  Used by iwl-base.c
 237  *
 238  *****************************************************************************/
 239
 240 void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
 241 {
 242         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 243         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
 244                      (int)sizeof(struct iwl3945_notif_statistics),
 245                      le32_to_cpu(pkt->len));
 246
 247         memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
 248
 249         priv->last_statistics_time = jiffies;
 250 }
 251
 252 /******************************************************************************
 253  *
 254  * Misc. internal state and helper functions
 255  *
 256  ******************************************************************************/
 257 #ifdef CONFIG_IWL3945_DEBUG
 258
 259 /**
 260  * iwl3945_report_frame - dump frame to syslog during debug sessions
 261  *
 262  * You may hack this function to show different aspects of received frames,
 263  * including selective frame dumps.
 264  * group100 parameter selects whether to show 1 out of 100 good frames.
 265  */
 266 static void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
 267                       struct iwl3945_rx_packet *pkt,
 268                       struct ieee80211_hdr *header, int group100)
 269 {
 270         u32 to_us;
 271         u32 print_summary = 0;
 272         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
 273         u32 hundred = 0;
 274         u32 dataframe = 0;
 275         u16 fc;
 276         u16 seq_ctl;
 277         u16 channel;
 278         u16 phy_flags;
 279         u16 length;
 280         u16 status;
 281         u16 bcn_tmr;
 282         u32 tsf_low;
 283         u64 tsf;
 284         u8 rssi;
 285         u8 agc;
 286         u16 sig_avg;
 287         u16 noise_diff;
 288         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 289         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 290         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 291         u8 *data = IWL_RX_DATA(pkt);
 292
 293         /* MAC header */
 294         fc = le16_to_cpu(header->frame_control);
 295         seq_ctl = le16_to_cpu(header->seq_ctrl);
 296
 297         /* metadata */
 298         channel = le16_to_cpu(rx_hdr->channel);
 299         phy_flags = le16_to_cpu(rx_hdr->phy_flags);
 300         length = le16_to_cpu(rx_hdr->len);
 301
 302         /* end-of-frame status and timestamp */
 303         status = le32_to_cpu(rx_end->status);
 304         bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
 305         tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
 306         tsf = le64_to_cpu(rx_end->timestamp);
 307
 308         /* signal statistics */
 309         rssi = rx_stats->rssi;
 310         agc = rx_stats->agc;
 311         sig_avg = le16_to_cpu(rx_stats->sig_avg);
 312         noise_diff = le16_to_cpu(rx_stats->noise_diff);
 313
 314         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
 315
 316         /* if data frame is to us and all is good,
 317          *   (optionally) print summary for only 1 out of every 100 */
 318         if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
 319             (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
 320                 dataframe = 1;
 321                 if (!group100)
 322                         print_summary = 1;      /* print each frame */
 323                 else if (priv->framecnt_to_us < 100) {
 324                         priv->framecnt_to_us++;
 325                         print_summary = 0;
 326                 } else {
 327                         priv->framecnt_to_us = 0;
 328                         print_summary = 1;
 329                         hundred = 1;
 330                 }
 331         } else {
 332                 /* print summary for all other frames */
 333                 print_summary = 1;
 334         }
 335
 336         if (print_summary) {
 337                 char *title;
 338                 u32 rate;
 339
 340                 if (hundred)
 341                         title = "100Frames";
 342                 else if (fc & IEEE80211_FCTL_RETRY)
 343                         title = "Retry";
 344                 else if (ieee80211_is_assoc_response(fc))
 345                         title = "AscRsp";
 346                 else if (ieee80211_is_reassoc_response(fc))
 347                         title = "RasRsp";
 348                 else if (ieee80211_is_probe_response(fc)) {
 349                         title = "PrbRsp";
 350                         print_dump = 1; /* dump frame contents */
 351                 } else if (ieee80211_is_beacon(fc)) {
 352                         title = "Beacon";
 353                         print_dump = 1; /* dump frame contents */
 354                 } else if (ieee80211_is_atim(fc))
 355                         title = "ATIM";
 356                 else if (ieee80211_is_auth(fc))
 357                         title = "Auth";
 358                 else if (ieee80211_is_deauth(fc))
 359                         title = "DeAuth";
 360                 else if (ieee80211_is_disassoc(fc))
 361                         title = "DisAssoc";
 362                 else
 363                         title = "Frame";
 364
 365                 rate = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 366                 if (rate == -1)
 367                         rate = 0;
 368                 else
 369                         rate = iwl3945_rates[rate].ieee / 2;
 370
 371                 /* print frame summary.
 372                  * MAC addresses show just the last byte (for brevity),
 373                  *    but you can hack it to show more, if you'd like to. */
 374                 if (dataframe)
 375                         IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
 376                                      "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
 377                                      title, fc, header->addr1[5],
 378                                      length, rssi, channel, rate);
 379                 else {
 380                         /* src/dst addresses assume managed mode */
 381                         IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
 382                                      "src=0x%02x, rssi=%u, tim=%lu usec, "
 383                                      "phy=0x%02x, chnl=%d\n",
 384                                      title, fc, header->addr1[5],
 385                                      header->addr3[5], rssi,
 386                                      tsf_low - priv->scan_start_tsf,
 387                                      phy_flags, channel);
 388                 }
 389         }
 390         if (print_dump)
 391                 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
 392 }
 393 #else
 394 static inline void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
 395                       struct iwl3945_rx_packet *pkt,
 396                       struct ieee80211_hdr *header, int group100)
 397 {
 398 }
 399 #endif
 400
 401
 402 static void iwl3945_add_radiotap(struct iwl3945_priv *priv,
 403                                  struct sk_buff *skb,
 404                                  struct iwl3945_rx_frame_hdr *rx_hdr,
 405                                  struct ieee80211_rx_status *stats)
 406 {
 407         /* First cache any information we need before we overwrite
 408          * the information provided in the skb from the hardware */
 409         s8 signal = stats->ssi;
 410         s8 noise = 0;
 411         int rate = stats->rate_idx;
 412         u64 tsf = stats->mactime;
 413         __le16 phy_flags_hw = rx_hdr->phy_flags;
 414
 415         struct iwl3945_rt_rx_hdr {
 416                 struct ieee80211_radiotap_header rt_hdr;
 417                 __le64 rt_tsf;          /* TSF */
 418                 u8 rt_flags;            /* radiotap packet flags */
 419                 u8 rt_rate;             /* rate in 500kb/s */
 420                 __le16 rt_channelMHz;   /* channel in MHz */
 421                 __le16 rt_chbitmask;    /* channel bitfield */
 422                 s8 rt_dbmsignal;        /* signal in dBm, kluged to signed */
 423                 s8 rt_dbmnoise;
 424                 u8 rt_antenna;          /* antenna number */
 425         } __attribute__ ((packed)) *iwl3945_rt;
 426
 427         if (skb_headroom(skb) < sizeof(*iwl3945_rt)) {
 428                 if (net_ratelimit())
 429                         printk(KERN_ERR "not enough headroom [%d] for "
 430                                "radiotap head [%zd]\n",
 431                                skb_headroom(skb), sizeof(*iwl3945_rt));
 432                 return;
 433         }
 434
 435         /* put radiotap header in front of 802.11 header and data */
 436         iwl3945_rt = (void *)skb_push(skb, sizeof(*iwl3945_rt));
 437
 438         /* initialise radiotap header */
 439         iwl3945_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
 440         iwl3945_rt->rt_hdr.it_pad = 0;
 441
 442         /* total header + data */
 443         put_unaligned(cpu_to_le16(sizeof(*iwl3945_rt)),
 444                       &iwl3945_rt->rt_hdr.it_len);
 445
 446         /* Indicate all the fields we add to the radiotap header */
 447         put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
 448                                   (1 << IEEE80211_RADIOTAP_FLAGS) |
 449                                   (1 << IEEE80211_RADIOTAP_RATE) |
 450                                   (1 << IEEE80211_RADIOTAP_CHANNEL) |
 451                                   (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
 452                                   (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
 453                                   (1 << IEEE80211_RADIOTAP_ANTENNA)),
 454                       &iwl3945_rt->rt_hdr.it_present);
 455
 456         /* Zero the flags, we'll add to them as we go */
 457         iwl3945_rt->rt_flags = 0;
 458
 459         put_unaligned(cpu_to_le64(tsf), &iwl3945_rt->rt_tsf);
 460
 461         iwl3945_rt->rt_dbmsignal = signal;
 462         iwl3945_rt->rt_dbmnoise = noise;
 463
 464         /* Convert the channel frequency and set the flags */
 465         put_unaligned(cpu_to_le16(stats->freq), &iwl3945_rt->rt_channelMHz);
 466         if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
 467                 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
 468                                           IEEE80211_CHAN_5GHZ),
 469                               &iwl3945_rt->rt_chbitmask);
 470         else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
 471                 put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
 472                                           IEEE80211_CHAN_2GHZ),
 473                               &iwl3945_rt->rt_chbitmask);
 474         else    /* 802.11g */
 475                 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
 476                                           IEEE80211_CHAN_2GHZ),
 477                               &iwl3945_rt->rt_chbitmask);
 478
 479         if (rate == -1)
 480                 iwl3945_rt->rt_rate = 0;
 481         else
 482                 iwl3945_rt->rt_rate = iwl3945_rates[rate].ieee;
 483
 484         /* antenna number */
 485         iwl3945_rt->rt_antenna =
 486                 le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
 487
 488         /* set the preamble flag if we have it */
 489         if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
 490                 iwl3945_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
 491
 492         stats->flag |= RX_FLAG_RADIOTAP;
 493 }
 494
 495 static void iwl3945_handle_data_packet(struct iwl3945_priv *priv, int is_data,
 496                                    struct iwl3945_rx_mem_buffer *rxb,
 497                                    struct ieee80211_rx_status *stats)
 498 {
 499         struct ieee80211_hdr *hdr;
 500         struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
 501         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 502         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 503         short len = le16_to_cpu(rx_hdr->len);
 504
 505         /* We received data from the HW, so stop the watchdog */
 506         if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
 507                 IWL_DEBUG_DROP("Corruption detected!\n");
 508                 return;
 509         }
 510
 511         /* We only process data packets if the interface is open */
 512         if (unlikely(!priv->is_open)) {
 513                 IWL_DEBUG_DROP_LIMIT
 514                     ("Dropping packet while interface is not open.\n");
 515                 return;
 516         }
 517
 518         skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
 519         /* Set the size of the skb to the size of the frame */
 520         skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
 521
 522         hdr = (void *)rxb->skb->data;
 523
 524         if (iwl3945_param_hwcrypto)
 525                 iwl3945_set_decrypted_flag(priv, rxb->skb,
 526                                        le32_to_cpu(rx_end->status), stats);
 527
 528         if (priv->add_radiotap)
 529                 iwl3945_add_radiotap(priv, rxb->skb, rx_hdr, stats);
 530
 531         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
 532         rxb->skb = NULL;
 533 }
 534
 535 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
 536
 537 static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv,
 538                                 struct iwl3945_rx_mem_buffer *rxb)
 539 {
 540         struct ieee80211_hdr *header;
 541         struct ieee80211_rx_status rx_status;
 542         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 543         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 544         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 545         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 546         int snr;
 547         u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
 548         u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
 549         u8 network_packet;
 550
 551         rx_status.antenna = 0;
 552         rx_status.flag = 0;
 553         rx_status.mactime = le64_to_cpu(rx_end->timestamp);
 554         rx_status.freq = ieee80211chan2mhz(le16_to_cpu(rx_hdr->channel));
 555         rx_status.band = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 556                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
 557
 558         rx_status.rate_idx = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 559
 560         if (rx_status.band == IEEE80211_BAND_5GHZ)
 561                 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
 562
 563         if ((unlikely(rx_stats->phy_count > 20))) {
 564                 IWL_DEBUG_DROP
 565                     ("dsp size out of range [0,20]: "
 566                      "%d/n", rx_stats->phy_count);
 567                 return;
 568         }
 569
 570         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
 571             || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 572                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
 573                 return;
 574         }
 575
 576         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
 577                 iwl3945_handle_data_packet(priv, 1, rxb, &rx_status);
 578                 return;
 579         }
 580
 581         /* Convert 3945's rssi indicator to dBm */
 582         rx_status.ssi = rx_stats->rssi - IWL_RSSI_OFFSET;
 583
 584         /* Set default noise value to -127 */
 585         if (priv->last_rx_noise == 0)
 586                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
 587
 588         /* 3945 provides noise info for OFDM frames only.
 589          * sig_avg and noise_diff are measured by the 3945's digital signal
 590          *   processor (DSP), and indicate linear levels of signal level and
 591          *   distortion/noise within the packet preamble after
 592          *   automatic gain control (AGC).  sig_avg should stay fairly
 593          *   constant if the radio's AGC is working well.
 594          * Since these values are linear (not dB or dBm), linear
 595          *   signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
 596          * Convert linear SNR to dB SNR, then subtract that from rssi dBm
 597          *   to obtain noise level in dBm.
 598          * Calculate rx_status.signal (quality indicator in %) based on SNR. */
 599         if (rx_stats_noise_diff) {
 600                 snr = rx_stats_sig_avg / rx_stats_noise_diff;
 601                 rx_status.noise = rx_status.ssi -
 602                                         iwl3945_calc_db_from_ratio(snr);
 603                 rx_status.signal = iwl3945_calc_sig_qual(rx_status.ssi,
 604                                                          rx_status.noise);
 605
 606         /* If noise info not available, calculate signal quality indicator (%)
 607          *   using just the dBm signal level. */
 608         } else {
 609                 rx_status.noise = priv->last_rx_noise;
 610                 rx_status.signal = iwl3945_calc_sig_qual(rx_status.ssi, 0);
 611         }
 612
 613
 614         IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
 615                         rx_status.ssi, rx_status.noise, rx_status.signal,
 616                         rx_stats_sig_avg, rx_stats_noise_diff);
 617
 618         header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 619
 620         network_packet = iwl3945_is_network_packet(priv, header);
 621
 622         IWL_DEBUG_STATS_LIMIT("[%c] %d RSSI:%d Signal:%u, Noise:%u, Rate:%u\n",
 623                               network_packet ? '*' : ' ',
 624                               le16_to_cpu(rx_hdr->channel),
 625                               rx_status.ssi, rx_status.ssi,
 626                               rx_status.ssi, rx_status.rate_idx);
 627
 628 #ifdef CONFIG_IWL3945_DEBUG
 629         if (iwl3945_debug_level & (IWL_DL_RX))
 630                 /* Set "1" to report good data frames in groups of 100 */
 631                 iwl3945_dbg_report_frame(priv, pkt, header, 1);
 632 #endif
 633
 634         if (network_packet) {
 635                 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
 636                 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
 637                 priv->last_rx_rssi = rx_status.ssi;
 638                 priv->last_rx_noise = rx_status.noise;
 639         }
 640
 641         switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) {
 642         case IEEE80211_FTYPE_MGMT:
 643                 switch (le16_to_cpu(header->frame_control) &
 644                         IEEE80211_FCTL_STYPE) {
 645                 case IEEE80211_STYPE_PROBE_RESP:
 646                 case IEEE80211_STYPE_BEACON:{
 647                                 /* If this is a beacon or probe response for
 648                                  * our network then cache the beacon
 649                                  * timestamp */
 650                                 if ((((priv->iw_mode == IEEE80211_IF_TYPE_STA)
 651                                       && !compare_ether_addr(header->addr2,
 652                                                              priv->bssid)) ||
 653                                      ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 654                                       && !compare_ether_addr(header->addr3,
 655                                                              priv->bssid)))) {
 656                                         struct ieee80211_mgmt *mgmt =
 657                                             (struct ieee80211_mgmt *)header;
 658                                         __le32 *pos;
 659                                         pos =
 660                                             (__le32 *) & mgmt->u.beacon.
 661                                             timestamp;
 662                                         priv->timestamp0 = le32_to_cpu(pos[0]);
 663                                         priv->timestamp1 = le32_to_cpu(pos[1]);
 664                                         priv->beacon_int = le16_to_cpu(
 665                                             mgmt->u.beacon.beacon_int);
 666                                         if (priv->call_post_assoc_from_beacon &&
 667                                             (priv->iw_mode ==
 668                                                 IEEE80211_IF_TYPE_STA))
 669                                                 queue_work(priv->workqueue,
 670                                                     &priv->post_associate.work);
 671
 672                                         priv->call_post_assoc_from_beacon = 0;
 673                                 }
 674
 675                                 break;
 676                         }
 677
 678                 case IEEE80211_STYPE_ACTION:
 679                         /* TODO: Parse 802.11h frames for CSA... */
 680                         break;
 681
 682                         /*
 683                          * TODO: Use the new callback function from
 684                          * mac80211 instead of sniffing these packets.
 685                          */
 686                 case IEEE80211_STYPE_ASSOC_RESP:
 687                 case IEEE80211_STYPE_REASSOC_RESP:{
 688                                 struct ieee80211_mgmt *mgnt =
 689                                     (struct ieee80211_mgmt *)header;
 690
 691                                 /* We have just associated, give some
 692                                  * time for the 4-way handshake if
 693                                  * any. Don't start scan too early. */
 694                                 priv->next_scan_jiffies = jiffies +
 695                                         IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
 696
 697                                 priv->assoc_id = (~((1 << 15) | (1 << 14)) &
 698                                                   le16_to_cpu(mgnt->u.
 699                                                               assoc_resp.aid));
 700                                 priv->assoc_capability =
 701                                     le16_to_cpu(mgnt->u.assoc_resp.capab_info);
 702                                 if (priv->beacon_int)
 703                                         queue_work(priv->workqueue,
 704                                             &priv->post_associate.work);
 705                                 else
 706                                         priv->call_post_assoc_from_beacon = 1;
 707                                 break;
 708                         }
 709
 710                 case IEEE80211_STYPE_PROBE_REQ:{
 711                                 DECLARE_MAC_BUF(mac1);
 712                                 DECLARE_MAC_BUF(mac2);
 713                                 DECLARE_MAC_BUF(mac3);
 714                                 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 715                                         IWL_DEBUG_DROP
 716                                             ("Dropping (non network): %s"
 717                                              ", %s, %s\n",
 718                                              print_mac(mac1, header->addr1),
 719                                              print_mac(mac2, header->addr2),
 720                                              print_mac(mac3, header->addr3));
 721                                 return;
 722                         }
 723                 }
 724
 725                 iwl3945_handle_data_packet(priv, 0, rxb, &rx_status);
 726                 break;
 727
 728         case IEEE80211_FTYPE_CTL:
 729                 break;
 730
 731         case IEEE80211_FTYPE_DATA: {
 732                 DECLARE_MAC_BUF(mac1);
 733                 DECLARE_MAC_BUF(mac2);
 734                 DECLARE_MAC_BUF(mac3);
 735
 736                 if (unlikely(iwl3945_is_duplicate_packet(priv, header)))
 737                         IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
 738                                        print_mac(mac1, header->addr1),
 739                                        print_mac(mac2, header->addr2),
 740                                        print_mac(mac3, header->addr3));
 741                 else
 742                         iwl3945_handle_data_packet(priv, 1, rxb, &rx_status);
 743                 break;
 744         }
 745         }
 746 }
 747
 748 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *ptr,
 749                                  dma_addr_t addr, u16 len)
 750 {
 751         int count;
 752         u32 pad;
 753         struct iwl3945_tfd_frame *tfd = (struct iwl3945_tfd_frame *)ptr;
 754
 755         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 756         pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
 757
 758         if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
 759                 IWL_ERROR("Error can not send more than %d chunks\n",
 760                           NUM_TFD_CHUNKS);
 761                 return -EINVAL;
 762         }
 763
 764         tfd->pa[count].addr = cpu_to_le32(addr);
 765         tfd->pa[count].len = cpu_to_le32(len);
 766
 767         count++;
 768
 769         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
 770                                          TFD_CTL_PAD_SET(pad));
 771
 772         return 0;
 773 }
 774
 775 /**
 776  * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
 777  *
 778  * Does NOT advance any indexes
 779  */
 780 int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
 781 {
 782         struct iwl3945_tfd_frame *bd_tmp = (struct iwl3945_tfd_frame *)&txq->bd[0];
 783         struct iwl3945_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
 784         struct pci_dev *dev = priv->pci_dev;
 785         int i;
 786         int counter;
 787
 788         /* classify bd */
 789         if (txq->q.id == IWL_CMD_QUEUE_NUM)
 790                 /* nothing to cleanup after for host commands */
 791                 return 0;
 792
 793         /* sanity check */
 794         counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
 795         if (counter > NUM_TFD_CHUNKS) {
 796                 IWL_ERROR("Too many chunks: %i\n", counter);
 797                 /* @todo issue fatal error, it is quite serious situation */
 798                 return 0;
 799         }
 800
 801         /* unmap chunks if any */
 802
 803         for (i = 1; i < counter; i++) {
 804                 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
 805                                  le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
 806                 if (txq->txb[txq->q.read_ptr].skb[0]) {
 807                         struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
 808                         if (txq->txb[txq->q.read_ptr].skb[0]) {
 809                                 /* Can be called from interrupt context */
 810                                 dev_kfree_skb_any(skb);
 811                                 txq->txb[txq->q.read_ptr].skb[0] = NULL;
 812                         }
 813                 }
 814         }
 815         return 0;
 816 }
 817
 818 u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr)
 819 {
 820         int i;
 821         int ret = IWL_INVALID_STATION;
 822         unsigned long flags;
 823         DECLARE_MAC_BUF(mac);
 824
 825         spin_lock_irqsave(&priv->sta_lock, flags);
 826         for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
 827                 if ((priv->stations[i].used) &&
 828                     (!compare_ether_addr
 829                      (priv->stations[i].sta.sta.addr, addr))) {
 830                         ret = i;
 831                         goto out;
 832                 }
 833
 834         IWL_DEBUG_INFO("can not find STA %s (total %d)\n",
 835                        print_mac(mac, addr), priv->num_stations);
 836  out:
 837         spin_unlock_irqrestore(&priv->sta_lock, flags);
 838         return ret;
 839 }
 840
 841 /**
 842  * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
 843  *
 844 */
 845 void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv,
 846                               struct iwl3945_cmd *cmd,
 847                               struct ieee80211_tx_control *ctrl,
 848                               struct ieee80211_hdr *hdr, int sta_id, int tx_id)
 849 {
 850         unsigned long flags;
 851         u16 rate_index = min(ctrl->tx_rate->hw_value & 0xffff, IWL_RATE_COUNT - 1);
 852         u16 rate_mask;
 853         int rate;
 854         u8 rts_retry_limit;
 855         u8 data_retry_limit;
 856         __le32 tx_flags;
 857         u16 fc = le16_to_cpu(hdr->frame_control);
 858
 859         rate = iwl3945_rates[rate_index].plcp;
 860         tx_flags = cmd->cmd.tx.tx_flags;
 861
 862         /* We need to figure out how to get the sta->supp_rates while
 863          * in this running context; perhaps encoding into ctrl->tx_rate? */
 864         rate_mask = IWL_RATES_MASK;
 865
 866         spin_lock_irqsave(&priv->sta_lock, flags);
 867
 868         priv->stations[sta_id].current_rate.rate_n_flags = rate;
 869
 870         if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
 871             (sta_id != IWL3945_BROADCAST_ID) &&
 872                 (sta_id != IWL_MULTICAST_ID))
 873                 priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
 874
 875         spin_unlock_irqrestore(&priv->sta_lock, flags);
 876
 877         if (tx_id >= IWL_CMD_QUEUE_NUM)
 878                 rts_retry_limit = 3;
 879         else
 880                 rts_retry_limit = 7;
 881
 882         if (ieee80211_is_probe_response(fc)) {
 883                 data_retry_limit = 3;
 884                 if (data_retry_limit < rts_retry_limit)
 885                         rts_retry_limit = data_retry_limit;
 886         } else
 887                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
 888
 889         if (priv->data_retry_limit != -1)
 890                 data_retry_limit = priv->data_retry_limit;
 891
 892         if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
 893                 switch (fc & IEEE80211_FCTL_STYPE) {
 894                 case IEEE80211_STYPE_AUTH:
 895                 case IEEE80211_STYPE_DEAUTH:
 896                 case IEEE80211_STYPE_ASSOC_REQ:
 897                 case IEEE80211_STYPE_REASSOC_REQ:
 898                         if (tx_flags & TX_CMD_FLG_RTS_MSK) {
 899                                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 900                                 tx_flags |= TX_CMD_FLG_CTS_MSK;
 901                         }
 902                         break;
 903                 default:
 904                         break;
 905                 }
 906         }
 907
 908         cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
 909         cmd->cmd.tx.data_retry_limit = data_retry_limit;
 910         cmd->cmd.tx.rate = rate;
 911         cmd->cmd.tx.tx_flags = tx_flags;
 912
 913         /* OFDM */
 914         cmd->cmd.tx.supp_rates[0] =
 915            ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
 916
 917         /* CCK */
 918         cmd->cmd.tx.supp_rates[1] = (rate_mask & 0xF);
 919
 920         IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
 921                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
 922                        cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
 923                        cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
 924 }
 925
 926 u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, u16 tx_rate, u8 flags)
 927 {
 928         unsigned long flags_spin;
 929         struct iwl3945_station_entry *station;
 930
 931         if (sta_id == IWL_INVALID_STATION)
 932                 return IWL_INVALID_STATION;
 933
 934         spin_lock_irqsave(&priv->sta_lock, flags_spin);
 935         station = &priv->stations[sta_id];
 936
 937         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
 938         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
 939         station->current_rate.rate_n_flags = tx_rate;
 940         station->sta.mode = STA_CONTROL_MODIFY_MSK;
 941
 942         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
 943
 944         iwl3945_send_add_station(priv, &station->sta, flags);
 945         IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
 946                         sta_id, tx_rate);
 947         return sta_id;
 948 }
 949
 950 static int iwl3945_nic_set_pwr_src(struct iwl3945_priv *priv, int pwr_max)
 951 {
 952         int rc;
 953         unsigned long flags;
 954
 955         spin_lock_irqsave(&priv->lock, flags);
 956         rc = iwl3945_grab_nic_access(priv);
 957         if (rc) {
 958                 spin_unlock_irqrestore(&priv->lock, flags);
 959                 return rc;
 960         }
 961
 962         if (!pwr_max) {
 963                 u32 val;
 964
 965                 rc = pci_read_config_dword(priv->pci_dev,
 966                                 PCI_POWER_SOURCE, &val);
 967                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
 968                         iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 969                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 970                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
 971                         iwl3945_release_nic_access(priv);
 972
 973                         iwl3945_poll_bit(priv, CSR_GPIO_IN,
 974                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
 975                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
 976                 } else
 977                         iwl3945_release_nic_access(priv);
 978         } else {
 979                 iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 980                                 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 981                                 ~APMG_PS_CTRL_MSK_PWR_SRC);
 982
 983                 iwl3945_release_nic_access(priv);
 984                 iwl3945_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
 985                              CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
 986         }
 987         spin_unlock_irqrestore(&priv->lock, flags);
 988
 989         return rc;
 990 }
 991
 992 static int iwl3945_rx_init(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
 993 {
 994         int rc;
 995         unsigned long flags;
 996
 997         spin_lock_irqsave(&priv->lock, flags);
 998         rc = iwl3945_grab_nic_access(priv);
 999         if (rc) {
1000                 spin_unlock_irqrestore(&priv->lock, flags);
1001                 return rc;
1002         }
1003
1004         iwl3945_write_direct32(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
1005         iwl3945_write_direct32(priv, FH_RCSR_RPTR_ADDR(0),
1006                              priv->hw_setting.shared_phys +
1007                              offsetof(struct iwl3945_shared, rx_read_ptr[0]));
1008         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), 0);
1009         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0),
1010                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
1011                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
1012                 ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
1013                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
1014                 (RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
1015                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
1016                 (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
1017                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
1018
1019         /* fake read to flush all prev I/O */
1020         iwl3945_read_direct32(priv, FH_RSSR_CTRL);
1021
1022         iwl3945_release_nic_access(priv);
1023         spin_unlock_irqrestore(&priv->lock, flags);
1024
1025         return 0;
1026 }
1027
1028 static int iwl3945_tx_reset(struct iwl3945_priv *priv)
1029 {
1030         int rc;
1031         unsigned long flags;
1032
1033         spin_lock_irqsave(&priv->lock, flags);
1034         rc = iwl3945_grab_nic_access(priv);
1035         if (rc) {
1036                 spin_unlock_irqrestore(&priv->lock, flags);
1037                 return rc;
1038         }
1039
1040         /* bypass mode */
1041         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
1042
1043         /* RA 0 is active */
1044         iwl3945_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
1045
1046         /* all 6 fifo are active */
1047         iwl3945_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
1048
1049         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
1050         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
1051         iwl3945_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
1052         iwl3945_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
1053
1054         iwl3945_write_direct32(priv, FH_TSSR_CBB_BASE,
1055                              priv->hw_setting.shared_phys);
1056
1057         iwl3945_write_direct32(priv, FH_TSSR_MSG_CONFIG,
1058                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
1059                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
1060                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
1061                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
1062                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
1063                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
1064                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
1065
1066         iwl3945_release_nic_access(priv);
1067         spin_unlock_irqrestore(&priv->lock, flags);
1068
1069         return 0;
1070 }
1071
1072 /**
1073  * iwl3945_txq_ctx_reset - Reset TX queue context
1074  *
1075  * Destroys all DMA structures and initialize them again
1076  */
1077 static int iwl3945_txq_ctx_reset(struct iwl3945_priv *priv)
1078 {
1079         int rc;
1080         int txq_id, slots_num;
1081
1082         iwl3945_hw_txq_ctx_free(priv);
1083
1084         /* Tx CMD queue */
1085         rc = iwl3945_tx_reset(priv);
1086         if (rc)
1087                 goto error;
1088
1089         /* Tx queue(s) */
1090         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
1091                 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
1092                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
1093                 rc = iwl3945_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
1094                                 txq_id);
1095                 if (rc) {
1096                         IWL_ERROR("Tx %d queue init failed\n", txq_id);
1097                         goto error;
1098                 }
1099         }
1100
1101         return rc;
1102
1103  error:
1104         iwl3945_hw_txq_ctx_free(priv);
1105         return rc;
1106 }
1107
1108 int iwl3945_hw_nic_init(struct iwl3945_priv *priv)
1109 {
1110         u8 rev_id;
1111         int rc;
1112         unsigned long flags;
1113         struct iwl3945_rx_queue *rxq = &priv->rxq;
1114
1115         iwl3945_power_init_handle(priv);
1116
1117         spin_lock_irqsave(&priv->lock, flags);
1118         iwl3945_set_bit(priv, CSR_ANA_PLL_CFG, (1 << 24));
1119         iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1120                     CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1121
1122         iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1123         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1124                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1125                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1126         if (rc < 0) {
1127                 spin_unlock_irqrestore(&priv->lock, flags);
1128                 IWL_DEBUG_INFO("Failed to init the card\n");
1129                 return rc;
1130         }
1131
1132         rc = iwl3945_grab_nic_access(priv);
1133         if (rc) {
1134                 spin_unlock_irqrestore(&priv->lock, flags);
1135                 return rc;
1136         }
1137         iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1138                                  APMG_CLK_VAL_DMA_CLK_RQT |
1139                                  APMG_CLK_VAL_BSM_CLK_RQT);
1140         udelay(20);
1141         iwl3945_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1142                                     APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1143         iwl3945_release_nic_access(priv);
1144         spin_unlock_irqrestore(&priv->lock, flags);
1145
1146         /* Determine HW type */
1147         rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
1148         if (rc)
1149                 return rc;
1150         IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
1151
1152         iwl3945_nic_set_pwr_src(priv, 1);
1153         spin_lock_irqsave(&priv->lock, flags);
1154
1155         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
1156                 IWL_DEBUG_INFO("RTP type \n");
1157         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
1158                 IWL_DEBUG_INFO("3945 RADIO-MB type\n");
1159                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1160                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
1161         } else {
1162                 IWL_DEBUG_INFO("3945 RADIO-MM type\n");
1163                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1164                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
1165         }
1166
1167         if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
1168                 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
1169                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1170                             CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
1171         } else
1172                 IWL_DEBUG_INFO("SKU OP mode is basic\n");
1173
1174         if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
1175                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1176                                priv->eeprom.board_revision);
1177                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1178                             CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1179         } else {
1180                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1181                                priv->eeprom.board_revision);
1182                 iwl3945_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1183                               CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1184         }
1185
1186         if (priv->eeprom.almgor_m_version <= 1) {
1187                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1188                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
1189                 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
1190                                priv->eeprom.almgor_m_version);
1191         } else {
1192                 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
1193                                priv->eeprom.almgor_m_version);
1194                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1195                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
1196         }
1197         spin_unlock_irqrestore(&priv->lock, flags);
1198
1199         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
1200                 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
1201
1202         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
1203                 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
1204
1205         /* Allocate the RX queue, or reset if it is already allocated */
1206         if (!rxq->bd) {
1207                 rc = iwl3945_rx_queue_alloc(priv);
1208                 if (rc) {
1209                         IWL_ERROR("Unable to initialize Rx queue\n");
1210                         return -ENOMEM;
1211                 }
1212         } else
1213                 iwl3945_rx_queue_reset(priv, rxq);
1214
1215         iwl3945_rx_replenish(priv);
1216
1217         iwl3945_rx_init(priv, rxq);
1218
1219         spin_lock_irqsave(&priv->lock, flags);
1220
1221         /* Look at using this instead:
1222         rxq->need_update = 1;
1223         iwl3945_rx_queue_update_write_ptr(priv, rxq);
1224         */
1225
1226         rc = iwl3945_grab_nic_access(priv);
1227         if (rc) {
1228                 spin_unlock_irqrestore(&priv->lock, flags);
1229                 return rc;
1230         }
1231         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
1232         iwl3945_release_nic_access(priv);
1233
1234         spin_unlock_irqrestore(&priv->lock, flags);
1235
1236         rc = iwl3945_txq_ctx_reset(priv);
1237         if (rc)
1238                 return rc;
1239
1240         set_bit(STATUS_INIT, &priv->status);
1241
1242         return 0;
1243 }
1244
1245 /**
1246  * iwl3945_hw_txq_ctx_free - Free TXQ Context
1247  *
1248  * Destroy all TX DMA queues and structures
1249  */
1250 void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv)
1251 {
1252         int txq_id;
1253
1254         /* Tx queues */
1255         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1256                 iwl3945_tx_queue_free(priv, &priv->txq[txq_id]);
1257 }
1258
1259 void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv)
1260 {
1261         int queue;
1262         unsigned long flags;
1263
1264         spin_lock_irqsave(&priv->lock, flags);
1265         if (iwl3945_grab_nic_access(priv)) {
1266                 spin_unlock_irqrestore(&priv->lock, flags);
1267                 iwl3945_hw_txq_ctx_free(priv);
1268                 return;
1269         }
1270
1271         /* stop SCD */
1272         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0);
1273
1274         /* reset TFD queues */
1275         for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
1276                 iwl3945_write_direct32(priv, FH_TCSR_CONFIG(queue), 0x0);
1277                 iwl3945_poll_direct_bit(priv, FH_TSSR_TX_STATUS,
1278                                 ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1279                                 1000);
1280         }
1281
1282         iwl3945_release_nic_access(priv);
1283         spin_unlock_irqrestore(&priv->lock, flags);
1284
1285         iwl3945_hw_txq_ctx_free(priv);
1286 }
1287
1288 int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv)
1289 {
1290         int rc = 0;
1291         u32 reg_val;
1292         unsigned long flags;
1293
1294         spin_lock_irqsave(&priv->lock, flags);
1295
1296         /* set stop master bit */
1297         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1298
1299         reg_val = iwl3945_read32(priv, CSR_GP_CNTRL);
1300
1301         if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1302             (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1303                 IWL_DEBUG_INFO("Card in power save, master is already "
1304                                "stopped\n");
1305         else {
1306                 rc = iwl3945_poll_bit(priv, CSR_RESET,
1307                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
1308                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1309                 if (rc < 0) {
1310                         spin_unlock_irqrestore(&priv->lock, flags);
1311                         return rc;
1312                 }
1313         }
1314
1315         spin_unlock_irqrestore(&priv->lock, flags);
1316         IWL_DEBUG_INFO("stop master\n");
1317
1318         return rc;
1319 }
1320
1321 int iwl3945_hw_nic_reset(struct iwl3945_priv *priv)
1322 {
1323         int rc;
1324         unsigned long flags;
1325
1326         iwl3945_hw_nic_stop_master(priv);
1327
1328         spin_lock_irqsave(&priv->lock, flags);
1329
1330         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1331
1332         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1333                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1334                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1335
1336         rc = iwl3945_grab_nic_access(priv);
1337         if (!rc) {
1338                 iwl3945_write_prph(priv, APMG_CLK_CTRL_REG,
1339                                          APMG_CLK_VAL_BSM_CLK_RQT);
1340
1341                 udelay(10);
1342
1343                 iwl3945_set_bit(priv, CSR_GP_CNTRL,
1344                             CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1345
1346                 iwl3945_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1347                 iwl3945_write_prph(priv, APMG_RTC_INT_STT_REG,
1348                                         0xFFFFFFFF);
1349
1350                 /* enable DMA */
1351                 iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1352                                          APMG_CLK_VAL_DMA_CLK_RQT |
1353                                          APMG_CLK_VAL_BSM_CLK_RQT);
1354                 udelay(10);
1355
1356                 iwl3945_set_bits_prph(priv, APMG_PS_CTRL_REG,
1357                                 APMG_PS_CTRL_VAL_RESET_REQ);
1358                 udelay(5);
1359                 iwl3945_clear_bits_prph(priv, APMG_PS_CTRL_REG,
1360                                 APMG_PS_CTRL_VAL_RESET_REQ);
1361                 iwl3945_release_nic_access(priv);
1362         }
1363
1364         /* Clear the 'host command active' bit... */
1365         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1366
1367         wake_up_interruptible(&priv->wait_command_queue);
1368         spin_unlock_irqrestore(&priv->lock, flags);
1369
1370         return rc;
1371 }
1372
1373 /**
1374  * iwl3945_hw_reg_adjust_power_by_temp
1375  * return index delta into power gain settings table
1376 */
1377 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1378 {
1379         return (new_reading - old_reading) * (-11) / 100;
1380 }
1381
1382 /**
1383  * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1384  */
1385 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1386 {
1387         return (((temperature < -260) || (temperature > 25)) ? 1 : 0);
1388 }
1389
1390 int iwl3945_hw_get_temperature(struct iwl3945_priv *priv)
1391 {
1392         return iwl3945_read32(priv, CSR_UCODE_DRV_GP2);
1393 }
1394
1395 /**
1396  * iwl3945_hw_reg_txpower_get_temperature
1397  * get the current temperature by reading from NIC
1398 */
1399 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv *priv)
1400 {
1401         int temperature;
1402
1403         temperature = iwl3945_hw_get_temperature(priv);
1404
1405         /* driver's okay range is -260 to +25.
1406          *   human readable okay range is 0 to +285 */
1407         IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1408
1409         /* handle insane temp reading */
1410         if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1411                 IWL_ERROR("Error bad temperature value  %d\n", temperature);
1412
1413                 /* if really really hot(?),
1414                  *   substitute the 3rd band/group's temp measured at factory */
1415                 if (priv->last_temperature > 100)
1416                         temperature = priv->eeprom.groups[2].temperature;
1417                 else /* else use most recent "sane" value from driver */
1418                         temperature = priv->last_temperature;
1419         }
1420
1421         return temperature;     /* raw, not "human readable" */
1422 }
1423
1424 /* Adjust Txpower only if temperature variance is greater than threshold.
1425  *
1426  * Both are lower than older versions' 9 degrees */
1427 #define IWL_TEMPERATURE_LIMIT_TIMER   6
1428
1429 /**
1430  * is_temp_calib_needed - determines if new calibration is needed
1431  *
1432  * records new temperature in tx_mgr->temperature.
1433  * replaces tx_mgr->last_temperature *only* if calib needed
1434  *    (assumes caller will actually do the calibration!). */
1435 static int is_temp_calib_needed(struct iwl3945_priv *priv)
1436 {
1437         int temp_diff;
1438
1439         priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1440         temp_diff = priv->temperature - priv->last_temperature;
1441
1442         /* get absolute value */
1443         if (temp_diff < 0) {
1444                 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1445                 temp_diff = -temp_diff;
1446         } else if (temp_diff == 0)
1447                 IWL_DEBUG_POWER("Same temp,\n");
1448         else
1449                 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1450
1451         /* if we don't need calibration, *don't* update last_temperature */
1452         if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1453                 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1454                 return 0;
1455         }
1456
1457         IWL_DEBUG_POWER("Timed thermal calib needed\n");
1458
1459         /* assume that caller will actually do calib ...
1460          *   update the "last temperature" value */
1461         priv->last_temperature = priv->temperature;
1462         return 1;
1463 }
1464
1465 #define IWL_MAX_GAIN_ENTRIES 78
1466 #define IWL_CCK_FROM_OFDM_POWER_DIFF  -5
1467 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1468
1469 /* radio and DSP power table, each step is 1/2 dB.
1470  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1471 static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1472         {
1473          {251, 127},            /* 2.4 GHz, highest power */
1474          {251, 127},
1475          {251, 127},
1476          {251, 127},
1477          {251, 125},
1478          {251, 110},
1479          {251, 105},
1480          {251, 98},
1481          {187, 125},
1482          {187, 115},
1483          {187, 108},
1484          {187, 99},
1485          {243, 119},
1486          {243, 111},
1487          {243, 105},
1488          {243, 97},
1489          {243, 92},
1490          {211, 106},
1491          {211, 100},
1492          {179, 120},
1493          {179, 113},
1494          {179, 107},
1495          {147, 125},
1496          {147, 119},
1497          {147, 112},
1498          {147, 106},
1499          {147, 101},
1500          {147, 97},
1501          {147, 91},
1502          {115, 107},
1503          {235, 121},
1504          {235, 115},
1505          {235, 109},
1506          {203, 127},
1507          {203, 121},
1508          {203, 115},
1509          {203, 108},
1510          {203, 102},
1511          {203, 96},
1512          {203, 92},
1513          {171, 110},
1514          {171, 104},
1515          {171, 98},
1516          {139, 116},
1517          {227, 125},
1518          {227, 119},
1519          {227, 113},
1520          {227, 107},
1521          {227, 101},
1522          {227, 96},
1523          {195, 113},
1524          {195, 106},
1525          {195, 102},
1526          {195, 95},
1527          {163, 113},
1528          {163, 106},
1529          {163, 102},
1530          {163, 95},
1531          {131, 113},
1532          {131, 106},
1533          {131, 102},
1534          {131, 95},
1535          {99, 113},
1536          {99, 106},
1537          {99, 102},
1538          {99, 95},
1539          {67, 113},
1540          {67, 106},
1541          {67, 102},
1542          {67, 95},
1543          {35, 113},
1544          {35, 106},
1545          {35, 102},
1546          {35, 95},
1547          {3, 113},
1548          {3, 106},
1549          {3, 102},
1550          {3, 95} },             /* 2.4 GHz, lowest power */
1551         {
1552          {251, 127},            /* 5.x GHz, highest power */
1553          {251, 120},
1554          {251, 114},
1555          {219, 119},
1556          {219, 101},
1557          {187, 113},
1558          {187, 102},
1559          {155, 114},
1560          {155, 103},
1561          {123, 117},
1562          {123, 107},
1563          {123, 99},
1564          {123, 92},
1565          {91, 108},
1566          {59, 125},
1567          {59, 118},
1568          {59, 109},
1569          {59, 102},
1570          {59, 96},
1571          {59, 90},
1572          {27, 104},
1573          {27, 98},
1574          {27, 92},
1575          {115, 118},
1576          {115, 111},
1577          {115, 104},
1578          {83, 126},
1579          {83, 121},
1580          {83, 113},
1581          {83, 105},
1582          {83, 99},
1583          {51, 118},
1584          {51, 111},
1585          {51, 104},
1586          {51, 98},
1587          {19, 116},
1588          {19, 109},
1589          {19, 102},
1590          {19, 98},
1591          {19, 93},
1592          {171, 113},
1593          {171, 107},
1594          {171, 99},
1595          {139, 120},
1596          {139, 113},
1597          {139, 107},
1598          {139, 99},
1599          {107, 120},
1600          {107, 113},
1601          {107, 107},
1602          {107, 99},
1603          {75, 120},
1604          {75, 113},
1605          {75, 107},
1606          {75, 99},
1607          {43, 120},
1608          {43, 113},
1609          {43, 107},
1610          {43, 99},
1611          {11, 120},
1612          {11, 113},
1613          {11, 107},
1614          {11, 99},
1615          {131, 107},
1616          {131, 99},
1617          {99, 120},
1618          {99, 113},
1619          {99, 107},
1620          {99, 99},
1621          {67, 120},
1622          {67, 113},
1623          {67, 107},
1624          {67, 99},
1625          {35, 120},
1626          {35, 113},
1627          {35, 107},
1628          {35, 99},
1629          {3, 120} }             /* 5.x GHz, lowest power */
1630 };
1631
1632 static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1633 {
1634         if (index < 0)
1635                 return 0;
1636         if (index >= IWL_MAX_GAIN_ENTRIES)
1637                 return IWL_MAX_GAIN_ENTRIES - 1;
1638         return (u8) index;
1639 }
1640
1641 /* Kick off thermal recalibration check every 60 seconds */
1642 #define REG_RECALIB_PERIOD (60)
1643
1644 /**
1645  * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1646  *
1647  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1648  * or 6 Mbit (OFDM) rates.
1649  */
1650 static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv *priv, u32 scan_tbl_index,
1651                                s32 rate_index, const s8 *clip_pwrs,
1652                                struct iwl3945_channel_info *ch_info,
1653                                int band_index)
1654 {
1655         struct iwl3945_scan_power_info *scan_power_info;
1656         s8 power;
1657         u8 power_index;
1658
1659         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1660
1661         /* use this channel group's 6Mbit clipping/saturation pwr,
1662          *   but cap at regulatory scan power restriction (set during init
1663          *   based on eeprom channel data) for this channel.  */
1664         power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1665
1666         /* further limit to user's max power preference.
1667          * FIXME:  Other spectrum management power limitations do not
1668          *   seem to apply?? */
1669         power = min(power, priv->user_txpower_limit);
1670         scan_power_info->requested_power = power;
1671
1672         /* find difference between new scan *power* and current "normal"
1673          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1674          *   current "normal" temperature-compensated Tx power *index* for
1675          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1676          *   *index*. */
1677         power_index = ch_info->power_info[rate_index].power_table_index
1678             - (power - ch_info->power_info
1679                [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1680
1681         /* store reference index that we use when adjusting *all* scan
1682          *   powers.  So we can accommodate user (all channel) or spectrum
1683          *   management (single channel) power changes "between" temperature
1684          *   feedback compensation procedures.
1685          * don't force fit this reference index into gain table; it may be a
1686          *   negative number.  This will help avoid errors when we're at
1687          *   the lower bounds (highest gains, for warmest temperatures)
1688          *   of the table. */
1689
1690         /* don't exceed table bounds for "real" setting */
1691         power_index = iwl3945_hw_reg_fix_power_index(power_index);
1692
1693         scan_power_info->power_table_index = power_index;
1694         scan_power_info->tpc.tx_gain =
1695             power_gain_table[band_index][power_index].tx_gain;
1696         scan_power_info->tpc.dsp_atten =
1697             power_gain_table[band_index][power_index].dsp_atten;
1698 }
1699
1700 /**
1701  * iwl3945_hw_reg_send_txpower - fill in Tx Power command with gain settings
1702  *
1703  * Configures power settings for all rates for the current channel,
1704  * using values from channel info struct, and send to NIC
1705  */
1706 int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv)
1707 {
1708         int rate_idx, i;
1709         const struct iwl3945_channel_info *ch_info = NULL;
1710         struct iwl3945_txpowertable_cmd txpower = {
1711                 .channel = priv->active_rxon.channel,
1712         };
1713
1714         txpower.band = (priv->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1715         ch_info = iwl3945_get_channel_info(priv,
1716                                        priv->band,
1717                                        le16_to_cpu(priv->active_rxon.channel));
1718         if (!ch_info) {
1719                 IWL_ERROR
1720                     ("Failed to get channel info for channel %d [%d]\n",
1721                      le16_to_cpu(priv->active_rxon.channel), priv->band);
1722                 return -EINVAL;
1723         }
1724
1725         if (!is_channel_valid(ch_info)) {
1726                 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1727                                 "non-Tx channel.\n");
1728                 return 0;
1729         }
1730
1731         /* fill cmd with power settings for all rates for current channel */
1732         /* Fill OFDM rate */
1733         for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1734              rate_idx <= IWL_LAST_OFDM_RATE; rate_idx++, i++) {
1735
1736                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1737                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1738
1739                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1740                                 le16_to_cpu(txpower.channel),
1741                                 txpower.band,
1742                                 txpower.power[i].tpc.tx_gain,
1743                                 txpower.power[i].tpc.dsp_atten,
1744                                 txpower.power[i].rate);
1745         }
1746         /* Fill CCK rates */
1747         for (rate_idx = IWL_FIRST_CCK_RATE;
1748              rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1749                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1750                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1751
1752                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1753                                 le16_to_cpu(txpower.channel),
1754                                 txpower.band,
1755                                 txpower.power[i].tpc.tx_gain,
1756                                 txpower.power[i].tpc.dsp_atten,
1757                                 txpower.power[i].rate);
1758         }
1759
1760         return iwl3945_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1761                         sizeof(struct iwl3945_txpowertable_cmd), &txpower);
1762
1763 }
1764
1765 /**
1766  * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1767  * @ch_info: Channel to update.  Uses power_info.requested_power.
1768  *
1769  * Replace requested_power and base_power_index ch_info fields for
1770  * one channel.
1771  *
1772  * Called if user or spectrum management changes power preferences.
1773  * Takes into account h/w and modulation limitations (clip power).
1774  *
1775  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1776  *
1777  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1778  *       properly fill out the scan powers, and actual h/w gain settings,
1779  *       and send changes to NIC
1780  */
1781 static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv *priv,
1782                              struct iwl3945_channel_info *ch_info)
1783 {
1784         struct iwl3945_channel_power_info *power_info;
1785         int power_changed = 0;
1786         int i;
1787         const s8 *clip_pwrs;
1788         int power;
1789
1790         /* Get this chnlgrp's rate-to-max/clip-powers table */
1791         clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1792
1793         /* Get this channel's rate-to-current-power settings table */
1794         power_info = ch_info->power_info;
1795
1796         /* update OFDM Txpower settings */
1797         for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1798              i++, ++power_info) {
1799                 int delta_idx;
1800
1801                 /* limit new power to be no more than h/w capability */
1802                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1803                 if (power == power_info->requested_power)
1804                         continue;
1805
1806                 /* find difference between old and new requested powers,
1807                  *    update base (non-temp-compensated) power index */
1808                 delta_idx = (power - power_info->requested_power) * 2;
1809                 power_info->base_power_index -= delta_idx;
1810
1811                 /* save new requested power value */
1812                 power_info->requested_power = power;
1813
1814                 power_changed = 1;
1815         }
1816
1817         /* update CCK Txpower settings, based on OFDM 12M setting ...
1818          *    ... all CCK power settings for a given channel are the *same*. */
1819         if (power_changed) {
1820                 power =
1821                     ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1822                     requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1823
1824                 /* do all CCK rates' iwl3945_channel_power_info structures */
1825                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1826                         power_info->requested_power = power;
1827                         power_info->base_power_index =
1828                             ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1829                             base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1830                         ++power_info;
1831                 }
1832         }
1833
1834         return 0;
1835 }
1836
1837 /**
1838  * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1839  *
1840  * NOTE: Returned power limit may be less (but not more) than requested,
1841  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1842  *       (no consideration for h/w clipping limitations).
1843  */
1844 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl3945_channel_info *ch_info)
1845 {
1846         s8 max_power;
1847
1848 #if 0
1849         /* if we're using TGd limits, use lower of TGd or EEPROM */
1850         if (ch_info->tgd_data.max_power != 0)
1851                 max_power = min(ch_info->tgd_data.max_power,
1852                                 ch_info->eeprom.max_power_avg);
1853
1854         /* else just use EEPROM limits */
1855         else
1856 #endif
1857                 max_power = ch_info->eeprom.max_power_avg;
1858
1859         return min(max_power, ch_info->max_power_avg);
1860 }
1861
1862 /**
1863  * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1864  *
1865  * Compensate txpower settings of *all* channels for temperature.
1866  * This only accounts for the difference between current temperature
1867  *   and the factory calibration temperatures, and bases the new settings
1868  *   on the channel's base_power_index.
1869  *
1870  * If RxOn is "associated", this sends the new Txpower to NIC!
1871  */
1872 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv)
1873 {
1874         struct iwl3945_channel_info *ch_info = NULL;
1875         int delta_index;
1876         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1877         u8 a_band;
1878         u8 rate_index;
1879         u8 scan_tbl_index;
1880         u8 i;
1881         int ref_temp;
1882         int temperature = priv->temperature;
1883
1884         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1885         for (i = 0; i < priv->channel_count; i++) {
1886                 ch_info = &priv->channel_info[i];
1887                 a_band = is_channel_a_band(ch_info);
1888
1889                 /* Get this chnlgrp's factory calibration temperature */
1890                 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
1891                     temperature;
1892
1893                 /* get power index adjustment based on curr and factory
1894                  * temps */
1895                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
1896                                                               ref_temp);
1897
1898                 /* set tx power value for all rates, OFDM and CCK */
1899                 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
1900                      rate_index++) {
1901                         int power_idx =
1902                             ch_info->power_info[rate_index].base_power_index;
1903
1904                         /* temperature compensate */
1905                         power_idx += delta_index;
1906
1907                         /* stay within table range */
1908                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
1909                         ch_info->power_info[rate_index].
1910                             power_table_index = (u8) power_idx;
1911                         ch_info->power_info[rate_index].tpc =
1912                             power_gain_table[a_band][power_idx];
1913                 }
1914
1915                 /* Get this chnlgrp's rate-to-max/clip-powers table */
1916                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1917
1918                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1919                 for (scan_tbl_index = 0;
1920                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
1921                         s32 actual_index = (scan_tbl_index == 0) ?
1922                             IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
1923                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
1924                                            actual_index, clip_pwrs,
1925                                            ch_info, a_band);
1926                 }
1927         }
1928
1929         /* send Txpower command for current channel to ucode */
1930         return iwl3945_hw_reg_send_txpower(priv);
1931 }
1932
1933 int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power)
1934 {
1935         struct iwl3945_channel_info *ch_info;
1936         s8 max_power;
1937         u8 a_band;
1938         u8 i;
1939
1940         if (priv->user_txpower_limit == power) {
1941                 IWL_DEBUG_POWER("Requested Tx power same as current "
1942                                 "limit: %ddBm.\n", power);
1943                 return 0;
1944         }
1945
1946         IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
1947         priv->user_txpower_limit = power;
1948
1949         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1950
1951         for (i = 0; i < priv->channel_count; i++) {
1952                 ch_info = &priv->channel_info[i];
1953                 a_band = is_channel_a_band(ch_info);
1954
1955                 /* find minimum power of all user and regulatory constraints
1956                  *    (does not consider h/w clipping limitations) */
1957                 max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
1958                 max_power = min(power, max_power);
1959                 if (max_power != ch_info->curr_txpow) {
1960                         ch_info->curr_txpow = max_power;
1961
1962                         /* this considers the h/w clipping limitations */
1963                         iwl3945_hw_reg_set_new_power(priv, ch_info);
1964                 }
1965         }
1966
1967         /* update txpower settings for all channels,
1968          *   send to NIC if associated. */
1969         is_temp_calib_needed(priv);
1970         iwl3945_hw_reg_comp_txpower_temp(priv);
1971
1972         return 0;
1973 }
1974
1975 /* will add 3945 channel switch cmd handling later */
1976 int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel)
1977 {
1978         return 0;
1979 }
1980
1981 /**
1982  * iwl3945_reg_txpower_periodic -  called when time to check our temperature.
1983  *
1984  * -- reset periodic timer
1985  * -- see if temp has changed enough to warrant re-calibration ... if so:
1986  *     -- correct coeffs for temp (can reset temp timer)
1987  *     -- save this temp as "last",
1988  *     -- send new set of gain settings to NIC
1989  * NOTE:  This should continue working, even when we're not associated,
1990  *   so we can keep our internal table of scan powers current. */
1991 void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv)
1992 {
1993         /* This will kick in the "brute force"
1994          * iwl3945_hw_reg_comp_txpower_temp() below */
1995         if (!is_temp_calib_needed(priv))
1996                 goto reschedule;
1997
1998         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1999          * This is based *only* on current temperature,
2000          * ignoring any previous power measurements */
2001         iwl3945_hw_reg_comp_txpower_temp(priv);
2002
2003  reschedule:
2004         queue_delayed_work(priv->workqueue,
2005                            &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
2006 }
2007
2008 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
2009 {
2010         struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv,
2011                                              thermal_periodic.work);
2012
2013         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2014                 return;
2015
2016         mutex_lock(&priv->mutex);
2017         iwl3945_reg_txpower_periodic(priv);
2018         mutex_unlock(&priv->mutex);
2019 }
2020
2021 /**
2022  * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
2023  *                                 for the channel.
2024  *
2025  * This function is used when initializing channel-info structs.
2026  *
2027  * NOTE: These channel groups do *NOT* match the bands above!
2028  *       These channel groups are based on factory-tested channels;
2029  *       on A-band, EEPROM's "group frequency" entries represent the top
2030  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
2031  */
2032 static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl3945_priv *priv,
2033                                        const struct iwl3945_channel_info *ch_info)
2034 {
2035         struct iwl3945_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
2036         u8 group;
2037         u16 group_index = 0;    /* based on factory calib frequencies */
2038         u8 grp_channel;
2039
2040         /* Find the group index for the channel ... don't use index 1(?) */
2041         if (is_channel_a_band(ch_info)) {
2042                 for (group = 1; group < 5; group++) {
2043                         grp_channel = ch_grp[group].group_channel;
2044                         if (ch_info->channel <= grp_channel) {
2045                                 group_index = group;
2046                                 break;
2047                         }
2048                 }
2049                 /* group 4 has a few channels *above* its factory cal freq */
2050                 if (group == 5)
2051                         group_index = 4;
2052         } else
2053                 group_index = 0;        /* 2.4 GHz, group 0 */
2054
2055         IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
2056                         group_index);
2057         return group_index;
2058 }
2059
2060 /**
2061  * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
2062  *
2063  * Interpolate to get nominal (i.e. at factory calibration temperature) index
2064  *   into radio/DSP gain settings table for requested power.
2065  */
2066 static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv *priv,
2067                                        s8 requested_power,
2068                                        s32 setting_index, s32 *new_index)
2069 {
2070         const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
2071         s32 index0, index1;
2072         s32 power = 2 * requested_power;
2073         s32 i;
2074         const struct iwl3945_eeprom_txpower_sample *samples;
2075         s32 gains0, gains1;
2076         s32 res;
2077         s32 denominator;
2078
2079         chnl_grp = &priv->eeprom.groups[setting_index];
2080         samples = chnl_grp->samples;
2081         for (i = 0; i < 5; i++) {
2082                 if (power == samples[i].power) {
2083                         *new_index = samples[i].gain_index;
2084                         return 0;
2085                 }
2086         }
2087
2088         if (power > samples[1].power) {
2089                 index0 = 0;
2090                 index1 = 1;
2091         } else if (power > samples[2].power) {
2092                 index0 = 1;
2093                 index1 = 2;
2094         } else if (power > samples[3].power) {
2095                 index0 = 2;
2096                 index1 = 3;
2097         } else {
2098                 index0 = 3;
2099                 index1 = 4;
2100         }
2101
2102         denominator = (s32) samples[index1].power - (s32) samples[index0].power;
2103         if (denominator == 0)
2104                 return -EINVAL;
2105         gains0 = (s32) samples[index0].gain_index * (1 << 19);
2106         gains1 = (s32) samples[index1].gain_index * (1 << 19);
2107         res = gains0 + (gains1 - gains0) *
2108             ((s32) power - (s32) samples[index0].power) / denominator +
2109             (1 << 18);
2110         *new_index = res >> 19;
2111         return 0;
2112 }
2113
2114 static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv)
2115 {
2116         u32 i;
2117         s32 rate_index;
2118         const struct iwl3945_eeprom_txpower_group *group;
2119
2120         IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
2121
2122         for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
2123                 s8 *clip_pwrs;  /* table of power levels for each rate */
2124                 s8 satur_pwr;   /* saturation power for each chnl group */
2125                 group = &priv->eeprom.groups[i];
2126
2127                 /* sanity check on factory saturation power value */
2128                 if (group->saturation_power < 40) {
2129                         IWL_WARNING("Error: saturation power is %d, "
2130                                     "less than minimum expected 40\n",
2131                                     group->saturation_power);
2132                         return;
2133                 }
2134
2135                 /*
2136                  * Derive requested power levels for each rate, based on
2137                  *   hardware capabilities (saturation power for band).
2138                  * Basic value is 3dB down from saturation, with further
2139                  *   power reductions for highest 3 data rates.  These
2140                  *   backoffs provide headroom for high rate modulation
2141                  *   power peaks, without too much distortion (clipping).
2142                  */
2143                 /* we'll fill in this array with h/w max power levels */
2144                 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
2145
2146                 /* divide factory saturation power by 2 to find -3dB level */
2147                 satur_pwr = (s8) (group->saturation_power >> 1);
2148
2149                 /* fill in channel group's nominal powers for each rate */
2150                 for (rate_index = 0;
2151                      rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
2152                         switch (rate_index) {
2153                         case IWL_RATE_36M_INDEX_TABLE:
2154                                 if (i == 0)     /* B/G */
2155                                         *clip_pwrs = satur_pwr;
2156                                 else    /* A */
2157                                         *clip_pwrs = satur_pwr - 5;
2158                                 break;
2159                         case IWL_RATE_48M_INDEX_TABLE:
2160                                 if (i == 0)
2161                                         *clip_pwrs = satur_pwr - 7;
2162                                 else
2163                                         *clip_pwrs = satur_pwr - 10;
2164                                 break;
2165                         case IWL_RATE_54M_INDEX_TABLE:
2166                                 if (i == 0)
2167                                         *clip_pwrs = satur_pwr - 9;
2168                                 else
2169                                         *clip_pwrs = satur_pwr - 12;
2170                                 break;
2171                         default:
2172                                 *clip_pwrs = satur_pwr;
2173                                 break;
2174                         }
2175                 }
2176         }
2177 }
2178
2179 /**
2180  * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2181  *
2182  * Second pass (during init) to set up priv->channel_info
2183  *
2184  * Set up Tx-power settings in our channel info database for each VALID
2185  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2186  * and current temperature.
2187  *
2188  * Since this is based on current temperature (at init time), these values may
2189  * not be valid for very long, but it gives us a starting/default point,
2190  * and allows us to active (i.e. using Tx) scan.
2191  *
2192  * This does *not* write values to NIC, just sets up our internal table.
2193  */
2194 int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv)
2195 {
2196         struct iwl3945_channel_info *ch_info = NULL;
2197         struct iwl3945_channel_power_info *pwr_info;
2198         int delta_index;
2199         u8 rate_index;
2200         u8 scan_tbl_index;
2201         const s8 *clip_pwrs;    /* array of power levels for each rate */
2202         u8 gain, dsp_atten;
2203         s8 power;
2204         u8 pwr_index, base_pwr_index, a_band;
2205         u8 i;
2206         int temperature;
2207
2208         /* save temperature reference,
2209          *   so we can determine next time to calibrate */
2210         temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
2211         priv->last_temperature = temperature;
2212
2213         iwl3945_hw_reg_init_channel_groups(priv);
2214
2215         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2216         for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
2217              i++, ch_info++) {
2218                 a_band = is_channel_a_band(ch_info);
2219                 if (!is_channel_valid(ch_info))
2220                         continue;
2221
2222                 /* find this channel's channel group (*not* "band") index */
2223                 ch_info->group_index =
2224                         iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
2225
2226                 /* Get this chnlgrp's rate->max/clip-powers table */
2227                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2228
2229                 /* calculate power index *adjustment* value according to
2230                  *  diff between current temperature and factory temperature */
2231                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2232                                 priv->eeprom.groups[ch_info->group_index].
2233                                 temperature);
2234
2235                 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
2236                                 ch_info->channel, delta_index, temperature +
2237                                 IWL_TEMP_CONVERT);
2238
2239                 /* set tx power value for all OFDM rates */
2240                 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2241                      rate_index++) {
2242                         s32 power_idx;
2243                         int rc;
2244
2245                         /* use channel group's clip-power table,
2246                          *   but don't exceed channel's max power */
2247                         s8 pwr = min(ch_info->max_power_avg,
2248                                      clip_pwrs[rate_index]);
2249
2250                         pwr_info = &ch_info->power_info[rate_index];
2251
2252                         /* get base (i.e. at factory-measured temperature)
2253                          *    power table index for this rate's power */
2254                         rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2255                                                          ch_info->group_index,
2256                                                          &power_idx);
2257                         if (rc) {
2258                                 IWL_ERROR("Invalid power index\n");
2259                                 return rc;
2260                         }
2261                         pwr_info->base_power_index = (u8) power_idx;
2262
2263                         /* temperature compensate */
2264                         power_idx += delta_index;
2265
2266                         /* stay within range of gain table */
2267                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2268
2269                         /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2270                         pwr_info->requested_power = pwr;
2271                         pwr_info->power_table_index = (u8) power_idx;
2272                         pwr_info->tpc.tx_gain =
2273                             power_gain_table[a_band][power_idx].tx_gain;
2274                         pwr_info->tpc.dsp_atten =
2275                             power_gain_table[a_band][power_idx].dsp_atten;
2276                 }
2277
2278                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2279                 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2280                 power = pwr_info->requested_power +
2281                         IWL_CCK_FROM_OFDM_POWER_DIFF;
2282                 pwr_index = pwr_info->power_table_index +
2283                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2284                 base_pwr_index = pwr_info->base_power_index +
2285                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2286
2287                 /* stay within table range */
2288                 pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2289                 gain = power_gain_table[a_band][pwr_index].tx_gain;
2290                 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2291
2292                 /* fill each CCK rate's iwl3945_channel_power_info structure
2293                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2294                  * NOTE:  CCK rates start at end of OFDM rates! */
2295                 for (rate_index = 0;
2296                      rate_index < IWL_CCK_RATES; rate_index++) {
2297                         pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2298                         pwr_info->requested_power = power;
2299                         pwr_info->power_table_index = pwr_index;
2300                         pwr_info->base_power_index = base_pwr_index;
2301                         pwr_info->tpc.tx_gain = gain;
2302                         pwr_info->tpc.dsp_atten = dsp_atten;
2303                 }
2304
2305                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2306                 for (scan_tbl_index = 0;
2307                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2308                         s32 actual_index = (scan_tbl_index == 0) ?
2309                                 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2310                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2311                                 actual_index, clip_pwrs, ch_info, a_band);
2312                 }
2313         }
2314
2315         return 0;
2316 }
2317
2318 int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv)
2319 {
2320         int rc;
2321         unsigned long flags;
2322
2323         spin_lock_irqsave(&priv->lock, flags);
2324         rc = iwl3945_grab_nic_access(priv);
2325         if (rc) {
2326                 spin_unlock_irqrestore(&priv->lock, flags);
2327                 return rc;
2328         }
2329
2330         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0), 0);
2331         rc = iwl3945_poll_direct_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
2332         if (rc < 0)
2333                 IWL_ERROR("Can't stop Rx DMA.\n");
2334
2335         iwl3945_release_nic_access(priv);
2336         spin_unlock_irqrestore(&priv->lock, flags);
2337
2338         return 0;
2339 }
2340
2341 int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
2342 {
2343         int rc;
2344         unsigned long flags;
2345         int txq_id = txq->q.id;
2346
2347         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2348
2349         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2350
2351         spin_lock_irqsave(&priv->lock, flags);
2352         rc = iwl3945_grab_nic_access(priv);
2353         if (rc) {
2354                 spin_unlock_irqrestore(&priv->lock, flags);
2355                 return rc;
2356         }
2357         iwl3945_write_direct32(priv, FH_CBCC_CTRL(txq_id), 0);
2358         iwl3945_write_direct32(priv, FH_CBCC_BASE(txq_id), 0);
2359
2360         iwl3945_write_direct32(priv, FH_TCSR_CONFIG(txq_id),
2361                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2362                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2363                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2364                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2365                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2366         iwl3945_release_nic_access(priv);
2367
2368         /* fake read to flush all prev. writes */
2369         iwl3945_read32(priv, FH_TSSR_CBB_BASE);
2370         spin_unlock_irqrestore(&priv->lock, flags);
2371
2372         return 0;
2373 }
2374
2375 int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv)
2376 {
2377         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2378
2379         return le32_to_cpu(shared_data->rx_read_ptr[0]);
2380 }
2381
2382 /**
2383  * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2384  */
2385 int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv)
2386 {
2387         int rc, i, index, prev_index;
2388         struct iwl3945_rate_scaling_cmd rate_cmd = {
2389                 .reserved = {0, 0, 0},
2390         };
2391         struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2392
2393         for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2394                 index = iwl3945_rates[i].table_rs_index;
2395
2396                 table[index].rate_n_flags =
2397                         iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2398                 table[index].try_cnt = priv->retry_rate;
2399                 prev_index = iwl3945_get_prev_ieee_rate(i);
2400                 table[index].next_rate_index = iwl3945_rates[prev_index].table_rs_index;
2401         }
2402
2403         switch (priv->band) {
2404         case IEEE80211_BAND_5GHZ:
2405                 IWL_DEBUG_RATE("Select A mode rate scale\n");
2406                 /* If one of the following CCK rates is used,
2407                  * have it fall back to the 6M OFDM rate */
2408                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++)
2409                         table[i].next_rate_index = iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2410
2411                 /* Don't fall back to CCK rates */
2412                 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index = IWL_RATE_9M_INDEX_TABLE;
2413
2414                 /* Don't drop out of OFDM rates */
2415                 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2416                     iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2417                 break;
2418
2419         case IEEE80211_BAND_2GHZ:
2420                 IWL_DEBUG_RATE("Select B/G mode rate scale\n");
2421                 /* If an OFDM rate is used, have it fall back to the
2422                  * 1M CCK rates */
2423                 for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE; i++)
2424                         table[i].next_rate_index = iwl3945_rates[IWL_FIRST_CCK_RATE].table_rs_index;
2425
2426                 /* CCK shouldn't fall back to OFDM... */
2427                 table[IWL_RATE_11M_INDEX_TABLE].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2428                 break;
2429
2430         default:
2431                 WARN_ON(1);
2432                 break;
2433         }
2434
2435         /* Update the rate scaling for control frame Tx */
2436         rate_cmd.table_id = 0;
2437         rc = iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2438                               &rate_cmd);
2439         if (rc)
2440                 return rc;
2441
2442         /* Update the rate scaling for data frame Tx */
2443         rate_cmd.table_id = 1;
2444         return iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2445                                 &rate_cmd);
2446 }
2447
2448 /* Called when initializing driver */
2449 int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv)
2450 {
2451         memset((void *)&priv->hw_setting, 0,
2452                sizeof(struct iwl3945_driver_hw_info));
2453
2454         priv->hw_setting.shared_virt =
2455             pci_alloc_consistent(priv->pci_dev,
2456                                  sizeof(struct iwl3945_shared),
2457                                  &priv->hw_setting.shared_phys);
2458
2459         if (!priv->hw_setting.shared_virt) {
2460                 IWL_ERROR("failed to allocate pci memory\n");
2461                 mutex_unlock(&priv->mutex);
2462                 return -ENOMEM;
2463         }
2464
2465         priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE;
2466         priv->hw_setting.max_pkt_size = 2342;
2467         priv->hw_setting.tx_cmd_len = sizeof(struct iwl3945_tx_cmd);
2468         priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2469         priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2470         priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2471         priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2472
2473         priv->hw_setting.tx_ant_num = 2;
2474         return 0;
2475 }
2476
2477 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv,
2478                           struct iwl3945_frame *frame, u8 rate)
2479 {
2480         struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2481         unsigned int frame_size;
2482
2483         tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2484         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2485
2486         tx_beacon_cmd->tx.sta_id = IWL3945_BROADCAST_ID;
2487         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2488
2489         frame_size = iwl3945_fill_beacon_frame(priv,
2490                                 tx_beacon_cmd->frame,
2491                                 iwl3945_broadcast_addr,
2492                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2493
2494         BUG_ON(frame_size > MAX_MPDU_SIZE);
2495         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2496
2497         tx_beacon_cmd->tx.rate = rate;
2498         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2499                                       TX_CMD_FLG_TSF_MSK);
2500
2501         /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2502         tx_beacon_cmd->tx.supp_rates[0] =
2503                 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2504
2505         tx_beacon_cmd->tx.supp_rates[1] =
2506                 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2507
2508         return (sizeof(struct iwl3945_tx_beacon_cmd) + frame_size);
2509 }
2510
2511 void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv)
2512 {
2513         priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2514 }
2515
2516 void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv)
2517 {
2518         INIT_DELAYED_WORK(&priv->thermal_periodic,
2519                           iwl3945_bg_reg_txpower_periodic);
2520 }
2521
2522 void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv)
2523 {
2524         cancel_delayed_work(&priv->thermal_periodic);
2525 }
2526
2527 static struct iwl_3945_cfg iwl3945_bg_cfg = {
2528         .name = "3945BG",
2529         .sku = IWL_SKU_G,
2530 };
2531
2532 static struct iwl_3945_cfg iwl3945_abg_cfg = {
2533         .name = "3945ABG",
2534         .sku = IWL_SKU_A|IWL_SKU_G,
2535 };
2536
2537 struct pci_device_id iwl3945_hw_card_ids[] = {
2538         {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg)},
2539         {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg)},
2540         {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg)},
2541         {IWL_PCI_DEVICE(0x4227, 0x1014, iwl3945_bg_cfg)},
2542         {IWL_PCI_DEVICE(0x4222, PCI_ANY_ID, iwl3945_abg_cfg)},
2543         {IWL_PCI_DEVICE(0x4227, PCI_ANY_ID, iwl3945_abg_cfg)},
2544         {0}
2545 };
2546
2547 MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);